MCC'2021- Execution of r118-tall-162075403300614

About the Execution of LoLA for LamportFastMutEx-COL-5

Execution Summary
Max Memory Used (MB)	Time wait (ms)	CPU Usage (ms)	I/O Wait (ms)	Computed Result	Execution Status
16228.403	867101.00	2858320.00	1428.70	T?TFFFFTFFTFFFFF	normal

Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/data/fkordon/mcc2021-input.r118-tall-162075
Waiting for the VM to be ready (probing ssh)
..................................................
============================
Generated by BenchKit 2-4028
Executing tool lola
Input is LamportFastMutEx-COL-5, examination
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r118-tall-162075403300614
==================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 456K
-rw-r--r-- 1 mcc users 17K May 5 16:58
-rw-r--r-- 1 mcc users 136K May 10 09:43
-rw-r--r-- 1 mcc users 14K May 5 16:58
-rw-r--r-- 1 mcc users 94K May 10 09:43
-rw-r--r-- 1 mcc users 4.2K May 6 14:48
-rw-r--r-- 1 mcc users 6.6K May 6 14:48
-rw-r--r-- 1 mcc users 4.4K Apr 26 07:42
-rw-r--r-- 1 mcc users 31K Apr 26 07:42
-rw-r--r-- 1 mcc users 2.3K Apr 26 07:42
-rw-r--r-- 1 mcc users 17K Apr 26 07:42
-rw-r--r-- 1 mcc users 3.7K Mar 27 06:03
-rw-r--r-- 1 mcc users 19K Mar 27 06:03
-rw-r--r-- 1 mcc users 2.9K Mar 25 07:12
-rw-r--r-- 1 mcc users 16K Mar 25 07:12
-rw-r--r-- 1 mcc users 1.7K Mar 22 09:15
-rw-r--r-- 1 mcc users 3.8K Mar 22 09:15
-rw-r--r-- 1 mcc users 5 May 5 16:51 equiv_pt
-rw-r--r-- 1 mcc users 2 May 5 16:51 instance
-rw-r--r-- 1 mcc users 5 May 5 16:51 iscolored
-rw-r--r-- 1 mcc users 41K May 5 16:51

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result
FORMULA_NAME LamportFastMutEx-COL-5-ReachabilityCa
FORMULA_NAME LamportFastMutEx-COL-5-ReachabilityCa
FORMULA_NAME LamportFastMutEx-COL-5-ReachabilityCa
FORMULA_NAME LamportFastMutEx-COL-5-ReachabilityCa
FORMULA_NAME LamportFastMutEx-COL-5-ReachabilityCa
FORMULA_NAME LamportFastMutEx-COL-5-ReachabilityCa
FORMULA_NAME LamportFastMutEx-COL-5-ReachabilityCa
FORMULA_NAME LamportFastMutEx-COL-5-ReachabilityCa
FORMULA_NAME LamportFastMutEx-COL-5-ReachabilityCa
FORMULA_NAME LamportFastMutEx-COL-5-ReachabilityCa
FORMULA_NAME LamportFastMutEx-COL-5-ReachabilityCa
FORMULA_NAME LamportFastMutEx-COL-5-ReachabilityCa
FORMULA_NAME LamportFastMutEx-COL-5-ReachabilityCa
FORMULA_NAME LamportFastMutEx-COL-5-ReachabilityCa
FORMULA_NAME LamportFastMutEx-COL-5-ReachabilityCa
FORMULA_NAME LamportFastMutEx-COL-5-ReachabilityCa

=== Now, execution of the tool begins

BK_START 1620821836765

starting LoLA
BK_INPUT LamportFastMutEx-COL-5
BK_EXAMINATION: ReachabilityCardinality
bin directory: /home/mcc/BenchKit/bin
current directory: /home/mcc/execution
ReachabilityCardinality

FORMULA LamportFastMutEx-COL-5-ReachabilityCardinality-11

FORMULA LamportFastMutEx-COL-5-ReachabilityCardinality-00

FORMULA LamportFastMutEx-COL-5-ReachabilityCardinality-05

FORMULA LamportFastMutEx-COL-5-ReachabilityCardinality-07

FORMULA LamportFastMutEx-COL-5-ReachabilityCardinality-13

FORMULA LamportFastMutEx-COL-5-ReachabilityCardinality-06

FORMULA LamportFastMutEx-COL-5-ReachabilityCardinality-15

FORMULA LamportFastMutEx-COL-5-ReachabilityCardinality-04

FORMULA LamportFastMutEx-COL-5-ReachabilityCardinality-10

FORMULA LamportFastMutEx-COL-5-ReachabilityCardinality-02

FORMULA LamportFastMutEx-COL-5-ReachabilityCardinality-03

FORMULA LamportFastMutEx-COL-5-ReachabilityCardinality-12

FORMULA LamportFastMutEx-COL-5-ReachabilityCardinality-09

FORMULA LamportFastMutEx-COL-5-ReachabilityCardinality-08

FORMULA LamportFastMutEx-COL-5-ReachabilityCardinality-14

BK_STOP 1620822703866

--------------------
content from stderr:

lola: MEM LIMIT 32
lola: MEM LIMIT 5
lola: NET
lola: input: PNML file (--pnmlnet)
lola: reading net from /home/mcc/execution/model
lola: reading pnml
lola: PNML file contains High-Level net
lola: finished parsing
lola: closed net file /home/mcc/execution/model.
lola: Reading HL formula in XML format
lola: reading formula from /home/mcc/execution/R
lola: rewrite Frontend/Parser/formula_rewrite.k:
lola: rewrite Frontend/Parser/formula_rewrite.k:
lola: rewrite Frontend/Parser/formula_rewrite.k:
lola: rewrite Frontend/Parser/formula_rewrite.k:
lola: rewrite Frontend/Parser/formula_rewrite.k:
lola: rewrite Frontend/Parser/formula_rewrite.k:
lola: rewrite Frontend/Parser/formula_rewrite.k:
lola: rewrite Frontend/Parser/formula_rewrite.k:
lola: rewrite Frontend/Parser/formula_rewrite.k:
lola: TR BINDINGS
lola: LAUNCH task # 52 (type SKEL/FNDP)
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 53 (type SKEL/EQUN)
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 55 (type SKEL/SRCH)
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 56 (type SKEL/SRCH)
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:
lola: rewrite Frontend/Parser/formula_rewrite.k:
lola: FINISHED task # 52 (type SKEL/FNDP)
lola: result : true
lola: fired transitions : 7
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
lola: CANCELED task # 53 (type EQUN) for
lola: CANCELED task # 55 (type SRCH) for
lola: CANCELED task # 56 (type SRCH) for
lola: rewrite Frontend/Parser/formula_rewrite.k:
lola: rewrite Frontend/Parser/formula_rewrite.k:
lola: rewrite Frontend/Parser/formula_rewrite.k:
lola: rewrite Frontend/Parser/formula_rewrite.k:
lola: rewrite Frontend/Parser/formula_rewrite.k:
lola: rewrite Frontend/Parser/formula_rewrite.k:
lola: rewrite Frontend/Parser/formula_rewrite.k:
lola: rewrite Frontend/Parser/formula_rewrite.k:
lola: rewrite Frontend/Parser/formula_rewrite.k:
lola: rewrite Frontend/Parser/formula_rewrite.k:
lola: rewrite Frontend/Parser/formula_rewrite.k:
lola: TR BINDINGS DONE
lola: Places: 174, Transitions: 318
lola: rewrite Frontend/Parser/formula_rewrite.k:
lola: rewrite Frontend/Parser/formula_rewrite.k:
lola: rewrite Frontend/Parser/formula_rewrite.k:
lola: rewrite Frontend/Parser/formula_rewrite.k:
lola: LAUNCH task # 80 (type SKEL/FNDP)
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 98 (type SKEL/EQUN)
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 100 (type SKEL/SRCH)
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:
lola: rewrite Frontend/Parser/formula_rewrite.k:
lola: rewrite Frontend/Parser/formula_rewrite.k:
lola: LAUNCH task # 101 (type SKEL/SRCH)
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:
lola: rewrite Frontend/Parser/formula_rewrite.k:
lola: rewrite Frontend/Parser/formula_rewrite.k:
lola: FINISHED task # 100 (type SKEL/SRCH)
lola: result : false
lola: markings : 1
lola: time used : 0.000000
lola: memory pages used : 1
lola: rewrite Frontend/Parser/formula_rewrite.k:
lola: rewrite Frontend/Parser/formula_rewrite.k:
lola: rewrite Frontend/Parser/formula_rewrite.k:
lola: rewrite Frontend/Parser/formula_rewrite.k:
lola: rewrite Frontend/Parser/formula_rewrite.k:
lola: rewrite Frontend/Parser/formula_rewrite.k:
lola: rewrite Frontend/Parser/formula_rewrite.k:
lola: rewrite Frontend/Parser/formula_rewrite.k:
lola: rewrite Frontend/Parser/formula_rewrite.k:
lola: rewrite Frontend/Parser/formula_rewrite.k:
lola: CANCELED task # 80 (type FNDP) for
lola: CANCELED task # 98 (type EQUN) for
lola: CANCELED task # 101 (type SRCH) for
lola: LAUNCH task # 49 (type SKEL/FNDP)
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 58 (type SKEL/EQUN)
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 83 (type SKEL/SRCH)
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 84 (type SKEL/SRCH)
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:
lola: rewrite Frontend/Parser/formula_rewrite.k:
lola: rewrite Frontend/Parser/formula_rewrite.k:
lola: rewrite Frontend/Parser/formula_rewrite.k:
lola: rewrite Frontend/Parser/formula_rewrite.k:
lola: rewrite Frontend/Parser/formula_rewrite.k:
lola: FINISHED task # 80 (type SKEL/FNDP)
lola: result : unknown
lola: fired transitions : 10051
lola: tried executions : 10052
lola: time used : 0.000000
lola: memory pages used : 0
sara: try reading problem file /home/mcc/execution
lola: rewrite Frontend/Parser/formula_rewrite.k:
lola: rewrite Frontend/Parser/formula_rewrite.k:
lola: FINISHED task # 98 (type SKEL/EQUN)
lola: result : unknown
lola: rewrite Frontend/Parser/formula_rewrite.k:
lola: rewrite Frontend/Parser/formula_rewrite.k:
lola: rewrite Frontend/Parser/formula_rewrite.k:
lola: rewrite Frontend/Parser/formula_rewrite.k:
lola: FINISHED task # 84 (type SKEL/SRCH)
lola: result : true
lola: markings : 9
lola: fired transitions : 9
lola: time used : 0.000000
lola: memory pages used : 1
lola: rewrite Frontend/Parser/formula_rewrite.k:
lola: rewrite Frontend/Parser/formula_rewrite.k:
lola: rewrite Frontend/Parser/formula_rewrite.k:
lola: rewrite Frontend/Parser/formula_rewrite.k:
lola: FINISHED task # 83 (type SKEL/SRCH)
lola: result : true
lola: markings : 8
lola: fired transitions : 7
lola: time used : 0.000000
lola: memory pages used : 1
lola: rewrite Frontend/Parser/formula_rewrite.k:
lola: rewrite Frontend/Parser/formula_rewrite.k:
lola: rewrite Frontend/Parser/formula_rewrite.k:
lola: rewrite Frontend/Parser/formula_rewrite.k:
lola: rewrite Frontend/Parser/formula_rewrite.k:
lola: rewrite Frontend/Parser/formula_rewrite.k:
lola: rewrite Frontend/Parser/formula_rewrite.k:
lola: rewrite Frontend/Parser/formula_rewrite.k:
lola: rewrite Frontend/Parser/formula_rewrite.k:
lola: rewrite Frontend/Parser/formula_rewrite.k:
lola: rewrite Frontend/Parser/formula_rewrite.k:
lola: rewrite Frontend/Parser/formula_rewrite.k:
lola: CANCELED task # 49 (type FNDP) for
lola: CANCELED task # 58 (type EQUN) for
lola: LAUNCH task # 110 (type SKEL/FNDP)
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 127 (type SKEL/EQUN)
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 129 (type SKEL/SRCH)
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:
lola: rewrite Frontend/Parser/formula_rewrite.k:
lola: LAUNCH task # 130 (type SKEL/SRCH)
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:
lola: rewrite Frontend/Parser/formula_rewrite.k:
lola: rewrite Frontend/Parser/formula_rewrite.k:
lola: rewrite Frontend/Parser/formula_rewrite.k:
lola: rewrite Frontend/Parser/formula_rewrite.k:
lola: rewrite Frontend/Parser/formula_rewrite.k:
lola: rewrite Frontend/Parser/formula_rewrite.k:
lola: rewrite Frontend/Parser/formula_rewrite.k:
lola: rewrite Frontend/Parser/formula_rewrite.k:
lola: rewrite Frontend/Parser/formula_rewrite.k:
lola: FINISHED task # 110 (type SKEL/FNDP)
lola: result : true
lola: fired transitions : 29
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0

lola: rewrite Frontend/Parser/formula_rewrite.k:
lola: rewrite Frontend/Parser/formula_rewrite.k:
lola: rewrite Frontend/Parser/formula_rewrite.k:
lola: rewrite Frontend/Parser/formula_rewrite.k:
lola: rewrite Frontend/Parser/formula_rewrite.k:
lola: rewrite Frontend/Parser/formula_rewrite.k:
lola: rewrite Frontend/Parser/formula_rewrite.k:
lola: rewrite Frontend/Parser/formula_rewrite.k:
lola: rewrite Frontend/Parser/formula_rewrite.k:
lola: rewrite Frontend/Parser/formula_rewrite.k:
lola: rewrite Frontend/Parser/formula_rewrite.k:
lola: FINISHED task # 49 (type SKEL/FNDP)
lola: rewrite Frontend/Parser/formula_rewrite.
lola: result : unknown
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
lola: rewrite Frontend/Parser/formula_rewrite.k:
lola: rewrite Frontend/Parser/formula_rewrite.k:
lola: CANCELED task # 127 (type EQUN) for
lola: CANCELED task # 129 (type SRCH) for
lola: CANCELED task # 130 (type SRCH) for
lola: LAUNCH task # 148 (type SKEL/FNDP)
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 149 (type SKEL/EQUN)
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 151 (type SKEL/SRCH)
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 152 (type SKEL/SRCH)
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
sara: try reading problem file /home/mcc/execution
lola: rewrite Frontend/Parser/formula_rewrite.k:
lola: rewrite Frontend/Parser/formula_rewrite.k:
lola: FINISHED task # 129 (type SKEL/SRCH)
lola: result : true
lola: markings : 31
lola: fired transitions : 30
lola: time used : 0.000000
lola: memory pages used : 1
lola: rewrite Frontend/Parser/formula_rewrite.k:
lola: rewrite Frontend/Parser/formula_rewrite.k:
lola: FINISHED task # 53 (type SKEL/EQUN)
lola: result : true
lola: rewrite Frontend/Parser/formula_rewrite.k:
lola: rewrite Frontend/Parser/formula_rewrite.k:
lola: rewrite Frontend/Parser/formula_rewrite.k:
lola: FINISHED task # 151 (type SKEL/SRCH)
lola: result : true
lola: markings : 12
lola: fired transitions : 11
lola: time used : 0.000000
lola: memory pages used : 1
lola: rewrite Frontend/Parser/formula_rewrite.k:
lola: rewrite Frontend/Parser/formula_rewrite.k:
lola: rewrite Frontend/Parser/formula_rewrite.k:
lola: rewrite Frontend/Parser/formula_rewrite.k:
lola: CANCELED task # 148 (type FNDP) for
lola: CANCELED task # 149 (type EQUN) for
lola: CANCELED task # 152 (type SRCH) for
lola: LAUNCH task # 93 (type SKEL/FNDP)
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:
lola: rewrite Frontend/Parser/formula_rewrite.k:

lola: LAUNCH task # 106 (type SKEL/EQUN)
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 121 (type SKEL/SRCH)
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 125 (type SKEL/SRCH)
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: sara: try reading problem file /home/mcc/exe
rewrite Frontend/Parser/formula_rewrite.k:721
lola: FINISHED task # 121 (type SKEL/SRCH)
lola: result : true
lola: markings : 12
lola: fired transitions : 11
lola: time used : 0.000000
lola: memory pages used : 1
lola: FINISHED task # 148 (type SKEL/FNDP)
lola: result : unknown
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
lola: @ trans T-setbi_24

lola: rewrite Frontend/Parser/formula_rewrite.k:
lola: @ trans T-yne0_4
lola: @ trans T-fordo_12
sara: try reading problem file /home/mcc/execution

lola: CANCELED task # 93 (type FNDP) for
lola: CANCELED task # 106 (type EQUN) for
lola: CANCELED task # 125 (type SRCH) for
lola: @ trans T-xeqi_10
lola: rewrite Frontend/Parser/formula_rewrite.k:
lola: rewrite Frontend/Parser/formula_rewrite.k:
lola: LAUNCH task # 139 (type SKEL/FNDP)
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: @ trans T-sety_9
lola: LAUNCH task # 140 (type SKEL/EQUN)
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:
lola: rewrite Frontend/Parser/formula_rewrite.k:
lola: LAUNCH task # 142 (type SKEL/SRCH)
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 143 (type SKEL/SRCH)
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 93 (type SKEL/FNDP)
lola: result : true
lola: fired transitions : 10
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
lola: @ trans T-setbi_2
lola: FINISHED task # 58 (type SKEL/EQUN)
lola: result : true
lola: FINISHED task # 127 (type SKEL/EQUN)
lola: result : true
lola: FINISHED task # 125 (type SKEL/SRCH)
lola: result : true
lola: markings : 133
lola: fired transitions : 156
lola: time used : 0.000000
lola: memory pages used : 1
lola: @ trans T-awaity
lola: rewrite Frontend/Parser/formula_rewrite.k:
lola: rewrite Frontend/Parser/formula_rewrite.k:
lola: rewrite Frontend/Parser/formula_rewrite.k:
lola: @ trans T-setbi_11
lola: rewrite Frontend/Parser/formula_rewrite.k:
lola: rewrite Frontend/Parser/formula_rewrite.k:
lola: FINISHED task # 142 (type SKEL/SRCH)
lola: result : true
lola: markings : 8
lola: fired transitions : 7
lola: time used : 0.000000
lola: memory pages used : 1
lola: CANCELED task # 139 (type FNDP) for
lola: CANCELED task # 140 (type EQUN) for
lola: CANCELED task # 143 (type SRCH) for
lola: @ trans T-ynei_15
lola: LAUNCH task # 147 (type SKEL/FNDP)
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 155 (type SKEL/EQUN)
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 166 (type SKEL/SRCH)
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:
lola: LAUNCH task # 167 (type SKEL/SRCH)
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:
lola: FINISHED task # 139 (type SKEL/FNDP)
lola: result : true
lola: fired transitions : 6
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
lola: rewrite Frontend/Parser/formula_rewrite.k:
lola: rewrite Frontend/Parser/formula_rewrite.k:
lola: rewrite Frontend/Parser/formula_rewrite.k:
lola: FINISHED task # 149 (type SKEL/EQUN)
lola: result : true
lola: @ trans T-forod_13
lola: FINISHED task # 147 (type SKEL/FNDP)
lola: result : true
lola: fired transitions : 9
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
sara: try reading problem file /home/mcc/execution
sara: place or transition ordering is non-determin

lola: FINISHED task # 166 (type SKEL/SRCH)
lola: result : true
lola: markings : 11
lola: fired transitions : 10
lola: time used : 0.000000
lola: memory pages used : 1
lola: CANCELED task # 155 (type EQUN) for
lola: CANCELED task # 167 (type SRCH) for
lola: LAUNCH task # 161 (type SKEL/FNDP)
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 163 (type SKEL/EQUN)
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:
lola: rewrite Frontend/Parser/formula_rewrite.k:
lola: LAUNCH task # 169 (type SKEL/SRCH)
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 170 (type SKEL/SRCH)
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
sara: try reading problem file /home/mcc/execution
lola: @ trans T-setbi_5

lola: @ trans T-xnei_10
sara: try reading problem file /home/mcc/execution
sara: place or transition ordering is non-determin

lola: @ trans T-await_13
lola: FINISHED task # 106 (type SKEL/EQUN)
lola: result : true
sara: try reading problem file /home/mcc/execution
lola: @ trans T-yeq0_4
lola: FINISHED task # 170 (type SKEL/SRCH)
lola: result : false
lola: markings : 2847
lola: fired transitions : 5724
lola: time used : 0.000000
lola: memory pages used : 1
lola: CANCELED task # 161 (type FNDP) for
lola: CANCELED task # 163 (type EQUN) for
lola: CANCELED task # 169 (type SRCH) for
lola: @ trans T-yeqi_15
lola: LAUNCH task # 74 (type SKEL/FNDP)
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 85 (type SKEL/EQUN)
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 108 (type SKEL/SRCH)
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 109 (type SKEL/SRCH)
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 163 (type SKEL/EQUN)
lola: result : unknown
lola: FINISHED task # 161 (type SKEL/FNDP)
lola: result : unknown
lola: fired transitions : 1823
lola: tried executions : 37
lola: time used : 0.000000
lola: memory pages used : 0
lola: rewrite Frontend/Parser/formula_rewrite.k:
lola: rewrite Frontend/Parser/formula_rewrite.k:
lola: FINISHED task # 74 (type SKEL/FNDP)
lola: result : true
lola: fired transitions : 8
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
lola: CANCELED task # 85 (type EQUN) for
lola: CANCELED task # 108 (type SRCH) for
lola: CANCELED task # 109 (type SRCH) for
lola: LAUNCH task # 73 (type SKEL/FNDP)
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 89 (type SKEL/EQUN)
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 113 (type SKEL/SRCH)
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 114 (type SKEL/SRCH)
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 155 (type SKEL/EQUN)
lola: result : true
lola: FINISHED task # 140 (type SKEL/EQUN)
lola: result : true
lola: FINISHED task # 114 (type SKEL/SRCH)
lola: result : true
lola: markings : 29
lola: fired transitions : 28
lola: time used : 0.000000
lola: memory pages used : 1
lola: CANCELED task # 73 (type FNDP) for
lola: CANCELED task # 89 (type EQUN) for
lola: CANCELED task # 113 (type SRCH) for
lola: LAUNCH task # 72 (type SKEL/FNDP)
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 81 (type SKEL/EQUN)
lola: rewrite Frontend/Parser/formula_rewrite.
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 111 (type SKEL/SRCH)
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 112 (type SKEL/SRCH)
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 73 (type SKEL/FNDP)
lola: result : true
lola: fired transitions : 17
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
lola: @ trans T-sety0_23
sara: try reading problem file /home/mcc/execution
sara: place or transition ordering is non-determin
lola: @ trans T-setx_3

lola: rewrite Frontend/Parser/formula_rewrite.k:
lola: rewrite Frontend/Parser/formula_rewrite.k:
sara: try reading problem file /home/mcc/execution
lola: FINISHED task # 111 (type SKEL/SRCH)
lola: result : false
lola: markings : 6
lola: fired transitions : 5
lola: time used : 0.000000
lola: memory pages used : 1
lola: CANCELED task # 72 (type FNDP) for
lola: CANCELED task # 81 (type EQUN) for
lola: CANCELED task # 112 (type SRCH) for

lola: LAUNCH task # 105 (type SKEL/FNDP)
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 116 (type SKEL/EQUN)
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 118 (type SKEL/SRCH)
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:
lola: rewrite Frontend/Parser/formula_rewrite.k:
lola: LAUNCH task # 119 (type SKEL/SRCH)
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 85 (type SKEL/EQUN)
lola: result : true
lola: FINISHED task # 105 (type SKEL/FNDP)
lola: result : true
lola: fired transitions : 1
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
sara: try reading problem file /home/mcc/execution
lola: CANCELED task # 116 (type EQUN) for
lola: CANCELED task # 118 (type SRCH) for
lola: CANCELED task # 119 (type SRCH) for
sara: place or transition ordering is non-determin

lola: LAUNCH task # 75 (type SKEL/FNDP)
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 79 (type SKEL/FNDP)
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 87 (type SKEL/EQUN)
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 96 (type SKEL/EQUN)
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
sara: try reading problem file /home/mcc/execution
sara: place or transition ordering is non-determin

lola: FINISHED task # 75 (type SKEL/FNDP)
lola: result : true
lola: fired transitions : 3
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
lola: CANCELED task # 87 (type EQUN) for
lola: rewrite Frontend/Parser/formula_rewrite.k:
lola: rewrite Frontend/Parser/formula_rewrite.k:
lola: rewrite Frontend/Parser/formula_rewrite.k:
lola: rewrite Frontend/Parser/formula_rewrite.k:
lola: LAUNCH task # 78 (type SKEL/FNDP)
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 94 (type SKEL/EQUN)
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 89 (type SKEL/EQUN)
lola: result : true
lola: FINISHED task # 116 (type SKEL/EQUN)
lola: result : true
lola: FINISHED task # 81 (type SKEL/EQUN)
lola: result : false
lola: FINISHED task # 79 (type SKEL/FNDP)
lola: result : true
lola: fired transitions : 1
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
lola: CANCELED task # 96 (type EQUN) for
lola: LAUNCH task # 156 (type SKEL/SRCH)
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 157 (type SKEL/SRCH)
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
sara: try reading problem file /home/mcc/execution
lola: rewrite Frontend/Parser/formula_rewrite.k:
lola: rewrite Frontend/Parser/formula_rewrite.k:
lola: rewrite Frontend/Parser/formula_rewrite.k:

lola: FINISHED task # 96 (type SKEL/EQUN)
lola: result : unknown
lola: FINISHED task # 157 (type SKEL/SRCH)
lola: result : false
lola: markings : 1890
lola: fired transitions : 3459
lola: time used : 0.000000
lola: memory pages used : 1
lola: CANCELED task # 78 (type FNDP) for
lola: CANCELED task # 94 (type EQUN) for
lola: CANCELED task # 156 (type SRCH) for
lola: FINISHED task # 78 (type SKEL/FNDP)
lola: result : unknown
lola: fired transitions : 3648
lola: tried executions : 2
lola: time used : 0.000000
lola: memory pages used : 0
lola: FINISHED task # 87 (type SKEL/EQUN)
lola: result : true
lola: rewrite Frontend/Parser/formula_rewrite.k:
lola: rewrite Frontend/Parser/formula_rewrite.k:
lola: rewrite Frontend/Parser/formula_rewrite.k:
lola: rewrite Frontend/Parser/formula_rewrite.k:
lola: rewrite Frontend/Parser/formula_rewrite.k:
lola: rewrite Frontend/Parser/formula_rewrite.k:
lola: rewrite Frontend/Parser/formula_rewrite.k:
lola: rewrite Frontend/Parser/formula_rewrite.k:
lola: Rule S: 58 transitions removed,37
sara: try reading problem file /home/mcc/execution

lola: planning for LamportFastMutEx-COL-5-Reacha
lola: FINISHED task # 94 (type SKEL/EQUN)
lola: result : false
lola: rewrite Frontend/Parser/formula_rewrite.k:
lola: rewrite Frontend/Parser/formula_rewrite.k:
lola: rewrite Frontend/Parser/formula_rewrite.k:
lola: rewrite Frontend/Parser/formula_rewrite.k:
lola: rewrite Frontend/Parser/formula_rewrite.k:
lola: rewrite Frontend/Parser/formula_rewrite.k:
lola: rewrite Frontend/Parser/formula_rewrite.k:
lola: rewrite Frontend/Parser/formula_rewrite.k:
lola: LAUNCH task # 177 (type EXCL) for
lola: time limit : 327 sec
lola: memory limit: 32 pages
lola: LAUNCH task # 173 (type FNDP) for
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 174 (type EQUN) for
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 176 (type SRCH) for
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:
lola: rewrite Frontend/Parser/formula_rewrite.k:
lola: rewrite Frontend/Parser/formula_rewrite.k:
lola: rewrite Frontend/Parser/formula_rewrite.k:
lola: rewrite Frontend/Parser/formula_rewrite.k:
lola: rewrite Frontend/Parser/formula_rewrite.k:
lola: rewrite Frontend/Parser/formula_rewrite.k:
lola: rewrite Frontend/Parser/formula_rewrite.k:
lola: rewrite Frontend/Parser/formula_rewrite.k:
lola: rewrite Frontend/Parser/formula_rewrite.k:
lola: rewrite Frontend/Parser/formula_rewrite.k:
lola: rewrite Frontend/Parser/formula_rewrite.k:
lola: rewrite Frontend/Parser/formula_rewrite.k:
lola: rewrite Frontend/Parser/formula_rewrite.k:
lola: rewrite Frontend/Parser/formula_rewrite.k:
lola: rewrite Frontend/Parser/formula_rewrite.k:
lola: rewrite Frontend/Parser/formula_rewrite.k:
lola: rewrite Frontend/Parser/formula_rewrite.k:
lola: rewrite Frontend/Parser/formula_rewrite.k:
lola: rewrite Frontend/Parser/formula_rewrite.k:
lola: rewrite Frontend/Parser/formula_rewrite.k:
lola: rewrite Frontend/Parser/formula_rewrite.k:
lola: rewrite Frontend/Parser/formula_rewrite.k:
lola: rewrite Frontend/Parser/formula_rewrite.k:
lola: rewrite Frontend/Parser/formula_rewrite.k:
lola: rewrite Frontend/Parser/formula_rewrite.k:
lola: rewrite Frontend/Parser/formula_rewrite.k:
lola: rewrite Frontend/Parser/formula_rewrite.k:
lola: rewrite Frontend/Parser/formula_rewrite.k:
lola: rewrite Frontend/Parser/formula_rewrite.k:
lola: rewrite Frontend/Parser/formula_rewrite.k:
lola: rewrite Frontend/Parser/formula_rewrite.k:
lola: rewrite Frontend/Parser/formula_rewrite.k:
lola: rewrite Frontend/Parser/formula_rewrite.k:
lola: rewrite Frontend/Parser/formula_rewrite.k:
lola: rewrite Frontend/Parser/formula_rewrite.k:
lola: rewrite Frontend/Parser/formula_rewrite.k:
lola: rewrite Frontend/Parser/formula_rewrite.k:
lola: rewrite Frontend/Parser/formula_rewrite.k:
lola: rewrite Frontend/Parser/formula_rewrite.k:
lola: rewrite Frontend/Parser/formula_rewrite.k:
lola: rewrite Frontend/Parser/formula_rewrite.k:
lola: rewrite Frontend/Parser/formula_rewrite.k:
lola: rewrite Frontend/Parser/formula_rewrite.k:
lola: rewrite Frontend/Parser/formula_rewrite.k:
lola: rewrite Frontend/Parser/formula_rewrite.k:
lola: rewrite Frontend/Parser/formula_rewrite.k:
lola: rewrite Frontend/Parser/formula_rewrite.k:
lola: rewrite Frontend/Parser/formula_rewrite.k:
lola: rewrite Frontend/Parser/formula_rewrite.k:
lola: rewrite Frontend/Parser/formula_rewrite.k:
lola: rewrite Frontend/Parser/formula_rewrite.k:
lola: FINISHED task # 176 (type SRCH) for
lola: result : true
lola: markings : 15
lola: fired transitions : 14
lola: time used : 0.000000
lola: memory pages used : 1
lola: CANCELED task # 173 (type FNDP) for
lola: CANCELED task # 174 (type EQUN) for
sara: try reading problem file /home/mcc/execution
lola: CANCELED task # 177 (type EXCL) for
lola: LAUNCH task # 228 (type EXCL) for
lola: time limit : 399 sec
lola: memory limit: 32 pages
lola: LAUNCH task # 214 (type FNDP) for
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 215 (type EQUN) for
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 217 (type SRCH) for
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
sara: place or transition ordering is non-determin
lola: rewrite Frontend/Parser/formula_rewrite.k:
lola: FINISHED task # 177 (type EXCL) for
lola: result : true
lola: markings : 105
lola: fired transitions : 110
lola: time used : 0.000000
lola: memory pages used : 1
lola: rewrite Frontend/Parser/formula_rewrite.k:
lola: rewrite Frontend/Parser/formula_rewrite.k:
lola: rewrite Frontend/Parser/formula_rewrite.k:
lola: rewrite Frontend/Parser/formula_rewrite.k:
lola: rewrite Frontend/Parser/formula_rewrite.k:
lola: rewrite Frontend/Parser/formula_rewrite.k:
lola: rewrite Frontend/Parser/formula_rewrite.k:
lola: rewrite Frontend/Parser/formula_rewrite.k:
lola: rewrite Frontend/Parser/formula_rewrite.k:
lola: rewrite Frontend/Parser/formula_rewrite.k:
lola: rewrite Frontend/Parser/formula_rewrite.k:
lola: rewrite Frontend/Parser/formula_rewrite.k:
lola: rewrite Frontend/Parser/formula_rewrite.k:
lola: rewrite Frontend/Parser/formula_rewrite.k:
lola: rewrite Frontend/Parser/formula_rewrite.k:
lola: rewrite Frontend/Parser/formula_rewrite.k:
lola: rewrite Frontend/Parser/formula_rewrite.k:
lola: rewrite Frontend/Parser/formula_rewrite.k:
lola: rewrite Frontend/Parser/formula_rewrite.k:
lola: rewrite Frontend/Parser/formula_rewrite.k:
lola: rewrite Frontend/Parser/formula_rewrite.k:
lola: rewrite Frontend/Parser/formula_rewrite.k:
lola: rewrite Frontend/Parser/formula_rewrite.k:
lola: rewrite Frontend/Parser/formula_rewrite.k:
lola: rewrite Frontend/Parser/formula_rewrite.k:
lola: rewrite Frontend/Parser/formula_rewrite.k:
lola: rewrite Frontend/Parser/formula_rewrite.k:
lola: rewrite Frontend/Parser/formula_rewrite.k:
lola: rewrite Frontend/Parser/formula_rewrite.k:
lola: rewrite Frontend/Parser/formula_rewrite.k:
lola: FINISHED task # 173 (type FNDP) for
lola: result : unknown
lola: fired transitions : 2
lola: tried executions : 2
lola: time used : 0.000000
lola: memory pages used : 0
sara: try reading problem file /home/mcc/execution
lola: FINISHED task # 228 (type EXCL) for
lola: result : true
lola: markings : 583
lola: fired transitions : 632
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 243 (type EXCL) for
lola: time limit : 359 sec
lola: memory limit: 32 pages
lola: FINISHED task # 243 (type EXCL) for
lola: result : true
lola: markings : 20
lola: fired transitions : 19
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 240 (type EXCL) for
lola: time limit : 399 sec
lola: memory limit: 32 pages
sara: place or transition ordering is non-determin
lola: FINISHED task # 240 (type EXCL) for
lola: result : true
lola: markings : 59
lola: fired transitions : 58
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 212 (type EXCL) for
lola: time limit : 449 sec
lola: memory limit: 32 pages
lola: FINISHED task # 214 (type FNDP) for
lola: result : true
lola: fired transitions : 9130
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
lola: CANCELED task # 215 (type EQUN) for
lola: CANCELED task # 217 (type SRCH) for
lola: LAUNCH task # 187 (type FNDP) for
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 188 (type EQUN) for
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 190 (type SRCH) for
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 187 (type FNDP) for
lola: result : true
lola: fired transitions : 9
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
lola: CANCELED task # 188 (type EQUN) for
lola: CANCELED task # 190 (type SRCH) for
lola: LAUNCH task # 245 (type FNDP) for
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 246 (type EQUN) for
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 248 (type SRCH) for
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 248 (type SRCH) for
lola: result : true
lola: markings : 62
lola: fired transitions : 61
lola: time used : 0.000000
lola: memory pages used : 1
lola: CANCELED task # 245 (type FNDP) for
lola: CANCELED task # 246 (type EQUN) for
lola: LAUNCH task # 193 (type FNDP) for
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 231 (type EQUN) for
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 236 (type SRCH) for
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 215 (type EQUN) for
lola: result : unknown
lola: FINISHED task # 245 (type FNDP) for
lola: result : true
lola: fired transitions : 60
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
lola: FINISHED task # 193 (type FNDP) for
lola: result : true
lola: fired transitions : 16
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
lola: CANCELED task # 231 (type EQUN) for
lola: CANCELED task # 236 (type SRCH) for
lola: LAUNCH task # 197 (type FNDP) for
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:
lola: rewrite Frontend/Parser/formula_rewrite.k:
lola: LAUNCH task # 198 (type EQUN) for
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:
lola: LAUNCH task # 200 (type SRCH) for
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:
lola: rewrite Frontend/Parser/formula_rewrite.k:
lola: rewrite Frontend/Parser/formula_rewrite.k:
lola: rewrite Frontend/Parser/formula_rewrite.k:
sara: try reading problem file /home/mcc/execution
sara: place or transition ordering is non-determin
sara: try reading problem file /home/mcc/execution
sara: place or transition ordering is non-determin
sara: try reading problem file /home/mcc/execution
sara: try reading problem file /home/mcc/execution
sara: place or transition ordering is non-determin
sara: place or transition ordering is non-determin
lola: FINISHED task # 197 (type FNDP) for
lola: result : true
lola: fired transitions : 7632
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
lola: CANCELED task # 198 (type EQUN) for
lola: CANCELED task # 200 (type SRCH) for
lola: LAUNCH task # 180 (type FNDP) for
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 185 (type EQUN) for
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 194 (type SRCH) for
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 198 (type EQUN) for
lola: result : unknown
lola: FINISHED task # 194 (type SRCH) for
lola: result : true
lola: markings : 25
lola: fired transitions : 24
lola: time used : 0.000000
lola: memory pages used : 1
lola: CANCELED task # 180 (type FNDP) for
lola: CANCELED task # 185 (type EQUN) for
lola: rewrite Frontend/Parser/formula_rewrite.k:
lola: rewrite Frontend/Parser/formula_rewrite.k:
lola: LAUNCH task # 204 (type FNDP) for
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 205 (type EQUN) for
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 220 (type SRCH) for
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
sara: try reading problem file /home/mcc/execution
sara: place or transition ordering is non-determin

lola: FINISHED task # 220 (type SRCH) for
lola: result : true
lola: markings : 1687
lola: fired transitions : 3274
lola: time used : 1.000000
lola: memory pages used : 1
lola: CANCELED task # 204 (type FNDP) for
lola: CANCELED task # 205 (type EQUN) for

lola: rewrite Frontend/Parser/formula_rewrite.k:
lola: LAUNCH task # 208 (type FNDP) for
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:
lola: LAUNCH task # 209 (type EQUN) for
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 211 (type SRCH) for
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 185 (type EQUN) for
lola: result : true
lola: FINISHED task # 180 (type FNDP) for
lola: result : true
lola: fired transitions : 23
lola: tried executions : 1
lola: time used : 1.000000
lola: memory pages used : 0
lola: rewrite Frontend/Parser/formula_rewrite.k:
lola: rewrite Frontend/Parser/formula_rewrite.k:
lola: FINISHED task # 204 (type FNDP) for
lola: result : true
lola: fired transitions : 668
lola: tried executions : 1
lola: time used : 1.000000
lola: memory pages used : 0
sara: try reading problem file /home/mcc/execution
sara: place or transition ordering is non-determin
lola: FINISHED task # 188 (type EQUN) for
lola: result : true
sara: try reading problem file /home/mcc/execution
sara: place or transition ordering is non-determin
FINISHED FORMULA: CATEGORY
LamportFastMutEx-COL-5-ReachabilityCardinality-00:
LamportFastMutEx-COL-5-ReachabilityCardinality-02:
LamportFastMutEx-COL-5-ReachabilityCardinality-03:
LamportFastMutEx-COL-5-ReachabilityCardinality-04:
LamportFastMutEx-COL-5-ReachabilityCardinality-05:
LamportFastMutEx-COL-5-ReachabilityCardinality-06:
LamportFastMutEx-COL-5-ReachabilityCardinality-07:
LamportFastMutEx-COL-5-ReachabilityCardinality-08:
LamportFastMutEx-COL-5-ReachabilityCardinality-09:
LamportFastMutEx-COL-5-ReachabilityCardinality-10:
LamportFastMutEx-COL-5-ReachabilityCardinality-11:
LamportFastMutEx-COL-5-ReachabilityCardinality-12:
LamportFastMutEx-COL-5-ReachabilityCardinality-13:
LamportFastMutEx-COL-5-ReachabilityCardinality-14:
LamportFastMutEx-COL-5-ReachabilityCardinality-15:

PENDING FORMULAS: CATEGORY
LamportFastMutEx-COL-5-ReachabilityCardinality-01:

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA
208 EF FNDP 4/1799 0/5
209 EF STEQ 4/3598 0/5
211 EF SRCH 4/3598 1/5
212 EF EXCL 5/3599 1/32

Time elapsed: 6 secs. Pages in use: 3
# running tasks: 4 of 4 Visible: 16
FINISHED FORMULA: CATEGORY
LamportFastMutEx-COL-5-ReachabilityCardinality-00:
LamportFastMutEx-COL-5-ReachabilityCardinality-02:
LamportFastMutEx-COL-5-ReachabilityCardinality-03:
LamportFastMutEx-COL-5-ReachabilityCardinality-04:
LamportFastMutEx-COL-5-ReachabilityCardinality-05:
LamportFastMutEx-COL-5-ReachabilityCardinality-06:
LamportFastMutEx-COL-5-ReachabilityCardinality-07:
LamportFastMutEx-COL-5-ReachabilityCardinality-08:
LamportFastMutEx-COL-5-ReachabilityCardinality-09:
LamportFastMutEx-COL-5-ReachabilityCardinality-10:
LamportFastMutEx-COL-5-ReachabilityCardinality-11:
LamportFastMutEx-COL-5-ReachabilityCardinality-12:
LamportFastMutEx-COL-5-ReachabilityCardinality-13:
LamportFastMutEx-COL-5-ReachabilityCardinality-14:
LamportFastMutEx-COL-5-ReachabilityCardinality-15:

PENDING FORMULAS: CATEGORY
LamportFastMutEx-COL-5-ReachabilityCardinality-01:

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA
208 EF FNDP 9/1795 0/5
209 EF STEQ 9/3594 0/5
211 EF SRCH 9/3594 3/5
212 EF EXCL 10/3599 1/32

Time elapsed: 11 secs. Pages in use: 4
# running tasks: 4 of 4 Visible: 16
FINISHED FORMULA: CATEGORY
LamportFastMutEx-COL-5-ReachabilityCardinality-00:
LamportFastMutEx-COL-5-ReachabilityCardinality-02:
LamportFastMutEx-COL-5-ReachabilityCardinality-03:
LamportFastMutEx-COL-5-ReachabilityCardinality-04:
LamportFastMutEx-COL-5-ReachabilityCardinality-05:
LamportFastMutEx-COL-5-ReachabilityCardinality-06:
LamportFastMutEx-COL-5-ReachabilityCardinality-07:
LamportFastMutEx-COL-5-ReachabilityCardinality-08:
LamportFastMutEx-COL-5-ReachabilityCardinality-09:
LamportFastMutEx-COL-5-ReachabilityCardinality-10:
LamportFastMutEx-COL-5-ReachabilityCardinality-11:
LamportFastMutEx-COL-5-ReachabilityCardinality-12:
LamportFastMutEx-COL-5-ReachabilityCardinality-13:
LamportFastMutEx-COL-5-ReachabilityCardinality-14:
LamportFastMutEx-COL-5-ReachabilityCardinality-15:

PENDING FORMULAS: CATEGORY
LamportFastMutEx-COL-5-ReachabilityCardinality-01:

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA
208 EF FNDP 14/1790 0/5
209 EF STEQ 14/3589 0/5
211 EF SRCH 14/3589 4/5
212 EF EXCL 15/3599 2/32

Time elapsed: 16 secs. Pages in use: 6
# running tasks: 4 of 4 Visible: 16
FINISHED FORMULA: CATEGORY
LamportFastMutEx-COL-5-ReachabilityCardinality-00:
LamportFastMutEx-COL-5-ReachabilityCardinality-02:
LamportFastMutEx-COL-5-ReachabilityCardinality-03:
LamportFastMutEx-COL-5-ReachabilityCardinality-04:
LamportFastMutEx-COL-5-ReachabilityCardinality-05:
LamportFastMutEx-COL-5-ReachabilityCardinality-06:
LamportFastMutEx-COL-5-ReachabilityCardinality-07:
LamportFastMutEx-COL-5-ReachabilityCardinality-08:
LamportFastMutEx-COL-5-ReachabilityCardinality-09:
LamportFastMutEx-COL-5-ReachabilityCardinality-10:
LamportFastMutEx-COL-5-ReachabilityCardinality-11:
LamportFastMutEx-COL-5-ReachabilityCardinality-12:
LamportFastMutEx-COL-5-ReachabilityCardinality-13:
LamportFastMutEx-COL-5-ReachabilityCardinality-14:
LamportFastMutEx-COL-5-ReachabilityCardinality-15:

PENDING FORMULAS: CATEGORY
LamportFastMutEx-COL-5-ReachabilityCardinality-01:

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA
208 EF FNDP 19/1785 0/5
209 EF STEQ 19/3584 0/5
211 EF SRCH 19/3584 4/5
212 EF EXCL 20/3599 2/32

Time elapsed: 21 secs. Pages in use: 6
# running tasks: 4 of 4 Visible: 16

lola: FINISHED task # 174 (type EQUN) for
lola: result : true
FINISHED FORMULA: CATEGORY
LamportFastMutEx-COL-5-ReachabilityCardinality-00:
LamportFastMutEx-COL-5-ReachabilityCardinality-02:
LamportFastMutEx-COL-5-ReachabilityCardinality-03:
LamportFastMutEx-COL-5-ReachabilityCardinality-04:
LamportFastMutEx-COL-5-ReachabilityCardinality-05:
LamportFastMutEx-COL-5-ReachabilityCardinality-06:
LamportFastMutEx-COL-5-ReachabilityCardinality-07:
LamportFastMutEx-COL-5-ReachabilityCardinality-08:
LamportFastMutEx-COL-5-ReachabilityCardinality-09:
LamportFastMutEx-COL-5-ReachabilityCardinality-10:
LamportFastMutEx-COL-5-ReachabilityCardinality-11:
LamportFastMutEx-COL-5-ReachabilityCardinality-12:
LamportFastMutEx-COL-5-ReachabilityCardinality-13:
LamportFastMutEx-COL-5-ReachabilityCardinality-14:
LamportFastMutEx-COL-5-ReachabilityCardinality-15:

PENDING FORMULAS: CATEGORY
LamportFastMutEx-COL-5-ReachabilityCardinality-01:

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA
208 EF FNDP 24/1775 0/5
209 EF STEQ 24/3574 0/5
211 EF SRCH 24/3574 4/5
212 EF EXCL 25/3599 2/32

Time elapsed: 26 secs. Pages in use: 6
# running tasks: 4 of 4 Visible: 16
FINISHED FORMULA: CATEGORY
LamportFastMutEx-COL-5-ReachabilityCardinality-00:
LamportFastMutEx-COL-5-ReachabilityCardinality-02:
LamportFastMutEx-COL-5-ReachabilityCardinality-03:
LamportFastMutEx-COL-5-ReachabilityCardinality-04:
LamportFastMutEx-COL-5-ReachabilityCardinality-05:
LamportFastMutEx-COL-5-ReachabilityCardinality-06:
LamportFastMutEx-COL-5-ReachabilityCardinality-07:
LamportFastMutEx-COL-5-ReachabilityCardinality-08:
LamportFastMutEx-COL-5-ReachabilityCardinality-09:
LamportFastMutEx-COL-5-ReachabilityCardinality-10:
LamportFastMutEx-COL-5-ReachabilityCardinality-11:
LamportFastMutEx-COL-5-ReachabilityCardinality-12:
LamportFastMutEx-COL-5-ReachabilityCardinality-13:
LamportFastMutEx-COL-5-ReachabilityCardinality-14:
LamportFastMutEx-COL-5-ReachabilityCardinality-15:

PENDING FORMULAS: CATEGORY
LamportFastMutEx-COL-5-ReachabilityCardinality-01:

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA
208 EF FNDP 29/1775 0/5
209 EF STEQ 29/3574 0/5
211 EF SRCH 29/3574 5/5
212 EF EXCL 30/3599 2/32

Time elapsed: 31 secs. Pages in use: 7
# running tasks: 4 of 4 Visible: 16
sara: warning, failure of lp_solve (at job 2921)
lola: CANCELED task # 211 (type SRCH) for
FINISHED FORMULA: CATEGORY
LamportFastMutEx-COL-5-ReachabilityCardinality-00:
LamportFastMutEx-COL-5-ReachabilityCardinality-02:
LamportFastMutEx-COL-5-ReachabilityCardinality-03:
LamportFastMutEx-COL-5-ReachabilityCardinality-04:
LamportFastMutEx-COL-5-ReachabilityCardinality-05:
LamportFastMutEx-COL-5-ReachabilityCardinality-06:
LamportFastMutEx-COL-5-ReachabilityCardinality-07:
LamportFastMutEx-COL-5-ReachabilityCardinality-08:
LamportFastMutEx-COL-5-ReachabilityCardinality-09:
LamportFastMutEx-COL-5-ReachabilityCardinality-10:
LamportFastMutEx-COL-5-ReachabilityCardinality-11:
LamportFastMutEx-COL-5-ReachabilityCardinality-12:
LamportFastMutEx-COL-5-ReachabilityCardinality-13:
LamportFastMutEx-COL-5-ReachabilityCardinality-14:
LamportFastMutEx-COL-5-ReachabilityCardinality-15:

PENDING FORMULAS: CATEGORY
LamportFastMutEx-COL-5-ReachabilityCardinality-01:

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA
208 EF FNDP 34/1770 0/5
209 EF STEQ 34/3569 0/5
212 EF EXCL 35/3599 3/32

Time elapsed: 36 secs. Pages in use: 7
# running tasks: 4 of 4 Visible: 16
lola: LAUNCH task # 213 (type SRCH) for
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 213 (type SRCH) for
lola: result : unknown
lola: time used : 0.000000
lola: memory pages used : 1
FINISHED FORMULA: CATEGORY
LamportFastMutEx-COL-5-ReachabilityCardinality-00:
LamportFastMutEx-COL-5-ReachabilityCardinality-02:
LamportFastMutEx-COL-5-ReachabilityCardinality-03:
LamportFastMutEx-COL-5-ReachabilityCardinality-04:
LamportFastMutEx-COL-5-ReachabilityCardinality-05:
LamportFastMutEx-COL-5-ReachabilityCardinality-06:
LamportFastMutEx-COL-5-ReachabilityCardinality-07:
LamportFastMutEx-COL-5-ReachabilityCardinality-08:
LamportFastMutEx-COL-5-ReachabilityCardinality-09:
LamportFastMutEx-COL-5-ReachabilityCardinality-10:
LamportFastMutEx-COL-5-ReachabilityCardinality-11:
LamportFastMutEx-COL-5-ReachabilityCardinality-12:
LamportFastMutEx-COL-5-ReachabilityCardinality-13:
LamportFastMutEx-COL-5-ReachabilityCardinality-14:
LamportFastMutEx-COL-5-ReachabilityCardinality-15:

PENDING FORMULAS: CATEGORY
LamportFastMutEx-COL-5-ReachabilityCardinality-01:

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA
208 EF FNDP 39/3598 0/5
209 EF STEQ 39/3598 0/5
212 EF EXCL 40/3599 3/32

Time elapsed: 41 secs. Pages in use: 7
# running tasks: 3 of 4 Visible: 16
FINISHED FORMULA: CATEGORY
LamportFastMutEx-COL-5-ReachabilityCardinality-00:
LamportFastMutEx-COL-5-ReachabilityCardinality-02:
LamportFastMutEx-COL-5-ReachabilityCardinality-03:
LamportFastMutEx-COL-5-ReachabilityCardinality-04:
LamportFastMutEx-COL-5-ReachabilityCardinality-05:
LamportFastMutEx-COL-5-ReachabilityCardinality-06:
LamportFastMutEx-COL-5-ReachabilityCardinality-07:
LamportFastMutEx-COL-5-ReachabilityCardinality-08:
LamportFastMutEx-COL-5-ReachabilityCardinality-09:
LamportFastMutEx-COL-5-ReachabilityCardinality-10:
LamportFastMutEx-COL-5-ReachabilityCardinality-11:
LamportFastMutEx-COL-5-ReachabilityCardinality-12:
LamportFastMutEx-COL-5-ReachabilityCardinality-13:
LamportFastMutEx-COL-5-ReachabilityCardinality-14:
LamportFastMutEx-COL-5-ReachabilityCardinality-15:

PENDING FORMULAS: CATEGORY
LamportFastMutEx-COL-5-ReachabilityCardinality-01:

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA
208 EF FNDP 44/3598 0/5
209 EF STEQ 44/3598 0/5
212 EF EXCL 45/3599 4/32

Time elapsed: 46 secs. Pages in use: 7
# running tasks: 3 of 4 Visible: 16
FINISHED FORMULA: CATEGORY
LamportFastMutEx-COL-5-ReachabilityCardinality-00:
LamportFastMutEx-COL-5-ReachabilityCardinality-02:
LamportFastMutEx-COL-5-ReachabilityCardinality-03:
LamportFastMutEx-COL-5-ReachabilityCardinality-04:
LamportFastMutEx-COL-5-ReachabilityCardinality-05:
LamportFastMutEx-COL-5-ReachabilityCardinality-06:
LamportFastMutEx-COL-5-ReachabilityCardinality-07:
LamportFastMutEx-COL-5-ReachabilityCardinality-08:
LamportFastMutEx-COL-5-ReachabilityCardinality-09:
LamportFastMutEx-COL-5-ReachabilityCardinality-10:
LamportFastMutEx-COL-5-ReachabilityCardinality-11:
LamportFastMutEx-COL-5-ReachabilityCardinality-12:
LamportFastMutEx-COL-5-ReachabilityCardinality-13:
LamportFastMutEx-COL-5-ReachabilityCardinality-14:
LamportFastMutEx-COL-5-ReachabilityCardinality-15:

PENDING FORMULAS: CATEGORY
LamportFastMutEx-COL-5-ReachabilityCardinality-01:

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA
208 EF FNDP 49/3598 0/5
209 EF STEQ 49/3598 0/5
212 EF EXCL 50/3599 5/32

Time elapsed: 51 secs. Pages in use: 7
# running tasks: 3 of 4 Visible: 16
FINISHED FORMULA: CATEGORY
LamportFastMutEx-COL-5-ReachabilityCardinality-00:
LamportFastMutEx-COL-5-ReachabilityCardinality-02:
LamportFastMutEx-COL-5-ReachabilityCardinality-03:
LamportFastMutEx-COL-5-ReachabilityCardinality-04:
LamportFastMutEx-COL-5-ReachabilityCardinality-05:
LamportFastMutEx-COL-5-ReachabilityCardinality-06:
LamportFastMutEx-COL-5-ReachabilityCardinality-07:
LamportFastMutEx-COL-5-ReachabilityCardinality-08:
LamportFastMutEx-COL-5-ReachabilityCardinality-09:
LamportFastMutEx-COL-5-ReachabilityCardinality-10:
LamportFastMutEx-COL-5-ReachabilityCardinality-11:
LamportFastMutEx-COL-5-ReachabilityCardinality-12:
LamportFastMutEx-COL-5-ReachabilityCardinality-13:
LamportFastMutEx-COL-5-ReachabilityCardinality-14:
LamportFastMutEx-COL-5-ReachabilityCardinality-15:

PENDING FORMULAS: CATEGORY
LamportFastMutEx-COL-5-ReachabilityCardinality-01:

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA
208 EF FNDP 54/3598 0/5
209 EF STEQ 54/3598 0/5
212 EF EXCL 55/3599 5/32

Time elapsed: 56 secs. Pages in use: 7
# running tasks: 3 of 4 Visible: 16
FINISHED FORMULA: CATEGORY
LamportFastMutEx-COL-5-ReachabilityCardinality-00:
LamportFastMutEx-COL-5-ReachabilityCardinality-02:
LamportFastMutEx-COL-5-ReachabilityCardinality-03:
LamportFastMutEx-COL-5-ReachabilityCardinality-04:
LamportFastMutEx-COL-5-ReachabilityCardinality-05:
LamportFastMutEx-COL-5-ReachabilityCardinality-06:
LamportFastMutEx-COL-5-ReachabilityCardinality-07:
LamportFastMutEx-COL-5-ReachabilityCardinality-08:
LamportFastMutEx-COL-5-ReachabilityCardinality-09:
LamportFastMutEx-COL-5-ReachabilityCardinality-10:
LamportFastMutEx-COL-5-ReachabilityCardinality-11:
LamportFastMutEx-COL-5-ReachabilityCardinality-12:
LamportFastMutEx-COL-5-ReachabilityCardinality-13:
LamportFastMutEx-COL-5-ReachabilityCardinality-14:
LamportFastMutEx-COL-5-ReachabilityCardinality-15:

PENDING FORMULAS: CATEGORY
LamportFastMutEx-COL-5-ReachabilityCardinality-01:

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA
208 EF FNDP 59/3598 0/5
209 EF STEQ 59/3598 0/5
212 EF EXCL 60/3599 6/32

Time elapsed: 61 secs. Pages in use: 7
# running tasks: 3 of 4 Visible: 16
FINISHED FORMULA: CATEGORY
LamportFastMutEx-COL-5-ReachabilityCardinality-00:
LamportFastMutEx-COL-5-ReachabilityCardinality-02:
LamportFastMutEx-COL-5-ReachabilityCardinality-03:
LamportFastMutEx-COL-5-ReachabilityCardinality-04:
LamportFastMutEx-COL-5-ReachabilityCardinality-05:
LamportFastMutEx-COL-5-ReachabilityCardinality-06:
LamportFastMutEx-COL-5-ReachabilityCardinality-07:
LamportFastMutEx-COL-5-ReachabilityCardinality-08:
LamportFastMutEx-COL-5-ReachabilityCardinality-09:
LamportFastMutEx-COL-5-ReachabilityCardinality-10:
LamportFastMutEx-COL-5-ReachabilityCardinality-11:
LamportFastMutEx-COL-5-ReachabilityCardinality-12:
LamportFastMutEx-COL-5-ReachabilityCardinality-13:
LamportFastMutEx-COL-5-ReachabilityCardinality-14:
LamportFastMutEx-COL-5-ReachabilityCardinality-15:

PENDING FORMULAS: CATEGORY
LamportFastMutEx-COL-5-ReachabilityCardinality-01:

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA
208 EF FNDP 64/3598 0/5
209 EF STEQ 64/3598 0/5
212 EF EXCL 65/3599 7/32

Time elapsed: 66 secs. Pages in use: 7
# running tasks: 3 of 4 Visible: 16
FINISHED FORMULA: CATEGORY
LamportFastMutEx-COL-5-ReachabilityCardinality-00:
LamportFastMutEx-COL-5-ReachabilityCardinality-02:
LamportFastMutEx-COL-5-ReachabilityCardinality-03:
LamportFastMutEx-COL-5-ReachabilityCardinality-04:
LamportFastMutEx-COL-5-ReachabilityCardinality-05:
LamportFastMutEx-COL-5-ReachabilityCardinality-06:
LamportFastMutEx-COL-5-ReachabilityCardinality-07:
LamportFastMutEx-COL-5-ReachabilityCardinality-08:
LamportFastMutEx-COL-5-ReachabilityCardinality-09:
LamportFastMutEx-COL-5-ReachabilityCardinality-10:
LamportFastMutEx-COL-5-ReachabilityCardinality-11:
LamportFastMutEx-COL-5-ReachabilityCardinality-12:
LamportFastMutEx-COL-5-ReachabilityCardinality-13:
LamportFastMutEx-COL-5-ReachabilityCardinality-14:
LamportFastMutEx-COL-5-ReachabilityCardinality-15:

PENDING FORMULAS: CATEGORY
LamportFastMutEx-COL-5-ReachabilityCardinality-01:

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA
208 EF FNDP 69/3598 0/5
209 EF STEQ 69/3598 0/5
212 EF EXCL 70/3599 7/32

Time elapsed: 71 secs. Pages in use: 7
# running tasks: 3 of 4 Visible: 16
FINISHED FORMULA: CATEGORY
LamportFastMutEx-COL-5-ReachabilityCardinality-00:
LamportFastMutEx-COL-5-ReachabilityCardinality-02:
LamportFastMutEx-COL-5-ReachabilityCardinality-03:
LamportFastMutEx-COL-5-ReachabilityCardinality-04:
LamportFastMutEx-COL-5-ReachabilityCardinality-05:
LamportFastMutEx-COL-5-ReachabilityCardinality-06:
LamportFastMutEx-COL-5-ReachabilityCardinality-07:
LamportFastMutEx-COL-5-ReachabilityCardinality-08:
LamportFastMutEx-COL-5-ReachabilityCardinality-09:
LamportFastMutEx-COL-5-ReachabilityCardinality-10:
LamportFastMutEx-COL-5-ReachabilityCardinality-11:
LamportFastMutEx-COL-5-ReachabilityCardinality-12:
LamportFastMutEx-COL-5-ReachabilityCardinality-13:
LamportFastMutEx-COL-5-ReachabilityCardinality-14:
LamportFastMutEx-COL-5-ReachabilityCardinality-15:

PENDING FORMULAS: CATEGORY
LamportFastMutEx-COL-5-ReachabilityCardinality-01:

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA
208 EF FNDP 74/3598 0/5
209 EF STEQ 74/3598 0/5
212 EF EXCL 75/3599 8/32

Time elapsed: 76 secs. Pages in use: 8
# running tasks: 3 of 4 Visible: 16
FINISHED FORMULA: CATEGORY
LamportFastMutEx-COL-5-ReachabilityCardinality-00:
LamportFastMutEx-COL-5-ReachabilityCardinality-02:
LamportFastMutEx-COL-5-ReachabilityCardinality-03:
LamportFastMutEx-COL-5-ReachabilityCardinality-04:
LamportFastMutEx-COL-5-ReachabilityCardinality-05:
LamportFastMutEx-COL-5-ReachabilityCardinality-06:
LamportFastMutEx-COL-5-ReachabilityCardinality-07:
LamportFastMutEx-COL-5-ReachabilityCardinality-08:
LamportFastMutEx-COL-5-ReachabilityCardinality-09:
LamportFastMutEx-COL-5-ReachabilityCardinality-10:
LamportFastMutEx-COL-5-ReachabilityCardinality-11:
LamportFastMutEx-COL-5-ReachabilityCardinality-12:
LamportFastMutEx-COL-5-ReachabilityCardinality-13:
LamportFastMutEx-COL-5-ReachabilityCardinality-14:
LamportFastMutEx-COL-5-ReachabilityCardinality-15:

PENDING FORMULAS: CATEGORY
LamportFastMutEx-COL-5-ReachabilityCardinality-01:

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA
208 EF FNDP 79/3598 0/5
209 EF STEQ 79/3598 0/5
212 EF EXCL 80/3599 9/32

Time elapsed: 81 secs. Pages in use: 9
# running tasks: 3 of 4 Visible: 16
FINISHED FORMULA: CATEGORY
LamportFastMutEx-COL-5-ReachabilityCardinality-00:
LamportFastMutEx-COL-5-ReachabilityCardinality-02:
LamportFastMutEx-COL-5-ReachabilityCardinality-03:
LamportFastMutEx-COL-5-ReachabilityCardinality-04:
LamportFastMutEx-COL-5-ReachabilityCardinality-05:
LamportFastMutEx-COL-5-ReachabilityCardinality-06:
LamportFastMutEx-COL-5-ReachabilityCardinality-07:
LamportFastMutEx-COL-5-ReachabilityCardinality-08:
LamportFastMutEx-COL-5-ReachabilityCardinality-09:
LamportFastMutEx-COL-5-ReachabilityCardinality-10:
LamportFastMutEx-COL-5-ReachabilityCardinality-11:
LamportFastMutEx-COL-5-ReachabilityCardinality-12:
LamportFastMutEx-COL-5-ReachabilityCardinality-13:
LamportFastMutEx-COL-5-ReachabilityCardinality-14:
LamportFastMutEx-COL-5-ReachabilityCardinality-15:

PENDING FORMULAS: CATEGORY
LamportFastMutEx-COL-5-ReachabilityCardinality-01:

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA
208 EF FNDP 84/3598 0/5
209 EF STEQ 84/3598 0/5
212 EF EXCL 85/3599 9/32

Time elapsed: 86 secs. Pages in use: 9
# running tasks: 3 of 4 Visible: 16
FINISHED FORMULA: CATEGORY
LamportFastMutEx-COL-5-ReachabilityCardinality-00:
LamportFastMutEx-COL-5-ReachabilityCardinality-02:
LamportFastMutEx-COL-5-ReachabilityCardinality-03:
LamportFastMutEx-COL-5-ReachabilityCardinality-04:
LamportFastMutEx-COL-5-ReachabilityCardinality-05:
LamportFastMutEx-COL-5-ReachabilityCardinality-06:
LamportFastMutEx-COL-5-ReachabilityCardinality-07:
LamportFastMutEx-COL-5-ReachabilityCardinality-08:
LamportFastMutEx-COL-5-ReachabilityCardinality-09:
LamportFastMutEx-COL-5-ReachabilityCardinality-10:
LamportFastMutEx-COL-5-ReachabilityCardinality-11:
LamportFastMutEx-COL-5-ReachabilityCardinality-12:
LamportFastMutEx-COL-5-ReachabilityCardinality-13:
LamportFastMutEx-COL-5-ReachabilityCardinality-14:
LamportFastMutEx-COL-5-ReachabilityCardinality-15:

PENDING FORMULAS: CATEGORY
LamportFastMutEx-COL-5-ReachabilityCardinality-01:

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA
208 EF FNDP 89/3598 0/5
209 EF STEQ 89/3598 0/5
212 EF EXCL 90/3599 10/32

Time elapsed: 91 secs. Pages in use: 10
# running tasks: 3 of 4 Visible: 16
sara: warning, failure of lp_solve (at job 16692)
FINISHED FORMULA: CATEGORY
LamportFastMutEx-COL-5-ReachabilityCardinality-00:
LamportFastMutEx-COL-5-ReachabilityCardinality-02:
LamportFastMutEx-COL-5-ReachabilityCardinality-03:
LamportFastMutEx-COL-5-ReachabilityCardinality-04:
LamportFastMutEx-COL-5-ReachabilityCardinality-05:
LamportFastMutEx-COL-5-ReachabilityCardinality-06:
LamportFastMutEx-COL-5-ReachabilityCardinality-07:
LamportFastMutEx-COL-5-ReachabilityCardinality-08:
LamportFastMutEx-COL-5-ReachabilityCardinality-09:
LamportFastMutEx-COL-5-ReachabilityCardinality-10:
LamportFastMutEx-COL-5-ReachabilityCardinality-11:
LamportFastMutEx-COL-5-ReachabilityCardinality-12:
LamportFastMutEx-COL-5-ReachabilityCardinality-13:
LamportFastMutEx-COL-5-ReachabilityCardinality-14:
LamportFastMutEx-COL-5-ReachabilityCardinality-15:

PENDING FORMULAS: CATEGORY
LamportFastMutEx-COL-5-ReachabilityCardinality-01:

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA
208 EF FNDP 94/3598 0/5
209 EF STEQ 94/3598 0/5
212 EF EXCL 95/3599 11/32

Time elapsed: 96 secs. Pages in use: 11
# running tasks: 3 of 4 Visible: 16
FINISHED FORMULA: CATEGORY
LamportFastMutEx-COL-5-ReachabilityCardinality-00:
LamportFastMutEx-COL-5-ReachabilityCardinality-02:
LamportFastMutEx-COL-5-ReachabilityCardinality-03:
LamportFastMutEx-COL-5-ReachabilityCardinality-04:
LamportFastMutEx-COL-5-ReachabilityCardinality-05:
LamportFastMutEx-COL-5-ReachabilityCardinality-06:
LamportFastMutEx-COL-5-ReachabilityCardinality-07:
LamportFastMutEx-COL-5-ReachabilityCardinality-08:
LamportFastMutEx-COL-5-ReachabilityCardinality-09:
LamportFastMutEx-COL-5-ReachabilityCardinality-10:
LamportFastMutEx-COL-5-ReachabilityCardinality-11:
LamportFastMutEx-COL-5-ReachabilityCardinality-12:
LamportFastMutEx-COL-5-ReachabilityCardinality-13:
LamportFastMutEx-COL-5-ReachabilityCardinality-14:
LamportFastMutEx-COL-5-ReachabilityCardinality-15:

PENDING FORMULAS: CATEGORY
LamportFastMutEx-COL-5-ReachabilityCardinality-01:

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA
208 EF FNDP 99/3598 0/5
209 EF STEQ 99/3598 0/5
212 EF EXCL 100/3599 11/32

Time elapsed: 101 secs. Pages in use: 11
# running tasks: 3 of 4 Visible: 16
FINISHED FORMULA: CATEGORY
LamportFastMutEx-COL-5-ReachabilityCardinality-00:
LamportFastMutEx-COL-5-ReachabilityCardinality-02:
LamportFastMutEx-COL-5-ReachabilityCardinality-03:
LamportFastMutEx-COL-5-ReachabilityCardinality-04:
LamportFastMutEx-COL-5-ReachabilityCardinality-05:
LamportFastMutEx-COL-5-ReachabilityCardinality-06:
LamportFastMutEx-COL-5-ReachabilityCardinality-07:
LamportFastMutEx-COL-5-ReachabilityCardinality-08:
LamportFastMutEx-COL-5-ReachabilityCardinality-09:
LamportFastMutEx-COL-5-ReachabilityCardinality-10:
LamportFastMutEx-COL-5-ReachabilityCardinality-11:
LamportFastMutEx-COL-5-ReachabilityCardinality-12:
LamportFastMutEx-COL-5-ReachabilityCardinality-13:
LamportFastMutEx-COL-5-ReachabilityCardinality-14:
LamportFastMutEx-COL-5-ReachabilityCardinality-15:

PENDING FORMULAS: CATEGORY
LamportFastMutEx-COL-5-ReachabilityCardinality-01:

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA
208 EF FNDP 104/3598 0/5
209 EF STEQ 104/3598 0/5
212 EF EXCL 105/3599 12/32

Time elapsed: 106 secs. Pages in use: 12
# running tasks: 3 of 4 Visible: 16
FINISHED FORMULA: CATEGORY
LamportFastMutEx-COL-5-ReachabilityCardinality-00:
LamportFastMutEx-COL-5-ReachabilityCardinality-02:
LamportFastMutEx-COL-5-ReachabilityCardinality-03:
LamportFastMutEx-COL-5-ReachabilityCardinality-04:
LamportFastMutEx-COL-5-ReachabilityCardinality-05:
LamportFastMutEx-COL-5-ReachabilityCardinality-06:
LamportFastMutEx-COL-5-ReachabilityCardinality-07:
LamportFastMutEx-COL-5-ReachabilityCardinality-08:
LamportFastMutEx-COL-5-ReachabilityCardinality-09:
LamportFastMutEx-COL-5-ReachabilityCardinality-10:
LamportFastMutEx-COL-5-ReachabilityCardinality-11:
LamportFastMutEx-COL-5-ReachabilityCardinality-12:
LamportFastMutEx-COL-5-ReachabilityCardinality-13:
LamportFastMutEx-COL-5-ReachabilityCardinality-14:
LamportFastMutEx-COL-5-ReachabilityCardinality-15:

PENDING FORMULAS: CATEGORY
LamportFastMutEx-COL-5-ReachabilityCardinality-01:

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA
208 EF FNDP 109/3598 0/5
209 EF STEQ 109/3598 0/5
212 EF EXCL 110/3599 13/32

Time elapsed: 111 secs. Pages in use: 13
# running tasks: 3 of 4 Visible: 16
FINISHED FORMULA: CATEGORY
LamportFastMutEx-COL-5-ReachabilityCardinality-00:
LamportFastMutEx-COL-5-ReachabilityCardinality-02:
LamportFastMutEx-COL-5-ReachabilityCardinality-03:
LamportFastMutEx-COL-5-ReachabilityCardinality-04:
LamportFastMutEx-COL-5-ReachabilityCardinality-05:
LamportFastMutEx-COL-5-ReachabilityCardinality-06:
LamportFastMutEx-COL-5-ReachabilityCardinality-07:
LamportFastMutEx-COL-5-ReachabilityCardinality-08:
LamportFastMutEx-COL-5-ReachabilityCardinality-09:
LamportFastMutEx-COL-5-ReachabilityCardinality-10:
LamportFastMutEx-COL-5-ReachabilityCardinality-11:
LamportFastMutEx-COL-5-ReachabilityCardinality-12:
LamportFastMutEx-COL-5-ReachabilityCardinality-13:
LamportFastMutEx-COL-5-ReachabilityCardinality-14:
LamportFastMutEx-COL-5-ReachabilityCardinality-15:

PENDING FORMULAS: CATEGORY
LamportFastMutEx-COL-5-ReachabilityCardinality-01:

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA
208 EF FNDP 114/3598 0/5
209 EF STEQ 114/3598 0/5
212 EF EXCL 115/3599 13/32

Time elapsed: 116 secs. Pages in use: 13
# running tasks: 3 of 4 Visible: 16
FINISHED FORMULA: CATEGORY
LamportFastMutEx-COL-5-ReachabilityCardinality-00:
LamportFastMutEx-COL-5-ReachabilityCardinality-02:
LamportFastMutEx-COL-5-ReachabilityCardinality-03:
LamportFastMutEx-COL-5-ReachabilityCardinality-04:
LamportFastMutEx-COL-5-ReachabilityCardinality-05:
LamportFastMutEx-COL-5-ReachabilityCardinality-06:
LamportFastMutEx-COL-5-ReachabilityCardinality-07:
LamportFastMutEx-COL-5-ReachabilityCardinality-08:
LamportFastMutEx-COL-5-ReachabilityCardinality-09:
LamportFastMutEx-COL-5-ReachabilityCardinality-10:
LamportFastMutEx-COL-5-ReachabilityCardinality-11:
LamportFastMutEx-COL-5-ReachabilityCardinality-12:
LamportFastMutEx-COL-5-ReachabilityCardinality-13:
LamportFastMutEx-COL-5-ReachabilityCardinality-14:
LamportFastMutEx-COL-5-ReachabilityCardinality-15:

PENDING FORMULAS: CATEGORY
LamportFastMutEx-COL-5-ReachabilityCardinality-01:

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA
208 EF FNDP 119/3598 0/5
209 EF STEQ 119/3598 0/5
212 EF EXCL 120/3599 14/32

Time elapsed: 121 secs. Pages in use: 14
# running tasks: 3 of 4 Visible: 16
FINISHED FORMULA: CATEGORY
LamportFastMutEx-COL-5-ReachabilityCardinality-00:
LamportFastMutEx-COL-5-ReachabilityCardinality-02:
LamportFastMutEx-COL-5-ReachabilityCardinality-03:
LamportFastMutEx-COL-5-ReachabilityCardinality-04:
LamportFastMutEx-COL-5-ReachabilityCardinality-05:
LamportFastMutEx-COL-5-ReachabilityCardinality-06:
LamportFastMutEx-COL-5-ReachabilityCardinality-07:
LamportFastMutEx-COL-5-ReachabilityCardinality-08:
LamportFastMutEx-COL-5-ReachabilityCardinality-09:
LamportFastMutEx-COL-5-ReachabilityCardinality-10:
LamportFastMutEx-COL-5-ReachabilityCardinality-11:
LamportFastMutEx-COL-5-ReachabilityCardinality-12:
LamportFastMutEx-COL-5-ReachabilityCardinality-13:
LamportFastMutEx-COL-5-ReachabilityCardinality-14:
LamportFastMutEx-COL-5-ReachabilityCardinality-15:

PENDING FORMULAS: CATEGORY
LamportFastMutEx-COL-5-ReachabilityCardinality-01:

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA
208 EF FNDP 124/3598 0/5
209 EF STEQ 124/3598 0/5
212 EF EXCL 125/3599 14/32

Time elapsed: 126 secs. Pages in use: 14
# running tasks: 3 of 4 Visible: 16
FINISHED FORMULA: CATEGORY
LamportFastMutEx-COL-5-ReachabilityCardinality-00:
LamportFastMutEx-COL-5-ReachabilityCardinality-02:
LamportFastMutEx-COL-5-ReachabilityCardinality-03:
LamportFastMutEx-COL-5-ReachabilityCardinality-04:
LamportFastMutEx-COL-5-ReachabilityCardinality-05:
LamportFastMutEx-COL-5-ReachabilityCardinality-06:
LamportFastMutEx-COL-5-ReachabilityCardinality-07:
LamportFastMutEx-COL-5-ReachabilityCardinality-08:
LamportFastMutEx-COL-5-ReachabilityCardinality-09:
LamportFastMutEx-COL-5-ReachabilityCardinality-10:
LamportFastMutEx-COL-5-ReachabilityCardinality-11:
LamportFastMutEx-COL-5-ReachabilityCardinality-12:
LamportFastMutEx-COL-5-ReachabilityCardinality-13:
LamportFastMutEx-COL-5-ReachabilityCardinality-14:
LamportFastMutEx-COL-5-ReachabilityCardinality-15:

PENDING FORMULAS: CATEGORY
LamportFastMutEx-COL-5-ReachabilityCardinality-01:

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA
208 EF FNDP 129/3598 0/5
209 EF STEQ 129/3598 0/5
212 EF EXCL 130/3599 15/32

Time elapsed: 131 secs. Pages in use: 15
# running tasks: 3 of 4 Visible: 16
FINISHED FORMULA: CATEGORY
LamportFastMutEx-COL-5-ReachabilityCardinality-00:
LamportFastMutEx-COL-5-ReachabilityCardinality-02:
LamportFastMutEx-COL-5-ReachabilityCardinality-03:
LamportFastMutEx-COL-5-ReachabilityCardinality-04:
LamportFastMutEx-COL-5-ReachabilityCardinality-05:
LamportFastMutEx-COL-5-ReachabilityCardinality-06:
LamportFastMutEx-COL-5-ReachabilityCardinality-07:
LamportFastMutEx-COL-5-ReachabilityCardinality-08:
LamportFastMutEx-COL-5-ReachabilityCardinality-09:
LamportFastMutEx-COL-5-ReachabilityCardinality-10:
LamportFastMutEx-COL-5-ReachabilityCardinality-11:
LamportFastMutEx-COL-5-ReachabilityCardinality-12:
LamportFastMutEx-COL-5-ReachabilityCardinality-13:
LamportFastMutEx-COL-5-ReachabilityCardinality-14:
LamportFastMutEx-COL-5-ReachabilityCardinality-15:

PENDING FORMULAS: CATEGORY
LamportFastMutEx-COL-5-ReachabilityCardinality-01:

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA
208 EF FNDP 134/3598 0/5
209 EF STEQ 134/3598 0/5
212 EF EXCL 135/3599 16/32

Time elapsed: 136 secs. Pages in use: 16
# running tasks: 3 of 4 Visible: 16
FINISHED FORMULA: CATEGORY
LamportFastMutEx-COL-5-ReachabilityCardinality-00:
LamportFastMutEx-COL-5-ReachabilityCardinality-02:
LamportFastMutEx-COL-5-ReachabilityCardinality-03:
LamportFastMutEx-COL-5-ReachabilityCardinality-04:
LamportFastMutEx-COL-5-ReachabilityCardinality-05:
LamportFastMutEx-COL-5-ReachabilityCardinality-06:
LamportFastMutEx-COL-5-ReachabilityCardinality-07:
LamportFastMutEx-COL-5-ReachabilityCardinality-08:
LamportFastMutEx-COL-5-ReachabilityCardinality-09:
LamportFastMutEx-COL-5-ReachabilityCardinality-10:
LamportFastMutEx-COL-5-ReachabilityCardinality-11:
LamportFastMutEx-COL-5-ReachabilityCardinality-12:
LamportFastMutEx-COL-5-ReachabilityCardinality-13:
LamportFastMutEx-COL-5-ReachabilityCardinality-14:
LamportFastMutEx-COL-5-ReachabilityCardinality-15:

PENDING FORMULAS: CATEGORY
LamportFastMutEx-COL-5-ReachabilityCardinality-01:

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA
208 EF FNDP 139/3598 0/5
209 EF STEQ 139/3598 0/5
212 EF EXCL 140/3599 16/32

Time elapsed: 141 secs. Pages in use: 16
# running tasks: 3 of 4 Visible: 16
FINISHED FORMULA: CATEGORY
LamportFastMutEx-COL-5-ReachabilityCardinality-00:
LamportFastMutEx-COL-5-ReachabilityCardinality-02:
LamportFastMutEx-COL-5-ReachabilityCardinality-03:
LamportFastMutEx-COL-5-ReachabilityCardinality-04:
LamportFastMutEx-COL-5-ReachabilityCardinality-05:
LamportFastMutEx-COL-5-ReachabilityCardinality-06:
LamportFastMutEx-COL-5-ReachabilityCardinality-07:
LamportFastMutEx-COL-5-ReachabilityCardinality-08:
LamportFastMutEx-COL-5-ReachabilityCardinality-09:
LamportFastMutEx-COL-5-ReachabilityCardinality-10:
LamportFastMutEx-COL-5-ReachabilityCardinality-11:
LamportFastMutEx-COL-5-ReachabilityCardinality-12:
LamportFastMutEx-COL-5-ReachabilityCardinality-13:
LamportFastMutEx-COL-5-ReachabilityCardinality-14:
LamportFastMutEx-COL-5-ReachabilityCardinality-15:

PENDING FORMULAS: CATEGORY
LamportFastMutEx-COL-5-ReachabilityCardinality-01:

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA
208 EF FNDP 144/3598 0/5
209 EF STEQ 144/3598 0/5
212 EF EXCL 145/3599 17/32

Time elapsed: 146 secs. Pages in use: 17
# running tasks: 3 of 4 Visible: 16
FINISHED FORMULA: CATEGORY
LamportFastMutEx-COL-5-ReachabilityCardinality-00:
LamportFastMutEx-COL-5-ReachabilityCardinality-02:
LamportFastMutEx-COL-5-ReachabilityCardinality-03:
LamportFastMutEx-COL-5-ReachabilityCardinality-04:
LamportFastMutEx-COL-5-ReachabilityCardinality-05:
LamportFastMutEx-COL-5-ReachabilityCardinality-06:
LamportFastMutEx-COL-5-ReachabilityCardinality-07:
LamportFastMutEx-COL-5-ReachabilityCardinality-08:
LamportFastMutEx-COL-5-ReachabilityCardinality-09:
LamportFastMutEx-COL-5-ReachabilityCardinality-10:
LamportFastMutEx-COL-5-ReachabilityCardinality-11:
LamportFastMutEx-COL-5-ReachabilityCardinality-12:
LamportFastMutEx-COL-5-ReachabilityCardinality-13:
LamportFastMutEx-COL-5-ReachabilityCardinality-14:
LamportFastMutEx-COL-5-ReachabilityCardinality-15:

PENDING FORMULAS: CATEGORY
LamportFastMutEx-COL-5-ReachabilityCardinality-01:

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA
208 EF FNDP 149/3598 0/5
209 EF STEQ 149/3598 0/5
212 EF EXCL 150/3599 17/32

Time elapsed: 151 secs. Pages in use: 17
# running tasks: 3 of 4 Visible: 16
FINISHED FORMULA: CATEGORY
LamportFastMutEx-COL-5-ReachabilityCardinality-00:
LamportFastMutEx-COL-5-ReachabilityCardinality-02:
LamportFastMutEx-COL-5-ReachabilityCardinality-03:
LamportFastMutEx-COL-5-ReachabilityCardinality-04:
LamportFastMutEx-COL-5-ReachabilityCardinality-05:
LamportFastMutEx-COL-5-ReachabilityCardinality-06:
LamportFastMutEx-COL-5-ReachabilityCardinality-07:
LamportFastMutEx-COL-5-ReachabilityCardinality-08:
LamportFastMutEx-COL-5-ReachabilityCardinality-09:
LamportFastMutEx-COL-5-ReachabilityCardinality-10:
LamportFastMutEx-COL-5-ReachabilityCardinality-11:
LamportFastMutEx-COL-5-ReachabilityCardinality-12:
LamportFastMutEx-COL-5-ReachabilityCardinality-13:
LamportFastMutEx-COL-5-ReachabilityCardinality-14:
LamportFastMutEx-COL-5-ReachabilityCardinality-15:

PENDING FORMULAS: CATEGORY
LamportFastMutEx-COL-5-ReachabilityCardinality-01:

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA
208 EF FNDP 154/3598 0/5
209 EF STEQ 154/3598 0/5
212 EF EXCL 155/3599 18/32

Time elapsed: 156 secs. Pages in use: 18
# running tasks: 3 of 4 Visible: 16
FINISHED FORMULA: CATEGORY
LamportFastMutEx-COL-5-ReachabilityCardinality-00:
LamportFastMutEx-COL-5-ReachabilityCardinality-02:
LamportFastMutEx-COL-5-ReachabilityCardinality-03:
LamportFastMutEx-COL-5-ReachabilityCardinality-04:
LamportFastMutEx-COL-5-ReachabilityCardinality-05:
LamportFastMutEx-COL-5-ReachabilityCardinality-06:
LamportFastMutEx-COL-5-ReachabilityCardinality-07:
LamportFastMutEx-COL-5-ReachabilityCardinality-08:
LamportFastMutEx-COL-5-ReachabilityCardinality-09:
LamportFastMutEx-COL-5-ReachabilityCardinality-10:
LamportFastMutEx-COL-5-ReachabilityCardinality-11:
LamportFastMutEx-COL-5-ReachabilityCardinality-12:
LamportFastMutEx-COL-5-ReachabilityCardinality-13:
LamportFastMutEx-COL-5-ReachabilityCardinality-14:
LamportFastMutEx-COL-5-ReachabilityCardinality-15:

PENDING FORMULAS: CATEGORY
LamportFastMutEx-COL-5-ReachabilityCardinality-01:

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA
208 EF FNDP 159/3598 0/5
209 EF STEQ 159/3598 0/5
212 EF EXCL 160/3599 19/32

Time elapsed: 161 secs. Pages in use: 19
# running tasks: 3 of 4 Visible: 16
FINISHED FORMULA: CATEGORY
LamportFastMutEx-COL-5-ReachabilityCardinality-00:
LamportFastMutEx-COL-5-ReachabilityCardinality-02:
LamportFastMutEx-COL-5-ReachabilityCardinality-03:
LamportFastMutEx-COL-5-ReachabilityCardinality-04:
LamportFastMutEx-COL-5-ReachabilityCardinality-05:
LamportFastMutEx-COL-5-ReachabilityCardinality-06:
LamportFastMutEx-COL-5-ReachabilityCardinality-07:
LamportFastMutEx-COL-5-ReachabilityCardinality-08:
LamportFastMutEx-COL-5-ReachabilityCardinality-09:
LamportFastMutEx-COL-5-ReachabilityCardinality-10:
LamportFastMutEx-COL-5-ReachabilityCardinality-11:
LamportFastMutEx-COL-5-ReachabilityCardinality-12:
LamportFastMutEx-COL-5-ReachabilityCardinality-13:
LamportFastMutEx-COL-5-ReachabilityCardinality-14:
LamportFastMutEx-COL-5-ReachabilityCardinality-15:

PENDING FORMULAS: CATEGORY
LamportFastMutEx-COL-5-ReachabilityCardinality-01:

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA
208 EF FNDP 164/3598 0/5
209 EF STEQ 164/3598 0/5
212 EF EXCL 165/3599 19/32

Time elapsed: 166 secs. Pages in use: 19
# running tasks: 3 of 4 Visible: 16
FINISHED FORMULA: CATEGORY
LamportFastMutEx-COL-5-ReachabilityCardinality-00:
LamportFastMutEx-COL-5-ReachabilityCardinality-02:
LamportFastMutEx-COL-5-ReachabilityCardinality-03:
LamportFastMutEx-COL-5-ReachabilityCardinality-04:
LamportFastMutEx-COL-5-ReachabilityCardinality-05:
LamportFastMutEx-COL-5-ReachabilityCardinality-06:
LamportFastMutEx-COL-5-ReachabilityCardinality-07:
LamportFastMutEx-COL-5-ReachabilityCardinality-08:
LamportFastMutEx-COL-5-ReachabilityCardinality-09:
LamportFastMutEx-COL-5-ReachabilityCardinality-10:
LamportFastMutEx-COL-5-ReachabilityCardinality-11:
LamportFastMutEx-COL-5-ReachabilityCardinality-12:
LamportFastMutEx-COL-5-ReachabilityCardinality-13:
LamportFastMutEx-COL-5-ReachabilityCardinality-14:
LamportFastMutEx-COL-5-ReachabilityCardinality-15:

PENDING FORMULAS: CATEGORY
LamportFastMutEx-COL-5-ReachabilityCardinality-01:

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA
208 EF FNDP 169/3598 0/5
209 EF STEQ 169/3598 0/5
212 EF EXCL 170/3599 20/32

Time elapsed: 171 secs. Pages in use: 20
# running tasks: 3 of 4 Visible: 16
FINISHED FORMULA: CATEGORY
LamportFastMutEx-COL-5-ReachabilityCardinality-00:
LamportFastMutEx-COL-5-ReachabilityCardinality-02:
LamportFastMutEx-COL-5-ReachabilityCardinality-03:
LamportFastMutEx-COL-5-ReachabilityCardinality-04:
LamportFastMutEx-COL-5-ReachabilityCardinality-05:
LamportFastMutEx-COL-5-ReachabilityCardinality-06:
LamportFastMutEx-COL-5-ReachabilityCardinality-07:
LamportFastMutEx-COL-5-ReachabilityCardinality-08:
LamportFastMutEx-COL-5-ReachabilityCardinality-09:
LamportFastMutEx-COL-5-ReachabilityCardinality-10:
LamportFastMutEx-COL-5-ReachabilityCardinality-11:
LamportFastMutEx-COL-5-ReachabilityCardinality-12:
LamportFastMutEx-COL-5-ReachabilityCardinality-13:
LamportFastMutEx-COL-5-ReachabilityCardinality-14:
LamportFastMutEx-COL-5-ReachabilityCardinality-15:

PENDING FORMULAS: CATEGORY
LamportFastMutEx-COL-5-ReachabilityCardinality-01:

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA
208 EF FNDP 174/3598 0/5
209 EF STEQ 174/3598 0/5
212 EF EXCL 175/3599 20/32

Time elapsed: 176 secs. Pages in use: 20
# running tasks: 3 of 4 Visible: 16
FINISHED FORMULA: CATEGORY
LamportFastMutEx-COL-5-ReachabilityCardinality-00:
LamportFastMutEx-COL-5-ReachabilityCardinality-02:
LamportFastMutEx-COL-5-ReachabilityCardinality-03:
LamportFastMutEx-COL-5-ReachabilityCardinality-04:
LamportFastMutEx-COL-5-ReachabilityCardinality-05:
LamportFastMutEx-COL-5-ReachabilityCardinality-06:
LamportFastMutEx-COL-5-ReachabilityCardinality-07:
LamportFastMutEx-COL-5-ReachabilityCardinality-08:
LamportFastMutEx-COL-5-ReachabilityCardinality-09:
LamportFastMutEx-COL-5-ReachabilityCardinality-10:
LamportFastMutEx-COL-5-ReachabilityCardinality-11:
LamportFastMutEx-COL-5-ReachabilityCardinality-12:
LamportFastMutEx-COL-5-ReachabilityCardinality-13:
LamportFastMutEx-COL-5-ReachabilityCardinality-14:
LamportFastMutEx-COL-5-ReachabilityCardinality-15:

PENDING FORMULAS: CATEGORY
LamportFastMutEx-COL-5-ReachabilityCardinality-01:

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA
208 EF FNDP 179/3598 0/5
209 EF STEQ 179/3598 0/5
212 EF EXCL 180/3599 21/32

Time elapsed: 181 secs. Pages in use: 21
# running tasks: 3 of 4 Visible: 16
FINISHED FORMULA: CATEGORY
LamportFastMutEx-COL-5-ReachabilityCardinality-00:
LamportFastMutEx-COL-5-ReachabilityCardinality-02:
LamportFastMutEx-COL-5-ReachabilityCardinality-03:
LamportFastMutEx-COL-5-ReachabilityCardinality-04:
LamportFastMutEx-COL-5-ReachabilityCardinality-05:
LamportFastMutEx-COL-5-ReachabilityCardinality-06:
LamportFastMutEx-COL-5-ReachabilityCardinality-07:
LamportFastMutEx-COL-5-ReachabilityCardinality-08:
LamportFastMutEx-COL-5-ReachabilityCardinality-09:
LamportFastMutEx-COL-5-ReachabilityCardinality-10:
LamportFastMutEx-COL-5-ReachabilityCardinality-11:
LamportFastMutEx-COL-5-ReachabilityCardinality-12:
LamportFastMutEx-COL-5-ReachabilityCardinality-13:
LamportFastMutEx-COL-5-ReachabilityCardinality-14:
LamportFastMutEx-COL-5-ReachabilityCardinality-15:

PENDING FORMULAS: CATEGORY
LamportFastMutEx-COL-5-ReachabilityCardinality-01:

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA
208 EF FNDP 184/3598 0/5
209 EF STEQ 184/3598 0/5
212 EF EXCL 185/3599 22/32

Time elapsed: 186 secs. Pages in use: 22
# running tasks: 3 of 4 Visible: 16
FINISHED FORMULA: CATEGORY
LamportFastMutEx-COL-5-ReachabilityCardinality-00:
LamportFastMutEx-COL-5-ReachabilityCardinality-02:
LamportFastMutEx-COL-5-ReachabilityCardinality-03:
LamportFastMutEx-COL-5-ReachabilityCardinality-04:
LamportFastMutEx-COL-5-ReachabilityCardinality-05:
LamportFastMutEx-COL-5-ReachabilityCardinality-06:
LamportFastMutEx-COL-5-ReachabilityCardinality-07:
LamportFastMutEx-COL-5-ReachabilityCardinality-08:
LamportFastMutEx-COL-5-ReachabilityCardinality-09:
LamportFastMutEx-COL-5-ReachabilityCardinality-10:
LamportFastMutEx-COL-5-ReachabilityCardinality-11:
LamportFastMutEx-COL-5-ReachabilityCardinality-12:
LamportFastMutEx-COL-5-ReachabilityCardinality-13:
LamportFastMutEx-COL-5-ReachabilityCardinality-14:
LamportFastMutEx-COL-5-ReachabilityCardinality-15:

PENDING FORMULAS: CATEGORY
LamportFastMutEx-COL-5-ReachabilityCardinality-01:

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA
208 EF FNDP 189/3598 0/5
209 EF STEQ 189/3598 0/5
212 EF EXCL 190/3599 22/32

Time elapsed: 191 secs. Pages in use: 22
# running tasks: 3 of 4 Visible: 16
FINISHED FORMULA: CATEGORY
LamportFastMutEx-COL-5-ReachabilityCardinality-00:
LamportFastMutEx-COL-5-ReachabilityCardinality-02:
LamportFastMutEx-COL-5-ReachabilityCardinality-03:
LamportFastMutEx-COL-5-ReachabilityCardinality-04:
LamportFastMutEx-COL-5-ReachabilityCardinality-05:
LamportFastMutEx-COL-5-ReachabilityCardinality-06:
LamportFastMutEx-COL-5-ReachabilityCardinality-07:
LamportFastMutEx-COL-5-ReachabilityCardinality-08:
LamportFastMutEx-COL-5-ReachabilityCardinality-09:
LamportFastMutEx-COL-5-ReachabilityCardinality-10:
LamportFastMutEx-COL-5-ReachabilityCardinality-11:
LamportFastMutEx-COL-5-ReachabilityCardinality-12:
LamportFastMutEx-COL-5-ReachabilityCardinality-13:
LamportFastMutEx-COL-5-ReachabilityCardinality-14:
LamportFastMutEx-COL-5-ReachabilityCardinality-15:

PENDING FORMULAS: CATEGORY
LamportFastMutEx-COL-5-ReachabilityCardinality-01:

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA
208 EF FNDP 194/3598 0/5
209 EF STEQ 194/3598 0/5
212 EF EXCL 195/3599 23/32

Time elapsed: 196 secs. Pages in use: 23
# running tasks: 3 of 4 Visible: 16
FINISHED FORMULA: CATEGORY
LamportFastMutEx-COL-5-ReachabilityCardinality-00:
LamportFastMutEx-COL-5-ReachabilityCardinality-02:
LamportFastMutEx-COL-5-ReachabilityCardinality-03:
LamportFastMutEx-COL-5-ReachabilityCardinality-04:
LamportFastMutEx-COL-5-ReachabilityCardinality-05:
LamportFastMutEx-COL-5-ReachabilityCardinality-06:
LamportFastMutEx-COL-5-ReachabilityCardinality-07:
LamportFastMutEx-COL-5-ReachabilityCardinality-08:
LamportFastMutEx-COL-5-ReachabilityCardinality-09:
LamportFastMutEx-COL-5-ReachabilityCardinality-10:
LamportFastMutEx-COL-5-ReachabilityCardinality-11:
LamportFastMutEx-COL-5-ReachabilityCardinality-12:
LamportFastMutEx-COL-5-ReachabilityCardinality-13:
LamportFastMutEx-COL-5-ReachabilityCardinality-14:
LamportFastMutEx-COL-5-ReachabilityCardinality-15:

PENDING FORMULAS: CATEGORY
LamportFastMutEx-COL-5-ReachabilityCardinality-01:

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA
208 EF FNDP 199/3598 0/5
209 EF STEQ 199/3598 0/5
212 EF EXCL 200/3599 23/32

Time elapsed: 201 secs. Pages in use: 23
# running tasks: 3 of 4 Visible: 16
FINISHED FORMULA: CATEGORY
LamportFastMutEx-COL-5-ReachabilityCardinality-00:
LamportFastMutEx-COL-5-ReachabilityCardinality-02:
LamportFastMutEx-COL-5-ReachabilityCardinality-03:
LamportFastMutEx-COL-5-ReachabilityCardinality-04:
LamportFastMutEx-COL-5-ReachabilityCardinality-05:
LamportFastMutEx-COL-5-ReachabilityCardinality-06:
LamportFastMutEx-COL-5-ReachabilityCardinality-07:
LamportFastMutEx-COL-5-ReachabilityCardinality-08:
LamportFastMutEx-COL-5-ReachabilityCardinality-09:
LamportFastMutEx-COL-5-ReachabilityCardinality-10:
LamportFastMutEx-COL-5-ReachabilityCardinality-11:
LamportFastMutEx-COL-5-ReachabilityCardinality-12:
LamportFastMutEx-COL-5-ReachabilityCardinality-13:
LamportFastMutEx-COL-5-ReachabilityCardinality-14:
LamportFastMutEx-COL-5-ReachabilityCardinality-15:

PENDING FORMULAS: CATEGORY
LamportFastMutEx-COL-5-ReachabilityCardinality-01:

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA
208 EF FNDP 204/3598 0/5
209 EF STEQ 204/3598 0/5
212 EF EXCL 205/3599 24/32

Time elapsed: 206 secs. Pages in use: 24
# running tasks: 3 of 4 Visible: 16
FINISHED FORMULA: CATEGORY
LamportFastMutEx-COL-5-ReachabilityCardinality-00:
LamportFastMutEx-COL-5-ReachabilityCardinality-02:
LamportFastMutEx-COL-5-ReachabilityCardinality-03:
LamportFastMutEx-COL-5-ReachabilityCardinality-04:
LamportFastMutEx-COL-5-ReachabilityCardinality-05:
LamportFastMutEx-COL-5-ReachabilityCardinality-06:
LamportFastMutEx-COL-5-ReachabilityCardinality-07:
LamportFastMutEx-COL-5-ReachabilityCardinality-08:
LamportFastMutEx-COL-5-ReachabilityCardinality-09:
LamportFastMutEx-COL-5-ReachabilityCardinality-10:
LamportFastMutEx-COL-5-ReachabilityCardinality-11:
LamportFastMutEx-COL-5-ReachabilityCardinality-12:
LamportFastMutEx-COL-5-ReachabilityCardinality-13:
LamportFastMutEx-COL-5-ReachabilityCardinality-14:
LamportFastMutEx-COL-5-ReachabilityCardinality-15:

PENDING FORMULAS: CATEGORY
LamportFastMutEx-COL-5-ReachabilityCardinality-01:

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA
208 EF FNDP 209/3598 0/5
209 EF STEQ 209/3598 0/5
212 EF EXCL 210/3599 24/32

Time elapsed: 211 secs. Pages in use: 24
# running tasks: 3 of 4 Visible: 16
FINISHED FORMULA: CATEGORY
LamportFastMutEx-COL-5-ReachabilityCardinality-00:
LamportFastMutEx-COL-5-ReachabilityCardinality-02:
LamportFastMutEx-COL-5-ReachabilityCardinality-03:
LamportFastMutEx-COL-5-ReachabilityCardinality-04:
LamportFastMutEx-COL-5-ReachabilityCardinality-05:
LamportFastMutEx-COL-5-ReachabilityCardinality-06:
LamportFastMutEx-COL-5-ReachabilityCardinality-07:
LamportFastMutEx-COL-5-ReachabilityCardinality-08:
LamportFastMutEx-COL-5-ReachabilityCardinality-09:
LamportFastMutEx-COL-5-ReachabilityCardinality-10:
LamportFastMutEx-COL-5-ReachabilityCardinality-11:
LamportFastMutEx-COL-5-ReachabilityCardinality-12:
LamportFastMutEx-COL-5-ReachabilityCardinality-13:
LamportFastMutEx-COL-5-ReachabilityCardinality-14:
LamportFastMutEx-COL-5-ReachabilityCardinality-15:

PENDING FORMULAS: CATEGORY
LamportFastMutEx-COL-5-ReachabilityCardinality-01:

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA
208 EF FNDP 214/3598 0/5
209 EF STEQ 214/3598 0/5
212 EF EXCL 215/3599 25/32

Time elapsed: 216 secs. Pages in use: 25
# running tasks: 3 of 4 Visible: 16
FINISHED FORMULA: CATEGORY
LamportFastMutEx-COL-5-ReachabilityCardinality-00:
LamportFastMutEx-COL-5-ReachabilityCardinality-02:
LamportFastMutEx-COL-5-ReachabilityCardinality-03:
LamportFastMutEx-COL-5-ReachabilityCardinality-04:
LamportFastMutEx-COL-5-ReachabilityCardinality-05:
LamportFastMutEx-COL-5-ReachabilityCardinality-06:
LamportFastMutEx-COL-5-ReachabilityCardinality-07:
LamportFastMutEx-COL-5-ReachabilityCardinality-08:
LamportFastMutEx-COL-5-ReachabilityCardinality-09:
LamportFastMutEx-COL-5-ReachabilityCardinality-10:
LamportFastMutEx-COL-5-ReachabilityCardinality-11:
LamportFastMutEx-COL-5-ReachabilityCardinality-12:
LamportFastMutEx-COL-5-ReachabilityCardinality-13:
LamportFastMutEx-COL-5-ReachabilityCardinality-14:
LamportFastMutEx-COL-5-ReachabilityCardinality-15:

PENDING FORMULAS: CATEGORY
LamportFastMutEx-COL-5-ReachabilityCardinality-01:

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA
208 EF FNDP 219/3598 0/5
209 EF STEQ 219/3598 0/5
212 EF EXCL 220/3599 26/32

Time elapsed: 221 secs. Pages in use: 26
# running tasks: 3 of 4 Visible: 16
FINISHED FORMULA: CATEGORY
LamportFastMutEx-COL-5-ReachabilityCardinality-00:
LamportFastMutEx-COL-5-ReachabilityCardinality-02:
LamportFastMutEx-COL-5-ReachabilityCardinality-03:
LamportFastMutEx-COL-5-ReachabilityCardinality-04:
LamportFastMutEx-COL-5-ReachabilityCardinality-05:
LamportFastMutEx-COL-5-ReachabilityCardinality-06:
LamportFastMutEx-COL-5-ReachabilityCardinality-07:
LamportFastMutEx-COL-5-ReachabilityCardinality-08:
LamportFastMutEx-COL-5-ReachabilityCardinality-09:
LamportFastMutEx-COL-5-ReachabilityCardinality-10:
LamportFastMutEx-COL-5-ReachabilityCardinality-11:
LamportFastMutEx-COL-5-ReachabilityCardinality-12:
LamportFastMutEx-COL-5-ReachabilityCardinality-13:
LamportFastMutEx-COL-5-ReachabilityCardinality-14:
LamportFastMutEx-COL-5-ReachabilityCardinality-15:

PENDING FORMULAS: CATEGORY
LamportFastMutEx-COL-5-ReachabilityCardinality-01:

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA
208 EF FNDP 224/3598 0/5
209 EF STEQ 224/3598 0/5
212 EF EXCL 225/3599 26/32

Time elapsed: 226 secs. Pages in use: 26
# running tasks: 3 of 4 Visible: 16
FINISHED FORMULA: CATEGORY
LamportFastMutEx-COL-5-ReachabilityCardinality-00:
LamportFastMutEx-COL-5-ReachabilityCardinality-02:
LamportFastMutEx-COL-5-ReachabilityCardinality-03:
LamportFastMutEx-COL-5-ReachabilityCardinality-04:
LamportFastMutEx-COL-5-ReachabilityCardinality-05:
LamportFastMutEx-COL-5-ReachabilityCardinality-06:
LamportFastMutEx-COL-5-ReachabilityCardinality-07:
LamportFastMutEx-COL-5-ReachabilityCardinality-08:
LamportFastMutEx-COL-5-ReachabilityCardinality-09:
LamportFastMutEx-COL-5-ReachabilityCardinality-10:
LamportFastMutEx-COL-5-ReachabilityCardinality-11:
LamportFastMutEx-COL-5-ReachabilityCardinality-12:
LamportFastMutEx-COL-5-ReachabilityCardinality-13:
LamportFastMutEx-COL-5-ReachabilityCardinality-14:
LamportFastMutEx-COL-5-ReachabilityCardinality-15:

PENDING FORMULAS: CATEGORY
LamportFastMutEx-COL-5-ReachabilityCardinality-01:

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA
208 EF FNDP 229/3598 0/5
209 EF STEQ 229/3598 0/5
212 EF EXCL 230/3599 27/32

Time elapsed: 231 secs. Pages in use: 27
# running tasks: 3 of 4 Visible: 16
FINISHED FORMULA: CATEGORY
LamportFastMutEx-COL-5-ReachabilityCardinality-00:
LamportFastMutEx-COL-5-ReachabilityCardinality-02:
LamportFastMutEx-COL-5-ReachabilityCardinality-03:
LamportFastMutEx-COL-5-ReachabilityCardinality-04:
LamportFastMutEx-COL-5-ReachabilityCardinality-05:
LamportFastMutEx-COL-5-ReachabilityCardinality-06:
LamportFastMutEx-COL-5-ReachabilityCardinality-07:
LamportFastMutEx-COL-5-ReachabilityCardinality-08:
LamportFastMutEx-COL-5-ReachabilityCardinality-09:
LamportFastMutEx-COL-5-ReachabilityCardinality-10:
LamportFastMutEx-COL-5-ReachabilityCardinality-11:
LamportFastMutEx-COL-5-ReachabilityCardinality-12:
LamportFastMutEx-COL-5-ReachabilityCardinality-13:
LamportFastMutEx-COL-5-ReachabilityCardinality-14:
LamportFastMutEx-COL-5-ReachabilityCardinality-15:

PENDING FORMULAS: CATEGORY
LamportFastMutEx-COL-5-ReachabilityCardinality-01:

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA
208 EF FNDP 234/3598 0/5
209 EF STEQ 234/3598 0/5
212 EF EXCL 235/3599 27/32

Time elapsed: 236 secs. Pages in use: 27
# running tasks: 3 of 4 Visible: 16
FINISHED FORMULA: CATEGORY
LamportFastMutEx-COL-5-ReachabilityCardinality-00:
LamportFastMutEx-COL-5-ReachabilityCardinality-02:
LamportFastMutEx-COL-5-ReachabilityCardinality-03:
LamportFastMutEx-COL-5-ReachabilityCardinality-04:
LamportFastMutEx-COL-5-ReachabilityCardinality-05:
LamportFastMutEx-COL-5-ReachabilityCardinality-06:
LamportFastMutEx-COL-5-ReachabilityCardinality-07:
LamportFastMutEx-COL-5-ReachabilityCardinality-08:
LamportFastMutEx-COL-5-ReachabilityCardinality-09:
LamportFastMutEx-COL-5-ReachabilityCardinality-10:
LamportFastMutEx-COL-5-ReachabilityCardinality-11:
LamportFastMutEx-COL-5-ReachabilityCardinality-12:
LamportFastMutEx-COL-5-ReachabilityCardinality-13:
LamportFastMutEx-COL-5-ReachabilityCardinality-14:
LamportFastMutEx-COL-5-ReachabilityCardinality-15:

PENDING FORMULAS: CATEGORY
LamportFastMutEx-COL-5-ReachabilityCardinality-01:

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA
208 EF FNDP 239/3598 0/5
209 EF STEQ 239/3598 0/5
212 EF EXCL 240/3599 28/32

Time elapsed: 241 secs. Pages in use: 28
# running tasks: 3 of 4 Visible: 16
FINISHED FORMULA: CATEGORY
LamportFastMutEx-COL-5-ReachabilityCardinality-00:
LamportFastMutEx-COL-5-ReachabilityCardinality-02:
LamportFastMutEx-COL-5-ReachabilityCardinality-03:
LamportFastMutEx-COL-5-ReachabilityCardinality-04:
LamportFastMutEx-COL-5-ReachabilityCardinality-05:
LamportFastMutEx-COL-5-ReachabilityCardinality-06:
LamportFastMutEx-COL-5-ReachabilityCardinality-07:
LamportFastMutEx-COL-5-ReachabilityCardinality-08:
LamportFastMutEx-COL-5-ReachabilityCardinality-09:
LamportFastMutEx-COL-5-ReachabilityCardinality-10:
LamportFastMutEx-COL-5-ReachabilityCardinality-11:
LamportFastMutEx-COL-5-ReachabilityCardinality-12:
LamportFastMutEx-COL-5-ReachabilityCardinality-13:
LamportFastMutEx-COL-5-ReachabilityCardinality-14:
LamportFastMutEx-COL-5-ReachabilityCardinality-15:

PENDING FORMULAS: CATEGORY
LamportFastMutEx-COL-5-ReachabilityCardinality-01:

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA
208 EF FNDP 244/3598 0/5
209 EF STEQ 244/3598 0/5
212 EF EXCL 245/3599 29/32

Time elapsed: 246 secs. Pages in use: 29
# running tasks: 3 of 4 Visible: 16
FINISHED FORMULA: CATEGORY
LamportFastMutEx-COL-5-ReachabilityCardinality-00:
LamportFastMutEx-COL-5-ReachabilityCardinality-02:
LamportFastMutEx-COL-5-ReachabilityCardinality-03:
LamportFastMutEx-COL-5-ReachabilityCardinality-04:
LamportFastMutEx-COL-5-ReachabilityCardinality-05:
LamportFastMutEx-COL-5-ReachabilityCardinality-06:
LamportFastMutEx-COL-5-ReachabilityCardinality-07:
LamportFastMutEx-COL-5-ReachabilityCardinality-08:
LamportFastMutEx-COL-5-ReachabilityCardinality-09:
LamportFastMutEx-COL-5-ReachabilityCardinality-10:
LamportFastMutEx-COL-5-ReachabilityCardinality-11:
LamportFastMutEx-COL-5-ReachabilityCardinality-12:
LamportFastMutEx-COL-5-ReachabilityCardinality-13:
LamportFastMutEx-COL-5-ReachabilityCardinality-14:
LamportFastMutEx-COL-5-ReachabilityCardinality-15:

PENDING FORMULAS: CATEGORY
LamportFastMutEx-COL-5-ReachabilityCardinality-01:

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA
208 EF FNDP 249/3598 0/5
209 EF STEQ 249/3598 0/5
212 EF EXCL 250/3599 29/32

Time elapsed: 251 secs. Pages in use: 29
# running tasks: 3 of 4 Visible: 16
FINISHED FORMULA: CATEGORY
LamportFastMutEx-COL-5-ReachabilityCardinality-00:
LamportFastMutEx-COL-5-ReachabilityCardinality-02:
LamportFastMutEx-COL-5-ReachabilityCardinality-03:
LamportFastMutEx-COL-5-ReachabilityCardinality-04:
LamportFastMutEx-COL-5-ReachabilityCardinality-05:
LamportFastMutEx-COL-5-ReachabilityCardinality-06:
LamportFastMutEx-COL-5-ReachabilityCardinality-07:
LamportFastMutEx-COL-5-ReachabilityCardinality-08:
LamportFastMutEx-COL-5-ReachabilityCardinality-09:
LamportFastMutEx-COL-5-ReachabilityCardinality-10:
LamportFastMutEx-COL-5-ReachabilityCardinality-11:
LamportFastMutEx-COL-5-ReachabilityCardinality-12:
LamportFastMutEx-COL-5-ReachabilityCardinality-13:
LamportFastMutEx-COL-5-ReachabilityCardinality-14:
LamportFastMutEx-COL-5-ReachabilityCardinality-15:

PENDING FORMULAS: CATEGORY
LamportFastMutEx-COL-5-ReachabilityCardinality-01:

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA
208 EF FNDP 254/3598 0/5
209 EF STEQ 254/3598 0/5
212 EF EXCL 255/3599 30/32

Time elapsed: 256 secs. Pages in use: 30
# running tasks: 3 of 4 Visible: 16
FINISHED FORMULA: CATEGORY
LamportFastMutEx-COL-5-ReachabilityCardinality-00:
LamportFastMutEx-COL-5-ReachabilityCardinality-02:
LamportFastMutEx-COL-5-ReachabilityCardinality-03:
LamportFastMutEx-COL-5-ReachabilityCardinality-04:
LamportFastMutEx-COL-5-ReachabilityCardinality-05:
LamportFastMutEx-COL-5-ReachabilityCardinality-06:
LamportFastMutEx-COL-5-ReachabilityCardinality-07:
LamportFastMutEx-COL-5-ReachabilityCardinality-08:
LamportFastMutEx-COL-5-ReachabilityCardinality-09:
LamportFastMutEx-COL-5-ReachabilityCardinality-10:
LamportFastMutEx-COL-5-ReachabilityCardinality-11:
LamportFastMutEx-COL-5-ReachabilityCardinality-12:
LamportFastMutEx-COL-5-ReachabilityCardinality-13:
LamportFastMutEx-COL-5-ReachabilityCardinality-14:
LamportFastMutEx-COL-5-ReachabilityCardinality-15:

PENDING FORMULAS: CATEGORY
LamportFastMutEx-COL-5-ReachabilityCardinality-01:

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA
208 EF FNDP 259/3598 0/5
209 EF STEQ 259/3598 0/5
212 EF EXCL 260/3599 30/32

Time elapsed: 261 secs. Pages in use: 30
# running tasks: 3 of 4 Visible: 16
FINISHED FORMULA: CATEGORY
LamportFastMutEx-COL-5-ReachabilityCardinality-00:
LamportFastMutEx-COL-5-ReachabilityCardinality-02:
LamportFastMutEx-COL-5-ReachabilityCardinality-03:
LamportFastMutEx-COL-5-ReachabilityCardinality-04:
LamportFastMutEx-COL-5-ReachabilityCardinality-05:
LamportFastMutEx-COL-5-ReachabilityCardinality-06:
LamportFastMutEx-COL-5-ReachabilityCardinality-07:
LamportFastMutEx-COL-5-ReachabilityCardinality-08:
LamportFastMutEx-COL-5-ReachabilityCardinality-09:
LamportFastMutEx-COL-5-ReachabilityCardinality-10:
LamportFastMutEx-COL-5-ReachabilityCardinality-11:
LamportFastMutEx-COL-5-ReachabilityCardinality-12:
LamportFastMutEx-COL-5-ReachabilityCardinality-13:
LamportFastMutEx-COL-5-ReachabilityCardinality-14:
LamportFastMutEx-COL-5-ReachabilityCardinality-15:

PENDING FORMULAS: CATEGORY
LamportFastMutEx-COL-5-ReachabilityCardinality-01:

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA
208 EF FNDP 264/3598 0/5
209 EF STEQ 264/3598 0/5
212 EF EXCL 265/3599 31/32

Time elapsed: 266 secs. Pages in use: 31
# running tasks: 3 of 4 Visible: 16
FINISHED FORMULA: CATEGORY
LamportFastMutEx-COL-5-ReachabilityCardinality-00:
LamportFastMutEx-COL-5-ReachabilityCardinality-02:
LamportFastMutEx-COL-5-ReachabilityCardinality-03:
LamportFastMutEx-COL-5-ReachabilityCardinality-04:
LamportFastMutEx-COL-5-ReachabilityCardinality-05:
LamportFastMutEx-COL-5-ReachabilityCardinality-06:
LamportFastMutEx-COL-5-ReachabilityCardinality-07:
LamportFastMutEx-COL-5-ReachabilityCardinality-08:
LamportFastMutEx-COL-5-ReachabilityCardinality-09:
LamportFastMutEx-COL-5-ReachabilityCardinality-10:
LamportFastMutEx-COL-5-ReachabilityCardinality-11:
LamportFastMutEx-COL-5-ReachabilityCardinality-12:
LamportFastMutEx-COL-5-ReachabilityCardinality-13:
LamportFastMutEx-COL-5-ReachabilityCardinality-14:
LamportFastMutEx-COL-5-ReachabilityCardinality-15:

PENDING FORMULAS: CATEGORY
LamportFastMutEx-COL-5-ReachabilityCardinality-01:

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA
208 EF FNDP 269/3598 0/5
209 EF STEQ 269/3598 0/5
212 EF EXCL 270/3599 32/32

Time elapsed: 271 secs. Pages in use: 32
# running tasks: 3 of 4 Visible: 16
FINISHED FORMULA: CATEGORY
LamportFastMutEx-COL-5-ReachabilityCardinality-00:
LamportFastMutEx-COL-5-ReachabilityCardinality-02:
LamportFastMutEx-COL-5-ReachabilityCardinality-03:
LamportFastMutEx-COL-5-ReachabilityCardinality-04:
LamportFastMutEx-COL-5-ReachabilityCardinality-05:
LamportFastMutEx-COL-5-ReachabilityCardinality-06:
LamportFastMutEx-COL-5-ReachabilityCardinality-07:
LamportFastMutEx-COL-5-ReachabilityCardinality-08:
LamportFastMutEx-COL-5-ReachabilityCardinality-09:
LamportFastMutEx-COL-5-ReachabilityCardinality-10:
LamportFastMutEx-COL-5-ReachabilityCardinality-11:
LamportFastMutEx-COL-5-ReachabilityCardinality-12:
LamportFastMutEx-COL-5-ReachabilityCardinality-13:
LamportFastMutEx-COL-5-ReachabilityCardinality-14:
LamportFastMutEx-COL-5-ReachabilityCardinality-15:

PENDING FORMULAS: CATEGORY
LamportFastMutEx-COL-5-ReachabilityCardinality-01:

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA
208 EF FNDP 274/3598 0/5
209 EF STEQ 274/3598 0/5
212 EF EXCL 275/3599 32/32

Time elapsed: 276 secs. Pages in use: 32
# running tasks: 3 of 4 Visible: 16
lola: CANCELED task # 212 (type EXCL) for
FINISHED FORMULA: CATEGORY
LamportFastMutEx-COL-5-ReachabilityCardinality-00:
LamportFastMutEx-COL-5-ReachabilityCardinality-02:
LamportFastMutEx-COL-5-ReachabilityCardinality-03:
LamportFastMutEx-COL-5-ReachabilityCardinality-04:
LamportFastMutEx-COL-5-ReachabilityCardinality-05:
LamportFastMutEx-COL-5-ReachabilityCardinality-06:
LamportFastMutEx-COL-5-ReachabilityCardinality-07:
LamportFastMutEx-COL-5-ReachabilityCardinality-08:
LamportFastMutEx-COL-5-ReachabilityCardinality-09:
LamportFastMutEx-COL-5-ReachabilityCardinality-10:
LamportFastMutEx-COL-5-ReachabilityCardinality-11:
LamportFastMutEx-COL-5-ReachabilityCardinality-12:
LamportFastMutEx-COL-5-ReachabilityCardinality-13:
LamportFastMutEx-COL-5-ReachabilityCardinality-14:
LamportFastMutEx-COL-5-ReachabilityCardinality-15:

PENDING FORMULAS: CATEGORY
LamportFastMutEx-COL-5-ReachabilityCardinality-01:

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA
208 EF FNDP 279/3598 0/5
209 EF STEQ 279/3598 0/5

Time elapsed: 281 secs. Pages in use: 32
# running tasks: 3 of 4 Visible: 16
FINISHED FORMULA: CATEGORY
LamportFastMutEx-COL-5-ReachabilityCardinality-00:
LamportFastMutEx-COL-5-ReachabilityCardinality-02:
LamportFastMutEx-COL-5-ReachabilityCardinality-03:
LamportFastMutEx-COL-5-ReachabilityCardinality-04:
LamportFastMutEx-COL-5-ReachabilityCardinality-05:
LamportFastMutEx-COL-5-ReachabilityCardinality-06:
LamportFastMutEx-COL-5-ReachabilityCardinality-07:
LamportFastMutEx-COL-5-ReachabilityCardinality-08:
LamportFastMutEx-COL-5-ReachabilityCardinality-09:
LamportFastMutEx-COL-5-ReachabilityCardinality-10:
LamportFastMutEx-COL-5-ReachabilityCardinality-11:
LamportFastMutEx-COL-5-ReachabilityCardinality-12:
LamportFastMutEx-COL-5-ReachabilityCardinality-13:
LamportFastMutEx-COL-5-ReachabilityCardinality-14:
LamportFastMutEx-COL-5-ReachabilityCardinality-15:

PENDING FORMULAS: CATEGORY
LamportFastMutEx-COL-5-ReachabilityCardinality-01:

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA
208 EF FNDP 284/3598 0/5
209 EF STEQ 284/3598 0/5

Time elapsed: 286 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY
LamportFastMutEx-COL-5-ReachabilityCardinality-00:
LamportFastMutEx-COL-5-ReachabilityCardinality-02:
LamportFastMutEx-COL-5-ReachabilityCardinality-03:
LamportFastMutEx-COL-5-ReachabilityCardinality-04:
LamportFastMutEx-COL-5-ReachabilityCardinality-05:
LamportFastMutEx-COL-5-ReachabilityCardinality-06:
LamportFastMutEx-COL-5-ReachabilityCardinality-07:
LamportFastMutEx-COL-5-ReachabilityCardinality-08:
LamportFastMutEx-COL-5-ReachabilityCardinality-09:
LamportFastMutEx-COL-5-ReachabilityCardinality-10:
LamportFastMutEx-COL-5-ReachabilityCardinality-11:
LamportFastMutEx-COL-5-ReachabilityCardinality-12:
LamportFastMutEx-COL-5-ReachabilityCardinality-13:
LamportFastMutEx-COL-5-ReachabilityCardinality-14:
LamportFastMutEx-COL-5-ReachabilityCardinality-15:

PENDING FORMULAS: CATEGORY
LamportFastMutEx-COL-5-ReachabilityCardinality-01:

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA
208 EF FNDP 289/3598 0/5
209 EF STEQ 289/3598 0/5

Time elapsed: 291 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY
LamportFastMutEx-COL-5-ReachabilityCardinality-00:
LamportFastMutEx-COL-5-ReachabilityCardinality-02:
LamportFastMutEx-COL-5-ReachabilityCardinality-03:
LamportFastMutEx-COL-5-ReachabilityCardinality-04:
LamportFastMutEx-COL-5-ReachabilityCardinality-05:
LamportFastMutEx-COL-5-ReachabilityCardinality-06:
LamportFastMutEx-COL-5-ReachabilityCardinality-07:
LamportFastMutEx-COL-5-ReachabilityCardinality-08:
LamportFastMutEx-COL-5-ReachabilityCardinality-09:
LamportFastMutEx-COL-5-ReachabilityCardinality-10:
LamportFastMutEx-COL-5-ReachabilityCardinality-11:
LamportFastMutEx-COL-5-ReachabilityCardinality-12:
LamportFastMutEx-COL-5-ReachabilityCardinality-13:
LamportFastMutEx-COL-5-ReachabilityCardinality-14:
LamportFastMutEx-COL-5-ReachabilityCardinality-15:

PENDING FORMULAS: CATEGORY
LamportFastMutEx-COL-5-ReachabilityCardinality-01:

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA
208 EF FNDP 294/3598 0/5
209 EF STEQ 294/3598 0/5

Time elapsed: 296 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY
LamportFastMutEx-COL-5-ReachabilityCardinality-00:
LamportFastMutEx-COL-5-ReachabilityCardinality-02:
LamportFastMutEx-COL-5-ReachabilityCardinality-03:
LamportFastMutEx-COL-5-ReachabilityCardinality-04:
LamportFastMutEx-COL-5-ReachabilityCardinality-05:
LamportFastMutEx-COL-5-ReachabilityCardinality-06:
LamportFastMutEx-COL-5-ReachabilityCardinality-07:
LamportFastMutEx-COL-5-ReachabilityCardinality-08:
LamportFastMutEx-COL-5-ReachabilityCardinality-09:
LamportFastMutEx-COL-5-ReachabilityCardinality-10:
LamportFastMutEx-COL-5-ReachabilityCardinality-11:
LamportFastMutEx-COL-5-ReachabilityCardinality-12:
LamportFastMutEx-COL-5-ReachabilityCardinality-13:
LamportFastMutEx-COL-5-ReachabilityCardinality-14:
LamportFastMutEx-COL-5-ReachabilityCardinality-15:

PENDING FORMULAS: CATEGORY
LamportFastMutEx-COL-5-ReachabilityCardinality-01:

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA
208 EF FNDP 299/3598 0/5
209 EF STEQ 299/3598 0/5

Time elapsed: 301 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY
LamportFastMutEx-COL-5-ReachabilityCardinality-00:
LamportFastMutEx-COL-5-ReachabilityCardinality-02:
LamportFastMutEx-COL-5-ReachabilityCardinality-03:
LamportFastMutEx-COL-5-ReachabilityCardinality-04:
LamportFastMutEx-COL-5-ReachabilityCardinality-05:
LamportFastMutEx-COL-5-ReachabilityCardinality-06:
LamportFastMutEx-COL-5-ReachabilityCardinality-07:
LamportFastMutEx-COL-5-ReachabilityCardinality-08:
LamportFastMutEx-COL-5-ReachabilityCardinality-09:
LamportFastMutEx-COL-5-ReachabilityCardinality-10:
LamportFastMutEx-COL-5-ReachabilityCardinality-11:
LamportFastMutEx-COL-5-ReachabilityCardinality-12:
LamportFastMutEx-COL-5-ReachabilityCardinality-13:
LamportFastMutEx-COL-5-ReachabilityCardinality-14:
LamportFastMutEx-COL-5-ReachabilityCardinality-15:

PENDING FORMULAS: CATEGORY
LamportFastMutEx-COL-5-ReachabilityCardinality-01:

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA
208 EF FNDP 304/3598 0/5
209 EF STEQ 304/3598 0/5

Time elapsed: 306 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY
LamportFastMutEx-COL-5-ReachabilityCardinality-00:
LamportFastMutEx-COL-5-ReachabilityCardinality-02:
LamportFastMutEx-COL-5-ReachabilityCardinality-03:
LamportFastMutEx-COL-5-ReachabilityCardinality-04:
LamportFastMutEx-COL-5-ReachabilityCardinality-05:
LamportFastMutEx-COL-5-ReachabilityCardinality-06:
LamportFastMutEx-COL-5-ReachabilityCardinality-07:
LamportFastMutEx-COL-5-ReachabilityCardinality-08:
LamportFastMutEx-COL-5-ReachabilityCardinality-09:
LamportFastMutEx-COL-5-ReachabilityCardinality-10:
LamportFastMutEx-COL-5-ReachabilityCardinality-11:
LamportFastMutEx-COL-5-ReachabilityCardinality-12:
LamportFastMutEx-COL-5-ReachabilityCardinality-13:
LamportFastMutEx-COL-5-ReachabilityCardinality-14:
LamportFastMutEx-COL-5-ReachabilityCardinality-15:

PENDING FORMULAS: CATEGORY
LamportFastMutEx-COL-5-ReachabilityCardinality-01:

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA
208 EF FNDP 309/3598 0/5
209 EF STEQ 309/3598 0/5

Time elapsed: 311 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY
LamportFastMutEx-COL-5-ReachabilityCardinality-00:
LamportFastMutEx-COL-5-ReachabilityCardinality-02:
LamportFastMutEx-COL-5-ReachabilityCardinality-03:
LamportFastMutEx-COL-5-ReachabilityCardinality-04:
LamportFastMutEx-COL-5-ReachabilityCardinality-05:
LamportFastMutEx-COL-5-ReachabilityCardinality-06:
LamportFastMutEx-COL-5-ReachabilityCardinality-07:
LamportFastMutEx-COL-5-ReachabilityCardinality-08:
LamportFastMutEx-COL-5-ReachabilityCardinality-09:
LamportFastMutEx-COL-5-ReachabilityCardinality-10:
LamportFastMutEx-COL-5-ReachabilityCardinality-11:
LamportFastMutEx-COL-5-ReachabilityCardinality-12:
LamportFastMutEx-COL-5-ReachabilityCardinality-13:
LamportFastMutEx-COL-5-ReachabilityCardinality-14:
LamportFastMutEx-COL-5-ReachabilityCardinality-15:

PENDING FORMULAS: CATEGORY
LamportFastMutEx-COL-5-ReachabilityCardinality-01:

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA
208 EF FNDP 314/3598 0/5
209 EF STEQ 314/3598 0/5

Time elapsed: 316 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY
LamportFastMutEx-COL-5-ReachabilityCardinality-00:
LamportFastMutEx-COL-5-ReachabilityCardinality-02:
LamportFastMutEx-COL-5-ReachabilityCardinality-03:
LamportFastMutEx-COL-5-ReachabilityCardinality-04:
LamportFastMutEx-COL-5-ReachabilityCardinality-05:
LamportFastMutEx-COL-5-ReachabilityCardinality-06:
LamportFastMutEx-COL-5-ReachabilityCardinality-07:
LamportFastMutEx-COL-5-ReachabilityCardinality-08:
LamportFastMutEx-COL-5-ReachabilityCardinality-09:
LamportFastMutEx-COL-5-ReachabilityCardinality-10:
LamportFastMutEx-COL-5-ReachabilityCardinality-11:
LamportFastMutEx-COL-5-ReachabilityCardinality-12:
LamportFastMutEx-COL-5-ReachabilityCardinality-13:
LamportFastMutEx-COL-5-ReachabilityCardinality-14:
LamportFastMutEx-COL-5-ReachabilityCardinality-15:

PENDING FORMULAS: CATEGORY
LamportFastMutEx-COL-5-ReachabilityCardinality-01:

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA
208 EF FNDP 319/3598 0/5
209 EF STEQ 319/3598 0/5

Time elapsed: 321 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
lola: FINISHED task # 205 (type EQUN) for
lola: result : unknown
lola: FINISHED task # 231 (type EQUN) for
lola: result : unknown
FINISHED FORMULA: CATEGORY
LamportFastMutEx-COL-5-ReachabilityCardinality-00:
LamportFastMutEx-COL-5-ReachabilityCardinality-02:
LamportFastMutEx-COL-5-ReachabilityCardinality-03:
LamportFastMutEx-COL-5-ReachabilityCardinality-04:
LamportFastMutEx-COL-5-ReachabilityCardinality-05:
LamportFastMutEx-COL-5-ReachabilityCardinality-06:
LamportFastMutEx-COL-5-ReachabilityCardinality-07:
LamportFastMutEx-COL-5-ReachabilityCardinality-08:
LamportFastMutEx-COL-5-ReachabilityCardinality-09:
LamportFastMutEx-COL-5-ReachabilityCardinality-10:
LamportFastMutEx-COL-5-ReachabilityCardinality-11:
LamportFastMutEx-COL-5-ReachabilityCardinality-12:
LamportFastMutEx-COL-5-ReachabilityCardinality-13:
LamportFastMutEx-COL-5-ReachabilityCardinality-14:
LamportFastMutEx-COL-5-ReachabilityCardinality-15:

PENDING FORMULAS: CATEGORY
LamportFastMutEx-COL-5-ReachabilityCardinality-01:

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA
208 EF FNDP 324/3598 0/5
209 EF STEQ 324/3598 0/5

Time elapsed: 326 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY
LamportFastMutEx-COL-5-ReachabilityCardinality-00:
LamportFastMutEx-COL-5-ReachabilityCardinality-02:
LamportFastMutEx-COL-5-ReachabilityCardinality-03:
LamportFastMutEx-COL-5-ReachabilityCardinality-04:
LamportFastMutEx-COL-5-ReachabilityCardinality-05:
LamportFastMutEx-COL-5-ReachabilityCardinality-06:
LamportFastMutEx-COL-5-ReachabilityCardinality-07:
LamportFastMutEx-COL-5-ReachabilityCardinality-08:
LamportFastMutEx-COL-5-ReachabilityCardinality-09:
LamportFastMutEx-COL-5-ReachabilityCardinality-10:
LamportFastMutEx-COL-5-ReachabilityCardinality-11:
LamportFastMutEx-COL-5-ReachabilityCardinality-12:
LamportFastMutEx-COL-5-ReachabilityCardinality-13:
LamportFastMutEx-COL-5-ReachabilityCardinality-14:
LamportFastMutEx-COL-5-ReachabilityCardinality-15:

PENDING FORMULAS: CATEGORY
LamportFastMutEx-COL-5-ReachabilityCardinality-01:

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA
208 EF FNDP 329/3598 0/5
209 EF STEQ 329/3598 0/5

Time elapsed: 331 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY
LamportFastMutEx-COL-5-ReachabilityCardinality-00:
LamportFastMutEx-COL-5-ReachabilityCardinality-02:
LamportFastMutEx-COL-5-ReachabilityCardinality-03:
LamportFastMutEx-COL-5-ReachabilityCardinality-04:
LamportFastMutEx-COL-5-ReachabilityCardinality-05:
LamportFastMutEx-COL-5-ReachabilityCardinality-06:
LamportFastMutEx-COL-5-ReachabilityCardinality-07:
LamportFastMutEx-COL-5-ReachabilityCardinality-08:
LamportFastMutEx-COL-5-ReachabilityCardinality-09:
LamportFastMutEx-COL-5-ReachabilityCardinality-10:
LamportFastMutEx-COL-5-ReachabilityCardinality-11:
LamportFastMutEx-COL-5-ReachabilityCardinality-12:
LamportFastMutEx-COL-5-ReachabilityCardinality-13:
LamportFastMutEx-COL-5-ReachabilityCardinality-14:
LamportFastMutEx-COL-5-ReachabilityCardinality-15:

PENDING FORMULAS: CATEGORY
LamportFastMutEx-COL-5-ReachabilityCardinality-01:

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA
208 EF FNDP 334/3598 0/5
209 EF STEQ 334/3598 0/5

Time elapsed: 336 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY
LamportFastMutEx-COL-5-ReachabilityCardinality-00:
LamportFastMutEx-COL-5-ReachabilityCardinality-02:
LamportFastMutEx-COL-5-ReachabilityCardinality-03:
LamportFastMutEx-COL-5-ReachabilityCardinality-04:
LamportFastMutEx-COL-5-ReachabilityCardinality-05:
LamportFastMutEx-COL-5-ReachabilityCardinality-06:
LamportFastMutEx-COL-5-ReachabilityCardinality-07:
LamportFastMutEx-COL-5-ReachabilityCardinality-08:
LamportFastMutEx-COL-5-ReachabilityCardinality-09:
LamportFastMutEx-COL-5-ReachabilityCardinality-10:
LamportFastMutEx-COL-5-ReachabilityCardinality-11:
LamportFastMutEx-COL-5-ReachabilityCardinality-12:
LamportFastMutEx-COL-5-ReachabilityCardinality-13:
LamportFastMutEx-COL-5-ReachabilityCardinality-14:
LamportFastMutEx-COL-5-ReachabilityCardinality-15:

PENDING FORMULAS: CATEGORY
LamportFastMutEx-COL-5-ReachabilityCardinality-01:

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA
208 EF FNDP 339/3598 0/5
209 EF STEQ 339/3598 0/5

Time elapsed: 341 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY
LamportFastMutEx-COL-5-ReachabilityCardinality-00:
LamportFastMutEx-COL-5-ReachabilityCardinality-02:
LamportFastMutEx-COL-5-ReachabilityCardinality-03:
LamportFastMutEx-COL-5-ReachabilityCardinality-04:
LamportFastMutEx-COL-5-ReachabilityCardinality-05:
LamportFastMutEx-COL-5-ReachabilityCardinality-06:
LamportFastMutEx-COL-5-ReachabilityCardinality-07:
LamportFastMutEx-COL-5-ReachabilityCardinality-08:
LamportFastMutEx-COL-5-ReachabilityCardinality-09:
LamportFastMutEx-COL-5-ReachabilityCardinality-10:
LamportFastMutEx-COL-5-ReachabilityCardinality-11:
LamportFastMutEx-COL-5-ReachabilityCardinality-12:
LamportFastMutEx-COL-5-ReachabilityCardinality-13:
LamportFastMutEx-COL-5-ReachabilityCardinality-14:
LamportFastMutEx-COL-5-ReachabilityCardinality-15:

PENDING FORMULAS: CATEGORY
LamportFastMutEx-COL-5-ReachabilityCardinality-01:

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA
208 EF FNDP 344/3598 0/5
209 EF STEQ 344/3598 0/5

Time elapsed: 346 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY
LamportFastMutEx-COL-5-ReachabilityCardinality-00:
LamportFastMutEx-COL-5-ReachabilityCardinality-02:
LamportFastMutEx-COL-5-ReachabilityCardinality-03:
LamportFastMutEx-COL-5-ReachabilityCardinality-04:
LamportFastMutEx-COL-5-ReachabilityCardinality-05:
LamportFastMutEx-COL-5-ReachabilityCardinality-06:
LamportFastMutEx-COL-5-ReachabilityCardinality-07:
LamportFastMutEx-COL-5-ReachabilityCardinality-08:
LamportFastMutEx-COL-5-ReachabilityCardinality-09:
LamportFastMutEx-COL-5-ReachabilityCardinality-10:
LamportFastMutEx-COL-5-ReachabilityCardinality-11:
LamportFastMutEx-COL-5-ReachabilityCardinality-12:
LamportFastMutEx-COL-5-ReachabilityCardinality-13:
LamportFastMutEx-COL-5-ReachabilityCardinality-14:
LamportFastMutEx-COL-5-ReachabilityCardinality-15:

PENDING FORMULAS: CATEGORY
LamportFastMutEx-COL-5-ReachabilityCardinality-01:

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA
208 EF FNDP 349/3598 0/5
209 EF STEQ 349/3598 0/5

Time elapsed: 351 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY
LamportFastMutEx-COL-5-ReachabilityCardinality-00:
LamportFastMutEx-COL-5-ReachabilityCardinality-02:
LamportFastMutEx-COL-5-ReachabilityCardinality-03:
LamportFastMutEx-COL-5-ReachabilityCardinality-04:
LamportFastMutEx-COL-5-ReachabilityCardinality-05:
LamportFastMutEx-COL-5-ReachabilityCardinality-06:
LamportFastMutEx-COL-5-ReachabilityCardinality-07:
LamportFastMutEx-COL-5-ReachabilityCardinality-08:
LamportFastMutEx-COL-5-ReachabilityCardinality-09:
LamportFastMutEx-COL-5-ReachabilityCardinality-10:
LamportFastMutEx-COL-5-ReachabilityCardinality-11:
LamportFastMutEx-COL-5-ReachabilityCardinality-12:
LamportFastMutEx-COL-5-ReachabilityCardinality-13:
LamportFastMutEx-COL-5-ReachabilityCardinality-14:
LamportFastMutEx-COL-5-ReachabilityCardinality-15:

PENDING FORMULAS: CATEGORY
LamportFastMutEx-COL-5-ReachabilityCardinality-01:

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA
208 EF FNDP 354/3598 0/5
209 EF STEQ 354/3598 0/5

Time elapsed: 356 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY
LamportFastMutEx-COL-5-ReachabilityCardinality-00:
LamportFastMutEx-COL-5-ReachabilityCardinality-02:
LamportFastMutEx-COL-5-ReachabilityCardinality-03:
LamportFastMutEx-COL-5-ReachabilityCardinality-04:
LamportFastMutEx-COL-5-ReachabilityCardinality-05:
LamportFastMutEx-COL-5-ReachabilityCardinality-06:
LamportFastMutEx-COL-5-ReachabilityCardinality-07:
LamportFastMutEx-COL-5-ReachabilityCardinality-08:
LamportFastMutEx-COL-5-ReachabilityCardinality-09:
LamportFastMutEx-COL-5-ReachabilityCardinality-10:
LamportFastMutEx-COL-5-ReachabilityCardinality-11:
LamportFastMutEx-COL-5-ReachabilityCardinality-12:
LamportFastMutEx-COL-5-ReachabilityCardinality-13:
LamportFastMutEx-COL-5-ReachabilityCardinality-14:
LamportFastMutEx-COL-5-ReachabilityCardinality-15:

PENDING FORMULAS: CATEGORY
LamportFastMutEx-COL-5-ReachabilityCardinality-01:

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA
208 EF FNDP 359/3598 0/5
209 EF STEQ 359/3598 0/5

Time elapsed: 361 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY
LamportFastMutEx-COL-5-ReachabilityCardinality-00:
LamportFastMutEx-COL-5-ReachabilityCardinality-02:
LamportFastMutEx-COL-5-ReachabilityCardinality-03:
LamportFastMutEx-COL-5-ReachabilityCardinality-04:
LamportFastMutEx-COL-5-ReachabilityCardinality-05:
LamportFastMutEx-COL-5-ReachabilityCardinality-06:
LamportFastMutEx-COL-5-ReachabilityCardinality-07:
LamportFastMutEx-COL-5-ReachabilityCardinality-08:
LamportFastMutEx-COL-5-ReachabilityCardinality-09:
LamportFastMutEx-COL-5-ReachabilityCardinality-10:
LamportFastMutEx-COL-5-ReachabilityCardinality-11:
LamportFastMutEx-COL-5-ReachabilityCardinality-12:
LamportFastMutEx-COL-5-ReachabilityCardinality-13:
LamportFastMutEx-COL-5-ReachabilityCardinality-14:
LamportFastMutEx-COL-5-ReachabilityCardinality-15:

PENDING FORMULAS: CATEGORY
LamportFastMutEx-COL-5-ReachabilityCardinality-01:

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA
208 EF FNDP 364/3598 0/5
209 EF STEQ 364/3598 0/5

Time elapsed: 366 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY
LamportFastMutEx-COL-5-ReachabilityCardinality-00:
LamportFastMutEx-COL-5-ReachabilityCardinality-02:
LamportFastMutEx-COL-5-ReachabilityCardinality-03:
LamportFastMutEx-COL-5-ReachabilityCardinality-04:
LamportFastMutEx-COL-5-ReachabilityCardinality-05:
LamportFastMutEx-COL-5-ReachabilityCardinality-06:
LamportFastMutEx-COL-5-ReachabilityCardinality-07:
LamportFastMutEx-COL-5-ReachabilityCardinality-08:
LamportFastMutEx-COL-5-ReachabilityCardinality-09:
LamportFastMutEx-COL-5-ReachabilityCardinality-10:
LamportFastMutEx-COL-5-ReachabilityCardinality-11:
LamportFastMutEx-COL-5-ReachabilityCardinality-12:
LamportFastMutEx-COL-5-ReachabilityCardinality-13:
LamportFastMutEx-COL-5-ReachabilityCardinality-14:
LamportFastMutEx-COL-5-ReachabilityCardinality-15:

PENDING FORMULAS: CATEGORY
LamportFastMutEx-COL-5-ReachabilityCardinality-01:

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA
208 EF FNDP 369/3598 0/5
209 EF STEQ 369/3598 0/5

Time elapsed: 371 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY
LamportFastMutEx-COL-5-ReachabilityCardinality-00:
LamportFastMutEx-COL-5-ReachabilityCardinality-02:
LamportFastMutEx-COL-5-ReachabilityCardinality-03:
LamportFastMutEx-COL-5-ReachabilityCardinality-04:
LamportFastMutEx-COL-5-ReachabilityCardinality-05:
LamportFastMutEx-COL-5-ReachabilityCardinality-06:
LamportFastMutEx-COL-5-ReachabilityCardinality-07:
LamportFastMutEx-COL-5-ReachabilityCardinality-08:
LamportFastMutEx-COL-5-ReachabilityCardinality-09:
LamportFastMutEx-COL-5-ReachabilityCardinality-10:
LamportFastMutEx-COL-5-ReachabilityCardinality-11:
LamportFastMutEx-COL-5-ReachabilityCardinality-12:
LamportFastMutEx-COL-5-ReachabilityCardinality-13:
LamportFastMutEx-COL-5-ReachabilityCardinality-14:
LamportFastMutEx-COL-5-ReachabilityCardinality-15:

PENDING FORMULAS: CATEGORY
LamportFastMutEx-COL-5-ReachabilityCardinality-01:

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA
208 EF FNDP 374/3598 0/5
209 EF STEQ 374/3598 0/5

Time elapsed: 376 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY
LamportFastMutEx-COL-5-ReachabilityCardinality-00:
LamportFastMutEx-COL-5-ReachabilityCardinality-02:
LamportFastMutEx-COL-5-ReachabilityCardinality-03:
LamportFastMutEx-COL-5-ReachabilityCardinality-04:
LamportFastMutEx-COL-5-ReachabilityCardinality-05:
LamportFastMutEx-COL-5-ReachabilityCardinality-06:
LamportFastMutEx-COL-5-ReachabilityCardinality-07:
LamportFastMutEx-COL-5-ReachabilityCardinality-08:
LamportFastMutEx-COL-5-ReachabilityCardinality-09:
LamportFastMutEx-COL-5-ReachabilityCardinality-10:
LamportFastMutEx-COL-5-ReachabilityCardinality-11:
LamportFastMutEx-COL-5-ReachabilityCardinality-12:
LamportFastMutEx-COL-5-ReachabilityCardinality-13:
LamportFastMutEx-COL-5-ReachabilityCardinality-14:
LamportFastMutEx-COL-5-ReachabilityCardinality-15:

PENDING FORMULAS: CATEGORY
LamportFastMutEx-COL-5-ReachabilityCardinality-01:

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA
208 EF FNDP 379/3598 0/5
209 EF STEQ 379/3598 0/5

Time elapsed: 381 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY
LamportFastMutEx-COL-5-ReachabilityCardinality-00:
LamportFastMutEx-COL-5-ReachabilityCardinality-02:
LamportFastMutEx-COL-5-ReachabilityCardinality-03:
LamportFastMutEx-COL-5-ReachabilityCardinality-04:
LamportFastMutEx-COL-5-ReachabilityCardinality-05:
LamportFastMutEx-COL-5-ReachabilityCardinality-06:
LamportFastMutEx-COL-5-ReachabilityCardinality-07:
LamportFastMutEx-COL-5-ReachabilityCardinality-08:
LamportFastMutEx-COL-5-ReachabilityCardinality-09:
LamportFastMutEx-COL-5-ReachabilityCardinality-10:
LamportFastMutEx-COL-5-ReachabilityCardinality-11:
LamportFastMutEx-COL-5-ReachabilityCardinality-12:
LamportFastMutEx-COL-5-ReachabilityCardinality-13:
LamportFastMutEx-COL-5-ReachabilityCardinality-14:
LamportFastMutEx-COL-5-ReachabilityCardinality-15:

PENDING FORMULAS: CATEGORY
LamportFastMutEx-COL-5-ReachabilityCardinality-01:

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA
208 EF FNDP 384/3598 0/5
209 EF STEQ 384/3598 0/5

Time elapsed: 386 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY
LamportFastMutEx-COL-5-ReachabilityCardinality-00:
LamportFastMutEx-COL-5-ReachabilityCardinality-02:
LamportFastMutEx-COL-5-ReachabilityCardinality-03:
LamportFastMutEx-COL-5-ReachabilityCardinality-04:
LamportFastMutEx-COL-5-ReachabilityCardinality-05:
LamportFastMutEx-COL-5-ReachabilityCardinality-06:
LamportFastMutEx-COL-5-ReachabilityCardinality-07:
LamportFastMutEx-COL-5-ReachabilityCardinality-08:
LamportFastMutEx-COL-5-ReachabilityCardinality-09:
LamportFastMutEx-COL-5-ReachabilityCardinality-10:
LamportFastMutEx-COL-5-ReachabilityCardinality-11:
LamportFastMutEx-COL-5-ReachabilityCardinality-12:
LamportFastMutEx-COL-5-ReachabilityCardinality-13:
LamportFastMutEx-COL-5-ReachabilityCardinality-14:
LamportFastMutEx-COL-5-ReachabilityCardinality-15:

PENDING FORMULAS: CATEGORY
LamportFastMutEx-COL-5-ReachabilityCardinality-01:

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA
208 EF FNDP 389/3598 0/5
209 EF STEQ 389/3598 0/5

Time elapsed: 391 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY
LamportFastMutEx-COL-5-ReachabilityCardinality-00:
LamportFastMutEx-COL-5-ReachabilityCardinality-02:
LamportFastMutEx-COL-5-ReachabilityCardinality-03:
LamportFastMutEx-COL-5-ReachabilityCardinality-04:
LamportFastMutEx-COL-5-ReachabilityCardinality-05:
LamportFastMutEx-COL-5-ReachabilityCardinality-06:
LamportFastMutEx-COL-5-ReachabilityCardinality-07:
LamportFastMutEx-COL-5-ReachabilityCardinality-08:
LamportFastMutEx-COL-5-ReachabilityCardinality-09:
LamportFastMutEx-COL-5-ReachabilityCardinality-10:
LamportFastMutEx-COL-5-ReachabilityCardinality-11:
LamportFastMutEx-COL-5-ReachabilityCardinality-12:
LamportFastMutEx-COL-5-ReachabilityCardinality-13:
LamportFastMutEx-COL-5-ReachabilityCardinality-14:
LamportFastMutEx-COL-5-ReachabilityCardinality-15:

PENDING FORMULAS: CATEGORY
LamportFastMutEx-COL-5-ReachabilityCardinality-01:

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA
208 EF FNDP 394/3598 0/5
209 EF STEQ 394/3598 0/5

Time elapsed: 396 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY
LamportFastMutEx-COL-5-ReachabilityCardinality-00:
LamportFastMutEx-COL-5-ReachabilityCardinality-02:
LamportFastMutEx-COL-5-ReachabilityCardinality-03:
LamportFastMutEx-COL-5-ReachabilityCardinality-04:
LamportFastMutEx-COL-5-ReachabilityCardinality-05:
LamportFastMutEx-COL-5-ReachabilityCardinality-06:
LamportFastMutEx-COL-5-ReachabilityCardinality-07:
LamportFastMutEx-COL-5-ReachabilityCardinality-08:
LamportFastMutEx-COL-5-ReachabilityCardinality-09:
LamportFastMutEx-COL-5-ReachabilityCardinality-10:
LamportFastMutEx-COL-5-ReachabilityCardinality-11:
LamportFastMutEx-COL-5-ReachabilityCardinality-12:
LamportFastMutEx-COL-5-ReachabilityCardinality-13:
LamportFastMutEx-COL-5-ReachabilityCardinality-14:
LamportFastMutEx-COL-5-ReachabilityCardinality-15:

PENDING FORMULAS: CATEGORY
LamportFastMutEx-COL-5-ReachabilityCardinality-01:

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA
208 EF FNDP 399/3598 0/5
209 EF STEQ 399/3598 0/5

Time elapsed: 401 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY
LamportFastMutEx-COL-5-ReachabilityCardinality-00:
LamportFastMutEx-COL-5-ReachabilityCardinality-02:
LamportFastMutEx-COL-5-ReachabilityCardinality-03:
LamportFastMutEx-COL-5-ReachabilityCardinality-04:
LamportFastMutEx-COL-5-ReachabilityCardinality-05:
LamportFastMutEx-COL-5-ReachabilityCardinality-06:
LamportFastMutEx-COL-5-ReachabilityCardinality-07:
LamportFastMutEx-COL-5-ReachabilityCardinality-08:
LamportFastMutEx-COL-5-ReachabilityCardinality-09:
LamportFastMutEx-COL-5-ReachabilityCardinality-10:
LamportFastMutEx-COL-5-ReachabilityCardinality-11:
LamportFastMutEx-COL-5-ReachabilityCardinality-12:
LamportFastMutEx-COL-5-ReachabilityCardinality-13:
LamportFastMutEx-COL-5-ReachabilityCardinality-14:
LamportFastMutEx-COL-5-ReachabilityCardinality-15:

PENDING FORMULAS: CATEGORY
LamportFastMutEx-COL-5-ReachabilityCardinality-01:

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA
208 EF FNDP 404/3598 0/5
209 EF STEQ 404/3598 0/5

Time elapsed: 406 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY
LamportFastMutEx-COL-5-ReachabilityCardinality-00:
LamportFastMutEx-COL-5-ReachabilityCardinality-02:
LamportFastMutEx-COL-5-ReachabilityCardinality-03:
LamportFastMutEx-COL-5-ReachabilityCardinality-04:
LamportFastMutEx-COL-5-ReachabilityCardinality-05:
LamportFastMutEx-COL-5-ReachabilityCardinality-06:
LamportFastMutEx-COL-5-ReachabilityCardinality-07:
LamportFastMutEx-COL-5-ReachabilityCardinality-08:
LamportFastMutEx-COL-5-ReachabilityCardinality-09:
LamportFastMutEx-COL-5-ReachabilityCardinality-10:
LamportFastMutEx-COL-5-ReachabilityCardinality-11:
LamportFastMutEx-COL-5-ReachabilityCardinality-12:
LamportFastMutEx-COL-5-ReachabilityCardinality-13:
LamportFastMutEx-COL-5-ReachabilityCardinality-14:
LamportFastMutEx-COL-5-ReachabilityCardinality-15:

PENDING FORMULAS: CATEGORY
LamportFastMutEx-COL-5-ReachabilityCardinality-01:

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA
208 EF FNDP 409/3598 0/5
209 EF STEQ 409/3598 0/5

Time elapsed: 411 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY
LamportFastMutEx-COL-5-ReachabilityCardinality-00:
LamportFastMutEx-COL-5-ReachabilityCardinality-02:
LamportFastMutEx-COL-5-ReachabilityCardinality-03:
LamportFastMutEx-COL-5-ReachabilityCardinality-04:
LamportFastMutEx-COL-5-ReachabilityCardinality-05:
LamportFastMutEx-COL-5-ReachabilityCardinality-06:
LamportFastMutEx-COL-5-ReachabilityCardinality-07:
LamportFastMutEx-COL-5-ReachabilityCardinality-08:
LamportFastMutEx-COL-5-ReachabilityCardinality-09:
LamportFastMutEx-COL-5-ReachabilityCardinality-10:
LamportFastMutEx-COL-5-ReachabilityCardinality-11:
LamportFastMutEx-COL-5-ReachabilityCardinality-12:
LamportFastMutEx-COL-5-ReachabilityCardinality-13:
LamportFastMutEx-COL-5-ReachabilityCardinality-14:
LamportFastMutEx-COL-5-ReachabilityCardinality-15:

PENDING FORMULAS: CATEGORY
LamportFastMutEx-COL-5-ReachabilityCardinality-01:

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA
208 EF FNDP 414/3598 0/5
209 EF STEQ 414/3598 0/5

Time elapsed: 416 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY
LamportFastMutEx-COL-5-ReachabilityCardinality-00:
LamportFastMutEx-COL-5-ReachabilityCardinality-02:
LamportFastMutEx-COL-5-ReachabilityCardinality-03:
LamportFastMutEx-COL-5-ReachabilityCardinality-04:
LamportFastMutEx-COL-5-ReachabilityCardinality-05:
LamportFastMutEx-COL-5-ReachabilityCardinality-06:
LamportFastMutEx-COL-5-ReachabilityCardinality-07:
LamportFastMutEx-COL-5-ReachabilityCardinality-08:
LamportFastMutEx-COL-5-ReachabilityCardinality-09:
LamportFastMutEx-COL-5-ReachabilityCardinality-10:
LamportFastMutEx-COL-5-ReachabilityCardinality-11:
LamportFastMutEx-COL-5-ReachabilityCardinality-12:
LamportFastMutEx-COL-5-ReachabilityCardinality-13:
LamportFastMutEx-COL-5-ReachabilityCardinality-14:
LamportFastMutEx-COL-5-ReachabilityCardinality-15:

PENDING FORMULAS: CATEGORY
LamportFastMutEx-COL-5-ReachabilityCardinality-01:

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA
208 EF FNDP 419/3598 0/5
209 EF STEQ 419/3598 0/5

Time elapsed: 421 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY
LamportFastMutEx-COL-5-ReachabilityCardinality-00:
LamportFastMutEx-COL-5-ReachabilityCardinality-02:
LamportFastMutEx-COL-5-ReachabilityCardinality-03:
LamportFastMutEx-COL-5-ReachabilityCardinality-04:
LamportFastMutEx-COL-5-ReachabilityCardinality-05:
LamportFastMutEx-COL-5-ReachabilityCardinality-06:
LamportFastMutEx-COL-5-ReachabilityCardinality-07:
LamportFastMutEx-COL-5-ReachabilityCardinality-08:
LamportFastMutEx-COL-5-ReachabilityCardinality-09:
LamportFastMutEx-COL-5-ReachabilityCardinality-10:
LamportFastMutEx-COL-5-ReachabilityCardinality-11:
LamportFastMutEx-COL-5-ReachabilityCardinality-12:
LamportFastMutEx-COL-5-ReachabilityCardinality-13:
LamportFastMutEx-COL-5-ReachabilityCardinality-14:
LamportFastMutEx-COL-5-ReachabilityCardinality-15:

PENDING FORMULAS: CATEGORY
LamportFastMutEx-COL-5-ReachabilityCardinality-01:

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA
208 EF FNDP 424/3598 0/5
209 EF STEQ 424/3598 0/5

Time elapsed: 426 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY
LamportFastMutEx-COL-5-ReachabilityCardinality-00:
LamportFastMutEx-COL-5-ReachabilityCardinality-02:
LamportFastMutEx-COL-5-ReachabilityCardinality-03:
LamportFastMutEx-COL-5-ReachabilityCardinality-04:
LamportFastMutEx-COL-5-ReachabilityCardinality-05:
LamportFastMutEx-COL-5-ReachabilityCardinality-06:
LamportFastMutEx-COL-5-ReachabilityCardinality-07:
LamportFastMutEx-COL-5-ReachabilityCardinality-08:
LamportFastMutEx-COL-5-ReachabilityCardinality-09:
LamportFastMutEx-COL-5-ReachabilityCardinality-10:
LamportFastMutEx-COL-5-ReachabilityCardinality-11:
LamportFastMutEx-COL-5-ReachabilityCardinality-12:
LamportFastMutEx-COL-5-ReachabilityCardinality-13:
LamportFastMutEx-COL-5-ReachabilityCardinality-14:
LamportFastMutEx-COL-5-ReachabilityCardinality-15:

PENDING FORMULAS: CATEGORY
LamportFastMutEx-COL-5-ReachabilityCardinality-01:

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA
208 EF FNDP 429/3598 0/5
209 EF STEQ 429/3598 0/5

Time elapsed: 431 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY
LamportFastMutEx-COL-5-ReachabilityCardinality-00:
LamportFastMutEx-COL-5-ReachabilityCardinality-02:
LamportFastMutEx-COL-5-ReachabilityCardinality-03:
LamportFastMutEx-COL-5-ReachabilityCardinality-04:
LamportFastMutEx-COL-5-ReachabilityCardinality-05:
LamportFastMutEx-COL-5-ReachabilityCardinality-06:
LamportFastMutEx-COL-5-ReachabilityCardinality-07:
LamportFastMutEx-COL-5-ReachabilityCardinality-08:
LamportFastMutEx-COL-5-ReachabilityCardinality-09:
LamportFastMutEx-COL-5-ReachabilityCardinality-10:
LamportFastMutEx-COL-5-ReachabilityCardinality-11:
LamportFastMutEx-COL-5-ReachabilityCardinality-12:
LamportFastMutEx-COL-5-ReachabilityCardinality-13:
LamportFastMutEx-COL-5-ReachabilityCardinality-14:
LamportFastMutEx-COL-5-ReachabilityCardinality-15:

PENDING FORMULAS: CATEGORY
LamportFastMutEx-COL-5-ReachabilityCardinality-01:

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA
208 EF FNDP 434/3598 0/5
209 EF STEQ 434/3598 0/5

Time elapsed: 436 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY
LamportFastMutEx-COL-5-ReachabilityCardinality-00:
LamportFastMutEx-COL-5-ReachabilityCardinality-02:
LamportFastMutEx-COL-5-ReachabilityCardinality-03:
LamportFastMutEx-COL-5-ReachabilityCardinality-04:
LamportFastMutEx-COL-5-ReachabilityCardinality-05:
LamportFastMutEx-COL-5-ReachabilityCardinality-06:
LamportFastMutEx-COL-5-ReachabilityCardinality-07:
LamportFastMutEx-COL-5-ReachabilityCardinality-08:
LamportFastMutEx-COL-5-ReachabilityCardinality-09:
LamportFastMutEx-COL-5-ReachabilityCardinality-10:
LamportFastMutEx-COL-5-ReachabilityCardinality-11:
LamportFastMutEx-COL-5-ReachabilityCardinality-12:
LamportFastMutEx-COL-5-ReachabilityCardinality-13:
LamportFastMutEx-COL-5-ReachabilityCardinality-14:
LamportFastMutEx-COL-5-ReachabilityCardinality-15:

PENDING FORMULAS: CATEGORY
LamportFastMutEx-COL-5-ReachabilityCardinality-01:

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA
208 EF FNDP 439/3598 0/5
209 EF STEQ 439/3598 0/5

Time elapsed: 441 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY
LamportFastMutEx-COL-5-ReachabilityCardinality-00:
LamportFastMutEx-COL-5-ReachabilityCardinality-02:
LamportFastMutEx-COL-5-ReachabilityCardinality-03:
LamportFastMutEx-COL-5-ReachabilityCardinality-04:
LamportFastMutEx-COL-5-ReachabilityCardinality-05:
LamportFastMutEx-COL-5-ReachabilityCardinality-06:
LamportFastMutEx-COL-5-ReachabilityCardinality-07:
LamportFastMutEx-COL-5-ReachabilityCardinality-08:
LamportFastMutEx-COL-5-ReachabilityCardinality-09:
LamportFastMutEx-COL-5-ReachabilityCardinality-10:
LamportFastMutEx-COL-5-ReachabilityCardinality-11:
LamportFastMutEx-COL-5-ReachabilityCardinality-12:
LamportFastMutEx-COL-5-ReachabilityCardinality-13:
LamportFastMutEx-COL-5-ReachabilityCardinality-14:
LamportFastMutEx-COL-5-ReachabilityCardinality-15:

PENDING FORMULAS: CATEGORY
LamportFastMutEx-COL-5-ReachabilityCardinality-01:

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA
208 EF FNDP 444/3598 0/5
209 EF STEQ 444/3598 0/5

Time elapsed: 446 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY
LamportFastMutEx-COL-5-ReachabilityCardinality-00:
LamportFastMutEx-COL-5-ReachabilityCardinality-02:
LamportFastMutEx-COL-5-ReachabilityCardinality-03:
LamportFastMutEx-COL-5-ReachabilityCardinality-04:
LamportFastMutEx-COL-5-ReachabilityCardinality-05:
LamportFastMutEx-COL-5-ReachabilityCardinality-06:
LamportFastMutEx-COL-5-ReachabilityCardinality-07:
LamportFastMutEx-COL-5-ReachabilityCardinality-08:
LamportFastMutEx-COL-5-ReachabilityCardinality-09:
LamportFastMutEx-COL-5-ReachabilityCardinality-10:
LamportFastMutEx-COL-5-ReachabilityCardinality-11:
LamportFastMutEx-COL-5-ReachabilityCardinality-12:
LamportFastMutEx-COL-5-ReachabilityCardinality-13:
LamportFastMutEx-COL-5-ReachabilityCardinality-14:
LamportFastMutEx-COL-5-ReachabilityCardinality-15:

PENDING FORMULAS: CATEGORY
LamportFastMutEx-COL-5-ReachabilityCardinality-01:

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA
208 EF FNDP 449/3598 0/5
209 EF STEQ 449/3598 0/5

Time elapsed: 451 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY
LamportFastMutEx-COL-5-ReachabilityCardinality-00:
LamportFastMutEx-COL-5-ReachabilityCardinality-02:
LamportFastMutEx-COL-5-ReachabilityCardinality-03:
LamportFastMutEx-COL-5-ReachabilityCardinality-04:
LamportFastMutEx-COL-5-ReachabilityCardinality-05:
LamportFastMutEx-COL-5-ReachabilityCardinality-06:
LamportFastMutEx-COL-5-ReachabilityCardinality-07:
LamportFastMutEx-COL-5-ReachabilityCardinality-08:
LamportFastMutEx-COL-5-ReachabilityCardinality-09:
LamportFastMutEx-COL-5-ReachabilityCardinality-10:
LamportFastMutEx-COL-5-ReachabilityCardinality-11:
LamportFastMutEx-COL-5-ReachabilityCardinality-12:
LamportFastMutEx-COL-5-ReachabilityCardinality-13:
LamportFastMutEx-COL-5-ReachabilityCardinality-14:
LamportFastMutEx-COL-5-ReachabilityCardinality-15:

PENDING FORMULAS: CATEGORY
LamportFastMutEx-COL-5-ReachabilityCardinality-01:

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA
208 EF FNDP 454/3598 0/5
209 EF STEQ 454/3598 0/5

Time elapsed: 456 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY
LamportFastMutEx-COL-5-ReachabilityCardinality-00:
LamportFastMutEx-COL-5-ReachabilityCardinality-02:
LamportFastMutEx-COL-5-ReachabilityCardinality-03:
LamportFastMutEx-COL-5-ReachabilityCardinality-04:
LamportFastMutEx-COL-5-ReachabilityCardinality-05:
LamportFastMutEx-COL-5-ReachabilityCardinality-06:
LamportFastMutEx-COL-5-ReachabilityCardinality-07:
LamportFastMutEx-COL-5-ReachabilityCardinality-08:
LamportFastMutEx-COL-5-ReachabilityCardinality-09:
LamportFastMutEx-COL-5-ReachabilityCardinality-10:
LamportFastMutEx-COL-5-ReachabilityCardinality-11:
LamportFastMutEx-COL-5-ReachabilityCardinality-12:
LamportFastMutEx-COL-5-ReachabilityCardinality-13:
LamportFastMutEx-COL-5-ReachabilityCardinality-14:
LamportFastMutEx-COL-5-ReachabilityCardinality-15:

PENDING FORMULAS: CATEGORY
LamportFastMutEx-COL-5-ReachabilityCardinality-01:

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA
208 EF FNDP 459/3598 0/5
209 EF STEQ 459/3598 0/5

Time elapsed: 461 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY
LamportFastMutEx-COL-5-ReachabilityCardinality-00:
LamportFastMutEx-COL-5-ReachabilityCardinality-02:
LamportFastMutEx-COL-5-ReachabilityCardinality-03:
LamportFastMutEx-COL-5-ReachabilityCardinality-04:
LamportFastMutEx-COL-5-ReachabilityCardinality-05:
LamportFastMutEx-COL-5-ReachabilityCardinality-06:
LamportFastMutEx-COL-5-ReachabilityCardinality-07:
LamportFastMutEx-COL-5-ReachabilityCardinality-08:
LamportFastMutEx-COL-5-ReachabilityCardinality-09:
LamportFastMutEx-COL-5-ReachabilityCardinality-10:
LamportFastMutEx-COL-5-ReachabilityCardinality-11:
LamportFastMutEx-COL-5-ReachabilityCardinality-12:
LamportFastMutEx-COL-5-ReachabilityCardinality-13:
LamportFastMutEx-COL-5-ReachabilityCardinality-14:
LamportFastMutEx-COL-5-ReachabilityCardinality-15:

PENDING FORMULAS: CATEGORY
LamportFastMutEx-COL-5-ReachabilityCardinality-01:

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA
208 EF FNDP 464/3598 0/5
209 EF STEQ 464/3598 0/5

Time elapsed: 466 secs. Pages in use: 32
# running tasks: 2 of 4 Visible: 16
lola: FINISHED task # 209 (type EQUN) for
lola: result : unknown
FINISHED FORMULA: CATEGORY
LamportFastMutEx-COL-5-ReachabilityCardinality-00:
LamportFastMutEx-COL-5-ReachabilityCardinality-02:
LamportFastMutEx-COL-5-ReachabilityCardinality-03:
LamportFastMutEx-COL-5-ReachabilityCardinality-04:
LamportFastMutEx-COL-5-ReachabilityCardinality-05:
LamportFastMutEx-COL-5-ReachabilityCardinality-06:
LamportFastMutEx-COL-5-ReachabilityCardinality-07:
LamportFastMutEx-COL-5-ReachabilityCardinality-08:
LamportFastMutEx-COL-5-ReachabilityCardinality-09:
LamportFastMutEx-COL-5-ReachabilityCardinality-10:
LamportFastMutEx-COL-5-ReachabilityCardinality-11:
LamportFastMutEx-COL-5-ReachabilityCardinality-12:
LamportFastMutEx-COL-5-ReachabilityCardinality-13:
LamportFastMutEx-COL-5-ReachabilityCardinality-14:
LamportFastMutEx-COL-5-ReachabilityCardinality-15:

PENDING FORMULAS: CATEGORY
LamportFastMutEx-COL-5-ReachabilityCardinality-01:

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA
208 EF FNDP 469/3598 0/5

Time elapsed: 471 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY
LamportFastMutEx-COL-5-ReachabilityCardinality-00:
LamportFastMutEx-COL-5-ReachabilityCardinality-02:
LamportFastMutEx-COL-5-ReachabilityCardinality-03:
LamportFastMutEx-COL-5-ReachabilityCardinality-04:
LamportFastMutEx-COL-5-ReachabilityCardinality-05:
LamportFastMutEx-COL-5-ReachabilityCardinality-06:
LamportFastMutEx-COL-5-ReachabilityCardinality-07:
LamportFastMutEx-COL-5-ReachabilityCardinality-08:
LamportFastMutEx-COL-5-ReachabilityCardinality-09:
LamportFastMutEx-COL-5-ReachabilityCardinality-10:
LamportFastMutEx-COL-5-ReachabilityCardinality-11:
LamportFastMutEx-COL-5-ReachabilityCardinality-12:
LamportFastMutEx-COL-5-ReachabilityCardinality-13:
LamportFastMutEx-COL-5-ReachabilityCardinality-14:
LamportFastMutEx-COL-5-ReachabilityCardinality-15:

PENDING FORMULAS: CATEGORY
LamportFastMutEx-COL-5-ReachabilityCardinality-01:

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA
208 EF FNDP 474/3598 0/5

Time elapsed: 476 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY
LamportFastMutEx-COL-5-ReachabilityCardinality-00:
LamportFastMutEx-COL-5-ReachabilityCardinality-02:
LamportFastMutEx-COL-5-ReachabilityCardinality-03:
LamportFastMutEx-COL-5-ReachabilityCardinality-04:
LamportFastMutEx-COL-5-ReachabilityCardinality-05:
LamportFastMutEx-COL-5-ReachabilityCardinality-06:
LamportFastMutEx-COL-5-ReachabilityCardinality-07:
LamportFastMutEx-COL-5-ReachabilityCardinality-08:
LamportFastMutEx-COL-5-ReachabilityCardinality-09:
LamportFastMutEx-COL-5-ReachabilityCardinality-10:
LamportFastMutEx-COL-5-ReachabilityCardinality-11:
LamportFastMutEx-COL-5-ReachabilityCardinality-12:
LamportFastMutEx-COL-5-ReachabilityCardinality-13:
LamportFastMutEx-COL-5-ReachabilityCardinality-14:
LamportFastMutEx-COL-5-ReachabilityCardinality-15:

PENDING FORMULAS: CATEGORY
LamportFastMutEx-COL-5-ReachabilityCardinality-01:

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA
208 EF FNDP 479/3598 0/5

Time elapsed: 481 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY
LamportFastMutEx-COL-5-ReachabilityCardinality-00:
LamportFastMutEx-COL-5-ReachabilityCardinality-02:
LamportFastMutEx-COL-5-ReachabilityCardinality-03:
LamportFastMutEx-COL-5-ReachabilityCardinality-04:
LamportFastMutEx-COL-5-ReachabilityCardinality-05:
LamportFastMutEx-COL-5-ReachabilityCardinality-06:
LamportFastMutEx-COL-5-ReachabilityCardinality-07:
LamportFastMutEx-COL-5-ReachabilityCardinality-08:
LamportFastMutEx-COL-5-ReachabilityCardinality-09:
LamportFastMutEx-COL-5-ReachabilityCardinality-10:
LamportFastMutEx-COL-5-ReachabilityCardinality-11:
LamportFastMutEx-COL-5-ReachabilityCardinality-12:
LamportFastMutEx-COL-5-ReachabilityCardinality-13:
LamportFastMutEx-COL-5-ReachabilityCardinality-14:
LamportFastMutEx-COL-5-ReachabilityCardinality-15:

PENDING FORMULAS: CATEGORY
LamportFastMutEx-COL-5-ReachabilityCardinality-01:

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA
208 EF FNDP 484/3598 0/5

Time elapsed: 486 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY
LamportFastMutEx-COL-5-ReachabilityCardinality-00:
LamportFastMutEx-COL-5-ReachabilityCardinality-02:
LamportFastMutEx-COL-5-ReachabilityCardinality-03:
LamportFastMutEx-COL-5-ReachabilityCardinality-04:
LamportFastMutEx-COL-5-ReachabilityCardinality-05:
LamportFastMutEx-COL-5-ReachabilityCardinality-06:
LamportFastMutEx-COL-5-ReachabilityCardinality-07:
LamportFastMutEx-COL-5-ReachabilityCardinality-08:
LamportFastMutEx-COL-5-ReachabilityCardinality-09:
LamportFastMutEx-COL-5-ReachabilityCardinality-10:
LamportFastMutEx-COL-5-ReachabilityCardinality-11:
LamportFastMutEx-COL-5-ReachabilityCardinality-12:
LamportFastMutEx-COL-5-ReachabilityCardinality-13:
LamportFastMutEx-COL-5-ReachabilityCardinality-14:
LamportFastMutEx-COL-5-ReachabilityCardinality-15:

PENDING FORMULAS: CATEGORY
LamportFastMutEx-COL-5-ReachabilityCardinality-01:

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA
208 EF FNDP 489/3598 0/5

Time elapsed: 491 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY
LamportFastMutEx-COL-5-ReachabilityCardinality-00:
LamportFastMutEx-COL-5-ReachabilityCardinality-02:
LamportFastMutEx-COL-5-ReachabilityCardinality-03:
LamportFastMutEx-COL-5-ReachabilityCardinality-04:
LamportFastMutEx-COL-5-ReachabilityCardinality-05:
LamportFastMutEx-COL-5-ReachabilityCardinality-06:
LamportFastMutEx-COL-5-ReachabilityCardinality-07:
LamportFastMutEx-COL-5-ReachabilityCardinality-08:
LamportFastMutEx-COL-5-ReachabilityCardinality-09:
LamportFastMutEx-COL-5-ReachabilityCardinality-10:
LamportFastMutEx-COL-5-ReachabilityCardinality-11:
LamportFastMutEx-COL-5-ReachabilityCardinality-12:
LamportFastMutEx-COL-5-ReachabilityCardinality-13:
LamportFastMutEx-COL-5-ReachabilityCardinality-14:
LamportFastMutEx-COL-5-ReachabilityCardinality-15:

PENDING FORMULAS: CATEGORY
LamportFastMutEx-COL-5-ReachabilityCardinality-01:

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA
208 EF FNDP 494/3598 0/5

Time elapsed: 496 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY
LamportFastMutEx-COL-5-ReachabilityCardinality-00:
LamportFastMutEx-COL-5-ReachabilityCardinality-02:
LamportFastMutEx-COL-5-ReachabilityCardinality-03:
LamportFastMutEx-COL-5-ReachabilityCardinality-04:
LamportFastMutEx-COL-5-ReachabilityCardinality-05:
LamportFastMutEx-COL-5-ReachabilityCardinality-06:
LamportFastMutEx-COL-5-ReachabilityCardinality-07:
LamportFastMutEx-COL-5-ReachabilityCardinality-08:
LamportFastMutEx-COL-5-ReachabilityCardinality-09:
LamportFastMutEx-COL-5-ReachabilityCardinality-10:
LamportFastMutEx-COL-5-ReachabilityCardinality-11:
LamportFastMutEx-COL-5-ReachabilityCardinality-12:
LamportFastMutEx-COL-5-ReachabilityCardinality-13:
LamportFastMutEx-COL-5-ReachabilityCardinality-14:
LamportFastMutEx-COL-5-ReachabilityCardinality-15:

PENDING FORMULAS: CATEGORY
LamportFastMutEx-COL-5-ReachabilityCardinality-01:

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA
208 EF FNDP 499/3598 0/5

Time elapsed: 501 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY
LamportFastMutEx-COL-5-ReachabilityCardinality-00:
LamportFastMutEx-COL-5-ReachabilityCardinality-02:
LamportFastMutEx-COL-5-ReachabilityCardinality-03:
LamportFastMutEx-COL-5-ReachabilityCardinality-04:
LamportFastMutEx-COL-5-ReachabilityCardinality-05:
LamportFastMutEx-COL-5-ReachabilityCardinality-06:
LamportFastMutEx-COL-5-ReachabilityCardinality-07:
LamportFastMutEx-COL-5-ReachabilityCardinality-08:
LamportFastMutEx-COL-5-ReachabilityCardinality-09:
LamportFastMutEx-COL-5-ReachabilityCardinality-10:
LamportFastMutEx-COL-5-ReachabilityCardinality-11:
LamportFastMutEx-COL-5-ReachabilityCardinality-12:
LamportFastMutEx-COL-5-ReachabilityCardinality-13:
LamportFastMutEx-COL-5-ReachabilityCardinality-14:
LamportFastMutEx-COL-5-ReachabilityCardinality-15:

PENDING FORMULAS: CATEGORY
LamportFastMutEx-COL-5-ReachabilityCardinality-01:

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA
208 EF FNDP 504/3598 0/5

Time elapsed: 506 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY
LamportFastMutEx-COL-5-ReachabilityCardinality-00:
LamportFastMutEx-COL-5-ReachabilityCardinality-02:
LamportFastMutEx-COL-5-ReachabilityCardinality-03:
LamportFastMutEx-COL-5-ReachabilityCardinality-04:
LamportFastMutEx-COL-5-ReachabilityCardinality-05:
LamportFastMutEx-COL-5-ReachabilityCardinality-06:
LamportFastMutEx-COL-5-ReachabilityCardinality-07:
LamportFastMutEx-COL-5-ReachabilityCardinality-08:
LamportFastMutEx-COL-5-ReachabilityCardinality-09:
LamportFastMutEx-COL-5-ReachabilityCardinality-10:
LamportFastMutEx-COL-5-ReachabilityCardinality-11:
LamportFastMutEx-COL-5-ReachabilityCardinality-12:
LamportFastMutEx-COL-5-ReachabilityCardinality-13:
LamportFastMutEx-COL-5-ReachabilityCardinality-14:
LamportFastMutEx-COL-5-ReachabilityCardinality-15:

PENDING FORMULAS: CATEGORY
LamportFastMutEx-COL-5-ReachabilityCardinality-01:

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA
208 EF FNDP 509/3598 0/5

Time elapsed: 511 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY
LamportFastMutEx-COL-5-ReachabilityCardinality-00:
LamportFastMutEx-COL-5-ReachabilityCardinality-02:
LamportFastMutEx-COL-5-ReachabilityCardinality-03:
LamportFastMutEx-COL-5-ReachabilityCardinality-04:
LamportFastMutEx-COL-5-ReachabilityCardinality-05:
LamportFastMutEx-COL-5-ReachabilityCardinality-06:
LamportFastMutEx-COL-5-ReachabilityCardinality-07:
LamportFastMutEx-COL-5-ReachabilityCardinality-08:
LamportFastMutEx-COL-5-ReachabilityCardinality-09:
LamportFastMutEx-COL-5-ReachabilityCardinality-10:
LamportFastMutEx-COL-5-ReachabilityCardinality-11:
LamportFastMutEx-COL-5-ReachabilityCardinality-12:
LamportFastMutEx-COL-5-ReachabilityCardinality-13:
LamportFastMutEx-COL-5-ReachabilityCardinality-14:
LamportFastMutEx-COL-5-ReachabilityCardinality-15:

PENDING FORMULAS: CATEGORY
LamportFastMutEx-COL-5-ReachabilityCardinality-01:

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA
208 EF FNDP 514/3598 0/5

Time elapsed: 516 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY
LamportFastMutEx-COL-5-ReachabilityCardinality-00:
LamportFastMutEx-COL-5-ReachabilityCardinality-02:
LamportFastMutEx-COL-5-ReachabilityCardinality-03:
LamportFastMutEx-COL-5-ReachabilityCardinality-04:
LamportFastMutEx-COL-5-ReachabilityCardinality-05:
LamportFastMutEx-COL-5-ReachabilityCardinality-06:
LamportFastMutEx-COL-5-ReachabilityCardinality-07:
LamportFastMutEx-COL-5-ReachabilityCardinality-08:
LamportFastMutEx-COL-5-ReachabilityCardinality-09:
LamportFastMutEx-COL-5-ReachabilityCardinality-10:
LamportFastMutEx-COL-5-ReachabilityCardinality-11:
LamportFastMutEx-COL-5-ReachabilityCardinality-12:
LamportFastMutEx-COL-5-ReachabilityCardinality-13:
LamportFastMutEx-COL-5-ReachabilityCardinality-14:
LamportFastMutEx-COL-5-ReachabilityCardinality-15:

PENDING FORMULAS: CATEGORY
LamportFastMutEx-COL-5-ReachabilityCardinality-01:

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA
208 EF FNDP 519/3598 0/5

Time elapsed: 521 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY
LamportFastMutEx-COL-5-ReachabilityCardinality-00:
LamportFastMutEx-COL-5-ReachabilityCardinality-02:
LamportFastMutEx-COL-5-ReachabilityCardinality-03:
LamportFastMutEx-COL-5-ReachabilityCardinality-04:
LamportFastMutEx-COL-5-ReachabilityCardinality-05:
LamportFastMutEx-COL-5-ReachabilityCardinality-06:
LamportFastMutEx-COL-5-ReachabilityCardinality-07:
LamportFastMutEx-COL-5-ReachabilityCardinality-08:
LamportFastMutEx-COL-5-ReachabilityCardinality-09:
LamportFastMutEx-COL-5-ReachabilityCardinality-10:
LamportFastMutEx-COL-5-ReachabilityCardinality-11:
LamportFastMutEx-COL-5-ReachabilityCardinality-12:
LamportFastMutEx-COL-5-ReachabilityCardinality-13:
LamportFastMutEx-COL-5-ReachabilityCardinality-14:
LamportFastMutEx-COL-5-ReachabilityCardinality-15:

PENDING FORMULAS: CATEGORY
LamportFastMutEx-COL-5-ReachabilityCardinality-01:

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA
208 EF FNDP 524/3598 0/5

Time elapsed: 526 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY
LamportFastMutEx-COL-5-ReachabilityCardinality-00:
LamportFastMutEx-COL-5-ReachabilityCardinality-02:
LamportFastMutEx-COL-5-ReachabilityCardinality-03:
LamportFastMutEx-COL-5-ReachabilityCardinality-04:
LamportFastMutEx-COL-5-ReachabilityCardinality-05:
LamportFastMutEx-COL-5-ReachabilityCardinality-06:
LamportFastMutEx-COL-5-ReachabilityCardinality-07:
LamportFastMutEx-COL-5-ReachabilityCardinality-08:
LamportFastMutEx-COL-5-ReachabilityCardinality-09:
LamportFastMutEx-COL-5-ReachabilityCardinality-10:
LamportFastMutEx-COL-5-ReachabilityCardinality-11:
LamportFastMutEx-COL-5-ReachabilityCardinality-12:
LamportFastMutEx-COL-5-ReachabilityCardinality-13:
LamportFastMutEx-COL-5-ReachabilityCardinality-14:
LamportFastMutEx-COL-5-ReachabilityCardinality-15:

PENDING FORMULAS: CATEGORY
LamportFastMutEx-COL-5-ReachabilityCardinality-01:

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA
208 EF FNDP 529/3598 0/5

Time elapsed: 531 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY
LamportFastMutEx-COL-5-ReachabilityCardinality-00:
LamportFastMutEx-COL-5-ReachabilityCardinality-02:
LamportFastMutEx-COL-5-ReachabilityCardinality-03:
LamportFastMutEx-COL-5-ReachabilityCardinality-04:
LamportFastMutEx-COL-5-ReachabilityCardinality-05:
LamportFastMutEx-COL-5-ReachabilityCardinality-06:
LamportFastMutEx-COL-5-ReachabilityCardinality-07:
LamportFastMutEx-COL-5-ReachabilityCardinality-08:
LamportFastMutEx-COL-5-ReachabilityCardinality-09:
LamportFastMutEx-COL-5-ReachabilityCardinality-10:
LamportFastMutEx-COL-5-ReachabilityCardinality-11:
LamportFastMutEx-COL-5-ReachabilityCardinality-12:
LamportFastMutEx-COL-5-ReachabilityCardinality-13:
LamportFastMutEx-COL-5-ReachabilityCardinality-14:
LamportFastMutEx-COL-5-ReachabilityCardinality-15:

PENDING FORMULAS: CATEGORY
LamportFastMutEx-COL-5-ReachabilityCardinality-01:

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA
208 EF FNDP 534/3598 0/5

Time elapsed: 536 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY
LamportFastMutEx-COL-5-ReachabilityCardinality-00:
LamportFastMutEx-COL-5-ReachabilityCardinality-02:
LamportFastMutEx-COL-5-ReachabilityCardinality-03:
LamportFastMutEx-COL-5-ReachabilityCardinality-04:
LamportFastMutEx-COL-5-ReachabilityCardinality-05:
LamportFastMutEx-COL-5-ReachabilityCardinality-06:
LamportFastMutEx-COL-5-ReachabilityCardinality-07:
LamportFastMutEx-COL-5-ReachabilityCardinality-08:
LamportFastMutEx-COL-5-ReachabilityCardinality-09:
LamportFastMutEx-COL-5-ReachabilityCardinality-10:
LamportFastMutEx-COL-5-ReachabilityCardinality-11:
LamportFastMutEx-COL-5-ReachabilityCardinality-12:
LamportFastMutEx-COL-5-ReachabilityCardinality-13:
LamportFastMutEx-COL-5-ReachabilityCardinality-14:
LamportFastMutEx-COL-5-ReachabilityCardinality-15:

PENDING FORMULAS: CATEGORY
LamportFastMutEx-COL-5-ReachabilityCardinality-01:

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA
208 EF FNDP 539/3598 0/5

Time elapsed: 541 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY
LamportFastMutEx-COL-5-ReachabilityCardinality-00:
LamportFastMutEx-COL-5-ReachabilityCardinality-02:
LamportFastMutEx-COL-5-ReachabilityCardinality-03:
LamportFastMutEx-COL-5-ReachabilityCardinality-04:
LamportFastMutEx-COL-5-ReachabilityCardinality-05:
LamportFastMutEx-COL-5-ReachabilityCardinality-06:
LamportFastMutEx-COL-5-ReachabilityCardinality-07:
LamportFastMutEx-COL-5-ReachabilityCardinality-08:
LamportFastMutEx-COL-5-ReachabilityCardinality-09:
LamportFastMutEx-COL-5-ReachabilityCardinality-10:
LamportFastMutEx-COL-5-ReachabilityCardinality-11:
LamportFastMutEx-COL-5-ReachabilityCardinality-12:
LamportFastMutEx-COL-5-ReachabilityCardinality-13:
LamportFastMutEx-COL-5-ReachabilityCardinality-14:
LamportFastMutEx-COL-5-ReachabilityCardinality-15:

PENDING FORMULAS: CATEGORY
LamportFastMutEx-COL-5-ReachabilityCardinality-01:

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA
208 EF FNDP 544/3598 0/5

Time elapsed: 546 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY
LamportFastMutEx-COL-5-ReachabilityCardinality-00:
LamportFastMutEx-COL-5-ReachabilityCardinality-02:
LamportFastMutEx-COL-5-ReachabilityCardinality-03:
LamportFastMutEx-COL-5-ReachabilityCardinality-04:
LamportFastMutEx-COL-5-ReachabilityCardinality-05:
LamportFastMutEx-COL-5-ReachabilityCardinality-06:
LamportFastMutEx-COL-5-ReachabilityCardinality-07:
LamportFastMutEx-COL-5-ReachabilityCardinality-08:
LamportFastMutEx-COL-5-ReachabilityCardinality-09:
LamportFastMutEx-COL-5-ReachabilityCardinality-10:
LamportFastMutEx-COL-5-ReachabilityCardinality-11:
LamportFastMutEx-COL-5-ReachabilityCardinality-12:
LamportFastMutEx-COL-5-ReachabilityCardinality-13:
LamportFastMutEx-COL-5-ReachabilityCardinality-14:
LamportFastMutEx-COL-5-ReachabilityCardinality-15:

PENDING FORMULAS: CATEGORY
LamportFastMutEx-COL-5-ReachabilityCardinality-01:

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA
208 EF FNDP 549/3598 0/5

Time elapsed: 551 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY
LamportFastMutEx-COL-5-ReachabilityCardinality-00:
LamportFastMutEx-COL-5-ReachabilityCardinality-02:
LamportFastMutEx-COL-5-ReachabilityCardinality-03:
LamportFastMutEx-COL-5-ReachabilityCardinality-04:
LamportFastMutEx-COL-5-ReachabilityCardinality-05:
LamportFastMutEx-COL-5-ReachabilityCardinality-06:
LamportFastMutEx-COL-5-ReachabilityCardinality-07:
LamportFastMutEx-COL-5-ReachabilityCardinality-08:
LamportFastMutEx-COL-5-ReachabilityCardinality-09:
LamportFastMutEx-COL-5-ReachabilityCardinality-10:
LamportFastMutEx-COL-5-ReachabilityCardinality-11:
LamportFastMutEx-COL-5-ReachabilityCardinality-12:
LamportFastMutEx-COL-5-ReachabilityCardinality-13:
LamportFastMutEx-COL-5-ReachabilityCardinality-14:
LamportFastMutEx-COL-5-ReachabilityCardinality-15:

PENDING FORMULAS: CATEGORY
LamportFastMutEx-COL-5-ReachabilityCardinality-01:

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA
208 EF FNDP 554/3598 0/5

Time elapsed: 556 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY
LamportFastMutEx-COL-5-ReachabilityCardinality-00:
LamportFastMutEx-COL-5-ReachabilityCardinality-02:
LamportFastMutEx-COL-5-ReachabilityCardinality-03:
LamportFastMutEx-COL-5-ReachabilityCardinality-04:
LamportFastMutEx-COL-5-ReachabilityCardinality-05:
LamportFastMutEx-COL-5-ReachabilityCardinality-06:
LamportFastMutEx-COL-5-ReachabilityCardinality-07:
LamportFastMutEx-COL-5-ReachabilityCardinality-08:
LamportFastMutEx-COL-5-ReachabilityCardinality-09:
LamportFastMutEx-COL-5-ReachabilityCardinality-10:
LamportFastMutEx-COL-5-ReachabilityCardinality-11:
LamportFastMutEx-COL-5-ReachabilityCardinality-12:
LamportFastMutEx-COL-5-ReachabilityCardinality-13:
LamportFastMutEx-COL-5-ReachabilityCardinality-14:
LamportFastMutEx-COL-5-ReachabilityCardinality-15:

PENDING FORMULAS: CATEGORY
LamportFastMutEx-COL-5-ReachabilityCardinality-01:

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA
208 EF FNDP 559/3598 0/5

Time elapsed: 561 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY
LamportFastMutEx-COL-5-ReachabilityCardinality-00:
LamportFastMutEx-COL-5-ReachabilityCardinality-02:
LamportFastMutEx-COL-5-ReachabilityCardinality-03:
LamportFastMutEx-COL-5-ReachabilityCardinality-04:
LamportFastMutEx-COL-5-ReachabilityCardinality-05:
LamportFastMutEx-COL-5-ReachabilityCardinality-06:
LamportFastMutEx-COL-5-ReachabilityCardinality-07:
LamportFastMutEx-COL-5-ReachabilityCardinality-08:
LamportFastMutEx-COL-5-ReachabilityCardinality-09:
LamportFastMutEx-COL-5-ReachabilityCardinality-10:
LamportFastMutEx-COL-5-ReachabilityCardinality-11:
LamportFastMutEx-COL-5-ReachabilityCardinality-12:
LamportFastMutEx-COL-5-ReachabilityCardinality-13:
LamportFastMutEx-COL-5-ReachabilityCardinality-14:
LamportFastMutEx-COL-5-ReachabilityCardinality-15:

PENDING FORMULAS: CATEGORY
LamportFastMutEx-COL-5-ReachabilityCardinality-01:

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA
208 EF FNDP 564/3598 0/5

Time elapsed: 566 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY
LamportFastMutEx-COL-5-ReachabilityCardinality-00:
LamportFastMutEx-COL-5-ReachabilityCardinality-02:
LamportFastMutEx-COL-5-ReachabilityCardinality-03:
LamportFastMutEx-COL-5-ReachabilityCardinality-04:
LamportFastMutEx-COL-5-ReachabilityCardinality-05:
LamportFastMutEx-COL-5-ReachabilityCardinality-06:
LamportFastMutEx-COL-5-ReachabilityCardinality-07:
LamportFastMutEx-COL-5-ReachabilityCardinality-08:
LamportFastMutEx-COL-5-ReachabilityCardinality-09:
LamportFastMutEx-COL-5-ReachabilityCardinality-10:
LamportFastMutEx-COL-5-ReachabilityCardinality-11:
LamportFastMutEx-COL-5-ReachabilityCardinality-12:
LamportFastMutEx-COL-5-ReachabilityCardinality-13:
LamportFastMutEx-COL-5-ReachabilityCardinality-14:
LamportFastMutEx-COL-5-ReachabilityCardinality-15:

PENDING FORMULAS: CATEGORY
LamportFastMutEx-COL-5-ReachabilityCardinality-01:

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA
208 EF FNDP 569/3598 0/5

Time elapsed: 571 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY
LamportFastMutEx-COL-5-ReachabilityCardinality-00:
LamportFastMutEx-COL-5-ReachabilityCardinality-02:
LamportFastMutEx-COL-5-ReachabilityCardinality-03:
LamportFastMutEx-COL-5-ReachabilityCardinality-04:
LamportFastMutEx-COL-5-ReachabilityCardinality-05:
LamportFastMutEx-COL-5-ReachabilityCardinality-06:
LamportFastMutEx-COL-5-ReachabilityCardinality-07:
LamportFastMutEx-COL-5-ReachabilityCardinality-08:
LamportFastMutEx-COL-5-ReachabilityCardinality-09:
LamportFastMutEx-COL-5-ReachabilityCardinality-10:
LamportFastMutEx-COL-5-ReachabilityCardinality-11:
LamportFastMutEx-COL-5-ReachabilityCardinality-12:
LamportFastMutEx-COL-5-ReachabilityCardinality-13:
LamportFastMutEx-COL-5-ReachabilityCardinality-14:
LamportFastMutEx-COL-5-ReachabilityCardinality-15:

PENDING FORMULAS: CATEGORY
LamportFastMutEx-COL-5-ReachabilityCardinality-01:

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA
208 EF FNDP 574/3598 0/5

Time elapsed: 576 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY
LamportFastMutEx-COL-5-ReachabilityCardinality-00:
LamportFastMutEx-COL-5-ReachabilityCardinality-02:
LamportFastMutEx-COL-5-ReachabilityCardinality-03:
LamportFastMutEx-COL-5-ReachabilityCardinality-04:
LamportFastMutEx-COL-5-ReachabilityCardinality-05:
LamportFastMutEx-COL-5-ReachabilityCardinality-06:
LamportFastMutEx-COL-5-ReachabilityCardinality-07:
LamportFastMutEx-COL-5-ReachabilityCardinality-08:
LamportFastMutEx-COL-5-ReachabilityCardinality-09:
LamportFastMutEx-COL-5-ReachabilityCardinality-10:
LamportFastMutEx-COL-5-ReachabilityCardinality-11:
LamportFastMutEx-COL-5-ReachabilityCardinality-12:
LamportFastMutEx-COL-5-ReachabilityCardinality-13:
LamportFastMutEx-COL-5-ReachabilityCardinality-14:
LamportFastMutEx-COL-5-ReachabilityCardinality-15:

PENDING FORMULAS: CATEGORY
LamportFastMutEx-COL-5-ReachabilityCardinality-01:

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA
208 EF FNDP 579/3598 0/5

Time elapsed: 581 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY
LamportFastMutEx-COL-5-ReachabilityCardinality-00:
LamportFastMutEx-COL-5-ReachabilityCardinality-02:
LamportFastMutEx-COL-5-ReachabilityCardinality-03:
LamportFastMutEx-COL-5-ReachabilityCardinality-04:
LamportFastMutEx-COL-5-ReachabilityCardinality-05:
LamportFastMutEx-COL-5-ReachabilityCardinality-06:
LamportFastMutEx-COL-5-ReachabilityCardinality-07:
LamportFastMutEx-COL-5-ReachabilityCardinality-08:
LamportFastMutEx-COL-5-ReachabilityCardinality-09:
LamportFastMutEx-COL-5-ReachabilityCardinality-10:
LamportFastMutEx-COL-5-ReachabilityCardinality-11:
LamportFastMutEx-COL-5-ReachabilityCardinality-12:
LamportFastMutEx-COL-5-ReachabilityCardinality-13:
LamportFastMutEx-COL-5-ReachabilityCardinality-14:
LamportFastMutEx-COL-5-ReachabilityCardinality-15:

PENDING FORMULAS: CATEGORY
LamportFastMutEx-COL-5-ReachabilityCardinality-01:

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA
208 EF FNDP 584/3598 0/5

Time elapsed: 586 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY
LamportFastMutEx-COL-5-ReachabilityCardinality-00:
LamportFastMutEx-COL-5-ReachabilityCardinality-02:
LamportFastMutEx-COL-5-ReachabilityCardinality-03:
LamportFastMutEx-COL-5-ReachabilityCardinality-04:
LamportFastMutEx-COL-5-ReachabilityCardinality-05:
LamportFastMutEx-COL-5-ReachabilityCardinality-06:
LamportFastMutEx-COL-5-ReachabilityCardinality-07:
LamportFastMutEx-COL-5-ReachabilityCardinality-08:
LamportFastMutEx-COL-5-ReachabilityCardinality-09:
LamportFastMutEx-COL-5-ReachabilityCardinality-10:
LamportFastMutEx-COL-5-ReachabilityCardinality-11:
LamportFastMutEx-COL-5-ReachabilityCardinality-12:
LamportFastMutEx-COL-5-ReachabilityCardinality-13:
LamportFastMutEx-COL-5-ReachabilityCardinality-14:
LamportFastMutEx-COL-5-ReachabilityCardinality-15:

PENDING FORMULAS: CATEGORY
LamportFastMutEx-COL-5-ReachabilityCardinality-01:

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA
208 EF FNDP 589/3598 0/5

Time elapsed: 591 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY
LamportFastMutEx-COL-5-ReachabilityCardinality-00:
LamportFastMutEx-COL-5-ReachabilityCardinality-02:
LamportFastMutEx-COL-5-ReachabilityCardinality-03:
LamportFastMutEx-COL-5-ReachabilityCardinality-04:
LamportFastMutEx-COL-5-ReachabilityCardinality-05:
LamportFastMutEx-COL-5-ReachabilityCardinality-06:
LamportFastMutEx-COL-5-ReachabilityCardinality-07:
LamportFastMutEx-COL-5-ReachabilityCardinality-08:
LamportFastMutEx-COL-5-ReachabilityCardinality-09:
LamportFastMutEx-COL-5-ReachabilityCardinality-10:
LamportFastMutEx-COL-5-ReachabilityCardinality-11:
LamportFastMutEx-COL-5-ReachabilityCardinality-12:
LamportFastMutEx-COL-5-ReachabilityCardinality-13:
LamportFastMutEx-COL-5-ReachabilityCardinality-14:
LamportFastMutEx-COL-5-ReachabilityCardinality-15:

PENDING FORMULAS: CATEGORY
LamportFastMutEx-COL-5-ReachabilityCardinality-01:

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA
208 EF FNDP 594/3598 0/5

Time elapsed: 596 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY
LamportFastMutEx-COL-5-ReachabilityCardinality-00:
LamportFastMutEx-COL-5-ReachabilityCardinality-02:
LamportFastMutEx-COL-5-ReachabilityCardinality-03:
LamportFastMutEx-COL-5-ReachabilityCardinality-04:
LamportFastMutEx-COL-5-ReachabilityCardinality-05:
LamportFastMutEx-COL-5-ReachabilityCardinality-06:
LamportFastMutEx-COL-5-ReachabilityCardinality-07:
LamportFastMutEx-COL-5-ReachabilityCardinality-08:
LamportFastMutEx-COL-5-ReachabilityCardinality-09:
LamportFastMutEx-COL-5-ReachabilityCardinality-10:
LamportFastMutEx-COL-5-ReachabilityCardinality-11:
LamportFastMutEx-COL-5-ReachabilityCardinality-12:
LamportFastMutEx-COL-5-ReachabilityCardinality-13:
LamportFastMutEx-COL-5-ReachabilityCardinality-14:
LamportFastMutEx-COL-5-ReachabilityCardinality-15:

PENDING FORMULAS: CATEGORY
LamportFastMutEx-COL-5-ReachabilityCardinality-01:

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA
208 EF FNDP 599/3598 0/5

Time elapsed: 601 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY
LamportFastMutEx-COL-5-ReachabilityCardinality-00:
LamportFastMutEx-COL-5-ReachabilityCardinality-02:
LamportFastMutEx-COL-5-ReachabilityCardinality-03:
LamportFastMutEx-COL-5-ReachabilityCardinality-04:
LamportFastMutEx-COL-5-ReachabilityCardinality-05:
LamportFastMutEx-COL-5-ReachabilityCardinality-06:
LamportFastMutEx-COL-5-ReachabilityCardinality-07:
LamportFastMutEx-COL-5-ReachabilityCardinality-08:
LamportFastMutEx-COL-5-ReachabilityCardinality-09:
LamportFastMutEx-COL-5-ReachabilityCardinality-10:
LamportFastMutEx-COL-5-ReachabilityCardinality-11:
LamportFastMutEx-COL-5-ReachabilityCardinality-12:
LamportFastMutEx-COL-5-ReachabilityCardinality-13:
LamportFastMutEx-COL-5-ReachabilityCardinality-14:
LamportFastMutEx-COL-5-ReachabilityCardinality-15:

PENDING FORMULAS: CATEGORY
LamportFastMutEx-COL-5-ReachabilityCardinality-01:

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA
208 EF FNDP 604/3598 0/5

Time elapsed: 606 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY
LamportFastMutEx-COL-5-ReachabilityCardinality-00:
LamportFastMutEx-COL-5-ReachabilityCardinality-02:
LamportFastMutEx-COL-5-ReachabilityCardinality-03:
LamportFastMutEx-COL-5-ReachabilityCardinality-04:
LamportFastMutEx-COL-5-ReachabilityCardinality-05:
LamportFastMutEx-COL-5-ReachabilityCardinality-06:
LamportFastMutEx-COL-5-ReachabilityCardinality-07:
LamportFastMutEx-COL-5-ReachabilityCardinality-08:
LamportFastMutEx-COL-5-ReachabilityCardinality-09:
LamportFastMutEx-COL-5-ReachabilityCardinality-10:
LamportFastMutEx-COL-5-ReachabilityCardinality-11:
LamportFastMutEx-COL-5-ReachabilityCardinality-12:
LamportFastMutEx-COL-5-ReachabilityCardinality-13:
LamportFastMutEx-COL-5-ReachabilityCardinality-14:
LamportFastMutEx-COL-5-ReachabilityCardinality-15:

PENDING FORMULAS: CATEGORY
LamportFastMutEx-COL-5-ReachabilityCardinality-01:

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA
208 EF FNDP 609/3598 0/5

Time elapsed: 611 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY
LamportFastMutEx-COL-5-ReachabilityCardinality-00:
LamportFastMutEx-COL-5-ReachabilityCardinality-02:
LamportFastMutEx-COL-5-ReachabilityCardinality-03:
LamportFastMutEx-COL-5-ReachabilityCardinality-04:
LamportFastMutEx-COL-5-ReachabilityCardinality-05:
LamportFastMutEx-COL-5-ReachabilityCardinality-06:
LamportFastMutEx-COL-5-ReachabilityCardinality-07:
LamportFastMutEx-COL-5-ReachabilityCardinality-08:
LamportFastMutEx-COL-5-ReachabilityCardinality-09:
LamportFastMutEx-COL-5-ReachabilityCardinality-10:
LamportFastMutEx-COL-5-ReachabilityCardinality-11:
LamportFastMutEx-COL-5-ReachabilityCardinality-12:
LamportFastMutEx-COL-5-ReachabilityCardinality-13:
LamportFastMutEx-COL-5-ReachabilityCardinality-14:
LamportFastMutEx-COL-5-ReachabilityCardinality-15:

PENDING FORMULAS: CATEGORY
LamportFastMutEx-COL-5-ReachabilityCardinality-01:

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA
208 EF FNDP 614/3598 0/5

Time elapsed: 616 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY
LamportFastMutEx-COL-5-ReachabilityCardinality-00:
LamportFastMutEx-COL-5-ReachabilityCardinality-02:
LamportFastMutEx-COL-5-ReachabilityCardinality-03:
LamportFastMutEx-COL-5-ReachabilityCardinality-04:
LamportFastMutEx-COL-5-ReachabilityCardinality-05:
LamportFastMutEx-COL-5-ReachabilityCardinality-06:
LamportFastMutEx-COL-5-ReachabilityCardinality-07:
LamportFastMutEx-COL-5-ReachabilityCardinality-08:
LamportFastMutEx-COL-5-ReachabilityCardinality-09:
LamportFastMutEx-COL-5-ReachabilityCardinality-10:
LamportFastMutEx-COL-5-ReachabilityCardinality-11:
LamportFastMutEx-COL-5-ReachabilityCardinality-12:
LamportFastMutEx-COL-5-ReachabilityCardinality-13:
LamportFastMutEx-COL-5-ReachabilityCardinality-14:
LamportFastMutEx-COL-5-ReachabilityCardinality-15:

PENDING FORMULAS: CATEGORY
LamportFastMutEx-COL-5-ReachabilityCardinality-01:

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA
208 EF FNDP 619/3598 0/5

Time elapsed: 621 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY
LamportFastMutEx-COL-5-ReachabilityCardinality-00:
LamportFastMutEx-COL-5-ReachabilityCardinality-02:
LamportFastMutEx-COL-5-ReachabilityCardinality-03:
LamportFastMutEx-COL-5-ReachabilityCardinality-04:
LamportFastMutEx-COL-5-ReachabilityCardinality-05:
LamportFastMutEx-COL-5-ReachabilityCardinality-06:
LamportFastMutEx-COL-5-ReachabilityCardinality-07:
LamportFastMutEx-COL-5-ReachabilityCardinality-08:
LamportFastMutEx-COL-5-ReachabilityCardinality-09:
LamportFastMutEx-COL-5-ReachabilityCardinality-10:
LamportFastMutEx-COL-5-ReachabilityCardinality-11:
LamportFastMutEx-COL-5-ReachabilityCardinality-12:
LamportFastMutEx-COL-5-ReachabilityCardinality-13:
LamportFastMutEx-COL-5-ReachabilityCardinality-14:
LamportFastMutEx-COL-5-ReachabilityCardinality-15:

PENDING FORMULAS: CATEGORY
LamportFastMutEx-COL-5-ReachabilityCardinality-01:

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA
208 EF FNDP 624/3598 0/5

Time elapsed: 626 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY
LamportFastMutEx-COL-5-ReachabilityCardinality-00:
LamportFastMutEx-COL-5-ReachabilityCardinality-02:
LamportFastMutEx-COL-5-ReachabilityCardinality-03:
LamportFastMutEx-COL-5-ReachabilityCardinality-04:
LamportFastMutEx-COL-5-ReachabilityCardinality-05:
LamportFastMutEx-COL-5-ReachabilityCardinality-06:
LamportFastMutEx-COL-5-ReachabilityCardinality-07:
LamportFastMutEx-COL-5-ReachabilityCardinality-08:
LamportFastMutEx-COL-5-ReachabilityCardinality-09:
LamportFastMutEx-COL-5-ReachabilityCardinality-10:
LamportFastMutEx-COL-5-ReachabilityCardinality-11:
LamportFastMutEx-COL-5-ReachabilityCardinality-12:
LamportFastMutEx-COL-5-ReachabilityCardinality-13:
LamportFastMutEx-COL-5-ReachabilityCardinality-14:
LamportFastMutEx-COL-5-ReachabilityCardinality-15:

PENDING FORMULAS: CATEGORY
LamportFastMutEx-COL-5-ReachabilityCardinality-01:

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA
208 EF FNDP 629/3598 0/5

Time elapsed: 631 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY
LamportFastMutEx-COL-5-ReachabilityCardinality-00:
LamportFastMutEx-COL-5-ReachabilityCardinality-02:
LamportFastMutEx-COL-5-ReachabilityCardinality-03:
LamportFastMutEx-COL-5-ReachabilityCardinality-04:
LamportFastMutEx-COL-5-ReachabilityCardinality-05:
LamportFastMutEx-COL-5-ReachabilityCardinality-06:
LamportFastMutEx-COL-5-ReachabilityCardinality-07:
LamportFastMutEx-COL-5-ReachabilityCardinality-08:
LamportFastMutEx-COL-5-ReachabilityCardinality-09:
LamportFastMutEx-COL-5-ReachabilityCardinality-10:
LamportFastMutEx-COL-5-ReachabilityCardinality-11:
LamportFastMutEx-COL-5-ReachabilityCardinality-12:
LamportFastMutEx-COL-5-ReachabilityCardinality-13:
LamportFastMutEx-COL-5-ReachabilityCardinality-14:
LamportFastMutEx-COL-5-ReachabilityCardinality-15:

PENDING FORMULAS: CATEGORY
LamportFastMutEx-COL-5-ReachabilityCardinality-01:

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA
208 EF FNDP 634/3598 0/5

Time elapsed: 636 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY
LamportFastMutEx-COL-5-ReachabilityCardinality-00:
LamportFastMutEx-COL-5-ReachabilityCardinality-02:
LamportFastMutEx-COL-5-ReachabilityCardinality-03:
LamportFastMutEx-COL-5-ReachabilityCardinality-04:
LamportFastMutEx-COL-5-ReachabilityCardinality-05:
LamportFastMutEx-COL-5-ReachabilityCardinality-06:
LamportFastMutEx-COL-5-ReachabilityCardinality-07:
LamportFastMutEx-COL-5-ReachabilityCardinality-08:
LamportFastMutEx-COL-5-ReachabilityCardinality-09:
LamportFastMutEx-COL-5-ReachabilityCardinality-10:
LamportFastMutEx-COL-5-ReachabilityCardinality-11:
LamportFastMutEx-COL-5-ReachabilityCardinality-12:
LamportFastMutEx-COL-5-ReachabilityCardinality-13:
LamportFastMutEx-COL-5-ReachabilityCardinality-14:
LamportFastMutEx-COL-5-ReachabilityCardinality-15:

PENDING FORMULAS: CATEGORY
LamportFastMutEx-COL-5-ReachabilityCardinality-01:

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA
208 EF FNDP 639/3598 0/5

Time elapsed: 641 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY
LamportFastMutEx-COL-5-ReachabilityCardinality-00:
LamportFastMutEx-COL-5-ReachabilityCardinality-02:
LamportFastMutEx-COL-5-ReachabilityCardinality-03:
LamportFastMutEx-COL-5-ReachabilityCardinality-04:
LamportFastMutEx-COL-5-ReachabilityCardinality-05:
LamportFastMutEx-COL-5-ReachabilityCardinality-06:
LamportFastMutEx-COL-5-ReachabilityCardinality-07:
LamportFastMutEx-COL-5-ReachabilityCardinality-08:
LamportFastMutEx-COL-5-ReachabilityCardinality-09:
LamportFastMutEx-COL-5-ReachabilityCardinality-10:
LamportFastMutEx-COL-5-ReachabilityCardinality-11:
LamportFastMutEx-COL-5-ReachabilityCardinality-12:
LamportFastMutEx-COL-5-ReachabilityCardinality-13:
LamportFastMutEx-COL-5-ReachabilityCardinality-14:
LamportFastMutEx-COL-5-ReachabilityCardinality-15:

PENDING FORMULAS: CATEGORY
LamportFastMutEx-COL-5-ReachabilityCardinality-01:

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA
208 EF FNDP 644/3598 0/5

Time elapsed: 646 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY
LamportFastMutEx-COL-5-ReachabilityCardinality-00:
LamportFastMutEx-COL-5-ReachabilityCardinality-02:
LamportFastMutEx-COL-5-ReachabilityCardinality-03:
LamportFastMutEx-COL-5-ReachabilityCardinality-04:
LamportFastMutEx-COL-5-ReachabilityCardinality-05:
LamportFastMutEx-COL-5-ReachabilityCardinality-06:
LamportFastMutEx-COL-5-ReachabilityCardinality-07:
LamportFastMutEx-COL-5-ReachabilityCardinality-08:
LamportFastMutEx-COL-5-ReachabilityCardinality-09:
LamportFastMutEx-COL-5-ReachabilityCardinality-10:
LamportFastMutEx-COL-5-ReachabilityCardinality-11:
LamportFastMutEx-COL-5-ReachabilityCardinality-12:
LamportFastMutEx-COL-5-ReachabilityCardinality-13:
LamportFastMutEx-COL-5-ReachabilityCardinality-14:
LamportFastMutEx-COL-5-ReachabilityCardinality-15:

PENDING FORMULAS: CATEGORY
LamportFastMutEx-COL-5-ReachabilityCardinality-01:

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA
208 EF FNDP 649/3598 0/5

Time elapsed: 651 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY
LamportFastMutEx-COL-5-ReachabilityCardinality-00:
LamportFastMutEx-COL-5-ReachabilityCardinality-02:
LamportFastMutEx-COL-5-ReachabilityCardinality-03:
LamportFastMutEx-COL-5-ReachabilityCardinality-04:
LamportFastMutEx-COL-5-ReachabilityCardinality-05:
LamportFastMutEx-COL-5-ReachabilityCardinality-06:
LamportFastMutEx-COL-5-ReachabilityCardinality-07:
LamportFastMutEx-COL-5-ReachabilityCardinality-08:
LamportFastMutEx-COL-5-ReachabilityCardinality-09:
LamportFastMutEx-COL-5-ReachabilityCardinality-10:
LamportFastMutEx-COL-5-ReachabilityCardinality-11:
LamportFastMutEx-COL-5-ReachabilityCardinality-12:
LamportFastMutEx-COL-5-ReachabilityCardinality-13:
LamportFastMutEx-COL-5-ReachabilityCardinality-14:
LamportFastMutEx-COL-5-ReachabilityCardinality-15:

PENDING FORMULAS: CATEGORY
LamportFastMutEx-COL-5-ReachabilityCardinality-01:

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA
208 EF FNDP 654/3598 0/5

Time elapsed: 656 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY
LamportFastMutEx-COL-5-ReachabilityCardinality-00:
LamportFastMutEx-COL-5-ReachabilityCardinality-02:
LamportFastMutEx-COL-5-ReachabilityCardinality-03:
LamportFastMutEx-COL-5-ReachabilityCardinality-04:
LamportFastMutEx-COL-5-ReachabilityCardinality-05:
LamportFastMutEx-COL-5-ReachabilityCardinality-06:
LamportFastMutEx-COL-5-ReachabilityCardinality-07:
LamportFastMutEx-COL-5-ReachabilityCardinality-08:
LamportFastMutEx-COL-5-ReachabilityCardinality-09:
LamportFastMutEx-COL-5-ReachabilityCardinality-10:
LamportFastMutEx-COL-5-ReachabilityCardinality-11:
LamportFastMutEx-COL-5-ReachabilityCardinality-12:
LamportFastMutEx-COL-5-ReachabilityCardinality-13:
LamportFastMutEx-COL-5-ReachabilityCardinality-14:
LamportFastMutEx-COL-5-ReachabilityCardinality-15:

PENDING FORMULAS: CATEGORY
LamportFastMutEx-COL-5-ReachabilityCardinality-01:

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA
208 EF FNDP 659/3598 0/5

Time elapsed: 661 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY
LamportFastMutEx-COL-5-ReachabilityCardinality-00:
LamportFastMutEx-COL-5-ReachabilityCardinality-02:
LamportFastMutEx-COL-5-ReachabilityCardinality-03:
LamportFastMutEx-COL-5-ReachabilityCardinality-04:
LamportFastMutEx-COL-5-ReachabilityCardinality-05:
LamportFastMutEx-COL-5-ReachabilityCardinality-06:
LamportFastMutEx-COL-5-ReachabilityCardinality-07:
LamportFastMutEx-COL-5-ReachabilityCardinality-08:
LamportFastMutEx-COL-5-ReachabilityCardinality-09:
LamportFastMutEx-COL-5-ReachabilityCardinality-10:
LamportFastMutEx-COL-5-ReachabilityCardinality-11:
LamportFastMutEx-COL-5-ReachabilityCardinality-12:
LamportFastMutEx-COL-5-ReachabilityCardinality-13:
LamportFastMutEx-COL-5-ReachabilityCardinality-14:
LamportFastMutEx-COL-5-ReachabilityCardinality-15:

PENDING FORMULAS: CATEGORY
LamportFastMutEx-COL-5-ReachabilityCardinality-01:

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA
208 EF FNDP 664/3598 0/5

Time elapsed: 666 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY
LamportFastMutEx-COL-5-ReachabilityCardinality-00:
LamportFastMutEx-COL-5-ReachabilityCardinality-02:
LamportFastMutEx-COL-5-ReachabilityCardinality-03:
LamportFastMutEx-COL-5-ReachabilityCardinality-04:
LamportFastMutEx-COL-5-ReachabilityCardinality-05:
LamportFastMutEx-COL-5-ReachabilityCardinality-06:
LamportFastMutEx-COL-5-ReachabilityCardinality-07:
LamportFastMutEx-COL-5-ReachabilityCardinality-08:
LamportFastMutEx-COL-5-ReachabilityCardinality-09:
LamportFastMutEx-COL-5-ReachabilityCardinality-10:
LamportFastMutEx-COL-5-ReachabilityCardinality-11:
LamportFastMutEx-COL-5-ReachabilityCardinality-12:
LamportFastMutEx-COL-5-ReachabilityCardinality-13:
LamportFastMutEx-COL-5-ReachabilityCardinality-14:
LamportFastMutEx-COL-5-ReachabilityCardinality-15:

PENDING FORMULAS: CATEGORY
LamportFastMutEx-COL-5-ReachabilityCardinality-01:

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA
208 EF FNDP 669/3598 0/5

Time elapsed: 671 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
lola: FINISHED task # 246 (type EQUN) for
lola: result : unknown
FINISHED FORMULA: CATEGORY
LamportFastMutEx-COL-5-ReachabilityCardinality-00:
LamportFastMutEx-COL-5-ReachabilityCardinality-02:
LamportFastMutEx-COL-5-ReachabilityCardinality-03:
LamportFastMutEx-COL-5-ReachabilityCardinality-04:
LamportFastMutEx-COL-5-ReachabilityCardinality-05:
LamportFastMutEx-COL-5-ReachabilityCardinality-06:
LamportFastMutEx-COL-5-ReachabilityCardinality-07:
LamportFastMutEx-COL-5-ReachabilityCardinality-08:
LamportFastMutEx-COL-5-ReachabilityCardinality-09:
LamportFastMutEx-COL-5-ReachabilityCardinality-10:
LamportFastMutEx-COL-5-ReachabilityCardinality-11:
LamportFastMutEx-COL-5-ReachabilityCardinality-12:
LamportFastMutEx-COL-5-ReachabilityCardinality-13:
LamportFastMutEx-COL-5-ReachabilityCardinality-14:
LamportFastMutEx-COL-5-ReachabilityCardinality-15:

PENDING FORMULAS: CATEGORY
LamportFastMutEx-COL-5-ReachabilityCardinality-01:

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA
208 EF FNDP 674/3598 0/5

Time elapsed: 676 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY
LamportFastMutEx-COL-5-ReachabilityCardinality-00:
LamportFastMutEx-COL-5-ReachabilityCardinality-02:
LamportFastMutEx-COL-5-ReachabilityCardinality-03:
LamportFastMutEx-COL-5-ReachabilityCardinality-04:
LamportFastMutEx-COL-5-ReachabilityCardinality-05:
LamportFastMutEx-COL-5-ReachabilityCardinality-06:
LamportFastMutEx-COL-5-ReachabilityCardinality-07:
LamportFastMutEx-COL-5-ReachabilityCardinality-08:
LamportFastMutEx-COL-5-ReachabilityCardinality-09:
LamportFastMutEx-COL-5-ReachabilityCardinality-10:
LamportFastMutEx-COL-5-ReachabilityCardinality-11:
LamportFastMutEx-COL-5-ReachabilityCardinality-12:
LamportFastMutEx-COL-5-ReachabilityCardinality-13:
LamportFastMutEx-COL-5-ReachabilityCardinality-14:
LamportFastMutEx-COL-5-ReachabilityCardinality-15:

PENDING FORMULAS: CATEGORY
LamportFastMutEx-COL-5-ReachabilityCardinality-01:

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA
208 EF FNDP 679/3598 0/5

Time elapsed: 681 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY
LamportFastMutEx-COL-5-ReachabilityCardinality-00:
LamportFastMutEx-COL-5-ReachabilityCardinality-02:
LamportFastMutEx-COL-5-ReachabilityCardinality-03:
LamportFastMutEx-COL-5-ReachabilityCardinality-04:
LamportFastMutEx-COL-5-ReachabilityCardinality-05:
LamportFastMutEx-COL-5-ReachabilityCardinality-06:
LamportFastMutEx-COL-5-ReachabilityCardinality-07:
LamportFastMutEx-COL-5-ReachabilityCardinality-08:
LamportFastMutEx-COL-5-ReachabilityCardinality-09:
LamportFastMutEx-COL-5-ReachabilityCardinality-10:
LamportFastMutEx-COL-5-ReachabilityCardinality-11:
LamportFastMutEx-COL-5-ReachabilityCardinality-12:
LamportFastMutEx-COL-5-ReachabilityCardinality-13:
LamportFastMutEx-COL-5-ReachabilityCardinality-14:
LamportFastMutEx-COL-5-ReachabilityCardinality-15:

PENDING FORMULAS: CATEGORY
LamportFastMutEx-COL-5-ReachabilityCardinality-01:

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA
208 EF FNDP 684/3598 0/5

Time elapsed: 686 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY
LamportFastMutEx-COL-5-ReachabilityCardinality-00:
LamportFastMutEx-COL-5-ReachabilityCardinality-02:
LamportFastMutEx-COL-5-ReachabilityCardinality-03:
LamportFastMutEx-COL-5-ReachabilityCardinality-04:
LamportFastMutEx-COL-5-ReachabilityCardinality-05:
LamportFastMutEx-COL-5-ReachabilityCardinality-06:
LamportFastMutEx-COL-5-ReachabilityCardinality-07:
LamportFastMutEx-COL-5-ReachabilityCardinality-08:
LamportFastMutEx-COL-5-ReachabilityCardinality-09:
LamportFastMutEx-COL-5-ReachabilityCardinality-10:
LamportFastMutEx-COL-5-ReachabilityCardinality-11:
LamportFastMutEx-COL-5-ReachabilityCardinality-12:
LamportFastMutEx-COL-5-ReachabilityCardinality-13:
LamportFastMutEx-COL-5-ReachabilityCardinality-14:
LamportFastMutEx-COL-5-ReachabilityCardinality-15:

PENDING FORMULAS: CATEGORY
LamportFastMutEx-COL-5-ReachabilityCardinality-01:

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA
208 EF FNDP 689/3598 0/5

Time elapsed: 691 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY
LamportFastMutEx-COL-5-ReachabilityCardinality-00:
LamportFastMutEx-COL-5-ReachabilityCardinality-02:
LamportFastMutEx-COL-5-ReachabilityCardinality-03:
LamportFastMutEx-COL-5-ReachabilityCardinality-04:
LamportFastMutEx-COL-5-ReachabilityCardinality-05:
LamportFastMutEx-COL-5-ReachabilityCardinality-06:
LamportFastMutEx-COL-5-ReachabilityCardinality-07:
LamportFastMutEx-COL-5-ReachabilityCardinality-08:
LamportFastMutEx-COL-5-ReachabilityCardinality-09:
LamportFastMutEx-COL-5-ReachabilityCardinality-10:
LamportFastMutEx-COL-5-ReachabilityCardinality-11:
LamportFastMutEx-COL-5-ReachabilityCardinality-12:
LamportFastMutEx-COL-5-ReachabilityCardinality-13:
LamportFastMutEx-COL-5-ReachabilityCardinality-14:
LamportFastMutEx-COL-5-ReachabilityCardinality-15:

PENDING FORMULAS: CATEGORY
LamportFastMutEx-COL-5-ReachabilityCardinality-01:

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA
208 EF FNDP 694/3598 0/5

Time elapsed: 696 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY
LamportFastMutEx-COL-5-ReachabilityCardinality-00:
LamportFastMutEx-COL-5-ReachabilityCardinality-02:
LamportFastMutEx-COL-5-ReachabilityCardinality-03:
LamportFastMutEx-COL-5-ReachabilityCardinality-04:
LamportFastMutEx-COL-5-ReachabilityCardinality-05:
LamportFastMutEx-COL-5-ReachabilityCardinality-06:
LamportFastMutEx-COL-5-ReachabilityCardinality-07:
LamportFastMutEx-COL-5-ReachabilityCardinality-08:
LamportFastMutEx-COL-5-ReachabilityCardinality-09:
LamportFastMutEx-COL-5-ReachabilityCardinality-10:
LamportFastMutEx-COL-5-ReachabilityCardinality-11:
LamportFastMutEx-COL-5-ReachabilityCardinality-12:
LamportFastMutEx-COL-5-ReachabilityCardinality-13:
LamportFastMutEx-COL-5-ReachabilityCardinality-14:
LamportFastMutEx-COL-5-ReachabilityCardinality-15:

PENDING FORMULAS: CATEGORY
LamportFastMutEx-COL-5-ReachabilityCardinality-01:

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA
208 EF FNDP 699/3598 0/5

Time elapsed: 701 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY
LamportFastMutEx-COL-5-ReachabilityCardinality-00:
LamportFastMutEx-COL-5-ReachabilityCardinality-02:
LamportFastMutEx-COL-5-ReachabilityCardinality-03:
LamportFastMutEx-COL-5-ReachabilityCardinality-04:
LamportFastMutEx-COL-5-ReachabilityCardinality-05:
LamportFastMutEx-COL-5-ReachabilityCardinality-06:
LamportFastMutEx-COL-5-ReachabilityCardinality-07:
LamportFastMutEx-COL-5-ReachabilityCardinality-08:
LamportFastMutEx-COL-5-ReachabilityCardinality-09:
LamportFastMutEx-COL-5-ReachabilityCardinality-10:
LamportFastMutEx-COL-5-ReachabilityCardinality-11:
LamportFastMutEx-COL-5-ReachabilityCardinality-12:
LamportFastMutEx-COL-5-ReachabilityCardinality-13:
LamportFastMutEx-COL-5-ReachabilityCardinality-14:
LamportFastMutEx-COL-5-ReachabilityCardinality-15:

PENDING FORMULAS: CATEGORY
LamportFastMutEx-COL-5-ReachabilityCardinality-01:

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA
208 EF FNDP 704/3598 0/5

Time elapsed: 706 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY
LamportFastMutEx-COL-5-ReachabilityCardinality-00:
LamportFastMutEx-COL-5-ReachabilityCardinality-02:
LamportFastMutEx-COL-5-ReachabilityCardinality-03:
LamportFastMutEx-COL-5-ReachabilityCardinality-04:
LamportFastMutEx-COL-5-ReachabilityCardinality-05:
LamportFastMutEx-COL-5-ReachabilityCardinality-06:
LamportFastMutEx-COL-5-ReachabilityCardinality-07:
LamportFastMutEx-COL-5-ReachabilityCardinality-08:
LamportFastMutEx-COL-5-ReachabilityCardinality-09:
LamportFastMutEx-COL-5-ReachabilityCardinality-10:
LamportFastMutEx-COL-5-ReachabilityCardinality-11:
LamportFastMutEx-COL-5-ReachabilityCardinality-12:
LamportFastMutEx-COL-5-ReachabilityCardinality-13:
LamportFastMutEx-COL-5-ReachabilityCardinality-14:
LamportFastMutEx-COL-5-ReachabilityCardinality-15:

PENDING FORMULAS: CATEGORY
LamportFastMutEx-COL-5-ReachabilityCardinality-01:

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA
208 EF FNDP 709/3598 0/5

Time elapsed: 711 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY
LamportFastMutEx-COL-5-ReachabilityCardinality-00:
LamportFastMutEx-COL-5-ReachabilityCardinality-02:
LamportFastMutEx-COL-5-ReachabilityCardinality-03:
LamportFastMutEx-COL-5-ReachabilityCardinality-04:
LamportFastMutEx-COL-5-ReachabilityCardinality-05:
LamportFastMutEx-COL-5-ReachabilityCardinality-06:
LamportFastMutEx-COL-5-ReachabilityCardinality-07:
LamportFastMutEx-COL-5-ReachabilityCardinality-08:
LamportFastMutEx-COL-5-ReachabilityCardinality-09:
LamportFastMutEx-COL-5-ReachabilityCardinality-10:
LamportFastMutEx-COL-5-ReachabilityCardinality-11:
LamportFastMutEx-COL-5-ReachabilityCardinality-12:
LamportFastMutEx-COL-5-ReachabilityCardinality-13:
LamportFastMutEx-COL-5-ReachabilityCardinality-14:
LamportFastMutEx-COL-5-ReachabilityCardinality-15:

PENDING FORMULAS: CATEGORY
LamportFastMutEx-COL-5-ReachabilityCardinality-01:

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA
208 EF FNDP 714/3598 0/5

Time elapsed: 716 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY
LamportFastMutEx-COL-5-ReachabilityCardinality-00:
LamportFastMutEx-COL-5-ReachabilityCardinality-02:
LamportFastMutEx-COL-5-ReachabilityCardinality-03:
LamportFastMutEx-COL-5-ReachabilityCardinality-04:
LamportFastMutEx-COL-5-ReachabilityCardinality-05:
LamportFastMutEx-COL-5-ReachabilityCardinality-06:
LamportFastMutEx-COL-5-ReachabilityCardinality-07:
LamportFastMutEx-COL-5-ReachabilityCardinality-08:
LamportFastMutEx-COL-5-ReachabilityCardinality-09:
LamportFastMutEx-COL-5-ReachabilityCardinality-10:
LamportFastMutEx-COL-5-ReachabilityCardinality-11:
LamportFastMutEx-COL-5-ReachabilityCardinality-12:
LamportFastMutEx-COL-5-ReachabilityCardinality-13:
LamportFastMutEx-COL-5-ReachabilityCardinality-14:
LamportFastMutEx-COL-5-ReachabilityCardinality-15:

PENDING FORMULAS: CATEGORY
LamportFastMutEx-COL-5-ReachabilityCardinality-01:

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA
208 EF FNDP 719/3598 0/5

Time elapsed: 721 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY
LamportFastMutEx-COL-5-ReachabilityCardinality-00:
LamportFastMutEx-COL-5-ReachabilityCardinality-02:
LamportFastMutEx-COL-5-ReachabilityCardinality-03:
LamportFastMutEx-COL-5-ReachabilityCardinality-04:
LamportFastMutEx-COL-5-ReachabilityCardinality-05:
LamportFastMutEx-COL-5-ReachabilityCardinality-06:
LamportFastMutEx-COL-5-ReachabilityCardinality-07:
LamportFastMutEx-COL-5-ReachabilityCardinality-08:
LamportFastMutEx-COL-5-ReachabilityCardinality-09:
LamportFastMutEx-COL-5-ReachabilityCardinality-10:
LamportFastMutEx-COL-5-ReachabilityCardinality-11:
LamportFastMutEx-COL-5-ReachabilityCardinality-12:
LamportFastMutEx-COL-5-ReachabilityCardinality-13:
LamportFastMutEx-COL-5-ReachabilityCardinality-14:
LamportFastMutEx-COL-5-ReachabilityCardinality-15:

PENDING FORMULAS: CATEGORY
LamportFastMutEx-COL-5-ReachabilityCardinality-01:

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA
208 EF FNDP 724/3598 0/5

Time elapsed: 726 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY
LamportFastMutEx-COL-5-ReachabilityCardinality-00:
LamportFastMutEx-COL-5-ReachabilityCardinality-02:
LamportFastMutEx-COL-5-ReachabilityCardinality-03:
LamportFastMutEx-COL-5-ReachabilityCardinality-04:
LamportFastMutEx-COL-5-ReachabilityCardinality-05:
LamportFastMutEx-COL-5-ReachabilityCardinality-06:
LamportFastMutEx-COL-5-ReachabilityCardinality-07:
LamportFastMutEx-COL-5-ReachabilityCardinality-08:
LamportFastMutEx-COL-5-ReachabilityCardinality-09:
LamportFastMutEx-COL-5-ReachabilityCardinality-10:
LamportFastMutEx-COL-5-ReachabilityCardinality-11:
LamportFastMutEx-COL-5-ReachabilityCardinality-12:
LamportFastMutEx-COL-5-ReachabilityCardinality-13:
LamportFastMutEx-COL-5-ReachabilityCardinality-14:
LamportFastMutEx-COL-5-ReachabilityCardinality-15:

PENDING FORMULAS: CATEGORY
LamportFastMutEx-COL-5-ReachabilityCardinality-01:

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA
208 EF FNDP 729/3598 0/5

Time elapsed: 731 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY
LamportFastMutEx-COL-5-ReachabilityCardinality-00:
LamportFastMutEx-COL-5-ReachabilityCardinality-02:
LamportFastMutEx-COL-5-ReachabilityCardinality-03:
LamportFastMutEx-COL-5-ReachabilityCardinality-04:
LamportFastMutEx-COL-5-ReachabilityCardinality-05:
LamportFastMutEx-COL-5-ReachabilityCardinality-06:
LamportFastMutEx-COL-5-ReachabilityCardinality-07:
LamportFastMutEx-COL-5-ReachabilityCardinality-08:
LamportFastMutEx-COL-5-ReachabilityCardinality-09:
LamportFastMutEx-COL-5-ReachabilityCardinality-10:
LamportFastMutEx-COL-5-ReachabilityCardinality-11:
LamportFastMutEx-COL-5-ReachabilityCardinality-12:
LamportFastMutEx-COL-5-ReachabilityCardinality-13:
LamportFastMutEx-COL-5-ReachabilityCardinality-14:
LamportFastMutEx-COL-5-ReachabilityCardinality-15:

PENDING FORMULAS: CATEGORY
LamportFastMutEx-COL-5-ReachabilityCardinality-01:

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA
208 EF FNDP 734/3598 0/5

Time elapsed: 736 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY
LamportFastMutEx-COL-5-ReachabilityCardinality-00:
LamportFastMutEx-COL-5-ReachabilityCardinality-02:
LamportFastMutEx-COL-5-ReachabilityCardinality-03:
LamportFastMutEx-COL-5-ReachabilityCardinality-04:
LamportFastMutEx-COL-5-ReachabilityCardinality-05:
LamportFastMutEx-COL-5-ReachabilityCardinality-06:
LamportFastMutEx-COL-5-ReachabilityCardinality-07:
LamportFastMutEx-COL-5-ReachabilityCardinality-08:
LamportFastMutEx-COL-5-ReachabilityCardinality-09:
LamportFastMutEx-COL-5-ReachabilityCardinality-10:
LamportFastMutEx-COL-5-ReachabilityCardinality-11:
LamportFastMutEx-COL-5-ReachabilityCardinality-12:
LamportFastMutEx-COL-5-ReachabilityCardinality-13:
LamportFastMutEx-COL-5-ReachabilityCardinality-14:
LamportFastMutEx-COL-5-ReachabilityCardinality-15:

PENDING FORMULAS: CATEGORY
LamportFastMutEx-COL-5-ReachabilityCardinality-01:

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA
208 EF FNDP 739/3598 0/5

Time elapsed: 741 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY
LamportFastMutEx-COL-5-ReachabilityCardinality-00:
LamportFastMutEx-COL-5-ReachabilityCardinality-02:
LamportFastMutEx-COL-5-ReachabilityCardinality-03:
LamportFastMutEx-COL-5-ReachabilityCardinality-04:
LamportFastMutEx-COL-5-ReachabilityCardinality-05:
LamportFastMutEx-COL-5-ReachabilityCardinality-06:
LamportFastMutEx-COL-5-ReachabilityCardinality-07:
LamportFastMutEx-COL-5-ReachabilityCardinality-08:
LamportFastMutEx-COL-5-ReachabilityCardinality-09:
LamportFastMutEx-COL-5-ReachabilityCardinality-10:
LamportFastMutEx-COL-5-ReachabilityCardinality-11:
LamportFastMutEx-COL-5-ReachabilityCardinality-12:
LamportFastMutEx-COL-5-ReachabilityCardinality-13:
LamportFastMutEx-COL-5-ReachabilityCardinality-14:
LamportFastMutEx-COL-5-ReachabilityCardinality-15:

PENDING FORMULAS: CATEGORY
LamportFastMutEx-COL-5-ReachabilityCardinality-01:

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA
208 EF FNDP 744/3598 0/5

Time elapsed: 746 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY
LamportFastMutEx-COL-5-ReachabilityCardinality-00:
LamportFastMutEx-COL-5-ReachabilityCardinality-02:
LamportFastMutEx-COL-5-ReachabilityCardinality-03:
LamportFastMutEx-COL-5-ReachabilityCardinality-04:
LamportFastMutEx-COL-5-ReachabilityCardinality-05:
LamportFastMutEx-COL-5-ReachabilityCardinality-06:
LamportFastMutEx-COL-5-ReachabilityCardinality-07:
LamportFastMutEx-COL-5-ReachabilityCardinality-08:
LamportFastMutEx-COL-5-ReachabilityCardinality-09:
LamportFastMutEx-COL-5-ReachabilityCardinality-10:
LamportFastMutEx-COL-5-ReachabilityCardinality-11:
LamportFastMutEx-COL-5-ReachabilityCardinality-12:
LamportFastMutEx-COL-5-ReachabilityCardinality-13:
LamportFastMutEx-COL-5-ReachabilityCardinality-14:
LamportFastMutEx-COL-5-ReachabilityCardinality-15:

PENDING FORMULAS: CATEGORY
LamportFastMutEx-COL-5-ReachabilityCardinality-01:

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA
208 EF FNDP 749/3598 0/5

Time elapsed: 751 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY
LamportFastMutEx-COL-5-ReachabilityCardinality-00:
LamportFastMutEx-COL-5-ReachabilityCardinality-02:
LamportFastMutEx-COL-5-ReachabilityCardinality-03:
LamportFastMutEx-COL-5-ReachabilityCardinality-04:
LamportFastMutEx-COL-5-ReachabilityCardinality-05:
LamportFastMutEx-COL-5-ReachabilityCardinality-06:
LamportFastMutEx-COL-5-ReachabilityCardinality-07:
LamportFastMutEx-COL-5-ReachabilityCardinality-08:
LamportFastMutEx-COL-5-ReachabilityCardinality-09:
LamportFastMutEx-COL-5-ReachabilityCardinality-10:
LamportFastMutEx-COL-5-ReachabilityCardinality-11:
LamportFastMutEx-COL-5-ReachabilityCardinality-12:
LamportFastMutEx-COL-5-ReachabilityCardinality-13:
LamportFastMutEx-COL-5-ReachabilityCardinality-14:
LamportFastMutEx-COL-5-ReachabilityCardinality-15:

PENDING FORMULAS: CATEGORY
LamportFastMutEx-COL-5-ReachabilityCardinality-01:

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA
208 EF FNDP 754/3598 0/5

Time elapsed: 756 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY
LamportFastMutEx-COL-5-ReachabilityCardinality-00:
LamportFastMutEx-COL-5-ReachabilityCardinality-02:
LamportFastMutEx-COL-5-ReachabilityCardinality-03:
LamportFastMutEx-COL-5-ReachabilityCardinality-04:
LamportFastMutEx-COL-5-ReachabilityCardinality-05:
LamportFastMutEx-COL-5-ReachabilityCardinality-06:
LamportFastMutEx-COL-5-ReachabilityCardinality-07:
LamportFastMutEx-COL-5-ReachabilityCardinality-08:
LamportFastMutEx-COL-5-ReachabilityCardinality-09:
LamportFastMutEx-COL-5-ReachabilityCardinality-10:
LamportFastMutEx-COL-5-ReachabilityCardinality-11:
LamportFastMutEx-COL-5-ReachabilityCardinality-12:
LamportFastMutEx-COL-5-ReachabilityCardinality-13:
LamportFastMutEx-COL-5-ReachabilityCardinality-14:
LamportFastMutEx-COL-5-ReachabilityCardinality-15:

PENDING FORMULAS: CATEGORY
LamportFastMutEx-COL-5-ReachabilityCardinality-01:

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA
208 EF FNDP 759/3598 0/5

Time elapsed: 761 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY
LamportFastMutEx-COL-5-ReachabilityCardinality-00:
LamportFastMutEx-COL-5-ReachabilityCardinality-02:
LamportFastMutEx-COL-5-ReachabilityCardinality-03:
LamportFastMutEx-COL-5-ReachabilityCardinality-04:
LamportFastMutEx-COL-5-ReachabilityCardinality-05:
LamportFastMutEx-COL-5-ReachabilityCardinality-06:
LamportFastMutEx-COL-5-ReachabilityCardinality-07:
LamportFastMutEx-COL-5-ReachabilityCardinality-08:
LamportFastMutEx-COL-5-ReachabilityCardinality-09:
LamportFastMutEx-COL-5-ReachabilityCardinality-10:
LamportFastMutEx-COL-5-ReachabilityCardinality-11:
LamportFastMutEx-COL-5-ReachabilityCardinality-12:
LamportFastMutEx-COL-5-ReachabilityCardinality-13:
LamportFastMutEx-COL-5-ReachabilityCardinality-14:
LamportFastMutEx-COL-5-ReachabilityCardinality-15:

PENDING FORMULAS: CATEGORY
LamportFastMutEx-COL-5-ReachabilityCardinality-01:

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA
208 EF FNDP 764/3598 0/5

Time elapsed: 766 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY
LamportFastMutEx-COL-5-ReachabilityCardinality-00:
LamportFastMutEx-COL-5-ReachabilityCardinality-02:
LamportFastMutEx-COL-5-ReachabilityCardinality-03:
LamportFastMutEx-COL-5-ReachabilityCardinality-04:
LamportFastMutEx-COL-5-ReachabilityCardinality-05:
LamportFastMutEx-COL-5-ReachabilityCardinality-06:
LamportFastMutEx-COL-5-ReachabilityCardinality-07:
LamportFastMutEx-COL-5-ReachabilityCardinality-08:
LamportFastMutEx-COL-5-ReachabilityCardinality-09:
LamportFastMutEx-COL-5-ReachabilityCardinality-10:
LamportFastMutEx-COL-5-ReachabilityCardinality-11:
LamportFastMutEx-COL-5-ReachabilityCardinality-12:
LamportFastMutEx-COL-5-ReachabilityCardinality-13:
LamportFastMutEx-COL-5-ReachabilityCardinality-14:
LamportFastMutEx-COL-5-ReachabilityCardinality-15:

PENDING FORMULAS: CATEGORY
LamportFastMutEx-COL-5-ReachabilityCardinality-01:

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA
208 EF FNDP 769/3598 0/5

Time elapsed: 771 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY
LamportFastMutEx-COL-5-ReachabilityCardinality-00:
LamportFastMutEx-COL-5-ReachabilityCardinality-02:
LamportFastMutEx-COL-5-ReachabilityCardinality-03:
LamportFastMutEx-COL-5-ReachabilityCardinality-04:
LamportFastMutEx-COL-5-ReachabilityCardinality-05:
LamportFastMutEx-COL-5-ReachabilityCardinality-06:
LamportFastMutEx-COL-5-ReachabilityCardinality-07:
LamportFastMutEx-COL-5-ReachabilityCardinality-08:
LamportFastMutEx-COL-5-ReachabilityCardinality-09:
LamportFastMutEx-COL-5-ReachabilityCardinality-10:
LamportFastMutEx-COL-5-ReachabilityCardinality-11:
LamportFastMutEx-COL-5-ReachabilityCardinality-12:
LamportFastMutEx-COL-5-ReachabilityCardinality-13:
LamportFastMutEx-COL-5-ReachabilityCardinality-14:
LamportFastMutEx-COL-5-ReachabilityCardinality-15:

PENDING FORMULAS: CATEGORY
LamportFastMutEx-COL-5-ReachabilityCardinality-01:

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA
208 EF FNDP 774/3598 0/5

Time elapsed: 776 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY
LamportFastMutEx-COL-5-ReachabilityCardinality-00:
LamportFastMutEx-COL-5-ReachabilityCardinality-02:
LamportFastMutEx-COL-5-ReachabilityCardinality-03:
LamportFastMutEx-COL-5-ReachabilityCardinality-04:
LamportFastMutEx-COL-5-ReachabilityCardinality-05:
LamportFastMutEx-COL-5-ReachabilityCardinality-06:
LamportFastMutEx-COL-5-ReachabilityCardinality-07:
LamportFastMutEx-COL-5-ReachabilityCardinality-08:
LamportFastMutEx-COL-5-ReachabilityCardinality-09:
LamportFastMutEx-COL-5-ReachabilityCardinality-10:
LamportFastMutEx-COL-5-ReachabilityCardinality-11:
LamportFastMutEx-COL-5-ReachabilityCardinality-12:
LamportFastMutEx-COL-5-ReachabilityCardinality-13:
LamportFastMutEx-COL-5-ReachabilityCardinality-14:
LamportFastMutEx-COL-5-ReachabilityCardinality-15:

PENDING FORMULAS: CATEGORY
LamportFastMutEx-COL-5-ReachabilityCardinality-01:

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA
208 EF FNDP 779/3598 0/5

Time elapsed: 781 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY
LamportFastMutEx-COL-5-ReachabilityCardinality-00:
LamportFastMutEx-COL-5-ReachabilityCardinality-02:
LamportFastMutEx-COL-5-ReachabilityCardinality-03:
LamportFastMutEx-COL-5-ReachabilityCardinality-04:
LamportFastMutEx-COL-5-ReachabilityCardinality-05:
LamportFastMutEx-COL-5-ReachabilityCardinality-06:
LamportFastMutEx-COL-5-ReachabilityCardinality-07:
LamportFastMutEx-COL-5-ReachabilityCardinality-08:
LamportFastMutEx-COL-5-ReachabilityCardinality-09:
LamportFastMutEx-COL-5-ReachabilityCardinality-10:
LamportFastMutEx-COL-5-ReachabilityCardinality-11:
LamportFastMutEx-COL-5-ReachabilityCardinality-12:
LamportFastMutEx-COL-5-ReachabilityCardinality-13:
LamportFastMutEx-COL-5-ReachabilityCardinality-14:
LamportFastMutEx-COL-5-ReachabilityCardinality-15:

PENDING FORMULAS: CATEGORY
LamportFastMutEx-COL-5-ReachabilityCardinality-01:

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA
208 EF FNDP 784/3598 0/5

Time elapsed: 786 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY
LamportFastMutEx-COL-5-ReachabilityCardinality-00:
LamportFastMutEx-COL-5-ReachabilityCardinality-02:
LamportFastMutEx-COL-5-ReachabilityCardinality-03:
LamportFastMutEx-COL-5-ReachabilityCardinality-04:
LamportFastMutEx-COL-5-ReachabilityCardinality-05:
LamportFastMutEx-COL-5-ReachabilityCardinality-06:
LamportFastMutEx-COL-5-ReachabilityCardinality-07:
LamportFastMutEx-COL-5-ReachabilityCardinality-08:
LamportFastMutEx-COL-5-ReachabilityCardinality-09:
LamportFastMutEx-COL-5-ReachabilityCardinality-10:
LamportFastMutEx-COL-5-ReachabilityCardinality-11:
LamportFastMutEx-COL-5-ReachabilityCardinality-12:
LamportFastMutEx-COL-5-ReachabilityCardinality-13:
LamportFastMutEx-COL-5-ReachabilityCardinality-14:
LamportFastMutEx-COL-5-ReachabilityCardinality-15:

PENDING FORMULAS: CATEGORY
LamportFastMutEx-COL-5-ReachabilityCardinality-01:

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA
208 EF FNDP 789/3598 0/5

Time elapsed: 791 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY
LamportFastMutEx-COL-5-ReachabilityCardinality-00:
LamportFastMutEx-COL-5-ReachabilityCardinality-02:
LamportFastMutEx-COL-5-ReachabilityCardinality-03:
LamportFastMutEx-COL-5-ReachabilityCardinality-04:
LamportFastMutEx-COL-5-ReachabilityCardinality-05:
LamportFastMutEx-COL-5-ReachabilityCardinality-06:
LamportFastMutEx-COL-5-ReachabilityCardinality-07:
LamportFastMutEx-COL-5-ReachabilityCardinality-08:
LamportFastMutEx-COL-5-ReachabilityCardinality-09:
LamportFastMutEx-COL-5-ReachabilityCardinality-10:
LamportFastMutEx-COL-5-ReachabilityCardinality-11:
LamportFastMutEx-COL-5-ReachabilityCardinality-12:
LamportFastMutEx-COL-5-ReachabilityCardinality-13:
LamportFastMutEx-COL-5-ReachabilityCardinality-14:
LamportFastMutEx-COL-5-ReachabilityCardinality-15:

PENDING FORMULAS: CATEGORY
LamportFastMutEx-COL-5-ReachabilityCardinality-01:

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA
208 EF FNDP 794/3598 0/5

Time elapsed: 796 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY
LamportFastMutEx-COL-5-ReachabilityCardinality-00:
LamportFastMutEx-COL-5-ReachabilityCardinality-02:
LamportFastMutEx-COL-5-ReachabilityCardinality-03:
LamportFastMutEx-COL-5-ReachabilityCardinality-04:
LamportFastMutEx-COL-5-ReachabilityCardinality-05:
LamportFastMutEx-COL-5-ReachabilityCardinality-06:
LamportFastMutEx-COL-5-ReachabilityCardinality-07:
LamportFastMutEx-COL-5-ReachabilityCardinality-08:
LamportFastMutEx-COL-5-ReachabilityCardinality-09:
LamportFastMutEx-COL-5-ReachabilityCardinality-10:
LamportFastMutEx-COL-5-ReachabilityCardinality-11:
LamportFastMutEx-COL-5-ReachabilityCardinality-12:
LamportFastMutEx-COL-5-ReachabilityCardinality-13:
LamportFastMutEx-COL-5-ReachabilityCardinality-14:
LamportFastMutEx-COL-5-ReachabilityCardinality-15:

PENDING FORMULAS: CATEGORY
LamportFastMutEx-COL-5-ReachabilityCardinality-01:

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA
208 EF FNDP 799/3598 0/5

Time elapsed: 801 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY
LamportFastMutEx-COL-5-ReachabilityCardinality-00:
LamportFastMutEx-COL-5-ReachabilityCardinality-02:
LamportFastMutEx-COL-5-ReachabilityCardinality-03:
LamportFastMutEx-COL-5-ReachabilityCardinality-04:
LamportFastMutEx-COL-5-ReachabilityCardinality-05:
LamportFastMutEx-COL-5-ReachabilityCardinality-06:
LamportFastMutEx-COL-5-ReachabilityCardinality-07:
LamportFastMutEx-COL-5-ReachabilityCardinality-08:
LamportFastMutEx-COL-5-ReachabilityCardinality-09:
LamportFastMutEx-COL-5-ReachabilityCardinality-10:
LamportFastMutEx-COL-5-ReachabilityCardinality-11:
LamportFastMutEx-COL-5-ReachabilityCardinality-12:
LamportFastMutEx-COL-5-ReachabilityCardinality-13:
LamportFastMutEx-COL-5-ReachabilityCardinality-14:
LamportFastMutEx-COL-5-ReachabilityCardinality-15:

PENDING FORMULAS: CATEGORY
LamportFastMutEx-COL-5-ReachabilityCardinality-01:

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA
208 EF FNDP 804/3598 0/5

Time elapsed: 806 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY
LamportFastMutEx-COL-5-ReachabilityCardinality-00:
LamportFastMutEx-COL-5-ReachabilityCardinality-02:
LamportFastMutEx-COL-5-ReachabilityCardinality-03:
LamportFastMutEx-COL-5-ReachabilityCardinality-04:
LamportFastMutEx-COL-5-ReachabilityCardinality-05:
LamportFastMutEx-COL-5-ReachabilityCardinality-06:
LamportFastMutEx-COL-5-ReachabilityCardinality-07:
LamportFastMutEx-COL-5-ReachabilityCardinality-08:
LamportFastMutEx-COL-5-ReachabilityCardinality-09:
LamportFastMutEx-COL-5-ReachabilityCardinality-10:
LamportFastMutEx-COL-5-ReachabilityCardinality-11:
LamportFastMutEx-COL-5-ReachabilityCardinality-12:
LamportFastMutEx-COL-5-ReachabilityCardinality-13:
LamportFastMutEx-COL-5-ReachabilityCardinality-14:
LamportFastMutEx-COL-5-ReachabilityCardinality-15:

PENDING FORMULAS: CATEGORY
LamportFastMutEx-COL-5-ReachabilityCardinality-01:

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA
208 EF FNDP 809/3598 0/5

Time elapsed: 811 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY
LamportFastMutEx-COL-5-ReachabilityCardinality-00:
LamportFastMutEx-COL-5-ReachabilityCardinality-02:
LamportFastMutEx-COL-5-ReachabilityCardinality-03:
LamportFastMutEx-COL-5-ReachabilityCardinality-04:
LamportFastMutEx-COL-5-ReachabilityCardinality-05:
LamportFastMutEx-COL-5-ReachabilityCardinality-06:
LamportFastMutEx-COL-5-ReachabilityCardinality-07:
LamportFastMutEx-COL-5-ReachabilityCardinality-08:
LamportFastMutEx-COL-5-ReachabilityCardinality-09:
LamportFastMutEx-COL-5-ReachabilityCardinality-10:
LamportFastMutEx-COL-5-ReachabilityCardinality-11:
LamportFastMutEx-COL-5-ReachabilityCardinality-12:
LamportFastMutEx-COL-5-ReachabilityCardinality-13:
LamportFastMutEx-COL-5-ReachabilityCardinality-14:
LamportFastMutEx-COL-5-ReachabilityCardinality-15:

PENDING FORMULAS: CATEGORY
LamportFastMutEx-COL-5-ReachabilityCardinality-01:

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA
208 EF FNDP 814/3598 0/5

Time elapsed: 816 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY
LamportFastMutEx-COL-5-ReachabilityCardinality-00:
LamportFastMutEx-COL-5-ReachabilityCardinality-02:
LamportFastMutEx-COL-5-ReachabilityCardinality-03:
LamportFastMutEx-COL-5-ReachabilityCardinality-04:
LamportFastMutEx-COL-5-ReachabilityCardinality-05:
LamportFastMutEx-COL-5-ReachabilityCardinality-06:
LamportFastMutEx-COL-5-ReachabilityCardinality-07:
LamportFastMutEx-COL-5-ReachabilityCardinality-08:
LamportFastMutEx-COL-5-ReachabilityCardinality-09:
LamportFastMutEx-COL-5-ReachabilityCardinality-10:
LamportFastMutEx-COL-5-ReachabilityCardinality-11:
LamportFastMutEx-COL-5-ReachabilityCardinality-12:
LamportFastMutEx-COL-5-ReachabilityCardinality-13:
LamportFastMutEx-COL-5-ReachabilityCardinality-14:
LamportFastMutEx-COL-5-ReachabilityCardinality-15:

PENDING FORMULAS: CATEGORY
LamportFastMutEx-COL-5-ReachabilityCardinality-01:

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA
208 EF FNDP 819/3598 0/5

Time elapsed: 821 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY
LamportFastMutEx-COL-5-ReachabilityCardinality-00:
LamportFastMutEx-COL-5-ReachabilityCardinality-02:
LamportFastMutEx-COL-5-ReachabilityCardinality-03:
LamportFastMutEx-COL-5-ReachabilityCardinality-04:
LamportFastMutEx-COL-5-ReachabilityCardinality-05:
LamportFastMutEx-COL-5-ReachabilityCardinality-06:
LamportFastMutEx-COL-5-ReachabilityCardinality-07:
LamportFastMutEx-COL-5-ReachabilityCardinality-08:
LamportFastMutEx-COL-5-ReachabilityCardinality-09:
LamportFastMutEx-COL-5-ReachabilityCardinality-10:
LamportFastMutEx-COL-5-ReachabilityCardinality-11:
LamportFastMutEx-COL-5-ReachabilityCardinality-12:
LamportFastMutEx-COL-5-ReachabilityCardinality-13:
LamportFastMutEx-COL-5-ReachabilityCardinality-14:
LamportFastMutEx-COL-5-ReachabilityCardinality-15:

PENDING FORMULAS: CATEGORY
LamportFastMutEx-COL-5-ReachabilityCardinality-01:

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA
208 EF FNDP 824/3598 0/5

Time elapsed: 826 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY
LamportFastMutEx-COL-5-ReachabilityCardinality-00:
LamportFastMutEx-COL-5-ReachabilityCardinality-02:
LamportFastMutEx-COL-5-ReachabilityCardinality-03:
LamportFastMutEx-COL-5-ReachabilityCardinality-04:
LamportFastMutEx-COL-5-ReachabilityCardinality-05:
LamportFastMutEx-COL-5-ReachabilityCardinality-06:
LamportFastMutEx-COL-5-ReachabilityCardinality-07:
LamportFastMutEx-COL-5-ReachabilityCardinality-08:
LamportFastMutEx-COL-5-ReachabilityCardinality-09:
LamportFastMutEx-COL-5-ReachabilityCardinality-10:
LamportFastMutEx-COL-5-ReachabilityCardinality-11:
LamportFastMutEx-COL-5-ReachabilityCardinality-12:
LamportFastMutEx-COL-5-ReachabilityCardinality-13:
LamportFastMutEx-COL-5-ReachabilityCardinality-14:
LamportFastMutEx-COL-5-ReachabilityCardinality-15:

PENDING FORMULAS: CATEGORY
LamportFastMutEx-COL-5-ReachabilityCardinality-01:

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA
208 EF FNDP 829/3598 0/5

Time elapsed: 831 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY
LamportFastMutEx-COL-5-ReachabilityCardinality-00:
LamportFastMutEx-COL-5-ReachabilityCardinality-02:
LamportFastMutEx-COL-5-ReachabilityCardinality-03:
LamportFastMutEx-COL-5-ReachabilityCardinality-04:
LamportFastMutEx-COL-5-ReachabilityCardinality-05:
LamportFastMutEx-COL-5-ReachabilityCardinality-06:
LamportFastMutEx-COL-5-ReachabilityCardinality-07:
LamportFastMutEx-COL-5-ReachabilityCardinality-08:
LamportFastMutEx-COL-5-ReachabilityCardinality-09:
LamportFastMutEx-COL-5-ReachabilityCardinality-10:
LamportFastMutEx-COL-5-ReachabilityCardinality-11:
LamportFastMutEx-COL-5-ReachabilityCardinality-12:
LamportFastMutEx-COL-5-ReachabilityCardinality-13:
LamportFastMutEx-COL-5-ReachabilityCardinality-14:
LamportFastMutEx-COL-5-ReachabilityCardinality-15:

PENDING FORMULAS: CATEGORY
LamportFastMutEx-COL-5-ReachabilityCardinality-01:

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA
208 EF FNDP 834/3598 0/5

Time elapsed: 836 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY
LamportFastMutEx-COL-5-ReachabilityCardinality-00:
LamportFastMutEx-COL-5-ReachabilityCardinality-02:
LamportFastMutEx-COL-5-ReachabilityCardinality-03:
LamportFastMutEx-COL-5-ReachabilityCardinality-04:
LamportFastMutEx-COL-5-ReachabilityCardinality-05:
LamportFastMutEx-COL-5-ReachabilityCardinality-06:
LamportFastMutEx-COL-5-ReachabilityCardinality-07:
LamportFastMutEx-COL-5-ReachabilityCardinality-08:
LamportFastMutEx-COL-5-ReachabilityCardinality-09:
LamportFastMutEx-COL-5-ReachabilityCardinality-10:
LamportFastMutEx-COL-5-ReachabilityCardinality-11:
LamportFastMutEx-COL-5-ReachabilityCardinality-12:
LamportFastMutEx-COL-5-ReachabilityCardinality-13:
LamportFastMutEx-COL-5-ReachabilityCardinality-14:
LamportFastMutEx-COL-5-ReachabilityCardinality-15:

PENDING FORMULAS: CATEGORY
LamportFastMutEx-COL-5-ReachabilityCardinality-01:

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA
208 EF FNDP 839/3598 0/5

Time elapsed: 841 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY
LamportFastMutEx-COL-5-ReachabilityCardinality-00:
LamportFastMutEx-COL-5-ReachabilityCardinality-02:
LamportFastMutEx-COL-5-ReachabilityCardinality-03:
LamportFastMutEx-COL-5-ReachabilityCardinality-04:
LamportFastMutEx-COL-5-ReachabilityCardinality-05:
LamportFastMutEx-COL-5-ReachabilityCardinality-06:
LamportFastMutEx-COL-5-ReachabilityCardinality-07:
LamportFastMutEx-COL-5-ReachabilityCardinality-08:
LamportFastMutEx-COL-5-ReachabilityCardinality-09:
LamportFastMutEx-COL-5-ReachabilityCardinality-10:
LamportFastMutEx-COL-5-ReachabilityCardinality-11:
LamportFastMutEx-COL-5-ReachabilityCardinality-12:
LamportFastMutEx-COL-5-ReachabilityCardinality-13:
LamportFastMutEx-COL-5-ReachabilityCardinality-14:
LamportFastMutEx-COL-5-ReachabilityCardinality-15:

PENDING FORMULAS: CATEGORY
LamportFastMutEx-COL-5-ReachabilityCardinality-01:

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA
208 EF FNDP 844/3598 0/5

Time elapsed: 846 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY
LamportFastMutEx-COL-5-ReachabilityCardinality-00:
LamportFastMutEx-COL-5-ReachabilityCardinality-02:
LamportFastMutEx-COL-5-ReachabilityCardinality-03:
LamportFastMutEx-COL-5-ReachabilityCardinality-04:
LamportFastMutEx-COL-5-ReachabilityCardinality-05:
LamportFastMutEx-COL-5-ReachabilityCardinality-06:
LamportFastMutEx-COL-5-ReachabilityCardinality-07:
LamportFastMutEx-COL-5-ReachabilityCardinality-08:
LamportFastMutEx-COL-5-ReachabilityCardinality-09:
LamportFastMutEx-COL-5-ReachabilityCardinality-10:
LamportFastMutEx-COL-5-ReachabilityCardinality-11:
LamportFastMutEx-COL-5-ReachabilityCardinality-12:
LamportFastMutEx-COL-5-ReachabilityCardinality-13:
LamportFastMutEx-COL-5-ReachabilityCardinality-14:
LamportFastMutEx-COL-5-ReachabilityCardinality-15:

PENDING FORMULAS: CATEGORY
LamportFastMutEx-COL-5-ReachabilityCardinality-01:

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA
208 EF FNDP 849/3598 0/5

Time elapsed: 851 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY
LamportFastMutEx-COL-5-ReachabilityCardinality-00:
LamportFastMutEx-COL-5-ReachabilityCardinality-02:
LamportFastMutEx-COL-5-ReachabilityCardinality-03:
LamportFastMutEx-COL-5-ReachabilityCardinality-04:
LamportFastMutEx-COL-5-ReachabilityCardinality-05:
LamportFastMutEx-COL-5-ReachabilityCardinality-06:
LamportFastMutEx-COL-5-ReachabilityCardinality-07:
LamportFastMutEx-COL-5-ReachabilityCardinality-08:
LamportFastMutEx-COL-5-ReachabilityCardinality-09:
LamportFastMutEx-COL-5-ReachabilityCardinality-10:
LamportFastMutEx-COL-5-ReachabilityCardinality-11:
LamportFastMutEx-COL-5-ReachabilityCardinality-12:
LamportFastMutEx-COL-5-ReachabilityCardinality-13:
LamportFastMutEx-COL-5-ReachabilityCardinality-14:
LamportFastMutEx-COL-5-ReachabilityCardinality-15:

PENDING FORMULAS: CATEGORY
LamportFastMutEx-COL-5-ReachabilityCardinality-01:

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA
208 EF FNDP 854/3598 0/5

Time elapsed: 856 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY
LamportFastMutEx-COL-5-ReachabilityCardinality-00:
LamportFastMutEx-COL-5-ReachabilityCardinality-02:
LamportFastMutEx-COL-5-ReachabilityCardinality-03:
LamportFastMutEx-COL-5-ReachabilityCardinality-04:
LamportFastMutEx-COL-5-ReachabilityCardinality-05:
LamportFastMutEx-COL-5-ReachabilityCardinality-06:
LamportFastMutEx-COL-5-ReachabilityCardinality-07:
LamportFastMutEx-COL-5-ReachabilityCardinality-08:
LamportFastMutEx-COL-5-ReachabilityCardinality-09:
LamportFastMutEx-COL-5-ReachabilityCardinality-10:
LamportFastMutEx-COL-5-ReachabilityCardinality-11:
LamportFastMutEx-COL-5-ReachabilityCardinality-12:
LamportFastMutEx-COL-5-ReachabilityCardinality-13:
LamportFastMutEx-COL-5-ReachabilityCardinality-14:
LamportFastMutEx-COL-5-ReachabilityCardinality-15:

PENDING FORMULAS: CATEGORY
LamportFastMutEx-COL-5-ReachabilityCardinality-01:

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA
208 EF FNDP 859/3598 0/5

Time elapsed: 861 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY
LamportFastMutEx-COL-5-ReachabilityCardinality-00:
LamportFastMutEx-COL-5-ReachabilityCardinality-02:
LamportFastMutEx-COL-5-ReachabilityCardinality-03:
LamportFastMutEx-COL-5-ReachabilityCardinality-04:
LamportFastMutEx-COL-5-ReachabilityCardinality-05:
LamportFastMutEx-COL-5-ReachabilityCardinality-06:
LamportFastMutEx-COL-5-ReachabilityCardinality-07:
LamportFastMutEx-COL-5-ReachabilityCardinality-08:
LamportFastMutEx-COL-5-ReachabilityCardinality-09:
LamportFastMutEx-COL-5-ReachabilityCardinality-10:
LamportFastMutEx-COL-5-ReachabilityCardinality-11:
LamportFastMutEx-COL-5-ReachabilityCardinality-12:
LamportFastMutEx-COL-5-ReachabilityCardinality-13:
LamportFastMutEx-COL-5-ReachabilityCardinality-14:
LamportFastMutEx-COL-5-ReachabilityCardinality-15:

PENDING FORMULAS: CATEGORY
LamportFastMutEx-COL-5-ReachabilityCardinality-01:

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA
208 EF FNDP 864/3598 0/5

Time elapsed: 866 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
/home/mcc/BenchKit/BenchKit_head.sh: line 62: 408 Killed
403300614.qcow2', fmt=qcow2 size=4294967296 backing_file='/data/fkordon/mcc2021-input.qcow2' encryption=off cluster_size=65536 lazy_refcounts=off ................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................... ========================================= is ReachabilityCardinality =================== CTLCardinality.txt CTLCardinality.xml CTLFireability.txt CTLFireability.xml GenericPropertiesDefinition.xml GenericPropertiesVerdict.xml LTLCardinality.txt LTLCardinality.xml LTLFireability.txt LTLFireability.xml ReachabilityCardinality.txt ReachabilityCardinality.xml ReachabilityFireability.txt ReachabilityFireability.xml UpperBounds.txt UpperBounds.xml model.pnml (invocation template) vector(from text file) rdinality-00 rdinality-01 rdinality-02 rdinality-03 rdinality-04 rdinality-05 rdinality-06 rdinality-07 rdinality-08 rdinality-09 rdinality-10 rdinality-11 rdinality-12 rdinality-13 rdinality-14 rdinality-15 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT .pnml pnml (--xmlformula) eachabilityCardinality.xml 721 787 721 787 721 787 721 787 711 for 39 LamportFastMutEx-COL-5-ReachabilityCardinality-13 for 39 LamportFastMutEx-COL-5-ReachabilityCardinality-13 for 39 LamportFastMutEx-COL-5-ReachabilityCardinality-13 for 39 LamportFastMutEx-COL-5-ReachabilityCardinality-13 721 787 for LamportFastMutEx-COL-5-ReachabilityCardinality-13 LamportFastMutEx-COL-5-ReachabilityCardinality-13 (obsolete) LamportFastMutEx-COL-5-ReachabilityCardinality-13 (obsolete) LamportFastMutEx-COL-5-ReachabilityCardinality-13 (obsolete) 711 721 787 721 787 721 787 721 787 721 787 711 711 711 711 for 33 LamportFastMutEx-COL-5-ReachabilityCardinality-11 for 33 LamportFastMutEx-COL-5-ReachabilityCardinality-11 for 33 LamportFastMutEx-COL-5-ReachabilityCardinality-11 711 721 787 for 33 LamportFastMutEx-COL-5-ReachabilityCardinality-11 711 721 787 for LamportFastMutEx-COL-5-ReachabilityCardinality-11 711 711 721 787 721 787 721 787 721 787 LamportFastMutEx-COL-5-ReachabilityCardinality-11 (obsolete) LamportFastMutEx-COL-5-ReachabilityCardinality-11 (obsolete) LamportFastMutEx-COL-5-ReachabilityCardinality-11 (obsolete) for 6 LamportFastMutEx-COL-5-ReachabilityCardinality-02 for 6 LamportFastMutEx-COL-5-ReachabilityCardinality-02 for 6 LamportFastMutEx-COL-5-ReachabilityCardinality-02 for 6 LamportFastMutEx-COL-5-ReachabilityCardinality-02 721 787 721 787 721 787 for LamportFastMutEx-COL-5-ReachabilityCardinality-11 /ReachabilityCardinality-53.sara. 721 787 for LamportFastMutEx-COL-5-ReachabilityCardinality-11 721 787 721 787 for LamportFastMutEx-COL-5-ReachabilityCardinality-02 721 787 721 787 for LamportFastMutEx-COL-5-ReachabilityCardinality-02 721 787 721 787 721 787 721 787 711 721 787 711 LamportFastMutEx-COL-5-ReachabilityCardinality-02 (obsolete) LamportFastMutEx-COL-5-ReachabilityCardinality-02 (obsolete) for 27 LamportFastMutEx-COL-5-ReachabilityCardinality-09 for 27 LamportFastMutEx-COL-5-ReachabilityCardinality-09 for 27 LamportFastMutEx-COL-5-ReachabilityCardinality-09 721 787 for 27 LamportFastMutEx-COL-5-ReachabilityCardinality-09 721 787 721 787 721 787 721 787 721 787 for LamportFastMutEx-COL-5-ReachabilityCardinality-09 711 721 787 721 787 721 787 721 787 721 787 for LamportFastMutEx-COL-5-ReachabilityCardinality-02 k:721 787 711 LamportFastMutEx-COL-5-ReachabilityCardinality-09 (obsolete) LamportFastMutEx-COL-5-ReachabilityCardinality-09 (obsolete) LamportFastMutEx-COL-5-ReachabilityCardinality-09 (obsolete) for 36 LamportFastMutEx-COL-5-ReachabilityCardinality-12 for 36 LamportFastMutEx-COL-5-ReachabilityCardinality-12 for 36 LamportFastMutEx-COL-5-ReachabilityCardinality-12 for 36 LamportFastMutEx-COL-5-ReachabilityCardinality-12 /ReachabilityCardinality-58.sara. 721 787 for LamportFastMutEx-COL-5-ReachabilityCardinality-09 721 787 for LamportFastMutEx-COL-5-ReachabilityCardinality-13 711 721 787 for LamportFastMutEx-COL-5-ReachabilityCardinality-12 721 787 721 787 LamportFastMutEx-COL-5-ReachabilityCardinality-12 (obsolete) LamportFastMutEx-COL-5-ReachabilityCardinality-12 (obsolete) LamportFastMutEx-COL-5-ReachabilityCardinality-12 (obsolete) for 9 LamportFastMutEx-COL-5-ReachabilityCardinality-03 721 787 for 9 LamportFastMutEx-COL-5-ReachabilityCardinality-03 for 9 LamportFastMutEx-COL-5-ReachabilityCardinality-03 for 9 LamportFastMutEx-COL-5-ReachabilityCardinality-03 cution/ReachabilityCardinality-127.sara. for LamportFastMutEx-COL-5-ReachabilityCardinality-03 for LamportFastMutEx-COL-5-ReachabilityCardinality-12 787 /ReachabilityCardinality-149.sara. LamportFastMutEx-COL-5-ReachabilityCardinality-03 (obsolete) LamportFastMutEx-COL-5-ReachabilityCardinality-03 (obsolete) LamportFastMutEx-COL-5-ReachabilityCardinality-03 (obsolete) 721 787 for 42 LamportFastMutEx-COL-5-ReachabilityCardinality-14 for 42 LamportFastMutEx-COL-5-ReachabilityCardinality-14 721 787 for 42 LamportFastMutEx-COL-5-ReachabilityCardinality-14 for 42 LamportFastMutEx-COL-5-ReachabilityCardinality-14 for LamportFastMutEx-COL-5-ReachabilityCardinality-03 for LamportFastMutEx-COL-5-ReachabilityCardinality-02 for LamportFastMutEx-COL-5-ReachabilityCardinality-09 for LamportFastMutEx-COL-5-ReachabilityCardinality-03 711 711 711 721 787 for LamportFastMutEx-COL-5-ReachabilityCardinality-14 LamportFastMutEx-COL-5-ReachabilityCardinality-14 (obsolete) LamportFastMutEx-COL-5-ReachabilityCardinality-14 (obsolete) LamportFastMutEx-COL-5-ReachabilityCardinality-14 (obsolete) for 30 LamportFastMutEx-COL-5-ReachabilityCardinality-10 for 30 LamportFastMutEx-COL-5-ReachabilityCardinality-10 for 30 LamportFastMutEx-COL-5-ReachabilityCardinality-10 711 for 30 LamportFastMutEx-COL-5-ReachabilityCardinality-10 721 for LamportFastMutEx-COL-5-ReachabilityCardinality-14 787 721 787 for LamportFastMutEx-COL-5-ReachabilityCardinality-12 for LamportFastMutEx-COL-5-ReachabilityCardinality-10 /ReachabilityCardinality-106.sara. istic for LamportFastMutEx-COL-5-ReachabilityCardinality-10 LamportFastMutEx-COL-5-ReachabilityCardinality-10 (obsolete) LamportFastMutEx-COL-5-ReachabilityCardinality-10 (obsolete) for 0 LamportFastMutEx-COL-5-ReachabilityCardinality-00 for 0 LamportFastMutEx-COL-5-ReachabilityCardinality-00 721 787 for 0 LamportFastMutEx-COL-5-ReachabilityCardinality-00 for 0 LamportFastMutEx-COL-5-ReachabilityCardinality-00 /ReachabilityCardinality-155.sara. /ReachabilityCardinality-140.sara. istic for LamportFastMutEx-COL-5-ReachabilityCardinality-03 /ReachabilityCardinality-163.sara. for LamportFastMutEx-COL-5-ReachabilityCardinality-00 LamportFastMutEx-COL-5-ReachabilityCardinality-00 (obsolete) LamportFastMutEx-COL-5-ReachabilityCardinality-00 (obsolete) LamportFastMutEx-COL-5-ReachabilityCardinality-00 (obsolete) for 24 LamportFastMutEx-COL-5-ReachabilityCardinality-08 for 24 LamportFastMutEx-COL-5-ReachabilityCardinality-08 for 24 LamportFastMutEx-COL-5-ReachabilityCardinality-08 for 24 LamportFastMutEx-COL-5-ReachabilityCardinality-08 for LamportFastMutEx-COL-5-ReachabilityCardinality-00 for LamportFastMutEx-COL-5-ReachabilityCardinality-00 721 787 for LamportFastMutEx-COL-5-ReachabilityCardinality-08 LamportFastMutEx-COL-5-ReachabilityCardinality-08 (obsolete) LamportFastMutEx-COL-5-ReachabilityCardinality-08 (obsolete) LamportFastMutEx-COL-5-ReachabilityCardinality-08 (obsolete) for 12 LamportFastMutEx-COL-5-ReachabilityCardinality-04 for 12 LamportFastMutEx-COL-5-ReachabilityCardinality-04 for 12 LamportFastMutEx-COL-5-ReachabilityCardinality-04 for 12 LamportFastMutEx-COL-5-ReachabilityCardinality-04 for LamportFastMutEx-COL-5-ReachabilityCardinality-10 for LamportFastMutEx-COL-5-ReachabilityCardinality-14 for LamportFastMutEx-COL-5-ReachabilityCardinality-04 LamportFastMutEx-COL-5-ReachabilityCardinality-04 (obsolete) LamportFastMutEx-COL-5-ReachabilityCardinality-04 (obsolete) LamportFastMutEx-COL-5-ReachabilityCardinality-04 (obsolete) for 15 LamportFastMutEx-COL-5-ReachabilityCardinality-05 for 15 LamportFastMutEx-COL-5-ReachabilityCardinality-05 k:711 for 15 LamportFastMutEx-COL-5-ReachabilityCardinality-05 for 15 LamportFastMutEx-COL-5-ReachabilityCardinality-05 for LamportFastMutEx-COL-5-ReachabilityCardinality-04 /ReachabilityCardinality-85.sara. istic 721 787 /ReachabilityCardinality-81.sara. for LamportFastMutEx-COL-5-ReachabilityCardinality-05 LamportFastMutEx-COL-5-ReachabilityCardinality-05 (obsolete) LamportFastMutEx-COL-5-ReachabilityCardinality-05 (obsolete) LamportFastMutEx-COL-5-ReachabilityCardinality-05 (obsolete) for 45 LamportFastMutEx-COL-5-ReachabilityCardinality-15 for 45 LamportFastMutEx-COL-5-ReachabilityCardinality-15 for 45 LamportFastMutEx-COL-5-ReachabilityCardinality-15 721 787 for 45 LamportFastMutEx-COL-5-ReachabilityCardinality-15 for LamportFastMutEx-COL-5-ReachabilityCardinality-08 for LamportFastMutEx-COL-5-ReachabilityCardinality-15 /ReachabilityCardinality-89.sara. LamportFastMutEx-COL-5-ReachabilityCardinality-15 (obsolete) LamportFastMutEx-COL-5-ReachabilityCardinality-15 (obsolete) LamportFastMutEx-COL-5-ReachabilityCardinality-15 (obsolete) istic for 18 LamportFastMutEx-COL-5-ReachabilityCardinality-06 for 3 LamportFastMutEx-COL-5-ReachabilityCardinality-01 for 18 LamportFastMutEx-COL-5-ReachabilityCardinality-06 for 3 LamportFastMutEx-COL-5-ReachabilityCardinality-01 /ReachabilityCardinality-116.sara. istic for LamportFastMutEx-COL-5-ReachabilityCardinality-06 LamportFastMutEx-COL-5-ReachabilityCardinality-06 (obsolete) 721 787 721 787 for 21 LamportFastMutEx-COL-5-ReachabilityCardinality-07 for 21 LamportFastMutEx-COL-5-ReachabilityCardinality-07 for LamportFastMutEx-COL-5-ReachabilityCardinality-04 for LamportFastMutEx-COL-5-ReachabilityCardinality-15 for LamportFastMutEx-COL-5-ReachabilityCardinality-05 for LamportFastMutEx-COL-5-ReachabilityCardinality-01 LamportFastMutEx-COL-5-ReachabilityCardinality-01 (obsolete) for 21 LamportFastMutEx-COL-5-ReachabilityCardinality-07 for 21 LamportFastMutEx-COL-5-ReachabilityCardinality-07 /ReachabilityCardinality-87.sara. 98 159 150 for LamportFastMutEx-COL-5-ReachabilityCardinality-01 for LamportFastMutEx-COL-5-ReachabilityCardinality-07 LamportFastMutEx-COL-5-ReachabilityCardinality-07 (obsolete) LamportFastMutEx-COL-5-ReachabilityCardinality-07 (obsolete) LamportFastMutEx-COL-5-ReachabilityCardinality-07 (obsolete) for LamportFastMutEx-COL-5-ReachabilityCardinality-07 for LamportFastMutEx-COL-5-ReachabilityCardinality-06 96 156 147 96 156 147 721 787 places removed /ReachabilityCardinality-94.sara. bilityCardinality-07 stopped (result already fixed). for LamportFastMutEx-COL-5-ReachabilityCardinality-07 721 787 721 787 721 787 721 787 39 LamportFastMutEx-COL-5-ReachabilityCardinality-13 39 LamportFastMutEx-COL-5-ReachabilityCardinality-13 39 LamportFastMutEx-COL-5-ReachabilityCardinality-13 39 LamportFastMutEx-COL-5-ReachabilityCardinality-13 721 787 711 711 711 711 721 787 721 787 721 787 721 787 721 787 721 787 721 787 721 787 721 787 721 787 721 787 721 787 721 787 711 711 711 711 721 787 721 787 721 787 721 787 721 787 721 787 721 787 721 787 LamportFastMutEx-COL-5-ReachabilityCardinality-13 LamportFastMutEx-COL-5-ReachabilityCardinality-13 (obsolete) LamportFastMutEx-COL-5-ReachabilityCardinality-13 (obsolete) /ReachabilityCardinality-174.sara. LamportFastMutEx-COL-5-ReachabilityCardinality-13 (obsolete) 18 LamportFastMutEx-COL-5-ReachabilityCardinality-06 30 LamportFastMutEx-COL-5-ReachabilityCardinality-10 30 LamportFastMutEx-COL-5-ReachabilityCardinality-10 30 LamportFastMutEx-COL-5-ReachabilityCardinality-10 istic 711 LamportFastMutEx-COL-5-ReachabilityCardinality-13 721 787 721 787 721 787 721 787 721 787 721 787 721 787 721 787 721 787 721 787 721 787 721 787 721 787 721 787 721 787 LamportFastMutEx-COL-5-ReachabilityCardinality-13 /ReachabilityCardinality-215.sara. LamportFastMutEx-COL-5-ReachabilityCardinality-06 45 LamportFastMutEx-COL-5-ReachabilityCardinality-15 LamportFastMutEx-COL-5-ReachabilityCardinality-15 12 LamportFastMutEx-COL-5-ReachabilityCardinality-04 istic LamportFastMutEx-COL-5-ReachabilityCardinality-04 3 LamportFastMutEx-COL-5-ReachabilityCardinality-01 LamportFastMutEx-COL-5-ReachabilityCardinality-10 LamportFastMutEx-COL-5-ReachabilityCardinality-10 (obsolete) LamportFastMutEx-COL-5-ReachabilityCardinality-10 (obsolete) 6 LamportFastMutEx-COL-5-ReachabilityCardinality-02 6 LamportFastMutEx-COL-5-ReachabilityCardinality-02 6 LamportFastMutEx-COL-5-ReachabilityCardinality-02 LamportFastMutEx-COL-5-ReachabilityCardinality-02 LamportFastMutEx-COL-5-ReachabilityCardinality-02 (obsolete) LamportFastMutEx-COL-5-ReachabilityCardinality-02 (obsolete) 9 LamportFastMutEx-COL-5-ReachabilityCardinality-03 9 LamportFastMutEx-COL-5-ReachabilityCardinality-03 9 LamportFastMutEx-COL-5-ReachabilityCardinality-03 LamportFastMutEx-COL-5-ReachabilityCardinality-03 LamportFastMutEx-COL-5-ReachabilityCardinality-03 (obsolete) LamportFastMutEx-COL-5-ReachabilityCardinality-03 (obsolete) 36 LamportFastMutEx-COL-5-ReachabilityCardinality-12 36 LamportFastMutEx-COL-5-ReachabilityCardinality-12 36 LamportFastMutEx-COL-5-ReachabilityCardinality-12 LamportFastMutEx-COL-5-ReachabilityCardinality-10 LamportFastMutEx-COL-5-ReachabilityCardinality-03 LamportFastMutEx-COL-5-ReachabilityCardinality-12 LamportFastMutEx-COL-5-ReachabilityCardinality-12 (obsolete) LamportFastMutEx-COL-5-ReachabilityCardinality-12 (obsolete) 27 LamportFastMutEx-COL-5-ReachabilityCardinality-09 721 787 27 LamportFastMutEx-COL-5-ReachabilityCardinality-09 711 27 LamportFastMutEx-COL-5-ReachabilityCardinality-09 721 787 721 787 /ReachabilityCardinality-198.sara. istic /ReachabilityCardinality-188.sara. istic /ReachabilityCardinality-246.sara. /ReachabilityCardinality-231.sara. istic istic LamportFastMutEx-COL-5-ReachabilityCardinality-09 LamportFastMutEx-COL-5-ReachabilityCardinality-09 (obsolete) LamportFastMutEx-COL-5-ReachabilityCardinality-09 (obsolete) 24 LamportFastMutEx-COL-5-ReachabilityCardinality-08 24 LamportFastMutEx-COL-5-ReachabilityCardinality-08 24 LamportFastMutEx-COL-5-ReachabilityCardinality-08 LamportFastMutEx-COL-5-ReachabilityCardinality-09 LamportFastMutEx-COL-5-ReachabilityCardinality-08 LamportFastMutEx-COL-5-ReachabilityCardinality-08 (obsolete) LamportFastMutEx-COL-5-ReachabilityCardinality-08 (obsolete) 721 787 42 LamportFastMutEx-COL-5-ReachabilityCardinality-14 42 LamportFastMutEx-COL-5-ReachabilityCardinality-14 42 LamportFastMutEx-COL-5-ReachabilityCardinality-14 /ReachabilityCardinality-185.sara. istic LamportFastMutEx-COL-5-ReachabilityCardinality-14 LamportFastMutEx-COL-5-ReachabilityCardinality-14 (obsolete) LamportFastMutEx-COL-5-ReachabilityCardinality-14 (obsolete) 721 3 LamportFastMutEx-COL-5-ReachabilityCardinality-01 787 3 LamportFastMutEx-COL-5-ReachabilityCardinality-01 3 LamportFastMutEx-COL-5-ReachabilityCardinality-01 LamportFastMutEx-COL-5-ReachabilityCardinality-08 LamportFastMutEx-COL-5-ReachabilityCardinality-08 721 787 LamportFastMutEx-COL-5-ReachabilityCardinality-14 /ReachabilityCardinality-205.sara. istic LamportFastMutEx-COL-5-ReachabilityCardinality-02 /ReachabilityCardinality-209.sara. istic VALUE PRODUCED BY AG true skeleton: tandem / relaxed EF true findpath AG false tandem / insertion AG false tandem / relaxed EF false skeleton: tandem / insertion AG false tandem / relaxed AG true skeleton: tandem / relaxed AG false tandem / insertion AG false findpath EF true findpath EF false skeleton: tandem / insertion AG false findpath AG false tandem / insertion AG false tandem / insertion AG false tandem / relaxed IDL ACT RUN SUS FIN C/T C/M OBS AG 0 1 4 0 2 0 0 3 STATUS LamportFastMutEx-COL-5-ReachabilityCardinality-01 198214 t fired, 1 attempts, . LamportFastMutEx-COL-5-ReachabilityCardinality-01 sara is running. LamportFastMutEx-COL-5-ReachabilityCardinality-01 229546 m, 45909 m/sec, 268773 t fired, . LamportFastMutEx-COL-5-ReachabilityCardinality-01 66935 m, 13387 m/sec, 94413 t fired, . VALUE PRODUCED BY AG true skeleton: tandem / relaxed EF true findpath AG false tandem / insertion AG false tandem / relaxed EF false skeleton: tandem / insertion AG false tandem / relaxed AG true skeleton: tandem / relaxed AG false tandem / insertion AG false findpath EF true findpath EF false skeleton: tandem / insertion AG false findpath AG false tandem / insertion AG false tandem / insertion AG false tandem / relaxed IDL ACT RUN SUS FIN C/T C/M OBS AG 0 1 4 0 2 0 0 3 STATUS LamportFastMutEx-COL-5-ReachabilityCardinality-01 610872 t fired, 1 attempts, . LamportFastMutEx-COL-5-ReachabilityCardinality-01 sara is running. LamportFastMutEx-COL-5-ReachabilityCardinality-01 556862 m, 65463 m/sec, 656073 t fired, . LamportFastMutEx-COL-5-ReachabilityCardinality-01 188700 m, 24353 m/sec, 280565 t fired, . VALUE PRODUCED BY AG true skeleton: tandem / relaxed EF true findpath AG false tandem / insertion AG false tandem / relaxed EF false skeleton: tandem / insertion AG false tandem / relaxed AG true skeleton: tandem / relaxed AG false tandem / insertion AG false findpath EF true findpath EF false skeleton: tandem / insertion AG false findpath AG false tandem / insertion AG false tandem / insertion AG false tandem / relaxed IDL ACT RUN SUS FIN C/T C/M OBS AG 0 1 4 0 2 0 0 3 STATUS LamportFastMutEx-COL-5-ReachabilityCardinality-01 964697 t fired, 1 attempts, . LamportFastMutEx-COL-5-ReachabilityCardinality-01 sara is running. LamportFastMutEx-COL-5-ReachabilityCardinality-01 790659 m, 46759 m/sec, 937386 t fired, . LamportFastMutEx-COL-5-ReachabilityCardinality-01 288526 m, 19965 m/sec, 435613 t fired, . VALUE PRODUCED BY AG true skeleton: tandem / relaxed EF true findpath AG false tandem / insertion AG false tandem / relaxed EF false skeleton: tandem / insertion AG false tandem / relaxed AG true skeleton: tandem / relaxed AG false tandem / insertion AG false findpath EF true findpath EF false skeleton: tandem / insertion AG false findpath AG false tandem / insertion AG false tandem / insertion AG false tandem / relaxed IDL ACT RUN SUS FIN C/T C/M OBS AG 0 1 4 0 2 0 0 3 STATUS LamportFastMutEx-COL-5-ReachabilityCardinality-01 1395649 t fired, 2 attempts, . LamportFastMutEx-COL-5-ReachabilityCardinality-01 sara is running. LamportFastMutEx-COL-5-ReachabilityCardinality-01 879154 m, 17699 m/sec, 1045642 t fired, . LamportFastMutEx-COL-5-ReachabilityCardinality-01 335879 m, 9470 m/sec, 510077 t fired, . LamportFastMutEx-COL-5-ReachabilityCardinality-13 VALUE PRODUCED BY AG true skeleton: tandem / relaxed EF true findpath AG false tandem / insertion AG false tandem / relaxed EF false skeleton: tandem / insertion AG false tandem / relaxed AG true skeleton: tandem / relaxed AG false tandem / insertion AG false findpath EF true findpath EF false skeleton: tandem / insertion AG false findpath AG false tandem / insertion AG false tandem / insertion AG false tandem / relaxed IDL ACT RUN SUS FIN C/T C/M OBS AG 0 1 4 0 2 0 0 3 STATUS LamportFastMutEx-COL-5-ReachabilityCardinality-01 2057134 t fired, 3 attempts, . LamportFastMutEx-COL-5-ReachabilityCardinality-01 sara is running. LamportFastMutEx-COL-5-ReachabilityCardinality-01 901909 m, 4551 m/sec, 1072685 t fired, . LamportFastMutEx-COL-5-ReachabilityCardinality-01 359263 m, 4676 m/sec, 546811 t fired, . VALUE PRODUCED BY AG true skeleton: tandem / relaxed EF true findpath AG false tandem / insertion AG false tandem / relaxed EF false skeleton: tandem / insertion AG false tandem / relaxed AG true skeleton: tandem / relaxed AG false tandem / insertion AG false findpath EF true findpath EF false skeleton: tandem / insertion AG false findpath AG false tandem / insertion AG false tandem / insertion AG false tandem / relaxed IDL ACT RUN SUS FIN C/T C/M OBS AG 0 1 4 0 2 0 0 3 STATUS LamportFastMutEx-COL-5-ReachabilityCardinality-01 2344298 t fired, 3 attempts, . LamportFastMutEx-COL-5-ReachabilityCardinality-01 sara is running. LamportFastMutEx-COL-5-ReachabilityCardinality-01 1059139 m, 31446 m/sec, 1264203 t fired, . LamportFastMutEx-COL-5-ReachabilityCardinality-01 393867 m, 6920 m/sec, 600709 t fired, . LamportFastMutEx-COL-5-ReachabilityCardinality-01 (memory limit exceeded) VALUE PRODUCED BY AG true skeleton: tandem / relaxed EF true findpath AG false tandem / insertion AG false tandem / relaxed EF false skeleton: tandem / insertion AG false tandem / relaxed AG true skeleton: tandem / relaxed AG false tandem / insertion AG false findpath EF true findpath EF false skeleton: tandem / insertion AG false findpath AG false tandem / insertion AG false tandem / insertion AG false tandem / relaxed IDL ACT RUN SUS FIN C/T C/M OBS AG 0 1 3 0 2 0 1 3 STATUS LamportFastMutEx-COL-5-ReachabilityCardinality-01 2754005 t fired, 3 attempts, . LamportFastMutEx-COL-5-ReachabilityCardinality-01 sara is running. LamportFastMutEx-COL-5-ReachabilityCardinality-01 512451 m, 23716 m/sec, 788182 t fired, . 3 LamportFastMutEx-COL-5-ReachabilityCardinality-01 LamportFastMutEx-COL-5-ReachabilityCardinality-01 VALUE PRODUCED BY AG true skeleton: tandem / relaxed EF true findpath AG false tandem / insertion AG false tandem / relaxed EF false skeleton: tandem / insertion AG false tandem / relaxed AG true skeleton: tandem / relaxed AG false tandem / insertion AG false findpath EF true findpath EF false skeleton: tandem / insertion AG false findpath AG false tandem / insertion AG false tandem / insertion AG false tandem / relaxed IDL ACT RUN SUS FIN C/T C/M OBS AG 0 0 3 0 3 0 1 3 STATUS LamportFastMutEx-COL-5-ReachabilityCardinality-01 3283693 t fired, 4 attempts, . LamportFastMutEx-COL-5-ReachabilityCardinality-01 sara is running. LamportFastMutEx-COL-5-ReachabilityCardinality-01 661979 m, 29905 m/sec, 1027348 t fired, . VALUE PRODUCED BY AG true skeleton: tandem / relaxed EF true findpath AG false tandem / insertion AG false tandem / relaxed EF false skeleton: tandem / insertion AG false tandem / relaxed AG true skeleton: tandem / relaxed AG false tandem / insertion AG false findpath EF true findpath EF false skeleton: tandem / insertion AG false findpath AG false tandem / insertion AG false tandem / insertion AG false tandem / relaxed IDL ACT RUN SUS FIN C/T C/M OBS AG 0 0 3 0 3 0 1 3 STATUS LamportFastMutEx-COL-5-ReachabilityCardinality-01 3772345 t fired, 4 attempts, . LamportFastMutEx-COL-5-ReachabilityCardinality-01 sara is running. LamportFastMutEx-COL-5-ReachabilityCardinality-01 807365 m, 29077 m/sec, 1263079 t fired, . VALUE PRODUCED BY AG true skeleton: tandem / relaxed EF true findpath AG false tandem / insertion AG false tandem / relaxed EF false skeleton: tandem / insertion AG false tandem / relaxed AG true skeleton: tandem / relaxed AG false tandem / insertion AG false findpath EF true findpath EF false skeleton: tandem / insertion AG false findpath AG false tandem / insertion AG false tandem / insertion AG false tandem / relaxed IDL ACT RUN SUS FIN C/T C/M OBS AG 0 0 3 0 3 0 1 3 STATUS LamportFastMutEx-COL-5-ReachabilityCardinality-01 4220669 t fired, 5 attempts, . LamportFastMutEx-COL-5-ReachabilityCardinality-01 sara is running. LamportFastMutEx-COL-5-ReachabilityCardinality-01 950349 m, 28596 m/sec, 1498585 t fired, . VALUE PRODUCED BY AG true skeleton: tandem / relaxed EF true findpath AG false tandem / insertion AG false tandem / relaxed EF false skeleton: tandem / insertion AG false tandem / relaxed AG true skeleton: tandem / relaxed AG false tandem / insertion AG false findpath EF true findpath EF false skeleton: tandem / insertion AG false findpath AG false tandem / insertion AG false tandem / insertion AG false tandem / relaxed IDL ACT RUN SUS FIN C/T C/M OBS AG 0 0 3 0 3 0 1 3 STATUS LamportFastMutEx-COL-5-ReachabilityCardinality-01 4777177 t fired, 5 attempts, . LamportFastMutEx-COL-5-ReachabilityCardinality-01 sara is running. LamportFastMutEx-COL-5-ReachabilityCardinality-01 1104130 m, 30756 m/sec, 1751327 t fired, . VALUE PRODUCED BY AG true skeleton: tandem / relaxed EF true findpath AG false tandem / insertion AG false tandem / relaxed EF false skeleton: tandem / insertion AG false tandem / relaxed AG true skeleton: tandem / relaxed AG false tandem / insertion AG false findpath EF true findpath EF false skeleton: tandem / insertion AG false findpath AG false tandem / insertion AG false tandem / insertion AG false tandem / relaxed IDL ACT RUN SUS FIN C/T C/M OBS AG 0 0 3 0 3 0 1 3 STATUS LamportFastMutEx-COL-5-ReachabilityCardinality-01 5312328 t fired, 6 attempts, . LamportFastMutEx-COL-5-ReachabilityCardinality-01 sara is running. LamportFastMutEx-COL-5-ReachabilityCardinality-01 1258052 m, 30784 m/sec, 2009443 t fired, . VALUE PRODUCED BY AG true skeleton: tandem / relaxed EF true findpath AG false tandem / insertion AG false tandem / relaxed EF false skeleton: tandem / insertion AG false tandem / relaxed AG true skeleton: tandem / relaxed AG false tandem / insertion AG false findpath EF true findpath EF false skeleton: tandem / insertion AG false findpath AG false tandem / insertion AG false tandem / insertion AG false tandem / relaxed IDL ACT RUN SUS FIN C/T C/M OBS AG 0 0 3 0 3 0 1 3 STATUS LamportFastMutEx-COL-5-ReachabilityCardinality-01 5787346 t fired, 6 attempts, . LamportFastMutEx-COL-5-ReachabilityCardinality-01 sara is running. LamportFastMutEx-COL-5-ReachabilityCardinality-01 1407192 m, 29828 m/sec, 2258904 t fired, . VALUE PRODUCED BY AG true skeleton: tandem / relaxed EF true findpath AG false tandem / insertion AG false tandem / relaxed EF false skeleton: tandem / insertion AG false tandem / relaxed AG true skeleton: tandem / relaxed AG false tandem / insertion AG false findpath EF true findpath EF false skeleton: tandem / insertion AG false findpath AG false tandem / insertion AG false tandem / insertion AG false tandem / relaxed IDL ACT RUN SUS FIN C/T C/M OBS AG 0 0 3 0 3 0 1 3 STATUS LamportFastMutEx-COL-5-ReachabilityCardinality-01 6276635 t fired, 7 attempts, . LamportFastMutEx-COL-5-ReachabilityCardinality-01 sara is running. LamportFastMutEx-COL-5-ReachabilityCardinality-01 1556798 m, 29921 m/sec, 2512117 t fired, . VALUE PRODUCED BY AG true skeleton: tandem / relaxed EF true findpath AG false tandem / insertion AG false tandem / relaxed EF false skeleton: tandem / insertion AG false tandem / relaxed AG true skeleton: tandem / relaxed AG false tandem / insertion AG false findpath EF true findpath EF false skeleton: tandem / insertion AG false findpath AG false tandem / insertion AG false tandem / insertion AG false tandem / relaxed IDL ACT RUN SUS FIN C/T C/M OBS AG 0 0 3 0 3 0 1 3 STATUS LamportFastMutEx-COL-5-ReachabilityCardinality-01 6829899 t fired, 7 attempts, . LamportFastMutEx-COL-5-ReachabilityCardinality-01 sara is running. LamportFastMutEx-COL-5-ReachabilityCardinality-01 1713063 m, 31253 m/sec, 2779398 t fired, . VALUE PRODUCED BY AG true skeleton: tandem / relaxed EF true findpath AG false tandem / insertion AG false tandem / relaxed EF false skeleton: tandem / insertion AG false tandem / relaxed AG true skeleton: tandem / relaxed AG false tandem / insertion AG false findpath EF true findpath EF false skeleton: tandem / insertion AG false findpath AG false tandem / insertion AG false tandem / insertion AG false tandem / relaxed IDL ACT RUN SUS FIN C/T C/M OBS AG 0 0 3 0 3 0 1 3 STATUS LamportFastMutEx-COL-5-ReachabilityCardinality-01 7339542 t fired, 8 attempts, . LamportFastMutEx-COL-5-ReachabilityCardinality-01 sara is running. LamportFastMutEx-COL-5-ReachabilityCardinality-01 1855009 m, 28389 m/sec, 3023965 t fired, . VALUE PRODUCED BY AG true skeleton: tandem / relaxed EF true findpath AG false tandem / insertion AG false tandem / relaxed EF false skeleton: tandem / insertion AG false tandem / relaxed AG true skeleton: tandem / relaxed AG false tandem / insertion AG false findpath EF true findpath EF false skeleton: tandem / insertion AG false findpath AG false tandem / insertion AG false tandem / insertion AG false tandem / relaxed IDL ACT RUN SUS FIN C/T C/M OBS AG 0 0 3 0 3 0 1 3 STATUS LamportFastMutEx-COL-5-ReachabilityCardinality-01 7872308 t fired, 8 attempts, . LamportFastMutEx-COL-5-ReachabilityCardinality-01 sara is running. LamportFastMutEx-COL-5-ReachabilityCardinality-01 1996958 m, 28389 m/sec, 3271997 t fired, . VALUE PRODUCED BY AG true skeleton: tandem / relaxed EF true findpath AG false tandem / insertion AG false tandem / relaxed EF false skeleton: tandem / insertion AG false tandem / relaxed AG true skeleton: tandem / relaxed AG false tandem / insertion AG false findpath EF true findpath EF false skeleton: tandem / insertion AG false findpath AG false tandem / insertion AG false tandem / insertion AG false tandem / relaxed IDL ACT RUN SUS FIN C/T C/M OBS AG 0 0 3 0 3 0 1 3 STATUS LamportFastMutEx-COL-5-ReachabilityCardinality-01 8391352 t fired, 9 attempts, . LamportFastMutEx-COL-5-ReachabilityCardinality-01 sara is running. LamportFastMutEx-COL-5-ReachabilityCardinality-01 2139741 m, 28556 m/sec, 3526184 t fired, . VALUE PRODUCED BY AG true skeleton: tandem / relaxed EF true findpath AG false tandem / insertion AG false tandem / relaxed EF false skeleton: tandem / insertion AG false tandem / relaxed AG true skeleton: tandem / relaxed AG false tandem / insertion AG false findpath EF true findpath EF false skeleton: tandem / insertion AG false findpath AG false tandem / insertion AG false tandem / insertion AG false tandem / relaxed IDL ACT RUN SUS FIN C/T C/M OBS AG 0 0 3 0 3 0 1 3 STATUS LamportFastMutEx-COL-5-ReachabilityCardinality-01 8876043 t fired, 9 attempts, . LamportFastMutEx-COL-5-ReachabilityCardinality-01 sara is running. LamportFastMutEx-COL-5-ReachabilityCardinality-01 2289636 m, 29979 m/sec, 3796289 t fired, . VALUE PRODUCED BY AG true skeleton: tandem / relaxed EF true findpath AG false tandem / insertion AG false tandem / relaxed EF false skeleton: tandem / insertion AG false tandem / relaxed AG true skeleton: tandem / relaxed AG false tandem / insertion AG false findpath EF true findpath EF false skeleton: tandem / insertion AG false findpath AG false tandem / insertion AG false tandem / insertion AG false tandem / relaxed IDL ACT RUN SUS FIN C/T C/M OBS AG 0 0 3 0 3 0 1 3 STATUS LamportFastMutEx-COL-5-ReachabilityCardinality-01 9403434 t fired, 10 attempts, . LamportFastMutEx-COL-5-ReachabilityCardinality-01 sara is running. LamportFastMutEx-COL-5-ReachabilityCardinality-01 2433229 m, 28718 m/sec, 4059768 t fired, . VALUE PRODUCED BY AG true skeleton: tandem / relaxed EF true findpath AG false tandem / insertion AG false tandem / relaxed EF false skeleton: tandem / insertion AG false tandem / relaxed AG true skeleton: tandem / relaxed AG false tandem / insertion AG false findpath EF true findpath EF false skeleton: tandem / insertion AG false findpath AG false tandem / insertion AG false tandem / insertion AG false tandem / relaxed IDL ACT RUN SUS FIN C/T C/M OBS AG 0 0 3 0 3 0 1 3 STATUS LamportFastMutEx-COL-5-ReachabilityCardinality-01 9890371 t fired, 10 attempts, . LamportFastMutEx-COL-5-ReachabilityCardinality-01 sara is running. LamportFastMutEx-COL-5-ReachabilityCardinality-01 2574528 m, 28259 m/sec, 4316961 t fired, . VALUE PRODUCED BY AG true skeleton: tandem / relaxed EF true findpath AG false tandem / insertion AG false tandem / relaxed EF false skeleton: tandem / insertion AG false tandem / relaxed AG true skeleton: tandem / relaxed AG false tandem / insertion AG false findpath EF true findpath EF false skeleton: tandem / insertion AG false findpath AG false tandem / insertion AG false tandem / insertion AG false tandem / relaxed IDL ACT RUN SUS FIN C/T C/M OBS AG 0 0 3 0 3 0 1 3 STATUS LamportFastMutEx-COL-5-ReachabilityCardinality-01 10391291 t fired, 11 attempts, . LamportFastMutEx-COL-5-ReachabilityCardinality-01 sara is running. LamportFastMutEx-COL-5-ReachabilityCardinality-01 2715252 m, 28144 m/sec, 4574186 t fired, . VALUE PRODUCED BY AG true skeleton: tandem / relaxed EF true findpath AG false tandem / insertion AG false tandem / relaxed EF false skeleton: tandem / insertion AG false tandem / relaxed AG true skeleton: tandem / relaxed AG false tandem / insertion AG false findpath EF true findpath EF false skeleton: tandem / insertion AG false findpath AG false tandem / insertion AG false tandem / insertion AG false tandem / relaxed IDL ACT RUN SUS FIN C/T C/M OBS AG 0 0 3 0 3 0 1 3 STATUS LamportFastMutEx-COL-5-ReachabilityCardinality-01 10886554 t fired, 11 attempts, . LamportFastMutEx-COL-5-ReachabilityCardinality-01 sara is running. LamportFastMutEx-COL-5-ReachabilityCardinality-01 2864596 m, 29868 m/sec, 4845483 t fired, . VALUE PRODUCED BY AG true skeleton: tandem / relaxed EF true findpath AG false tandem / insertion AG false tandem / relaxed EF false skeleton: tandem / insertion AG false tandem / relaxed AG true skeleton: tandem / relaxed AG false tandem / insertion AG false findpath EF true findpath EF false skeleton: tandem / insertion AG false findpath AG false tandem / insertion AG false tandem / insertion AG false tandem / relaxed IDL ACT RUN SUS FIN C/T C/M OBS AG 0 0 3 0 3 0 1 3 STATUS LamportFastMutEx-COL-5-ReachabilityCardinality-01 11395461 t fired, 12 attempts, . LamportFastMutEx-COL-5-ReachabilityCardinality-01 sara is running. LamportFastMutEx-COL-5-ReachabilityCardinality-01 3004075 m, 27895 m/sec, 5108525 t fired, . VALUE PRODUCED BY AG true skeleton: tandem / relaxed EF true findpath AG false tandem / insertion AG false tandem / relaxed EF false skeleton: tandem / insertion AG false tandem / relaxed AG true skeleton: tandem / relaxed AG false tandem / insertion AG false findpath EF true findpath EF false skeleton: tandem / insertion AG false findpath AG false tandem / insertion AG false tandem / insertion AG false tandem / relaxed IDL ACT RUN SUS FIN C/T C/M OBS AG 0 0 3 0 3 0 1 3 STATUS LamportFastMutEx-COL-5-ReachabilityCardinality-01 11935306 t fired, 12 attempts, . LamportFastMutEx-COL-5-ReachabilityCardinality-01 sara is running. LamportFastMutEx-COL-5-ReachabilityCardinality-01 3137916 m, 26768 m/sec, 5363264 t fired, . VALUE PRODUCED BY AG true skeleton: tandem / relaxed EF true findpath AG false tandem / insertion AG false tandem / relaxed EF false skeleton: tandem / insertion AG false tandem / relaxed AG true skeleton: tandem / relaxed AG false tandem / insertion AG false findpath EF true findpath EF false skeleton: tandem / insertion AG false findpath AG false tandem / insertion AG false tandem / insertion AG false tandem / relaxed IDL ACT RUN SUS FIN C/T C/M OBS AG 0 0 3 0 3 0 1 3 STATUS LamportFastMutEx-COL-5-ReachabilityCardinality-01 12444626 t fired, 13 attempts, . LamportFastMutEx-COL-5-ReachabilityCardinality-01 sara is running. LamportFastMutEx-COL-5-ReachabilityCardinality-01 3282755 m, 28967 m/sec, 5635923 t fired, . VALUE PRODUCED BY AG true skeleton: tandem / relaxed EF true findpath AG false tandem / insertion AG false tandem / relaxed EF false skeleton: tandem / insertion AG false tandem / relaxed AG true skeleton: tandem / relaxed AG false tandem / insertion AG false findpath EF true findpath EF false skeleton: tandem / insertion AG false findpath AG false tandem / insertion AG false tandem / insertion AG false tandem / relaxed IDL ACT RUN SUS FIN C/T C/M OBS AG 0 0 3 0 3 0 1 3 STATUS LamportFastMutEx-COL-5-ReachabilityCardinality-01 12950658 t fired, 13 attempts, . LamportFastMutEx-COL-5-ReachabilityCardinality-01 sara is running. LamportFastMutEx-COL-5-ReachabilityCardinality-01 3431790 m, 29807 m/sec, 5916449 t fired, . VALUE PRODUCED BY AG true skeleton: tandem / relaxed EF true findpath AG false tandem / insertion AG false tandem / relaxed EF false skeleton: tandem / insertion AG false tandem / relaxed AG true skeleton: tandem / relaxed AG false tandem / insertion AG false findpath EF true findpath EF false skeleton: tandem / insertion AG false findpath AG false tandem / insertion AG false tandem / insertion AG false tandem / relaxed IDL ACT RUN SUS FIN C/T C/M OBS AG 0 0 3 0 3 0 1 3 STATUS LamportFastMutEx-COL-5-ReachabilityCardinality-01 13462190 t fired, 14 attempts, . LamportFastMutEx-COL-5-ReachabilityCardinality-01 sara is running. LamportFastMutEx-COL-5-ReachabilityCardinality-01 3563905 m, 26423 m/sec, 6172687 t fired, . VALUE PRODUCED BY AG true skeleton: tandem / relaxed EF true findpath AG false tandem / insertion AG false tandem / relaxed EF false skeleton: tandem / insertion AG false tandem / relaxed AG true skeleton: tandem / relaxed AG false tandem / insertion AG false findpath EF true findpath EF false skeleton: tandem / insertion AG false findpath AG false tandem / insertion AG false tandem / insertion AG false tandem / relaxed IDL ACT RUN SUS FIN C/T C/M OBS AG 0 0 3 0 3 0 1 3 STATUS LamportFastMutEx-COL-5-ReachabilityCardinality-01 14020054 t fired, 15 attempts, . LamportFastMutEx-COL-5-ReachabilityCardinality-01 sara is running. LamportFastMutEx-COL-5-ReachabilityCardinality-01 3696419 m, 26502 m/sec, 6430542 t fired, . VALUE PRODUCED BY AG true skeleton: tandem / relaxed EF true findpath AG false tandem / insertion AG false tandem / relaxed EF false skeleton: tandem / insertion AG false tandem / relaxed AG true skeleton: tandem / relaxed AG false tandem / insertion AG false findpath EF true findpath EF false skeleton: tandem / insertion AG false findpath AG false tandem / insertion AG false tandem / insertion AG false tandem / relaxed IDL ACT RUN SUS FIN C/T C/M OBS AG 0 0 3 0 3 0 1 3 STATUS LamportFastMutEx-COL-5-ReachabilityCardinality-01 14565306 t fired, 15 attempts, . LamportFastMutEx-COL-5-ReachabilityCardinality-01 sara is running. LamportFastMutEx-COL-5-ReachabilityCardinality-01 3830226 m, 26761 m/sec, 6687821 t fired, . VALUE PRODUCED BY AG true skeleton: tandem / relaxed EF true findpath AG false tandem / insertion AG false tandem / relaxed EF false skeleton: tandem / insertion AG false tandem / relaxed AG true skeleton: tandem / relaxed AG false tandem / insertion AG false findpath EF true findpath EF false skeleton: tandem / insertion AG false findpath AG false tandem / insertion AG false tandem / insertion AG false tandem / relaxed IDL ACT RUN SUS FIN C/T C/M OBS AG 0 0 3 0 3 0 1 3 STATUS LamportFastMutEx-COL-5-ReachabilityCardinality-01 15036341 t fired, 16 attempts, . LamportFastMutEx-COL-5-ReachabilityCardinality-01 sara is running. LamportFastMutEx-COL-5-ReachabilityCardinality-01 3969195 m, 27793 m/sec, 6955307 t fired, . VALUE PRODUCED BY AG true skeleton: tandem / relaxed EF true findpath AG false tandem / insertion AG false tandem / relaxed EF false skeleton: tandem / insertion AG false tandem / relaxed AG true skeleton: tandem / relaxed AG false tandem / insertion AG false findpath EF true findpath EF false skeleton: tandem / insertion AG false findpath AG false tandem / insertion AG false tandem / insertion AG false tandem / relaxed IDL ACT RUN SUS FIN C/T C/M OBS AG 0 0 3 0 3 0 1 3 STATUS LamportFastMutEx-COL-5-ReachabilityCardinality-01 15532750 t fired, 16 attempts, . LamportFastMutEx-COL-5-ReachabilityCardinality-01 sara is running. LamportFastMutEx-COL-5-ReachabilityCardinality-01 4104380 m, 27037 m/sec, 7218488 t fired, . VALUE PRODUCED BY AG true skeleton: tandem / relaxed EF true findpath AG false tandem / insertion AG false tandem / relaxed EF false skeleton: tandem / insertion AG false tandem / relaxed AG true skeleton: tandem / relaxed AG false tandem / insertion AG false findpath EF true findpath EF false skeleton: tandem / insertion AG false findpath AG false tandem / insertion AG false tandem / insertion AG false tandem / relaxed IDL ACT RUN SUS FIN C/T C/M OBS AG 0 0 3 0 3 0 1 3 STATUS LamportFastMutEx-COL-5-ReachabilityCardinality-01 16036295 t fired, 17 attempts, . LamportFastMutEx-COL-5-ReachabilityCardinality-01 sara is running. LamportFastMutEx-COL-5-ReachabilityCardinality-01 4250483 m, 29220 m/sec, 7501376 t fired, . VALUE PRODUCED BY AG true skeleton: tandem / relaxed EF true findpath AG false tandem / insertion AG false tandem / relaxed EF false skeleton: tandem / insertion AG false tandem / relaxed AG true skeleton: tandem / relaxed AG false tandem / insertion AG false findpath EF true findpath EF false skeleton: tandem / insertion AG false findpath AG false tandem / insertion AG false tandem / insertion AG false tandem / relaxed IDL ACT RUN SUS FIN C/T C/M OBS AG 0 0 3 0 3 0 1 3 STATUS LamportFastMutEx-COL-5-ReachabilityCardinality-01 16585756 t fired, 17 attempts, . LamportFastMutEx-COL-5-ReachabilityCardinality-01 sara is running. LamportFastMutEx-COL-5-ReachabilityCardinality-01 4391748 m, 28253 m/sec, 7784792 t fired, . VALUE PRODUCED BY AG true skeleton: tandem / relaxed EF true findpath AG false tandem / insertion AG false tandem / relaxed EF false skeleton: tandem / insertion AG false tandem / relaxed AG true skeleton: tandem / relaxed AG false tandem / insertion AG false findpath EF true findpath EF false skeleton: tandem / insertion AG false findpath AG false tandem / insertion AG false tandem / insertion AG false tandem / relaxed IDL ACT RUN SUS FIN C/T C/M OBS AG 0 0 3 0 3 0 1 3 STATUS LamportFastMutEx-COL-5-ReachabilityCardinality-01 17077378 t fired, 18 attempts, . LamportFastMutEx-COL-5-ReachabilityCardinality-01 sara is running. LamportFastMutEx-COL-5-ReachabilityCardinality-01 4524699 m, 26590 m/sec, 8050990 t fired, . VALUE PRODUCED BY AG true skeleton: tandem / relaxed EF true findpath AG false tandem / insertion AG false tandem / relaxed EF false skeleton: tandem / insertion AG false tandem / relaxed AG true skeleton: tandem / relaxed AG false tandem / insertion AG false findpath EF true findpath EF false skeleton: tandem / insertion AG false findpath AG false tandem / insertion AG false tandem / insertion AG false tandem / relaxed IDL ACT RUN SUS FIN C/T C/M OBS AG 0 0 3 0 3 0 1 3 STATUS LamportFastMutEx-COL-5-ReachabilityCardinality-01 17566597 t fired, 18 attempts, . LamportFastMutEx-COL-5-ReachabilityCardinality-01 sara is running. LamportFastMutEx-COL-5-ReachabilityCardinality-01 4659777 m, 27015 m/sec, 8323152 t fired, . VALUE PRODUCED BY AG true skeleton: tandem / relaxed EF true findpath AG false tandem / insertion AG false tandem / relaxed EF false skeleton: tandem / insertion AG false tandem / relaxed AG true skeleton: tandem / relaxed AG false tandem / insertion AG false findpath EF true findpath EF false skeleton: tandem / insertion AG false findpath AG false tandem / insertion AG false tandem / insertion AG false tandem / relaxed IDL ACT RUN SUS FIN C/T C/M OBS AG 0 0 3 0 3 0 1 3 STATUS LamportFastMutEx-COL-5-ReachabilityCardinality-01 18075995 t fired, 19 attempts, . LamportFastMutEx-COL-5-ReachabilityCardinality-01 sara is running. LamportFastMutEx-COL-5-ReachabilityCardinality-01 4815128 m, 31070 m/sec, 8634078 t fired, . VALUE PRODUCED BY AG true skeleton: tandem / relaxed EF true findpath AG false tandem / insertion AG false tandem / relaxed EF false skeleton: tandem / insertion AG false tandem / relaxed AG true skeleton: tandem / relaxed AG false tandem / insertion AG false findpath EF true findpath EF false skeleton: tandem / insertion AG false findpath AG false tandem / insertion AG false tandem / insertion AG false tandem / relaxed IDL ACT RUN SUS FIN C/T C/M OBS AG 0 0 3 0 3 0 1 3 STATUS LamportFastMutEx-COL-5-ReachabilityCardinality-01 18612406 t fired, 19 attempts, . LamportFastMutEx-COL-5-ReachabilityCardinality-01 sara is running. LamportFastMutEx-COL-5-ReachabilityCardinality-01 4943530 m, 25680 m/sec, 8894149 t fired, . VALUE PRODUCED BY AG true skeleton: tandem / relaxed EF true findpath AG false tandem / insertion AG false tandem / relaxed EF false skeleton: tandem / insertion AG false tandem / relaxed AG true skeleton: tandem / relaxed AG false tandem / insertion AG false findpath EF true findpath EF false skeleton: tandem / insertion AG false findpath AG false tandem / insertion AG false tandem / insertion AG false tandem / relaxed IDL ACT RUN SUS FIN C/T C/M OBS AG 0 0 3 0 3 0 1 3 STATUS LamportFastMutEx-COL-5-ReachabilityCardinality-01 19108979 t fired, 20 attempts, . LamportFastMutEx-COL-5-ReachabilityCardinality-01 sara is running. LamportFastMutEx-COL-5-ReachabilityCardinality-01 5080582 m, 27410 m/sec, 9167147 t fired, . VALUE PRODUCED BY AG true skeleton: tandem / relaxed EF true findpath AG false tandem / insertion AG false tandem / relaxed EF false skeleton: tandem / insertion AG false tandem / relaxed AG true skeleton: tandem / relaxed AG false tandem / insertion AG false findpath EF true findpath EF false skeleton: tandem / insertion AG false findpath AG false tandem / insertion AG false tandem / insertion AG false tandem / relaxed IDL ACT RUN SUS FIN C/T C/M OBS AG 0 0 3 0 3 0 1 3 STATUS LamportFastMutEx-COL-5-ReachabilityCardinality-01 19567334 t fired, 20 attempts, . LamportFastMutEx-COL-5-ReachabilityCardinality-01 sara is running. LamportFastMutEx-COL-5-ReachabilityCardinality-01 5219842 m, 27852 m/sec, 9452910 t fired, . VALUE PRODUCED BY AG true skeleton: tandem / relaxed EF true findpath AG false tandem / insertion AG false tandem / relaxed EF false skeleton: tandem / insertion AG false tandem / relaxed AG true skeleton: tandem / relaxed AG false tandem / insertion AG false findpath EF true findpath EF false skeleton: tandem / insertion AG false findpath AG false tandem / insertion AG false tandem / insertion AG false tandem / relaxed IDL ACT RUN SUS FIN C/T C/M OBS AG 0 0 3 0 3 0 1 3 STATUS LamportFastMutEx-COL-5-ReachabilityCardinality-01 20047830 t fired, 21 attempts, . LamportFastMutEx-COL-5-ReachabilityCardinality-01 sara is running. LamportFastMutEx-COL-5-ReachabilityCardinality-01 5347108 m, 25453 m/sec, 9716155 t fired, . VALUE PRODUCED BY AG true skeleton: tandem / relaxed EF true findpath AG false tandem / insertion AG false tandem / relaxed EF false skeleton: tandem / insertion AG false tandem / relaxed AG true skeleton: tandem / relaxed AG false tandem / insertion AG false findpath EF true findpath EF false skeleton: tandem / insertion AG false findpath AG false tandem / insertion AG false tandem / insertion AG false tandem / relaxed IDL ACT RUN SUS FIN C/T C/M OBS AG 0 0 3 0 3 0 1 3 STATUS LamportFastMutEx-COL-5-ReachabilityCardinality-01 20564461 t fired, 21 attempts, . LamportFastMutEx-COL-5-ReachabilityCardinality-01 sara is running. LamportFastMutEx-COL-5-ReachabilityCardinality-01 5484959 m, 27570 m/sec, 9995436 t fired, . VALUE PRODUCED BY AG true skeleton: tandem / relaxed EF true findpath AG false tandem / insertion AG false tandem / relaxed EF false skeleton: tandem / insertion AG false tandem / relaxed AG true skeleton: tandem / relaxed AG false tandem / insertion AG false findpath EF true findpath EF false skeleton: tandem / insertion AG false findpath AG false tandem / insertion AG false tandem / insertion AG false tandem / relaxed IDL ACT RUN SUS FIN C/T C/M OBS AG 0 0 3 0 3 0 1 3 STATUS LamportFastMutEx-COL-5-ReachabilityCardinality-01 21029444 t fired, 22 attempts, . LamportFastMutEx-COL-5-ReachabilityCardinality-01 sara is running. LamportFastMutEx-COL-5-ReachabilityCardinality-01 5621153 m, 27238 m/sec, 10275614 t fired, . VALUE PRODUCED BY AG true skeleton: tandem / relaxed EF true findpath AG false tandem / insertion AG false tandem / relaxed EF false skeleton: tandem / insertion AG false tandem / relaxed AG true skeleton: tandem / relaxed AG false tandem / insertion AG false findpath EF true findpath EF false skeleton: tandem / insertion AG false findpath AG false tandem / insertion AG false tandem / insertion AG false tandem / relaxed IDL ACT RUN SUS FIN C/T C/M OBS AG 0 0 3 0 3 0 1 3 STATUS LamportFastMutEx-COL-5-ReachabilityCardinality-01 21506455 t fired, 22 attempts, . LamportFastMutEx-COL-5-ReachabilityCardinality-01 sara is running. LamportFastMutEx-COL-5-ReachabilityCardinality-01 5765329 m, 28835 m/sec, 10564237 t fired, . VALUE PRODUCED BY AG true skeleton: tandem / relaxed EF true findpath AG false tandem / insertion AG false tandem / relaxed EF false skeleton: tandem / insertion AG false tandem / relaxed AG true skeleton: tandem / relaxed AG false tandem / insertion AG false findpath EF true findpath EF false skeleton: tandem / insertion AG false findpath AG false tandem / insertion AG false tandem / insertion AG false tandem / relaxed IDL ACT RUN SUS FIN C/T C/M OBS AG 0 0 3 0 3 0 1 3 STATUS LamportFastMutEx-COL-5-ReachabilityCardinality-01 21983845 t fired, 22 attempts, . LamportFastMutEx-COL-5-ReachabilityCardinality-01 sara is running. LamportFastMutEx-COL-5-ReachabilityCardinality-01 5907605 m, 28455 m/sec, 10858983 t fired, . VALUE PRODUCED BY AG true skeleton: tandem / relaxed EF true findpath AG false tandem / insertion AG false tandem / relaxed EF false skeleton: tandem / insertion AG false tandem / relaxed AG true skeleton: tandem / relaxed AG false tandem / insertion AG false findpath EF true findpath EF false skeleton: tandem / insertion AG false findpath AG false tandem / insertion AG false tandem / insertion AG false tandem / relaxed IDL ACT RUN SUS FIN C/T C/M OBS AG 0 0 3 0 3 0 1 3 STATUS LamportFastMutEx-COL-5-ReachabilityCardinality-01 22487636 t fired, 23 attempts, . LamportFastMutEx-COL-5-ReachabilityCardinality-01 sara is running. LamportFastMutEx-COL-5-ReachabilityCardinality-01 6040739 m, 26626 m/sec, 11134659 t fired, . VALUE PRODUCED BY AG true skeleton: tandem / relaxed EF true findpath AG false tandem / insertion AG false tandem / relaxed EF false skeleton: tandem / insertion AG false tandem / relaxed AG true skeleton: tandem / relaxed AG false tandem / insertion AG false findpath EF true findpath EF false skeleton: tandem / insertion AG false findpath AG false tandem / insertion AG false tandem / insertion AG false tandem / relaxed IDL ACT RUN SUS FIN C/T C/M OBS AG 0 0 3 0 3 0 1 3 STATUS LamportFastMutEx-COL-5-ReachabilityCardinality-01 22958724 t fired, 23 attempts, . LamportFastMutEx-COL-5-ReachabilityCardinality-01 sara is running. LamportFastMutEx-COL-5-ReachabilityCardinality-01 6179368 m, 27725 m/sec, 11417011 t fired, . VALUE PRODUCED BY AG true skeleton: tandem / relaxed EF true findpath AG false tandem / insertion AG false tandem / relaxed EF false skeleton: tandem / insertion AG false tandem / relaxed AG true skeleton: tandem / relaxed AG false tandem / insertion AG false findpath EF true findpath EF false skeleton: tandem / insertion AG false findpath AG false tandem / insertion AG false tandem / insertion AG false tandem / relaxed IDL ACT RUN SUS FIN C/T C/M OBS AG 0 0 3 0 3 0 1 3 STATUS LamportFastMutEx-COL-5-ReachabilityCardinality-01 23479241 t fired, 24 attempts, . LamportFastMutEx-COL-5-ReachabilityCardinality-01 sara is running. LamportFastMutEx-COL-5-ReachabilityCardinality-01 6325961 m, 29318 m/sec, 11722850 t fired, . VALUE PRODUCED BY AG true skeleton: tandem / relaxed EF true findpath AG false tandem / insertion AG false tandem / relaxed EF false skeleton: tandem / insertion AG false tandem / relaxed AG true skeleton: tandem / relaxed AG false tandem / insertion AG false findpath EF true findpath EF false skeleton: tandem / insertion AG false findpath AG false tandem / insertion AG false tandem / insertion AG false tandem / relaxed IDL ACT RUN SUS FIN C/T C/M OBS AG 0 0 3 0 3 0 1 3 STATUS LamportFastMutEx-COL-5-ReachabilityCardinality-01 24053550 t fired, 25 attempts, . LamportFastMutEx-COL-5-ReachabilityCardinality-01 sara is running. LamportFastMutEx-COL-5-ReachabilityCardinality-01 6452356 m, 25279 m/sec, 11987315 t fired, . VALUE PRODUCED BY AG true skeleton: tandem / relaxed EF true findpath AG false tandem / insertion AG false tandem / relaxed EF false skeleton: tandem / insertion AG false tandem / relaxed AG true skeleton: tandem / relaxed AG false tandem / insertion AG false findpath EF true findpath EF false skeleton: tandem / insertion AG false findpath AG false tandem / insertion AG false tandem / insertion AG false tandem / relaxed IDL ACT RUN SUS FIN C/T C/M OBS AG 0 0 3 0 3 0 1 3 STATUS LamportFastMutEx-COL-5-ReachabilityCardinality-01 24531793 t fired, 25 attempts, . LamportFastMutEx-COL-5-ReachabilityCardinality-01 sara is running. LamportFastMutEx-COL-5-ReachabilityCardinality-01 6595851 m, 28699 m/sec, 12292836 t fired, . VALUE PRODUCED BY AG true skeleton: tandem / relaxed EF true findpath AG false tandem / insertion AG false tandem / relaxed EF false skeleton: tandem / insertion AG false tandem / relaxed AG true skeleton: tandem / relaxed AG false tandem / insertion AG false findpath EF true findpath EF false skeleton: tandem / insertion AG false findpath AG false tandem / insertion AG false tandem / insertion AG false tandem / relaxed IDL ACT RUN SUS FIN C/T C/M OBS AG 0 0 3 0 3 0 1 3 STATUS LamportFastMutEx-COL-5-ReachabilityCardinality-01 25024942 t fired, 26 attempts, . LamportFastMutEx-COL-5-ReachabilityCardinality-01 sara is running. LamportFastMutEx-COL-5-ReachabilityCardinality-01 6744279 m, 29685 m/sec, 12600308 t fired, . VALUE PRODUCED BY AG true skeleton: tandem / relaxed EF true findpath AG false tandem / insertion AG false tandem / relaxed EF false skeleton: tandem / insertion AG false tandem / relaxed AG true skeleton: tandem / relaxed AG false tandem / insertion AG false findpath EF true findpath EF false skeleton: tandem / insertion AG false findpath AG false tandem / insertion AG false tandem / insertion AG false tandem / relaxed IDL ACT RUN SUS FIN C/T C/M OBS AG 0 0 3 0 3 0 1 3 STATUS LamportFastMutEx-COL-5-ReachabilityCardinality-01 25531349 t fired, 26 attempts, . LamportFastMutEx-COL-5-ReachabilityCardinality-01 sara is running. LamportFastMutEx-COL-5-ReachabilityCardinality-01 6883900 m, 27924 m/sec, 12888807 t fired, . VALUE PRODUCED BY AG true skeleton: tandem / relaxed EF true findpath AG false tandem / insertion AG false tandem / relaxed EF false skeleton: tandem / insertion AG false tandem / relaxed AG true skeleton: tandem / relaxed AG false tandem / insertion AG false findpath EF true findpath EF false skeleton: tandem / insertion AG false findpath AG false tandem / insertion AG false tandem / insertion AG false tandem / relaxed IDL ACT RUN SUS FIN C/T C/M OBS AG 0 0 3 0 3 0 1 3 STATUS LamportFastMutEx-COL-5-ReachabilityCardinality-01 26022895 t fired, 27 attempts, . LamportFastMutEx-COL-5-ReachabilityCardinality-01 sara is running. LamportFastMutEx-COL-5-ReachabilityCardinality-01 7020863 m, 27392 m/sec, 13171869 t fired, . VALUE PRODUCED BY AG true skeleton: tandem / relaxed EF true findpath AG false tandem / insertion AG false tandem / relaxed EF false skeleton: tandem / insertion AG false tandem / relaxed AG true skeleton: tandem / relaxed AG false tandem / insertion AG false findpath EF true findpath EF false skeleton: tandem / insertion AG false findpath AG false tandem / insertion AG false tandem / insertion AG false tandem / relaxed IDL ACT RUN SUS FIN C/T C/M OBS AG 0 0 3 0 3 0 1 3 STATUS LamportFastMutEx-COL-5-ReachabilityCardinality-01 26466439 t fired, 27 attempts, . LamportFastMutEx-COL-5-ReachabilityCardinality-01 sara is running. LamportFastMutEx-COL-5-ReachabilityCardinality-01 7160195 m, 27866 m/sec, 13459785 t fired, . VALUE PRODUCED BY AG true skeleton: tandem / relaxed EF true findpath AG false tandem / insertion AG false tandem / relaxed EF false skeleton: tandem / insertion AG false tandem / relaxed AG true skeleton: tandem / relaxed AG false tandem / insertion AG false findpath EF true findpath EF false skeleton: tandem / insertion AG false findpath AG false tandem / insertion AG false tandem / insertion AG false tandem / relaxed IDL ACT RUN SUS FIN C/T C/M OBS AG 0 0 3 0 3 0 1 3 STATUS LamportFastMutEx-COL-5-ReachabilityCardinality-01 26918239 t fired, 27 attempts, . LamportFastMutEx-COL-5-ReachabilityCardinality-01 sara is running. LamportFastMutEx-COL-5-ReachabilityCardinality-01 7295514 m, 27063 m/sec, 13735280 t fired, . LamportFastMutEx-COL-5-ReachabilityCardinality-01 (memory limit exceeded) VALUE PRODUCED BY AG true skeleton: tandem / relaxed EF true findpath AG false tandem / insertion AG false tandem / relaxed EF false skeleton: tandem / insertion AG false tandem / relaxed AG true skeleton: tandem / relaxed AG false tandem / insertion AG false findpath EF true findpath EF false skeleton: tandem / insertion AG false findpath AG false tandem / insertion AG false tandem / insertion AG false tandem / relaxed IDL ACT RUN SUS FIN C/T C/M OBS AG 0 0 2 0 3 0 2 3 STATUS LamportFastMutEx-COL-5-ReachabilityCardinality-01 27398855 t fired, 28 attempts, . LamportFastMutEx-COL-5-ReachabilityCardinality-01 sara is running. VALUE PRODUCED BY AG true skeleton: tandem / relaxed EF true findpath AG false tandem / insertion AG false tandem / relaxed EF false skeleton: tandem / insertion AG false tandem / relaxed AG true skeleton: tandem / relaxed AG false tandem / insertion AG false findpath EF true findpath EF false skeleton: tandem / insertion AG false findpath AG false tandem / insertion AG false tandem / insertion AG false tandem / relaxed IDL ACT RUN SUS FIN C/T C/M OBS AG 0 0 2 0 3 0 2 3 STATUS LamportFastMutEx-COL-5-ReachabilityCardinality-01 27934988 t fired, 28 attempts, . LamportFastMutEx-COL-5-ReachabilityCardinality-01 sara is running. VALUE PRODUCED BY AG true skeleton: tandem / relaxed EF true findpath AG false tandem / insertion AG false tandem / relaxed EF false skeleton: tandem / insertion AG false tandem / relaxed AG true skeleton: tandem / relaxed AG false tandem / insertion AG false findpath EF true findpath EF false skeleton: tandem / insertion AG false findpath AG false tandem / insertion AG false tandem / insertion AG false tandem / relaxed IDL ACT RUN SUS FIN C/T C/M OBS AG 0 0 2 0 3 0 2 3 STATUS LamportFastMutEx-COL-5-ReachabilityCardinality-01 28469439 t fired, 29 attempts, . LamportFastMutEx-COL-5-ReachabilityCardinality-01 sara is running. VALUE PRODUCED BY AG true skeleton: tandem / relaxed EF true findpath AG false tandem / insertion AG false tandem / relaxed EF false skeleton: tandem / insertion AG false tandem / relaxed AG true skeleton: tandem / relaxed AG false tandem / insertion AG false findpath EF true findpath EF false skeleton: tandem / insertion AG false findpath AG false tandem / insertion AG false tandem / insertion AG false tandem / relaxed IDL ACT RUN SUS FIN C/T C/M OBS AG 0 0 2 0 3 0 2 3 STATUS LamportFastMutEx-COL-5-ReachabilityCardinality-01 28982945 t fired, 29 attempts, . LamportFastMutEx-COL-5-ReachabilityCardinality-01 sara is running. VALUE PRODUCED BY AG true skeleton: tandem / relaxed EF true findpath AG false tandem / insertion AG false tandem / relaxed EF false skeleton: tandem / insertion AG false tandem / relaxed AG true skeleton: tandem / relaxed AG false tandem / insertion AG false findpath EF true findpath EF false skeleton: tandem / insertion AG false findpath AG false tandem / insertion AG false tandem / insertion AG false tandem / relaxed IDL ACT RUN SUS FIN C/T C/M OBS AG 0 0 2 0 3 0 2 3 STATUS LamportFastMutEx-COL-5-ReachabilityCardinality-01 29484059 t fired, 30 attempts, . LamportFastMutEx-COL-5-ReachabilityCardinality-01 sara is running. VALUE PRODUCED BY AG true skeleton: tandem / relaxed EF true findpath AG false tandem / insertion AG false tandem / relaxed EF false skeleton: tandem / insertion AG false tandem / relaxed AG true skeleton: tandem / relaxed AG false tandem / insertion AG false findpath EF true findpath EF false skeleton: tandem / insertion AG false findpath AG false tandem / insertion AG false tandem / insertion AG false tandem / relaxed IDL ACT RUN SUS FIN C/T C/M OBS AG 0 0 2 0 3 0 2 3 STATUS LamportFastMutEx-COL-5-ReachabilityCardinality-01 29914115 t fired, 30 attempts, . LamportFastMutEx-COL-5-ReachabilityCardinality-01 sara is running. VALUE PRODUCED BY AG true skeleton: tandem / relaxed EF true findpath AG false tandem / insertion AG false tandem / relaxed EF false skeleton: tandem / insertion AG false tandem / relaxed AG true skeleton: tandem / relaxed AG false tandem / insertion AG false findpath EF true findpath EF false skeleton: tandem / insertion AG false findpath AG false tandem / insertion AG false tandem / insertion AG false tandem / relaxed IDL ACT RUN SUS FIN C/T C/M OBS AG 0 0 2 0 3 0 2 3 STATUS LamportFastMutEx-COL-5-ReachabilityCardinality-01 30411314 t fired, 31 attempts, . LamportFastMutEx-COL-5-ReachabilityCardinality-01 sara is running. VALUE PRODUCED BY AG true skeleton: tandem / relaxed EF true findpath AG false tandem / insertion AG false tandem / relaxed EF false skeleton: tandem / insertion AG false tandem / relaxed AG true skeleton: tandem / relaxed AG false tandem / insertion AG false findpath EF true findpath EF false skeleton: tandem / insertion AG false findpath AG false tandem / insertion AG false tandem / insertion AG false tandem / relaxed IDL ACT RUN SUS FIN C/T C/M OBS AG 0 0 2 0 3 0 2 3 STATUS LamportFastMutEx-COL-5-ReachabilityCardinality-01 30891736 t fired, 31 attempts, . LamportFastMutEx-COL-5-ReachabilityCardinality-01 sara is running. VALUE PRODUCED BY AG true skeleton: tandem / relaxed EF true findpath AG false tandem / insertion AG false tandem / relaxed EF false skeleton: tandem / insertion AG false tandem / relaxed AG true skeleton: tandem / relaxed AG false tandem / insertion AG false findpath EF true findpath EF false skeleton: tandem / insertion AG false findpath AG false tandem / insertion AG false tandem / insertion AG false tandem / relaxed IDL ACT RUN SUS FIN C/T C/M OBS AG 0 0 2 0 3 0 2 3 STATUS LamportFastMutEx-COL-5-ReachabilityCardinality-01 31249410 t fired, 32 attempts, . LamportFastMutEx-COL-5-ReachabilityCardinality-01 sara is running. LamportFastMutEx-COL-5-ReachabilityCardinality-14 LamportFastMutEx-COL-5-ReachabilityCardinality-12 VALUE PRODUCED BY AG true skeleton: tandem / relaxed EF true findpath AG false tandem / insertion AG false tandem / relaxed EF false skeleton: tandem / insertion AG false tandem / relaxed AG true skeleton: tandem / relaxed AG false tandem / insertion AG false findpath EF true findpath EF false skeleton: tandem / insertion AG false findpath AG false tandem / insertion AG false tandem / insertion AG false tandem / relaxed IDL ACT RUN SUS FIN C/T C/M OBS AG 0 0 2 0 3 0 2 3 STATUS LamportFastMutEx-COL-5-ReachabilityCardinality-01 31785019 t fired, 32 attempts, . LamportFastMutEx-COL-5-ReachabilityCardinality-01 sara is running. VALUE PRODUCED BY AG true skeleton: tandem / relaxed EF true findpath AG false tandem / insertion AG false tandem / relaxed EF false skeleton: tandem / insertion AG false tandem / relaxed AG true skeleton: tandem / relaxed AG false tandem / insertion AG false findpath EF true findpath EF false skeleton: tandem / insertion AG false findpath AG false tandem / insertion AG false tandem / insertion AG false tandem / relaxed IDL ACT RUN SUS FIN C/T C/M OBS AG 0 0 2 0 3 0 2 3 STATUS LamportFastMutEx-COL-5-ReachabilityCardinality-01 32310332 t fired, 33 attempts, . LamportFastMutEx-COL-5-ReachabilityCardinality-01 sara is running. VALUE PRODUCED BY AG true skeleton: tandem / relaxed EF true findpath AG false tandem / insertion AG false tandem / relaxed EF false skeleton: tandem / insertion AG false tandem / relaxed AG true skeleton: tandem / relaxed AG false tandem / insertion AG false findpath EF true findpath EF false skeleton: tandem / insertion AG false findpath AG false tandem / insertion AG false tandem / insertion AG false tandem / relaxed IDL ACT RUN SUS FIN C/T C/M OBS AG 0 0 2 0 3 0 2 3 STATUS LamportFastMutEx-COL-5-ReachabilityCardinality-01 32835076 t fired, 33 attempts, . LamportFastMutEx-COL-5-ReachabilityCardinality-01 sara is running. VALUE PRODUCED BY AG true skeleton: tandem / relaxed EF true findpath AG false tandem / insertion AG false tandem / relaxed EF false skeleton: tandem / insertion AG false tandem / relaxed AG true skeleton: tandem / relaxed AG false tandem / insertion AG false findpath EF true findpath EF false skeleton: tandem / insertion AG false findpath AG false tandem / insertion AG false tandem / insertion AG false tandem / relaxed IDL ACT RUN SUS FIN C/T C/M OBS AG 0 0 2 0 3 0 2 3 STATUS LamportFastMutEx-COL-5-ReachabilityCardinality-01 33360570 t fired, 34 attempts, . LamportFastMutEx-COL-5-ReachabilityCardinality-01 sara is running. VALUE PRODUCED BY AG true skeleton: tandem / relaxed EF true findpath AG false tandem / insertion AG false tandem / relaxed EF false skeleton: tandem / insertion AG false tandem / relaxed AG true skeleton: tandem / relaxed AG false tandem / insertion AG false findpath EF true findpath EF false skeleton: tandem / insertion AG false findpath AG false tandem / insertion AG false tandem / insertion AG false tandem / relaxed IDL ACT RUN SUS FIN C/T C/M OBS AG 0 0 2 0 3 0 2 3 STATUS LamportFastMutEx-COL-5-ReachabilityCardinality-01 33884718 t fired, 34 attempts, . LamportFastMutEx-COL-5-ReachabilityCardinality-01 sara is running. VALUE PRODUCED BY AG true skeleton: tandem / relaxed EF true findpath AG false tandem / insertion AG false tandem / relaxed EF false skeleton: tandem / insertion AG false tandem / relaxed AG true skeleton: tandem / relaxed AG false tandem / insertion AG false findpath EF true findpath EF false skeleton: tandem / insertion AG false findpath AG false tandem / insertion AG false tandem / insertion AG false tandem / relaxed IDL ACT RUN SUS FIN C/T C/M OBS AG 0 0 2 0 3 0 2 3 STATUS LamportFastMutEx-COL-5-ReachabilityCardinality-01 34408520 t fired, 35 attempts, . LamportFastMutEx-COL-5-ReachabilityCardinality-01 sara is running. VALUE PRODUCED BY AG true skeleton: tandem / relaxed EF true findpath AG false tandem / insertion AG false tandem / relaxed EF false skeleton: tandem / insertion AG false tandem / relaxed AG true skeleton: tandem / relaxed AG false tandem / insertion AG false findpath EF true findpath EF false skeleton: tandem / insertion AG false findpath AG false tandem / insertion AG false tandem / insertion AG false tandem / relaxed IDL ACT RUN SUS FIN C/T C/M OBS AG 0 0 2 0 3 0 2 3 STATUS LamportFastMutEx-COL-5-ReachabilityCardinality-01 34938093 t fired, 35 attempts, . LamportFastMutEx-COL-5-ReachabilityCardinality-01 sara is running. VALUE PRODUCED BY AG true skeleton: tandem / relaxed EF true findpath AG false tandem / insertion AG false tandem / relaxed EF false skeleton: tandem / insertion AG false tandem / relaxed AG true skeleton: tandem / relaxed AG false tandem / insertion AG false findpath EF true findpath EF false skeleton: tandem / insertion AG false findpath AG false tandem / insertion AG false tandem / insertion AG false tandem / relaxed IDL ACT RUN SUS FIN C/T C/M OBS AG 0 0 2 0 3 0 2 3 STATUS LamportFastMutEx-COL-5-ReachabilityCardinality-01 35549799 t fired, 36 attempts, . LamportFastMutEx-COL-5-ReachabilityCardinality-01 sara is running. VALUE PRODUCED BY AG true skeleton: tandem / relaxed EF true findpath AG false tandem / insertion AG false tandem / relaxed EF false skeleton: tandem / insertion AG false tandem / relaxed AG true skeleton: tandem / relaxed AG false tandem / insertion AG false findpath EF true findpath EF false skeleton: tandem / insertion AG false findpath AG false tandem / insertion AG false tandem / insertion AG false tandem / relaxed IDL ACT RUN SUS FIN C/T C/M OBS AG 0 0 2 0 3 0 2 3 STATUS LamportFastMutEx-COL-5-ReachabilityCardinality-01 36158462 t fired, 37 attempts, . LamportFastMutEx-COL-5-ReachabilityCardinality-01 sara is running. VALUE PRODUCED BY AG true skeleton: tandem / relaxed EF true findpath AG false tandem / insertion AG false tandem / relaxed EF false skeleton: tandem / insertion AG false tandem / relaxed AG true skeleton: tandem / relaxed AG false tandem / insertion AG false findpath EF true findpath EF false skeleton: tandem / insertion AG false findpath AG false tandem / insertion AG false tandem / insertion AG false tandem / relaxed IDL ACT RUN SUS FIN C/T C/M OBS AG 0 0 2 0 3 0 2 3 STATUS LamportFastMutEx-COL-5-ReachabilityCardinality-01 36765909 t fired, 37 attempts, . LamportFastMutEx-COL-5-ReachabilityCardinality-01 sara is running. VALUE PRODUCED BY AG true skeleton: tandem / relaxed EF true findpath AG false tandem / insertion AG false tandem / relaxed EF false skeleton: tandem / insertion AG false tandem / relaxed AG true skeleton: tandem / relaxed AG false tandem / insertion AG false findpath EF true findpath EF false skeleton: tandem / insertion AG false findpath AG false tandem / insertion AG false tandem / insertion AG false tandem / relaxed IDL ACT RUN SUS FIN C/T C/M OBS AG 0 0 2 0 3 0 2 3 STATUS LamportFastMutEx-COL-5-ReachabilityCardinality-01 37376401 t fired, 38 attempts, . LamportFastMutEx-COL-5-ReachabilityCardinality-01 sara is running. VALUE PRODUCED BY AG true skeleton: tandem / relaxed EF true findpath AG false tandem / insertion AG false tandem / relaxed EF false skeleton: tandem / insertion AG false tandem / relaxed AG true skeleton: tandem / relaxed AG false tandem / insertion AG false findpath EF true findpath EF false skeleton: tandem / insertion AG false findpath AG false tandem / insertion AG false tandem / insertion AG false tandem / relaxed IDL ACT RUN SUS FIN C/T C/M OBS AG 0 0 2 0 3 0 2 3 STATUS LamportFastMutEx-COL-5-ReachabilityCardinality-01 37984809 t fired, 38 attempts, . LamportFastMutEx-COL-5-ReachabilityCardinality-01 sara is running. VALUE PRODUCED BY AG true skeleton: tandem / relaxed EF true findpath AG false tandem / insertion AG false tandem / relaxed EF false skeleton: tandem / insertion AG false tandem / relaxed AG true skeleton: tandem / relaxed AG false tandem / insertion AG false findpath EF true findpath EF false skeleton: tandem / insertion AG false findpath AG false tandem / insertion AG false tandem / insertion AG false tandem / relaxed IDL ACT RUN SUS FIN C/T C/M OBS AG 0 0 2 0 3 0 2 3 STATUS LamportFastMutEx-COL-5-ReachabilityCardinality-01 38594693 t fired, 39 attempts, . LamportFastMutEx-COL-5-ReachabilityCardinality-01 sara is running. VALUE PRODUCED BY AG true skeleton: tandem / relaxed EF true findpath AG false tandem / insertion AG false tandem / relaxed EF false skeleton: tandem / insertion AG false tandem / relaxed AG true skeleton: tandem / relaxed AG false tandem / insertion AG false findpath EF true findpath EF false skeleton: tandem / insertion AG false findpath AG false tandem / insertion AG false tandem / insertion AG false tandem / relaxed IDL ACT RUN SUS FIN C/T C/M OBS AG 0 0 2 0 3 0 2 3 STATUS LamportFastMutEx-COL-5-ReachabilityCardinality-01 39204816 t fired, 40 attempts, . LamportFastMutEx-COL-5-ReachabilityCardinality-01 sara is running. VALUE PRODUCED BY AG true skeleton: tandem / relaxed EF true findpath AG false tandem / insertion AG false tandem / relaxed EF false skeleton: tandem / insertion AG false tandem / relaxed AG true skeleton: tandem / relaxed AG false tandem / insertion AG false findpath EF true findpath EF false skeleton: tandem / insertion AG false findpath AG false tandem / insertion AG false tandem / insertion AG false tandem / relaxed IDL ACT RUN SUS FIN C/T C/M OBS AG 0 0 2 0 3 0 2 3 STATUS LamportFastMutEx-COL-5-ReachabilityCardinality-01 39822603 t fired, 40 attempts, . LamportFastMutEx-COL-5-ReachabilityCardinality-01 sara is running. VALUE PRODUCED BY AG true skeleton: tandem / relaxed EF true findpath AG false tandem / insertion AG false tandem / relaxed EF false skeleton: tandem / insertion AG false tandem / relaxed AG true skeleton: tandem / relaxed AG false tandem / insertion AG false findpath EF true findpath EF false skeleton: tandem / insertion AG false findpath AG false tandem / insertion AG false tandem / insertion AG false tandem / relaxed IDL ACT RUN SUS FIN C/T C/M OBS AG 0 0 2 0 3 0 2 3 STATUS LamportFastMutEx-COL-5-ReachabilityCardinality-01 40343370 t fired, 41 attempts, . LamportFastMutEx-COL-5-ReachabilityCardinality-01 sara is running. VALUE PRODUCED BY AG true skeleton: tandem / relaxed EF true findpath AG false tandem / insertion AG false tandem / relaxed EF false skeleton: tandem / insertion AG false tandem / relaxed AG true skeleton: tandem / relaxed AG false tandem / insertion AG false findpath EF true findpath EF false skeleton: tandem / insertion AG false findpath AG false tandem / insertion AG false tandem / insertion AG false tandem / relaxed IDL ACT RUN SUS FIN C/T C/M OBS AG 0 0 2 0 3 0 2 3 STATUS LamportFastMutEx-COL-5-ReachabilityCardinality-01 40862128 t fired, 41 attempts, . LamportFastMutEx-COL-5-ReachabilityCardinality-01 sara is running. VALUE PRODUCED BY AG true skeleton: tandem / relaxed EF true findpath AG false tandem / insertion AG false tandem / relaxed EF false skeleton: tandem / insertion AG false tandem / relaxed AG true skeleton: tandem / relaxed AG false tandem / insertion AG false findpath EF true findpath EF false skeleton: tandem / insertion AG false findpath AG false tandem / insertion AG false tandem / insertion AG false tandem / relaxed IDL ACT RUN SUS FIN C/T C/M OBS AG 0 0 2 0 3 0 2 3 STATUS LamportFastMutEx-COL-5-ReachabilityCardinality-01 41382124 t fired, 42 attempts, . LamportFastMutEx-COL-5-ReachabilityCardinality-01 sara is running. VALUE PRODUCED BY AG true skeleton: tandem / relaxed EF true findpath AG false tandem / insertion AG false tandem / relaxed EF false skeleton: tandem / insertion AG false tandem / relaxed AG true skeleton: tandem / relaxed AG false tandem / insertion AG false findpath EF true findpath EF false skeleton: tandem / insertion AG false findpath AG false tandem / insertion AG false tandem / insertion AG false tandem / relaxed IDL ACT RUN SUS FIN C/T C/M OBS AG 0 0 2 0 3 0 2 3 STATUS LamportFastMutEx-COL-5-ReachabilityCardinality-01 41901626 t fired, 42 attempts, . LamportFastMutEx-COL-5-ReachabilityCardinality-01 sara is running. VALUE PRODUCED BY AG true skeleton: tandem / relaxed EF true findpath AG false tandem / insertion AG false tandem / relaxed EF false skeleton: tandem / insertion AG false tandem / relaxed AG true skeleton: tandem / relaxed AG false tandem / insertion AG false findpath EF true findpath EF false skeleton: tandem / insertion AG false findpath AG false tandem / insertion AG false tandem / insertion AG false tandem / relaxed IDL ACT RUN SUS FIN C/T C/M OBS AG 0 0 2 0 3 0 2 3 STATUS LamportFastMutEx-COL-5-ReachabilityCardinality-01 42421809 t fired, 43 attempts, . LamportFastMutEx-COL-5-ReachabilityCardinality-01 sara is running. VALUE PRODUCED BY AG true skeleton: tandem / relaxed EF true findpath AG false tandem / insertion AG false tandem / relaxed EF false skeleton: tandem / insertion AG false tandem / relaxed AG true skeleton: tandem / relaxed AG false tandem / insertion AG false findpath EF true findpath EF false skeleton: tandem / insertion AG false findpath AG false tandem / insertion AG false tandem / insertion AG false tandem / relaxed IDL ACT RUN SUS FIN C/T C/M OBS AG 0 0 2 0 3 0 2 3 STATUS LamportFastMutEx-COL-5-ReachabilityCardinality-01 42942518 t fired, 43 attempts, . LamportFastMutEx-COL-5-ReachabilityCardinality-01 sara is running. VALUE PRODUCED BY AG true skeleton: tandem / relaxed EF true findpath AG false tandem / insertion AG false tandem / relaxed EF false skeleton: tandem / insertion AG false tandem / relaxed AG true skeleton: tandem / relaxed AG false tandem / insertion AG false findpath EF true findpath EF false skeleton: tandem / insertion AG false findpath AG false tandem / insertion AG false tandem / insertion AG false tandem / relaxed IDL ACT RUN SUS FIN C/T C/M OBS AG 0 0 2 0 3 0 2 3 STATUS LamportFastMutEx-COL-5-ReachabilityCardinality-01 43461973 t fired, 44 attempts, . LamportFastMutEx-COL-5-ReachabilityCardinality-01 sara is running. VALUE PRODUCED BY AG true skeleton: tandem / relaxed EF true findpath AG false tandem / insertion AG false tandem / relaxed EF false skeleton: tandem / insertion AG false tandem / relaxed AG true skeleton: tandem / relaxed AG false tandem / insertion AG false findpath EF true findpath EF false skeleton: tandem / insertion AG false findpath AG false tandem / insertion AG false tandem / insertion AG false tandem / relaxed IDL ACT RUN SUS FIN C/T C/M OBS AG 0 0 2 0 3 0 2 3 STATUS LamportFastMutEx-COL-5-ReachabilityCardinality-01 43980135 t fired, 44 attempts, . LamportFastMutEx-COL-5-ReachabilityCardinality-01 sara is running. VALUE PRODUCED BY AG true skeleton: tandem / relaxed EF true findpath AG false tandem / insertion AG false tandem / relaxed EF false skeleton: tandem / insertion AG false tandem / relaxed AG true skeleton: tandem / relaxed AG false tandem / insertion AG false findpath EF true findpath EF false skeleton: tandem / insertion AG false findpath AG false tandem / insertion AG false tandem / insertion AG false tandem / relaxed IDL ACT RUN SUS FIN C/T C/M OBS AG 0 0 2 0 3 0 2 3 STATUS LamportFastMutEx-COL-5-ReachabilityCardinality-01 44498722 t fired, 45 attempts, . LamportFastMutEx-COL-5-ReachabilityCardinality-01 sara is running. VALUE PRODUCED BY AG true skeleton: tandem / relaxed EF true findpath AG false tandem / insertion AG false tandem / relaxed EF false skeleton: tandem / insertion AG false tandem / relaxed AG true skeleton: tandem / relaxed AG false tandem / insertion AG false findpath EF true findpath EF false skeleton: tandem / insertion AG false findpath AG false tandem / insertion AG false tandem / insertion AG false tandem / relaxed IDL ACT RUN SUS FIN C/T C/M OBS AG 0 0 2 0 3 0 2 3 STATUS LamportFastMutEx-COL-5-ReachabilityCardinality-01 45017751 t fired, 46 attempts, . LamportFastMutEx-COL-5-ReachabilityCardinality-01 sara is running. VALUE PRODUCED BY AG true skeleton: tandem / relaxed EF true findpath AG false tandem / insertion AG false tandem / relaxed EF false skeleton: tandem / insertion AG false tandem / relaxed AG true skeleton: tandem / relaxed AG false tandem / insertion AG false findpath EF true findpath EF false skeleton: tandem / insertion AG false findpath AG false tandem / insertion AG false tandem / insertion AG false tandem / relaxed IDL ACT RUN SUS FIN C/T C/M OBS AG 0 0 2 0 3 0 2 3 STATUS LamportFastMutEx-COL-5-ReachabilityCardinality-01 45536409 t fired, 46 attempts, . LamportFastMutEx-COL-5-ReachabilityCardinality-01 sara is running. VALUE PRODUCED BY AG true skeleton: tandem / relaxed EF true findpath AG false tandem / insertion AG false tandem / relaxed EF false skeleton: tandem / insertion AG false tandem / relaxed AG true skeleton: tandem / relaxed AG false tandem / insertion AG false findpath EF true findpath EF false skeleton: tandem / insertion AG false findpath AG false tandem / insertion AG false tandem / insertion AG false tandem / relaxed IDL ACT RUN SUS FIN C/T C/M OBS AG 0 0 2 0 3 0 2 3 STATUS LamportFastMutEx-COL-5-ReachabilityCardinality-01 46056105 t fired, 47 attempts, . LamportFastMutEx-COL-5-ReachabilityCardinality-01 sara is running. VALUE PRODUCED BY AG true skeleton: tandem / relaxed EF true findpath AG false tandem / insertion AG false tandem / relaxed EF false skeleton: tandem / insertion AG false tandem / relaxed AG true skeleton: tandem / relaxed AG false tandem / insertion AG false findpath EF true findpath EF false skeleton: tandem / insertion AG false findpath AG false tandem / insertion AG false tandem / insertion AG false tandem / relaxed IDL ACT RUN SUS FIN C/T C/M OBS AG 0 0 2 0 3 0 2 3 STATUS LamportFastMutEx-COL-5-ReachabilityCardinality-01 46573746 t fired, 47 attempts, . LamportFastMutEx-COL-5-ReachabilityCardinality-01 sara is running. VALUE PRODUCED BY AG true skeleton: tandem / relaxed EF true findpath AG false tandem / insertion AG false tandem / relaxed EF false skeleton: tandem / insertion AG false tandem / relaxed AG true skeleton: tandem / relaxed AG false tandem / insertion AG false findpath EF true findpath EF false skeleton: tandem / insertion AG false findpath AG false tandem / insertion AG false tandem / insertion AG false tandem / relaxed IDL ACT RUN SUS FIN C/T C/M OBS AG 0 0 2 0 3 0 2 3 STATUS LamportFastMutEx-COL-5-ReachabilityCardinality-01 47093026 t fired, 48 attempts, . LamportFastMutEx-COL-5-ReachabilityCardinality-01 sara is running. LamportFastMutEx-COL-5-ReachabilityCardinality-01 VALUE PRODUCED BY AG true skeleton: tandem / relaxed EF true findpath AG false tandem / insertion AG false tandem / relaxed EF false skeleton: tandem / insertion AG false tandem / relaxed AG true skeleton: tandem / relaxed AG false tandem / insertion AG false findpath EF true findpath EF false skeleton: tandem / insertion AG false findpath AG false tandem / insertion AG false tandem / insertion AG false tandem / relaxed IDL ACT RUN SUS FIN C/T C/M OBS AG 0 0 1 0 4 0 2 3 STATUS LamportFastMutEx-COL-5-ReachabilityCardinality-01 47613420 t fired, 48 attempts, . VALUE PRODUCED BY AG true skeleton: tandem / relaxed EF true findpath AG false tandem / insertion AG false tandem / relaxed EF false skeleton: tandem / insertion AG false tandem / relaxed AG true skeleton: tandem / relaxed AG false tandem / insertion AG false findpath EF true findpath EF false skeleton: tandem / insertion AG false findpath AG false tandem / insertion AG false tandem / insertion AG false tandem / relaxed IDL ACT RUN SUS FIN C/T C/M OBS AG 0 0 1 0 4 0 2 3 STATUS LamportFastMutEx-COL-5-ReachabilityCardinality-01 48134141 t fired, 49 attempts, . VALUE PRODUCED BY AG true skeleton: tandem / relaxed EF true findpath AG false tandem / insertion AG false tandem / relaxed EF false skeleton: tandem / insertion AG false tandem / relaxed AG true skeleton: tandem / relaxed AG false tandem / insertion AG false findpath EF true findpath EF false skeleton: tandem / insertion AG false findpath AG false tandem / insertion AG false tandem / insertion AG false tandem / relaxed IDL ACT RUN SUS FIN C/T C/M OBS AG 0 0 1 0 4 0 2 3 STATUS LamportFastMutEx-COL-5-ReachabilityCardinality-01 48653623 t fired, 49 attempts, . VALUE PRODUCED BY AG true skeleton: tandem / relaxed EF true findpath AG false tandem / insertion AG false tandem / relaxed EF false skeleton: tandem / insertion AG false tandem / relaxed AG true skeleton: tandem / relaxed AG false tandem / insertion AG false findpath EF true findpath EF false skeleton: tandem / insertion AG false findpath AG false tandem / insertion AG false tandem / insertion AG false tandem / relaxed IDL ACT RUN SUS FIN C/T C/M OBS AG 0 0 1 0 4 0 2 3 STATUS LamportFastMutEx-COL-5-ReachabilityCardinality-01 49174522 t fired, 50 attempts, . VALUE PRODUCED BY AG true skeleton: tandem / relaxed EF true findpath AG false tandem / insertion AG false tandem / relaxed EF false skeleton: tandem / insertion AG false tandem / relaxed AG true skeleton: tandem / relaxed AG false tandem / insertion AG false findpath EF true findpath EF false skeleton: tandem / insertion AG false findpath AG false tandem / insertion AG false tandem / insertion AG false tandem / relaxed IDL ACT RUN SUS FIN C/T C/M OBS AG 0 0 1 0 4 0 2 3 STATUS LamportFastMutEx-COL-5-ReachabilityCardinality-01 49693592 t fired, 50 attempts, . VALUE PRODUCED BY AG true skeleton: tandem / relaxed EF true findpath AG false tandem / insertion AG false tandem / relaxed EF false skeleton: tandem / insertion AG false tandem / relaxed AG true skeleton: tandem / relaxed AG false tandem / insertion AG false findpath EF true findpath EF false skeleton: tandem / insertion AG false findpath AG false tandem / insertion AG false tandem / insertion AG false tandem / relaxed IDL ACT RUN SUS FIN C/T C/M OBS AG 0 0 1 0 4 0 2 3 STATUS LamportFastMutEx-COL-5-ReachabilityCardinality-01 50213462 t fired, 51 attempts, . VALUE PRODUCED BY AG true skeleton: tandem / relaxed EF true findpath AG false tandem / insertion AG false tandem / relaxed EF false skeleton: tandem / insertion AG false tandem / relaxed AG true skeleton: tandem / relaxed AG false tandem / insertion AG false findpath EF true findpath EF false skeleton: tandem / insertion AG false findpath AG false tandem / insertion AG false tandem / insertion AG false tandem / relaxed IDL ACT RUN SUS FIN C/T C/M OBS AG 0 0 1 0 4 0 2 3 STATUS LamportFastMutEx-COL-5-ReachabilityCardinality-01 50743564 t fired, 51 attempts, . VALUE PRODUCED BY AG true skeleton: tandem / relaxed EF true findpath AG false tandem / insertion AG false tandem / relaxed EF false skeleton: tandem / insertion AG false tandem / relaxed AG true skeleton: tandem / relaxed AG false tandem / insertion AG false findpath EF true findpath EF false skeleton: tandem / insertion AG false findpath AG false tandem / insertion AG false tandem / insertion AG false tandem / relaxed IDL ACT RUN SUS FIN C/T C/M OBS AG 0 0 1 0 4 0 2 3 STATUS LamportFastMutEx-COL-5-ReachabilityCardinality-01 51273897 t fired, 52 attempts, . VALUE PRODUCED BY AG true skeleton: tandem / relaxed EF true findpath AG false tandem / insertion AG false tandem / relaxed EF false skeleton: tandem / insertion AG false tandem / relaxed AG true skeleton: tandem / relaxed AG false tandem / insertion AG false findpath EF true findpath EF false skeleton: tandem / insertion AG false findpath AG false tandem / insertion AG false tandem / insertion AG false tandem / relaxed IDL ACT RUN SUS FIN C/T C/M OBS AG 0 0 1 0 4 0 2 3 STATUS LamportFastMutEx-COL-5-ReachabilityCardinality-01 51802057 t fired, 52 attempts, . VALUE PRODUCED BY AG true skeleton: tandem / relaxed EF true findpath AG false tandem / insertion AG false tandem / relaxed EF false skeleton: tandem / insertion AG false tandem / relaxed AG true skeleton: tandem / relaxed AG false tandem / insertion AG false findpath EF true findpath EF false skeleton: tandem / insertion AG false findpath AG false tandem / insertion AG false tandem / insertion AG false tandem / relaxed IDL ACT RUN SUS FIN C/T C/M OBS AG 0 0 1 0 4 0 2 3 STATUS LamportFastMutEx-COL-5-ReachabilityCardinality-01 52355200 t fired, 53 attempts, . VALUE PRODUCED BY AG true skeleton: tandem / relaxed EF true findpath AG false tandem / insertion AG false tandem / relaxed EF false skeleton: tandem / insertion AG false tandem / relaxed AG true skeleton: tandem / relaxed AG false tandem / insertion AG false findpath EF true findpath EF false skeleton: tandem / insertion AG false findpath AG false tandem / insertion AG false tandem / insertion AG false tandem / relaxed IDL ACT RUN SUS FIN C/T C/M OBS AG 0 0 1 0 4 0 2 3 STATUS LamportFastMutEx-COL-5-ReachabilityCardinality-01 52954518 t fired, 53 attempts, . VALUE PRODUCED BY AG true skeleton: tandem / relaxed EF true findpath AG false tandem / insertion AG false tandem / relaxed EF false skeleton: tandem / insertion AG false tandem / relaxed AG true skeleton: tandem / relaxed AG false tandem / insertion AG false findpath EF true findpath EF false skeleton: tandem / insertion AG false findpath AG false tandem / insertion AG false tandem / insertion AG false tandem / relaxed IDL ACT RUN SUS FIN C/T C/M OBS AG 0 0 1 0 4 0 2 3 STATUS LamportFastMutEx-COL-5-ReachabilityCardinality-01 53572345 t fired, 54 attempts, . VALUE PRODUCED BY AG true skeleton: tandem / relaxed EF true findpath AG false tandem / insertion AG false tandem / relaxed EF false skeleton: tandem / insertion AG false tandem / relaxed AG true skeleton: tandem / relaxed AG false tandem / insertion AG false findpath EF true findpath EF false skeleton: tandem / insertion AG false findpath AG false tandem / insertion AG false tandem / insertion AG false tandem / relaxed IDL ACT RUN SUS FIN C/T C/M OBS AG 0 0 1 0 4 0 2 3 STATUS LamportFastMutEx-COL-5-ReachabilityCardinality-01 54104727 t fired, 55 attempts, . VALUE PRODUCED BY AG true skeleton: tandem / relaxed EF true findpath AG false tandem / insertion AG false tandem / relaxed EF false skeleton: tandem / insertion AG false tandem / relaxed AG true skeleton: tandem / relaxed AG false tandem / insertion AG false findpath EF true findpath EF false skeleton: tandem / insertion AG false findpath AG false tandem / insertion AG false tandem / insertion AG false tandem / relaxed IDL ACT RUN SUS FIN C/T C/M OBS AG 0 0 1 0 4 0 2 3 STATUS LamportFastMutEx-COL-5-ReachabilityCardinality-01 54629071 t fired, 55 attempts, . VALUE PRODUCED BY AG true skeleton: tandem / relaxed EF true findpath AG false tandem / insertion AG false tandem / relaxed EF false skeleton: tandem / insertion AG false tandem / relaxed AG true skeleton: tandem / relaxed AG false tandem / insertion AG false findpath EF true findpath EF false skeleton: tandem / insertion AG false findpath AG false tandem / insertion AG false tandem / insertion AG false tandem / relaxed IDL ACT RUN SUS FIN C/T C/M OBS AG 0 0 1 0 4 0 2 3 STATUS LamportFastMutEx-COL-5-ReachabilityCardinality-01 55155833 t fired, 56 attempts, . VALUE PRODUCED BY AG true skeleton: tandem / relaxed EF true findpath AG false tandem / insertion AG false tandem / relaxed EF false skeleton: tandem / insertion AG false tandem / relaxed AG true skeleton: tandem / relaxed AG false tandem / insertion AG false findpath EF true findpath EF false skeleton: tandem / insertion AG false findpath AG false tandem / insertion AG false tandem / insertion AG false tandem / relaxed IDL ACT RUN SUS FIN C/T C/M OBS AG 0 0 1 0 4 0 2 3 STATUS LamportFastMutEx-COL-5-ReachabilityCardinality-01 55686937 t fired, 56 attempts, . VALUE PRODUCED BY AG true skeleton: tandem / relaxed EF true findpath AG false tandem / insertion AG false tandem / relaxed EF false skeleton: tandem / insertion AG false tandem / relaxed AG true skeleton: tandem / relaxed AG false tandem / insertion AG false findpath EF true findpath EF false skeleton: tandem / insertion AG false findpath AG false tandem / insertion AG false tandem / insertion AG false tandem / relaxed IDL ACT RUN SUS FIN C/T C/M OBS AG 0 0 1 0 4 0 2 3 STATUS LamportFastMutEx-COL-5-ReachabilityCardinality-01 56229798 t fired, 57 attempts, . VALUE PRODUCED BY AG true skeleton: tandem / relaxed EF true findpath AG false tandem / insertion AG false tandem / relaxed EF false skeleton: tandem / insertion AG false tandem / relaxed AG true skeleton: tandem / relaxed AG false tandem / insertion AG false findpath EF true findpath EF false skeleton: tandem / insertion AG false findpath AG false tandem / insertion AG false tandem / insertion AG false tandem / relaxed IDL ACT RUN SUS FIN C/T C/M OBS AG 0 0 1 0 4 0 2 3 STATUS LamportFastMutEx-COL-5-ReachabilityCardinality-01 56815167 t fired, 57 attempts, . VALUE PRODUCED BY AG true skeleton: tandem / relaxed EF true findpath AG false tandem / insertion AG false tandem / relaxed EF false skeleton: tandem / insertion AG false tandem / relaxed AG true skeleton: tandem / relaxed AG false tandem / insertion AG false findpath EF true findpath EF false skeleton: tandem / insertion AG false findpath AG false tandem / insertion AG false tandem / insertion AG false tandem / relaxed IDL ACT RUN SUS FIN C/T C/M OBS AG 0 0 1 0 4 0 2 3 STATUS LamportFastMutEx-COL-5-ReachabilityCardinality-01 57386967 t fired, 58 attempts, . VALUE PRODUCED BY AG true skeleton: tandem / relaxed EF true findpath AG false tandem / insertion AG false tandem / relaxed EF false skeleton: tandem / insertion AG false tandem / relaxed AG true skeleton: tandem / relaxed AG false tandem / insertion AG false findpath EF true findpath EF false skeleton: tandem / insertion AG false findpath AG false tandem / insertion AG false tandem / insertion AG false tandem / relaxed IDL ACT RUN SUS FIN C/T C/M OBS AG 0 0 1 0 4 0 2 3 STATUS LamportFastMutEx-COL-5-ReachabilityCardinality-01 57977222 t fired, 58 attempts, . VALUE PRODUCED BY AG true skeleton: tandem / relaxed EF true findpath AG false tandem / insertion AG false tandem / relaxed EF false skeleton: tandem / insertion AG false tandem / relaxed AG true skeleton: tandem / relaxed AG false tandem / insertion AG false findpath EF true findpath EF false skeleton: tandem / insertion AG false findpath AG false tandem / insertion AG false tandem / insertion AG false tandem / relaxed IDL ACT RUN SUS FIN C/T C/M OBS AG 0 0 1 0 4 0 2 3 STATUS LamportFastMutEx-COL-5-ReachabilityCardinality-01 58548238 t fired, 59 attempts, . VALUE PRODUCED BY AG true skeleton: tandem / relaxed EF true findpath AG false tandem / insertion AG false tandem / relaxed EF false skeleton: tandem / insertion AG false tandem / relaxed AG true skeleton: tandem / relaxed AG false tandem / insertion AG false findpath EF true findpath EF false skeleton: tandem / insertion AG false findpath AG false tandem / insertion AG false tandem / insertion AG false tandem / relaxed IDL ACT RUN SUS FIN C/T C/M OBS AG 0 0 1 0 4 0 2 3 STATUS LamportFastMutEx-COL-5-ReachabilityCardinality-01 59125598 t fired, 60 attempts, . VALUE PRODUCED BY AG true skeleton: tandem / relaxed EF true findpath AG false tandem / insertion AG false tandem / relaxed EF false skeleton: tandem / insertion AG false tandem / relaxed AG true skeleton: tandem / relaxed AG false tandem / insertion AG false findpath EF true findpath EF false skeleton: tandem / insertion AG false findpath AG false tandem / insertion AG false tandem / insertion AG false tandem / relaxed IDL ACT RUN SUS FIN C/T C/M OBS AG 0 0 1 0 4 0 2 3 STATUS LamportFastMutEx-COL-5-ReachabilityCardinality-01 59710494 t fired, 60 attempts, . VALUE PRODUCED BY AG true skeleton: tandem / relaxed EF true findpath AG false tandem / insertion AG false tandem / relaxed EF false skeleton: tandem / insertion AG false tandem / relaxed AG true skeleton: tandem / relaxed AG false tandem / insertion AG false findpath EF true findpath EF false skeleton: tandem / insertion AG false findpath AG false tandem / insertion AG false tandem / insertion AG false tandem / relaxed IDL ACT RUN SUS FIN C/T C/M OBS AG 0 0 1 0 4 0 2 3 STATUS LamportFastMutEx-COL-5-ReachabilityCardinality-01 60294129 t fired, 61 attempts, . VALUE PRODUCED BY AG true skeleton: tandem / relaxed EF true findpath AG false tandem / insertion AG false tandem / relaxed EF false skeleton: tandem / insertion AG false tandem / relaxed AG true skeleton: tandem / relaxed AG false tandem / insertion AG false findpath EF true findpath EF false skeleton: tandem / insertion AG false findpath AG false tandem / insertion AG false tandem / insertion AG false tandem / relaxed IDL ACT RUN SUS FIN C/T C/M OBS AG 0 0 1 0 4 0 2 3 STATUS LamportFastMutEx-COL-5-ReachabilityCardinality-01 60879041 t fired, 61 attempts, . VALUE PRODUCED BY AG true skeleton: tandem / relaxed EF true findpath AG false tandem / insertion AG false tandem / relaxed EF false skeleton: tandem / insertion AG false tandem / relaxed AG true skeleton: tandem / relaxed AG false tandem / insertion AG false findpath EF true findpath EF false skeleton: tandem / insertion AG false findpath AG false tandem / insertion AG false tandem / insertion AG false tandem / relaxed IDL ACT RUN SUS FIN C/T C/M OBS AG 0 0 1 0 4 0 2 3 STATUS LamportFastMutEx-COL-5-ReachabilityCardinality-01 61462887 t fired, 62 attempts, . VALUE PRODUCED BY AG true skeleton: tandem / relaxed EF true findpath AG false tandem / insertion AG false tandem / relaxed EF false skeleton: tandem / insertion AG false tandem / relaxed AG true skeleton: tandem / relaxed AG false tandem / insertion AG false findpath EF true findpath EF false skeleton: tandem / insertion AG false findpath AG false tandem / insertion AG false tandem / insertion AG false tandem / relaxed IDL ACT RUN SUS FIN C/T C/M OBS AG 0 0 1 0 4 0 2 3 STATUS LamportFastMutEx-COL-5-ReachabilityCardinality-01 62035943 t fired, 63 attempts, . VALUE PRODUCED BY AG true skeleton: tandem / relaxed EF true findpath AG false tandem / insertion AG false tandem / relaxed EF false skeleton: tandem / insertion AG false tandem / relaxed AG true skeleton: tandem / relaxed AG false tandem / insertion AG false findpath EF true findpath EF false skeleton: tandem / insertion AG false findpath AG false tandem / insertion AG false tandem / insertion AG false tandem / relaxed IDL ACT RUN SUS FIN C/T C/M OBS AG 0 0 1 0 4 0 2 3 STATUS LamportFastMutEx-COL-5-ReachabilityCardinality-01 62612162 t fired, 63 attempts, . VALUE PRODUCED BY AG true skeleton: tandem / relaxed EF true findpath AG false tandem / insertion AG false tandem / relaxed EF false skeleton: tandem / insertion AG false tandem / relaxed AG true skeleton: tandem / relaxed AG false tandem / insertion AG false findpath EF true findpath EF false skeleton: tandem / insertion AG false findpath AG false tandem / insertion AG false tandem / insertion AG false tandem / relaxed IDL ACT RUN SUS FIN C/T C/M OBS AG 0 0 1 0 4 0 2 3 STATUS LamportFastMutEx-COL-5-ReachabilityCardinality-01 63179230 t fired, 64 attempts, . VALUE PRODUCED BY AG true skeleton: tandem / relaxed EF true findpath AG false tandem / insertion AG false tandem / relaxed EF false skeleton: tandem / insertion AG false tandem / relaxed AG true skeleton: tandem / relaxed AG false tandem / insertion AG false findpath EF true findpath EF false skeleton: tandem / insertion AG false findpath AG false tandem / insertion AG false tandem / insertion AG false tandem / relaxed IDL ACT RUN SUS FIN C/T C/M OBS AG 0 0 1 0 4 0 2 3 STATUS LamportFastMutEx-COL-5-ReachabilityCardinality-01 63761734 t fired, 64 attempts, . VALUE PRODUCED BY AG true skeleton: tandem / relaxed EF true findpath AG false tandem / insertion AG false tandem / relaxed EF false skeleton: tandem / insertion AG false tandem / relaxed AG true skeleton: tandem / relaxed AG false tandem / insertion AG false findpath EF true findpath EF false skeleton: tandem / insertion AG false findpath AG false tandem / insertion AG false tandem / insertion AG false tandem / relaxed IDL ACT RUN SUS FIN C/T C/M OBS AG 0 0 1 0 4 0 2 3 STATUS LamportFastMutEx-COL-5-ReachabilityCardinality-01 64341832 t fired, 65 attempts, . VALUE PRODUCED BY AG true skeleton: tandem / relaxed EF true findpath AG false tandem / insertion AG false tandem / relaxed EF false skeleton: tandem / insertion AG false tandem / relaxed AG true skeleton: tandem / relaxed AG false tandem / insertion AG false findpath EF true findpath EF false skeleton: tandem / insertion AG false findpath AG false tandem / insertion AG false tandem / insertion AG false tandem / relaxed IDL ACT RUN SUS FIN C/T C/M OBS AG 0 0 1 0 4 0 2 3 STATUS LamportFastMutEx-COL-5-ReachabilityCardinality-01 64908764 t fired, 65 attempts, . VALUE PRODUCED BY AG true skeleton: tandem / relaxed EF true findpath AG false tandem / insertion AG false tandem / relaxed EF false skeleton: tandem / insertion AG false tandem / relaxed AG true skeleton: tandem / relaxed AG false tandem / insertion AG false findpath EF true findpath EF false skeleton: tandem / insertion AG false findpath AG false tandem / insertion AG false tandem / insertion AG false tandem / relaxed IDL ACT RUN SUS FIN C/T C/M OBS AG 0 0 1 0 4 0 2 3 STATUS LamportFastMutEx-COL-5-ReachabilityCardinality-01 65501076 t fired, 66 attempts, . VALUE PRODUCED BY AG true skeleton: tandem / relaxed EF true findpath AG false tandem / insertion AG false tandem / relaxed EF false skeleton: tandem / insertion AG false tandem / relaxed AG true skeleton: tandem / relaxed AG false tandem / insertion AG false findpath EF true findpath EF false skeleton: tandem / insertion AG false findpath AG false tandem / insertion AG false tandem / insertion AG false tandem / relaxed IDL ACT RUN SUS FIN C/T C/M OBS AG 0 0 1 0 4 0 2 3 STATUS LamportFastMutEx-COL-5-ReachabilityCardinality-01 66091812 t fired, 67 attempts, . VALUE PRODUCED BY AG true skeleton: tandem / relaxed EF true findpath AG false tandem / insertion AG false tandem / relaxed EF false skeleton: tandem / insertion AG false tandem / relaxed AG true skeleton: tandem / relaxed AG false tandem / insertion AG false findpath EF true findpath EF false skeleton: tandem / insertion AG false findpath AG false tandem / insertion AG false tandem / insertion AG false tandem / relaxed IDL ACT RUN SUS FIN C/T C/M OBS AG 0 0 1 0 4 0 2 3 STATUS LamportFastMutEx-COL-5-ReachabilityCardinality-01 66682110 t fired, 67 attempts, . VALUE PRODUCED BY AG true skeleton: tandem / relaxed EF true findpath AG false tandem / insertion AG false tandem / relaxed EF false skeleton: tandem / insertion AG false tandem / relaxed AG true skeleton: tandem / relaxed AG false tandem / insertion AG false findpath EF true findpath EF false skeleton: tandem / insertion AG false findpath AG false tandem / insertion AG false tandem / insertion AG false tandem / relaxed IDL ACT RUN SUS FIN C/T C/M OBS AG 0 0 1 0 4 0 2 3 STATUS LamportFastMutEx-COL-5-ReachabilityCardinality-01 67284716 t fired, 68 attempts, . VALUE PRODUCED BY AG true skeleton: tandem / relaxed EF true findpath AG false tandem / insertion AG false tandem / relaxed EF false skeleton: tandem / insertion AG false tandem / relaxed AG true skeleton: tandem / relaxed AG false tandem / insertion AG false findpath EF true findpath EF false skeleton: tandem / insertion AG false findpath AG false tandem / insertion AG false tandem / insertion AG false tandem / relaxed IDL ACT RUN SUS FIN C/T C/M OBS AG 0 0 1 0 4 0 2 3 STATUS LamportFastMutEx-COL-5-ReachabilityCardinality-01 67886640 t fired, 68 attempts, . VALUE PRODUCED BY AG true skeleton: tandem / relaxed EF true findpath AG false tandem / insertion AG false tandem / relaxed EF false skeleton: tandem / insertion AG false tandem / relaxed AG true skeleton: tandem / relaxed AG false tandem / insertion AG false findpath EF true findpath EF false skeleton: tandem / insertion AG false findpath AG false tandem / insertion AG false tandem / insertion AG false tandem / relaxed IDL ACT RUN SUS FIN C/T C/M OBS AG 0 0 1 0 4 0 2 3 STATUS LamportFastMutEx-COL-5-ReachabilityCardinality-01 68487601 t fired, 69 attempts, . VALUE PRODUCED BY AG true skeleton: tandem / relaxed EF true findpath AG false tandem / insertion AG false tandem / relaxed EF false skeleton: tandem / insertion AG false tandem / relaxed AG true skeleton: tandem / relaxed AG false tandem / insertion AG false findpath EF true findpath EF false skeleton: tandem / insertion AG false findpath AG false tandem / insertion AG false tandem / insertion AG false tandem / relaxed IDL ACT RUN SUS FIN C/T C/M OBS AG 0 0 1 0 4 0 2 3 STATUS LamportFastMutEx-COL-5-ReachabilityCardinality-01 69090112 t fired, 70 attempts, . VALUE PRODUCED BY AG true skeleton: tandem / relaxed EF true findpath AG false tandem / insertion AG false tandem / relaxed EF false skeleton: tandem / insertion AG false tandem / relaxed AG true skeleton: tandem / relaxed AG false tandem / insertion AG false findpath EF true findpath EF false skeleton: tandem / insertion AG false findpath AG false tandem / insertion AG false tandem / insertion AG false tandem / relaxed IDL ACT RUN SUS FIN C/T C/M OBS AG 0 0 1 0 4 0 2 3 STATUS LamportFastMutEx-COL-5-ReachabilityCardinality-01 69690208 t fired, 70 attempts, . VALUE PRODUCED BY AG true skeleton: tandem / relaxed EF true findpath AG false tandem / insertion AG false tandem / relaxed EF false skeleton: tandem / insertion AG false tandem / relaxed AG true skeleton: tandem / relaxed AG false tandem / insertion AG false findpath EF true findpath EF false skeleton: tandem / insertion AG false findpath AG false tandem / insertion AG false tandem / insertion AG false tandem / relaxed IDL ACT RUN SUS FIN C/T C/M OBS AG 0 0 1 0 4 0 2 3 STATUS LamportFastMutEx-COL-5-ReachabilityCardinality-01 70290763 t fired, 71 attempts, . LamportFastMutEx-COL-5-ReachabilityCardinality-03 VALUE PRODUCED BY AG true skeleton: tandem / relaxed EF true findpath AG false tandem / insertion AG false tandem / relaxed EF false skeleton: tandem / insertion AG false tandem / relaxed AG true skeleton: tandem / relaxed AG false tandem / insertion AG false findpath EF true findpath EF false skeleton: tandem / insertion AG false findpath AG false tandem / insertion AG false tandem / insertion AG false tandem / relaxed IDL ACT RUN SUS FIN C/T C/M OBS AG 0 0 1 0 4 0 2 3 STATUS LamportFastMutEx-COL-5-ReachabilityCardinality-01 70880733 t fired, 71 attempts, . VALUE PRODUCED BY AG true skeleton: tandem / relaxed EF true findpath AG false tandem / insertion AG false tandem / relaxed EF false skeleton: tandem / insertion AG false tandem / relaxed AG true skeleton: tandem / relaxed AG false tandem / insertion AG false findpath EF true findpath EF false skeleton: tandem / insertion AG false findpath AG false tandem / insertion AG false tandem / insertion AG false tandem / relaxed IDL ACT RUN SUS FIN C/T C/M OBS AG 0 0 1 0 4 0 2 3 STATUS LamportFastMutEx-COL-5-ReachabilityCardinality-01 71479399 t fired, 72 attempts, . VALUE PRODUCED BY AG true skeleton: tandem / relaxed EF true findpath AG false tandem / insertion AG false tandem / relaxed EF false skeleton: tandem / insertion AG false tandem / relaxed AG true skeleton: tandem / relaxed AG false tandem / insertion AG false findpath EF true findpath EF false skeleton: tandem / insertion AG false findpath AG false tandem / insertion AG false tandem / insertion AG false tandem / relaxed IDL ACT RUN SUS FIN C/T C/M OBS AG 0 0 1 0 4 0 2 3 STATUS LamportFastMutEx-COL-5-ReachabilityCardinality-01 72078446 t fired, 73 attempts, . VALUE PRODUCED BY AG true skeleton: tandem / relaxed EF true findpath AG false tandem / insertion AG false tandem / relaxed EF false skeleton: tandem / insertion AG false tandem / relaxed AG true skeleton: tandem / relaxed AG false tandem / insertion AG false findpath EF true findpath EF false skeleton: tandem / insertion AG false findpath AG false tandem / insertion AG false tandem / insertion AG false tandem / relaxed IDL ACT RUN SUS FIN C/T C/M OBS AG 0 0 1 0 4 0 2 3 STATUS LamportFastMutEx-COL-5-ReachabilityCardinality-01 72675834 t fired, 73 attempts, . VALUE PRODUCED BY AG true skeleton: tandem / relaxed EF true findpath AG false tandem / insertion AG false tandem / relaxed EF false skeleton: tandem / insertion AG false tandem / relaxed AG true skeleton: tandem / relaxed AG false tandem / insertion AG false findpath EF true findpath EF false skeleton: tandem / insertion AG false findpath AG false tandem / insertion AG false tandem / insertion AG false tandem / relaxed IDL ACT RUN SUS FIN C/T C/M OBS AG 0 0 1 0 4 0 2 3 STATUS LamportFastMutEx-COL-5-ReachabilityCardinality-01 73272003 t fired, 74 attempts, . VALUE PRODUCED BY AG true skeleton: tandem / relaxed EF true findpath AG false tandem / insertion AG false tandem / relaxed EF false skeleton: tandem / insertion AG false tandem / relaxed AG true skeleton: tandem / relaxed AG false tandem / insertion AG false findpath EF true findpath EF false skeleton: tandem / insertion AG false findpath AG false tandem / insertion AG false tandem / insertion AG false tandem / relaxed IDL ACT RUN SUS FIN C/T C/M OBS AG 0 0 1 0 4 0 2 3 STATUS LamportFastMutEx-COL-5-ReachabilityCardinality-01 73869142 t fired, 74 attempts, . VALUE PRODUCED BY AG true skeleton: tandem / relaxed EF true findpath AG false tandem / insertion AG false tandem / relaxed EF false skeleton: tandem / insertion AG false tandem / relaxed AG true skeleton: tandem / relaxed AG false tandem / insertion AG false findpath EF true findpath EF false skeleton: tandem / insertion AG false findpath AG false tandem / insertion AG false tandem / insertion AG false tandem / relaxed IDL ACT RUN SUS FIN C/T C/M OBS AG 0 0 1 0 4 0 2 3 STATUS LamportFastMutEx-COL-5-ReachabilityCardinality-01 74466088 t fired, 75 attempts, . VALUE PRODUCED BY AG true skeleton: tandem / relaxed EF true findpath AG false tandem / insertion AG false tandem / relaxed EF false skeleton: tandem / insertion AG false tandem / relaxed AG true skeleton: tandem / relaxed AG false tandem / insertion AG false findpath EF true findpath EF false skeleton: tandem / insertion AG false findpath AG false tandem / insertion AG false tandem / insertion AG false tandem / relaxed IDL ACT RUN SUS FIN C/T C/M OBS AG 0 0 1 0 4 0 2 3 STATUS LamportFastMutEx-COL-5-ReachabilityCardinality-01 75062059 t fired, 76 attempts, . VALUE PRODUCED BY AG true skeleton: tandem / relaxed EF true findpath AG false tandem / insertion AG false tandem / relaxed EF false skeleton: tandem / insertion AG false tandem / relaxed AG true skeleton: tandem / relaxed AG false tandem / insertion AG false findpath EF true findpath EF false skeleton: tandem / insertion AG false findpath AG false tandem / insertion AG false tandem / insertion AG false tandem / relaxed IDL ACT RUN SUS FIN C/T C/M OBS AG 0 0 1 0 4 0 2 3 STATUS LamportFastMutEx-COL-5-ReachabilityCardinality-01 75658800 t fired, 76 attempts, . VALUE PRODUCED BY AG true skeleton: tandem / relaxed EF true findpath AG false tandem / insertion AG false tandem / relaxed EF false skeleton: tandem / insertion AG false tandem / relaxed AG true skeleton: tandem / relaxed AG false tandem / insertion AG false findpath EF true findpath EF false skeleton: tandem / insertion AG false findpath AG false tandem / insertion AG false tandem / insertion AG false tandem / relaxed IDL ACT RUN SUS FIN C/T C/M OBS AG 0 0 1 0 4 0 2 3 STATUS LamportFastMutEx-COL-5-ReachabilityCardinality-01 76257477 t fired, 77 attempts, . VALUE PRODUCED BY AG true skeleton: tandem / relaxed EF true findpath AG false tandem / insertion AG false tandem / relaxed EF false skeleton: tandem / insertion AG false tandem / relaxed AG true skeleton: tandem / relaxed AG false tandem / insertion AG false findpath EF true findpath EF false skeleton: tandem / insertion AG false findpath AG false tandem / insertion AG false tandem / insertion AG false tandem / relaxed IDL ACT RUN SUS FIN C/T C/M OBS AG 0 0 1 0 4 0 2 3 STATUS LamportFastMutEx-COL-5-ReachabilityCardinality-01 76824450 t fired, 77 attempts, . VALUE PRODUCED BY AG true skeleton: tandem / relaxed EF true findpath AG false tandem / insertion AG false tandem / relaxed EF false skeleton: tandem / insertion AG false tandem / relaxed AG true skeleton: tandem / relaxed AG false tandem / insertion AG false findpath EF true findpath EF false skeleton: tandem / insertion AG false findpath AG false tandem / insertion AG false tandem / insertion AG false tandem / relaxed IDL ACT RUN SUS FIN C/T C/M OBS AG 0 0 1 0 4 0 2 3 STATUS LamportFastMutEx-COL-5-ReachabilityCardinality-01 77386035 t fired, 78 attempts, . VALUE PRODUCED BY AG true skeleton: tandem / relaxed EF true findpath AG false tandem / insertion AG false tandem / relaxed EF false skeleton: tandem / insertion AG false tandem / relaxed AG true skeleton: tandem / relaxed AG false tandem / insertion AG false findpath EF true findpath EF false skeleton: tandem / insertion AG false findpath AG false tandem / insertion AG false tandem / insertion AG false tandem / relaxed IDL ACT RUN SUS FIN C/T C/M OBS AG 0 0 1 0 4 0 2 3 STATUS LamportFastMutEx-COL-5-ReachabilityCardinality-01 77947276 t fired, 78 attempts, . VALUE PRODUCED BY AG true skeleton: tandem / relaxed EF true findpath AG false tandem / insertion AG false tandem / relaxed EF false skeleton: tandem / insertion AG false tandem / relaxed AG true skeleton: tandem / relaxed AG false tandem / insertion AG false findpath EF true findpath EF false skeleton: tandem / insertion AG false findpath AG false tandem / insertion AG false tandem / insertion AG false tandem / relaxed IDL ACT RUN SUS FIN C/T C/M OBS AG 0 0 1 0 4 0 2 3 STATUS LamportFastMutEx-COL-5-ReachabilityCardinality-01 78504126 t fired, 79 attempts, . VALUE PRODUCED BY AG true skeleton: tandem / relaxed EF true findpath AG false tandem / insertion AG false tandem / relaxed EF false skeleton: tandem / insertion AG false tandem / relaxed AG true skeleton: tandem / relaxed AG false tandem / insertion AG false findpath EF true findpath EF false skeleton: tandem / insertion AG false findpath AG false tandem / insertion AG false tandem / insertion AG false tandem / relaxed IDL ACT RUN SUS FIN C/T C/M OBS AG 0 0 1 0 4 0 2 3 STATUS LamportFastMutEx-COL-5-ReachabilityCardinality-01 79066722 t fired, 80 attempts, . VALUE PRODUCED BY AG true skeleton: tandem / relaxed EF true findpath AG false tandem / insertion AG false tandem / relaxed EF false skeleton: tandem / insertion AG false tandem / relaxed AG true skeleton: tandem / relaxed AG false tandem / insertion AG false findpath EF true findpath EF false skeleton: tandem / insertion AG false findpath AG false tandem / insertion AG false tandem / insertion AG false tandem / relaxed IDL ACT RUN SUS FIN C/T C/M OBS AG 0 0 1 0 4 0 2 3 STATUS LamportFastMutEx-COL-5-ReachabilityCardinality-01 79627354 t fired, 80 attempts, . VALUE PRODUCED BY AG true skeleton: tandem / relaxed EF true findpath AG false tandem / insertion AG false tandem / relaxed EF false skeleton: tandem / insertion AG false tandem / relaxed AG true skeleton: tandem / relaxed AG false tandem / insertion AG false findpath EF true findpath EF false skeleton: tandem / insertion AG false findpath AG false tandem / insertion AG false tandem / insertion AG false tandem / relaxed IDL ACT RUN SUS FIN C/T C/M OBS AG 0 0 1 0 4 0 2 3 STATUS LamportFastMutEx-COL-5-ReachabilityCardinality-01 80189614 t fired, 81 attempts, . VALUE PRODUCED BY AG true skeleton: tandem / relaxed EF true findpath AG false tandem / insertion AG false tandem / relaxed EF false skeleton: tandem / insertion AG false tandem / relaxed AG true skeleton: tandem / relaxed AG false tandem / insertion AG false findpath EF true findpath EF false skeleton: tandem / insertion AG false findpath AG false tandem / insertion AG false tandem / insertion AG false tandem / relaxed IDL ACT RUN SUS FIN C/T C/M OBS AG 0 0 1 0 4 0 2 3 STATUS LamportFastMutEx-COL-5-ReachabilityCardinality-01 80746650 t fired, 81 attempts, . VALUE PRODUCED BY AG true skeleton: tandem / relaxed EF true findpath AG false tandem / insertion AG false tandem / relaxed EF false skeleton: tandem / insertion AG false tandem / relaxed AG true skeleton: tandem / relaxed AG false tandem / insertion AG false findpath EF true findpath EF false skeleton: tandem / insertion AG false findpath AG false tandem / insertion AG false tandem / insertion AG false tandem / relaxed IDL ACT RUN SUS FIN C/T C/M OBS AG 0 0 1 0 4 0 2 3 STATUS LamportFastMutEx-COL-5-ReachabilityCardinality-01 81308601 t fired, 82 attempts, . VALUE PRODUCED BY AG true skeleton: tandem / relaxed EF true findpath AG false tandem / insertion AG false tandem / relaxed EF false skeleton: tandem / insertion AG false tandem / relaxed AG true skeleton: tandem / relaxed AG false tandem / insertion AG false findpath EF true findpath EF false skeleton: tandem / insertion AG false findpath AG false tandem / insertion AG false tandem / insertion AG false tandem / relaxed IDL ACT RUN SUS FIN C/T C/M OBS AG 0 0 1 0 4 0 2 3 STATUS LamportFastMutEx-COL-5-ReachabilityCardinality-01 81865668 t fired, 82 attempts, . VALUE PRODUCED BY AG true skeleton: tandem / relaxed EF true findpath AG false tandem / insertion AG false tandem / relaxed EF false skeleton: tandem / insertion AG false tandem / relaxed AG true skeleton: tandem / relaxed AG false tandem / insertion AG false findpath EF true findpath EF false skeleton: tandem / insertion AG false findpath AG false tandem / insertion AG false tandem / insertion AG false tandem / relaxed IDL ACT RUN SUS FIN C/T C/M OBS AG 0 0 1 0 4 0 2 3 STATUS LamportFastMutEx-COL-5-ReachabilityCardinality-01 82422523 t fired, 83 attempts, . VALUE PRODUCED BY AG true skeleton: tandem / relaxed EF true findpath AG false tandem / insertion AG false tandem / relaxed EF false skeleton: tandem / insertion AG false tandem / relaxed AG true skeleton: tandem / relaxed AG false tandem / insertion AG false findpath EF true findpath EF false skeleton: tandem / insertion AG false findpath AG false tandem / insertion AG false tandem / insertion AG false tandem / relaxed IDL ACT RUN SUS FIN C/T C/M OBS AG 0 0 1 0 4 0 2 3 STATUS LamportFastMutEx-COL-5-ReachabilityCardinality-01 82981485 t fired, 83 attempts, . VALUE PRODUCED BY AG true skeleton: tandem / relaxed EF true findpath AG false tandem / insertion AG false tandem / relaxed EF false skeleton: tandem / insertion AG false tandem / relaxed AG true skeleton: tandem / relaxed AG false tandem / insertion AG false findpath EF true findpath EF false skeleton: tandem / insertion AG false findpath AG false tandem / insertion AG false tandem / insertion AG false tandem / relaxed IDL ACT RUN SUS FIN C/T C/M OBS AG 0 0 1 0 4 0 2 3 STATUS LamportFastMutEx-COL-5-ReachabilityCardinality-01 83538599 t fired, 84 attempts, . VALUE PRODUCED BY AG true skeleton: tandem / relaxed EF true findpath AG false tandem / insertion AG false tandem / relaxed EF false skeleton: tandem / insertion AG false tandem / relaxed AG true skeleton: tandem / relaxed AG false tandem / insertion AG false findpath EF true findpath EF false skeleton: tandem / insertion AG false findpath AG false tandem / insertion AG false tandem / insertion AG false tandem / relaxed IDL ACT RUN SUS FIN C/T C/M OBS AG 0 0 1 0 4 0 2 3 STATUS LamportFastMutEx-COL-5-ReachabilityCardinality-01 84129308 t fired, 85 attempts, . VALUE PRODUCED BY AG true skeleton: tandem / relaxed EF true findpath AG false tandem / insertion AG false tandem / relaxed EF false skeleton: tandem / insertion AG false tandem / relaxed AG true skeleton: tandem / relaxed AG false tandem / insertion AG false findpath EF true findpath EF false skeleton: tandem / insertion AG false findpath AG false tandem / insertion AG false tandem / insertion AG false tandem / relaxed IDL ACT RUN SUS FIN C/T C/M OBS AG 0 0 1 0 4 0 2 3 STATUS LamportFastMutEx-COL-5-ReachabilityCardinality-01 84723779 t fired, 85 attempts, . VALUE PRODUCED BY AG true skeleton: tandem / relaxed EF true findpath AG false tandem / insertion AG false tandem / relaxed EF false skeleton: tandem / insertion AG false tandem / relaxed AG true skeleton: tandem / relaxed AG false tandem / insertion AG false findpath EF true findpath EF false skeleton: tandem / insertion AG false findpath AG false tandem / insertion AG false tandem / insertion AG false tandem / relaxed IDL ACT RUN SUS FIN C/T C/M OBS AG 0 0 1 0 4 0 2 3 STATUS LamportFastMutEx-COL-5-ReachabilityCardinality-01 85315162 t fired, 86 attempts, . VALUE PRODUCED BY AG true skeleton: tandem / relaxed EF true findpath AG false tandem / insertion AG false tandem / relaxed EF false skeleton: tandem / insertion AG false tandem / relaxed AG true skeleton: tandem / relaxed AG false tandem / insertion AG false findpath EF true findpath EF false skeleton: tandem / insertion AG false findpath AG false tandem / insertion AG false tandem / insertion AG false tandem / relaxed IDL ACT RUN SUS FIN C/T C/M OBS AG 0 0 1 0 4 0 2 3 STATUS LamportFastMutEx-COL-5-ReachabilityCardinality-01 85910263 t fired, 86 attempts, . VALUE PRODUCED BY AG true skeleton: tandem / relaxed EF true findpath AG false tandem / insertion AG false tandem / relaxed EF false skeleton: tandem / insertion AG false tandem / relaxed AG true skeleton: tandem / relaxed AG false tandem / insertion AG false findpath EF true findpath EF false skeleton: tandem / insertion AG false findpath AG false tandem / insertion AG false tandem / insertion AG false tandem / relaxed IDL ACT RUN SUS FIN C/T C/M OBS AG 0 0 1 0 4 0 2 3 STATUS LamportFastMutEx-COL-5-ReachabilityCardinality-01 86505484 t fired, 87 attempts, . VALUE PRODUCED BY AG true skeleton: tandem / relaxed EF true findpath AG false tandem / insertion AG false tandem / relaxed EF false skeleton: tandem / insertion AG false tandem / relaxed AG true skeleton: tandem / relaxed AG false tandem / insertion AG false findpath EF true findpath EF false skeleton: tandem / insertion AG false findpath AG false tandem / insertion AG false tandem / insertion AG false tandem / relaxed IDL ACT RUN SUS FIN C/T C/M OBS AG 0 0 1 0 4 0 2 3 STATUS LamportFastMutEx-COL-5-ReachabilityCardinality-01 87103312 t fired, 88 attempts, . VALUE PRODUCED BY AG true skeleton: tandem / relaxed EF true findpath AG false tandem / insertion AG false tandem / relaxed EF false skeleton: tandem / insertion AG false tandem / relaxed AG true skeleton: tandem / relaxed AG false tandem / insertion AG false findpath EF true findpath EF false skeleton: tandem / insertion AG false findpath AG false tandem / insertion AG false tandem / insertion AG false tandem / relaxed IDL ACT RUN SUS FIN C/T C/M OBS AG 0 0 1 0 4 0 2 3 STATUS LamportFastMutEx-COL-5-ReachabilityCardinality-01 87860476 t fired, 88 attempts, . VALUE PRODUCED BY AG true skeleton: tandem / relaxed EF true findpath AG false tandem / insertion AG false tandem / relaxed EF false skeleton: tandem / insertion AG false tandem / relaxed AG true skeleton: tandem / relaxed AG false tandem / insertion AG false findpath EF true findpath EF false skeleton: tandem / insertion AG false findpath AG false tandem / insertion AG false tandem / insertion AG false tandem / relaxed IDL ACT RUN SUS FIN C/T C/M OBS AG 0 0 1 0 4 0 2 3 STATUS LamportFastMutEx-COL-5-ReachabilityCardinality-01 88616479 t fired, 89 attempts, . VALUE PRODUCED BY AG true skeleton: tandem / relaxed EF true findpath AG false tandem / insertion AG false tandem / relaxed EF false skeleton: tandem / insertion AG false tandem / relaxed AG true skeleton: tandem / relaxed AG false tandem / insertion AG false findpath EF true findpath EF false skeleton: tandem / insertion AG false findpath AG false tandem / insertion AG false tandem / insertion AG false tandem / relaxed IDL ACT RUN SUS FIN C/T C/M OBS AG 0 0 1 0 4 0 2 3 STATUS LamportFastMutEx-COL-5-ReachabilityCardinality-01 89372177 t fired, 90 attempts, . VALUE PRODUCED BY AG true skeleton: tandem / relaxed EF true findpath AG false tandem / insertion AG false tandem / relaxed EF false skeleton: tandem / insertion AG false tandem / relaxed AG true skeleton: tandem / relaxed AG false tandem / insertion AG false findpath EF true findpath EF false skeleton: tandem / insertion AG false findpath AG false tandem / insertion AG false tandem / insertion AG false tandem / relaxed IDL ACT RUN SUS FIN C/T C/M OBS AG 0 0 1 0 4 0 2 3 STATUS LamportFastMutEx-COL-5-ReachabilityCardinality-01 90127601 t fired, 91 attempts, . VALUE PRODUCED BY AG true skeleton: tandem / relaxed EF true findpath AG false tandem / insertion AG false tandem / relaxed EF false skeleton: tandem / insertion AG false tandem / relaxed AG true skeleton: tandem / relaxed AG false tandem / insertion AG false findpath EF true findpath EF false skeleton: tandem / insertion AG false findpath AG false tandem / insertion AG false tandem / insertion AG false tandem / relaxed IDL ACT RUN SUS FIN C/T C/M OBS AG 0 0 1 0 4 0 2 3 STATUS LamportFastMutEx-COL-5-ReachabilityCardinality-01 90713166 t fired, 91 attempts, . VALUE PRODUCED BY AG true skeleton: tandem / relaxed EF true findpath AG false tandem / insertion AG false tandem / relaxed EF false skeleton: tandem / insertion AG false tandem / relaxed AG true skeleton: tandem / relaxed AG false tandem / insertion AG false findpath EF true findpath EF false skeleton: tandem / insertion AG false findpath AG false tandem / insertion AG false tandem / insertion AG false tandem / relaxed IDL ACT RUN SUS FIN C/T C/M OBS AG 0 0 1 0 4 0 2 3 STATUS LamportFastMutEx-COL-5-ReachabilityCardinality-01 91293670 t fired, 92 attempts, . VALUE PRODUCED BY AG true skeleton: tandem / relaxed EF true findpath AG false tandem / insertion AG false tandem / relaxed EF false skeleton: tandem / insertion AG false tandem / relaxed AG true skeleton: tandem / relaxed AG false tandem / insertion AG false findpath EF true findpath EF false skeleton: tandem / insertion AG false findpath AG false tandem / insertion AG false tandem / insertion AG false tandem / relaxed IDL ACT RUN SUS FIN C/T C/M OBS AG 0 0 1 0 4 0 2 3 STATUS LamportFastMutEx-COL-5-ReachabilityCardinality-01 91880791 t fired, 92 attempts, . VALUE PRODUCED BY AG true skeleton: tandem / relaxed EF true findpath AG false tandem / insertion AG false tandem / relaxed EF false skeleton: tandem / insertion AG false tandem / relaxed AG true skeleton: tandem / relaxed AG false tandem / insertion AG false findpath EF true findpath EF false skeleton: tandem / insertion AG false findpath AG false tandem / insertion AG false tandem / insertion AG false tandem / relaxed IDL ACT RUN SUS FIN C/T C/M OBS AG 0 0 1 0 4 0 2 3 STATUS LamportFastMutEx-COL-5-ReachabilityCardinality-01 92460862 t fired, 93 attempts, . VALUE PRODUCED BY AG true skeleton: tandem / relaxed EF true findpath AG false tandem / insertion AG false tandem / relaxed EF false skeleton: tandem / insertion AG false tandem / relaxed AG true skeleton: tandem / relaxed AG false tandem / insertion AG false findpath EF true findpath EF false skeleton: tandem / insertion AG false findpath AG false tandem / insertion AG false tandem / insertion AG false tandem / relaxed IDL ACT RUN SUS FIN C/T C/M OBS AG 0 0 1 0 4 0 2 3 STATUS LamportFastMutEx-COL-5-ReachabilityCardinality-01 93039781 t fired, 94 attempts, . VALUE PRODUCED BY AG true skeleton: tandem / relaxed EF true findpath AG false tandem / insertion AG false tandem / relaxed EF false skeleton: tandem / insertion AG false tandem / relaxed AG true skeleton: tandem / relaxed AG false tandem / insertion AG false findpath EF true findpath EF false skeleton: tandem / insertion AG false findpath AG false tandem / insertion AG false tandem / insertion AG false tandem / relaxed IDL ACT RUN SUS FIN C/T C/M OBS AG 0 0 1 0 4 0 2 3 STATUS LamportFastMutEx-COL-5-ReachabilityCardinality-01 93615739 t fired, 94 attempts, . lola --conf=$BIN_DIR/configfiles/reachabilitycardinalityconf --formula=$DIR/ReachabilityCardinality.xml --verdictfile=$DIR/GenericPropertiesVerdict.xml $DIR/model.pnml

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="LamportFastMutEx-COL-5"
export BK_EXAMINATION="ReachabilityCardinality"
export BK_TOOL="lola"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-4028"
echo " Executing tool lola"
echo " Input is LamportFastMutEx-COL-5, examination is ReachabilityCardinality"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r118-tall-162075403300614"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/LamportFastMutEx-COL-5.tgz
mv LamportFastMutEx-COL-5 execution
cd execution
if [ "ReachabilityCardinality" = "ReachabilityDeadlock" ] || [ "ReachabilityCardinality" = "UpperBounds" ] || [ "ReachabilityCardinality" = "QuasiLiveness" ] || [ "ReachabilityCardinality" = "StableMarking" ] || [ "ReachabilityCardinality" = "Liveness" ] || [ "ReachabilityCardinality" = "OneSafe" ] || [ "ReachabilityCardinality" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "ReachabilityCardinality" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "ReachabilityCardinality" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "ReachabilityCardinality.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property ReachabilityCardinality.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "ReachabilityCardinality.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' ReachabilityCardinality.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ "ReachabilityCardinality" = "ReachabilityDeadlock" ] || [ "ReachabilityCardinality" = "QuasiLiveness" ] || [ "ReachabilityCardinality" = "StableMarking" ] || [ "ReachabilityCardinality" = "Liveness" ] || [ "ReachabilityCardinality" = "OneSafe" ] ; then
echo "FORMULA_NAME ReachabilityCardinality"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;