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Model Checking Contest 2021
11th edition, Paris, France, June 23, 2021
Execution of r080-tall-162048871600956
Last Updated
Jun 28, 2021

About the Execution of LoLA for FamilyReunion-PT-L00050M0005C002P002G001

Execution Summary
Max Memory
Used (MB)		 Time wait (ms) CPU Usage (ms) I/O Wait (ms) Computed Result Execution
Status
7216.663 3600000.00 1993318.00 7896.80 F??TF?FTT??TFTTF normal

Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/data/fkordon/mcc2021-input.r080-tall-162048871600956.qcow2', fmt=qcow2 size=4294967296 backing_file='/data/fkordon/mcc2021-input.qcow2' encryption=off cluster_size=65536 lazy_refcounts=off
Waiting for the VM to be ready (probing ssh)
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=====================================================================
Generated by BenchKit 2-4028
Executing tool lola
Input is FamilyReunion-PT-L00050M0005C002P002G001, examination is LTLCardinality
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r080-tall-162048871600956
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 13M
-rw-r--r-- 1 mcc users 524K May 5 16:58 CTLCardinality.txt
-rw-r--r-- 1 mcc users 3.2M May 5 16:58 CTLCardinality.xml
-rw-r--r-- 1 mcc users 629K May 5 16:58 CTLFireability.txt
-rw-r--r-- 1 mcc users 2.2M May 5 16:58 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K May 6 14:48 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 7.0K May 6 14:48 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 34K Mar 28 16:09 LTLCardinality.txt
-rw-r--r-- 1 mcc users 144K Mar 28 16:09 LTLCardinality.xml
-rw-r--r-- 1 mcc users 84K Mar 28 16:09 LTLFireability.txt
-rw-r--r-- 1 mcc users 225K Mar 28 16:09 LTLFireability.xml
-rw-r--r-- 1 mcc users 50K Mar 23 10:46 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 198K Mar 23 10:46 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 163K Mar 22 18:50 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 428K Mar 22 18:50 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 21K Mar 22 09:11 UpperBounds.txt
-rw-r--r-- 1 mcc users 55K Mar 22 09:11 UpperBounds.xml
-rw-r--r-- 1 mcc users 5 May 5 16:51 equiv_col
-rw-r--r-- 1 mcc users 24 May 5 16:51 instance
-rw-r--r-- 1 mcc users 6 May 5 16:51 iscolored
-rw-r--r-- 1 mcc users 4.7M May 5 16:51 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME FamilyReunion-PT-L00050M0005C002P002G001-00
FORMULA_NAME FamilyReunion-PT-L00050M0005C002P002G001-01
FORMULA_NAME FamilyReunion-PT-L00050M0005C002P002G001-02
FORMULA_NAME FamilyReunion-PT-L00050M0005C002P002G001-03
FORMULA_NAME FamilyReunion-PT-L00050M0005C002P002G001-04
FORMULA_NAME FamilyReunion-PT-L00050M0005C002P002G001-05
FORMULA_NAME FamilyReunion-PT-L00050M0005C002P002G001-06
FORMULA_NAME FamilyReunion-PT-L00050M0005C002P002G001-07
FORMULA_NAME FamilyReunion-PT-L00050M0005C002P002G001-08
FORMULA_NAME FamilyReunion-PT-L00050M0005C002P002G001-09
FORMULA_NAME FamilyReunion-PT-L00050M0005C002P002G001-10
FORMULA_NAME FamilyReunion-PT-L00050M0005C002P002G001-11
FORMULA_NAME FamilyReunion-PT-L00050M0005C002P002G001-12
FORMULA_NAME FamilyReunion-PT-L00050M0005C002P002G001-13
FORMULA_NAME FamilyReunion-PT-L00050M0005C002P002G001-14
FORMULA_NAME FamilyReunion-PT-L00050M0005C002P002G001-15

=== Now, execution of the tool begins

BK_START 1620576593221

starting LoLA
BK_INPUT FamilyReunion-PT-L00050M0005C002P002G001
BK_EXAMINATION: LTLCardinality
bin directory: /home/mcc/BenchKit/bin
current directory: /home/mcc/execution
LTLCardinality

FORMULA FamilyReunion-PT-L00050M0005C002P002G001-07 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA FamilyReunion-PT-L00050M0005C002P002G001-08 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA FamilyReunion-PT-L00050M0005C002P002G001-04 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA FamilyReunion-PT-L00050M0005C002P002G001-15 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA FamilyReunion-PT-L00050M0005C002P002G001-13 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA FamilyReunion-PT-L00050M0005C002P002G001-12 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA FamilyReunion-PT-L00050M0005C002P002G001-11 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA FamilyReunion-PT-L00050M0005C002P002G001-06 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA FamilyReunion-PT-L00050M0005C002P002G001-03 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA FamilyReunion-PT-L00050M0005C002P002G001-00 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA FamilyReunion-PT-L00050M0005C002P002G001-14 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

BK_TIME_CONFINEMENT_REACHED

--------------------
content from stderr:

lola: MEM LIMIT 32
lola: MEM LIMIT 5
lola: NET
lola: input: PNML file (--pnmlnet)
lola: reading net from /home/mcc/execution/model.pnml
lola: reading pnml
lola: PNML file contains place/transition net
lola: finished parsing
lola: closed net file /home/mcc/execution/model.pnml
lola: Reading formula.
lola: Using XML format (--xmlformula)
lola: reading XML formula
lola: reading formula from /home/mcc/execution/LTLCardinality.xml
lola: rewrite Frontend/Parser/formula_rewrite.k:98
lola: rewrite Frontend/Parser/formula_rewrite.k:159
lola: rewrite Frontend/Parser/formula_rewrite.k:168
lola: rewrite Frontend/Parser/formula_rewrite.k:436
lola: rewrite Frontend/Parser/formula_rewrite.k:521
lola: rewrite Frontend/Parser/formula_rewrite.k:370
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:430
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:550
lola: rewrite Frontend/Parser/formula_rewrite.k:376
lola: rewrite Frontend/Parser/formula_rewrite.k:535
lola: rewrite Frontend/Parser/formula_rewrite.k:150
lola: rewrite Frontend/Parser/formula_rewrite.k:98
lola: rewrite Frontend/Parser/formula_rewrite.k:159
lola: rewrite Frontend/Parser/formula_rewrite.k:278
lola: rewrite Frontend/Parser/formula_rewrite.k:144
lola: rewrite Frontend/Parser/formula_rewrite.k:120
lola: rewrite Frontend/Parser/formula_rewrite.k:98
lola: rewrite Frontend/Parser/formula_rewrite.k:98
lola: rewrite Frontend/Parser/formula_rewrite.k:153
lola: rewrite Frontend/Parser/formula_rewrite.k:352
lola: rewrite Frontend/Parser/formula_rewrite.k:159
lola: rewrite Frontend/Parser/formula_rewrite.k:141
lola: rewrite Frontend/Parser/formula_rewrite.k:355
lola: rewrite Frontend/Parser/formula_rewrite.k:153
lola: rewrite Frontend/Parser/formula_rewrite.k:352
lola: rewrite Frontend/Parser/formula_rewrite.k:159
lola: rewrite Frontend/Parser/formula_rewrite.k:355
lola: rewrite Frontend/Parser/formula_rewrite.k:153
lola: rewrite Frontend/Parser/formula_rewrite.k:123
lola: rewrite Frontend/Parser/formula_rewrite.k:150
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:352
lola: rewrite Frontend/Parser/formula_rewrite.k:524
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:98
lola: rewrite Frontend/Parser/formula_rewrite.k:115
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:355
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:355
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:352
lola: rewrite Frontend/Parser/formula_rewrite.k:352
lola: rewrite Frontend/Parser/formula_rewrite.k:352
lola: rewrite Frontend/Parser/formula_rewrite.k:436
lola: rewrite Frontend/Parser/formula_rewrite.k:355
lola: rewrite Frontend/Parser/formula_rewrite.k:379
lola: rewrite Frontend/Parser/formula_rewrite.k:373
lola: rewrite Frontend/Parser/formula_rewrite.k:355
lola: rewrite Frontend/Parser/formula_rewrite.k:355
lola: rewrite Frontend/Parser/formula_rewrite.k:98
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:115
lola: rewrite Frontend/Parser/formula_rewrite.k:352
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:379
lola: rewrite Frontend/Parser/formula_rewrite.k:427
lola: rewrite Frontend/Parser/formula_rewrite.k:433
lola: rewrite Frontend/Parser/formula_rewrite.k:433
lola: rewrite Frontend/Parser/formula_rewrite.k:352
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:355
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: NOTDEADLOCKFREE
lola: Created skeleton in 0.000000 secs.
lola: NOTDEADLOCKFREE
lola: LAUNCH task # 56 (type SKEL/SRCH) for 9 FamilyReunion-PT-L00050M0005C002P002G001-03
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 56 (type SKEL/SRCH) for FamilyReunion-PT-L00050M0005C002P002G001-03
lola: result : true
lola: markings : 2
lola: fired transitions : 1
lola: time used : 0.000000
lola: memory pages used : 1
lola: Rule S: 0 transitions removed,0 places removed
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-PT-L00050M0005C002P002G001-00: LTL 0 0 0 0 0 0 0 0
FamilyReunion-PT-L00050M0005C002P002G001-01: LTL 0 0 0 0 1 0 0 0
FamilyReunion-PT-L00050M0005C002P002G001-02: LTL 0 0 0 0 0 0 0 0
FamilyReunion-PT-L00050M0005C002P002G001-03: CONJ 0 0 0 0 1 0 0 0
FamilyReunion-PT-L00050M0005C002P002G001-04: AG 0 0 0 0 0 0 0 0
FamilyReunion-PT-L00050M0005C002P002G001-05: CONJ 0 0 0 0 0 0 0 0
FamilyReunion-PT-L00050M0005C002P002G001-06: LTL 0 0 0 0 0 0 0 0
FamilyReunion-PT-L00050M0005C002P002G001-07: INITIAL 0 0 0 0 0 0 0 0
FamilyReunion-PT-L00050M0005C002P002G001-08: LTL 0 0 0 0 0 0 0 0
FamilyReunion-PT-L00050M0005C002P002G001-09: LTL 0 0 0 0 0 0 0 0
FamilyReunion-PT-L00050M0005C002P002G001-10: LTL 0 0 0 0 0 0 0 0
FamilyReunion-PT-L00050M0005C002P002G001-11: LTL 0 0 0 0 0 0 0 0
FamilyReunion-PT-L00050M0005C002P002G001-12: LTL 0 0 0 0 0 0 0 0
FamilyReunion-PT-L00050M0005C002P002G001-13: LTL 0 0 0 0 0 0 0 0
FamilyReunion-PT-L00050M0005C002P002G001-14: LTL 0 0 0 0 0 0 0 0
FamilyReunion-PT-L00050M0005C002P002G001-15: LTL 0 0 0 0 0 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 58 secs. Pages in use: 1
# running tasks: 0 of 4 Visible: 16
lola: NOTDEADLOCKFREE
lola: Created skeleton in 0.000000 secs.
lola: NOTDEADLOCKFREE
lola: Created skeleton in 0.000000 secs.
lola: NOTDEADLOCKFREE
lola: Created skeleton in 0.000000 secs.
lola: RELEASE
lola: Created skeleton in 0.000000 secs.
lola: LAUNCH INITIAL
lola: LAUNCH task # 22 (type CNST) for 19 FamilyReunion-PT-L00050M0005C002P002G001-05
lola: time limit : 0 sec
lola: memory limit: 0 pages
lola: FINISHED task # 22 (type CNST) for FamilyReunion-PT-L00050M0005C002P002G001-05
lola: result : true
lola: LAUNCH INITIAL
lola: LAUNCH task # 30 (type CNST) for 29 FamilyReunion-PT-L00050M0005C002P002G001-07
lola: time limit : 0 sec
lola: memory limit: 0 pages
lola: FINISHED task # 30 (type CNST) for FamilyReunion-PT-L00050M0005C002P002G001-07
lola: result : true
lola: Created skeleton in 0.000000 secs.
lola: NOTDEADLOCKFREE
lola: NOTDEADLOCKFREE
lola: NOTDEADLOCKFREE
lola: LAUNCH task # 57 (type SKEL/SRCH) for 32 FamilyReunion-PT-L00050M0005C002P002G001-08
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 57 (type SKEL/SRCH) for FamilyReunion-PT-L00050M0005C002P002G001-08
lola: result : true
lola: markings : 6
lola: fired transitions : 5
lola: time used : 0.000000
lola: memory pages used : 1
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: LAUNCH task # 60 (type SKEL/FNDP) for 16 FamilyReunion-PT-L00050M0005C002P002G001-04
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 61 (type SKEL/EQUN) for 16 FamilyReunion-PT-L00050M0005C002P002G001-04
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 62 (type SKEL/SRCH) for 16 FamilyReunion-PT-L00050M0005C002P002G001-04
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: LAUNCH task # 63 (type SKEL/SRCH) for 16 FamilyReunion-PT-L00050M0005C002P002G001-04
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 60 (type SKEL/FNDP) for FamilyReunion-PT-L00050M0005C002P002G001-04
lola: result : true
lola: fired transitions : 12
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
lola: CANCELED task # 61 (type EQUN) for FamilyReunion-PT-L00050M0005C002P002G001-04 (obsolete)
lola: CANCELED task # 62 (type SRCH) for FamilyReunion-PT-L00050M0005C002P002G001-04 (obsolete)
lola: CANCELED task # 63 (type SRCH) for FamilyReunion-PT-L00050M0005C002P002G001-04 (obsolete)
lola: NOTDEADLOCKFREE
lola: NOTDEADLOCKFREE
lola: LAUNCH task # 64 (type SKEL/SRCH) for 35 FamilyReunion-PT-L00050M0005C002P002G001-09
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: NOTDEADLOCKFREE
sara: try reading problem file /home/mcc/execution/LTLCardinality-61.sara.
sara: place or transition ordering is non-deterministic

lola: FINISHED task # 61 (type SKEL/EQUN) for FamilyReunion-PT-L00050M0005C002P002G001-04
lola: result : true
lola: Created skeleton in 1.000000 secs.
lola: NOTDEADLOCKFREE
lola: planning for FamilyReunion-PT-L00050M0005C002P002G001-08 stopped (result already fixed).
lola: Created skeleton in 0.000000 secs.
lola: NOTDEADLOCKFREE
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: NOTDEADLOCKFREE
lola: NOTDEADLOCKFREE
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-PT-L00050M0005C002P002G001-07: INITIAL true preprocessing
FamilyReunion-PT-L00050M0005C002P002G001-08: LTL true skeleton: LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-PT-L00050M0005C002P002G001-00: LTL 0 0 0 0 1 0 0 0
FamilyReunion-PT-L00050M0005C002P002G001-01: LTL 0 0 0 0 1 0 0 0
FamilyReunion-PT-L00050M0005C002P002G001-02: LTL 0 0 0 0 1 0 0 0
FamilyReunion-PT-L00050M0005C002P002G001-03: CONJ 0 0 0 0 2 0 0 0
FamilyReunion-PT-L00050M0005C002P002G001-04: AG 0 0 0 0 2 0 0 2
FamilyReunion-PT-L00050M0005C002P002G001-05: CONJ 0 0 0 0 1 0 0 0
FamilyReunion-PT-L00050M0005C002P002G001-06: LTL 0 0 0 0 1 0 0 0
FamilyReunion-PT-L00050M0005C002P002G001-09: LTL 0 0 1 0 0 0 0 0
FamilyReunion-PT-L00050M0005C002P002G001-10: LTL 0 0 0 0 1 0 0 0
FamilyReunion-PT-L00050M0005C002P002G001-11: LTL 0 0 0 0 1 0 0 0
FamilyReunion-PT-L00050M0005C002P002G001-12: LTL 0 0 0 0 1 0 0 0
FamilyReunion-PT-L00050M0005C002P002G001-13: LTL 0 0 0 0 1 0 0 0
FamilyReunion-PT-L00050M0005C002P002G001-14: LTL 0 0 0 0 1 0 0 0
FamilyReunion-PT-L00050M0005C002P002G001-15: LTL 0 0 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
64 LTL SRCH 5/3542 1/5 FamilyReunion-PT-L00050M0005C002P002G001-09 93246 m, 18649 m/sec, 346651 t fired, .

Time elapsed: 63 secs. Pages in use: 2
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-PT-L00050M0005C002P002G001-07: INITIAL true preprocessing
FamilyReunion-PT-L00050M0005C002P002G001-08: LTL true skeleton: LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-PT-L00050M0005C002P002G001-00: LTL 0 0 0 0 1 0 0 0
FamilyReunion-PT-L00050M0005C002P002G001-01: LTL 0 0 0 0 1 0 0 0
FamilyReunion-PT-L00050M0005C002P002G001-02: LTL 0 0 0 0 1 0 0 0
FamilyReunion-PT-L00050M0005C002P002G001-03: CONJ 0 0 0 0 2 0 0 0
FamilyReunion-PT-L00050M0005C002P002G001-04: AG 0 0 0 0 2 0 0 2
FamilyReunion-PT-L00050M0005C002P002G001-05: CONJ 0 0 0 0 1 0 0 0
FamilyReunion-PT-L00050M0005C002P002G001-06: LTL 0 0 0 0 1 0 0 0
FamilyReunion-PT-L00050M0005C002P002G001-09: LTL 0 0 1 0 0 0 0 0
FamilyReunion-PT-L00050M0005C002P002G001-10: LTL 0 0 0 0 1 0 0 0
FamilyReunion-PT-L00050M0005C002P002G001-11: LTL 0 0 0 0 1 0 0 0
FamilyReunion-PT-L00050M0005C002P002G001-12: LTL 0 0 0 0 1 0 0 0
FamilyReunion-PT-L00050M0005C002P002G001-13: LTL 0 0 0 0 1 0 0 0
FamilyReunion-PT-L00050M0005C002P002G001-14: LTL 0 0 0 0 1 0 0 0
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7 LTL EXCL 22/251 5/32 FamilyReunion-PT-L00050M0005C002P002G001-02 66247 m, 4464 m/sec, 91108 t fired, .
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7 LTL EXCL 47/251 12/32 FamilyReunion-PT-L00050M0005C002P002G001-02 192671 m, 7712 m/sec, 268303 t fired, .
64 LTL SRCH 65/3542 1/5 FamilyReunion-PT-L00050M0005C002P002G001-09 1506030 m, 61171 m/sec, 7290682 t fired, .

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7 LTL EXCL 52/251 14/32 FamilyReunion-PT-L00050M0005C002P002G001-02 233483 m, 8162 m/sec, 325930 t fired, .
64 LTL SRCH 70/3542 1/5 FamilyReunion-PT-L00050M0005C002P002G001-09 1906604 m, 80114 m/sec, 9187323 t fired, .

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7 LTL EXCL 57/251 17/32 FamilyReunion-PT-L00050M0005C002P002G001-02 274446 m, 8192 m/sec, 383372 t fired, .
64 LTL SRCH 75/3542 1/5 FamilyReunion-PT-L00050M0005C002P002G001-09 2287244 m, 76128 m/sec, 11088674 t fired, .

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7 LTL EXCL 62/251 19/32 FamilyReunion-PT-L00050M0005C002P002G001-02 315477 m, 8206 m/sec, 440988 t fired, .
64 LTL SRCH 80/3542 1/5 FamilyReunion-PT-L00050M0005C002P002G001-09 2681552 m, 78861 m/sec, 12987035 t fired, .

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7 LTL EXCL 67/251 22/32 FamilyReunion-PT-L00050M0005C002P002G001-02 356491 m, 8202 m/sec, 498820 t fired, .
64 LTL SRCH 85/3542 1/5 FamilyReunion-PT-L00050M0005C002P002G001-09 3104565 m, 84602 m/sec, 14869140 t fired, .

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7 LTL EXCL 72/251 24/32 FamilyReunion-PT-L00050M0005C002P002G001-02 397421 m, 8186 m/sec, 556577 t fired, .
64 LTL SRCH 90/3542 1/5 FamilyReunion-PT-L00050M0005C002P002G001-09 3465069 m, 72100 m/sec, 16749251 t fired, .

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7 LTL EXCL 77/251 27/32 FamilyReunion-PT-L00050M0005C002P002G001-02 438321 m, 8180 m/sec, 614418 t fired, .
64 LTL SRCH 95/3542 1/5 FamilyReunion-PT-L00050M0005C002P002G001-09 3811195 m, 69225 m/sec, 18592909 t fired, .

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7 LTL EXCL 82/251 29/32 FamilyReunion-PT-L00050M0005C002P002G001-02 479135 m, 8162 m/sec, 672263 t fired, .
64 LTL SRCH 100/3542 1/5 FamilyReunion-PT-L00050M0005C002P002G001-09 4153443 m, 68449 m/sec, 20469175 t fired, .

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7 LTL EXCL 87/251 32/32 FamilyReunion-PT-L00050M0005C002P002G001-02 519556 m, 8084 m/sec, 729827 t fired, .
64 LTL SRCH 105/3542 1/5 FamilyReunion-PT-L00050M0005C002P002G001-09 4493553 m, 68022 m/sec, 22335931 t fired, .

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64 LTL SRCH 110/3542 1/5 FamilyReunion-PT-L00050M0005C002P002G001-09 4863919 m, 74073 m/sec, 24241065 t fired, .

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64 LTL SRCH 115/3542 1/5 FamilyReunion-PT-L00050M0005C002P002G001-09 5185313 m, 64278 m/sec, 26143885 t fired, .

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39 LTL EXCL 10/381 2/32 FamilyReunion-PT-L00050M0005C002P002G001-10 40689 m, 4003 m/sec, 145082 t fired, .
64 LTL SRCH 120/3542 1/5 FamilyReunion-PT-L00050M0005C002P002G001-09 5489861 m, 60909 m/sec, 28041631 t fired, .

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39 LTL EXCL 15/381 2/32 FamilyReunion-PT-L00050M0005C002P002G001-10 60529 m, 3968 m/sec, 220870 t fired, .
64 LTL SRCH 125/3542 1/5 FamilyReunion-PT-L00050M0005C002P002G001-09 5803519 m, 62731 m/sec, 29920600 t fired, .

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39 LTL EXCL 20/381 3/32 FamilyReunion-PT-L00050M0005C002P002G001-10 76941 m, 3282 m/sec, 296834 t fired, .
64 LTL SRCH 130/3542 1/5 FamilyReunion-PT-L00050M0005C002P002G001-09 6127110 m, 64718 m/sec, 31798511 t fired, .

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39 LTL EXCL 25/381 3/32 FamilyReunion-PT-L00050M0005C002P002G001-10 94145 m, 3440 m/sec, 372032 t fired, .
64 LTL SRCH 135/3542 1/5 FamilyReunion-PT-L00050M0005C002P002G001-09 6452146 m, 65007 m/sec, 33676535 t fired, .

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39 LTL EXCL 30/381 3/32 FamilyReunion-PT-L00050M0005C002P002G001-10 109580 m, 3087 m/sec, 448345 t fired, .
64 LTL SRCH 140/3542 1/5 FamilyReunion-PT-L00050M0005C002P002G001-09 6769049 m, 63380 m/sec, 35570451 t fired, .

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39 LTL EXCL 35/381 4/32 FamilyReunion-PT-L00050M0005C002P002G001-10 125430 m, 3170 m/sec, 524497 t fired, .
64 LTL SRCH 145/3542 1/5 FamilyReunion-PT-L00050M0005C002P002G001-09 7100965 m, 66383 m/sec, 37430832 t fired, .

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39 LTL EXCL 40/381 4/32 FamilyReunion-PT-L00050M0005C002P002G001-10 141500 m, 3214 m/sec, 600802 t fired, .
64 LTL SRCH 150/3542 2/5 FamilyReunion-PT-L00050M0005C002P002G001-09 7436931 m, 67193 m/sec, 39284815 t fired, .

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39 LTL EXCL 45/381 4/32 FamilyReunion-PT-L00050M0005C002P002G001-10 154900 m, 2680 m/sec, 677049 t fired, .
64 LTL SRCH 155/3542 4/5 FamilyReunion-PT-L00050M0005C002P002G001-09 7724158 m, 57445 m/sec, 41135697 t fired, .

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39 LTL EXCL 50/381 4/32 FamilyReunion-PT-L00050M0005C002P002G001-10 169872 m, 2994 m/sec, 753490 t fired, .

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39 LTL EXCL 55/381 5/32 FamilyReunion-PT-L00050M0005C002P002G001-10 185205 m, 3066 m/sec, 829719 t fired, .

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39 LTL EXCL 65/381 6/32 FamilyReunion-PT-L00050M0005C002P002G001-10 218127 m, 3380 m/sec, 981341 t fired, .

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FamilyReunion-PT-L00050M0005C002P002G001-05: CONJ 0 0 0 0 1 0 1 0
FamilyReunion-PT-L00050M0005C002P002G001-09: LTL 0 0 0 0 0 0 2 0
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FamilyReunion-PT-L00050M0005C002P002G001-06: LTL false LTL model checker
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FamilyReunion-PT-L00050M0005C002P002G001-15: LTL false LTL model checker


========== file over 1MB has been truncated ======
retrieve it from the run archives if needed

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="FamilyReunion-PT-L00050M0005C002P002G001"
export BK_EXAMINATION="LTLCardinality"
export BK_TOOL="lola"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-4028"
echo " Executing tool lola"
echo " Input is FamilyReunion-PT-L00050M0005C002P002G001, examination is LTLCardinality"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r080-tall-162048871600956"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/FamilyReunion-PT-L00050M0005C002P002G001.tgz
mv FamilyReunion-PT-L00050M0005C002P002G001 execution
cd execution
if [ "LTLCardinality" = "ReachabilityDeadlock" ] || [ "LTLCardinality" = "UpperBounds" ] || [ "LTLCardinality" = "QuasiLiveness" ] || [ "LTLCardinality" = "StableMarking" ] || [ "LTLCardinality" = "Liveness" ] || [ "LTLCardinality" = "OneSafe" ] || [ "LTLCardinality" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "LTLCardinality" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "LTLCardinality" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "LTLCardinality.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property LTLCardinality.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "LTLCardinality.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' LTLCardinality.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ "LTLCardinality" = "ReachabilityDeadlock" ] || [ "LTLCardinality" = "QuasiLiveness" ] || [ "LTLCardinality" = "StableMarking" ] || [ "LTLCardinality" = "Liveness" ] || [ "LTLCardinality" = "OneSafe" ] ; then
echo "FORMULA_NAME LTLCardinality"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;