fond
Model Checking Contest 2021
11th edition, Paris, France, June 23, 2021
Execution of r080-tall-162048871600932
Last Updated
Jun 28, 2021

About the Execution of LoLA for FamilyReunion-COL-L12000M1200C600P600G300

Execution Summary
Max Memory
Used (MB)
Time wait (ms) CPU Usage (ms) I/O Wait (ms) Computed Result Execution
Status
78.048 368.00 138.00 2.50 ??????T???F????? normal

Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/data/fkordon/mcc2021-input.r080-tall-162048871600932.qcow2', fmt=qcow2 size=4294967296 backing_file='/data/fkordon/mcc2021-input.qcow2' encryption=off cluster_size=65536 lazy_refcounts=off
Waiting for the VM to be ready (probing ssh)
.........................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................
=====================================================================
Generated by BenchKit 2-4028
Executing tool lola
Input is FamilyReunion-COL-L12000M1200C600P600G300, examination is LTLCardinality
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r080-tall-162048871600932
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 1.3M
-rw-r--r-- 1 mcc users 12K May 5 16:58 CTLCardinality.txt
-rw-r--r-- 1 mcc users 123K May 5 16:58 CTLCardinality.xml
-rw-r--r-- 1 mcc users 21K May 5 16:58 CTLFireability.txt
-rw-r--r-- 1 mcc users 107K May 5 16:58 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K May 6 14:48 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 7.0K May 6 14:48 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 3.7K Mar 28 16:10 LTLCardinality.txt
-rw-r--r-- 1 mcc users 24K Mar 28 16:10 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.8K Mar 28 16:10 LTLFireability.txt
-rw-r--r-- 1 mcc users 16K Mar 28 16:10 LTLFireability.xml
-rw-r--r-- 1 mcc users 3.7K Mar 27 20:33 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 18K Mar 27 20:33 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 3.4K Mar 27 19:49 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 14K Mar 27 19:49 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 2.0K Mar 28 15:10 UpperBounds.txt
-rw-r--r-- 1 mcc users 4.0K Mar 28 15:10 UpperBounds.xml
-rw-r--r-- 1 mcc users 5 May 5 16:51 equiv_pt
-rw-r--r-- 1 mcc users 24 May 5 16:51 instance
-rw-r--r-- 1 mcc users 5 May 5 16:51 iscolored
-rw-r--r-- 1 mcc users 930K May 5 16:51 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME FamilyReunion-COL-L12000M1200C600P600G300-00
FORMULA_NAME FamilyReunion-COL-L12000M1200C600P600G300-01
FORMULA_NAME FamilyReunion-COL-L12000M1200C600P600G300-02
FORMULA_NAME FamilyReunion-COL-L12000M1200C600P600G300-03
FORMULA_NAME FamilyReunion-COL-L12000M1200C600P600G300-04
FORMULA_NAME FamilyReunion-COL-L12000M1200C600P600G300-05
FORMULA_NAME FamilyReunion-COL-L12000M1200C600P600G300-06
FORMULA_NAME FamilyReunion-COL-L12000M1200C600P600G300-07
FORMULA_NAME FamilyReunion-COL-L12000M1200C600P600G300-08
FORMULA_NAME FamilyReunion-COL-L12000M1200C600P600G300-09
FORMULA_NAME FamilyReunion-COL-L12000M1200C600P600G300-10
FORMULA_NAME FamilyReunion-COL-L12000M1200C600P600G300-11
FORMULA_NAME FamilyReunion-COL-L12000M1200C600P600G300-12
FORMULA_NAME FamilyReunion-COL-L12000M1200C600P600G300-13
FORMULA_NAME FamilyReunion-COL-L12000M1200C600P600G300-14
FORMULA_NAME FamilyReunion-COL-L12000M1200C600P600G300-15

=== Now, execution of the tool begins

BK_START 1620576238180

starting LoLA
BK_INPUT FamilyReunion-COL-L12000M1200C600P600G300
BK_EXAMINATION: LTLCardinality
bin directory: /home/mcc/BenchKit/bin
current directory: /home/mcc/execution
LTLCardinality

FORMULA FamilyReunion-COL-L12000M1200C600P600G300-06 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA FamilyReunion-COL-L12000M1200C600P600G300-10 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

BK_STOP 1620576238548

--------------------
content from stderr:

lola: MEM LIMIT 32
lola: MEM LIMIT 5
lola: NET
lola: input: PNML file (--pnmlnet)
lola: reading net from /home/mcc/execution/model.pnml
lola: reading pnml
lola: PNML file contains High-Level net
lola: finished parsing
lola: closed net file /home/mcc/execution/model.pnml
lola: Reading HL formula in XML format (--xmlformula)
lola: reading formula from /home/mcc/execution/LTLCardinality.xml
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:535
lola: rewrite Frontend/Parser/formula_rewrite.k:535
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:430
lola: rewrite Frontend/Parser/formula_rewrite.k:355
lola: rewrite Frontend/Parser/formula_rewrite.k:544
lola: rewrite Frontend/Parser/formula_rewrite.k:352
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:352
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:98
lola: rewrite Frontend/Parser/formula_rewrite.k:159
lola: rewrite Frontend/Parser/formula_rewrite.k:114
lola: rewrite Frontend/Parser/formula_rewrite.k:150
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:421
lola: rewrite Frontend/Parser/formula_rewrite.k:355
lola: rewrite Frontend/Parser/formula_rewrite.k:433
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:550
lola: rewrite Frontend/Parser/formula_rewrite.k:98
lola: rewrite Frontend/Parser/formula_rewrite.k:98
lola: rewrite Frontend/Parser/formula_rewrite.k:153
lola: rewrite Frontend/Parser/formula_rewrite.k:123
lola: rewrite Frontend/Parser/formula_rewrite.k:278
lola: rewrite Frontend/Parser/formula_rewrite.k:156
lola: rewrite Frontend/Parser/formula_rewrite.k:150
lola: rewrite Frontend/Parser/formula_rewrite.k:98
lola: rewrite Frontend/Parser/formula_rewrite.k:153
lola: rewrite Frontend/Parser/formula_rewrite.k:550
lola: rewrite Frontend/Parser/formula_rewrite.k:141
lola: rewrite Frontend/Parser/formula_rewrite.k:352
lola: rewrite Frontend/Parser/formula_rewrite.k:349
lola: rewrite Frontend/Parser/formula_rewrite.k:355
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: NOTDEADLOCKFREE
lola: start findlow
lola: CHECK FINDLOW FOR TRANS Gate2ANDJoin
lola: NOTDEADLOCKFREE
lola: NOTDEADLOCKFREE
lola: NOTDEADLOCKFREE
lola: NOTDEADLOCKFREE
lola: TR BINDINGS
lola: NOTDEADLOCKFREE
lola: NOTDEADLOCKFREE
lola: LAUNCH INITIAL
lola: INVENT VAR FOR PLACE l29
lola: INVENT VAR FOR PLACE l27
lola: INVENT VAR FOR PLACE l26
lola: INVENT VAR FOR PLACE l28
lola: CHECK EQ TRANS Gate2ANDJoin
lola: NOTDEADLOCKFREE
lola: LAUNCH task # 32 (type SKEL/CNST) for 30 FamilyReunion-COL-L12000M1200C600P600G300-06
lola: time limit : 0 sec
lola: memory limit: 0 pages
lola: NOTDEADLOCKFREE
lola: NOTDEADLOCKFREE
lola: NOTDEADLOCKFREE
lola: NOTDEADLOCKFREE
lola: NOTDEADLOCKFREE
lola: NOTDEADLOCKFREE
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: FINISHED task # 32 (type SKEL/CNST) for FamilyReunion-COL-L12000M1200C600P600G300-06
lola: result : true
lola: NOTDEADLOCKFREE
lola: NOTDEADLOCKFREE
lola: LAUNCH INITIAL
lola: LAUNCH task # 48 (type SKEL/CNST) for 46 FamilyReunion-COL-L12000M1200C600P600G300-10
lola: time limit : 0 sec
lola: memory limit: 0 pages
lola: NOTDEADLOCKFREE
lola: LAUNCH task # 70 (type SKEL/FNDP) for 0 FamilyReunion-COL-L12000M1200C600P600G300-00
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: NOTDEADLOCKFREE
lola: LAUNCH task # 71 (type SKEL/EQUN) for 0 FamilyReunion-COL-L12000M1200C600P600G300-00
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 72 (type SKEL/SRCH) for 0 FamilyReunion-COL-L12000M1200C600P600G300-00
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 48 (type SKEL/CNST) for FamilyReunion-COL-L12000M1200C600P600G300-10
lola: result : false
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: LAUNCH task # 73 (type SKEL/SRCH) for 0 FamilyReunion-COL-L12000M1200C600P600G300-00
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 72 (type SKEL/SRCH) for FamilyReunion-COL-L12000M1200C600P600G300-00
lola: result : false
lola: markings : 1
lola: time used : 0.000000
lola: memory pages used : 1
lola: CANCELED task # 70 (type FNDP) for FamilyReunion-COL-L12000M1200C600P600G300-00 (obsolete)
lola: CANCELED task # 71 (type EQUN) for FamilyReunion-COL-L12000M1200C600P600G300-00 (obsolete)
lola: CANCELED task # 73 (type SRCH) for FamilyReunion-COL-L12000M1200C600P600G300-00 (obsolete)
lola: TR BINDINGS DONE
lola: Places: 451140109, Transitions: 432852669
lola: Place/transition net would exceed node limit
lola: syntax error -- aborting [#01]
lola: see manual for a documentation of this error
lola: last error message: Inappropriate ioctl for device

FINAL RESULTS
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L12000M1200C600P600G300-00: CONJ unknown CONJ
FamilyReunion-COL-L12000M1200C600P600G300-01: LTL unknown AGGR
FamilyReunion-COL-L12000M1200C600P600G300-02: LTL unknown AGGR
FamilyReunion-COL-L12000M1200C600P600G300-03: CONJ unknown CONJ
FamilyReunion-COL-L12000M1200C600P600G300-04: LTL unknown AGGR
FamilyReunion-COL-L12000M1200C600P600G300-05: LTL unknown AGGR
FamilyReunion-COL-L12000M1200C600P600G300-06: INITIAL true skeleton: preprocessing
FamilyReunion-COL-L12000M1200C600P600G300-07: LTL unknown AGGR
FamilyReunion-COL-L12000M1200C600P600G300-08: CONJ unknown CONJ
FamilyReunion-COL-L12000M1200C600P600G300-09: LTL unknown AGGR
FamilyReunion-COL-L12000M1200C600P600G300-10: INITIAL false skeleton: preprocessing
FamilyReunion-COL-L12000M1200C600P600G300-11: CONJ unknown CONJ
FamilyReunion-COL-L12000M1200C600P600G300-12: F unknown AGGR
FamilyReunion-COL-L12000M1200C600P600G300-13: LTL unknown AGGR
FamilyReunion-COL-L12000M1200C600P600G300-14: LTL unknown AGGR
FamilyReunion-COL-L12000M1200C600P600G300-15: LTL unknown AGGR


Time elapsed: 0 secs. Pages in use: 1
lola: FINISHED task # 71 (type SKEL/EQUN) for FamilyReunion-COL-L12000M1200C600P600G300-00
lola: result : unknown
lola: Portfolio finished: no open formulas

FINAL RESULTS
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L12000M1200C600P600G300-00: CONJ unknown CONJ
FamilyReunion-COL-L12000M1200C600P600G300-01: LTL unknown AGGR
FamilyReunion-COL-L12000M1200C600P600G300-02: LTL unknown AGGR
FamilyReunion-COL-L12000M1200C600P600G300-03: CONJ unknown CONJ
FamilyReunion-COL-L12000M1200C600P600G300-04: LTL unknown AGGR
FamilyReunion-COL-L12000M1200C600P600G300-05: LTL unknown AGGR
FamilyReunion-COL-L12000M1200C600P600G300-06: INITIAL true skeleton: preprocessing
FamilyReunion-COL-L12000M1200C600P600G300-07: LTL unknown AGGR
FamilyReunion-COL-L12000M1200C600P600G300-08: CONJ unknown CONJ
FamilyReunion-COL-L12000M1200C600P600G300-09: LTL unknown AGGR
FamilyReunion-COL-L12000M1200C600P600G300-10: INITIAL false skeleton: preprocessing
FamilyReunion-COL-L12000M1200C600P600G300-11: CONJ unknown CONJ
FamilyReunion-COL-L12000M1200C600P600G300-12: F unknown AGGR
FamilyReunion-COL-L12000M1200C600P600G300-13: LTL unknown AGGR
FamilyReunion-COL-L12000M1200C600P600G300-14: LTL unknown AGGR
FamilyReunion-COL-L12000M1200C600P600G300-15: LTL unknown AGGR


Time elapsed: 0 secs. Pages in use: 1

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="FamilyReunion-COL-L12000M1200C600P600G300"
export BK_EXAMINATION="LTLCardinality"
export BK_TOOL="lola"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-4028"
echo " Executing tool lola"
echo " Input is FamilyReunion-COL-L12000M1200C600P600G300, examination is LTLCardinality"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r080-tall-162048871600932"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/FamilyReunion-COL-L12000M1200C600P600G300.tgz
mv FamilyReunion-COL-L12000M1200C600P600G300 execution
cd execution
if [ "LTLCardinality" = "ReachabilityDeadlock" ] || [ "LTLCardinality" = "UpperBounds" ] || [ "LTLCardinality" = "QuasiLiveness" ] || [ "LTLCardinality" = "StableMarking" ] || [ "LTLCardinality" = "Liveness" ] || [ "LTLCardinality" = "OneSafe" ] || [ "LTLCardinality" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "LTLCardinality" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "LTLCardinality" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "LTLCardinality.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property LTLCardinality.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "LTLCardinality.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' LTLCardinality.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ "LTLCardinality" = "ReachabilityDeadlock" ] || [ "LTLCardinality" = "QuasiLiveness" ] || [ "LTLCardinality" = "StableMarking" ] || [ "LTLCardinality" = "Liveness" ] || [ "LTLCardinality" = "OneSafe" ] ; then
echo "FORMULA_NAME LTLCardinality"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;