About the Execution of LoLA for DLCshifumi-PT-4b
| Execution Summary | |||||
| Max Memory Used (MB) |
Time wait (ms) | CPU Usage (ms) | I/O Wait (ms) | Computed Result | Execution Status |
| 12637.195 | 3600000.00 | 4129429.00 | 8318.00 | F?TFF?FFFFFFF?FF | normal |
Execution Chart
We display below the execution chart for this examination (boot time has been removed).
Trace from the execution
Formatting '/data/fkordon/mcc2021-input.r061-tall-162038393300493.qcow2', fmt=qcow2 size=4294967296 backing_file='/data/fkordon/mcc2021-input.qcow2' encryption=off cluster_size=65536 lazy_refcounts=off
Waiting for the VM to be ready (probing ssh)
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=====================================================================
Generated by BenchKit 2-4028
Executing tool lola
Input is DLCshifumi-PT-4b, examination is LTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r061-tall-162038393300493
=====================================================================
--------------------
preparation of the directory to be used:
/home/mcc/execution
total 5.6M
-rw-r--r-- 1 mcc users 21K May 5 16:58 CTLCardinality.txt
-rw-r--r-- 1 mcc users 190K May 5 16:58 CTLCardinality.xml
-rw-r--r-- 1 mcc users 12K May 5 16:58 CTLFireability.txt
-rw-r--r-- 1 mcc users 95K May 5 16:58 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K May 6 14:48 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.4K May 6 14:48 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 3.3K Mar 28 15:59 LTLCardinality.txt
-rw-r--r-- 1 mcc users 23K Mar 28 15:59 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.0K Mar 28 15:59 LTLFireability.txt
-rw-r--r-- 1 mcc users 16K Mar 28 15:59 LTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K Mar 23 09:17 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 22K Mar 23 09:17 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 2.6K Mar 22 16:48 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 15K Mar 22 16:48 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.6K Mar 22 09:10 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.7K Mar 22 09:10 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 May 5 16:51 equiv_col
-rw-r--r-- 1 mcc users 3 May 5 16:51 instance
-rw-r--r-- 1 mcc users 6 May 5 16:51 iscolored
-rw-r--r-- 1 mcc users 5.1M May 5 16:51 model.pnml
--------------------
content from stdout:
=== Data for post analysis generated by BenchKit (invocation template)
The expected result is a vector of booleans
BOOL_VECTOR
here is the order used to build the result vector(from text file)
FORMULA_NAME DLCshifumi-PT-4b-00
FORMULA_NAME DLCshifumi-PT-4b-01
FORMULA_NAME DLCshifumi-PT-4b-02
FORMULA_NAME DLCshifumi-PT-4b-03
FORMULA_NAME DLCshifumi-PT-4b-04
FORMULA_NAME DLCshifumi-PT-4b-05
FORMULA_NAME DLCshifumi-PT-4b-06
FORMULA_NAME DLCshifumi-PT-4b-07
FORMULA_NAME DLCshifumi-PT-4b-08
FORMULA_NAME DLCshifumi-PT-4b-09
FORMULA_NAME DLCshifumi-PT-4b-10
FORMULA_NAME DLCshifumi-PT-4b-11
FORMULA_NAME DLCshifumi-PT-4b-12
FORMULA_NAME DLCshifumi-PT-4b-13
FORMULA_NAME DLCshifumi-PT-4b-14
FORMULA_NAME DLCshifumi-PT-4b-15
=== Now, execution of the tool begins
BK_START 1620462895132
starting LoLA
BK_INPUT DLCshifumi-PT-4b
BK_EXAMINATION: LTLFireability
bin directory: /home/mcc/BenchKit/bin
current directory: /home/mcc/execution
LTLFireability
FORMULA DLCshifumi-PT-4b-09 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA DLCshifumi-PT-4b-07 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA DLCshifumi-PT-4b-12 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA DLCshifumi-PT-4b-15 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA DLCshifumi-PT-4b-10 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA DLCshifumi-PT-4b-02 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA DLCshifumi-PT-4b-14 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA DLCshifumi-PT-4b-11 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA DLCshifumi-PT-4b-08 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA DLCshifumi-PT-4b-06 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA DLCshifumi-PT-4b-04 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA DLCshifumi-PT-4b-03 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA DLCshifumi-PT-4b-00 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
BK_TIME_CONFINEMENT_REACHED
--------------------
content from stderr:
lola: MEM LIMIT 32
lola: MEM LIMIT 5
lola: NET
lola: input: PNML file (--pnmlnet)
lola: reading net from /home/mcc/execution/model.pnml
lola: reading pnml
lola: PNML file contains place/transition net
lola: finished parsing
lola: closed net file /home/mcc/execution/model.pnml
lola: Reading formula.
lola: Using XML format (--xmlformula)
lola: reading XML formula
lola: reading formula from /home/mcc/execution/LTLFireability.xml
lola: rewrite Frontend/Parser/formula_rewrite.k:352
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:535
lola: rewrite Frontend/Parser/formula_rewrite.k:150
lola: rewrite Frontend/Parser/formula_rewrite.k:535
lola: rewrite Frontend/Parser/formula_rewrite.k:355
lola: rewrite Frontend/Parser/formula_rewrite.k:379
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:433
lola: rewrite Frontend/Parser/formula_rewrite.k:355
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:340
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:436
lola: rewrite Frontend/Parser/formula_rewrite.k:521
lola: rewrite Frontend/Parser/formula_rewrite.k:373
lola: rewrite Frontend/Parser/formula_rewrite.k:346
lola: rewrite Frontend/Parser/formula_rewrite.k:355
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: RELEASE
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:521
lola: rewrite Frontend/Parser/formula_rewrite.k:544
lola: rewrite Frontend/Parser/formula_rewrite.k:544
lola: rewrite Frontend/Parser/formula_rewrite.k:352
lola: rewrite Frontend/Parser/formula_rewrite.k:355
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:535
lola: rewrite Frontend/Parser/formula_rewrite.k:150
lola: rewrite Frontend/Parser/formula_rewrite.k:535
lola: rewrite Frontend/Parser/formula_rewrite.k:499
lola: rewrite Frontend/Parser/formula_rewrite.k:433
lola: rewrite Frontend/Parser/formula_rewrite.k:355
lola: rewrite Frontend/Parser/formula_rewrite.k:421
lola: rewrite Frontend/Parser/formula_rewrite.k:527
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:352
lola: rewrite Frontend/Parser/formula_rewrite.k:352
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:352
lola: rewrite Frontend/Parser/formula_rewrite.k:376
lola: rewrite Frontend/Parser/formula_rewrite.k:436
lola: rewrite Frontend/Parser/formula_rewrite.k:355
lola: rewrite Frontend/Parser/formula_rewrite.k:352
lola: rewrite Frontend/Parser/formula_rewrite.k:376
lola: rewrite Frontend/Parser/formula_rewrite.k:521
lola: rewrite Frontend/Parser/formula_rewrite.k:544
lola: Created skeleton in 3.000000 secs.
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DLCshifumi-PT-4b-00: CONJ 0 0 0 0 1 0 0 0
DLCshifumi-PT-4b-01: LTL 0 0 0 0 0 0 0 0
DLCshifumi-PT-4b-02: LTL 0 0 0 0 0 0 0 0
DLCshifumi-PT-4b-03: LTL 0 0 0 0 0 0 0 0
DLCshifumi-PT-4b-04: LTL 0 0 0 0 0 0 0 0
DLCshifumi-PT-4b-05: LTL 0 0 0 0 0 0 0 0
DLCshifumi-PT-4b-06: LTL 0 0 0 0 0 0 0 0
DLCshifumi-PT-4b-07: CONJ 0 0 0 0 0 0 0 0
DLCshifumi-PT-4b-08: LTL 0 0 0 0 0 0 0 0
DLCshifumi-PT-4b-09: CONJ 0 0 0 0 0 0 0 0
DLCshifumi-PT-4b-10: LTL 0 0 0 0 0 0 0 0
DLCshifumi-PT-4b-11: LTL 0 0 0 0 0 0 0 0
DLCshifumi-PT-4b-12: F 0 0 0 0 0 0 0 0
DLCshifumi-PT-4b-13: LTL 0 0 0 0 0 0 0 0
DLCshifumi-PT-4b-14: LTL 0 0 0 0 0 0 0 0
DLCshifumi-PT-4b-15: CONJ 0 0 0 0 0 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
Time elapsed: 24 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 16
lola: Created skeleton in 3.000000 secs.
lola: Created skeleton in 4.000000 secs.
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DLCshifumi-PT-4b-00: CONJ 0 0 0 0 2 0 0 0
DLCshifumi-PT-4b-01: LTL 0 0 0 0 1 0 0 0
DLCshifumi-PT-4b-02: LTL 0 0 0 0 0 0 0 0
DLCshifumi-PT-4b-03: LTL 0 0 0 0 0 0 0 0
DLCshifumi-PT-4b-04: LTL 0 0 0 0 0 0 0 0
DLCshifumi-PT-4b-05: LTL 0 0 0 0 0 0 0 0
DLCshifumi-PT-4b-06: LTL 0 0 0 0 0 0 0 0
DLCshifumi-PT-4b-07: CONJ 0 0 0 0 0 0 0 0
DLCshifumi-PT-4b-08: LTL 0 0 0 0 0 0 0 0
DLCshifumi-PT-4b-09: CONJ 0 0 0 0 0 0 0 0
DLCshifumi-PT-4b-10: LTL 0 0 0 0 0 0 0 0
DLCshifumi-PT-4b-11: LTL 0 0 0 0 0 0 0 0
DLCshifumi-PT-4b-12: F 0 0 0 0 0 0 0 0
DLCshifumi-PT-4b-13: LTL 0 0 0 0 0 0 0 0
DLCshifumi-PT-4b-14: LTL 0 0 0 0 0 0 0 0
DLCshifumi-PT-4b-15: CONJ 0 0 0 0 0 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
Time elapsed: 29 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 16
lola: Created skeleton in 3.000000 secs.
lola: Rule S: 0 transitions removed,0 places removed
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DLCshifumi-PT-4b-00: CONJ 0 0 0 0 2 0 0 0
DLCshifumi-PT-4b-01: LTL 0 0 0 0 1 0 0 0
DLCshifumi-PT-4b-02: LTL 0 0 0 0 1 0 0 0
DLCshifumi-PT-4b-03: LTL 0 0 0 0 0 0 0 0
DLCshifumi-PT-4b-04: LTL 0 0 0 0 0 0 0 0
DLCshifumi-PT-4b-05: LTL 0 0 0 0 0 0 0 0
DLCshifumi-PT-4b-06: LTL 0 0 0 0 0 0 0 0
DLCshifumi-PT-4b-07: CONJ 0 0 0 0 0 0 0 0
DLCshifumi-PT-4b-08: LTL 0 0 0 0 0 0 0 0
DLCshifumi-PT-4b-09: CONJ 0 0 0 0 0 0 0 0
DLCshifumi-PT-4b-10: LTL 0 0 0 0 0 0 0 0
DLCshifumi-PT-4b-11: LTL 0 0 0 0 0 0 0 0
DLCshifumi-PT-4b-12: F 0 0 0 0 0 0 0 0
DLCshifumi-PT-4b-13: LTL 0 0 0 0 0 0 0 0
DLCshifumi-PT-4b-14: LTL 0 0 0 0 0 0 0 0
DLCshifumi-PT-4b-15: CONJ 0 0 0 0 0 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
Time elapsed: 34 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DLCshifumi-PT-4b-00: CONJ 0 0 0 0 2 0 0 0
DLCshifumi-PT-4b-01: LTL 0 0 0 0 1 0 0 0
DLCshifumi-PT-4b-02: LTL 0 0 0 0 1 0 0 0
DLCshifumi-PT-4b-03: LTL 0 0 0 0 0 0 0 0
DLCshifumi-PT-4b-04: LTL 0 0 0 0 0 0 0 0
DLCshifumi-PT-4b-05: LTL 0 0 0 0 0 0 0 0
DLCshifumi-PT-4b-06: LTL 0 0 0 0 0 0 0 0
DLCshifumi-PT-4b-07: CONJ 0 0 0 0 0 0 0 0
DLCshifumi-PT-4b-08: LTL 0 0 0 0 0 0 0 0
DLCshifumi-PT-4b-09: CONJ 0 0 0 0 0 0 0 0
DLCshifumi-PT-4b-10: LTL 0 0 0 0 0 0 0 0
DLCshifumi-PT-4b-11: LTL 0 0 0 0 0 0 0 0
DLCshifumi-PT-4b-12: F 0 0 0 0 0 0 0 0
DLCshifumi-PT-4b-13: LTL 0 0 0 0 0 0 0 0
DLCshifumi-PT-4b-14: LTL 0 0 0 0 0 0 0 0
DLCshifumi-PT-4b-15: CONJ 0 0 0 0 0 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
Time elapsed: 39 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DLCshifumi-PT-4b-00: CONJ 0 0 0 0 2 0 0 0
DLCshifumi-PT-4b-01: LTL 0 0 0 0 1 0 0 0
DLCshifumi-PT-4b-02: LTL 0 0 0 0 1 0 0 0
DLCshifumi-PT-4b-03: LTL 0 0 0 0 0 0 0 0
DLCshifumi-PT-4b-04: LTL 0 0 0 0 0 0 0 0
DLCshifumi-PT-4b-05: LTL 0 0 0 0 0 0 0 0
DLCshifumi-PT-4b-06: LTL 0 0 0 0 0 0 0 0
DLCshifumi-PT-4b-07: CONJ 0 0 0 0 0 0 0 0
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DLCshifumi-PT-4b-02: LTL true LTL model checker
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DLCshifumi-PT-4b-06: LTL false LTL model checker
DLCshifumi-PT-4b-07: CONJ false state space
DLCshifumi-PT-4b-08: LTL false LTL model checker
DLCshifumi-PT-4b-09: CONJ false preprocessing
DLCshifumi-PT-4b-10: LTL false LTL model checker
DLCshifumi-PT-4b-11: LTL false LTL model checker
DLCshifumi-PT-4b-12: F false state space / EG
DLCshifumi-PT-4b-14: LTL false LTL model checker
DLCshifumi-PT-4b-15: CONJ false LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DLCshifumi-PT-4b-01: LTL 0 0 1 0 1 0 0 0
DLCshifumi-PT-4b-05: LTL 0 0 0 0 1 0 1 0
DLCshifumi-PT-4b-13: LTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
12 LTL EXCL 2956/2981 17/32 DLCshifumi-PT-4b-01 1043866 m, 370 m/sec, 4029190 t fired, .
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DLCshifumi-PT-4b-00: CONJ false LTL model checker
DLCshifumi-PT-4b-02: LTL true LTL model checker
DLCshifumi-PT-4b-03: LTL false LTL model checker
DLCshifumi-PT-4b-04: LTL false LTL model checker
DLCshifumi-PT-4b-06: LTL false LTL model checker
DLCshifumi-PT-4b-07: CONJ false state space
DLCshifumi-PT-4b-08: LTL false LTL model checker
DLCshifumi-PT-4b-09: CONJ false preprocessing
DLCshifumi-PT-4b-10: LTL false LTL model checker
DLCshifumi-PT-4b-11: LTL false LTL model checker
DLCshifumi-PT-4b-12: F false state space / EG
DLCshifumi-PT-4b-14: LTL false LTL model checker
DLCshifumi-PT-4b-15: CONJ false LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DLCshifumi-PT-4b-01: LTL 0 0 1 0 1 0 0 0
DLCshifumi-PT-4b-05: LTL 0 0 0 0 1 0 1 0
DLCshifumi-PT-4b-13: LTL 0 0 0 0 1 0 1 0
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12 LTL EXCL 2961/2981 17/32 DLCshifumi-PT-4b-01 1045964 m, 419 m/sec, 4036411 t fired, .
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DLCshifumi-PT-4b-00: CONJ false LTL model checker
DLCshifumi-PT-4b-02: LTL true LTL model checker
DLCshifumi-PT-4b-03: LTL false LTL model checker
DLCshifumi-PT-4b-04: LTL false LTL model checker
DLCshifumi-PT-4b-06: LTL false LTL model checker
DLCshifumi-PT-4b-07: CONJ false state space
DLCshifumi-PT-4b-08: LTL false LTL model checker
DLCshifumi-PT-4b-09: CONJ false preprocessing
DLCshifumi-PT-4b-10: LTL false LTL model checker
DLCshifumi-PT-4b-11: LTL false LTL model checker
DLCshifumi-PT-4b-12: F false state space / EG
DLCshifumi-PT-4b-14: LTL false LTL model checker
DLCshifumi-PT-4b-15: CONJ false LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DLCshifumi-PT-4b-01: LTL 0 0 1 0 1 0 0 0
DLCshifumi-PT-4b-05: LTL 0 0 0 0 1 0 1 0
DLCshifumi-PT-4b-13: LTL 0 0 0 0 1 0 1 0
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12 LTL EXCL 2966/2981 17/32 DLCshifumi-PT-4b-01 1047933 m, 393 m/sec, 4043398 t fired, .
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DLCshifumi-PT-4b-00: CONJ false LTL model checker
DLCshifumi-PT-4b-02: LTL true LTL model checker
DLCshifumi-PT-4b-03: LTL false LTL model checker
DLCshifumi-PT-4b-04: LTL false LTL model checker
DLCshifumi-PT-4b-06: LTL false LTL model checker
DLCshifumi-PT-4b-07: CONJ false state space
DLCshifumi-PT-4b-08: LTL false LTL model checker
DLCshifumi-PT-4b-09: CONJ false preprocessing
DLCshifumi-PT-4b-10: LTL false LTL model checker
DLCshifumi-PT-4b-11: LTL false LTL model checker
DLCshifumi-PT-4b-12: F false state space / EG
DLCshifumi-PT-4b-14: LTL false LTL model checker
DLCshifumi-PT-4b-15: CONJ false LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
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12 LTL EXCL 2971/2981 17/32 DLCshifumi-PT-4b-01 1049703 m, 354 m/sec, 4049627 t fired, .
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DLCshifumi-PT-4b-00: CONJ false LTL model checker
DLCshifumi-PT-4b-02: LTL true LTL model checker
DLCshifumi-PT-4b-03: LTL false LTL model checker
DLCshifumi-PT-4b-04: LTL false LTL model checker
DLCshifumi-PT-4b-06: LTL false LTL model checker
DLCshifumi-PT-4b-07: CONJ false state space
DLCshifumi-PT-4b-08: LTL false LTL model checker
DLCshifumi-PT-4b-09: CONJ false preprocessing
DLCshifumi-PT-4b-10: LTL false LTL model checker
DLCshifumi-PT-4b-11: LTL false LTL model checker
DLCshifumi-PT-4b-12: F false state space / EG
DLCshifumi-PT-4b-14: LTL false LTL model checker
DLCshifumi-PT-4b-15: CONJ false LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
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12 LTL EXCL 2976/2981 17/32 DLCshifumi-PT-4b-01 1051572 m, 373 m/sec, 4056327 t fired, .
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DLCshifumi-PT-4b-00: CONJ false LTL model checker
DLCshifumi-PT-4b-02: LTL true LTL model checker
DLCshifumi-PT-4b-03: LTL false LTL model checker
DLCshifumi-PT-4b-04: LTL false LTL model checker
DLCshifumi-PT-4b-06: LTL false LTL model checker
DLCshifumi-PT-4b-07: CONJ false state space
DLCshifumi-PT-4b-08: LTL false LTL model checker
DLCshifumi-PT-4b-09: CONJ false preprocessing
DLCshifumi-PT-4b-10: LTL false LTL model checker
DLCshifumi-PT-4b-11: LTL false LTL model checker
DLCshifumi-PT-4b-12: F false state space / EG
DLCshifumi-PT-4b-14: LTL false LTL model checker
========== file over 1MB has been truncated ======
retrieve it from the run archives if needed
Sequence of Actions to be Executed by the VM
This is useful if one wants to reexecute the tool in the VM from the submitted image disk.
set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="DLCshifumi-PT-4b"
export BK_EXAMINATION="LTLFireability"
export BK_TOOL="lola"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"
# this is specific to your benchmark or test
export BIN_DIR="$HOME/BenchKit/bin"
# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi
# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-4028"
echo " Executing tool lola"
echo " Input is DLCshifumi-PT-4b, examination is LTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r061-tall-162038393300493"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"
tar xzf /home/mcc/BenchKit/INPUTS/DLCshifumi-PT-4b.tgz
mv DLCshifumi-PT-4b execution
cd execution
if [ "LTLFireability" = "ReachabilityDeadlock" ] || [ "LTLFireability" = "UpperBounds" ] || [ "LTLFireability" = "QuasiLiveness" ] || [ "LTLFireability" = "StableMarking" ] || [ "LTLFireability" = "Liveness" ] || [ "LTLFireability" = "OneSafe" ] || [ "LTLFireability" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh
echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "LTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "LTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "LTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property LTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "LTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '
echo "FORMULA_NAME $x"
done
elif [ "LTLFireability" = "ReachabilityDeadlock" ] || [ "LTLFireability" = "QuasiLiveness" ] || [ "LTLFireability" = "StableMarking" ] || [ "LTLFireability" = "Liveness" ] || [ "LTLFireability" = "OneSafe" ] ; then
echo "FORMULA_NAME LTLFireability"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;