fond
Model Checking Contest 2021
11th edition, Paris, France, June 23, 2021
Execution of r061-tall-162038393300484
Last Updated
Jun 28, 2021

About the Execution of LoLA for DLCshifumi-PT-4a

Execution Summary
Max Memory
Used (MB)
Time wait (ms) CPU Usage (ms) I/O Wait (ms) Computed Result Execution
Status
16240.428 410255.00 690554.00 1146.00 FFFFFTTFFT?TFFFF normal

Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/data/fkordon/mcc2021-input.r061-tall-162038393300484.qcow2', fmt=qcow2 size=4294967296 backing_file='/data/fkordon/mcc2021-input.qcow2' encryption=off cluster_size=65536 lazy_refcounts=off
Waiting for the VM to be ready (probing ssh)
.....................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................
=====================================================================
Generated by BenchKit 2-4028
Executing tool lola
Input is DLCshifumi-PT-4a, examination is LTLCardinality
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r061-tall-162038393300484
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 2.3M
-rw-r--r-- 1 mcc users 13K May 5 16:58 CTLCardinality.txt
-rw-r--r-- 1 mcc users 119K May 5 16:58 CTLCardinality.xml
-rw-r--r-- 1 mcc users 9.7K May 5 16:58 CTLFireability.txt
-rw-r--r-- 1 mcc users 84K May 5 16:58 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K May 6 14:48 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.4K May 6 14:48 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 3.6K Mar 28 15:59 LTLCardinality.txt
-rw-r--r-- 1 mcc users 27K Mar 28 15:59 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.0K Mar 28 15:59 LTLFireability.txt
-rw-r--r-- 1 mcc users 17K Mar 28 15:59 LTLFireability.xml
-rw-r--r-- 1 mcc users 3.3K Mar 23 09:17 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 16K Mar 23 09:17 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 2.5K Mar 22 16:48 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 13K Mar 22 16:48 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.6K Mar 22 09:10 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.6K Mar 22 09:10 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 May 5 16:51 equiv_col
-rw-r--r-- 1 mcc users 3 May 5 16:51 instance
-rw-r--r-- 1 mcc users 6 May 5 16:51 iscolored
-rw-r--r-- 1 mcc users 1.9M May 5 16:51 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME DLCshifumi-PT-4a-00
FORMULA_NAME DLCshifumi-PT-4a-01
FORMULA_NAME DLCshifumi-PT-4a-02
FORMULA_NAME DLCshifumi-PT-4a-03
FORMULA_NAME DLCshifumi-PT-4a-04
FORMULA_NAME DLCshifumi-PT-4a-05
FORMULA_NAME DLCshifumi-PT-4a-06
FORMULA_NAME DLCshifumi-PT-4a-07
FORMULA_NAME DLCshifumi-PT-4a-08
FORMULA_NAME DLCshifumi-PT-4a-09
FORMULA_NAME DLCshifumi-PT-4a-10
FORMULA_NAME DLCshifumi-PT-4a-11
FORMULA_NAME DLCshifumi-PT-4a-12
FORMULA_NAME DLCshifumi-PT-4a-13
FORMULA_NAME DLCshifumi-PT-4a-14
FORMULA_NAME DLCshifumi-PT-4a-15

=== Now, execution of the tool begins

BK_START 1620461504169

starting LoLA
BK_INPUT DLCshifumi-PT-4a
BK_EXAMINATION: LTLCardinality
bin directory: /home/mcc/BenchKit/bin
current directory: /home/mcc/execution
LTLCardinality

FORMULA DLCshifumi-PT-4a-03 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA DLCshifumi-PT-4a-04 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA DLCshifumi-PT-4a-06 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA DLCshifumi-PT-4a-14 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA DLCshifumi-PT-4a-12 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA DLCshifumi-PT-4a-15 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA DLCshifumi-PT-4a-08 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA DLCshifumi-PT-4a-02 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA DLCshifumi-PT-4a-11 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA DLCshifumi-PT-4a-05 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA DLCshifumi-PT-4a-09 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA DLCshifumi-PT-4a-13 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA DLCshifumi-PT-4a-07 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA DLCshifumi-PT-4a-01 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA DLCshifumi-PT-4a-00 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

BK_STOP 1620461914424

--------------------
content from stderr:

lola: MEM LIMIT 32
lola: MEM LIMIT 5
lola: NET
lola: input: PNML file (--pnmlnet)
lola: reading net from /home/mcc/execution/model.pnml
lola: reading pnml
lola: PNML file contains place/transition net
lola: finished parsing
lola: closed net file /home/mcc/execution/model.pnml
lola: Reading formula.
lola: Using XML format (--xmlformula)
lola: reading XML formula
lola: reading formula from /home/mcc/execution/LTLCardinality.xml
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:352
lola: rewrite Frontend/Parser/formula_rewrite.k:550
lola: rewrite Frontend/Parser/formula_rewrite.k:550
lola: rewrite Frontend/Parser/formula_rewrite.k:98
lola: rewrite Frontend/Parser/formula_rewrite.k:168
lola: rewrite Frontend/Parser/formula_rewrite.k:346
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:340
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:535
lola: rewrite Frontend/Parser/formula_rewrite.k:150
lola: rewrite Frontend/Parser/formula_rewrite.k:535
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:346
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:96
lola: rewrite Frontend/Parser/formula_rewrite.k:156
lola: rewrite Frontend/Parser/formula_rewrite.k:281
lola: rewrite Frontend/Parser/formula_rewrite.k:122
lola: rewrite Frontend/Parser/formula_rewrite.k:278
lola: rewrite Frontend/Parser/formula_rewrite.k:150
lola: rewrite Frontend/Parser/formula_rewrite.k:98
lola: rewrite Frontend/Parser/formula_rewrite.k:433
lola: rewrite Frontend/Parser/formula_rewrite.k:373
lola: rewrite Frontend/Parser/formula_rewrite.k:98
lola: rewrite Frontend/Parser/formula_rewrite.k:96
lola: rewrite Frontend/Parser/formula_rewrite.k:117
lola: rewrite Frontend/Parser/formula_rewrite.k:168
lola: rewrite Frontend/Parser/formula_rewrite.k:156
lola: rewrite Frontend/Parser/formula_rewrite.k:116
lola: rewrite Frontend/Parser/formula_rewrite.k:150
lola: rewrite Frontend/Parser/formula_rewrite.k:433
lola: rewrite Frontend/Parser/formula_rewrite.k:96
lola: rewrite Frontend/Parser/formula_rewrite.k:117
lola: rewrite Frontend/Parser/formula_rewrite.k:120
lola: rewrite Frontend/Parser/formula_rewrite.k:346
lola: rewrite Frontend/Parser/formula_rewrite.k:373
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:376
lola: rewrite Frontend/Parser/formula_rewrite.k:98
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:278
lola: rewrite Frontend/Parser/formula_rewrite.k:144
lola: rewrite Frontend/Parser/formula_rewrite.k:144
lola: rewrite Frontend/Parser/formula_rewrite.k:144
lola: rewrite Frontend/Parser/formula_rewrite.k:281
lola: rewrite Frontend/Parser/formula_rewrite.k:159
lola: rewrite Frontend/Parser/formula_rewrite.k:150
lola: rewrite Frontend/Parser/formula_rewrite.k:376
lola: rewrite Frontend/Parser/formula_rewrite.k:370
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:346
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:535
lola: rewrite Frontend/Parser/formula_rewrite.k:433
lola: rewrite Frontend/Parser/formula_rewrite.k:430
lola: rewrite Frontend/Parser/formula_rewrite.k:346
lola: rewrite Frontend/Parser/formula_rewrite.k:98
lola: rewrite Frontend/Parser/formula_rewrite.k:168
lola: rewrite Frontend/Parser/formula_rewrite.k:96
lola: rewrite Frontend/Parser/formula_rewrite.k:156
lola: rewrite Frontend/Parser/formula_rewrite.k:116
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:121
lola: rewrite Frontend/Parser/formula_rewrite.k:430
lola: rewrite Frontend/Parser/formula_rewrite.k:535
lola: rewrite Frontend/Parser/formula_rewrite.k:150
lola: rewrite Frontend/Parser/formula_rewrite.k:355
lola: rewrite Frontend/Parser/formula_rewrite.k:355
lola: rewrite Frontend/Parser/formula_rewrite.k:433
lola: rewrite Frontend/Parser/formula_rewrite.k:352
lola: rewrite Frontend/Parser/formula_rewrite.k:352
lola: rewrite Frontend/Parser/formula_rewrite.k:376
lola: rewrite Frontend/Parser/formula_rewrite.k:376
lola: rewrite Frontend/Parser/formula_rewrite.k:376
lola: rewrite Frontend/Parser/formula_rewrite.k:430
lola: rewrite Frontend/Parser/formula_rewrite.k:355
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:96
lola: rewrite Frontend/Parser/formula_rewrite.k:98
lola: rewrite Frontend/Parser/formula_rewrite.k:184
lola: rewrite Frontend/Parser/formula_rewrite.k:159
lola: rewrite Frontend/Parser/formula_rewrite.k:278
lola: rewrite Frontend/Parser/formula_rewrite.k:150
lola: rewrite Frontend/Parser/formula_rewrite.k:98
lola: rewrite Frontend/Parser/formula_rewrite.k:153
lola: rewrite Frontend/Parser/formula_rewrite.k:168
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:96
lola: rewrite Frontend/Parser/formula_rewrite.k:144
lola: rewrite Frontend/Parser/formula_rewrite.k:144
lola: rewrite Frontend/Parser/formula_rewrite.k:156
lola: rewrite Frontend/Parser/formula_rewrite.k:116
lola: rewrite Frontend/Parser/formula_rewrite.k:150
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: NOTDEADLOCKFREE
lola: Created skeleton in 0.000000 secs.
lola: NOTDEADLOCKFREE
lola: Created skeleton in 0.000000 secs.
lola: NOTDEADLOCKFREE
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: LAUNCH task # 74 (type SKEL/FNDP) for 40 DLCshifumi-PT-4a-08
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 75 (type SKEL/EQUN) for 40 DLCshifumi-PT-4a-08
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 76 (type SKEL/SRCH) for 40 DLCshifumi-PT-4a-08
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 77 (type SKEL/SRCH) for 40 DLCshifumi-PT-4a-08
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 77 (type SKEL/SRCH) for DLCshifumi-PT-4a-08
lola: result : unknown
lola: time used : 0.000000
lola: memory pages used : 1
lola: FINISHED task # 76 (type SKEL/SRCH) for DLCshifumi-PT-4a-08
lola: result : false
lola: markings : 7
lola: fired transitions : 14
lola: time used : 0.000000
lola: memory pages used : 1
lola: CANCELED task # 74 (type FNDP) for DLCshifumi-PT-4a-08 (obsolete)
lola: CANCELED task # 75 (type EQUN) for DLCshifumi-PT-4a-08 (obsolete)
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: FINISHED task # 74 (type SKEL/FNDP) for DLCshifumi-PT-4a-08
lola: result : unknown
lola: fired transitions : 11444
lola: tried executions : 2
lola: time used : 0.000000
lola: memory pages used : 0
lola: NOTDEADLOCKFREE
lola: LAUNCH task # 78 (type SKEL/SRCH) for 0 DLCshifumi-PT-4a-00
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: Created skeleton in 0.000000 secs.
lola: NOTDEADLOCKFREE
lola: Created skeleton in 0.000000 secs.
sara: try reading problem file /home/mcc/execution/LTLCardinality-75.sara.
sara: place or transition ordering is non-deterministic

lola: Created skeleton in 0.000000 secs.
lola: NOTDEADLOCKFREE
lola: FINISHED task # 75 (type SKEL/EQUN) for DLCshifumi-PT-4a-08
lola: result : false
lola: Created skeleton in 0.000000 secs.
lola: NOTDEADLOCKFREE
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:788
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:788
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:788
lola: LAUNCH task # 81 (type SKEL/FNDP) for 14 DLCshifumi-PT-4a-02
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 82 (type SKEL/EQUN) for 14 DLCshifumi-PT-4a-02
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 83 (type SKEL/SRCH) for 14 DLCshifumi-PT-4a-02
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:788
lola: NOTDEADLOCKFREE
lola: FINISHED task # 83 (type SKEL/SRCH) for DLCshifumi-PT-4a-02
lola: result : false
lola: markings : 2
lola: fired transitions : 1
lola: time used : 0.000000
lola: memory pages used : 1
lola: CANCELED task # 81 (type FNDP) for DLCshifumi-PT-4a-02 (obsolete)
lola: CANCELED task # 82 (type EQUN) for DLCshifumi-PT-4a-02 (obsolete)
sara: try reading problem file /home/mcc/execution/LTLCardinality-82.sara.
sara: place or transition ordering is non-deterministic

lola: FINISHED task # 82 (type SKEL/EQUN) for DLCshifumi-PT-4a-02
lola: result : false
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 1.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: LAUNCH INITIAL
lola: LAUNCH task # 17 (type CNST) for 14 DLCshifumi-PT-4a-02
lola: time limit : 0 sec
lola: memory limit: 0 pages
lola: LAUNCH INITIAL
lola: Rule S: 0 transitions removed,0 places removed
lola: LAUNCH task # 26 (type CNST) for 25 DLCshifumi-PT-4a-03
lola: time limit : 0 sec
lola: memory limit: 0 pages
lola: LAUNCH INITIAL
lola: LAUNCH task # 29 (type CNST) for 28 DLCshifumi-PT-4a-04
lola: time limit : 0 sec
lola: memory limit: 0 pages
lola: LAUNCH INITIAL
lola: NOTDEADLOCKFREE
lola: LAUNCH task # 67 (type CNST) for 66 DLCshifumi-PT-4a-14
lola: time limit : 0 sec
lola: memory limit: 0 pages
lola: LAUNCH INITIAL
lola: LAUNCH task # 70 (type CNST) for 69 DLCshifumi-PT-4a-15
lola: time limit : 0 sec
lola: memory limit: 0 pages
lola: LAUNCH INITIAL
lola: LAUNCH task # 59 (type CNST) for 56 DLCshifumi-PT-4a-12
lola: time limit : 0 sec
lola: memory limit: 0 pages
lola: FINISHED task # 17 (type CNST) for DLCshifumi-PT-4a-02
lola: result : true
lola: LAUNCH INITIAL
lola: LAUNCH task # 35 (type CNST) for 34 DLCshifumi-PT-4a-06
lola: time limit : 0 sec
lola: memory limit: 0 pages
lola: FINISHED task # 26 (type CNST) for DLCshifumi-PT-4a-03
lola: result : false
lola: FINISHED task # 29 (type CNST) for DLCshifumi-PT-4a-04
lola: result : false
lola: FINISHED task # 67 (type CNST) for DLCshifumi-PT-4a-14
lola: result : false
lola: FINISHED task # 59 (type CNST) for DLCshifumi-PT-4a-12
lola: result : false
lola: FINISHED task # 35 (type CNST) for DLCshifumi-PT-4a-06
lola: result : true
lola: FINISHED task # 70 (type CNST) for DLCshifumi-PT-4a-15
lola: result : false
lola: NOTDEADLOCKFREE
lola: LAUNCH task # 85 (type SKEL/SRCH) for 40 DLCshifumi-PT-4a-08
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 85 (type SKEL/SRCH) for DLCshifumi-PT-4a-08
lola: result : false
lola: markings : 5
lola: fired transitions : 5
lola: time used : 0.000000
lola: memory pages used : 1
lola: NOTDEADLOCKFREE
lola: NOTDEADLOCKFREE
lola: Created skeleton in 0.000000 secs.
lola: NOTDEADLOCKFREE
lola: planning for (null) stopped (result already fixed).
lola: planning for (null) stopped (result already fixed).
lola: planning for (null) stopped (result already fixed).
lola: planning for (null) stopped (result already fixed).
lola: rewrite Frontend/Parser/formula_rewrite.k:735
lola: rewrite Frontend/Parser/formula_rewrite.k:695
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: LAUNCH task # 86 (type EXCL) for 14 DLCshifumi-PT-4a-02
lola: time limit : 326 sec
lola: memory limit: 32 pages
lola: FINISHED task # 86 (type EXCL) for DLCshifumi-PT-4a-02
lola: result : true
lola: markings : 1
lola: fired transitions : 1
lola: time used : 0.000000
lola: memory pages used : 1
lola: rewrite Frontend/Parser/formula_rewrite.k:749
lola: rewrite Frontend/Parser/formula_rewrite.k:788
lola: LAUNCH task # 87 (type EXCL) for 53 DLCshifumi-PT-4a-11
lola: time limit : 359 sec
lola: memory limit: 32 pages
lola: FINISHED task # 87 (type EXCL) for DLCshifumi-PT-4a-11
lola: result : false
lola: markings : 1
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 32 (type EXCL) for 31 DLCshifumi-PT-4a-05
lola: time limit : 399 sec
lola: memory limit: 32 pages
lola: FINISHED task # 32 (type EXCL) for DLCshifumi-PT-4a-05
lola: result : true
lola: markings : 900
lola: fired transitions : 32473
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 48 (type EXCL) for 47 DLCshifumi-PT-4a-09
lola: time limit : 449 sec
lola: memory limit: 32 pages
lola: FINISHED task # 48 (type EXCL) for DLCshifumi-PT-4a-09
lola: result : true
lola: markings : 1
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 5 (type EXCL) for 0 DLCshifumi-PT-4a-00
lola: time limit : 513 sec
lola: memory limit: 32 pages
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DLCshifumi-PT-4a-02: CONJ false state space /ER
DLCshifumi-PT-4a-03: INITIAL false preprocessing
DLCshifumi-PT-4a-04: INITIAL false preprocessing
DLCshifumi-PT-4a-05: LTL true LTL model checker
DLCshifumi-PT-4a-06: INITIAL true preprocessing
DLCshifumi-PT-4a-08: CONJ false skeleton: LTL model checker
DLCshifumi-PT-4a-09: LTL true LTL model checker
DLCshifumi-PT-4a-11: F true state space / EG
DLCshifumi-PT-4a-12: CONJ false preprocessing
DLCshifumi-PT-4a-14: INITIAL false preprocessing
DLCshifumi-PT-4a-15: INITIAL false preprocessing

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DLCshifumi-PT-4a-00: CONJ 0 1 2 0 1 0 0 0
DLCshifumi-PT-4a-01: CONJ 0 2 0 0 2 0 0 0
DLCshifumi-PT-4a-07: LTL 0 1 0 0 1 0 0 0
DLCshifumi-PT-4a-10: LTL 0 1 0 0 1 0 0 0
DLCshifumi-PT-4a-13: LTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
5 LTL EXCL 2/513 1/32 DLCshifumi-PT-4a-00 46036 m, 9207 m/sec, 733123 t fired, .
78 LTL SRCH 5/3596 1/5 DLCshifumi-PT-4a-00 465067 m, 93013 m/sec, 2827469 t fired, .

Time elapsed: 9 secs. Pages in use: 2
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DLCshifumi-PT-4a-02: CONJ false state space /ER
DLCshifumi-PT-4a-03: INITIAL false preprocessing
DLCshifumi-PT-4a-04: INITIAL false preprocessing
DLCshifumi-PT-4a-05: LTL true LTL model checker
DLCshifumi-PT-4a-06: INITIAL true preprocessing
DLCshifumi-PT-4a-08: CONJ false skeleton: LTL model checker
DLCshifumi-PT-4a-09: LTL true LTL model checker
DLCshifumi-PT-4a-11: F true state space / EG
DLCshifumi-PT-4a-12: CONJ false preprocessing
DLCshifumi-PT-4a-14: INITIAL false preprocessing
DLCshifumi-PT-4a-15: INITIAL false preprocessing

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DLCshifumi-PT-4a-00: CONJ 0 1 2 0 1 0 0 0
DLCshifumi-PT-4a-01: CONJ 0 2 0 0 2 0 0 0
DLCshifumi-PT-4a-07: LTL 0 1 0 0 1 0 0 0
DLCshifumi-PT-4a-10: LTL 0 1 0 0 1 0 0 0
DLCshifumi-PT-4a-13: LTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
5 LTL EXCL 7/513 2/32 DLCshifumi-PT-4a-00 185101 m, 27813 m/sec, 2952249 t fired, .
78 LTL SRCH 10/3596 1/5 DLCshifumi-PT-4a-00 1414226 m, 189831 m/sec, 8434390 t fired, .

Time elapsed: 14 secs. Pages in use: 3
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DLCshifumi-PT-4a-02: CONJ false state space /ER
DLCshifumi-PT-4a-03: INITIAL false preprocessing
DLCshifumi-PT-4a-04: INITIAL false preprocessing
DLCshifumi-PT-4a-05: LTL true LTL model checker
DLCshifumi-PT-4a-06: INITIAL true preprocessing
DLCshifumi-PT-4a-08: CONJ false skeleton: LTL model checker
DLCshifumi-PT-4a-09: LTL true LTL model checker
DLCshifumi-PT-4a-11: F true state space / EG
DLCshifumi-PT-4a-12: CONJ false preprocessing
DLCshifumi-PT-4a-14: INITIAL false preprocessing
DLCshifumi-PT-4a-15: INITIAL false preprocessing

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DLCshifumi-PT-4a-00: CONJ 0 1 2 0 1 0 0 0
DLCshifumi-PT-4a-01: CONJ 0 2 0 0 2 0 0 0
DLCshifumi-PT-4a-07: LTL 0 1 0 0 1 0 0 0
DLCshifumi-PT-4a-10: LTL 0 1 0 0 1 0 0 0
DLCshifumi-PT-4a-13: LTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
5 LTL EXCL 12/513 4/32 DLCshifumi-PT-4a-00 321054 m, 27190 m/sec, 5169433 t fired, .
78 LTL SRCH 15/3596 1/5 DLCshifumi-PT-4a-00 2256624 m, 168479 m/sec, 14296732 t fired, .

Time elapsed: 19 secs. Pages in use: 5
# running tasks: 2 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DLCshifumi-PT-4a-02: CONJ false state space /ER
DLCshifumi-PT-4a-03: INITIAL false preprocessing
DLCshifumi-PT-4a-04: INITIAL false preprocessing
DLCshifumi-PT-4a-05: LTL true LTL model checker
DLCshifumi-PT-4a-06: INITIAL true preprocessing
DLCshifumi-PT-4a-08: CONJ false skeleton: LTL model checker
DLCshifumi-PT-4a-09: LTL true LTL model checker
DLCshifumi-PT-4a-11: F true state space / EG
DLCshifumi-PT-4a-12: CONJ false preprocessing
DLCshifumi-PT-4a-14: INITIAL false preprocessing
DLCshifumi-PT-4a-15: INITIAL false preprocessing

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DLCshifumi-PT-4a-00: CONJ 0 1 2 0 1 0 0 0
DLCshifumi-PT-4a-01: CONJ 0 2 0 0 2 0 0 0
DLCshifumi-PT-4a-07: LTL 0 1 0 0 1 0 0 0
DLCshifumi-PT-4a-10: LTL 0 1 0 0 1 0 0 0
DLCshifumi-PT-4a-13: LTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
5 LTL EXCL 17/513 5/32 DLCshifumi-PT-4a-00 454651 m, 26719 m/sec, 7354040 t fired, .
78 LTL SRCH 20/3596 1/5 DLCshifumi-PT-4a-00 3098158 m, 168306 m/sec, 19918160 t fired, .

Time elapsed: 24 secs. Pages in use: 6
# running tasks: 2 of 4 Visible: 16
lola: FINISHED task # 78 (type SKEL/SRCH) for DLCshifumi-PT-4a-00
lola: result : false
lola: markings : 3533835
lola: fired transitions : 23306254
lola: time used : 23.000000
lola: memory pages used : 1
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DLCshifumi-PT-4a-02: CONJ false state space /ER
DLCshifumi-PT-4a-03: INITIAL false preprocessing
DLCshifumi-PT-4a-04: INITIAL false preprocessing
DLCshifumi-PT-4a-05: LTL true LTL model checker
DLCshifumi-PT-4a-06: INITIAL true preprocessing
DLCshifumi-PT-4a-08: CONJ false skeleton: LTL model checker
DLCshifumi-PT-4a-09: LTL true LTL model checker
DLCshifumi-PT-4a-11: F true state space / EG
DLCshifumi-PT-4a-12: CONJ false preprocessing
DLCshifumi-PT-4a-14: INITIAL false preprocessing
DLCshifumi-PT-4a-15: INITIAL false preprocessing

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DLCshifumi-PT-4a-00: CONJ 0 1 1 0 2 0 0 0
DLCshifumi-PT-4a-01: CONJ 0 2 0 0 2 0 0 0
DLCshifumi-PT-4a-07: LTL 0 1 0 0 1 0 0 0
DLCshifumi-PT-4a-10: LTL 0 1 0 0 1 0 0 0
DLCshifumi-PT-4a-13: LTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
5 LTL EXCL 22/513 6/32 DLCshifumi-PT-4a-00 589876 m, 27045 m/sec, 9536985 t fired, .

Time elapsed: 29 secs. Pages in use: 7
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DLCshifumi-PT-4a-02: CONJ false state space /ER
DLCshifumi-PT-4a-03: INITIAL false preprocessing
DLCshifumi-PT-4a-04: INITIAL false preprocessing
DLCshifumi-PT-4a-05: LTL true LTL model checker
DLCshifumi-PT-4a-06: INITIAL true preprocessing
DLCshifumi-PT-4a-08: CONJ false skeleton: LTL model checker
DLCshifumi-PT-4a-09: LTL true LTL model checker
DLCshifumi-PT-4a-11: F true state space / EG
DLCshifumi-PT-4a-12: CONJ false preprocessing
DLCshifumi-PT-4a-14: INITIAL false preprocessing
DLCshifumi-PT-4a-15: INITIAL false preprocessing

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DLCshifumi-PT-4a-00: CONJ 0 1 1 0 2 0 0 0
DLCshifumi-PT-4a-01: CONJ 0 2 0 0 2 0 0 0
DLCshifumi-PT-4a-07: LTL 0 1 0 0 1 0 0 0
DLCshifumi-PT-4a-10: LTL 0 1 0 0 1 0 0 0
DLCshifumi-PT-4a-13: LTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
5 LTL EXCL 27/513 8/32 DLCshifumi-PT-4a-00 724335 m, 26891 m/sec, 11748322 t fired, .

Time elapsed: 34 secs. Pages in use: 8
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DLCshifumi-PT-4a-02: CONJ false state space /ER
DLCshifumi-PT-4a-03: INITIAL false preprocessing
DLCshifumi-PT-4a-04: INITIAL false preprocessing
DLCshifumi-PT-4a-05: LTL true LTL model checker
DLCshifumi-PT-4a-06: INITIAL true preprocessing
DLCshifumi-PT-4a-08: CONJ false skeleton: LTL model checker
DLCshifumi-PT-4a-09: LTL true LTL model checker
DLCshifumi-PT-4a-11: F true state space / EG
DLCshifumi-PT-4a-12: CONJ false preprocessing
DLCshifumi-PT-4a-14: INITIAL false preprocessing
DLCshifumi-PT-4a-15: INITIAL false preprocessing

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DLCshifumi-PT-4a-00: CONJ 0 1 1 0 2 0 0 0
DLCshifumi-PT-4a-01: CONJ 0 2 0 0 2 0 0 0
DLCshifumi-PT-4a-07: LTL 0 1 0 0 1 0 0 0
DLCshifumi-PT-4a-10: LTL 0 1 0 0 1 0 0 0
DLCshifumi-PT-4a-13: LTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
5 LTL EXCL 32/513 9/32 DLCshifumi-PT-4a-00 859863 m, 27105 m/sec, 13960643 t fired, .

Time elapsed: 39 secs. Pages in use: 9
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DLCshifumi-PT-4a-02: CONJ false state space /ER
DLCshifumi-PT-4a-03: INITIAL false preprocessing
DLCshifumi-PT-4a-04: INITIAL false preprocessing
DLCshifumi-PT-4a-05: LTL true LTL model checker
DLCshifumi-PT-4a-06: INITIAL true preprocessing
DLCshifumi-PT-4a-08: CONJ false skeleton: LTL model checker
DLCshifumi-PT-4a-09: LTL true LTL model checker
DLCshifumi-PT-4a-11: F true state space / EG
DLCshifumi-PT-4a-12: CONJ false preprocessing
DLCshifumi-PT-4a-14: INITIAL false preprocessing
DLCshifumi-PT-4a-15: INITIAL false preprocessing

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DLCshifumi-PT-4a-00: CONJ 0 1 1 0 2 0 0 0
DLCshifumi-PT-4a-01: CONJ 0 2 0 0 2 0 0 0
DLCshifumi-PT-4a-07: LTL 0 1 0 0 1 0 0 0
DLCshifumi-PT-4a-10: LTL 0 1 0 0 1 0 0 0
DLCshifumi-PT-4a-13: LTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
5 LTL EXCL 37/513 10/32 DLCshifumi-PT-4a-00 995714 m, 27170 m/sec, 16159926 t fired, .

Time elapsed: 44 secs. Pages in use: 10
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DLCshifumi-PT-4a-02: CONJ false state space /ER
DLCshifumi-PT-4a-03: INITIAL false preprocessing
DLCshifumi-PT-4a-04: INITIAL false preprocessing
DLCshifumi-PT-4a-05: LTL true LTL model checker
DLCshifumi-PT-4a-06: INITIAL true preprocessing
DLCshifumi-PT-4a-08: CONJ false skeleton: LTL model checker
DLCshifumi-PT-4a-09: LTL true LTL model checker
DLCshifumi-PT-4a-11: F true state space / EG
DLCshifumi-PT-4a-12: CONJ false preprocessing
DLCshifumi-PT-4a-14: INITIAL false preprocessing
DLCshifumi-PT-4a-15: INITIAL false preprocessing

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DLCshifumi-PT-4a-00: CONJ 0 1 1 0 2 0 0 0
DLCshifumi-PT-4a-01: CONJ 0 2 0 0 2 0 0 0
DLCshifumi-PT-4a-07: LTL 0 1 0 0 1 0 0 0
DLCshifumi-PT-4a-10: LTL 0 1 0 0 1 0 0 0
DLCshifumi-PT-4a-13: LTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
5 LTL EXCL 42/513 12/32 DLCshifumi-PT-4a-00 1128590 m, 26575 m/sec, 18355758 t fired, .

Time elapsed: 49 secs. Pages in use: 12
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DLCshifumi-PT-4a-02: CONJ false state space /ER
DLCshifumi-PT-4a-03: INITIAL false preprocessing
DLCshifumi-PT-4a-04: INITIAL false preprocessing
DLCshifumi-PT-4a-05: LTL true LTL model checker
DLCshifumi-PT-4a-06: INITIAL true preprocessing
DLCshifumi-PT-4a-08: CONJ false skeleton: LTL model checker
DLCshifumi-PT-4a-09: LTL true LTL model checker
DLCshifumi-PT-4a-11: F true state space / EG
DLCshifumi-PT-4a-12: CONJ false preprocessing
DLCshifumi-PT-4a-14: INITIAL false preprocessing
DLCshifumi-PT-4a-15: INITIAL false preprocessing

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DLCshifumi-PT-4a-00: CONJ 0 1 1 0 2 0 0 0
DLCshifumi-PT-4a-01: CONJ 0 2 0 0 2 0 0 0
DLCshifumi-PT-4a-07: LTL 0 1 0 0 1 0 0 0
DLCshifumi-PT-4a-10: LTL 0 1 0 0 1 0 0 0
DLCshifumi-PT-4a-13: LTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
5 LTL EXCL 47/513 13/32 DLCshifumi-PT-4a-00 1262794 m, 26840 m/sec, 20536841 t fired, .

Time elapsed: 54 secs. Pages in use: 13
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DLCshifumi-PT-4a-02: CONJ false state space /ER
DLCshifumi-PT-4a-03: INITIAL false preprocessing
DLCshifumi-PT-4a-04: INITIAL false preprocessing
DLCshifumi-PT-4a-05: LTL true LTL model checker
DLCshifumi-PT-4a-06: INITIAL true preprocessing
DLCshifumi-PT-4a-08: CONJ false skeleton: LTL model checker
DLCshifumi-PT-4a-09: LTL true LTL model checker
DLCshifumi-PT-4a-11: F true state space / EG
DLCshifumi-PT-4a-12: CONJ false preprocessing
DLCshifumi-PT-4a-14: INITIAL false preprocessing
DLCshifumi-PT-4a-15: INITIAL false preprocessing

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DLCshifumi-PT-4a-00: CONJ 0 1 1 0 2 0 0 0
DLCshifumi-PT-4a-01: CONJ 0 2 0 0 2 0 0 0
DLCshifumi-PT-4a-07: LTL 0 1 0 0 1 0 0 0
DLCshifumi-PT-4a-10: LTL 0 1 0 0 1 0 0 0
DLCshifumi-PT-4a-13: LTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
5 LTL EXCL 52/513 14/32 DLCshifumi-PT-4a-00 1396076 m, 26656 m/sec, 22702347 t fired, .

Time elapsed: 59 secs. Pages in use: 14
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DLCshifumi-PT-4a-02: CONJ false state space /ER
DLCshifumi-PT-4a-03: INITIAL false preprocessing
DLCshifumi-PT-4a-04: INITIAL false preprocessing
DLCshifumi-PT-4a-05: LTL true LTL model checker
DLCshifumi-PT-4a-06: INITIAL true preprocessing
DLCshifumi-PT-4a-08: CONJ false skeleton: LTL model checker
DLCshifumi-PT-4a-09: LTL true LTL model checker
DLCshifumi-PT-4a-11: F true state space / EG
DLCshifumi-PT-4a-12: CONJ false preprocessing
DLCshifumi-PT-4a-14: INITIAL false preprocessing
DLCshifumi-PT-4a-15: INITIAL false preprocessing

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DLCshifumi-PT-4a-00: CONJ 0 1 1 0 2 0 0 0
DLCshifumi-PT-4a-01: CONJ 0 2 0 0 2 0 0 0
DLCshifumi-PT-4a-07: LTL 0 1 0 0 1 0 0 0
DLCshifumi-PT-4a-10: LTL 0 1 0 0 1 0 0 0
DLCshifumi-PT-4a-13: LTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
5 LTL EXCL 57/513 15/32 DLCshifumi-PT-4a-00 1527228 m, 26230 m/sec, 24873173 t fired, .

Time elapsed: 64 secs. Pages in use: 15
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DLCshifumi-PT-4a-02: CONJ false state space /ER
DLCshifumi-PT-4a-03: INITIAL false preprocessing
DLCshifumi-PT-4a-04: INITIAL false preprocessing
DLCshifumi-PT-4a-05: LTL true LTL model checker
DLCshifumi-PT-4a-06: INITIAL true preprocessing
DLCshifumi-PT-4a-08: CONJ false skeleton: LTL model checker
DLCshifumi-PT-4a-09: LTL true LTL model checker
DLCshifumi-PT-4a-11: F true state space / EG
DLCshifumi-PT-4a-12: CONJ false preprocessing
DLCshifumi-PT-4a-14: INITIAL false preprocessing
DLCshifumi-PT-4a-15: INITIAL false preprocessing

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DLCshifumi-PT-4a-00: CONJ 0 1 1 0 2 0 0 0
DLCshifumi-PT-4a-01: CONJ 0 2 0 0 2 0 0 0
DLCshifumi-PT-4a-07: LTL 0 1 0 0 1 0 0 0
DLCshifumi-PT-4a-10: LTL 0 1 0 0 1 0 0 0
DLCshifumi-PT-4a-13: LTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
5 LTL EXCL 62/513 17/32 DLCshifumi-PT-4a-00 1661613 m, 26877 m/sec, 27039799 t fired, .

Time elapsed: 69 secs. Pages in use: 17
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DLCshifumi-PT-4a-02: CONJ false state space /ER
DLCshifumi-PT-4a-03: INITIAL false preprocessing
DLCshifumi-PT-4a-04: INITIAL false preprocessing
DLCshifumi-PT-4a-05: LTL true LTL model checker
DLCshifumi-PT-4a-06: INITIAL true preprocessing
DLCshifumi-PT-4a-08: CONJ false skeleton: LTL model checker
DLCshifumi-PT-4a-09: LTL true LTL model checker
DLCshifumi-PT-4a-11: F true state space / EG
DLCshifumi-PT-4a-12: CONJ false preprocessing
DLCshifumi-PT-4a-14: INITIAL false preprocessing
DLCshifumi-PT-4a-15: INITIAL false preprocessing

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DLCshifumi-PT-4a-00: CONJ 0 1 1 0 2 0 0 0
DLCshifumi-PT-4a-01: CONJ 0 2 0 0 2 0 0 0
DLCshifumi-PT-4a-07: LTL 0 1 0 0 1 0 0 0
DLCshifumi-PT-4a-10: LTL 0 1 0 0 1 0 0 0
DLCshifumi-PT-4a-13: LTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
5 LTL EXCL 67/513 18/32 DLCshifumi-PT-4a-00 1793528 m, 26383 m/sec, 29206459 t fired, .

Time elapsed: 74 secs. Pages in use: 18
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DLCshifumi-PT-4a-02: CONJ false state space /ER
DLCshifumi-PT-4a-03: INITIAL false preprocessing
DLCshifumi-PT-4a-04: INITIAL false preprocessing
DLCshifumi-PT-4a-05: LTL true LTL model checker
DLCshifumi-PT-4a-06: INITIAL true preprocessing
DLCshifumi-PT-4a-08: CONJ false skeleton: LTL model checker
DLCshifumi-PT-4a-09: LTL true LTL model checker
DLCshifumi-PT-4a-11: F true state space / EG
DLCshifumi-PT-4a-12: CONJ false preprocessing
DLCshifumi-PT-4a-14: INITIAL false preprocessing
DLCshifumi-PT-4a-15: INITIAL false preprocessing

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DLCshifumi-PT-4a-00: CONJ 0 1 1 0 2 0 0 0
DLCshifumi-PT-4a-01: CONJ 0 2 0 0 2 0 0 0
DLCshifumi-PT-4a-07: LTL 0 1 0 0 1 0 0 0
DLCshifumi-PT-4a-10: LTL 0 1 0 0 1 0 0 0
DLCshifumi-PT-4a-13: LTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
5 LTL EXCL 72/513 19/32 DLCshifumi-PT-4a-00 1925032 m, 26300 m/sec, 31384435 t fired, .

Time elapsed: 79 secs. Pages in use: 19
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DLCshifumi-PT-4a-02: CONJ false state space /ER
DLCshifumi-PT-4a-03: INITIAL false preprocessing
DLCshifumi-PT-4a-04: INITIAL false preprocessing
DLCshifumi-PT-4a-05: LTL true LTL model checker
DLCshifumi-PT-4a-06: INITIAL true preprocessing
DLCshifumi-PT-4a-08: CONJ false skeleton: LTL model checker
DLCshifumi-PT-4a-09: LTL true LTL model checker
DLCshifumi-PT-4a-11: F true state space / EG
DLCshifumi-PT-4a-12: CONJ false preprocessing
DLCshifumi-PT-4a-14: INITIAL false preprocessing
DLCshifumi-PT-4a-15: INITIAL false preprocessing

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DLCshifumi-PT-4a-00: CONJ 0 1 1 0 2 0 0 0
DLCshifumi-PT-4a-01: CONJ 0 2 0 0 2 0 0 0
DLCshifumi-PT-4a-07: LTL 0 1 0 0 1 0 0 0
DLCshifumi-PT-4a-10: LTL 0 1 0 0 1 0 0 0
DLCshifumi-PT-4a-13: LTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
5 LTL EXCL 77/513 21/32 DLCshifumi-PT-4a-00 2057078 m, 26409 m/sec, 33561311 t fired, .

Time elapsed: 84 secs. Pages in use: 21
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DLCshifumi-PT-4a-02: CONJ false state space /ER
DLCshifumi-PT-4a-03: INITIAL false preprocessing
DLCshifumi-PT-4a-04: INITIAL false preprocessing
DLCshifumi-PT-4a-05: LTL true LTL model checker
DLCshifumi-PT-4a-06: INITIAL true preprocessing
DLCshifumi-PT-4a-08: CONJ false skeleton: LTL model checker
DLCshifumi-PT-4a-09: LTL true LTL model checker
DLCshifumi-PT-4a-11: F true state space / EG
DLCshifumi-PT-4a-12: CONJ false preprocessing
DLCshifumi-PT-4a-14: INITIAL false preprocessing
DLCshifumi-PT-4a-15: INITIAL false preprocessing

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DLCshifumi-PT-4a-00: CONJ 0 1 1 0 2 0 0 0
DLCshifumi-PT-4a-01: CONJ 0 2 0 0 2 0 0 0
DLCshifumi-PT-4a-07: LTL 0 1 0 0 1 0 0 0
DLCshifumi-PT-4a-10: LTL 0 1 0 0 1 0 0 0
DLCshifumi-PT-4a-13: LTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
5 LTL EXCL 82/513 22/32 DLCshifumi-PT-4a-00 2185464 m, 25677 m/sec, 35743145 t fired, .

Time elapsed: 89 secs. Pages in use: 22
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DLCshifumi-PT-4a-02: CONJ false state space /ER
DLCshifumi-PT-4a-03: INITIAL false preprocessing
DLCshifumi-PT-4a-04: INITIAL false preprocessing
DLCshifumi-PT-4a-05: LTL true LTL model checker
DLCshifumi-PT-4a-06: INITIAL true preprocessing
DLCshifumi-PT-4a-08: CONJ false skeleton: LTL model checker
DLCshifumi-PT-4a-09: LTL true LTL model checker
DLCshifumi-PT-4a-11: F true state space / EG
DLCshifumi-PT-4a-12: CONJ false preprocessing
DLCshifumi-PT-4a-14: INITIAL false preprocessing
DLCshifumi-PT-4a-15: INITIAL false preprocessing

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DLCshifumi-PT-4a-00: CONJ 0 1 1 0 2 0 0 0
DLCshifumi-PT-4a-01: CONJ 0 2 0 0 2 0 0 0
DLCshifumi-PT-4a-07: LTL 0 1 0 0 1 0 0 0
DLCshifumi-PT-4a-10: LTL 0 1 0 0 1 0 0 0
DLCshifumi-PT-4a-13: LTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
5 LTL EXCL 87/513 23/32 DLCshifumi-PT-4a-00 2315240 m, 25955 m/sec, 37898175 t fired, .

Time elapsed: 94 secs. Pages in use: 23
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DLCshifumi-PT-4a-02: CONJ false state space /ER
DLCshifumi-PT-4a-03: INITIAL false preprocessing
DLCshifumi-PT-4a-04: INITIAL false preprocessing
DLCshifumi-PT-4a-05: LTL true LTL model checker
DLCshifumi-PT-4a-06: INITIAL true preprocessing
DLCshifumi-PT-4a-08: CONJ false skeleton: LTL model checker
DLCshifumi-PT-4a-09: LTL true LTL model checker
DLCshifumi-PT-4a-11: F true state space / EG
DLCshifumi-PT-4a-12: CONJ false preprocessing
DLCshifumi-PT-4a-14: INITIAL false preprocessing
DLCshifumi-PT-4a-15: INITIAL false preprocessing

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DLCshifumi-PT-4a-00: CONJ 0 1 1 0 2 0 0 0
DLCshifumi-PT-4a-01: CONJ 0 2 0 0 2 0 0 0
DLCshifumi-PT-4a-07: LTL 0 1 0 0 1 0 0 0
DLCshifumi-PT-4a-10: LTL 0 1 0 0 1 0 0 0
DLCshifumi-PT-4a-13: LTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
5 LTL EXCL 92/513 24/32 DLCshifumi-PT-4a-00 2441257 m, 25203 m/sec, 40057419 t fired, .

Time elapsed: 99 secs. Pages in use: 24
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DLCshifumi-PT-4a-02: CONJ false state space /ER
DLCshifumi-PT-4a-03: INITIAL false preprocessing
DLCshifumi-PT-4a-04: INITIAL false preprocessing
DLCshifumi-PT-4a-05: LTL true LTL model checker
DLCshifumi-PT-4a-06: INITIAL true preprocessing
DLCshifumi-PT-4a-08: CONJ false skeleton: LTL model checker
DLCshifumi-PT-4a-09: LTL true LTL model checker
DLCshifumi-PT-4a-11: F true state space / EG
DLCshifumi-PT-4a-12: CONJ false preprocessing
DLCshifumi-PT-4a-14: INITIAL false preprocessing
DLCshifumi-PT-4a-15: INITIAL false preprocessing

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DLCshifumi-PT-4a-00: CONJ 0 1 1 0 2 0 0 0
DLCshifumi-PT-4a-01: CONJ 0 2 0 0 2 0 0 0
DLCshifumi-PT-4a-07: LTL 0 1 0 0 1 0 0 0
DLCshifumi-PT-4a-10: LTL 0 1 0 0 1 0 0 0
DLCshifumi-PT-4a-13: LTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
5 LTL EXCL 97/513 26/32 DLCshifumi-PT-4a-00 2566402 m, 25029 m/sec, 42216169 t fired, .

Time elapsed: 104 secs. Pages in use: 26
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DLCshifumi-PT-4a-02: CONJ false state space /ER
DLCshifumi-PT-4a-03: INITIAL false preprocessing
DLCshifumi-PT-4a-04: INITIAL false preprocessing
DLCshifumi-PT-4a-05: LTL true LTL model checker
DLCshifumi-PT-4a-06: INITIAL true preprocessing
DLCshifumi-PT-4a-08: CONJ false skeleton: LTL model checker
DLCshifumi-PT-4a-09: LTL true LTL model checker
DLCshifumi-PT-4a-11: F true state space / EG
DLCshifumi-PT-4a-12: CONJ false preprocessing
DLCshifumi-PT-4a-14: INITIAL false preprocessing
DLCshifumi-PT-4a-15: INITIAL false preprocessing

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DLCshifumi-PT-4a-00: CONJ 0 1 1 0 2 0 0 0
DLCshifumi-PT-4a-01: CONJ 0 2 0 0 2 0 0 0
DLCshifumi-PT-4a-07: LTL 0 1 0 0 1 0 0 0
DLCshifumi-PT-4a-10: LTL 0 1 0 0 1 0 0 0
DLCshifumi-PT-4a-13: LTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
5 LTL EXCL 102/513 27/32 DLCshifumi-PT-4a-00 2698998 m, 26519 m/sec, 44374431 t fired, .

Time elapsed: 109 secs. Pages in use: 27
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DLCshifumi-PT-4a-02: CONJ false state space /ER
DLCshifumi-PT-4a-03: INITIAL false preprocessing
DLCshifumi-PT-4a-04: INITIAL false preprocessing
DLCshifumi-PT-4a-05: LTL true LTL model checker
DLCshifumi-PT-4a-06: INITIAL true preprocessing
DLCshifumi-PT-4a-08: CONJ false skeleton: LTL model checker
DLCshifumi-PT-4a-09: LTL true LTL model checker
DLCshifumi-PT-4a-11: F true state space / EG
DLCshifumi-PT-4a-12: CONJ false preprocessing
DLCshifumi-PT-4a-14: INITIAL false preprocessing
DLCshifumi-PT-4a-15: INITIAL false preprocessing

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DLCshifumi-PT-4a-00: CONJ 0 1 1 0 2 0 0 0
DLCshifumi-PT-4a-01: CONJ 0 2 0 0 2 0 0 0
DLCshifumi-PT-4a-07: LTL 0 1 0 0 1 0 0 0
DLCshifumi-PT-4a-10: LTL 0 1 0 0 1 0 0 0
DLCshifumi-PT-4a-13: LTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
5 LTL EXCL 107/513 28/32 DLCshifumi-PT-4a-00 2827829 m, 25766 m/sec, 46536085 t fired, .

Time elapsed: 114 secs. Pages in use: 28
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DLCshifumi-PT-4a-02: CONJ false state space /ER
DLCshifumi-PT-4a-03: INITIAL false preprocessing
DLCshifumi-PT-4a-04: INITIAL false preprocessing
DLCshifumi-PT-4a-05: LTL true LTL model checker
DLCshifumi-PT-4a-06: INITIAL true preprocessing
DLCshifumi-PT-4a-08: CONJ false skeleton: LTL model checker
DLCshifumi-PT-4a-09: LTL true LTL model checker
DLCshifumi-PT-4a-11: F true state space / EG
DLCshifumi-PT-4a-12: CONJ false preprocessing
DLCshifumi-PT-4a-14: INITIAL false preprocessing
DLCshifumi-PT-4a-15: INITIAL false preprocessing

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DLCshifumi-PT-4a-00: CONJ 0 1 1 0 2 0 0 0
DLCshifumi-PT-4a-01: CONJ 0 2 0 0 2 0 0 0
DLCshifumi-PT-4a-07: LTL 0 1 0 0 1 0 0 0
DLCshifumi-PT-4a-10: LTL 0 1 0 0 1 0 0 0
DLCshifumi-PT-4a-13: LTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
5 LTL EXCL 112/513 29/32 DLCshifumi-PT-4a-00 2957557 m, 25945 m/sec, 48681794 t fired, .

Time elapsed: 119 secs. Pages in use: 29
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DLCshifumi-PT-4a-02: CONJ false state space /ER
DLCshifumi-PT-4a-03: INITIAL false preprocessing
DLCshifumi-PT-4a-04: INITIAL false preprocessing
DLCshifumi-PT-4a-05: LTL true LTL model checker
DLCshifumi-PT-4a-06: INITIAL true preprocessing
DLCshifumi-PT-4a-08: CONJ false skeleton: LTL model checker
DLCshifumi-PT-4a-09: LTL true LTL model checker
DLCshifumi-PT-4a-11: F true state space / EG
DLCshifumi-PT-4a-12: CONJ false preprocessing
DLCshifumi-PT-4a-14: INITIAL false preprocessing
DLCshifumi-PT-4a-15: INITIAL false preprocessing

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DLCshifumi-PT-4a-00: CONJ 0 1 1 0 2 0 0 0
DLCshifumi-PT-4a-01: CONJ 0 2 0 0 2 0 0 0
DLCshifumi-PT-4a-07: LTL 0 1 0 0 1 0 0 0
DLCshifumi-PT-4a-10: LTL 0 1 0 0 1 0 0 0
DLCshifumi-PT-4a-13: LTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
5 LTL EXCL 117/513 31/32 DLCshifumi-PT-4a-00 3084359 m, 25360 m/sec, 50834576 t fired, .

Time elapsed: 124 secs. Pages in use: 31
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DLCshifumi-PT-4a-02: CONJ false state space /ER
DLCshifumi-PT-4a-03: INITIAL false preprocessing
DLCshifumi-PT-4a-04: INITIAL false preprocessing
DLCshifumi-PT-4a-05: LTL true LTL model checker
DLCshifumi-PT-4a-06: INITIAL true preprocessing
DLCshifumi-PT-4a-08: CONJ false skeleton: LTL model checker
DLCshifumi-PT-4a-09: LTL true LTL model checker
DLCshifumi-PT-4a-11: F true state space / EG
DLCshifumi-PT-4a-12: CONJ false preprocessing
DLCshifumi-PT-4a-14: INITIAL false preprocessing
DLCshifumi-PT-4a-15: INITIAL false preprocessing

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DLCshifumi-PT-4a-00: CONJ 0 1 1 0 2 0 0 0
DLCshifumi-PT-4a-01: CONJ 0 2 0 0 2 0 0 0
DLCshifumi-PT-4a-07: LTL 0 1 0 0 1 0 0 0
DLCshifumi-PT-4a-10: LTL 0 1 0 0 1 0 0 0
DLCshifumi-PT-4a-13: LTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
5 LTL EXCL 122/513 32/32 DLCshifumi-PT-4a-00 3209497 m, 25027 m/sec, 52990079 t fired, .

Time elapsed: 129 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
lola: CANCELED task # 5 (type EXCL) for DLCshifumi-PT-4a-00 (memory limit exceeded)
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DLCshifumi-PT-4a-02: CONJ false state space /ER
DLCshifumi-PT-4a-03: INITIAL false preprocessing
DLCshifumi-PT-4a-04: INITIAL false preprocessing
DLCshifumi-PT-4a-05: LTL true LTL model checker
DLCshifumi-PT-4a-06: INITIAL true preprocessing
DLCshifumi-PT-4a-08: CONJ false skeleton: LTL model checker
DLCshifumi-PT-4a-09: LTL true LTL model checker
DLCshifumi-PT-4a-11: F true state space / EG
DLCshifumi-PT-4a-12: CONJ false preprocessing
DLCshifumi-PT-4a-14: INITIAL false preprocessing
DLCshifumi-PT-4a-15: INITIAL false preprocessing

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DLCshifumi-PT-4a-00: CONJ 0 1 0 0 2 0 1 0
DLCshifumi-PT-4a-01: CONJ 0 2 0 0 2 0 0 0
DLCshifumi-PT-4a-07: LTL 0 1 0 0 1 0 0 0
DLCshifumi-PT-4a-10: LTL 0 1 0 0 1 0 0 0
DLCshifumi-PT-4a-13: LTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 134 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
lola: LAUNCH task # 64 (type EXCL) for 63 DLCshifumi-PT-4a-13
lola: time limit : 577 sec
lola: memory limit: 32 pages
lola: FINISHED task # 64 (type EXCL) for DLCshifumi-PT-4a-13
lola: result : false
lola: markings : 22
lola: fired transitions : 23
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 51 (type EXCL) for 50 DLCshifumi-PT-4a-10
lola: time limit : 693 sec
lola: memory limit: 32 pages
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DLCshifumi-PT-4a-02: CONJ false state space /ER
DLCshifumi-PT-4a-03: INITIAL false preprocessing
DLCshifumi-PT-4a-04: INITIAL false preprocessing
DLCshifumi-PT-4a-05: LTL true LTL model checker
DLCshifumi-PT-4a-06: INITIAL true preprocessing
DLCshifumi-PT-4a-08: CONJ false skeleton: LTL model checker
DLCshifumi-PT-4a-09: LTL true LTL model checker
DLCshifumi-PT-4a-11: F true state space / EG
DLCshifumi-PT-4a-12: CONJ false preprocessing
DLCshifumi-PT-4a-13: LTL false LTL model checker
DLCshifumi-PT-4a-14: INITIAL false preprocessing
DLCshifumi-PT-4a-15: INITIAL false preprocessing

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DLCshifumi-PT-4a-00: CONJ 0 1 0 0 2 0 1 0
DLCshifumi-PT-4a-01: CONJ 0 2 0 0 2 0 0 0
DLCshifumi-PT-4a-07: LTL 0 1 0 0 1 0 0 0
DLCshifumi-PT-4a-10: LTL 0 0 1 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
51 LTL EXCL 5/693 2/32 DLCshifumi-PT-4a-10 141457 m, 28291 m/sec, 2250948 t fired, .

Time elapsed: 139 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DLCshifumi-PT-4a-02: CONJ false state space /ER
DLCshifumi-PT-4a-03: INITIAL false preprocessing
DLCshifumi-PT-4a-04: INITIAL false preprocessing
DLCshifumi-PT-4a-05: LTL true LTL model checker
DLCshifumi-PT-4a-06: INITIAL true preprocessing
DLCshifumi-PT-4a-08: CONJ false skeleton: LTL model checker
DLCshifumi-PT-4a-09: LTL true LTL model checker
DLCshifumi-PT-4a-11: F true state space / EG
DLCshifumi-PT-4a-12: CONJ false preprocessing
DLCshifumi-PT-4a-13: LTL false LTL model checker
DLCshifumi-PT-4a-14: INITIAL false preprocessing
DLCshifumi-PT-4a-15: INITIAL false preprocessing

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DLCshifumi-PT-4a-00: CONJ 0 1 0 0 2 0 1 0
DLCshifumi-PT-4a-01: CONJ 0 2 0 0 2 0 0 0
DLCshifumi-PT-4a-07: LTL 0 1 0 0 1 0 0 0
DLCshifumi-PT-4a-10: LTL 0 0 1 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
51 LTL EXCL 10/693 3/32 DLCshifumi-PT-4a-10 278727 m, 27454 m/sec, 4464774 t fired, .

Time elapsed: 144 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DLCshifumi-PT-4a-02: CONJ false state space /ER
DLCshifumi-PT-4a-03: INITIAL false preprocessing
DLCshifumi-PT-4a-04: INITIAL false preprocessing
DLCshifumi-PT-4a-05: LTL true LTL model checker
DLCshifumi-PT-4a-06: INITIAL true preprocessing
DLCshifumi-PT-4a-08: CONJ false skeleton: LTL model checker
DLCshifumi-PT-4a-09: LTL true LTL model checker
DLCshifumi-PT-4a-11: F true state space / EG
DLCshifumi-PT-4a-12: CONJ false preprocessing
DLCshifumi-PT-4a-13: LTL false LTL model checker
DLCshifumi-PT-4a-14: INITIAL false preprocessing
DLCshifumi-PT-4a-15: INITIAL false preprocessing

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DLCshifumi-PT-4a-00: CONJ 0 1 0 0 2 0 1 0
DLCshifumi-PT-4a-01: CONJ 0 2 0 0 2 0 0 0
DLCshifumi-PT-4a-07: LTL 0 1 0 0 1 0 0 0
DLCshifumi-PT-4a-10: LTL 0 0 1 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
51 LTL EXCL 15/693 5/32 DLCshifumi-PT-4a-10 411979 m, 26650 m/sec, 6669709 t fired, .

Time elapsed: 149 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DLCshifumi-PT-4a-02: CONJ false state space /ER
DLCshifumi-PT-4a-03: INITIAL false preprocessing
DLCshifumi-PT-4a-04: INITIAL false preprocessing
DLCshifumi-PT-4a-05: LTL true LTL model checker
DLCshifumi-PT-4a-06: INITIAL true preprocessing
DLCshifumi-PT-4a-08: CONJ false skeleton: LTL model checker
DLCshifumi-PT-4a-09: LTL true LTL model checker
DLCshifumi-PT-4a-11: F true state space / EG
DLCshifumi-PT-4a-12: CONJ false preprocessing
DLCshifumi-PT-4a-13: LTL false LTL model checker
DLCshifumi-PT-4a-14: INITIAL false preprocessing
DLCshifumi-PT-4a-15: INITIAL false preprocessing

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DLCshifumi-PT-4a-00: CONJ 0 1 0 0 2 0 1 0
DLCshifumi-PT-4a-01: CONJ 0 2 0 0 2 0 0 0
DLCshifumi-PT-4a-07: LTL 0 1 0 0 1 0 0 0
DLCshifumi-PT-4a-10: LTL 0 0 1 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
51 LTL EXCL 20/693 6/32 DLCshifumi-PT-4a-10 546549 m, 26914 m/sec, 8822619 t fired, .

Time elapsed: 154 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DLCshifumi-PT-4a-02: CONJ false state space /ER
DLCshifumi-PT-4a-03: INITIAL false preprocessing
DLCshifumi-PT-4a-04: INITIAL false preprocessing
DLCshifumi-PT-4a-05: LTL true LTL model checker
DLCshifumi-PT-4a-06: INITIAL true preprocessing
DLCshifumi-PT-4a-08: CONJ false skeleton: LTL model checker
DLCshifumi-PT-4a-09: LTL true LTL model checker
DLCshifumi-PT-4a-11: F true state space / EG
DLCshifumi-PT-4a-12: CONJ false preprocessing
DLCshifumi-PT-4a-13: LTL false LTL model checker
DLCshifumi-PT-4a-14: INITIAL false preprocessing
DLCshifumi-PT-4a-15: INITIAL false preprocessing

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DLCshifumi-PT-4a-00: CONJ 0 1 0 0 2 0 1 0
DLCshifumi-PT-4a-01: CONJ 0 2 0 0 2 0 0 0
DLCshifumi-PT-4a-07: LTL 0 1 0 0 1 0 0 0
DLCshifumi-PT-4a-10: LTL 0 0 1 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
51 LTL EXCL 25/693 7/32 DLCshifumi-PT-4a-10 677256 m, 26141 m/sec, 10984534 t fired, .

Time elapsed: 159 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DLCshifumi-PT-4a-02: CONJ false state space /ER
DLCshifumi-PT-4a-03: INITIAL false preprocessing
DLCshifumi-PT-4a-04: INITIAL false preprocessing
DLCshifumi-PT-4a-05: LTL true LTL model checker
DLCshifumi-PT-4a-06: INITIAL true preprocessing
DLCshifumi-PT-4a-08: CONJ false skeleton: LTL model checker
DLCshifumi-PT-4a-09: LTL true LTL model checker
DLCshifumi-PT-4a-11: F true state space / EG
DLCshifumi-PT-4a-12: CONJ false preprocessing
DLCshifumi-PT-4a-13: LTL false LTL model checker
DLCshifumi-PT-4a-14: INITIAL false preprocessing
DLCshifumi-PT-4a-15: INITIAL false preprocessing

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DLCshifumi-PT-4a-00: CONJ 0 1 0 0 2 0 1 0
DLCshifumi-PT-4a-01: CONJ 0 2 0 0 2 0 0 0
DLCshifumi-PT-4a-07: LTL 0 1 0 0 1 0 0 0
DLCshifumi-PT-4a-10: LTL 0 0 1 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
51 LTL EXCL 30/693 8/32 DLCshifumi-PT-4a-10 808995 m, 26347 m/sec, 13148980 t fired, .

Time elapsed: 164 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DLCshifumi-PT-4a-02: CONJ false state space /ER
DLCshifumi-PT-4a-03: INITIAL false preprocessing
DLCshifumi-PT-4a-04: INITIAL false preprocessing
DLCshifumi-PT-4a-05: LTL true LTL model checker
DLCshifumi-PT-4a-06: INITIAL true preprocessing
DLCshifumi-PT-4a-08: CONJ false skeleton: LTL model checker
DLCshifumi-PT-4a-09: LTL true LTL model checker
DLCshifumi-PT-4a-11: F true state space / EG
DLCshifumi-PT-4a-12: CONJ false preprocessing
DLCshifumi-PT-4a-13: LTL false LTL model checker
DLCshifumi-PT-4a-14: INITIAL false preprocessing
DLCshifumi-PT-4a-15: INITIAL false preprocessing

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DLCshifumi-PT-4a-00: CONJ 0 1 0 0 2 0 1 0
DLCshifumi-PT-4a-01: CONJ 0 2 0 0 2 0 0 0
DLCshifumi-PT-4a-07: LTL 0 1 0 0 1 0 0 0
DLCshifumi-PT-4a-10: LTL 0 0 1 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
51 LTL EXCL 35/693 10/32 DLCshifumi-PT-4a-10 941664 m, 26533 m/sec, 15288579 t fired, .

Time elapsed: 169 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DLCshifumi-PT-4a-02: CONJ false state space /ER
DLCshifumi-PT-4a-03: INITIAL false preprocessing
DLCshifumi-PT-4a-04: INITIAL false preprocessing
DLCshifumi-PT-4a-05: LTL true LTL model checker
DLCshifumi-PT-4a-06: INITIAL true preprocessing
DLCshifumi-PT-4a-08: CONJ false skeleton: LTL model checker
DLCshifumi-PT-4a-09: LTL true LTL model checker
DLCshifumi-PT-4a-11: F true state space / EG
DLCshifumi-PT-4a-12: CONJ false preprocessing
DLCshifumi-PT-4a-13: LTL false LTL model checker
DLCshifumi-PT-4a-14: INITIAL false preprocessing
DLCshifumi-PT-4a-15: INITIAL false preprocessing

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DLCshifumi-PT-4a-00: CONJ 0 1 0 0 2 0 1 0
DLCshifumi-PT-4a-01: CONJ 0 2 0 0 2 0 0 0
DLCshifumi-PT-4a-07: LTL 0 1 0 0 1 0 0 0
DLCshifumi-PT-4a-10: LTL 0 0 1 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
51 LTL EXCL 40/693 11/32 DLCshifumi-PT-4a-10 1073740 m, 26415 m/sec, 17432459 t fired, .

Time elapsed: 174 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DLCshifumi-PT-4a-02: CONJ false state space /ER
DLCshifumi-PT-4a-03: INITIAL false preprocessing
DLCshifumi-PT-4a-04: INITIAL false preprocessing
DLCshifumi-PT-4a-05: LTL true LTL model checker
DLCshifumi-PT-4a-06: INITIAL true preprocessing
DLCshifumi-PT-4a-08: CONJ false skeleton: LTL model checker
DLCshifumi-PT-4a-09: LTL true LTL model checker
DLCshifumi-PT-4a-11: F true state space / EG
DLCshifumi-PT-4a-12: CONJ false preprocessing
DLCshifumi-PT-4a-13: LTL false LTL model checker
DLCshifumi-PT-4a-14: INITIAL false preprocessing
DLCshifumi-PT-4a-15: INITIAL false preprocessing

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DLCshifumi-PT-4a-00: CONJ 0 1 0 0 2 0 1 0
DLCshifumi-PT-4a-01: CONJ 0 2 0 0 2 0 0 0
DLCshifumi-PT-4a-07: LTL 0 1 0 0 1 0 0 0
DLCshifumi-PT-4a-10: LTL 0 0 1 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
51 LTL EXCL 45/693 12/32 DLCshifumi-PT-4a-10 1202700 m, 25792 m/sec, 19577379 t fired, .

Time elapsed: 179 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DLCshifumi-PT-4a-02: CONJ false state space /ER
DLCshifumi-PT-4a-03: INITIAL false preprocessing
DLCshifumi-PT-4a-04: INITIAL false preprocessing
DLCshifumi-PT-4a-05: LTL true LTL model checker
DLCshifumi-PT-4a-06: INITIAL true preprocessing
DLCshifumi-PT-4a-08: CONJ false skeleton: LTL model checker
DLCshifumi-PT-4a-09: LTL true LTL model checker
DLCshifumi-PT-4a-11: F true state space / EG
DLCshifumi-PT-4a-12: CONJ false preprocessing
DLCshifumi-PT-4a-13: LTL false LTL model checker
DLCshifumi-PT-4a-14: INITIAL false preprocessing
DLCshifumi-PT-4a-15: INITIAL false preprocessing

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DLCshifumi-PT-4a-00: CONJ 0 1 0 0 2 0 1 0
DLCshifumi-PT-4a-01: CONJ 0 2 0 0 2 0 0 0
DLCshifumi-PT-4a-07: LTL 0 1 0 0 1 0 0 0
DLCshifumi-PT-4a-10: LTL 0 0 1 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
51 LTL EXCL 50/693 14/32 DLCshifumi-PT-4a-10 1335111 m, 26482 m/sec, 21691574 t fired, .

Time elapsed: 184 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DLCshifumi-PT-4a-02: CONJ false state space /ER
DLCshifumi-PT-4a-03: INITIAL false preprocessing
DLCshifumi-PT-4a-04: INITIAL false preprocessing
DLCshifumi-PT-4a-05: LTL true LTL model checker
DLCshifumi-PT-4a-06: INITIAL true preprocessing
DLCshifumi-PT-4a-08: CONJ false skeleton: LTL model checker
DLCshifumi-PT-4a-09: LTL true LTL model checker
DLCshifumi-PT-4a-11: F true state space / EG
DLCshifumi-PT-4a-12: CONJ false preprocessing
DLCshifumi-PT-4a-13: LTL false LTL model checker
DLCshifumi-PT-4a-14: INITIAL false preprocessing
DLCshifumi-PT-4a-15: INITIAL false preprocessing

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DLCshifumi-PT-4a-00: CONJ 0 1 0 0 2 0 1 0
DLCshifumi-PT-4a-01: CONJ 0 2 0 0 2 0 0 0
DLCshifumi-PT-4a-07: LTL 0 1 0 0 1 0 0 0
DLCshifumi-PT-4a-10: LTL 0 0 1 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
51 LTL EXCL 55/693 15/32 DLCshifumi-PT-4a-10 1462341 m, 25446 m/sec, 23809964 t fired, .

Time elapsed: 189 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DLCshifumi-PT-4a-02: CONJ false state space /ER
DLCshifumi-PT-4a-03: INITIAL false preprocessing
DLCshifumi-PT-4a-04: INITIAL false preprocessing
DLCshifumi-PT-4a-05: LTL true LTL model checker
DLCshifumi-PT-4a-06: INITIAL true preprocessing
DLCshifumi-PT-4a-08: CONJ false skeleton: LTL model checker
DLCshifumi-PT-4a-09: LTL true LTL model checker
DLCshifumi-PT-4a-11: F true state space / EG
DLCshifumi-PT-4a-12: CONJ false preprocessing
DLCshifumi-PT-4a-13: LTL false LTL model checker
DLCshifumi-PT-4a-14: INITIAL false preprocessing
DLCshifumi-PT-4a-15: INITIAL false preprocessing

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DLCshifumi-PT-4a-00: CONJ 0 1 0 0 2 0 1 0
DLCshifumi-PT-4a-01: CONJ 0 2 0 0 2 0 0 0
DLCshifumi-PT-4a-07: LTL 0 1 0 0 1 0 0 0
DLCshifumi-PT-4a-10: LTL 0 0 1 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
51 LTL EXCL 60/693 16/32 DLCshifumi-PT-4a-10 1592103 m, 25952 m/sec, 25927660 t fired, .

Time elapsed: 194 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DLCshifumi-PT-4a-02: CONJ false state space /ER
DLCshifumi-PT-4a-03: INITIAL false preprocessing
DLCshifumi-PT-4a-04: INITIAL false preprocessing
DLCshifumi-PT-4a-05: LTL true LTL model checker
DLCshifumi-PT-4a-06: INITIAL true preprocessing
DLCshifumi-PT-4a-08: CONJ false skeleton: LTL model checker
DLCshifumi-PT-4a-09: LTL true LTL model checker
DLCshifumi-PT-4a-11: F true state space / EG
DLCshifumi-PT-4a-12: CONJ false preprocessing
DLCshifumi-PT-4a-13: LTL false LTL model checker
DLCshifumi-PT-4a-14: INITIAL false preprocessing
DLCshifumi-PT-4a-15: INITIAL false preprocessing

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DLCshifumi-PT-4a-00: CONJ 0 1 0 0 2 0 1 0
DLCshifumi-PT-4a-01: CONJ 0 2 0 0 2 0 0 0
DLCshifumi-PT-4a-07: LTL 0 1 0 0 1 0 0 0
DLCshifumi-PT-4a-10: LTL 0 0 1 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
51 LTL EXCL 65/693 17/32 DLCshifumi-PT-4a-10 1723077 m, 26194 m/sec, 28039459 t fired, .

Time elapsed: 199 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DLCshifumi-PT-4a-02: CONJ false state space /ER
DLCshifumi-PT-4a-03: INITIAL false preprocessing
DLCshifumi-PT-4a-04: INITIAL false preprocessing
DLCshifumi-PT-4a-05: LTL true LTL model checker
DLCshifumi-PT-4a-06: INITIAL true preprocessing
DLCshifumi-PT-4a-08: CONJ false skeleton: LTL model checker
DLCshifumi-PT-4a-09: LTL true LTL model checker
DLCshifumi-PT-4a-11: F true state space / EG
DLCshifumi-PT-4a-12: CONJ false preprocessing
DLCshifumi-PT-4a-13: LTL false LTL model checker
DLCshifumi-PT-4a-14: INITIAL false preprocessing
DLCshifumi-PT-4a-15: INITIAL false preprocessing

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DLCshifumi-PT-4a-00: CONJ 0 1 0 0 2 0 1 0
DLCshifumi-PT-4a-01: CONJ 0 2 0 0 2 0 0 0
DLCshifumi-PT-4a-07: LTL 0 1 0 0 1 0 0 0
DLCshifumi-PT-4a-10: LTL 0 0 1 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
51 LTL EXCL 70/693 19/32 DLCshifumi-PT-4a-10 1849660 m, 25316 m/sec, 30154111 t fired, .

Time elapsed: 204 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DLCshifumi-PT-4a-02: CONJ false state space /ER
DLCshifumi-PT-4a-03: INITIAL false preprocessing
DLCshifumi-PT-4a-04: INITIAL false preprocessing
DLCshifumi-PT-4a-05: LTL true LTL model checker
DLCshifumi-PT-4a-06: INITIAL true preprocessing
DLCshifumi-PT-4a-08: CONJ false skeleton: LTL model checker
DLCshifumi-PT-4a-09: LTL true LTL model checker
DLCshifumi-PT-4a-11: F true state space / EG
DLCshifumi-PT-4a-12: CONJ false preprocessing
DLCshifumi-PT-4a-13: LTL false LTL model checker
DLCshifumi-PT-4a-14: INITIAL false preprocessing
DLCshifumi-PT-4a-15: INITIAL false preprocessing

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DLCshifumi-PT-4a-00: CONJ 0 1 0 0 2 0 1 0
DLCshifumi-PT-4a-01: CONJ 0 2 0 0 2 0 0 0
DLCshifumi-PT-4a-07: LTL 0 1 0 0 1 0 0 0
DLCshifumi-PT-4a-10: LTL 0 0 1 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
51 LTL EXCL 75/693 20/32 DLCshifumi-PT-4a-10 1981070 m, 26282 m/sec, 32282620 t fired, .

Time elapsed: 209 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DLCshifumi-PT-4a-02: CONJ false state space /ER
DLCshifumi-PT-4a-03: INITIAL false preprocessing
DLCshifumi-PT-4a-04: INITIAL false preprocessing
DLCshifumi-PT-4a-05: LTL true LTL model checker
DLCshifumi-PT-4a-06: INITIAL true preprocessing
DLCshifumi-PT-4a-08: CONJ false skeleton: LTL model checker
DLCshifumi-PT-4a-09: LTL true LTL model checker
DLCshifumi-PT-4a-11: F true state space / EG
DLCshifumi-PT-4a-12: CONJ false preprocessing
DLCshifumi-PT-4a-13: LTL false LTL model checker
DLCshifumi-PT-4a-14: INITIAL false preprocessing
DLCshifumi-PT-4a-15: INITIAL false preprocessing

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DLCshifumi-PT-4a-00: CONJ 0 1 0 0 2 0 1 0
DLCshifumi-PT-4a-01: CONJ 0 2 0 0 2 0 0 0
DLCshifumi-PT-4a-07: LTL 0 1 0 0 1 0 0 0
DLCshifumi-PT-4a-10: LTL 0 0 1 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
51 LTL EXCL 80/693 21/32 DLCshifumi-PT-4a-10 2106852 m, 25156 m/sec, 34399839 t fired, .

Time elapsed: 214 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DLCshifumi-PT-4a-02: CONJ false state space /ER
DLCshifumi-PT-4a-03: INITIAL false preprocessing
DLCshifumi-PT-4a-04: INITIAL false preprocessing
DLCshifumi-PT-4a-05: LTL true LTL model checker
DLCshifumi-PT-4a-06: INITIAL true preprocessing
DLCshifumi-PT-4a-08: CONJ false skeleton: LTL model checker
DLCshifumi-PT-4a-09: LTL true LTL model checker
DLCshifumi-PT-4a-11: F true state space / EG
DLCshifumi-PT-4a-12: CONJ false preprocessing
DLCshifumi-PT-4a-13: LTL false LTL model checker
DLCshifumi-PT-4a-14: INITIAL false preprocessing
DLCshifumi-PT-4a-15: INITIAL false preprocessing

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DLCshifumi-PT-4a-00: CONJ 0 1 0 0 2 0 1 0
DLCshifumi-PT-4a-01: CONJ 0 2 0 0 2 0 0 0
DLCshifumi-PT-4a-07: LTL 0 1 0 0 1 0 0 0
DLCshifumi-PT-4a-10: LTL 0 0 1 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
51 LTL EXCL 85/693 22/32 DLCshifumi-PT-4a-10 2232233 m, 25076 m/sec, 36525853 t fired, .

Time elapsed: 219 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DLCshifumi-PT-4a-02: CONJ false state space /ER
DLCshifumi-PT-4a-03: INITIAL false preprocessing
DLCshifumi-PT-4a-04: INITIAL false preprocessing
DLCshifumi-PT-4a-05: LTL true LTL model checker
DLCshifumi-PT-4a-06: INITIAL true preprocessing
DLCshifumi-PT-4a-08: CONJ false skeleton: LTL model checker
DLCshifumi-PT-4a-09: LTL true LTL model checker
DLCshifumi-PT-4a-11: F true state space / EG
DLCshifumi-PT-4a-12: CONJ false preprocessing
DLCshifumi-PT-4a-13: LTL false LTL model checker
DLCshifumi-PT-4a-14: INITIAL false preprocessing
DLCshifumi-PT-4a-15: INITIAL false preprocessing

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DLCshifumi-PT-4a-00: CONJ 0 1 0 0 2 0 1 0
DLCshifumi-PT-4a-01: CONJ 0 2 0 0 2 0 0 0
DLCshifumi-PT-4a-07: LTL 0 1 0 0 1 0 0 0
DLCshifumi-PT-4a-10: LTL 0 0 1 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
51 LTL EXCL 90/693 23/32 DLCshifumi-PT-4a-10 2357138 m, 24981 m/sec, 38616620 t fired, .

Time elapsed: 224 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DLCshifumi-PT-4a-02: CONJ false state space /ER
DLCshifumi-PT-4a-03: INITIAL false preprocessing
DLCshifumi-PT-4a-04: INITIAL false preprocessing
DLCshifumi-PT-4a-05: LTL true LTL model checker
DLCshifumi-PT-4a-06: INITIAL true preprocessing
DLCshifumi-PT-4a-08: CONJ false skeleton: LTL model checker
DLCshifumi-PT-4a-09: LTL true LTL model checker
DLCshifumi-PT-4a-11: F true state space / EG
DLCshifumi-PT-4a-12: CONJ false preprocessing
DLCshifumi-PT-4a-13: LTL false LTL model checker
DLCshifumi-PT-4a-14: INITIAL false preprocessing
DLCshifumi-PT-4a-15: INITIAL false preprocessing

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DLCshifumi-PT-4a-00: CONJ 0 1 0 0 2 0 1 0
DLCshifumi-PT-4a-01: CONJ 0 2 0 0 2 0 0 0
DLCshifumi-PT-4a-07: LTL 0 1 0 0 1 0 0 0
DLCshifumi-PT-4a-10: LTL 0 0 1 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
51 LTL EXCL 95/693 25/32 DLCshifumi-PT-4a-10 2479933 m, 24559 m/sec, 40723069 t fired, .

Time elapsed: 229 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DLCshifumi-PT-4a-02: CONJ false state space /ER
DLCshifumi-PT-4a-03: INITIAL false preprocessing
DLCshifumi-PT-4a-04: INITIAL false preprocessing
DLCshifumi-PT-4a-05: LTL true LTL model checker
DLCshifumi-PT-4a-06: INITIAL true preprocessing
DLCshifumi-PT-4a-08: CONJ false skeleton: LTL model checker
DLCshifumi-PT-4a-09: LTL true LTL model checker
DLCshifumi-PT-4a-11: F true state space / EG
DLCshifumi-PT-4a-12: CONJ false preprocessing
DLCshifumi-PT-4a-13: LTL false LTL model checker
DLCshifumi-PT-4a-14: INITIAL false preprocessing
DLCshifumi-PT-4a-15: INITIAL false preprocessing

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DLCshifumi-PT-4a-00: CONJ 0 1 0 0 2 0 1 0
DLCshifumi-PT-4a-01: CONJ 0 2 0 0 2 0 0 0
DLCshifumi-PT-4a-07: LTL 0 1 0 0 1 0 0 0
DLCshifumi-PT-4a-10: LTL 0 0 1 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
51 LTL EXCL 100/693 26/32 DLCshifumi-PT-4a-10 2603394 m, 24692 m/sec, 42833556 t fired, .

Time elapsed: 234 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DLCshifumi-PT-4a-02: CONJ false state space /ER
DLCshifumi-PT-4a-03: INITIAL false preprocessing
DLCshifumi-PT-4a-04: INITIAL false preprocessing
DLCshifumi-PT-4a-05: LTL true LTL model checker
DLCshifumi-PT-4a-06: INITIAL true preprocessing
DLCshifumi-PT-4a-08: CONJ false skeleton: LTL model checker
DLCshifumi-PT-4a-09: LTL true LTL model checker
DLCshifumi-PT-4a-11: F true state space / EG
DLCshifumi-PT-4a-12: CONJ false preprocessing
DLCshifumi-PT-4a-13: LTL false LTL model checker
DLCshifumi-PT-4a-14: INITIAL false preprocessing
DLCshifumi-PT-4a-15: INITIAL false preprocessing

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DLCshifumi-PT-4a-00: CONJ 0 1 0 0 2 0 1 0
DLCshifumi-PT-4a-01: CONJ 0 2 0 0 2 0 0 0
DLCshifumi-PT-4a-07: LTL 0 1 0 0 1 0 0 0
DLCshifumi-PT-4a-10: LTL 0 0 1 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
51 LTL EXCL 105/693 27/32 DLCshifumi-PT-4a-10 2731860 m, 25693 m/sec, 44939760 t fired, .

Time elapsed: 239 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DLCshifumi-PT-4a-02: CONJ false state space /ER
DLCshifumi-PT-4a-03: INITIAL false preprocessing
DLCshifumi-PT-4a-04: INITIAL false preprocessing
DLCshifumi-PT-4a-05: LTL true LTL model checker
DLCshifumi-PT-4a-06: INITIAL true preprocessing
DLCshifumi-PT-4a-08: CONJ false skeleton: LTL model checker
DLCshifumi-PT-4a-09: LTL true LTL model checker
DLCshifumi-PT-4a-11: F true state space / EG
DLCshifumi-PT-4a-12: CONJ false preprocessing
DLCshifumi-PT-4a-13: LTL false LTL model checker
DLCshifumi-PT-4a-14: INITIAL false preprocessing
DLCshifumi-PT-4a-15: INITIAL false preprocessing

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DLCshifumi-PT-4a-00: CONJ 0 1 0 0 2 0 1 0
DLCshifumi-PT-4a-01: CONJ 0 2 0 0 2 0 0 0
DLCshifumi-PT-4a-07: LTL 0 1 0 0 1 0 0 0
DLCshifumi-PT-4a-10: LTL 0 0 1 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
51 LTL EXCL 110/693 28/32 DLCshifumi-PT-4a-10 2859070 m, 25442 m/sec, 47035778 t fired, .

Time elapsed: 244 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DLCshifumi-PT-4a-02: CONJ false state space /ER
DLCshifumi-PT-4a-03: INITIAL false preprocessing
DLCshifumi-PT-4a-04: INITIAL false preprocessing
DLCshifumi-PT-4a-05: LTL true LTL model checker
DLCshifumi-PT-4a-06: INITIAL true preprocessing
DLCshifumi-PT-4a-08: CONJ false skeleton: LTL model checker
DLCshifumi-PT-4a-09: LTL true LTL model checker
DLCshifumi-PT-4a-11: F true state space / EG
DLCshifumi-PT-4a-12: CONJ false preprocessing
DLCshifumi-PT-4a-13: LTL false LTL model checker
DLCshifumi-PT-4a-14: INITIAL false preprocessing
DLCshifumi-PT-4a-15: INITIAL false preprocessing

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DLCshifumi-PT-4a-00: CONJ 0 1 0 0 2 0 1 0
DLCshifumi-PT-4a-01: CONJ 0 2 0 0 2 0 0 0
DLCshifumi-PT-4a-07: LTL 0 1 0 0 1 0 0 0
DLCshifumi-PT-4a-10: LTL 0 0 1 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
51 LTL EXCL 115/693 30/32 DLCshifumi-PT-4a-10 2983561 m, 24898 m/sec, 49132103 t fired, .

Time elapsed: 249 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DLCshifumi-PT-4a-02: CONJ false state space /ER
DLCshifumi-PT-4a-03: INITIAL false preprocessing
DLCshifumi-PT-4a-04: INITIAL false preprocessing
DLCshifumi-PT-4a-05: LTL true LTL model checker
DLCshifumi-PT-4a-06: INITIAL true preprocessing
DLCshifumi-PT-4a-08: CONJ false skeleton: LTL model checker
DLCshifumi-PT-4a-09: LTL true LTL model checker
DLCshifumi-PT-4a-11: F true state space / EG
DLCshifumi-PT-4a-12: CONJ false preprocessing
DLCshifumi-PT-4a-13: LTL false LTL model checker
DLCshifumi-PT-4a-14: INITIAL false preprocessing
DLCshifumi-PT-4a-15: INITIAL false preprocessing

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DLCshifumi-PT-4a-00: CONJ 0 1 0 0 2 0 1 0
DLCshifumi-PT-4a-01: CONJ 0 2 0 0 2 0 0 0
DLCshifumi-PT-4a-07: LTL 0 1 0 0 1 0 0 0
DLCshifumi-PT-4a-10: LTL 0 0 1 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
51 LTL EXCL 120/693 31/32 DLCshifumi-PT-4a-10 3108271 m, 24942 m/sec, 51230738 t fired, .

Time elapsed: 254 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DLCshifumi-PT-4a-02: CONJ false state space /ER
DLCshifumi-PT-4a-03: INITIAL false preprocessing
DLCshifumi-PT-4a-04: INITIAL false preprocessing
DLCshifumi-PT-4a-05: LTL true LTL model checker
DLCshifumi-PT-4a-06: INITIAL true preprocessing
DLCshifumi-PT-4a-08: CONJ false skeleton: LTL model checker
DLCshifumi-PT-4a-09: LTL true LTL model checker
DLCshifumi-PT-4a-11: F true state space / EG
DLCshifumi-PT-4a-12: CONJ false preprocessing
DLCshifumi-PT-4a-13: LTL false LTL model checker
DLCshifumi-PT-4a-14: INITIAL false preprocessing
DLCshifumi-PT-4a-15: INITIAL false preprocessing

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DLCshifumi-PT-4a-00: CONJ 0 1 0 0 2 0 1 0
DLCshifumi-PT-4a-01: CONJ 0 2 0 0 2 0 0 0
DLCshifumi-PT-4a-07: LTL 0 1 0 0 1 0 0 0
DLCshifumi-PT-4a-10: LTL 0 0 1 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
51 LTL EXCL 125/693 32/32 DLCshifumi-PT-4a-10 3228852 m, 24116 m/sec, 53329958 t fired, .

Time elapsed: 259 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
lola: CANCELED task # 51 (type EXCL) for DLCshifumi-PT-4a-10 (memory limit exceeded)
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DLCshifumi-PT-4a-02: CONJ false state space /ER
DLCshifumi-PT-4a-03: INITIAL false preprocessing
DLCshifumi-PT-4a-04: INITIAL false preprocessing
DLCshifumi-PT-4a-05: LTL true LTL model checker
DLCshifumi-PT-4a-06: INITIAL true preprocessing
DLCshifumi-PT-4a-08: CONJ false skeleton: LTL model checker
DLCshifumi-PT-4a-09: LTL true LTL model checker
DLCshifumi-PT-4a-11: F true state space / EG
DLCshifumi-PT-4a-12: CONJ false preprocessing
DLCshifumi-PT-4a-13: LTL false LTL model checker
DLCshifumi-PT-4a-14: INITIAL false preprocessing
DLCshifumi-PT-4a-15: INITIAL false preprocessing

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DLCshifumi-PT-4a-00: CONJ 0 1 0 0 2 0 1 0
DLCshifumi-PT-4a-01: CONJ 0 2 0 0 2 0 0 0
DLCshifumi-PT-4a-07: LTL 0 1 0 0 1 0 0 0
DLCshifumi-PT-4a-10: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 264 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
lola: LAUNCH task # 38 (type EXCL) for 37 DLCshifumi-PT-4a-07
lola: time limit : 834 sec
lola: memory limit: 32 pages
lola: FINISHED task # 38 (type EXCL) for DLCshifumi-PT-4a-07
lola: result : false
lola: markings : 22
lola: fired transitions : 23
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 12 (type EXCL) for 7 DLCshifumi-PT-4a-01
lola: time limit : 1112 sec
lola: memory limit: 32 pages
lola: FINISHED task # 12 (type EXCL) for DLCshifumi-PT-4a-01
lola: result : false
lola: markings : 21
lola: fired transitions : 21
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 3 (type EXCL) for 0 DLCshifumi-PT-4a-00
lola: time limit : 3336 sec
lola: memory limit: 32 pages
lola: FINISHED task # 3 (type EXCL) for DLCshifumi-PT-4a-00
lola: result : false
lola: markings : 21
lola: fired transitions : 21
lola: time used : 0.000000
lola: memory pages used : 1
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DLCshifumi-PT-4a-00: CONJ false LTL model checker
DLCshifumi-PT-4a-01: CONJ false LTL model checker
DLCshifumi-PT-4a-02: CONJ false state space /ER
DLCshifumi-PT-4a-03: INITIAL false preprocessing
DLCshifumi-PT-4a-04: INITIAL false preprocessing
DLCshifumi-PT-4a-05: LTL true LTL model checker
DLCshifumi-PT-4a-06: INITIAL true preprocessing
DLCshifumi-PT-4a-07: LTL false LTL model checker
DLCshifumi-PT-4a-08: CONJ false skeleton: LTL model checker
DLCshifumi-PT-4a-09: LTL true LTL model checker
DLCshifumi-PT-4a-11: F true state space / EG
DLCshifumi-PT-4a-12: CONJ false preprocessing
DLCshifumi-PT-4a-13: LTL false LTL model checker
DLCshifumi-PT-4a-14: INITIAL false preprocessing
DLCshifumi-PT-4a-15: INITIAL false preprocessing

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DLCshifumi-PT-4a-10: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 269 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DLCshifumi-PT-4a-00: CONJ false LTL model checker
DLCshifumi-PT-4a-01: CONJ false LTL model checker
DLCshifumi-PT-4a-02: CONJ false state space /ER
DLCshifumi-PT-4a-03: INITIAL false preprocessing
DLCshifumi-PT-4a-04: INITIAL false preprocessing
DLCshifumi-PT-4a-05: LTL true LTL model checker
DLCshifumi-PT-4a-06: INITIAL true preprocessing
DLCshifumi-PT-4a-07: LTL false LTL model checker
DLCshifumi-PT-4a-08: CONJ false skeleton: LTL model checker
DLCshifumi-PT-4a-09: LTL true LTL model checker
DLCshifumi-PT-4a-11: F true state space / EG
DLCshifumi-PT-4a-12: CONJ false preprocessing
DLCshifumi-PT-4a-13: LTL false LTL model checker
DLCshifumi-PT-4a-14: INITIAL false preprocessing
DLCshifumi-PT-4a-15: INITIAL false preprocessing

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DLCshifumi-PT-4a-10: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 274 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DLCshifumi-PT-4a-00: CONJ false LTL model checker
DLCshifumi-PT-4a-01: CONJ false LTL model checker
DLCshifumi-PT-4a-02: CONJ false state space /ER
DLCshifumi-PT-4a-03: INITIAL false preprocessing
DLCshifumi-PT-4a-04: INITIAL false preprocessing
DLCshifumi-PT-4a-05: LTL true LTL model checker
DLCshifumi-PT-4a-06: INITIAL true preprocessing
DLCshifumi-PT-4a-07: LTL false LTL model checker
DLCshifumi-PT-4a-08: CONJ false skeleton: LTL model checker
DLCshifumi-PT-4a-09: LTL true LTL model checker
DLCshifumi-PT-4a-11: F true state space / EG
DLCshifumi-PT-4a-12: CONJ false preprocessing
DLCshifumi-PT-4a-13: LTL false LTL model checker
DLCshifumi-PT-4a-14: INITIAL false preprocessing
DLCshifumi-PT-4a-15: INITIAL false preprocessing

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DLCshifumi-PT-4a-10: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 279 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DLCshifumi-PT-4a-00: CONJ false LTL model checker
DLCshifumi-PT-4a-01: CONJ false LTL model checker
DLCshifumi-PT-4a-02: CONJ false state space /ER
DLCshifumi-PT-4a-03: INITIAL false preprocessing
DLCshifumi-PT-4a-04: INITIAL false preprocessing
DLCshifumi-PT-4a-05: LTL true LTL model checker
DLCshifumi-PT-4a-06: INITIAL true preprocessing
DLCshifumi-PT-4a-07: LTL false LTL model checker
DLCshifumi-PT-4a-08: CONJ false skeleton: LTL model checker
DLCshifumi-PT-4a-09: LTL true LTL model checker
DLCshifumi-PT-4a-11: F true state space / EG
DLCshifumi-PT-4a-12: CONJ false preprocessing
DLCshifumi-PT-4a-13: LTL false LTL model checker
DLCshifumi-PT-4a-14: INITIAL false preprocessing
DLCshifumi-PT-4a-15: INITIAL false preprocessing

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DLCshifumi-PT-4a-10: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 284 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DLCshifumi-PT-4a-00: CONJ false LTL model checker
DLCshifumi-PT-4a-01: CONJ false LTL model checker
DLCshifumi-PT-4a-02: CONJ false state space /ER
DLCshifumi-PT-4a-03: INITIAL false preprocessing
DLCshifumi-PT-4a-04: INITIAL false preprocessing
DLCshifumi-PT-4a-05: LTL true LTL model checker
DLCshifumi-PT-4a-06: INITIAL true preprocessing
DLCshifumi-PT-4a-07: LTL false LTL model checker
DLCshifumi-PT-4a-08: CONJ false skeleton: LTL model checker
DLCshifumi-PT-4a-09: LTL true LTL model checker
DLCshifumi-PT-4a-11: F true state space / EG
DLCshifumi-PT-4a-12: CONJ false preprocessing
DLCshifumi-PT-4a-13: LTL false LTL model checker
DLCshifumi-PT-4a-14: INITIAL false preprocessing
DLCshifumi-PT-4a-15: INITIAL false preprocessing

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DLCshifumi-PT-4a-10: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 289 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DLCshifumi-PT-4a-00: CONJ false LTL model checker
DLCshifumi-PT-4a-01: CONJ false LTL model checker
DLCshifumi-PT-4a-02: CONJ false state space /ER
DLCshifumi-PT-4a-03: INITIAL false preprocessing
DLCshifumi-PT-4a-04: INITIAL false preprocessing
DLCshifumi-PT-4a-05: LTL true LTL model checker
DLCshifumi-PT-4a-06: INITIAL true preprocessing
DLCshifumi-PT-4a-07: LTL false LTL model checker
DLCshifumi-PT-4a-08: CONJ false skeleton: LTL model checker
DLCshifumi-PT-4a-09: LTL true LTL model checker
DLCshifumi-PT-4a-11: F true state space / EG
DLCshifumi-PT-4a-12: CONJ false preprocessing
DLCshifumi-PT-4a-13: LTL false LTL model checker
DLCshifumi-PT-4a-14: INITIAL false preprocessing
DLCshifumi-PT-4a-15: INITIAL false preprocessing

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DLCshifumi-PT-4a-10: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 294 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DLCshifumi-PT-4a-00: CONJ false LTL model checker
DLCshifumi-PT-4a-01: CONJ false LTL model checker
DLCshifumi-PT-4a-02: CONJ false state space /ER
DLCshifumi-PT-4a-03: INITIAL false preprocessing
DLCshifumi-PT-4a-04: INITIAL false preprocessing
DLCshifumi-PT-4a-05: LTL true LTL model checker
DLCshifumi-PT-4a-06: INITIAL true preprocessing
DLCshifumi-PT-4a-07: LTL false LTL model checker
DLCshifumi-PT-4a-08: CONJ false skeleton: LTL model checker
DLCshifumi-PT-4a-09: LTL true LTL model checker
DLCshifumi-PT-4a-11: F true state space / EG
DLCshifumi-PT-4a-12: CONJ false preprocessing
DLCshifumi-PT-4a-13: LTL false LTL model checker
DLCshifumi-PT-4a-14: INITIAL false preprocessing
DLCshifumi-PT-4a-15: INITIAL false preprocessing

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DLCshifumi-PT-4a-10: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 299 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DLCshifumi-PT-4a-00: CONJ false LTL model checker
DLCshifumi-PT-4a-01: CONJ false LTL model checker
DLCshifumi-PT-4a-02: CONJ false state space /ER
DLCshifumi-PT-4a-03: INITIAL false preprocessing
DLCshifumi-PT-4a-04: INITIAL false preprocessing
DLCshifumi-PT-4a-05: LTL true LTL model checker
DLCshifumi-PT-4a-06: INITIAL true preprocessing
DLCshifumi-PT-4a-07: LTL false LTL model checker
DLCshifumi-PT-4a-08: CONJ false skeleton: LTL model checker
DLCshifumi-PT-4a-09: LTL true LTL model checker
DLCshifumi-PT-4a-11: F true state space / EG
DLCshifumi-PT-4a-12: CONJ false preprocessing
DLCshifumi-PT-4a-13: LTL false LTL model checker
DLCshifumi-PT-4a-14: INITIAL false preprocessing
DLCshifumi-PT-4a-15: INITIAL false preprocessing

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DLCshifumi-PT-4a-10: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 304 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DLCshifumi-PT-4a-00: CONJ false LTL model checker
DLCshifumi-PT-4a-01: CONJ false LTL model checker
DLCshifumi-PT-4a-02: CONJ false state space /ER
DLCshifumi-PT-4a-03: INITIAL false preprocessing
DLCshifumi-PT-4a-04: INITIAL false preprocessing
DLCshifumi-PT-4a-05: LTL true LTL model checker
DLCshifumi-PT-4a-06: INITIAL true preprocessing
DLCshifumi-PT-4a-07: LTL false LTL model checker
DLCshifumi-PT-4a-08: CONJ false skeleton: LTL model checker
DLCshifumi-PT-4a-09: LTL true LTL model checker
DLCshifumi-PT-4a-11: F true state space / EG
DLCshifumi-PT-4a-12: CONJ false preprocessing
DLCshifumi-PT-4a-13: LTL false LTL model checker
DLCshifumi-PT-4a-14: INITIAL false preprocessing
DLCshifumi-PT-4a-15: INITIAL false preprocessing

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DLCshifumi-PT-4a-10: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 309 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DLCshifumi-PT-4a-00: CONJ false LTL model checker
DLCshifumi-PT-4a-01: CONJ false LTL model checker
DLCshifumi-PT-4a-02: CONJ false state space /ER
DLCshifumi-PT-4a-03: INITIAL false preprocessing
DLCshifumi-PT-4a-04: INITIAL false preprocessing
DLCshifumi-PT-4a-05: LTL true LTL model checker
DLCshifumi-PT-4a-06: INITIAL true preprocessing
DLCshifumi-PT-4a-07: LTL false LTL model checker
DLCshifumi-PT-4a-08: CONJ false skeleton: LTL model checker
DLCshifumi-PT-4a-09: LTL true LTL model checker
DLCshifumi-PT-4a-11: F true state space / EG
DLCshifumi-PT-4a-12: CONJ false preprocessing
DLCshifumi-PT-4a-13: LTL false LTL model checker
DLCshifumi-PT-4a-14: INITIAL false preprocessing
DLCshifumi-PT-4a-15: INITIAL false preprocessing

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DLCshifumi-PT-4a-10: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 314 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DLCshifumi-PT-4a-00: CONJ false LTL model checker
DLCshifumi-PT-4a-01: CONJ false LTL model checker
DLCshifumi-PT-4a-02: CONJ false state space /ER
DLCshifumi-PT-4a-03: INITIAL false preprocessing
DLCshifumi-PT-4a-04: INITIAL false preprocessing
DLCshifumi-PT-4a-05: LTL true LTL model checker
DLCshifumi-PT-4a-06: INITIAL true preprocessing
DLCshifumi-PT-4a-07: LTL false LTL model checker
DLCshifumi-PT-4a-08: CONJ false skeleton: LTL model checker
DLCshifumi-PT-4a-09: LTL true LTL model checker
DLCshifumi-PT-4a-11: F true state space / EG
DLCshifumi-PT-4a-12: CONJ false preprocessing
DLCshifumi-PT-4a-13: LTL false LTL model checker
DLCshifumi-PT-4a-14: INITIAL false preprocessing
DLCshifumi-PT-4a-15: INITIAL false preprocessing

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DLCshifumi-PT-4a-10: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 319 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DLCshifumi-PT-4a-00: CONJ false LTL model checker
DLCshifumi-PT-4a-01: CONJ false LTL model checker
DLCshifumi-PT-4a-02: CONJ false state space /ER
DLCshifumi-PT-4a-03: INITIAL false preprocessing
DLCshifumi-PT-4a-04: INITIAL false preprocessing
DLCshifumi-PT-4a-05: LTL true LTL model checker
DLCshifumi-PT-4a-06: INITIAL true preprocessing
DLCshifumi-PT-4a-07: LTL false LTL model checker
DLCshifumi-PT-4a-08: CONJ false skeleton: LTL model checker
DLCshifumi-PT-4a-09: LTL true LTL model checker
DLCshifumi-PT-4a-11: F true state space / EG
DLCshifumi-PT-4a-12: CONJ false preprocessing
DLCshifumi-PT-4a-13: LTL false LTL model checker
DLCshifumi-PT-4a-14: INITIAL false preprocessing
DLCshifumi-PT-4a-15: INITIAL false preprocessing

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DLCshifumi-PT-4a-10: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 324 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DLCshifumi-PT-4a-00: CONJ false LTL model checker
DLCshifumi-PT-4a-01: CONJ false LTL model checker
DLCshifumi-PT-4a-02: CONJ false state space /ER
DLCshifumi-PT-4a-03: INITIAL false preprocessing
DLCshifumi-PT-4a-04: INITIAL false preprocessing
DLCshifumi-PT-4a-05: LTL true LTL model checker
DLCshifumi-PT-4a-06: INITIAL true preprocessing
DLCshifumi-PT-4a-07: LTL false LTL model checker
DLCshifumi-PT-4a-08: CONJ false skeleton: LTL model checker
DLCshifumi-PT-4a-09: LTL true LTL model checker
DLCshifumi-PT-4a-11: F true state space / EG
DLCshifumi-PT-4a-12: CONJ false preprocessing
DLCshifumi-PT-4a-13: LTL false LTL model checker
DLCshifumi-PT-4a-14: INITIAL false preprocessing
DLCshifumi-PT-4a-15: INITIAL false preprocessing

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DLCshifumi-PT-4a-10: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 329 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DLCshifumi-PT-4a-00: CONJ false LTL model checker
DLCshifumi-PT-4a-01: CONJ false LTL model checker
DLCshifumi-PT-4a-02: CONJ false state space /ER
DLCshifumi-PT-4a-03: INITIAL false preprocessing
DLCshifumi-PT-4a-04: INITIAL false preprocessing
DLCshifumi-PT-4a-05: LTL true LTL model checker
DLCshifumi-PT-4a-06: INITIAL true preprocessing
DLCshifumi-PT-4a-07: LTL false LTL model checker
DLCshifumi-PT-4a-08: CONJ false skeleton: LTL model checker
DLCshifumi-PT-4a-09: LTL true LTL model checker
DLCshifumi-PT-4a-11: F true state space / EG
DLCshifumi-PT-4a-12: CONJ false preprocessing
DLCshifumi-PT-4a-13: LTL false LTL model checker
DLCshifumi-PT-4a-14: INITIAL false preprocessing
DLCshifumi-PT-4a-15: INITIAL false preprocessing

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DLCshifumi-PT-4a-10: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 334 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DLCshifumi-PT-4a-00: CONJ false LTL model checker
DLCshifumi-PT-4a-01: CONJ false LTL model checker
DLCshifumi-PT-4a-02: CONJ false state space /ER
DLCshifumi-PT-4a-03: INITIAL false preprocessing
DLCshifumi-PT-4a-04: INITIAL false preprocessing
DLCshifumi-PT-4a-05: LTL true LTL model checker
DLCshifumi-PT-4a-06: INITIAL true preprocessing
DLCshifumi-PT-4a-07: LTL false LTL model checker
DLCshifumi-PT-4a-08: CONJ false skeleton: LTL model checker
DLCshifumi-PT-4a-09: LTL true LTL model checker
DLCshifumi-PT-4a-11: F true state space / EG
DLCshifumi-PT-4a-12: CONJ false preprocessing
DLCshifumi-PT-4a-13: LTL false LTL model checker
DLCshifumi-PT-4a-14: INITIAL false preprocessing
DLCshifumi-PT-4a-15: INITIAL false preprocessing

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DLCshifumi-PT-4a-10: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 339 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DLCshifumi-PT-4a-00: CONJ false LTL model checker
DLCshifumi-PT-4a-01: CONJ false LTL model checker
DLCshifumi-PT-4a-02: CONJ false state space /ER
DLCshifumi-PT-4a-03: INITIAL false preprocessing
DLCshifumi-PT-4a-04: INITIAL false preprocessing
DLCshifumi-PT-4a-05: LTL true LTL model checker
DLCshifumi-PT-4a-06: INITIAL true preprocessing
DLCshifumi-PT-4a-07: LTL false LTL model checker
DLCshifumi-PT-4a-08: CONJ false skeleton: LTL model checker
DLCshifumi-PT-4a-09: LTL true LTL model checker
DLCshifumi-PT-4a-11: F true state space / EG
DLCshifumi-PT-4a-12: CONJ false preprocessing
DLCshifumi-PT-4a-13: LTL false LTL model checker
DLCshifumi-PT-4a-14: INITIAL false preprocessing
DLCshifumi-PT-4a-15: INITIAL false preprocessing

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DLCshifumi-PT-4a-10: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 344 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DLCshifumi-PT-4a-00: CONJ false LTL model checker
DLCshifumi-PT-4a-01: CONJ false LTL model checker
DLCshifumi-PT-4a-02: CONJ false state space /ER
DLCshifumi-PT-4a-03: INITIAL false preprocessing
DLCshifumi-PT-4a-04: INITIAL false preprocessing
DLCshifumi-PT-4a-05: LTL true LTL model checker
DLCshifumi-PT-4a-06: INITIAL true preprocessing
DLCshifumi-PT-4a-07: LTL false LTL model checker
DLCshifumi-PT-4a-08: CONJ false skeleton: LTL model checker
DLCshifumi-PT-4a-09: LTL true LTL model checker
DLCshifumi-PT-4a-11: F true state space / EG
DLCshifumi-PT-4a-12: CONJ false preprocessing
DLCshifumi-PT-4a-13: LTL false LTL model checker
DLCshifumi-PT-4a-14: INITIAL false preprocessing
DLCshifumi-PT-4a-15: INITIAL false preprocessing

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DLCshifumi-PT-4a-10: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 349 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DLCshifumi-PT-4a-00: CONJ false LTL model checker
DLCshifumi-PT-4a-01: CONJ false LTL model checker
DLCshifumi-PT-4a-02: CONJ false state space /ER
DLCshifumi-PT-4a-03: INITIAL false preprocessing
DLCshifumi-PT-4a-04: INITIAL false preprocessing
DLCshifumi-PT-4a-05: LTL true LTL model checker
DLCshifumi-PT-4a-06: INITIAL true preprocessing
DLCshifumi-PT-4a-07: LTL false LTL model checker
DLCshifumi-PT-4a-08: CONJ false skeleton: LTL model checker
DLCshifumi-PT-4a-09: LTL true LTL model checker
DLCshifumi-PT-4a-11: F true state space / EG
DLCshifumi-PT-4a-12: CONJ false preprocessing
DLCshifumi-PT-4a-13: LTL false LTL model checker
DLCshifumi-PT-4a-14: INITIAL false preprocessing
DLCshifumi-PT-4a-15: INITIAL false preprocessing

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DLCshifumi-PT-4a-10: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 354 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DLCshifumi-PT-4a-00: CONJ false LTL model checker
DLCshifumi-PT-4a-01: CONJ false LTL model checker
DLCshifumi-PT-4a-02: CONJ false state space /ER
DLCshifumi-PT-4a-03: INITIAL false preprocessing
DLCshifumi-PT-4a-04: INITIAL false preprocessing
DLCshifumi-PT-4a-05: LTL true LTL model checker
DLCshifumi-PT-4a-06: INITIAL true preprocessing
DLCshifumi-PT-4a-07: LTL false LTL model checker
DLCshifumi-PT-4a-08: CONJ false skeleton: LTL model checker
DLCshifumi-PT-4a-09: LTL true LTL model checker
DLCshifumi-PT-4a-11: F true state space / EG
DLCshifumi-PT-4a-12: CONJ false preprocessing
DLCshifumi-PT-4a-13: LTL false LTL model checker
DLCshifumi-PT-4a-14: INITIAL false preprocessing
DLCshifumi-PT-4a-15: INITIAL false preprocessing

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DLCshifumi-PT-4a-10: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 359 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DLCshifumi-PT-4a-00: CONJ false LTL model checker
DLCshifumi-PT-4a-01: CONJ false LTL model checker
DLCshifumi-PT-4a-02: CONJ false state space /ER
DLCshifumi-PT-4a-03: INITIAL false preprocessing
DLCshifumi-PT-4a-04: INITIAL false preprocessing
DLCshifumi-PT-4a-05: LTL true LTL model checker
DLCshifumi-PT-4a-06: INITIAL true preprocessing
DLCshifumi-PT-4a-07: LTL false LTL model checker
DLCshifumi-PT-4a-08: CONJ false skeleton: LTL model checker
DLCshifumi-PT-4a-09: LTL true LTL model checker
DLCshifumi-PT-4a-11: F true state space / EG
DLCshifumi-PT-4a-12: CONJ false preprocessing
DLCshifumi-PT-4a-13: LTL false LTL model checker
DLCshifumi-PT-4a-14: INITIAL false preprocessing
DLCshifumi-PT-4a-15: INITIAL false preprocessing

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DLCshifumi-PT-4a-10: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 364 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DLCshifumi-PT-4a-00: CONJ false LTL model checker
DLCshifumi-PT-4a-01: CONJ false LTL model checker
DLCshifumi-PT-4a-02: CONJ false state space /ER
DLCshifumi-PT-4a-03: INITIAL false preprocessing
DLCshifumi-PT-4a-04: INITIAL false preprocessing
DLCshifumi-PT-4a-05: LTL true LTL model checker
DLCshifumi-PT-4a-06: INITIAL true preprocessing
DLCshifumi-PT-4a-07: LTL false LTL model checker
DLCshifumi-PT-4a-08: CONJ false skeleton: LTL model checker
DLCshifumi-PT-4a-09: LTL true LTL model checker
DLCshifumi-PT-4a-11: F true state space / EG
DLCshifumi-PT-4a-12: CONJ false preprocessing
DLCshifumi-PT-4a-13: LTL false LTL model checker
DLCshifumi-PT-4a-14: INITIAL false preprocessing
DLCshifumi-PT-4a-15: INITIAL false preprocessing

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DLCshifumi-PT-4a-10: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 369 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DLCshifumi-PT-4a-00: CONJ false LTL model checker
DLCshifumi-PT-4a-01: CONJ false LTL model checker
DLCshifumi-PT-4a-02: CONJ false state space /ER
DLCshifumi-PT-4a-03: INITIAL false preprocessing
DLCshifumi-PT-4a-04: INITIAL false preprocessing
DLCshifumi-PT-4a-05: LTL true LTL model checker
DLCshifumi-PT-4a-06: INITIAL true preprocessing
DLCshifumi-PT-4a-07: LTL false LTL model checker
DLCshifumi-PT-4a-08: CONJ false skeleton: LTL model checker
DLCshifumi-PT-4a-09: LTL true LTL model checker
DLCshifumi-PT-4a-11: F true state space / EG
DLCshifumi-PT-4a-12: CONJ false preprocessing
DLCshifumi-PT-4a-13: LTL false LTL model checker
DLCshifumi-PT-4a-14: INITIAL false preprocessing
DLCshifumi-PT-4a-15: INITIAL false preprocessing

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DLCshifumi-PT-4a-10: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 374 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DLCshifumi-PT-4a-00: CONJ false LTL model checker
DLCshifumi-PT-4a-01: CONJ false LTL model checker
DLCshifumi-PT-4a-02: CONJ false state space /ER
DLCshifumi-PT-4a-03: INITIAL false preprocessing
DLCshifumi-PT-4a-04: INITIAL false preprocessing
DLCshifumi-PT-4a-05: LTL true LTL model checker
DLCshifumi-PT-4a-06: INITIAL true preprocessing
DLCshifumi-PT-4a-07: LTL false LTL model checker
DLCshifumi-PT-4a-08: CONJ false skeleton: LTL model checker
DLCshifumi-PT-4a-09: LTL true LTL model checker
DLCshifumi-PT-4a-11: F true state space / EG
DLCshifumi-PT-4a-12: CONJ false preprocessing
DLCshifumi-PT-4a-13: LTL false LTL model checker
DLCshifumi-PT-4a-14: INITIAL false preprocessing
DLCshifumi-PT-4a-15: INITIAL false preprocessing

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DLCshifumi-PT-4a-10: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 379 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DLCshifumi-PT-4a-00: CONJ false LTL model checker
DLCshifumi-PT-4a-01: CONJ false LTL model checker
DLCshifumi-PT-4a-02: CONJ false state space /ER
DLCshifumi-PT-4a-03: INITIAL false preprocessing
DLCshifumi-PT-4a-04: INITIAL false preprocessing
DLCshifumi-PT-4a-05: LTL true LTL model checker
DLCshifumi-PT-4a-06: INITIAL true preprocessing
DLCshifumi-PT-4a-07: LTL false LTL model checker
DLCshifumi-PT-4a-08: CONJ false skeleton: LTL model checker
DLCshifumi-PT-4a-09: LTL true LTL model checker
DLCshifumi-PT-4a-11: F true state space / EG
DLCshifumi-PT-4a-12: CONJ false preprocessing
DLCshifumi-PT-4a-13: LTL false LTL model checker
DLCshifumi-PT-4a-14: INITIAL false preprocessing
DLCshifumi-PT-4a-15: INITIAL false preprocessing

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DLCshifumi-PT-4a-10: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 384 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DLCshifumi-PT-4a-00: CONJ false LTL model checker
DLCshifumi-PT-4a-01: CONJ false LTL model checker
DLCshifumi-PT-4a-02: CONJ false state space /ER
DLCshifumi-PT-4a-03: INITIAL false preprocessing
DLCshifumi-PT-4a-04: INITIAL false preprocessing
DLCshifumi-PT-4a-05: LTL true LTL model checker
DLCshifumi-PT-4a-06: INITIAL true preprocessing
DLCshifumi-PT-4a-07: LTL false LTL model checker
DLCshifumi-PT-4a-08: CONJ false skeleton: LTL model checker
DLCshifumi-PT-4a-09: LTL true LTL model checker
DLCshifumi-PT-4a-11: F true state space / EG
DLCshifumi-PT-4a-12: CONJ false preprocessing
DLCshifumi-PT-4a-13: LTL false LTL model checker
DLCshifumi-PT-4a-14: INITIAL false preprocessing
DLCshifumi-PT-4a-15: INITIAL false preprocessing

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DLCshifumi-PT-4a-10: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 389 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DLCshifumi-PT-4a-00: CONJ false LTL model checker
DLCshifumi-PT-4a-01: CONJ false LTL model checker
DLCshifumi-PT-4a-02: CONJ false state space /ER
DLCshifumi-PT-4a-03: INITIAL false preprocessing
DLCshifumi-PT-4a-04: INITIAL false preprocessing
DLCshifumi-PT-4a-05: LTL true LTL model checker
DLCshifumi-PT-4a-06: INITIAL true preprocessing
DLCshifumi-PT-4a-07: LTL false LTL model checker
DLCshifumi-PT-4a-08: CONJ false skeleton: LTL model checker
DLCshifumi-PT-4a-09: LTL true LTL model checker
DLCshifumi-PT-4a-11: F true state space / EG
DLCshifumi-PT-4a-12: CONJ false preprocessing
DLCshifumi-PT-4a-13: LTL false LTL model checker
DLCshifumi-PT-4a-14: INITIAL false preprocessing
DLCshifumi-PT-4a-15: INITIAL false preprocessing

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DLCshifumi-PT-4a-10: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 394 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DLCshifumi-PT-4a-00: CONJ false LTL model checker
DLCshifumi-PT-4a-01: CONJ false LTL model checker
DLCshifumi-PT-4a-02: CONJ false state space /ER
DLCshifumi-PT-4a-03: INITIAL false preprocessing
DLCshifumi-PT-4a-04: INITIAL false preprocessing
DLCshifumi-PT-4a-05: LTL true LTL model checker
DLCshifumi-PT-4a-06: INITIAL true preprocessing
DLCshifumi-PT-4a-07: LTL false LTL model checker
DLCshifumi-PT-4a-08: CONJ false skeleton: LTL model checker
DLCshifumi-PT-4a-09: LTL true LTL model checker
DLCshifumi-PT-4a-11: F true state space / EG
DLCshifumi-PT-4a-12: CONJ false preprocessing
DLCshifumi-PT-4a-13: LTL false LTL model checker
DLCshifumi-PT-4a-14: INITIAL false preprocessing
DLCshifumi-PT-4a-15: INITIAL false preprocessing

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DLCshifumi-PT-4a-10: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 399 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DLCshifumi-PT-4a-00: CONJ false LTL model checker
DLCshifumi-PT-4a-01: CONJ false LTL model checker
DLCshifumi-PT-4a-02: CONJ false state space /ER
DLCshifumi-PT-4a-03: INITIAL false preprocessing
DLCshifumi-PT-4a-04: INITIAL false preprocessing
DLCshifumi-PT-4a-05: LTL true LTL model checker
DLCshifumi-PT-4a-06: INITIAL true preprocessing
DLCshifumi-PT-4a-07: LTL false LTL model checker
DLCshifumi-PT-4a-08: CONJ false skeleton: LTL model checker
DLCshifumi-PT-4a-09: LTL true LTL model checker
DLCshifumi-PT-4a-11: F true state space / EG
DLCshifumi-PT-4a-12: CONJ false preprocessing
DLCshifumi-PT-4a-13: LTL false LTL model checker
DLCshifumi-PT-4a-14: INITIAL false preprocessing
DLCshifumi-PT-4a-15: INITIAL false preprocessing

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DLCshifumi-PT-4a-10: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 405 secs. Pages in use: 32
# running tasks: 0 of 4 Visible: 16
/home/mcc/BenchKit/BenchKit_head.sh: line 62: 392 Killed lola --conf=$BIN_DIR/configfiles/ltlcardinalityconf --formula=$DIR/LTLCardinality.xml --verdictfile=$DIR/GenericPropertiesVerdict.xml $DIR/model.pnml

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="DLCshifumi-PT-4a"
export BK_EXAMINATION="LTLCardinality"
export BK_TOOL="lola"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-4028"
echo " Executing tool lola"
echo " Input is DLCshifumi-PT-4a, examination is LTLCardinality"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r061-tall-162038393300484"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/DLCshifumi-PT-4a.tgz
mv DLCshifumi-PT-4a execution
cd execution
if [ "LTLCardinality" = "ReachabilityDeadlock" ] || [ "LTLCardinality" = "UpperBounds" ] || [ "LTLCardinality" = "QuasiLiveness" ] || [ "LTLCardinality" = "StableMarking" ] || [ "LTLCardinality" = "Liveness" ] || [ "LTLCardinality" = "OneSafe" ] || [ "LTLCardinality" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "LTLCardinality" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "LTLCardinality" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "LTLCardinality.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property LTLCardinality.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "LTLCardinality.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' LTLCardinality.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ "LTLCardinality" = "ReachabilityDeadlock" ] || [ "LTLCardinality" = "QuasiLiveness" ] || [ "LTLCardinality" = "StableMarking" ] || [ "LTLCardinality" = "Liveness" ] || [ "LTLCardinality" = "OneSafe" ] ; then
echo "FORMULA_NAME LTLCardinality"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;