About the Execution of LoLA for DLCround-PT-13a
Execution Summary | |||||
Max Memory Used (MB) |
Time wait (ms) | CPU Usage (ms) | I/O Wait (ms) | Computed Result | Execution Status |
12516.447 | 3600000.00 | 517218.00 | 8696.60 | FFFFFF?FFFFTFFF? | normal |
Execution Chart
We display below the execution chart for this examination (boot time has been removed).
Trace from the execution
Formatting '/data/fkordon/mcc2021-input.r061-tall-162038393200437.qcow2', fmt=qcow2 size=4294967296 backing_file='/data/fkordon/mcc2021-input.qcow2' encryption=off cluster_size=65536 lazy_refcounts=off
Waiting for the VM to be ready (probing ssh)
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=====================================================================
Generated by BenchKit 2-4028
Executing tool lola
Input is DLCround-PT-13a, examination is LTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r061-tall-162038393200437
=====================================================================
--------------------
preparation of the directory to be used:
/home/mcc/execution
total 1.4M
-rw-r--r-- 1 mcc users 13K May 5 16:58 CTLCardinality.txt
-rw-r--r-- 1 mcc users 121K May 5 16:58 CTLCardinality.xml
-rw-r--r-- 1 mcc users 11K May 5 16:58 CTLFireability.txt
-rw-r--r-- 1 mcc users 95K May 5 16:58 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K May 6 14:48 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.4K May 6 14:48 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 3.2K Mar 28 15:59 LTLCardinality.txt
-rw-r--r-- 1 mcc users 23K Mar 28 15:59 LTLCardinality.xml
-rw-r--r-- 1 mcc users 1.9K Mar 28 15:59 LTLFireability.txt
-rw-r--r-- 1 mcc users 15K Mar 28 15:59 LTLFireability.xml
-rw-r--r-- 1 mcc users 3.5K Mar 23 09:04 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 19K Mar 23 09:04 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 2.9K Mar 22 16:34 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 18K Mar 22 16:34 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.6K Mar 22 09:10 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.6K Mar 22 09:10 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 May 5 16:51 equiv_col
-rw-r--r-- 1 mcc users 4 May 5 16:51 instance
-rw-r--r-- 1 mcc users 6 May 5 16:51 iscolored
-rw-r--r-- 1 mcc users 987K May 5 16:51 model.pnml
--------------------
content from stdout:
=== Data for post analysis generated by BenchKit (invocation template)
The expected result is a vector of booleans
BOOL_VECTOR
here is the order used to build the result vector(from text file)
FORMULA_NAME DLCround-PT-13a-00
FORMULA_NAME DLCround-PT-13a-01
FORMULA_NAME DLCround-PT-13a-02
FORMULA_NAME DLCround-PT-13a-03
FORMULA_NAME DLCround-PT-13a-04
FORMULA_NAME DLCround-PT-13a-05
FORMULA_NAME DLCround-PT-13a-06
FORMULA_NAME DLCround-PT-13a-07
FORMULA_NAME DLCround-PT-13a-08
FORMULA_NAME DLCround-PT-13a-09
FORMULA_NAME DLCround-PT-13a-10
FORMULA_NAME DLCround-PT-13a-11
FORMULA_NAME DLCround-PT-13a-12
FORMULA_NAME DLCround-PT-13a-13
FORMULA_NAME DLCround-PT-13a-14
FORMULA_NAME DLCround-PT-13a-15
=== Now, execution of the tool begins
BK_START 1620456291163
starting LoLA
BK_INPUT DLCround-PT-13a
BK_EXAMINATION: LTLFireability
bin directory: /home/mcc/BenchKit/bin
current directory: /home/mcc/execution
LTLFireability
FORMULA DLCround-PT-13a-07 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA DLCround-PT-13a-14 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA DLCround-PT-13a-13 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA DLCround-PT-13a-00 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA DLCround-PT-13a-10 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA DLCround-PT-13a-02 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA DLCround-PT-13a-12 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA DLCround-PT-13a-11 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA DLCround-PT-13a-09 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA DLCround-PT-13a-08 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA DLCround-PT-13a-04 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA DLCround-PT-13a-03 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA DLCround-PT-13a-05 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA DLCround-PT-13a-01 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
BK_TIME_CONFINEMENT_REACHED
--------------------
content from stderr:
lola: MEM LIMIT 32
lola: MEM LIMIT 5
lola: NET
lola: input: PNML file (--pnmlnet)
lola: reading net from /home/mcc/execution/model.pnml
lola: reading pnml
lola: PNML file contains place/transition net
lola: finished parsing
lola: closed net file /home/mcc/execution/model.pnml
lola: Reading formula.
lola: Using XML format (--xmlformula)
lola: reading XML formula
lola: reading formula from /home/mcc/execution/LTLFireability.xml
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:535
lola: rewrite Frontend/Parser/formula_rewrite.k:433
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:346
lola: rewrite Frontend/Parser/formula_rewrite.k:376
lola: rewrite Frontend/Parser/formula_rewrite.k:370
lola: rewrite Frontend/Parser/formula_rewrite.k:421
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:96
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:352
lola: rewrite Frontend/Parser/formula_rewrite.k:376
lola: rewrite Frontend/Parser/formula_rewrite.k:121
lola: rewrite Frontend/Parser/formula_rewrite.k:352
lola: rewrite Frontend/Parser/formula_rewrite.k:535
lola: rewrite Frontend/Parser/formula_rewrite.k:433
lola: rewrite Frontend/Parser/formula_rewrite.k:421
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:355
lola: rewrite Frontend/Parser/formula_rewrite.k:433
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:373
lola: rewrite Frontend/Parser/formula_rewrite.k:421
lola: rewrite Frontend/Parser/formula_rewrite.k:346
lola: rewrite Frontend/Parser/formula_rewrite.k:379
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:535
lola: rewrite Frontend/Parser/formula_rewrite.k:150
lola: rewrite Frontend/Parser/formula_rewrite.k:535
lola: rewrite Frontend/Parser/formula_rewrite.k:352
lola: rewrite Frontend/Parser/formula_rewrite.k:352
lola: rewrite Frontend/Parser/formula_rewrite.k:352
lola: rewrite Frontend/Parser/formula_rewrite.k:352
lola: rewrite Frontend/Parser/formula_rewrite.k:352
lola: rewrite Frontend/Parser/formula_rewrite.k:349
lola: rewrite Frontend/Parser/formula_rewrite.k:535
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:352
lola: rewrite Frontend/Parser/formula_rewrite.k:355
lola: rewrite Frontend/Parser/formula_rewrite.k:379
lola: rewrite Frontend/Parser/formula_rewrite.k:535
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: Created skeleton in 0.000000 secs.
lola: NOTDEADLOCKFREE
lola: Created skeleton in 0.000000 secs.
lola: NOTDEADLOCKFREE
lola: LAUNCH task # 72 (type SKEL/SRCH) for 0 DLCround-PT-13a-00
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: NOTDEADLOCKFREE
lola: Created skeleton in 0.000000 secs.
lola: Rule S: 0 transitions removed,0 places removed
lola: NOTDEADLOCKFREE
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: NOTDEADLOCKFREE
lola: LAUNCH INITIAL
lola: LAUNCH task # 32 (type CNST) for 29 DLCround-PT-13a-07
lola: time limit : 0 sec
lola: memory limit: 0 pages
lola: FINISHED task # 32 (type CNST) for DLCround-PT-13a-07
lola: result : false
lola: LAUNCH task # 73 (type SKEL/SRCH) for 26 DLCround-PT-13a-06
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: RELEASE
lola: Created skeleton in 0.000000 secs.
lola: RELEASE
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: planning for (null) stopped (result already fixed).
lola: planning for (null) stopped (result already fixed).
lola: Created skeleton in 0.000000 secs.
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lola: result : true
lola: time used : 0.000000
lola: memory pages used : 1
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lola: memory pages used : 0
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lola: time used : 0.000000
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lola: result : true
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
lola: LAUNCH task # 3 (type EXCL) for 0 DLCround-PT-13a-00
lola: time limit : 224 sec
lola: memory limit: 32 pages
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lola: result : false
lola: markings : 12
lola: fired transitions : 101
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lola: markings : 13
lola: fired transitions : 135
lola: time used : 0.000000
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lola: result : false
lola: markings : 15
lola: fired transitions : 190
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DLCround-PT-13a-10: LTL false LTL model checker
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DLCround-PT-13a-13: AG false state space
DLCround-PT-13a-14: CONJ false state space
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DLCround-PT-13a-04: CONJ 0 2 0 0 2 0 0 0
DLCround-PT-13a-05: LTL 0 1 0 0 1 0 0 0
DLCround-PT-13a-06: LTL 0 1 1 0 0 0 0 0
DLCround-PT-13a-08: LTL 0 1 0 0 1 0 0 0
DLCround-PT-13a-09: CONJ 0 2 0 0 2 0 0 0
DLCround-PT-13a-11: LTL 0 1 0 0 1 0 0 0
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70 LTL EXCL 3/327 1/32 DLCround-PT-13a-15 111638 m, 22327 m/sec, 2860508 t fired, .
73 LTL SRCH 5/3600 1/5 DLCround-PT-13a-06 435553 m, 87110 m/sec, 5334541 t fired, .
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DLCround-PT-13a-10: LTL false LTL model checker
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DLCround-PT-13a-13: AG false state space
DLCround-PT-13a-14: CONJ false state space
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DLCround-PT-13a-04: CONJ 0 2 0 0 2 0 0 0
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DLCround-PT-13a-09: CONJ 0 2 0 0 2 0 0 0
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70 LTL EXCL 8/327 2/32 DLCround-PT-13a-15 299169 m, 37506 m/sec, 8044370 t fired, .
73 LTL SRCH 10/3600 1/5 DLCround-PT-13a-06 1080106 m, 128910 m/sec, 13512359 t fired, .
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DLCround-PT-13a-13: AG false state space
DLCround-PT-13a-14: CONJ false state space
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70 LTL EXCL 13/327 4/32 DLCround-PT-13a-15 486694 m, 37505 m/sec, 13047109 t fired, .
73 LTL SRCH 15/3600 1/5 DLCround-PT-13a-06 1725771 m, 129133 m/sec, 21528323 t fired, .
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70 LTL EXCL 18/327 5/32 DLCround-PT-13a-15 664990 m, 35659 m/sec, 18084070 t fired, .
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70 LTL EXCL 23/327 6/32 DLCround-PT-13a-15 837734 m, 34548 m/sec, 23047830 t fired, .
73 LTL SRCH 25/3600 1/5 DLCround-PT-13a-06 2932548 m, 119299 m/sec, 37225267 t fired, .
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DLCround-PT-13a-10: LTL false LTL model checker
DLCround-PT-13a-12: F false state space / EG
DLCround-PT-13a-13: AG false state space
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70 LTL EXCL 28/327 7/32 DLCround-PT-13a-15 1015807 m, 35614 m/sec, 28039978 t fired, .
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70 LTL EXCL 33/327 8/32 DLCround-PT-13a-15 1195019 m, 35842 m/sec, 33064653 t fired, .
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DLCround-PT-13a-13: AG false state space
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70 LTL EXCL 38/327 9/32 DLCround-PT-13a-15 1371589 m, 35314 m/sec, 38015278 t fired, .
73 LTL SRCH 40/3600 1/5 DLCround-PT-13a-06 4602239 m, 115715 m/sec, 60069848 t fired, .
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DLCround-PT-13a-13: AG false state space
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DLCround-PT-13a-14: CONJ false state space
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lola: LAUNCH task # 54 (type EXCL) for 53 DLCround-PT-13a-11
lola: time limit : 345 sec
lola: memory limit: 32 pages
lola: FINISHED task # 54 (type EXCL) for DLCround-PT-13a-11
lola: result : true
lola: markings : 2
lola: fired transitions : 1
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 48 (type EXCL) for 43 DLCround-PT-13a-09
lola: time limit : 383 sec
lola: memory limit: 32 pages
lola: FINISHED task # 48 (type EXCL) for DLCround-PT-13a-09
lola: result : false
lola: markings : 4
lola: fired transitions : 4
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 41 (type EXCL) for 40 DLCround-PT-13a-08
lola: time limit : 492 sec
lola: memory limit: 32 pages
lola: FINISHED task # 41 (type EXCL) for DLCround-PT-13a-08
lola: result : false
lola: markings : 5
lola: fired transitions : 5
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 27 (type EXCL) for 26 DLCround-PT-13a-06
lola: time limit : 575 sec
lola: memory limit: 32 pages
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Sequence of Actions to be Executed by the VM
This is useful if one wants to reexecute the tool in the VM from the submitted image disk.
set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="DLCround-PT-13a"
export BK_EXAMINATION="LTLFireability"
export BK_TOOL="lola"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"
# this is specific to your benchmark or test
export BIN_DIR="$HOME/BenchKit/bin"
# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi
# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-4028"
echo " Executing tool lola"
echo " Input is DLCround-PT-13a, examination is LTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r061-tall-162038393200437"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"
tar xzf /home/mcc/BenchKit/INPUTS/DLCround-PT-13a.tgz
mv DLCround-PT-13a execution
cd execution
if [ "LTLFireability" = "ReachabilityDeadlock" ] || [ "LTLFireability" = "UpperBounds" ] || [ "LTLFireability" = "QuasiLiveness" ] || [ "LTLFireability" = "StableMarking" ] || [ "LTLFireability" = "Liveness" ] || [ "LTLFireability" = "OneSafe" ] || [ "LTLFireability" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh
echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "LTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "LTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "LTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property LTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "LTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '
echo "FORMULA_NAME $x"
done
elif [ "LTLFireability" = "ReachabilityDeadlock" ] || [ "LTLFireability" = "QuasiLiveness" ] || [ "LTLFireability" = "StableMarking" ] || [ "LTLFireability" = "Liveness" ] || [ "LTLFireability" = "OneSafe" ] ; then
echo "FORMULA_NAME LTLFireability"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;