About the Execution of LoLA for CSRepetitions-COL-07
| Execution Summary | |||||
| Max Memory Used (MB) |
Time wait (ms) | CPU Usage (ms) | I/O Wait (ms) | Computed Result | Execution Status |
| 8896.779 | 381417.00 | 393490.00 | 90.10 | F?FFFF???FFTTFFF | normal |
Execution Chart
We display below the execution chart for this examination (boot time has been removed).
Trace from the execution
Formatting '/mnt/tpsp/fkordon/mcc2021-input.r023-tajo-162038139800517.qcow2', fmt=qcow2 size=4294967296 backing_file='/mnt/tpsp/fkordon/mcc2021-input.qcow2' encryption=off cluster_size=65536 lazy_refcounts=off
Waiting for the VM to be ready (probing ssh)
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=====================================================================
Generated by BenchKit 2-4028
Executing tool lola
Input is CSRepetitions-COL-07, examination is LTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r023-tajo-162038139800517
=====================================================================
--------------------
preparation of the directory to be used:
/home/mcc/execution
total 416K
-rw-r--r-- 1 mcc users 22K May 5 16:58 CTLCardinality.txt
-rw-r--r-- 1 mcc users 147K May 10 09:42 CTLCardinality.xml
-rw-r--r-- 1 mcc users 11K May 5 16:58 CTLFireability.txt
-rw-r--r-- 1 mcc users 75K May 10 09:42 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K May 6 14:48 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.5K May 6 14:48 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 4.2K Mar 28 15:49 LTLCardinality.txt
-rw-r--r-- 1 mcc users 24K Mar 28 15:49 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.4K Mar 28 15:49 LTLFireability.txt
-rw-r--r-- 1 mcc users 15K Mar 28 15:49 LTLFireability.xml
-rw-r--r-- 1 mcc users 4.5K Mar 23 03:02 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 20K Mar 23 03:02 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 3.4K Mar 22 12:20 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 18K Mar 22 12:19 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.8K Mar 22 09:10 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.9K Mar 22 09:10 UpperBounds.xml
-rw-r--r-- 1 mcc users 5 May 5 16:51 equiv_pt
-rw-r--r-- 1 mcc users 3 May 5 16:51 instance
-rw-r--r-- 1 mcc users 5 May 5 16:51 iscolored
-rw-r--r-- 1 mcc users 16K May 5 16:51 model.pnml
--------------------
content from stdout:
=== Data for post analysis generated by BenchKit (invocation template)
The expected result is a vector of booleans
BOOL_VECTOR
here is the order used to build the result vector(from text file)
FORMULA_NAME CSRepetitions-COL-07-00
FORMULA_NAME CSRepetitions-COL-07-01
FORMULA_NAME CSRepetitions-COL-07-02
FORMULA_NAME CSRepetitions-COL-07-03
FORMULA_NAME CSRepetitions-COL-07-04
FORMULA_NAME CSRepetitions-COL-07-05
FORMULA_NAME CSRepetitions-COL-07-06
FORMULA_NAME CSRepetitions-COL-07-07
FORMULA_NAME CSRepetitions-COL-07-08
FORMULA_NAME CSRepetitions-COL-07-09
FORMULA_NAME CSRepetitions-COL-07-10
FORMULA_NAME CSRepetitions-COL-07-11
FORMULA_NAME CSRepetitions-COL-07-12
FORMULA_NAME CSRepetitions-COL-07-13
FORMULA_NAME CSRepetitions-COL-07-14
FORMULA_NAME CSRepetitions-COL-07-15
=== Now, execution of the tool begins
BK_START 1620872851490
starting LoLA
BK_INPUT CSRepetitions-COL-07
BK_EXAMINATION: LTLFireability
bin directory: /home/mcc/BenchKit/bin
current directory: /home/mcc/execution
LTLFireability
FORMULA CSRepetitions-COL-07-10 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA CSRepetitions-COL-07-00 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA CSRepetitions-COL-07-05 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA CSRepetitions-COL-07-13 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA CSRepetitions-COL-07-11 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA CSRepetitions-COL-07-09 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA CSRepetitions-COL-07-04 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA CSRepetitions-COL-07-02 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA CSRepetitions-COL-07-12 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA CSRepetitions-COL-07-15 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA CSRepetitions-COL-07-14 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA CSRepetitions-COL-07-03 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
BK_STOP 1620873232907
--------------------
content from stderr:
lola: MEM LIMIT 32
lola: MEM LIMIT 5
lola: NET
lola: input: PNML file (--pnmlnet)
lola: reading net from /home/mcc/execution/model.pnml
lola: reading pnml
lola: PNML file contains High-Level net
lola: finished parsing
lola: closed net file /home/mcc/execution/model.pnml
lola: Reading HL formula in XML format (--xmlformula)
lola: reading formula from /home/mcc/execution/LTLFireability.xml
lola: rewrite Frontend/Parser/formula_rewrite.k:535
lola: rewrite Frontend/Parser/formula_rewrite.k:379
lola: rewrite Frontend/Parser/formula_rewrite.k:436
lola: rewrite Frontend/Parser/formula_rewrite.k:521
lola: rewrite Frontend/Parser/formula_rewrite.k:427
lola: rewrite Frontend/Parser/formula_rewrite.k:427
lola: rewrite Frontend/Parser/formula_rewrite.k:370
lola: rewrite Frontend/Parser/formula_rewrite.k:370
lola: rewrite Frontend/Parser/formula_rewrite.k:490
lola: rewrite Frontend/Parser/formula_rewrite.k:352
lola: rewrite Frontend/Parser/formula_rewrite.k:352
lola: rewrite Frontend/Parser/formula_rewrite.k:433
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:370
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:550
lola: rewrite Frontend/Parser/formula_rewrite.k:379
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:499
lola: rewrite Frontend/Parser/formula_rewrite.k:346
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:535
lola: rewrite Frontend/Parser/formula_rewrite.k:415
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:355
lola: rewrite Frontend/Parser/formula_rewrite.k:355
lola: rewrite Frontend/Parser/formula_rewrite.k:355
lola: rewrite Frontend/Parser/formula_rewrite.k:346
lola: rewrite Frontend/Parser/formula_rewrite.k:436
lola: rewrite Frontend/Parser/formula_rewrite.k:373
lola: rewrite Frontend/Parser/formula_rewrite.k:493
lola: NOTDEADLOCKFREE
lola: start findlow
lola: CHECK FINDLOW FOR TRANS Send_Request
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:788
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:788
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:788
lola: INVENT VAR FOR PLACE Client_Sending
lola: INVENT VAR FOR PLACE RequestBufferSlots
lola: CHECK EQ TRANS Send_Request
lola: NOTDEADLOCKFREE
lola: LAUNCH task # 62 (type SKEL/FNDP) for 38 CSRepetitions-COL-07-10
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 63 (type SKEL/EQUN) for 38 CSRepetitions-COL-07-10
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:788
lola: TR BINDINGS
lola: LAUNCH task # 64 (type SKEL/SRCH) for 38 CSRepetitions-COL-07-10
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 65 (type SKEL/SRCH) for 38 CSRepetitions-COL-07-10
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: CHECK FINDLOW FOR TRANS Read_Request
lola: NOTDEADLOCKFREE
lola: FINISHED task # 62 (type SKEL/FNDP) for CSRepetitions-COL-07-10
lola: result : true
lola: tried executions : 1
lola: time used : 1.000000
lola: memory pages used : 0
lola: CANCELED task # 63 (type EQUN) for CSRepetitions-COL-07-10 (obsolete)
lola: CANCELED task # 64 (type SRCH) for CSRepetitions-COL-07-10 (obsolete)
lola: CANCELED task # 65 (type SRCH) for CSRepetitions-COL-07-10 (obsolete)
lola: FINISHED task # 65 (type SKEL/SRCH) for CSRepetitions-COL-07-10
lola: result : true
lola: markings : 2
lola: fired transitions : 1
lola: time used : 1.000000
lola: memory pages used : 1
lola: INVENT VAR FOR PLACE Server_Waiting
lola: INVENT VAR FOR PLACE RequestBuffer
lola: CHECK EQ TRANS Read_Request
lola: TR BINDINGS DONE
lola: Places: 498, Transitions: 833
lola: FINISHED task # 63 (type SKEL/EQUN) for CSRepetitions-COL-07-10
lola: result : unknown
lola: @ trans Prepare_Request
lola: @ trans Read_Request
lola: CHECK FINDLOW FOR TRANS Send_Answer
lola: @ trans Send_Answer
lola: INVENT VAR FOR PLACE Server_Anwering
lola: INVENT VAR FOR PLACE Client_Sending
lola: CHECK EQ TRANS Send_Answer
lola: @ trans Lose_Request
lola: @ trans Send_Request
lola: findlow criterion violated for transition 2
lola: CHECK FINDLOW FOR TRANS Lose_Request
lola: INVENT VAR FOR PLACE RequestBuffer
lola: CHECK EQ TRANS Lose_Request
lola: CHECK FINDLOW FOR TRANS Prepare_Request
lola: INVENT VAR FOR PLACE Client_Waiting
lola: CHECK EQ TRANS Prepare_Request
lola: findlow criterion violated for 1 clusters
lola: Time for checking findlow: 1.000000
lola: TRANS 3: Send_Request is minimal, eq to 3
lola: TRANS 1: Read_Request is minimal, eq to 1
lola: TRANS 2: Send_Answer is minimal, eq to 2
lola: TRANS 0: Lose_Request is minimal, eq to 0
lola: TRANS 4: Prepare_Request is minimal, eq to 4
lola: HLNOFINDLOW
lola: HLNOFINDLOW
lola: HLNOFINDLOW
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
CSRepetitions-COL-07-00: CONJ 0 0 0 0 2 0 0 0
CSRepetitions-COL-07-01: LTL 0 0 0 0 1 0 0 0
CSRepetitions-COL-07-02: LTL 0 0 0 0 1 0 0 0
CSRepetitions-COL-07-03: LTL 0 0 0 0 1 0 0 0
CSRepetitions-COL-07-04: LTL 0 0 0 0 1 0 0 0
CSRepetitions-COL-07-05: AG 0 0 0 0 1 0 0 0
CSRepetitions-COL-07-06: LTL 0 0 0 0 1 0 0 0
CSRepetitions-COL-07-07: LTL 0 0 0 0 1 0 0 0
CSRepetitions-COL-07-08: CONJ 1 0 0 0 1 0 0 0
CSRepetitions-COL-07-09: LTL 1 0 0 0 0 0 0 0
CSRepetitions-COL-07-10: CONJ 0 0 0 0 4 0 0 1
CSRepetitions-COL-07-11: LTL 0 0 0 0 1 0 0 0
CSRepetitions-COL-07-12: F 0 0 0 0 1 0 0 0
CSRepetitions-COL-07-13: LTL 0 0 0 0 1 0 0 0
CSRepetitions-COL-07-14: LTL 0 0 0 0 1 0 0 0
CSRepetitions-COL-07-15: LTL 0 0 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
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FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
CSRepetitions-COL-07-00: CONJ 0 0 0 0 2 0 0 0
CSRepetitions-COL-07-01: LTL 0 0 0 0 1 0 0 0
CSRepetitions-COL-07-02: LTL 0 0 0 0 1 0 0 0
CSRepetitions-COL-07-03: LTL 0 0 0 0 1 0 0 0
CSRepetitions-COL-07-04: LTL 0 0 0 0 1 0 0 0
CSRepetitions-COL-07-05: AG 0 0 0 0 1 0 0 0
CSRepetitions-COL-07-06: LTL 0 0 0 0 1 0 0 0
CSRepetitions-COL-07-07: LTL 0 0 0 0 1 0 0 0
CSRepetitions-COL-07-08: CONJ 1 0 0 0 1 0 0 0
CSRepetitions-COL-07-09: LTL 1 0 0 0 0 0 0 0
CSRepetitions-COL-07-10: CONJ 0 0 0 0 4 0 0 1
CSRepetitions-COL-07-11: LTL 0 0 0 0 1 0 0 0
CSRepetitions-COL-07-12: F 0 0 0 0 1 0 0 0
CSRepetitions-COL-07-13: LTL 0 0 0 0 1 0 0 0
CSRepetitions-COL-07-14: LTL 0 0 0 0 1 0 0 0
CSRepetitions-COL-07-15: LTL 0 0 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
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FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
CSRepetitions-COL-07-00: CONJ 0 0 0 0 2 0 0 0
CSRepetitions-COL-07-01: LTL 0 0 0 0 1 0 0 0
CSRepetitions-COL-07-02: LTL 0 0 0 0 1 0 0 0
CSRepetitions-COL-07-03: LTL 0 0 0 0 1 0 0 0
CSRepetitions-COL-07-04: LTL 0 0 0 0 1 0 0 0
CSRepetitions-COL-07-05: AG 0 0 0 0 1 0 0 0
CSRepetitions-COL-07-06: LTL 0 0 0 0 1 0 0 0
CSRepetitions-COL-07-07: LTL 0 0 0 0 1 0 0 0
CSRepetitions-COL-07-08: CONJ 1 0 0 0 1 0 0 0
CSRepetitions-COL-07-09: LTL 1 0 0 0 0 0 0 0
CSRepetitions-COL-07-10: CONJ 0 0 0 0 4 0 0 1
CSRepetitions-COL-07-11: LTL 0 0 0 0 1 0 0 0
CSRepetitions-COL-07-12: F 0 0 0 0 1 0 0 0
CSRepetitions-COL-07-13: LTL 0 0 0 0 1 0 0 0
CSRepetitions-COL-07-14: LTL 0 0 0 0 1 0 0 0
CSRepetitions-COL-07-15: LTL 0 0 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
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FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
CSRepetitions-COL-07-00: CONJ 0 0 0 0 2 0 0 0
CSRepetitions-COL-07-01: LTL 0 0 0 0 1 0 0 0
CSRepetitions-COL-07-02: LTL 0 0 0 0 1 0 0 0
CSRepetitions-COL-07-03: LTL 0 0 0 0 1 0 0 0
CSRepetitions-COL-07-04: LTL 0 0 0 0 1 0 0 0
CSRepetitions-COL-07-05: AG 0 0 0 0 1 0 0 0
CSRepetitions-COL-07-06: LTL 0 0 0 0 1 0 0 0
CSRepetitions-COL-07-07: LTL 0 0 0 0 1 0 0 0
CSRepetitions-COL-07-08: CONJ 1 0 0 0 1 0 0 0
CSRepetitions-COL-07-09: LTL 1 0 0 0 0 0 0 0
CSRepetitions-COL-07-10: CONJ 0 0 0 0 4 0 0 1
CSRepetitions-COL-07-11: LTL 0 0 0 0 1 0 0 0
CSRepetitions-COL-07-12: F 0 0 0 0 1 0 0 0
CSRepetitions-COL-07-13: LTL 0 0 0 0 1 0 0 0
CSRepetitions-COL-07-14: LTL 0 0 0 0 1 0 0 0
CSRepetitions-COL-07-15: LTL 0 0 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
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lola: RELEASE
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
CSRepetitions-COL-07-00: CONJ 0 0 0 0 2 0 0 0
CSRepetitions-COL-07-01: LTL 0 0 0 0 1 0 0 0
CSRepetitions-COL-07-02: LTL 0 0 0 0 1 0 0 0
CSRepetitions-COL-07-03: LTL 0 0 0 0 1 0 0 0
CSRepetitions-COL-07-04: LTL 0 0 0 0 1 0 0 0
CSRepetitions-COL-07-05: AG 0 0 0 0 1 0 0 0
CSRepetitions-COL-07-06: LTL 0 0 0 0 1 0 0 0
CSRepetitions-COL-07-07: LTL 0 0 0 0 1 0 0 0
CSRepetitions-COL-07-08: CONJ 1 0 0 0 1 0 0 0
CSRepetitions-COL-07-09: LTL 1 0 0 0 0 0 0 0
CSRepetitions-COL-07-10: CONJ 0 0 0 0 4 0 0 1
CSRepetitions-COL-07-11: LTL 0 0 0 0 1 0 0 0
CSRepetitions-COL-07-12: F 0 0 0 0 1 0 0 0
CSRepetitions-COL-07-13: LTL 0 0 0 0 1 0 0 0
CSRepetitions-COL-07-14: LTL 0 0 0 0 1 0 0 0
CSRepetitions-COL-07-15: LTL 0 0 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
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lola: Rule S: 0 transitions removed,0 places removed
lola: LAUNCH task # 66 (type SKEL/SRCH) for 28 CSRepetitions-COL-07-08
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 67 (type SKEL/SRCH) for 35 CSRepetitions-COL-07-09
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 66 (type SKEL/SRCH) for CSRepetitions-COL-07-08
lola: result : true
lola: markings : 2
lola: fired transitions : 1
lola: time used : 0.000000
lola: memory pages used : 1
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
CSRepetitions-COL-07-00: CONJ 0 0 0 0 2 0 0 0
CSRepetitions-COL-07-01: LTL 0 0 0 0 1 0 0 0
CSRepetitions-COL-07-02: LTL 0 0 0 0 1 0 0 0
CSRepetitions-COL-07-03: LTL 0 0 0 0 1 0 0 0
CSRepetitions-COL-07-04: LTL 0 0 0 0 1 0 0 0
CSRepetitions-COL-07-05: AG 0 0 0 0 1 0 0 0
CSRepetitions-COL-07-06: LTL 0 0 0 0 1 0 0 0
CSRepetitions-COL-07-07: LTL 0 0 0 0 1 0 0 0
CSRepetitions-COL-07-08: CONJ 0 0 0 0 2 0 0 0
CSRepetitions-COL-07-09: LTL 0 0 1 0 0 0 0 0
CSRepetitions-COL-07-10: CONJ 0 0 0 0 4 0 0 1
CSRepetitions-COL-07-11: LTL 0 0 0 0 1 0 0 0
CSRepetitions-COL-07-12: F 0 0 0 0 1 0 0 0
CSRepetitions-COL-07-13: LTL 0 0 0 0 1 0 0 0
CSRepetitions-COL-07-14: LTL 0 0 0 0 1 0 0 0
CSRepetitions-COL-07-15: LTL 0 0 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
67 LTL SRCH 0/3559 0/5 CSRepetitions-COL-07-09 --
Time elapsed: 41 secs. Pages in use: 1
# running tasks: 1 of 4 Visible: 16
lola: FINISHED task # 67 (type SKEL/SRCH) for CSRepetitions-COL-07-09
lola: result : false
lola: markings : 60
lola: fired transitions : 60
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 23 (type EXCL) for 22 CSRepetitions-COL-07-06
lola: time limit : 187 sec
lola: memory limit: 32 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:788
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:788
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:788
lola: LAUNCH task # 69 (type FNDP) for 38 CSRepetitions-COL-07-10
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 70 (type EQUN) for 38 CSRepetitions-COL-07-10
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:788
lola: LAUNCH task # 72 (type SRCH) for 38 CSRepetitions-COL-07-10
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:749
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: FINISHED task # 72 (type SRCH) for CSRepetitions-COL-07-10
lola: result : true
lola: markings : 3
lola: fired transitions : 2
lola: time used : 0.000000
lola: memory pages used : 1
lola: CANCELED task # 69 (type FNDP) for CSRepetitions-COL-07-10 (obsolete)
lola: CANCELED task # 70 (type EQUN) for CSRepetitions-COL-07-10 (obsolete)
lola: LAUNCH task # 79 (type FNDP) for 0 CSRepetitions-COL-07-00
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 80 (type EQUN) for 0 CSRepetitions-COL-07-00
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
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CSRepetitions-COL-07-10: CONJ false search / frozen tokens
CSRepetitions-COL-07-11: LTL true LTL model checker
CSRepetitions-COL-07-12: F true state space / EG
CSRepetitions-COL-07-13: LTL false LTL model checker
CSRepetitions-COL-07-14: LTL false LTL model checker
CSRepetitions-COL-07-15: LTL false LTL model checker
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CSRepetitions-COL-07-08: CONJ 0 0 0 0 3 0 1 0
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8 LTL EXCL 40/3284 21/32 CSRepetitions-COL-07-01 2985516 m, 71659 m/sec, 6833723 t fired, .
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CSRepetitions-COL-07-04: LTL false LTL model checker
CSRepetitions-COL-07-05: AG false findpath
CSRepetitions-COL-07-09: LTL false LTL model checker
CSRepetitions-COL-07-10: CONJ false search / frozen tokens
CSRepetitions-COL-07-11: LTL true LTL model checker
CSRepetitions-COL-07-12: F true state space / EG
CSRepetitions-COL-07-13: LTL false LTL model checker
CSRepetitions-COL-07-14: LTL false LTL model checker
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8 LTL EXCL 45/3284 23/32 CSRepetitions-COL-07-01 3352468 m, 73390 m/sec, 7693002 t fired, .
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CSRepetitions-COL-07-04: LTL false LTL model checker
CSRepetitions-COL-07-05: AG false findpath
CSRepetitions-COL-07-09: LTL false LTL model checker
CSRepetitions-COL-07-10: CONJ false search / frozen tokens
CSRepetitions-COL-07-11: LTL true LTL model checker
CSRepetitions-COL-07-12: F true state space / EG
CSRepetitions-COL-07-13: LTL false LTL model checker
CSRepetitions-COL-07-14: LTL false LTL model checker
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8 LTL EXCL 50/3284 26/32 CSRepetitions-COL-07-01 3720097 m, 73525 m/sec, 8560697 t fired, .
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CSRepetitions-COL-07-04: LTL false LTL model checker
CSRepetitions-COL-07-05: AG false findpath
CSRepetitions-COL-07-09: LTL false LTL model checker
CSRepetitions-COL-07-10: CONJ false search / frozen tokens
CSRepetitions-COL-07-11: LTL true LTL model checker
CSRepetitions-COL-07-12: F true state space / EG
CSRepetitions-COL-07-13: LTL false LTL model checker
CSRepetitions-COL-07-14: LTL false LTL model checker
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8 LTL EXCL 55/3284 28/32 CSRepetitions-COL-07-01 4091096 m, 74199 m/sec, 9447964 t fired, .
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CSRepetitions-COL-07-04: LTL false LTL model checker
CSRepetitions-COL-07-05: AG false findpath
CSRepetitions-COL-07-09: LTL false LTL model checker
CSRepetitions-COL-07-10: CONJ false search / frozen tokens
CSRepetitions-COL-07-11: LTL true LTL model checker
CSRepetitions-COL-07-12: F true state space / EG
CSRepetitions-COL-07-13: LTL false LTL model checker
CSRepetitions-COL-07-14: LTL false LTL model checker
CSRepetitions-COL-07-15: LTL false LTL model checker
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8 LTL EXCL 60/3284 31/32 CSRepetitions-COL-07-01 4470069 m, 75794 m/sec, 10323083 t fired, .
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CSRepetitions-COL-07-00: CONJ false findpath
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CSRepetitions-COL-07-03: LTL false LTL model checker
CSRepetitions-COL-07-04: LTL false LTL model checker
CSRepetitions-COL-07-05: AG false findpath
CSRepetitions-COL-07-09: LTL false LTL model checker
CSRepetitions-COL-07-10: CONJ false search / frozen tokens
CSRepetitions-COL-07-11: LTL true LTL model checker
CSRepetitions-COL-07-12: F true state space / EG
CSRepetitions-COL-07-13: LTL false LTL model checker
CSRepetitions-COL-07-14: LTL false LTL model checker
CSRepetitions-COL-07-15: LTL false LTL model checker
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FINAL RESULTS
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
CSRepetitions-COL-07-00: CONJ false findpath
CSRepetitions-COL-07-01: LTL unknown AGGR
CSRepetitions-COL-07-02: LTL false LTL model checker
CSRepetitions-COL-07-03: LTL false LTL model checker
CSRepetitions-COL-07-04: LTL false LTL model checker
CSRepetitions-COL-07-05: AG false findpath
CSRepetitions-COL-07-06: LTL unknown AGGR
CSRepetitions-COL-07-07: LTL unknown AGGR
CSRepetitions-COL-07-08: CONJ unknown CONJ
CSRepetitions-COL-07-09: LTL false LTL model checker
CSRepetitions-COL-07-10: CONJ false search / frozen tokens
CSRepetitions-COL-07-11: LTL true LTL model checker
CSRepetitions-COL-07-12: F true state space / EG
CSRepetitions-COL-07-13: LTL false LTL model checker
CSRepetitions-COL-07-14: LTL false LTL model checker
CSRepetitions-COL-07-15: LTL false LTL model checker
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Sequence of Actions to be Executed by the VM
This is useful if one wants to reexecute the tool in the VM from the submitted image disk.
set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="CSRepetitions-COL-07"
export BK_EXAMINATION="LTLFireability"
export BK_TOOL="lola"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"
# this is specific to your benchmark or test
export BIN_DIR="$HOME/BenchKit/bin"
# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi
# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-4028"
echo " Executing tool lola"
echo " Input is CSRepetitions-COL-07, examination is LTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r023-tajo-162038139800517"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"
tar xzf /home/mcc/BenchKit/INPUTS/CSRepetitions-COL-07.tgz
mv CSRepetitions-COL-07 execution
cd execution
if [ "LTLFireability" = "ReachabilityDeadlock" ] || [ "LTLFireability" = "UpperBounds" ] || [ "LTLFireability" = "QuasiLiveness" ] || [ "LTLFireability" = "StableMarking" ] || [ "LTLFireability" = "Liveness" ] || [ "LTLFireability" = "OneSafe" ] || [ "LTLFireability" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh
echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "LTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "LTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "LTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property LTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "LTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '
echo "FORMULA_NAME $x"
done
elif [ "LTLFireability" = "ReachabilityDeadlock" ] || [ "LTLFireability" = "QuasiLiveness" ] || [ "LTLFireability" = "StableMarking" ] || [ "LTLFireability" = "Liveness" ] || [ "LTLFireability" = "OneSafe" ] ; then
echo "FORMULA_NAME LTLFireability"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;