About the Execution of LoLA for BridgeAndVehicles-COL-V50P50N10
Execution Summary | |||||
Max Memory Used (MB) |
Time wait (ms) | CPU Usage (ms) | I/O Wait (ms) | Computed Result | Execution Status |
16247.991 | 57532.00 | 207090.00 | 783.70 | FTF?TTFTTTFFFTT? | normal |
Execution Chart
We display below the execution chart for this examination (boot time has been removed).
Trace from the execution
Formatting '/mnt/tpsp/fkordon/mcc2021-input.r023-tajo-162038139200094.qcow2', fmt=qcow2 size=4294967296 backing_file='/mnt/tpsp/fkordon/mcc2021-input.qcow2' encryption=off cluster_size=65536 lazy_refcounts=off
Waiting for the VM to be ready (probing ssh)
....................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................
=====================================================================
Generated by BenchKit 2-4028
Executing tool lola
Input is BridgeAndVehicles-COL-V50P50N10, examination is ReachabilityCardinality
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r023-tajo-162038139200094
=====================================================================
--------------------
preparation of the directory to be used:
/home/mcc/execution
total 416K
-rw-r--r-- 1 mcc users 14K May 5 16:58 CTLCardinality.txt
-rw-r--r-- 1 mcc users 101K May 10 09:42 CTLCardinality.xml
-rw-r--r-- 1 mcc users 14K May 5 16:58 CTLFireability.txt
-rw-r--r-- 1 mcc users 83K May 10 09:42 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K May 6 14:48 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.4K May 6 14:48 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 4.2K Mar 28 15:47 LTLCardinality.txt
-rw-r--r-- 1 mcc users 27K Mar 28 15:47 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.8K Mar 28 15:47 LTLFireability.txt
-rw-r--r-- 1 mcc users 18K Mar 28 15:47 LTLFireability.xml
-rw-r--r-- 1 mcc users 4.0K Mar 23 02:52 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 19K Mar 23 02:52 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 4.2K Mar 22 11:26 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 23K Mar 22 11:25 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.9K Mar 22 09:10 UpperBounds.txt
-rw-r--r-- 1 mcc users 4.0K Mar 22 09:10 UpperBounds.xml
-rw-r--r-- 1 mcc users 5 May 5 16:51 equiv_pt
-rw-r--r-- 1 mcc users 10 May 5 16:51 instance
-rw-r--r-- 1 mcc users 5 May 5 16:51 iscolored
-rw-r--r-- 1 mcc users 42K May 5 16:51 model.pnml
--------------------
content from stdout:
=== Data for post analysis generated by BenchKit (invocation template)
The expected result is a vector of booleans
BOOL_VECTOR
here is the order used to build the result vector(from text file)
FORMULA_NAME BridgeAndVehicles-COL-V50P50N10-ReachabilityCardinality-00
FORMULA_NAME BridgeAndVehicles-COL-V50P50N10-ReachabilityCardinality-01
FORMULA_NAME BridgeAndVehicles-COL-V50P50N10-ReachabilityCardinality-02
FORMULA_NAME BridgeAndVehicles-COL-V50P50N10-ReachabilityCardinality-03
FORMULA_NAME BridgeAndVehicles-COL-V50P50N10-ReachabilityCardinality-04
FORMULA_NAME BridgeAndVehicles-COL-V50P50N10-ReachabilityCardinality-05
FORMULA_NAME BridgeAndVehicles-COL-V50P50N10-ReachabilityCardinality-06
FORMULA_NAME BridgeAndVehicles-COL-V50P50N10-ReachabilityCardinality-07
FORMULA_NAME BridgeAndVehicles-COL-V50P50N10-ReachabilityCardinality-08
FORMULA_NAME BridgeAndVehicles-COL-V50P50N10-ReachabilityCardinality-09
FORMULA_NAME BridgeAndVehicles-COL-V50P50N10-ReachabilityCardinality-10
FORMULA_NAME BridgeAndVehicles-COL-V50P50N10-ReachabilityCardinality-11
FORMULA_NAME BridgeAndVehicles-COL-V50P50N10-ReachabilityCardinality-12
FORMULA_NAME BridgeAndVehicles-COL-V50P50N10-ReachabilityCardinality-13
FORMULA_NAME BridgeAndVehicles-COL-V50P50N10-ReachabilityCardinality-14
FORMULA_NAME BridgeAndVehicles-COL-V50P50N10-ReachabilityCardinality-15
=== Now, execution of the tool begins
BK_START 1620853429988
starting LoLA
BK_INPUT BridgeAndVehicles-COL-V50P50N10
BK_EXAMINATION: ReachabilityCardinality
bin directory: /home/mcc/BenchKit/bin
current directory: /home/mcc/execution
ReachabilityCardinality
FORMULA BridgeAndVehicles-COL-V50P50N10-ReachabilityCardinality-06 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA BridgeAndVehicles-COL-V50P50N10-ReachabilityCardinality-08 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA BridgeAndVehicles-COL-V50P50N10-ReachabilityCardinality-12 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA BridgeAndVehicles-COL-V50P50N10-ReachabilityCardinality-14 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA BridgeAndVehicles-COL-V50P50N10-ReachabilityCardinality-05 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA BridgeAndVehicles-COL-V50P50N10-ReachabilityCardinality-10 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA BridgeAndVehicles-COL-V50P50N10-ReachabilityCardinality-02 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA BridgeAndVehicles-COL-V50P50N10-ReachabilityCardinality-11 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA BridgeAndVehicles-COL-V50P50N10-ReachabilityCardinality-07 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA BridgeAndVehicles-COL-V50P50N10-ReachabilityCardinality-01 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA BridgeAndVehicles-COL-V50P50N10-ReachabilityCardinality-00 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA BridgeAndVehicles-COL-V50P50N10-ReachabilityCardinality-09 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA BridgeAndVehicles-COL-V50P50N10-ReachabilityCardinality-13 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA BridgeAndVehicles-COL-V50P50N10-ReachabilityCardinality-04 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
BK_STOP 1620853487520
--------------------
content from stderr:
lola: MEM LIMIT 32
lola: MEM LIMIT 5
lola: NET
lola: input: PNML file (--pnmlnet)
lola: reading net from /home/mcc/execution/model.pnml
lola: reading pnml
lola: PNML file contains High-Level net
lola: finished parsing
lola: closed net file /home/mcc/execution/model.pnml
lola: Reading HL formula in XML format (--xmlformula)
lola: reading formula from /home/mcc/execution/ReachabilityCardinality.xml
lola: rewrite Frontend/Parser/formula_rewrite.k:96
lola: rewrite Frontend/Parser/formula_rewrite.k:156
lola: rewrite Frontend/Parser/formula_rewrite.k:147
lola: rewrite Frontend/Parser/formula_rewrite.k:98
lola: rewrite Frontend/Parser/formula_rewrite.k:159
lola: rewrite Frontend/Parser/formula_rewrite.k:150
lola: rewrite Frontend/Parser/formula_rewrite.k:96
lola: rewrite Frontend/Parser/formula_rewrite.k:156
lola: rewrite Frontend/Parser/formula_rewrite.k:147
lola: rewrite Frontend/Parser/formula_rewrite.k:98
lola: rewrite Frontend/Parser/formula_rewrite.k:159
lola: rewrite Frontend/Parser/formula_rewrite.k:150
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: LAUNCH task # 50 (type SKEL/FNDP) for 0 BridgeAndVehicles-COL-V50P50N10-ReachabilityCardinality-00
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 51 (type SKEL/EQUN) for 0 BridgeAndVehicles-COL-V50P50N10-ReachabilityCardinality-00
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 53 (type SKEL/SRCH) for 0 BridgeAndVehicles-COL-V50P50N10-ReachabilityCardinality-00
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: LAUNCH task # 54 (type SKEL/SRCH) for 0 BridgeAndVehicles-COL-V50P50N10-ReachabilityCardinality-00
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-51.sara.
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: LAUNCH INITIAL
lola: LAUNCH task # 20 (type SKEL/CNST) for 18 BridgeAndVehicles-COL-V50P50N10-ReachabilityCardinality-06
lola: time limit : 0 sec
lola: memory limit: 0 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: LAUNCH INITIAL
lola: TR BINDINGS
lola: LAUNCH task # 26 (type SKEL/CNST) for 24 BridgeAndVehicles-COL-V50P50N10-ReachabilityCardinality-08
lola: time limit : 0 sec
lola: memory limit: 0 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: LAUNCH INITIAL
lola: LAUNCH task # 38 (type SKEL/CNST) for 36 BridgeAndVehicles-COL-V50P50N10-ReachabilityCardinality-12
lola: time limit : 0 sec
lola: memory limit: 0 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: LAUNCH INITIAL
lola: LAUNCH task # 44 (type SKEL/CNST) for 42 BridgeAndVehicles-COL-V50P50N10-ReachabilityCardinality-14
lola: time limit : 0 sec
lola: memory limit: 0 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: FINISHED task # 20 (type SKEL/CNST) for BridgeAndVehicles-COL-V50P50N10-ReachabilityCardinality-06
lola: result : false
lola: FINISHED task # 53 (type SKEL/SRCH) for BridgeAndVehicles-COL-V50P50N10-ReachabilityCardinality-00
lola: result : true
lola: markings : 51
lola: fired transitions : 50
lola: time used : 0.000000
lola: memory pages used : 1
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: FINISHED task # 38 (type SKEL/CNST) for BridgeAndVehicles-COL-V50P50N10-ReachabilityCardinality-12
lola: result : false
lola: FINISHED task # 26 (type SKEL/CNST) for BridgeAndVehicles-COL-V50P50N10-ReachabilityCardinality-08
lola: result : true
lola: FINISHED task # 50 (type SKEL/FNDP) for BridgeAndVehicles-COL-V50P50N10-ReachabilityCardinality-00
lola: result : true
lola: fired transitions : 49
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: CANCELED task # 51 (type EQUN) for BridgeAndVehicles-COL-V50P50N10-ReachabilityCardinality-00 (obsolete)
lola: CANCELED task # 54 (type SRCH) for BridgeAndVehicles-COL-V50P50N10-ReachabilityCardinality-00 (obsolete)
lola: LAUNCH task # 66 (type SKEL/FNDP) for 15 BridgeAndVehicles-COL-V50P50N10-ReachabilityCardinality-05
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 67 (type SKEL/EQUN) for 15 BridgeAndVehicles-COL-V50P50N10-ReachabilityCardinality-05
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 69 (type SKEL/SRCH) for 15 BridgeAndVehicles-COL-V50P50N10-ReachabilityCardinality-05
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 54 (type SKEL/SRCH) for BridgeAndVehicles-COL-V50P50N10-ReachabilityCardinality-00
lola: result : true
lola: markings : 51
lola: fired transitions : 50
lola: time used : 0.000000
lola: memory pages used : 1
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: FINISHED task # 51 (type SKEL/EQUN) for BridgeAndVehicles-COL-V50P50N10-ReachabilityCardinality-00
lola: result : true
lola: FINISHED task # 44 (type SKEL/CNST) for BridgeAndVehicles-COL-V50P50N10-ReachabilityCardinality-14
lola: result : true
lola: LAUNCH task # 88 (type SKEL/FNDP) for 21 BridgeAndVehicles-COL-V50P50N10-ReachabilityCardinality-07
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: FINISHED task # 69 (type SKEL/SRCH) for BridgeAndVehicles-COL-V50P50N10-ReachabilityCardinality-05
lola: result : false
lola: markings : 1
lola: time used : 0.000000
lola: memory pages used : 1
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-67.sara.
lola: CANCELED task # 66 (type FNDP) for BridgeAndVehicles-COL-V50P50N10-ReachabilityCardinality-05 (obsolete)
lola: CANCELED task # 67 (type EQUN) for BridgeAndVehicles-COL-V50P50N10-ReachabilityCardinality-05 (obsolete)
lola: LAUNCH task # 98 (type SKEL/FNDP) for 30 BridgeAndVehicles-COL-V50P50N10-ReachabilityCardinality-10
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 99 (type SKEL/EQUN) for 30 BridgeAndVehicles-COL-V50P50N10-ReachabilityCardinality-10
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
sara: error: :5: error: syntax error, unexpected $end, expecting KEY_TRANSITION
sara: error while reading Petri net from file -- aborting [#04]
sara: see manual for a documentation of this error
sara: last error message: No such file or directory
lola: LAUNCH task # 101 (type SKEL/SRCH) for 30 BridgeAndVehicles-COL-V50P50N10-ReachabilityCardinality-10
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 66 (type SKEL/FNDP) for BridgeAndVehicles-COL-V50P50N10-ReachabilityCardinality-05
lola: result : unknown
lola: fired transitions : 1171
lola: tried executions : 1172
lola: time used : 0.000000
lola: memory pages used : 0
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: FINISHED task # 101 (type SKEL/SRCH) for BridgeAndVehicles-COL-V50P50N10-ReachabilityCardinality-10
lola: result : false
lola: markings : 1
lola: time used : 0.000000
lola: memory pages used : 1
lola: CANCELED task # 98 (type FNDP) for BridgeAndVehicles-COL-V50P50N10-ReachabilityCardinality-10 (obsolete)
lola: CANCELED task # 99 (type EQUN) for BridgeAndVehicles-COL-V50P50N10-ReachabilityCardinality-10 (obsolete)
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-99.sara.
sara: error: :5: error: syntax error, unexpected $end, expecting KEY_TRANSITION
sara: error while reading Petri net from file -- aborting [#04]
sara: see manual for a documentation of this error
sara: last error message: No such file or directory
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: LAUNCH task # 90 (type SKEL/FNDP) for 6 BridgeAndVehicles-COL-V50P50N10-ReachabilityCardinality-02
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 91 (type SKEL/EQUN) for 6 BridgeAndVehicles-COL-V50P50N10-ReachabilityCardinality-02
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: LAUNCH task # 93 (type SKEL/SRCH) for 6 BridgeAndVehicles-COL-V50P50N10-ReachabilityCardinality-02
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 67 (type SKEL/EQUN) for BridgeAndVehicles-COL-V50P50N10-ReachabilityCardinality-05
lola: result : unknown
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: FINISHED task # 99 (type SKEL/EQUN) for BridgeAndVehicles-COL-V50P50N10-ReachabilityCardinality-10
lola: TR BINDINGS DONE
lola: Places: 128, Transitions: 1328
lola: result : unknown
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-91.sara.
sara: place or transition ordering is non-deterministic
lola: FINISHED task # 93 (type SKEL/SRCH) for BridgeAndVehicles-COL-V50P50N10-ReachabilityCardinality-02
lola: result : false
lola: markings : 2
lola: fired transitions : 2
lola: time used : 0.000000
lola: memory pages used : 1
lola: CANCELED task # 90 (type FNDP) for BridgeAndVehicles-COL-V50P50N10-ReachabilityCardinality-02 (obsolete)
lola: CANCELED task # 91 (type EQUN) for BridgeAndVehicles-COL-V50P50N10-ReachabilityCardinality-02 (obsolete)
lola: LAUNCH task # 126 (type SKEL/FNDP) for 27 BridgeAndVehicles-COL-V50P50N10-ReachabilityCardinality-09
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 130 (type SKEL/EQUN) for 27 BridgeAndVehicles-COL-V50P50N10-ReachabilityCardinality-09
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: LAUNCH task # 133 (type SKEL/SRCH) for 27 BridgeAndVehicles-COL-V50P50N10-ReachabilityCardinality-09
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 90 (type SKEL/FNDP) for BridgeAndVehicles-COL-V50P50N10-ReachabilityCardinality-02
lola: result : unknown
lola: fired transitions : 640937
lola: tried executions : 2
lola: time used : 0.000000
lola: memory pages used : 0
lola: FINISHED task # 91 (type SKEL/EQUN) for BridgeAndVehicles-COL-V50P50N10-ReachabilityCardinality-02
lola: result : false
lola: FINISHED task # 133 (type SKEL/SRCH) for BridgeAndVehicles-COL-V50P50N10-ReachabilityCardinality-09
lola: result : true
lola: markings : 101
lola: fired transitions : 100
lola: time used : 0.000000
lola: memory pages used : 1
lola: CANCELED task # 126 (type FNDP) for BridgeAndVehicles-COL-V50P50N10-ReachabilityCardinality-09 (obsolete)
lola: CANCELED task # 130 (type EQUN) for BridgeAndVehicles-COL-V50P50N10-ReachabilityCardinality-09 (obsolete)
lola: LAUNCH task # 107 (type SKEL/FNDP) for 45 BridgeAndVehicles-COL-V50P50N10-ReachabilityCardinality-15
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 108 (type SKEL/EQUN) for 45 BridgeAndVehicles-COL-V50P50N10-ReachabilityCardinality-15
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: LAUNCH task # 111 (type SKEL/FNDP) for 39 BridgeAndVehicles-COL-V50P50N10-ReachabilityCardinality-13
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 130 (type SKEL/EQUN) for BridgeAndVehicles-COL-V50P50N10-ReachabilityCardinality-09
lola: result : unknown
lola: @ trans enregistrement_A
lola: FINISHED task # 126 (type SKEL/FNDP) for BridgeAndVehicles-COL-V50P50N10-ReachabilityCardinality-09
lola: result : true
lola: fired transitions : 99
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
lola: @ trans decision
lola: @ trans altern_cpt
lola: FINISHED task # 107 (type SKEL/FNDP) for BridgeAndVehicles-COL-V50P50N10-ReachabilityCardinality-15
lola: result : true
lola: fired transitions : 144
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
lola: CANCELED task # 108 (type EQUN) for BridgeAndVehicles-COL-V50P50N10-ReachabilityCardinality-15 (obsolete)
lola: LAUNCH task # 73 (type SKEL/FNDP) for 9 BridgeAndVehicles-COL-V50P50N10-ReachabilityCardinality-03
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 74 (type SKEL/EQUN) for 9 BridgeAndVehicles-COL-V50P50N10-ReachabilityCardinality-03
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 108 (type SKEL/EQUN) for BridgeAndVehicles-COL-V50P50N10-ReachabilityCardinality-15
lola: result : unknown
lola: @ trans autorisation_A
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: @ trans liberation_A
lola: FINISHED task # 73 (type SKEL/FNDP) for BridgeAndVehicles-COL-V50P50N10-ReachabilityCardinality-03
lola: result : true
lola: fired transitions : 12
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
lola: CANCELED task # 74 (type EQUN) for BridgeAndVehicles-COL-V50P50N10-ReachabilityCardinality-03 (obsolete)
lola: LAUNCH task # 80 (type SKEL/FNDP) for 33 BridgeAndVehicles-COL-V50P50N10-ReachabilityCardinality-11
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 81 (type SKEL/EQUN) for 33 BridgeAndVehicles-COL-V50P50N10-ReachabilityCardinality-11
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 74 (type SKEL/EQUN) for BridgeAndVehicles-COL-V50P50N10-ReachabilityCardinality-03
lola: result : unknown
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: @ trans enregistrement_B
lola: @ trans timeout_A
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-81.sara.
sara: place or transition ordering is non-deterministic
lola: @ trans timeout_B
lola: @ trans liberation_B
lola: FINISHED task # 111 (type SKEL/FNDP) for BridgeAndVehicles-COL-V50P50N10-ReachabilityCardinality-13
lola: result : true
lola: fired transitions : 49
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
lola: LAUNCH task # 118 (type SKEL/FNDP) for 12 BridgeAndVehicles-COL-V50P50N10-ReachabilityCardinality-04
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: @ trans basculement
lola: @ trans autorisation_B
lola: FINISHED task # 81 (type SKEL/EQUN) for BridgeAndVehicles-COL-V50P50N10-ReachabilityCardinality-11
lola: result : false
lola: CANCELED task # 80 (type FNDP) for BridgeAndVehicles-COL-V50P50N10-ReachabilityCardinality-11 (obsolete)
lola: LAUNCH task # 58 (type SKEL/FNDP) for 3 BridgeAndVehicles-COL-V50P50N10-ReachabilityCardinality-01
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 59 (type SKEL/EQUN) for 3 BridgeAndVehicles-COL-V50P50N10-ReachabilityCardinality-01
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 80 (type SKEL/FNDP) for BridgeAndVehicles-COL-V50P50N10-ReachabilityCardinality-11
lola: result : unknown
lola: fired transitions : 43150
lola: tried executions : 43151
lola: time used : 0.000000
lola: memory pages used : 0
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: FINISHED task # 118 (type SKEL/FNDP) for BridgeAndVehicles-COL-V50P50N10-ReachabilityCardinality-04
lola: result : true
lola: fired transitions : 49
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
lola: LAUNCH task # 105 (type SKEL/EQUN) for 21 BridgeAndVehicles-COL-V50P50N10-ReachabilityCardinality-07
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-105.sara.
sara: error: :5: error: syntax error, unexpected $end, expecting KEY_TRANSITION
sara: error while reading Petri net from file -- aborting [#04]
sara: see manual for a documentation of this error
sara: last error message: No such file or directory
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-59.sara.
sara: place or transition ordering is non-deterministic
lola: FINISHED task # 105 (type SKEL/EQUN) for BridgeAndVehicles-COL-V50P50N10-ReachabilityCardinality-07
lola: result : unknown
lola: LAUNCH task # 119 (type SKEL/SRCH) for 21 BridgeAndVehicles-COL-V50P50N10-ReachabilityCardinality-07
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 119 (type SKEL/SRCH) for BridgeAndVehicles-COL-V50P50N10-ReachabilityCardinality-07
lola: result : false
lola: markings : 1
lola: time used : 0.000000
lola: memory pages used : 1
lola: CANCELED task # 88 (type FNDP) for BridgeAndVehicles-COL-V50P50N10-ReachabilityCardinality-07 (obsolete)
lola: LAUNCH task # 61 (type SKEL/SRCH) for 3 BridgeAndVehicles-COL-V50P50N10-ReachabilityCardinality-01
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 62 (type SKEL/SRCH) for 3 BridgeAndVehicles-COL-V50P50N10-ReachabilityCardinality-01
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 59 (type SKEL/EQUN) for BridgeAndVehicles-COL-V50P50N10-ReachabilityCardinality-01
lola: result : false
lola: CANCELED task # 58 (type FNDP) for BridgeAndVehicles-COL-V50P50N10-ReachabilityCardinality-01 (obsolete)
lola: CANCELED task # 61 (type SRCH) for BridgeAndVehicles-COL-V50P50N10-ReachabilityCardinality-01 (obsolete)
lola: CANCELED task # 62 (type SRCH) for BridgeAndVehicles-COL-V50P50N10-ReachabilityCardinality-01 (obsolete)
lola: FINISHED task # 58 (type SKEL/FNDP) for BridgeAndVehicles-COL-V50P50N10-ReachabilityCardinality-01
lola: result : unknown
lola: fired transitions : 119903
lola: tried executions : 2
lola: time used : 1.000000
lola: memory pages used : 0
lola: FINISHED task # 88 (type SKEL/FNDP) for BridgeAndVehicles-COL-V50P50N10-ReachabilityCardinality-07
lola: result : unknown
lola: fired transitions : 355062
lola: tried executions : 355063
lola: time used : 1.000000
lola: memory pages used : 0
lola: rewrite Frontend/Parser/formula_rewrite.k:98
lola: rewrite Frontend/Parser/formula_rewrite.k:159
lola: rewrite Frontend/Parser/formula_rewrite.k:150
lola: rewrite Frontend/Parser/formula_rewrite.k:98
lola: rewrite Frontend/Parser/formula_rewrite.k:159
lola: rewrite Frontend/Parser/formula_rewrite.k:150
lola: rewrite Frontend/Parser/formula_rewrite.k:96
lola: rewrite Frontend/Parser/formula_rewrite.k:156
lola: rewrite Frontend/Parser/formula_rewrite.k:147
lola: rewrite Frontend/Parser/formula_rewrite.k:96
lola: rewrite Frontend/Parser/formula_rewrite.k:156
lola: rewrite Frontend/Parser/formula_rewrite.k:147
lola: Rule S: 0 transitions removed,0 places removed
lola: planning for BridgeAndVehicles-COL-V50P50N10-ReachabilityCardinality-02 stopped (result already fixed).
lola: planning for BridgeAndVehicles-COL-V50P50N10-ReachabilityCardinality-01 stopped (result already fixed).
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: LAUNCH task # 140 (type EXCL) for 9 BridgeAndVehicles-COL-V50P50N10-ReachabilityCardinality-03
lola: time limit : 599 sec
lola: memory limit: 32 pages
lola: LAUNCH task # 136 (type FNDP) for 9 BridgeAndVehicles-COL-V50P50N10-ReachabilityCardinality-03
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 137 (type EQUN) for 9 BridgeAndVehicles-COL-V50P50N10-ReachabilityCardinality-03
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: LAUNCH task # 139 (type SRCH) for 9 BridgeAndVehicles-COL-V50P50N10-ReachabilityCardinality-03
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-137.sara.
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
sara: place or transition ordering is non-deterministic
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
BridgeAndVehicles-COL-V50P50N10-ReachabilityCardinality-01: AG true skeleton: state equation
BridgeAndVehicles-COL-V50P50N10-ReachabilityCardinality-02: EF false skeleton: tandem / insertion
BridgeAndVehicles-COL-V50P50N10-ReachabilityCardinality-05: AG true skeleton: tandem / insertion
BridgeAndVehicles-COL-V50P50N10-ReachabilityCardinality-06: INITIAL false skeleton: preprocessing
BridgeAndVehicles-COL-V50P50N10-ReachabilityCardinality-07: AG true skeleton: tandem / insertion
BridgeAndVehicles-COL-V50P50N10-ReachabilityCardinality-08: INITIAL true skeleton: preprocessing
BridgeAndVehicles-COL-V50P50N10-ReachabilityCardinality-10: EF false skeleton: tandem / insertion
BridgeAndVehicles-COL-V50P50N10-ReachabilityCardinality-11: EF false skeleton: state equation
BridgeAndVehicles-COL-V50P50N10-ReachabilityCardinality-12: INITIAL false skeleton: preprocessing
BridgeAndVehicles-COL-V50P50N10-ReachabilityCardinality-14: INITIAL true skeleton: preprocessing
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
BridgeAndVehicles-COL-V50P50N10-ReachabilityCardinality-00: AG 0 5 0 0 4 0 0 1
BridgeAndVehicles-COL-V50P50N10-ReachabilityCardinality-03: EF 0 1 4 0 2 0 0 3
BridgeAndVehicles-COL-V50P50N10-ReachabilityCardinality-04: EF 0 5 0 0 1 0 0 4
BridgeAndVehicles-COL-V50P50N10-ReachabilityCardinality-09: EF 0 5 0 0 3 0 0 2
BridgeAndVehicles-COL-V50P50N10-ReachabilityCardinality-13: EF 0 5 0 0 1 0 0 4
BridgeAndVehicles-COL-V50P50N10-ReachabilityCardinality-15: EF 0 5 0 0 2 0 0 3
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
136 EF FNDP 4/449 0/5 BridgeAndVehicles-COL-V50P50N10-ReachabilityCardinality-03 152134 t fired, 411 attempts, .
137 EF STEQ 4/449 0/5 BridgeAndVehicles-COL-V50P50N10-ReachabilityCardinality-03 sara is running.
139 EF SRCH 4/449 1/5 BridgeAndVehicles-COL-V50P50N10-ReachabilityCardinality-03 127294 m, 25458 m/sec, 331278 t fired, .
140 EF EXCL 4/599 1/32 BridgeAndVehicles-COL-V50P50N10-ReachabilityCardinality-03 2787 m, 557 m/sec, 3289 t fired, .
Time elapsed: 5 secs. Pages in use: 2
# running tasks: 4 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
BridgeAndVehicles-COL-V50P50N10-ReachabilityCardinality-01: AG true skeleton: state equation
BridgeAndVehicles-COL-V50P50N10-ReachabilityCardinality-02: EF false skeleton: tandem / insertion
BridgeAndVehicles-COL-V50P50N10-ReachabilityCardinality-05: AG true skeleton: tandem / insertion
BridgeAndVehicles-COL-V50P50N10-ReachabilityCardinality-06: INITIAL false skeleton: preprocessing
BridgeAndVehicles-COL-V50P50N10-ReachabilityCardinality-07: AG true skeleton: tandem / insertion
BridgeAndVehicles-COL-V50P50N10-ReachabilityCardinality-08: INITIAL true skeleton: preprocessing
BridgeAndVehicles-COL-V50P50N10-ReachabilityCardinality-10: EF false skeleton: tandem / insertion
BridgeAndVehicles-COL-V50P50N10-ReachabilityCardinality-11: EF false skeleton: state equation
BridgeAndVehicles-COL-V50P50N10-ReachabilityCardinality-12: INITIAL false skeleton: preprocessing
BridgeAndVehicles-COL-V50P50N10-ReachabilityCardinality-14: INITIAL true skeleton: preprocessing
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
BridgeAndVehicles-COL-V50P50N10-ReachabilityCardinality-00: AG 0 5 0 0 4 0 0 1
BridgeAndVehicles-COL-V50P50N10-ReachabilityCardinality-03: EF 0 1 4 0 2 0 0 3
BridgeAndVehicles-COL-V50P50N10-ReachabilityCardinality-04: EF 0 5 0 0 1 0 0 4
BridgeAndVehicles-COL-V50P50N10-ReachabilityCardinality-09: EF 0 5 0 0 3 0 0 2
BridgeAndVehicles-COL-V50P50N10-ReachabilityCardinality-13: EF 0 5 0 0 1 0 0 4
BridgeAndVehicles-COL-V50P50N10-ReachabilityCardinality-15: EF 0 5 0 0 2 0 0 3
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
136 EF FNDP 9/445 0/5 BridgeAndVehicles-COL-V50P50N10-ReachabilityCardinality-03 354448 t fired, 942 attempts, .
137 EF STEQ 9/445 0/5 BridgeAndVehicles-COL-V50P50N10-ReachabilityCardinality-03 sara is running.
139 EF SRCH 9/445 2/5 BridgeAndVehicles-COL-V50P50N10-ReachabilityCardinality-03 310661 m, 36673 m/sec, 827495 t fired, .
140 EF EXCL 9/599 1/32 BridgeAndVehicles-COL-V50P50N10-ReachabilityCardinality-03 7307 m, 904 m/sec, 9215 t fired, .
Time elapsed: 10 secs. Pages in use: 3
# running tasks: 4 of 4 Visible: 16
sara: warning, failure of lp_solve (at job 1073)
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
BridgeAndVehicles-COL-V50P50N10-ReachabilityCardinality-01: AG true skeleton: state equation
BridgeAndVehicles-COL-V50P50N10-ReachabilityCardinality-02: EF false skeleton: tandem / insertion
BridgeAndVehicles-COL-V50P50N10-ReachabilityCardinality-05: AG true skeleton: tandem / insertion
BridgeAndVehicles-COL-V50P50N10-ReachabilityCardinality-06: INITIAL false skeleton: preprocessing
BridgeAndVehicles-COL-V50P50N10-ReachabilityCardinality-07: AG true skeleton: tandem / insertion
BridgeAndVehicles-COL-V50P50N10-ReachabilityCardinality-08: INITIAL true skeleton: preprocessing
BridgeAndVehicles-COL-V50P50N10-ReachabilityCardinality-10: EF false skeleton: tandem / insertion
BridgeAndVehicles-COL-V50P50N10-ReachabilityCardinality-11: EF false skeleton: state equation
BridgeAndVehicles-COL-V50P50N10-ReachabilityCardinality-12: INITIAL false skeleton: preprocessing
BridgeAndVehicles-COL-V50P50N10-ReachabilityCardinality-14: INITIAL true skeleton: preprocessing
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
BridgeAndVehicles-COL-V50P50N10-ReachabilityCardinality-00: AG 0 5 0 0 4 0 0 1
BridgeAndVehicles-COL-V50P50N10-ReachabilityCardinality-03: EF 0 1 4 0 2 0 0 3
BridgeAndVehicles-COL-V50P50N10-ReachabilityCardinality-04: EF 0 5 0 0 1 0 0 4
BridgeAndVehicles-COL-V50P50N10-ReachabilityCardinality-09: EF 0 5 0 0 3 0 0 2
BridgeAndVehicles-COL-V50P50N10-ReachabilityCardinality-13: EF 0 5 0 0 1 0 0 4
BridgeAndVehicles-COL-V50P50N10-ReachabilityCardinality-15: EF 0 5 0 0 2 0 0 3
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
136 EF FNDP 14/440 0/5 BridgeAndVehicles-COL-V50P50N10-ReachabilityCardinality-03 562217 t fired, 1481 attempts, .
137 EF STEQ 14/440 0/5 BridgeAndVehicles-COL-V50P50N10-ReachabilityCardinality-03 sara is running.
139 EF SRCH 14/440 2/5 BridgeAndVehicles-COL-V50P50N10-ReachabilityCardinality-03 486784 m, 35224 m/sec, 1312249 t fired, .
140 EF EXCL 14/599 1/32 BridgeAndVehicles-COL-V50P50N10-ReachabilityCardinality-03 11445 m, 827 m/sec, 14217 t fired, .
Time elapsed: 15 secs. Pages in use: 3
# running tasks: 4 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
BridgeAndVehicles-COL-V50P50N10-ReachabilityCardinality-01: AG true skeleton: state equation
BridgeAndVehicles-COL-V50P50N10-ReachabilityCardinality-02: EF false skeleton: tandem / insertion
BridgeAndVehicles-COL-V50P50N10-ReachabilityCardinality-05: AG true skeleton: tandem / insertion
BridgeAndVehicles-COL-V50P50N10-ReachabilityCardinality-06: INITIAL false skeleton: preprocessing
BridgeAndVehicles-COL-V50P50N10-ReachabilityCardinality-07: AG true skeleton: tandem / insertion
BridgeAndVehicles-COL-V50P50N10-ReachabilityCardinality-08: INITIAL true skeleton: preprocessing
BridgeAndVehicles-COL-V50P50N10-ReachabilityCardinality-10: EF false skeleton: tandem / insertion
BridgeAndVehicles-COL-V50P50N10-ReachabilityCardinality-11: EF false skeleton: state equation
BridgeAndVehicles-COL-V50P50N10-ReachabilityCardinality-12: INITIAL false skeleton: preprocessing
BridgeAndVehicles-COL-V50P50N10-ReachabilityCardinality-14: INITIAL true skeleton: preprocessing
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
BridgeAndVehicles-COL-V50P50N10-ReachabilityCardinality-00: AG 0 5 0 0 4 0 0 1
BridgeAndVehicles-COL-V50P50N10-ReachabilityCardinality-03: EF 0 1 4 0 2 0 0 3
BridgeAndVehicles-COL-V50P50N10-ReachabilityCardinality-04: EF 0 5 0 0 1 0 0 4
BridgeAndVehicles-COL-V50P50N10-ReachabilityCardinality-09: EF 0 5 0 0 3 0 0 2
BridgeAndVehicles-COL-V50P50N10-ReachabilityCardinality-13: EF 0 5 0 0 1 0 0 4
BridgeAndVehicles-COL-V50P50N10-ReachabilityCardinality-15: EF 0 5 0 0 2 0 0 3
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
136 EF FNDP 19/435 0/5 BridgeAndVehicles-COL-V50P50N10-ReachabilityCardinality-03 778103 t fired, 2033 attempts, .
137 EF STEQ 19/435 0/5 BridgeAndVehicles-COL-V50P50N10-ReachabilityCardinality-03 sara is running.
139 EF SRCH 19/435 3/5 BridgeAndVehicles-COL-V50P50N10-ReachabilityCardinality-03 662225 m, 35088 m/sec, 1796223 t fired, .
140 EF EXCL 19/599 1/32 BridgeAndVehicles-COL-V50P50N10-ReachabilityCardinality-03 15890 m, 889 m/sec, 19801 t fired, .
Time elapsed: 20 secs. Pages in use: 4
# running tasks: 4 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
BridgeAndVehicles-COL-V50P50N10-ReachabilityCardinality-01: AG true skeleton: state equation
BridgeAndVehicles-COL-V50P50N10-ReachabilityCardinality-02: EF false skeleton: tandem / insertion
BridgeAndVehicles-COL-V50P50N10-ReachabilityCardinality-05: AG true skeleton: tandem / insertion
BridgeAndVehicles-COL-V50P50N10-ReachabilityCardinality-06: INITIAL false skeleton: preprocessing
BridgeAndVehicles-COL-V50P50N10-ReachabilityCardinality-07: AG true skeleton: tandem / insertion
BridgeAndVehicles-COL-V50P50N10-ReachabilityCardinality-08: INITIAL true skeleton: preprocessing
BridgeAndVehicles-COL-V50P50N10-ReachabilityCardinality-10: EF false skeleton: tandem / insertion
BridgeAndVehicles-COL-V50P50N10-ReachabilityCardinality-11: EF false skeleton: state equation
BridgeAndVehicles-COL-V50P50N10-ReachabilityCardinality-12: INITIAL false skeleton: preprocessing
BridgeAndVehicles-COL-V50P50N10-ReachabilityCardinality-14: INITIAL true skeleton: preprocessing
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
BridgeAndVehicles-COL-V50P50N10-ReachabilityCardinality-00: AG 0 5 0 0 4 0 0 1
BridgeAndVehicles-COL-V50P50N10-ReachabilityCardinality-03: EF 0 1 4 0 2 0 0 3
BridgeAndVehicles-COL-V50P50N10-ReachabilityCardinality-04: EF 0 5 0 0 1 0 0 4
BridgeAndVehicles-COL-V50P50N10-ReachabilityCardinality-09: EF 0 5 0 0 3 0 0 2
BridgeAndVehicles-COL-V50P50N10-ReachabilityCardinality-13: EF 0 5 0 0 1 0 0 4
BridgeAndVehicles-COL-V50P50N10-ReachabilityCardinality-15: EF 0 5 0 0 2 0 0 3
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
136 EF FNDP 24/430 0/5 BridgeAndVehicles-COL-V50P50N10-ReachabilityCardinality-03 1012833 t fired, 2630 attempts, .
137 EF STEQ 24/430 0/5 BridgeAndVehicles-COL-V50P50N10-ReachabilityCardinality-03 sara is running.
139 EF SRCH 24/430 4/5 BridgeAndVehicles-COL-V50P50N10-ReachabilityCardinality-03 835011 m, 34557 m/sec, 2302590 t fired, .
140 EF EXCL 24/599 1/32 BridgeAndVehicles-COL-V50P50N10-ReachabilityCardinality-03 20359 m, 893 m/sec, 25372 t fired, .
Time elapsed: 25 secs. Pages in use: 5
# running tasks: 4 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
BridgeAndVehicles-COL-V50P50N10-ReachabilityCardinality-01: AG true skeleton: state equation
BridgeAndVehicles-COL-V50P50N10-ReachabilityCardinality-02: EF false skeleton: tandem / insertion
BridgeAndVehicles-COL-V50P50N10-ReachabilityCardinality-05: AG true skeleton: tandem / insertion
BridgeAndVehicles-COL-V50P50N10-ReachabilityCardinality-06: INITIAL false skeleton: preprocessing
BridgeAndVehicles-COL-V50P50N10-ReachabilityCardinality-07: AG true skeleton: tandem / insertion
BridgeAndVehicles-COL-V50P50N10-ReachabilityCardinality-08: INITIAL true skeleton: preprocessing
BridgeAndVehicles-COL-V50P50N10-ReachabilityCardinality-10: EF false skeleton: tandem / insertion
BridgeAndVehicles-COL-V50P50N10-ReachabilityCardinality-11: EF false skeleton: state equation
BridgeAndVehicles-COL-V50P50N10-ReachabilityCardinality-12: INITIAL false skeleton: preprocessing
BridgeAndVehicles-COL-V50P50N10-ReachabilityCardinality-14: INITIAL true skeleton: preprocessing
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
BridgeAndVehicles-COL-V50P50N10-ReachabilityCardinality-00: AG 0 5 0 0 4 0 0 1
BridgeAndVehicles-COL-V50P50N10-ReachabilityCardinality-03: EF 0 1 4 0 2 0 0 3
BridgeAndVehicles-COL-V50P50N10-ReachabilityCardinality-04: EF 0 5 0 0 1 0 0 4
BridgeAndVehicles-COL-V50P50N10-ReachabilityCardinality-09: EF 0 5 0 0 3 0 0 2
BridgeAndVehicles-COL-V50P50N10-ReachabilityCardinality-13: EF 0 5 0 0 1 0 0 4
BridgeAndVehicles-COL-V50P50N10-ReachabilityCardinality-15: EF 0 5 0 0 2 0 0 3
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
136 EF FNDP 29/425 0/5 BridgeAndVehicles-COL-V50P50N10-ReachabilityCardinality-03 1237945 t fired, 3201 attempts, .
137 EF STEQ 29/425 0/5 BridgeAndVehicles-COL-V50P50N10-ReachabilityCardinality-03 sara is running.
139 EF SRCH 29/425 4/5 BridgeAndVehicles-COL-V50P50N10-ReachabilityCardinality-03 1027560 m, 38509 m/sec, 2872533 t fired, .
140 EF EXCL 29/599 1/32 BridgeAndVehicles-COL-V50P50N10-ReachabilityCardinality-03 24959 m, 920 m/sec, 31209 t fired, .
Time elapsed: 30 secs. Pages in use: 5
# running tasks: 4 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
BridgeAndVehicles-COL-V50P50N10-ReachabilityCardinality-01: AG true skeleton: state equation
BridgeAndVehicles-COL-V50P50N10-ReachabilityCardinality-02: EF false skeleton: tandem / insertion
BridgeAndVehicles-COL-V50P50N10-ReachabilityCardinality-05: AG true skeleton: tandem / insertion
BridgeAndVehicles-COL-V50P50N10-ReachabilityCardinality-06: INITIAL false skeleton: preprocessing
BridgeAndVehicles-COL-V50P50N10-ReachabilityCardinality-07: AG true skeleton: tandem / insertion
BridgeAndVehicles-COL-V50P50N10-ReachabilityCardinality-08: INITIAL true skeleton: preprocessing
BridgeAndVehicles-COL-V50P50N10-ReachabilityCardinality-10: EF false skeleton: tandem / insertion
BridgeAndVehicles-COL-V50P50N10-ReachabilityCardinality-11: EF false skeleton: state equation
BridgeAndVehicles-COL-V50P50N10-ReachabilityCardinality-12: INITIAL false skeleton: preprocessing
BridgeAndVehicles-COL-V50P50N10-ReachabilityCardinality-14: INITIAL true skeleton: preprocessing
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
BridgeAndVehicles-COL-V50P50N10-ReachabilityCardinality-00: AG 0 5 0 0 4 0 0 1
BridgeAndVehicles-COL-V50P50N10-ReachabilityCardinality-03: EF 0 1 4 0 2 0 0 3
BridgeAndVehicles-COL-V50P50N10-ReachabilityCardinality-04: EF 0 5 0 0 1 0 0 4
BridgeAndVehicles-COL-V50P50N10-ReachabilityCardinality-09: EF 0 5 0 0 3 0 0 2
BridgeAndVehicles-COL-V50P50N10-ReachabilityCardinality-13: EF 0 5 0 0 1 0 0 4
BridgeAndVehicles-COL-V50P50N10-ReachabilityCardinality-15: EF 0 5 0 0 2 0 0 3
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
136 EF FNDP 34/420 0/5 BridgeAndVehicles-COL-V50P50N10-ReachabilityCardinality-03 1449854 t fired, 3739 attempts, .
137 EF STEQ 34/420 0/5 BridgeAndVehicles-COL-V50P50N10-ReachabilityCardinality-03 sara is running.
139 EF SRCH 34/420 5/5 BridgeAndVehicles-COL-V50P50N10-ReachabilityCardinality-03 1228717 m, 40231 m/sec, 3474143 t fired, .
140 EF EXCL 34/599 1/32 BridgeAndVehicles-COL-V50P50N10-ReachabilityCardinality-03 29123 m, 832 m/sec, 36363 t fired, .
Time elapsed: 35 secs. Pages in use: 6
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lola: CANCELED task # 139 (type SRCH) for BridgeAndVehicles-COL-V50P50N10-ReachabilityCardinality-03 (memory limit exceeded)
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
BridgeAndVehicles-COL-V50P50N10-ReachabilityCardinality-01: AG true skeleton: state equation
BridgeAndVehicles-COL-V50P50N10-ReachabilityCardinality-02: EF false skeleton: tandem / insertion
BridgeAndVehicles-COL-V50P50N10-ReachabilityCardinality-05: AG true skeleton: tandem / insertion
BridgeAndVehicles-COL-V50P50N10-ReachabilityCardinality-06: INITIAL false skeleton: preprocessing
BridgeAndVehicles-COL-V50P50N10-ReachabilityCardinality-07: AG true skeleton: tandem / insertion
BridgeAndVehicles-COL-V50P50N10-ReachabilityCardinality-08: INITIAL true skeleton: preprocessing
BridgeAndVehicles-COL-V50P50N10-ReachabilityCardinality-10: EF false skeleton: tandem / insertion
BridgeAndVehicles-COL-V50P50N10-ReachabilityCardinality-11: EF false skeleton: state equation
BridgeAndVehicles-COL-V50P50N10-ReachabilityCardinality-12: INITIAL false skeleton: preprocessing
BridgeAndVehicles-COL-V50P50N10-ReachabilityCardinality-14: INITIAL true skeleton: preprocessing
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
BridgeAndVehicles-COL-V50P50N10-ReachabilityCardinality-00: AG 0 5 0 0 4 0 0 1
BridgeAndVehicles-COL-V50P50N10-ReachabilityCardinality-03: EF 0 1 3 0 2 0 1 3
BridgeAndVehicles-COL-V50P50N10-ReachabilityCardinality-04: EF 0 5 0 0 1 0 0 4
BridgeAndVehicles-COL-V50P50N10-ReachabilityCardinality-09: EF 0 5 0 0 3 0 0 2
BridgeAndVehicles-COL-V50P50N10-ReachabilityCardinality-13: EF 0 5 0 0 1 0 0 4
BridgeAndVehicles-COL-V50P50N10-ReachabilityCardinality-15: EF 0 5 0 0 2 0 0 3
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
136 EF FNDP 39/415 0/5 BridgeAndVehicles-COL-V50P50N10-ReachabilityCardinality-03 1702468 t fired, 4374 attempts, .
137 EF STEQ 39/415 0/5 BridgeAndVehicles-COL-V50P50N10-ReachabilityCardinality-03 sara is running.
140 EF EXCL 39/599 1/32 BridgeAndVehicles-COL-V50P50N10-ReachabilityCardinality-03 33825 m, 940 m/sec, 42023 t fired, .
Time elapsed: 40 secs. Pages in use: 6
# running tasks: 4 of 4 Visible: 16
lola: LAUNCH task # 149 (type FNDP) for 0 BridgeAndVehicles-COL-V50P50N10-ReachabilityCardinality-00
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 149 (type FNDP) for BridgeAndVehicles-COL-V50P50N10-ReachabilityCardinality-00
lola: result : true
lola: fired transitions : 49
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
lola: LAUNCH task # 161 (type FNDP) for 27 BridgeAndVehicles-COL-V50P50N10-ReachabilityCardinality-09
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 161 (type FNDP) for BridgeAndVehicles-COL-V50P50N10-ReachabilityCardinality-09
lola: result : true
lola: fired transitions : 99
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
lola: LAUNCH task # 167 (type FNDP) for 39 BridgeAndVehicles-COL-V50P50N10-ReachabilityCardinality-13
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 167 (type FNDP) for BridgeAndVehicles-COL-V50P50N10-ReachabilityCardinality-13
lola: result : true
lola: fired transitions : 49
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
lola: LAUNCH task # 142 (type FNDP) for 45 BridgeAndVehicles-COL-V50P50N10-ReachabilityCardinality-15
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
BridgeAndVehicles-COL-V50P50N10-ReachabilityCardinality-00: AG false findpath
BridgeAndVehicles-COL-V50P50N10-ReachabilityCardinality-01: AG true skeleton: state equation
BridgeAndVehicles-COL-V50P50N10-ReachabilityCardinality-02: EF false skeleton: tandem / insertion
BridgeAndVehicles-COL-V50P50N10-ReachabilityCardinality-05: AG true skeleton: tandem / insertion
BridgeAndVehicles-COL-V50P50N10-ReachabilityCardinality-06: INITIAL false skeleton: preprocessing
BridgeAndVehicles-COL-V50P50N10-ReachabilityCardinality-07: AG true skeleton: tandem / insertion
BridgeAndVehicles-COL-V50P50N10-ReachabilityCardinality-08: INITIAL true skeleton: preprocessing
BridgeAndVehicles-COL-V50P50N10-ReachabilityCardinality-09: EF true findpath
BridgeAndVehicles-COL-V50P50N10-ReachabilityCardinality-10: EF false skeleton: tandem / insertion
BridgeAndVehicles-COL-V50P50N10-ReachabilityCardinality-11: EF false skeleton: state equation
BridgeAndVehicles-COL-V50P50N10-ReachabilityCardinality-12: INITIAL false skeleton: preprocessing
BridgeAndVehicles-COL-V50P50N10-ReachabilityCardinality-13: EF true findpath
BridgeAndVehicles-COL-V50P50N10-ReachabilityCardinality-14: INITIAL true skeleton: preprocessing
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
BridgeAndVehicles-COL-V50P50N10-ReachabilityCardinality-03: EF 0 1 3 0 2 0 1 3
BridgeAndVehicles-COL-V50P50N10-ReachabilityCardinality-04: EF 0 5 0 0 1 0 0 4
BridgeAndVehicles-COL-V50P50N10-ReachabilityCardinality-15: EF 0 4 1 0 2 0 0 3
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
136 EF FNDP 44/1160 0/5 BridgeAndVehicles-COL-V50P50N10-ReachabilityCardinality-03 1915301 t fired, 4905 attempts, .
137 EF STEQ 44/860 0/5 BridgeAndVehicles-COL-V50P50N10-ReachabilityCardinality-03 sara is running.
140 EF EXCL 44/1199 1/32 BridgeAndVehicles-COL-V50P50N10-ReachabilityCardinality-03 38261 m, 887 m/sec, 47229 t fired, .
142 EF FNDP 5/890 0/5 BridgeAndVehicles-COL-V50P50N10-ReachabilityCardinality-15 213647 t fired, 504 attempts, .
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lola: FINISHED task # 137 (type EQUN) for BridgeAndVehicles-COL-V50P50N10-ReachabilityCardinality-03
lola: result : unknown
lola: LAUNCH task # 155 (type FNDP) for 12 BridgeAndVehicles-COL-V50P50N10-ReachabilityCardinality-04
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 155 (type FNDP) for BridgeAndVehicles-COL-V50P50N10-ReachabilityCardinality-04
lola: result : true
lola: fired transitions : 49
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
lola: LAUNCH task # 143 (type EQUN) for 45 BridgeAndVehicles-COL-V50P50N10-ReachabilityCardinality-15
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: FINISHED task # 143 (type EQUN) for BridgeAndVehicles-COL-V50P50N10-ReachabilityCardinality-15
lola: result : unknown
lola: LAUNCH task # 145 (type SRCH) for 45 BridgeAndVehicles-COL-V50P50N10-ReachabilityCardinality-15
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
BridgeAndVehicles-COL-V50P50N10-ReachabilityCardinality-00: AG false findpath
BridgeAndVehicles-COL-V50P50N10-ReachabilityCardinality-01: AG true skeleton: state equation
BridgeAndVehicles-COL-V50P50N10-ReachabilityCardinality-02: EF false skeleton: tandem / insertion
BridgeAndVehicles-COL-V50P50N10-ReachabilityCardinality-04: EF true findpath
BridgeAndVehicles-COL-V50P50N10-ReachabilityCardinality-05: AG true skeleton: tandem / insertion
BridgeAndVehicles-COL-V50P50N10-ReachabilityCardinality-06: INITIAL false skeleton: preprocessing
BridgeAndVehicles-COL-V50P50N10-ReachabilityCardinality-07: AG true skeleton: tandem / insertion
BridgeAndVehicles-COL-V50P50N10-ReachabilityCardinality-08: INITIAL true skeleton: preprocessing
BridgeAndVehicles-COL-V50P50N10-ReachabilityCardinality-09: EF true findpath
BridgeAndVehicles-COL-V50P50N10-ReachabilityCardinality-10: EF false skeleton: tandem / insertion
BridgeAndVehicles-COL-V50P50N10-ReachabilityCardinality-11: EF false skeleton: state equation
BridgeAndVehicles-COL-V50P50N10-ReachabilityCardinality-12: INITIAL false skeleton: preprocessing
BridgeAndVehicles-COL-V50P50N10-ReachabilityCardinality-13: EF true findpath
BridgeAndVehicles-COL-V50P50N10-ReachabilityCardinality-14: INITIAL true skeleton: preprocessing
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
BridgeAndVehicles-COL-V50P50N10-ReachabilityCardinality-03: EF 0 1 2 0 3 0 1 3
BridgeAndVehicles-COL-V50P50N10-ReachabilityCardinality-15: EF 0 2 2 0 3 0 0 3
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
136 EF FNDP 49/3551 0/5 BridgeAndVehicles-COL-V50P50N10-ReachabilityCardinality-03 2098569 t fired, 5363 attempts, .
140 EF EXCL 49/1799 1/32 BridgeAndVehicles-COL-V50P50N10-ReachabilityCardinality-03 41554 m, 658 m/sec, 51337 t fired, .
142 EF FNDP 10/1771 0/5 BridgeAndVehicles-COL-V50P50N10-ReachabilityCardinality-15 399578 t fired, 943 attempts, .
145 EF SRCH 1/1775 1/5 BridgeAndVehicles-COL-V50P50N10-ReachabilityCardinality-15 18211 m, 3642 m/sec, 45179 t fired, .
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/home/mcc/BenchKit/BenchKit_head.sh: line 62: 409 Killed lola --conf=$BIN_DIR/configfiles/reachabilitycardinalityconf --formula=$DIR/ReachabilityCardinality.xml --verdictfile=$DIR/GenericPropertiesVerdict.xml $DIR/model.pnml
Sequence of Actions to be Executed by the VM
This is useful if one wants to reexecute the tool in the VM from the submitted image disk.
set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="BridgeAndVehicles-COL-V50P50N10"
export BK_EXAMINATION="ReachabilityCardinality"
export BK_TOOL="lola"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"
# this is specific to your benchmark or test
export BIN_DIR="$HOME/BenchKit/bin"
# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi
# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-4028"
echo " Executing tool lola"
echo " Input is BridgeAndVehicles-COL-V50P50N10, examination is ReachabilityCardinality"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r023-tajo-162038139200094"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"
tar xzf /home/mcc/BenchKit/INPUTS/BridgeAndVehicles-COL-V50P50N10.tgz
mv BridgeAndVehicles-COL-V50P50N10 execution
cd execution
if [ "ReachabilityCardinality" = "ReachabilityDeadlock" ] || [ "ReachabilityCardinality" = "UpperBounds" ] || [ "ReachabilityCardinality" = "QuasiLiveness" ] || [ "ReachabilityCardinality" = "StableMarking" ] || [ "ReachabilityCardinality" = "Liveness" ] || [ "ReachabilityCardinality" = "OneSafe" ] || [ "ReachabilityCardinality" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh
echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "ReachabilityCardinality" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "ReachabilityCardinality" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "ReachabilityCardinality.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property ReachabilityCardinality.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "ReachabilityCardinality.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '
echo "FORMULA_NAME $x"
done
elif [ "ReachabilityCardinality" = "ReachabilityDeadlock" ] || [ "ReachabilityCardinality" = "QuasiLiveness" ] || [ "ReachabilityCardinality" = "StableMarking" ] || [ "ReachabilityCardinality" = "Liveness" ] || [ "ReachabilityCardinality" = "OneSafe" ] ; then
echo "FORMULA_NAME ReachabilityCardinality"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;