Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/data/fkordon/mcc2021-input.r004-tall-162037986200534.qcow2', fmt=qcow2 size=4294967296 backing_file='/data/fkordon/mcc2021-input.qcow2' encryption=off cluster_size=65536 lazy_refcounts=off
Waiting for the VM to be ready (probing ssh)
.................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................
=====================================================================
Generated by BenchKit 2-4028
Executing tool lola
Input is BART-COL-002, examination is ReachabilityCardinality
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r004-tall-162037986200534
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 484K
-rw-r--r-- 1 mcc users 12K May 5 16:58 CTLCardinality.txt
-rw-r--r-- 1 mcc users 95K May 5 16:58 CTLCardinality.xml
-rw-r--r-- 1 mcc users 7.1K May 5 16:58 CTLFireability.txt
-rw-r--r-- 1 mcc users 52K May 5 16:58 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K May 6 14:48 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.4K May 6 14:48 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 3.4K Mar 28 15:45 LTLCardinality.txt
-rw-r--r-- 1 mcc users 22K Mar 28 15:45 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.2K Mar 28 15:45 LTLFireability.txt
-rw-r--r-- 1 mcc users 19K Mar 28 15:45 LTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K Mar 23 02:08 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 20K Mar 23 02:07 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 2.3K Mar 22 10:36 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 11K Mar 22 10:36 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.6K Mar 22 09:09 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.7K Mar 22 09:09 UpperBounds.xml
-rw-r--r-- 1 mcc users 5 May 5 16:51 equiv_pt
-rw-r--r-- 1 mcc users 4 May 5 16:51 instance
-rw-r--r-- 1 mcc users 5 May 5 16:51 iscolored
-rw-r--r-- 1 mcc users 184K May 5 16:51 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME BART-COL-002-ReachabilityCardinality-00
FORMULA_NAME BART-COL-002-ReachabilityCardinality-01
FORMULA_NAME BART-COL-002-ReachabilityCardinality-02
FORMULA_NAME BART-COL-002-ReachabilityCardinality-03
FORMULA_NAME BART-COL-002-ReachabilityCardinality-04
FORMULA_NAME BART-COL-002-ReachabilityCardinality-05
FORMULA_NAME BART-COL-002-ReachabilityCardinality-06
FORMULA_NAME BART-COL-002-ReachabilityCardinality-07
FORMULA_NAME BART-COL-002-ReachabilityCardinality-08
FORMULA_NAME BART-COL-002-ReachabilityCardinality-09
FORMULA_NAME BART-COL-002-ReachabilityCardinality-10
FORMULA_NAME BART-COL-002-ReachabilityCardinality-11
FORMULA_NAME BART-COL-002-ReachabilityCardinality-12
FORMULA_NAME BART-COL-002-ReachabilityCardinality-13
FORMULA_NAME BART-COL-002-ReachabilityCardinality-14
FORMULA_NAME BART-COL-002-ReachabilityCardinality-15

=== Now, execution of the tool begins

BK_START 1620456156076

starting LoLA
BK_INPUT BART-COL-002
BK_EXAMINATION: ReachabilityCardinality
bin directory: /home/mcc/BenchKit/bin
current directory: /home/mcc/execution
ReachabilityCardinality

FORMULA BART-COL-002-ReachabilityCardinality-02 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA BART-COL-002-ReachabilityCardinality-09 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA BART-COL-002-ReachabilityCardinality-14 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA BART-COL-002-ReachabilityCardinality-03 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA BART-COL-002-ReachabilityCardinality-13 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA BART-COL-002-ReachabilityCardinality-07 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA BART-COL-002-ReachabilityCardinality-01 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA BART-COL-002-ReachabilityCardinality-05 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA BART-COL-002-ReachabilityCardinality-08 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA BART-COL-002-ReachabilityCardinality-11 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA BART-COL-002-ReachabilityCardinality-15 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

BK_STOP 1620456201198

--------------------
content from stderr:

lola: MEM LIMIT 32
lola: MEM LIMIT 5
lola: NET
lola: input: PNML file (--pnmlnet)
lola: reading net from /home/mcc/execution/model.pnml
lola: reading pnml
lola: PNML file contains High-Level net
lola: finished parsing
lola: closed net file /home/mcc/execution/model.pnml
lola: Reading HL formula in XML format (--xmlformula)
lola: reading formula from /home/mcc/execution/ReachabilityCardinality.xml
lola: rewrite Frontend/Parser/formula_rewrite.k:96
lola: rewrite Frontend/Parser/formula_rewrite.k:156
lola: rewrite Frontend/Parser/formula_rewrite.k:147
lola: rewrite Frontend/Parser/formula_rewrite.k:98
lola: rewrite Frontend/Parser/formula_rewrite.k:159
lola: rewrite Frontend/Parser/formula_rewrite.k:150
lola: rewrite Frontend/Parser/formula_rewrite.k:98
lola: rewrite Frontend/Parser/formula_rewrite.k:159
lola: rewrite Frontend/Parser/formula_rewrite.k:150
lola: rewrite Frontend/Parser/formula_rewrite.k:96
lola: rewrite Frontend/Parser/formula_rewrite.k:156
lola: rewrite Frontend/Parser/formula_rewrite.k:147
lola: TR BINDINGS
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: LAUNCH INITIAL
lola: LAUNCH task # 8 (type SKEL/CNST) for 6 BART-COL-002-ReachabilityCardinality-02
lola: time limit : 0 sec
lola: memory limit: 0 pages
lola: LAUNCH task # 49 (type SKEL/FNDP) for 9 BART-COL-002-ReachabilityCardinality-03
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 50 (type SKEL/EQUN) for 9 BART-COL-002-ReachabilityCardinality-03
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: LAUNCH task # 52 (type SKEL/SRCH) for 9 BART-COL-002-ReachabilityCardinality-03
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: FINISHED task # 8 (type SKEL/CNST) for BART-COL-002-ReachabilityCardinality-02
lola: result : false
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: LAUNCH INITIAL
lola: LAUNCH task # 29 (type SKEL/CNST) for 27 BART-COL-002-ReachabilityCardinality-09
lola: time limit : 0 sec
lola: memory limit: 0 pages
lola: LAUNCH INITIAL
lola: LAUNCH task # 44 (type SKEL/CNST) for 42 BART-COL-002-ReachabilityCardinality-14
lola: time limit : 0 sec
lola: memory limit: 0 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: FINISHED task # 29 (type SKEL/CNST) for BART-COL-002-ReachabilityCardinality-09
lola: result : true
lola: FINISHED task # 52 (type SKEL/SRCH) for BART-COL-002-ReachabilityCardinality-03
lola: result : false
lola: markings : 1
lola: time used : 0.000000
lola: memory pages used : 1
lola: FINISHED task # 44 (type SKEL/CNST) for BART-COL-002-ReachabilityCardinality-14
lola: result : false
lola: LAUNCH INITIAL
lola: LAUNCH task # 41 (type SKEL/CNST) for 39 BART-COL-002-ReachabilityCardinality-13
lola: time limit : 0 sec
lola: memory limit: 0 pages
lola: CANCELED task # 49 (type FNDP) for BART-COL-002-ReachabilityCardinality-03 (obsolete)
lola: CANCELED task # 50 (type EQUN) for BART-COL-002-ReachabilityCardinality-03 (obsolete)
lola: LAUNCH task # 56 (type SKEL/FNDP) for 3 BART-COL-002-ReachabilityCardinality-01
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 59 (type SKEL/FNDP) for 12 BART-COL-002-ReachabilityCardinality-04
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 62 (type SKEL/EQUN) for 12 BART-COL-002-ReachabilityCardinality-04
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: FINISHED task # 41 (type SKEL/CNST) for BART-COL-002-ReachabilityCardinality-13
lola: result : true
lola: FINISHED task # 49 (type SKEL/FNDP) for BART-COL-002-ReachabilityCardinality-03
lola: result : unknown
lola: fired transitions : 96194
lola: tried executions : 96195
lola: time used : 0.000000
lola: memory pages used : 0
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: LAUNCH task # 67 (type SKEL/FNDP) for 21 BART-COL-002-ReachabilityCardinality-07
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: FINISHED task # 50 (type SKEL/EQUN) for BART-COL-002-ReachabilityCardinality-03
lola: result : unknown
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-62.sara.
lola: TR BINDINGS DONE
lola: Places: 10865, Transitions: 646
sara: error: :7: error: syntax error, unexpected $end, expecting KEY_TRANSITION
sara: error while reading Petri net from file -- aborting [#04]
sara: see manual for a documentation of this error
sara: last error message: No such file or directory
lola: FINISHED task # 62 (type SKEL/EQUN) for BART-COL-002-ReachabilityCardinality-04
lola: result : unknown
lola: LAUNCH task # 79 (type SKEL/FNDP) for 0 BART-COL-002-ReachabilityCardinality-00
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: @ trans TooEarly
lola: @ trans MissStation
lola: @ trans TrainStop
lola: @ trans TrainStable
lola: @ trans TrainDecc
lola: @ trans TrainAcc
lola: @ trans AtStation
lola: rewrite Frontend/Parser/formula_rewrite.k:96
lola: rewrite Frontend/Parser/formula_rewrite.k:156
lola: rewrite Frontend/Parser/formula_rewrite.k:147
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
BART-COL-002-ReachabilityCardinality-02: INITIAL false skeleton: preprocessing
BART-COL-002-ReachabilityCardinality-03: EF false skeleton: tandem / insertion
BART-COL-002-ReachabilityCardinality-09: INITIAL true skeleton: preprocessing
BART-COL-002-ReachabilityCardinality-13: INITIAL true skeleton: preprocessing
BART-COL-002-ReachabilityCardinality-14: INITIAL false skeleton: preprocessing

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
BART-COL-002-ReachabilityCardinality-00: EF 0 4 1 0 0 0 0 0
BART-COL-002-ReachabilityCardinality-01: EF 0 4 1 0 0 0 0 0
BART-COL-002-ReachabilityCardinality-04: AG 0 3 1 0 1 0 0 0
BART-COL-002-ReachabilityCardinality-05: EF 0 5 0 0 0 0 0 0
BART-COL-002-ReachabilityCardinality-06: AG 0 5 0 0 0 0 0 0
BART-COL-002-ReachabilityCardinality-07: AG 0 4 1 0 0 0 0 0
BART-COL-002-ReachabilityCardinality-08: EF 0 5 0 0 0 0 0 0
BART-COL-002-ReachabilityCardinality-10: AG 0 5 0 0 0 0 0 0
BART-COL-002-ReachabilityCardinality-11: AG 0 5 0 0 0 0 0 0
BART-COL-002-ReachabilityCardinality-12: AG 0 5 0 0 0 0 0 0
BART-COL-002-ReachabilityCardinality-15: AG 0 5 0 0 0 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
56 EF FNDP 5/257 0/5 BART-COL-002-ReachabilityCardinality-01 12633693 t fired, 12633694 attempts, .
59 EF FNDP 5/257 0/5 BART-COL-002-ReachabilityCardinality-04 12518108 t fired, 12518109 attempts, .
67 EF FNDP 5/276 0/5 BART-COL-002-ReachabilityCardinality-07 12567134 t fired, 12567135 attempts, .
79 EF FNDP 5/276 0/5 BART-COL-002-ReachabilityCardinality-00 12120509 t fired, 12120510 attempts, .

Time elapsed: 5 secs. Pages in use: 1
# running tasks: 4 of 4 Visible: 16
lola: rewrite Frontend/Parser/formula_rewrite.k:96
lola: rewrite Frontend/Parser/formula_rewrite.k:156
lola: rewrite Frontend/Parser/formula_rewrite.k:147
lola: rewrite Frontend/Parser/formula_rewrite.k:98
lola: rewrite Frontend/Parser/formula_rewrite.k:159
lola: rewrite Frontend/Parser/formula_rewrite.k:150
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
BART-COL-002-ReachabilityCardinality-02: INITIAL false skeleton: preprocessing
BART-COL-002-ReachabilityCardinality-03: EF false skeleton: tandem / insertion
BART-COL-002-ReachabilityCardinality-09: INITIAL true skeleton: preprocessing
BART-COL-002-ReachabilityCardinality-13: INITIAL true skeleton: preprocessing
BART-COL-002-ReachabilityCardinality-14: INITIAL false skeleton: preprocessing

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
BART-COL-002-ReachabilityCardinality-00: EF 0 4 1 0 0 0 0 0
BART-COL-002-ReachabilityCardinality-01: EF 0 4 1 0 0 0 0 0
BART-COL-002-ReachabilityCardinality-04: AG 0 3 1 0 1 0 0 0
BART-COL-002-ReachabilityCardinality-05: EF 0 5 0 0 0 0 0 0
BART-COL-002-ReachabilityCardinality-06: AG 0 5 0 0 0 0 0 0
BART-COL-002-ReachabilityCardinality-07: AG 0 4 1 0 0 0 0 0
BART-COL-002-ReachabilityCardinality-08: EF 0 5 0 0 0 0 0 0
BART-COL-002-ReachabilityCardinality-10: AG 0 5 0 0 0 0 0 0
BART-COL-002-ReachabilityCardinality-11: AG 0 5 0 0 0 0 0 0
BART-COL-002-ReachabilityCardinality-12: AG 0 5 0 0 0 0 0 0
BART-COL-002-ReachabilityCardinality-15: AG 0 5 0 0 0 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
56 EF FNDP 10/252 0/5 BART-COL-002-ReachabilityCardinality-01 27009891 t fired, 27009892 attempts, .
59 EF FNDP 10/252 0/5 BART-COL-002-ReachabilityCardinality-04 27044331 t fired, 27044332 attempts, .
67 EF FNDP 10/271 0/5 BART-COL-002-ReachabilityCardinality-07 27047632 t fired, 27047633 attempts, .
79 EF FNDP 10/271 0/5 BART-COL-002-ReachabilityCardinality-00 26432559 t fired, 26432561 attempts, .

Time elapsed: 10 secs. Pages in use: 1
# running tasks: 4 of 4 Visible: 16
lola: rewrite Frontend/Parser/formula_rewrite.k:96
lola: rewrite Frontend/Parser/formula_rewrite.k:156
lola: rewrite Frontend/Parser/formula_rewrite.k:147
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
BART-COL-002-ReachabilityCardinality-02: INITIAL false skeleton: preprocessing
BART-COL-002-ReachabilityCardinality-03: EF false skeleton: tandem / insertion
BART-COL-002-ReachabilityCardinality-09: INITIAL true skeleton: preprocessing
BART-COL-002-ReachabilityCardinality-13: INITIAL true skeleton: preprocessing
BART-COL-002-ReachabilityCardinality-14: INITIAL false skeleton: preprocessing

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
BART-COL-002-ReachabilityCardinality-00: EF 0 4 1 0 0 0 0 0
BART-COL-002-ReachabilityCardinality-01: EF 0 4 1 0 0 0 0 0
BART-COL-002-ReachabilityCardinality-04: AG 0 3 1 0 1 0 0 0
BART-COL-002-ReachabilityCardinality-05: EF 0 5 0 0 0 0 0 0
BART-COL-002-ReachabilityCardinality-06: AG 0 5 0 0 0 0 0 0
BART-COL-002-ReachabilityCardinality-07: AG 0 4 1 0 0 0 0 0
BART-COL-002-ReachabilityCardinality-08: EF 0 5 0 0 0 0 0 0
BART-COL-002-ReachabilityCardinality-10: AG 0 5 0 0 0 0 0 0
BART-COL-002-ReachabilityCardinality-11: AG 0 5 0 0 0 0 0 0
BART-COL-002-ReachabilityCardinality-12: AG 0 5 0 0 0 0 0 0
BART-COL-002-ReachabilityCardinality-15: AG 0 5 0 0 0 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
56 EF FNDP 15/247 0/5 BART-COL-002-ReachabilityCardinality-01 40114135 t fired, 40114136 attempts, .
59 EF FNDP 15/247 0/5 BART-COL-002-ReachabilityCardinality-04 40539458 t fired, 40539459 attempts, .
67 EF FNDP 15/266 0/5 BART-COL-002-ReachabilityCardinality-07 40468932 t fired, 40468933 attempts, .
79 EF FNDP 15/266 0/5 BART-COL-002-ReachabilityCardinality-00 38870435 t fired, 38870436 attempts, .

Time elapsed: 15 secs. Pages in use: 1
# running tasks: 4 of 4 Visible: 16
lola: rewrite Frontend/Parser/formula_rewrite.k:98
lola: rewrite Frontend/Parser/formula_rewrite.k:159
lola: rewrite Frontend/Parser/formula_rewrite.k:150
lola: rewrite Frontend/Parser/formula_rewrite.k:98
lola: rewrite Frontend/Parser/formula_rewrite.k:159
lola: rewrite Frontend/Parser/formula_rewrite.k:150
lola: LAUNCH INITIAL
lola: LAUNCH task # 4 (type CNST) for 3 BART-COL-002-ReachabilityCardinality-01
lola: time limit : 0 sec
lola: memory limit: 0 pages
lola: LAUNCH INITIAL
lola: LAUNCH task # 16 (type CNST) for 15 BART-COL-002-ReachabilityCardinality-05
lola: time limit : 0 sec
lola: memory limit: 0 pages
lola: LAUNCH INITIAL
lola: LAUNCH task # 22 (type CNST) for 21 BART-COL-002-ReachabilityCardinality-07
lola: time limit : 0 sec
lola: memory limit: 0 pages
lola: LAUNCH INITIAL
lola: LAUNCH task # 25 (type CNST) for 24 BART-COL-002-ReachabilityCardinality-08
lola: time limit : 0 sec
lola: memory limit: 0 pages
lola: LAUNCH INITIAL
lola: LAUNCH task # 34 (type CNST) for 33 BART-COL-002-ReachabilityCardinality-11
lola: time limit : 0 sec
lola: memory limit: 0 pages
lola: FINISHED task # 22 (type CNST) for BART-COL-002-ReachabilityCardinality-07
lola: result : true
lola: CANCELED task # 67 (type FNDP) for BART-COL-002-ReachabilityCardinality-07 (obsolete)
lola: FINISHED task # 4 (type CNST) for BART-COL-002-ReachabilityCardinality-01
lola: result : false
lola: CANCELED task # 56 (type FNDP) for BART-COL-002-ReachabilityCardinality-01 (obsolete)
lola: FINISHED task # 67 (type SKEL/FNDP) for BART-COL-002-ReachabilityCardinality-07
lola: result : unknown
lola: fired transitions : 53692857
lola: tried executions : 53692858
lola: time used : 20.000000
lola: memory pages used : 0
lola: FINISHED task # 25 (type CNST) for BART-COL-002-ReachabilityCardinality-08
lola: result : false
lola: FINISHED task # 16 (type CNST) for BART-COL-002-ReachabilityCardinality-05
lola: result : false
lola: FINISHED task # 56 (type SKEL/FNDP) for BART-COL-002-ReachabilityCardinality-01
lola: result : unknown
lola: fired transitions : 53281740
lola: tried executions : 53281741
lola: time used : 20.000000
lola: memory pages used : 0
lola: Rule S: 242 transitions removed,10329 places removed
lola: LAUNCH task # 88 (type SKEL/FNDP) for 33 BART-COL-002-ReachabilityCardinality-11
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 34 (type CNST) for BART-COL-002-ReachabilityCardinality-11
lola: result : true
lola: LAUNCH INITIAL
lola: LAUNCH task # 46 (type CNST) for 45 BART-COL-002-ReachabilityCardinality-15
lola: time limit : 0 sec
lola: memory limit: 0 pages
lola: CANCELED task # 88 (type FNDP) for BART-COL-002-ReachabilityCardinality-11 (obsolete)
lola: LAUNCH task # 96 (type SKEL/FNDP) for 30 BART-COL-002-ReachabilityCardinality-10
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 88 (type SKEL/FNDP) for BART-COL-002-ReachabilityCardinality-11
lola: result : unknown
lola: fired transitions : 8036
lola: tried executions : 8037
lola: time used : 0.000000
lola: memory pages used : 0
lola: FINISHED task # 46 (type CNST) for BART-COL-002-ReachabilityCardinality-15
lola: result : true
lola: LAUNCH task # 104 (type SKEL/FNDP) for 36 BART-COL-002-ReachabilityCardinality-12
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: planning for BART-COL-002-ReachabilityCardinality-03 stopped (result already fixed).
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
BART-COL-002-ReachabilityCardinality-01: EF false preprocessing
BART-COL-002-ReachabilityCardinality-02: INITIAL false skeleton: preprocessing
BART-COL-002-ReachabilityCardinality-03: EF false skeleton: tandem / insertion
BART-COL-002-ReachabilityCardinality-05: EF false preprocessing
BART-COL-002-ReachabilityCardinality-07: AG true preprocessing
BART-COL-002-ReachabilityCardinality-08: EF false preprocessing
BART-COL-002-ReachabilityCardinality-09: INITIAL true skeleton: preprocessing
BART-COL-002-ReachabilityCardinality-11: AG true preprocessing
BART-COL-002-ReachabilityCardinality-13: INITIAL true skeleton: preprocessing
BART-COL-002-ReachabilityCardinality-14: INITIAL false skeleton: preprocessing
BART-COL-002-ReachabilityCardinality-15: AG true preprocessing

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
BART-COL-002-ReachabilityCardinality-00: EF 0 9 1 0 0 0 0 0
BART-COL-002-ReachabilityCardinality-04: AG 0 8 1 0 1 0 0 0
BART-COL-002-ReachabilityCardinality-06: AG 0 10 0 0 0 0 0 0
BART-COL-002-ReachabilityCardinality-10: AG 0 9 1 0 0 0 0 0
BART-COL-002-ReachabilityCardinality-12: AG 0 9 1 0 0 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
59 EF FNDP 20/307 0/5 BART-COL-002-ReachabilityCardinality-04 54919732 t fired, 54919733 attempts, .
79 EF FNDP 20/307 0/5 BART-COL-002-ReachabilityCardinality-00 52811285 t fired, 52811286 attempts, .
96 EF FNDP 0/325 0/5 BART-COL-002-ReachabilityCardinality-10 796910 t fired, 796911 attempts, .
104 EF FNDP 0/325 0/5 BART-COL-002-ReachabilityCardinality-12 782488 t fired, 782489 attempts, .

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FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
BART-COL-002-ReachabilityCardinality-01: EF false preprocessing
BART-COL-002-ReachabilityCardinality-02: INITIAL false skeleton: preprocessing
BART-COL-002-ReachabilityCardinality-03: EF false skeleton: tandem / insertion
BART-COL-002-ReachabilityCardinality-05: EF false preprocessing
BART-COL-002-ReachabilityCardinality-07: AG true preprocessing
BART-COL-002-ReachabilityCardinality-08: EF false preprocessing
BART-COL-002-ReachabilityCardinality-09: INITIAL true skeleton: preprocessing
BART-COL-002-ReachabilityCardinality-11: AG true preprocessing
BART-COL-002-ReachabilityCardinality-13: INITIAL true skeleton: preprocessing
BART-COL-002-ReachabilityCardinality-14: INITIAL false skeleton: preprocessing
BART-COL-002-ReachabilityCardinality-15: AG true preprocessing

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
BART-COL-002-ReachabilityCardinality-00: EF 0 9 1 0 0 0 0 0
BART-COL-002-ReachabilityCardinality-04: AG 0 8 1 0 1 0 0 0
BART-COL-002-ReachabilityCardinality-06: AG 0 10 0 0 0 0 0 0
BART-COL-002-ReachabilityCardinality-10: AG 0 9 1 0 0 0 0 0
BART-COL-002-ReachabilityCardinality-12: AG 0 9 1 0 0 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
59 EF FNDP 25/307 0/5 BART-COL-002-ReachabilityCardinality-04 73659938 t fired, 73659939 attempts, .
79 EF FNDP 25/307 0/5 BART-COL-002-ReachabilityCardinality-00 67180807 t fired, 67180808 attempts, .
96 EF FNDP 5/325 0/5 BART-COL-002-ReachabilityCardinality-10 15135493 t fired, 15135494 attempts, .
104 EF FNDP 5/325 0/5 BART-COL-002-ReachabilityCardinality-12 15095690 t fired, 15095691 attempts, .

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FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
BART-COL-002-ReachabilityCardinality-01: EF false preprocessing
BART-COL-002-ReachabilityCardinality-02: INITIAL false skeleton: preprocessing
BART-COL-002-ReachabilityCardinality-03: EF false skeleton: tandem / insertion
BART-COL-002-ReachabilityCardinality-05: EF false preprocessing
BART-COL-002-ReachabilityCardinality-07: AG true preprocessing
BART-COL-002-ReachabilityCardinality-08: EF false preprocessing
BART-COL-002-ReachabilityCardinality-09: INITIAL true skeleton: preprocessing
BART-COL-002-ReachabilityCardinality-11: AG true preprocessing
BART-COL-002-ReachabilityCardinality-13: INITIAL true skeleton: preprocessing
BART-COL-002-ReachabilityCardinality-14: INITIAL false skeleton: preprocessing
BART-COL-002-ReachabilityCardinality-15: AG true preprocessing

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
BART-COL-002-ReachabilityCardinality-00: EF 0 9 1 0 0 0 0 0
BART-COL-002-ReachabilityCardinality-04: AG 0 8 1 0 1 0 0 0
BART-COL-002-ReachabilityCardinality-06: AG 0 10 0 0 0 0 0 0
BART-COL-002-ReachabilityCardinality-10: AG 0 9 1 0 0 0 0 0
BART-COL-002-ReachabilityCardinality-12: AG 0 9 1 0 0 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
59 EF FNDP 30/302 0/5 BART-COL-002-ReachabilityCardinality-04 85777302 t fired, 85777303 attempts, .
79 EF FNDP 30/302 0/5 BART-COL-002-ReachabilityCardinality-00 77570557 t fired, 77570558 attempts, .
96 EF FNDP 10/320 0/5 BART-COL-002-ReachabilityCardinality-10 25563990 t fired, 25563991 attempts, .
104 EF FNDP 10/320 0/5 BART-COL-002-ReachabilityCardinality-12 25454720 t fired, 25454721 attempts, .

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FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
BART-COL-002-ReachabilityCardinality-01: EF false preprocessing
BART-COL-002-ReachabilityCardinality-02: INITIAL false skeleton: preprocessing
BART-COL-002-ReachabilityCardinality-03: EF false skeleton: tandem / insertion
BART-COL-002-ReachabilityCardinality-05: EF false preprocessing
BART-COL-002-ReachabilityCardinality-07: AG true preprocessing
BART-COL-002-ReachabilityCardinality-08: EF false preprocessing
BART-COL-002-ReachabilityCardinality-09: INITIAL true skeleton: preprocessing
BART-COL-002-ReachabilityCardinality-11: AG true preprocessing
BART-COL-002-ReachabilityCardinality-13: INITIAL true skeleton: preprocessing
BART-COL-002-ReachabilityCardinality-14: INITIAL false skeleton: preprocessing
BART-COL-002-ReachabilityCardinality-15: AG true preprocessing

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
BART-COL-002-ReachabilityCardinality-00: EF 0 9 1 0 0 0 0 0
BART-COL-002-ReachabilityCardinality-04: AG 0 8 1 0 1 0 0 0
BART-COL-002-ReachabilityCardinality-06: AG 0 10 0 0 0 0 0 0
BART-COL-002-ReachabilityCardinality-10: AG 0 9 1 0 0 0 0 0
BART-COL-002-ReachabilityCardinality-12: AG 0 9 1 0 0 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
59 EF FNDP 35/297 0/5 BART-COL-002-ReachabilityCardinality-04 101947656 t fired, 101947657 attempts, .
79 EF FNDP 35/297 0/5 BART-COL-002-ReachabilityCardinality-00 90470641 t fired, 90470642 attempts, .
96 EF FNDP 15/315 0/5 BART-COL-002-ReachabilityCardinality-10 38412196 t fired, 38412197 attempts, .
104 EF FNDP 15/315 0/5 BART-COL-002-ReachabilityCardinality-12 38128745 t fired, 38128745 attempts, .

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FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
BART-COL-002-ReachabilityCardinality-01: EF false preprocessing
BART-COL-002-ReachabilityCardinality-02: INITIAL false skeleton: preprocessing
BART-COL-002-ReachabilityCardinality-03: EF false skeleton: tandem / insertion
BART-COL-002-ReachabilityCardinality-05: EF false preprocessing
BART-COL-002-ReachabilityCardinality-07: AG true preprocessing
BART-COL-002-ReachabilityCardinality-08: EF false preprocessing
BART-COL-002-ReachabilityCardinality-09: INITIAL true skeleton: preprocessing
BART-COL-002-ReachabilityCardinality-11: AG true preprocessing
BART-COL-002-ReachabilityCardinality-13: INITIAL true skeleton: preprocessing
BART-COL-002-ReachabilityCardinality-14: INITIAL false skeleton: preprocessing
BART-COL-002-ReachabilityCardinality-15: AG true preprocessing

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
BART-COL-002-ReachabilityCardinality-00: EF 0 9 1 0 0 0 0 0
BART-COL-002-ReachabilityCardinality-04: AG 0 8 1 0 1 0 0 0
BART-COL-002-ReachabilityCardinality-06: AG 0 10 0 0 0 0 0 0
BART-COL-002-ReachabilityCardinality-10: AG 0 9 1 0 0 0 0 0
BART-COL-002-ReachabilityCardinality-12: AG 0 9 1 0 0 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
59 EF FNDP 40/292 0/5 BART-COL-002-ReachabilityCardinality-04 121063158 t fired, 121063159 attempts, .
79 EF FNDP 40/292 0/5 BART-COL-002-ReachabilityCardinality-00 105006435 t fired, 105006436 attempts, .
96 EF FNDP 20/310 0/5 BART-COL-002-ReachabilityCardinality-10 52994108 t fired, 52994109 attempts, .
104 EF FNDP 20/310 0/5 BART-COL-002-ReachabilityCardinality-12 52306406 t fired, 52306407 attempts, .

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/home/mcc/BenchKit/BenchKit_head.sh: line 62: 408 Killed lola --conf=$BIN_DIR/configfiles/reachabilitycardinalityconf --formula=$DIR/ReachabilityCardinality.xml --verdictfile=$DIR/GenericPropertiesVerdict.xml $DIR/model.pnml

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="BART-COL-002"
export BK_EXAMINATION="ReachabilityCardinality"
export BK_TOOL="lola"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-4028"
echo " Executing tool lola"
echo " Input is BART-COL-002, examination is ReachabilityCardinality"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r004-tall-162037986200534"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/BART-COL-002.tgz
mv BART-COL-002 execution
cd execution
if [ "ReachabilityCardinality" = "ReachabilityDeadlock" ] || [ "ReachabilityCardinality" = "UpperBounds" ] || [ "ReachabilityCardinality" = "QuasiLiveness" ] || [ "ReachabilityCardinality" = "StableMarking" ] || [ "ReachabilityCardinality" = "Liveness" ] || [ "ReachabilityCardinality" = "OneSafe" ] || [ "ReachabilityCardinality" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "ReachabilityCardinality" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "ReachabilityCardinality" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "ReachabilityCardinality.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property ReachabilityCardinality.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "ReachabilityCardinality.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' ReachabilityCardinality.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ "ReachabilityCardinality" = "ReachabilityDeadlock" ] || [ "ReachabilityCardinality" = "QuasiLiveness" ] || [ "ReachabilityCardinality" = "StableMarking" ] || [ "ReachabilityCardinality" = "Liveness" ] || [ "ReachabilityCardinality" = "OneSafe" ] ; then
echo "FORMULA_NAME ReachabilityCardinality"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;