fond
Model Checking Contest 2021
11th edition, Paris, France, June 23, 2021
Execution of r004-tall-162037985800262
Last Updated
Jun 28, 2021

About the Execution of LoLA for AirplaneLD-PT-0050

Execution Summary
Max Memory
Used (MB)
Time wait (ms) CPU Usage (ms) I/O Wait (ms) Computed Result Execution
Status
73.584 275.00 30.00 0.00 TTFFTFFFFTTFTTFT normal

Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/data/fkordon/mcc2021-input.r004-tall-162037985800262.qcow2', fmt=qcow2 size=4294967296 backing_file='/data/fkordon/mcc2021-input.qcow2' encryption=off cluster_size=65536 lazy_refcounts=off
Waiting for the VM to be ready (probing ssh)
....................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................
=====================================================================
Generated by BenchKit 2-4028
Executing tool lola
Input is AirplaneLD-PT-0050, examination is ReachabilityCardinality
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r004-tall-162037985800262
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 2.5M
-rw-r--r-- 1 mcc users 238K May 5 16:58 CTLCardinality.txt
-rw-r--r-- 1 mcc users 883K May 5 16:58 CTLCardinality.xml
-rw-r--r-- 1 mcc users 97K May 5 16:58 CTLFireability.txt
-rw-r--r-- 1 mcc users 584K May 5 16:58 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K May 6 14:48 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.5K May 6 14:48 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 11K Mar 28 15:43 LTLCardinality.txt
-rw-r--r-- 1 mcc users 33K Mar 28 15:43 LTLCardinality.xml
-rw-r--r-- 1 mcc users 7.4K Mar 28 15:43 LTLFireability.txt
-rw-r--r-- 1 mcc users 41K Mar 28 15:43 LTLFireability.xml
-rw-r--r-- 1 mcc users 13K Mar 23 01:17 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 34K Mar 23 01:17 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 12K Mar 22 09:37 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 53K Mar 22 09:37 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.8K Mar 22 09:09 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.9K Mar 22 09:09 UpperBounds.xml
-rw-r--r-- 1 mcc users 5 May 5 16:51 equiv_col
-rw-r--r-- 1 mcc users 5 May 5 16:51 instance
-rw-r--r-- 1 mcc users 6 May 5 16:51 iscolored
-rw-r--r-- 1 mcc users 404K May 5 16:51 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME AirplaneLD-PT-0050-ReachabilityCardinality-00
FORMULA_NAME AirplaneLD-PT-0050-ReachabilityCardinality-01
FORMULA_NAME AirplaneLD-PT-0050-ReachabilityCardinality-02
FORMULA_NAME AirplaneLD-PT-0050-ReachabilityCardinality-03
FORMULA_NAME AirplaneLD-PT-0050-ReachabilityCardinality-04
FORMULA_NAME AirplaneLD-PT-0050-ReachabilityCardinality-05
FORMULA_NAME AirplaneLD-PT-0050-ReachabilityCardinality-06
FORMULA_NAME AirplaneLD-PT-0050-ReachabilityCardinality-07
FORMULA_NAME AirplaneLD-PT-0050-ReachabilityCardinality-08
FORMULA_NAME AirplaneLD-PT-0050-ReachabilityCardinality-09
FORMULA_NAME AirplaneLD-PT-0050-ReachabilityCardinality-10
FORMULA_NAME AirplaneLD-PT-0050-ReachabilityCardinality-11
FORMULA_NAME AirplaneLD-PT-0050-ReachabilityCardinality-12
FORMULA_NAME AirplaneLD-PT-0050-ReachabilityCardinality-13
FORMULA_NAME AirplaneLD-PT-0050-ReachabilityCardinality-14
FORMULA_NAME AirplaneLD-PT-0050-ReachabilityCardinality-15

=== Now, execution of the tool begins

BK_START 1620434835107

starting LoLA
BK_INPUT AirplaneLD-PT-0050
BK_EXAMINATION: ReachabilityCardinality
bin directory: /home/mcc/BenchKit/bin
current directory: /home/mcc/execution
ReachabilityCardinality

FORMULA AirplaneLD-PT-0050-ReachabilityCardinality-01 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA AirplaneLD-PT-0050-ReachabilityCardinality-02 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA AirplaneLD-PT-0050-ReachabilityCardinality-11 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA AirplaneLD-PT-0050-ReachabilityCardinality-03 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA AirplaneLD-PT-0050-ReachabilityCardinality-07 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA AirplaneLD-PT-0050-ReachabilityCardinality-08 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA AirplaneLD-PT-0050-ReachabilityCardinality-04 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA AirplaneLD-PT-0050-ReachabilityCardinality-05 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA AirplaneLD-PT-0050-ReachabilityCardinality-06 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA AirplaneLD-PT-0050-ReachabilityCardinality-13 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA AirplaneLD-PT-0050-ReachabilityCardinality-10 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA AirplaneLD-PT-0050-ReachabilityCardinality-00 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA AirplaneLD-PT-0050-ReachabilityCardinality-09 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA AirplaneLD-PT-0050-ReachabilityCardinality-15 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA AirplaneLD-PT-0050-ReachabilityCardinality-14 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA AirplaneLD-PT-0050-ReachabilityCardinality-12 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

BK_STOP 1620434835382

--------------------
content from stderr:

lola: MEM LIMIT 32
lola: MEM LIMIT 5
lola: NET
lola: input: PNML file (--pnmlnet)
lola: reading net from /home/mcc/execution/model.pnml
lola: reading pnml
lola: PNML file contains place/transition net
lola: finished parsing
lola: closed net file /home/mcc/execution/model.pnml
lola: Reading formula.
lola: Using XML format (--xmlformula)
lola: reading XML formula
lola: reading formula from /home/mcc/execution/ReachabilityCardinality.xml
lola: rewrite Frontend/Parser/formula_rewrite.k:98
lola: rewrite Frontend/Parser/formula_rewrite.k:159
lola: rewrite Frontend/Parser/formula_rewrite.k:150
lola: rewrite Frontend/Parser/formula_rewrite.k:96
lola: rewrite Frontend/Parser/formula_rewrite.k:156
lola: rewrite Frontend/Parser/formula_rewrite.k:147
lola: rewrite Frontend/Parser/formula_rewrite.k:96
lola: rewrite Frontend/Parser/formula_rewrite.k:156
lola: rewrite Frontend/Parser/formula_rewrite.k:147
lola: rewrite Frontend/Parser/formula_rewrite.k:96
lola: rewrite Frontend/Parser/formula_rewrite.k:156
lola: rewrite Frontend/Parser/formula_rewrite.k:147
lola: rewrite Frontend/Parser/formula_rewrite.k:98
lola: rewrite Frontend/Parser/formula_rewrite.k:159
lola: rewrite Frontend/Parser/formula_rewrite.k:150
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: LAUNCH task # 49 (type SKEL/FNDP) for 0 AirplaneLD-PT-0050-ReachabilityCardinality-00
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 50 (type SKEL/EQUN) for 0 AirplaneLD-PT-0050-ReachabilityCardinality-00
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: LAUNCH task # 52 (type SKEL/SRCH) for 0 AirplaneLD-PT-0050-ReachabilityCardinality-00
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 53 (type SKEL/SRCH) for 0 AirplaneLD-PT-0050-ReachabilityCardinality-00
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 49 (type SKEL/FNDP) for AirplaneLD-PT-0050-ReachabilityCardinality-00
lola: result : true
lola: fired transitions : 2
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
lola: FINISHED task # 52 (type SKEL/SRCH) for AirplaneLD-PT-0050-ReachabilityCardinality-00
lola: result : true
lola: markings : 4
lola: fired transitions : 3
lola: time used : 0.000000
lola: memory pages used : 1
lola: FINISHED task # 53 (type SKEL/SRCH) for AirplaneLD-PT-0050-ReachabilityCardinality-00
lola: result : true
lola: markings : 22
lola: fired transitions : 21
lola: time used : 0.000000
lola: memory pages used : 1
lola: Created skeleton in 0.000000 secs.
lola: CANCELED task # 50 (type EQUN) for AirplaneLD-PT-0050-ReachabilityCardinality-00 (obsolete)
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: FINISHED task # 50 (type SKEL/EQUN) for AirplaneLD-PT-0050-ReachabilityCardinality-00
lola: result : unknown
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: LAUNCH task # 57 (type SKEL/FNDP) for 3 AirplaneLD-PT-0050-ReachabilityCardinality-01
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 58 (type SKEL/EQUN) for 3 AirplaneLD-PT-0050-ReachabilityCardinality-01
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: LAUNCH task # 60 (type SKEL/SRCH) for 3 AirplaneLD-PT-0050-ReachabilityCardinality-01
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: LAUNCH task # 61 (type SKEL/SRCH) for 3 AirplaneLD-PT-0050-ReachabilityCardinality-01
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: FINISHED task # 60 (type SKEL/SRCH) for AirplaneLD-PT-0050-ReachabilityCardinality-01
lola: result : false
lola: markings : 4
lola: fired transitions : 3
lola: time used : 0.000000
lola: memory pages used : 1
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-58.sara.lola:
Created skeleton in 0.000000 secs.
lola: FINISHED task # 61 (type SKEL/SRCH) for AirplaneLD-PT-0050-ReachabilityCardinality-01
lola: result : false
lola: markings : 103
lola: fired transitions : 102
lola: time used : 0.000000
lola: memory pages used : 1
lola: CANCELED task # 57 (type FNDP) for AirplaneLD-PT-0050-ReachabilityCardinality-01 (obsolete)
lola: CANCELED task # 58 (type EQUN) for AirplaneLD-PT-0050-ReachabilityCardinality-01 (obsolete)
lola: LAUNCH task # 64 (type SKEL/FNDP) for 6 AirplaneLD-PT-0050-ReachabilityCardinality-02
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 65 (type SKEL/EQUN) for 6 AirplaneLD-PT-0050-ReachabilityCardinality-02
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 67 (type SKEL/SRCH) for 6 AirplaneLD-PT-0050-ReachabilityCardinality-02
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: LAUNCH task # 68 (type SKEL/SRCH) for 6 AirplaneLD-PT-0050-ReachabilityCardinality-02
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 58 (type SKEL/EQUN) for AirplaneLD-PT-0050-ReachabilityCardinality-01
lola: result : unknown
lola: FINISHED task # 57 (type SKEL/FNDP) for AirplaneLD-PT-0050-ReachabilityCardinality-01
lola: result : unknown
lola: fired transitions : 23242
lola: tried executions : 9315
lola: time used : 0.000000
lola: memory pages used : 0
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: FINISHED task # 67 (type SKEL/SRCH) for AirplaneLD-PT-0050-ReachabilityCardinality-02
lola: result : false
lola: markings : 97
lola: fired transitions : 176
lola: time used : 0.000000
lola: memory pages used : 1
lola: Rule S: 0 transitions removed,0 places removed
lola: CANCELED task # 64 (type FNDP) for AirplaneLD-PT-0050-ReachabilityCardinality-02 (obsolete)
lola: CANCELED task # 65 (type EQUN) for AirplaneLD-PT-0050-ReachabilityCardinality-02 (obsolete)
lola: CANCELED task # 68 (type SRCH) for AirplaneLD-PT-0050-ReachabilityCardinality-02 (obsolete)
lola: LAUNCH task # 71 (type SKEL/FNDP) for 9 AirplaneLD-PT-0050-ReachabilityCardinality-03
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 72 (type SKEL/EQUN) for 9 AirplaneLD-PT-0050-ReachabilityCardinality-03
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
sara: lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: LAUNCH task # 74 (type SKEL/SRCH) for 9 AirplaneLD-PT-0050-ReachabilityCardinality-03
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
try reading problem file /home/mcc/execution/ReachabilityCardinality-65.sara.
lola: LAUNCH task # 75 (type SKEL/SRCH) for 9 AirplaneLD-PT-0050-ReachabilityCardinality-03
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH INITIAL
lola: LAUNCH task # 34 (type CNST) for 33 AirplaneLD-PT-0050-ReachabilityCardinality-11
lola: time limit : 0 sec
lola: memory limit: 0 pages
lola: FINISHED task # 34 (type CNST) for AirplaneLD-PT-0050-ReachabilityCardinality-11
lola: result : false
sara: place or transition ordering is non-deterministic
lola: FINISHED task # 74 (type SKEL/SRCH) for AirplaneLD-PT-0050-ReachabilityCardinality-03
lola: result : false
lola: markings : 7
lola: fired transitions : 6
lola: time used : 0.000000
lola: memory pages used : 1
lola: CANCELED task # 71 (type FNDP) for AirplaneLD-PT-0050-ReachabilityCardinality-03 (obsolete)
lola: CANCELED task # 72 (type EQUN) for AirplaneLD-PT-0050-ReachabilityCardinality-03 (obsolete)
lola: CANCELED task # 75 (type SRCH) for AirplaneLD-PT-0050-ReachabilityCardinality-03 (obsolete)

lola: Created skeleton in 0.000000 secs.
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-72.sara.
sara: place or transition ordering is non-deterministic

lola: planning for AirplaneLD-PT-0050-ReachabilityCardinality-01 stopped (result already fixed).
lola: planning for AirplaneLD-PT-0050-ReachabilityCardinality-02 stopped (result already fixed).
lola: planning for AirplaneLD-PT-0050-ReachabilityCardinality-03 stopped (result already fixed).
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: LAUNCH task # 78 (type SKEL/FNDP) for 21 AirplaneLD-PT-0050-ReachabilityCardinality-07
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 79 (type SKEL/EQUN) for 21 AirplaneLD-PT-0050-ReachabilityCardinality-07
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 81 (type SKEL/SRCH) for 21 AirplaneLD-PT-0050-ReachabilityCardinality-07
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: LAUNCH task # 82 (type SKEL/SRCH) for 21 AirplaneLD-PT-0050-ReachabilityCardinality-07
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: Created skeleton in 0.000000 secs.
lola: FINISHED task # 65 (type SKEL/EQUN) for AirplaneLD-PT-0050-ReachabilityCardinality-02
lola: result : false
lola: FINISHED task # 81 (type SKEL/SRCH) for AirplaneLD-PT-0050-ReachabilityCardinality-07
lola: result : false
lola: markings : 4
lola: fired transitions : 3
lola: time used : 0.000000
lola: memory pages used : 1
lola: CANCELED task # 78 (type FNDP) for AirplaneLD-PT-0050-ReachabilityCardinality-07 (obsolete)
lola: CANCELED task # 79 (type EQUN) for AirplaneLD-PT-0050-ReachabilityCardinality-07 (obsolete)
lola: CANCELED task # 82 (type SRCH) for AirplaneLD-PT-0050-ReachabilityCardinality-07 (obsolete)
lola: FINISHED task # 78 (type SKEL/FNDP) for AirplaneLD-PT-0050-ReachabilityCardinality-07
lola: result : unknown
lola: fired transitions : 673
lola: tried executions : 269
lola: time used : 0.000000
lola: memory pages used : 0
lola: FINISHED task # 79 (type SKEL/EQUN) for AirplaneLD-PT-0050-ReachabilityCardinality-07
lola: result : unknown
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: LAUNCH task # 85 (type SKEL/FNDP) for 24 AirplaneLD-PT-0050-ReachabilityCardinality-08
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 86 (type SKEL/EQUN) for 24 AirplaneLD-PT-0050-ReachabilityCardinality-08
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: LAUNCH task # 88 (type SKEL/SRCH) for 24 AirplaneLD-PT-0050-ReachabilityCardinality-08
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 89 (type SKEL/SRCH) for 24 AirplaneLD-PT-0050-ReachabilityCardinality-08
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 72 (type SKEL/EQUN) for AirplaneLD-PT-0050-ReachabilityCardinality-03
lola: result : false
lola: FINISHED task # 88 (type SKEL/SRCH) for AirplaneLD-PT-0050-ReachabilityCardinality-08
lola: result : false
lola: markings : 4
lola: fired transitions : 3
lola: time used : 0.000000
lola: memory pages used : 1
lola: CANCELED task # 85 (type FNDP) for AirplaneLD-PT-0050-ReachabilityCardinality-08 (obsolete)
lola: CANCELED task # 86 (type EQUN) for AirplaneLD-PT-0050-ReachabilityCardinality-08 (obsolete)
lola: CANCELED task # 89 (type SRCH) for AirplaneLD-PT-0050-ReachabilityCardinality-08 (obsolete)
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: LAUNCH INITIAL
lola: LAUNCH task # 19 (type CNST) for 18 AirplaneLD-PT-0050-ReachabilityCardinality-06
lola: time limit : 0 sec
lola: memory limit: 0 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: LAUNCH INITIAL
lola: LAUNCH task # 13 (type CNST) for 12 AirplaneLD-PT-0050-ReachabilityCardinality-04
lola: time limit : 0 sec
lola: memory limit: 0 pages
lola: LAUNCH INITIAL
lola: LAUNCH task # 16 (type CNST) for 15 AirplaneLD-PT-0050-ReachabilityCardinality-05
lola: time limit : 0 sec
lola: memory limit: 0 pages
lola: LAUNCH INITIAL
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-86.sara.
sara: place or transition ordering is non-deterministic
lola: planning for AirplaneLD-PT-0050-ReachabilityCardinality-08 stopped (result already fixed).
lola: LAUNCH task # 40 (type CNST) for 39 AirplaneLD-PT-0050-ReachabilityCardinality-13
lola: time limit : 0 sec
lola: memory limit: 0 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787

lola: planning for AirplaneLD-PT-0050-ReachabilityCardinality-07 stopped (result already fixed).
lola: FINISHED task # 19 (type CNST) for AirplaneLD-PT-0050-ReachabilityCardinality-06
lola: result : false
lola: FINISHED task # 13 (type CNST) for AirplaneLD-PT-0050-ReachabilityCardinality-04
lola: result : true
lola: FINISHED task # 16 (type CNST) for AirplaneLD-PT-0050-ReachabilityCardinality-05
lola: result : false
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: FINISHED task # 40 (type CNST) for AirplaneLD-PT-0050-ReachabilityCardinality-13
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: Created skeleton in 0.000000 secs.
lola: result : true
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: LAUNCH task # 93 (type SKEL/FNDP) for 30 AirplaneLD-PT-0050-ReachabilityCardinality-10
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 94 (type SKEL/EQUN) for 30 AirplaneLD-PT-0050-ReachabilityCardinality-10
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: LAUNCH task # 96 (type SKEL/SRCH) for 30 AirplaneLD-PT-0050-ReachabilityCardinality-10
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 97 (type SKEL/SRCH) for 30 AirplaneLD-PT-0050-ReachabilityCardinality-10
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 96 (type SKEL/SRCH) for AirplaneLD-PT-0050-ReachabilityCardinality-10
lola: result : false
lola: markings : 4
lola: fired transitions : 3
lola: time used : 0.000000
lola: memory pages used : 1
lola: CANCELED task # 93 (type FNDP) for AirplaneLD-PT-0050-ReachabilityCardinality-10 (obsolete)
lola: CANCELED task # 94 (type EQUN) for AirplaneLD-PT-0050-ReachabilityCardinality-10 (obsolete)
lola: CANCELED task # 97 (type SRCH) for AirplaneLD-PT-0050-ReachabilityCardinality-10 (obsolete)
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: LAUNCH task # 104 (type EXCL) for 0 AirplaneLD-PT-0050-ReachabilityCardinality-00
lola: time limit : 600 sec
lola: memory limit: 32 pages
lola: LAUNCH task # 100 (type FNDP) for 0 AirplaneLD-PT-0050-ReachabilityCardinality-00
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 101 (type EQUN) for 0 AirplaneLD-PT-0050-ReachabilityCardinality-00
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: LAUNCH task # 103 (type SRCH) for 0 AirplaneLD-PT-0050-ReachabilityCardinality-00
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 86 (type SKEL/EQUN) for AirplaneLD-PT-0050-ReachabilityCardinality-08
lola: result : false
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-94.sara.
sara: place or transition ordering is non-deterministic
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787

lola: FINISHED task # 103 (type SRCH) for AirplaneLD-PT-0050-ReachabilityCardinality-00
lola: result : true
lola: markings : 3
lola: fired transitions : 2
lola: time used : 0.000000
lola: memory pages used : 1
lola: CANCELED task # 100 (type FNDP) for AirplaneLD-PT-0050-ReachabilityCardinality-00 (obsolete)
lola: CANCELED task # 101 (type EQUN) for AirplaneLD-PT-0050-ReachabilityCardinality-00 (obsolete)
lola: CANCELED task # 104 (type EXCL) for AirplaneLD-PT-0050-ReachabilityCardinality-00 (obsolete)
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: FINISHED task # 100 (type FNDP) for AirplaneLD-PT-0050-ReachabilityCardinality-00
lola: result : unknown
lola: tried executions : 1
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: time used : 0.000000
lola: memory pages used : 0
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: LAUNCH task # 120 (type EXCL) for 27 AirplaneLD-PT-0050-ReachabilityCardinality-09
lola: time limit : 900 sec
lola: memory limit: 32 pages
lola: LAUNCH task # 108 (type FNDP) for 27 AirplaneLD-PT-0050-ReachabilityCardinality-09
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 117 (type EQUN) for 27 AirplaneLD-PT-0050-ReachabilityCardinality-09
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: LAUNCH task # 119 (type SRCH) for 27 AirplaneLD-PT-0050-ReachabilityCardinality-09
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: FINISHED task # 120 (type EXCL) for AirplaneLD-PT-0050-ReachabilityCardinality-09
lola: result : false
lola: markings : 2
lola: fired transitions : 1
lola: time used : 0.000000
lola: memory pages used : 1
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-101.sara.

lola: CANCELED task # 108 (type FNDP) for AirplaneLD-PT-0050-ReachabilityCardinality-09 (obsolete)
lola: CANCELED task # 117 (type EQUN) for AirplaneLD-PT-0050-ReachabilityCardinality-09 (obsolete)
lola: CANCELED task # 119 (type SRCH) for AirplaneLD-PT-0050-ReachabilityCardinality-09 (obsolete)
lola: LAUNCH task # 149 (type EXCL) for 45 AirplaneLD-PT-0050-ReachabilityCardinality-15
lola: time limit : 1200 sec
lola: memory limit: 32 pages
lola: LAUNCH task # 135 (type FNDP) for 42 AirplaneLD-PT-0050-ReachabilityCardinality-14
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 136 (type EQUN) for 42 AirplaneLD-PT-0050-ReachabilityCardinality-14
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 139 (type SRCH) for 42 AirplaneLD-PT-0050-ReachabilityCardinality-14
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 119 (type SRCH) for AirplaneLD-PT-0050-ReachabilityCardinality-09
lola: result : false
lola: markings : 2
lola: fired transitions : 1
lola: time used : 0.000000
lola: memory pages used : 1
lola: FINISHED task # 101 (type EQUN) for AirplaneLD-PT-0050-ReachabilityCardinality-00
lola: result : true
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-117.sara.

lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: FINISHED task # 94 (type SKEL/EQUN) for AirplaneLD-PT-0050-ReachabilityCardinality-10
lola: result : false
lola: FINISHED task # 149 (type EXCL) for AirplaneLD-PT-0050-ReachabilityCardinality-15
lola: result : false
lola: markings : 2
lola: fired transitions : 1
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 140 (type EXCL) for 42 AirplaneLD-PT-0050-ReachabilityCardinality-14
lola: time limit : 1800 sec
lola: memory limit: 32 pages
lola: FINISHED task # 139 (type SRCH) for AirplaneLD-PT-0050-ReachabilityCardinality-14
lola: result : false
lola: markings : 2
lola: fired transitions : 1
lola: time used : 0.000000
lola: memory pages used : 1
lola: CANCELED task # 135 (type FNDP) for AirplaneLD-PT-0050-ReachabilityCardinality-14 (obsolete)
lola: CANCELED task # 136 (type EQUN) for AirplaneLD-PT-0050-ReachabilityCardinality-14 (obsolete)
lola: CANCELED task # 140 (type EXCL) for AirplaneLD-PT-0050-ReachabilityCardinality-14 (obsolete)
lola: LAUNCH task # 132 (type EXCL) for 36 AirplaneLD-PT-0050-ReachabilityCardinality-12
lola: time limit : 3600 sec
lola: memory limit: 32 pages
lola: LAUNCH task # 125 (type FNDP) for 36 AirplaneLD-PT-0050-ReachabilityCardinality-12
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 129 (type EQUN) for 36 AirplaneLD-PT-0050-ReachabilityCardinality-12
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 131 (type SRCH) for 36 AirplaneLD-PT-0050-ReachabilityCardinality-12
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 135 (type FNDP) for AirplaneLD-PT-0050-ReachabilityCardinality-14
lola: result : unknown
lola: fired transitions : 985
lola: tried executions : 494
lola: time used : 0.000000
lola: memory pages used : 0
lola: FINISHED task # 131 (type SRCH) for AirplaneLD-PT-0050-ReachabilityCardinality-12
lola: result : false
lola: markings : 2
lola: fired transitions : 1
lola: time used : 0.000000
lola: memory pages used : 1
lola: FINISHED task # 132 (type EXCL) for AirplaneLD-PT-0050-ReachabilityCardinality-12
lola: result : false
lola: markings : 2
lola: fired transitions : 1
lola: time used : 0.000000
lola: memory pages used : 1
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: CANCELED task # 125 (type FNDP) for AirplaneLD-PT-0050-ReachabilityCardinality-12 (obsolete)
lola: CANCELED task # 129 (type EQUN) for AirplaneLD-PT-0050-ReachabilityCardinality-12 (obsolete)
lola: Portfolio finished: no open formulas

FINAL RESULTS
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
AirplaneLD-PT-0050-ReachabilityCardinality-00: EF true tandem / insertion
AirplaneLD-PT-0050-ReachabilityCardinality-01: AG true skeleton: tandem / insertion
AirplaneLD-PT-0050-ReachabilityCardinality-02: EF false skeleton: tandem / insertion
AirplaneLD-PT-0050-ReachabilityCardinality-03: EF false skeleton: tandem / insertion
AirplaneLD-PT-0050-ReachabilityCardinality-04: INITIAL true preprocessing
AirplaneLD-PT-0050-ReachabilityCardinality-05: INITIAL false preprocessing
AirplaneLD-PT-0050-ReachabilityCardinality-06: INITIAL false preprocessing
AirplaneLD-PT-0050-ReachabilityCardinality-07: EF false skeleton: tandem / insertion
AirplaneLD-PT-0050-ReachabilityCardinality-08: EF false skeleton: tandem / insertion
AirplaneLD-PT-0050-ReachabilityCardinality-09: AG true tandem / relaxed
AirplaneLD-PT-0050-ReachabilityCardinality-10: AG true skeleton: tandem / insertion
AirplaneLD-PT-0050-ReachabilityCardinality-11: INITIAL false preprocessing
AirplaneLD-PT-0050-ReachabilityCardinality-12: AG true tandem / insertion
AirplaneLD-PT-0050-ReachabilityCardinality-13: INITIAL true preprocessing
AirplaneLD-PT-0050-ReachabilityCardinality-14: EF false tandem / insertion
AirplaneLD-PT-0050-ReachabilityCardinality-15: AG true tandem / relaxed


Time elapsed: 0 secs. Pages in use: 2
lola: rewrite Frontend/Parser/formula_rewrite.k:787
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-136.sara.

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="AirplaneLD-PT-0050"
export BK_EXAMINATION="ReachabilityCardinality"
export BK_TOOL="lola"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-4028"
echo " Executing tool lola"
echo " Input is AirplaneLD-PT-0050, examination is ReachabilityCardinality"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r004-tall-162037985800262"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/AirplaneLD-PT-0050.tgz
mv AirplaneLD-PT-0050 execution
cd execution
if [ "ReachabilityCardinality" = "ReachabilityDeadlock" ] || [ "ReachabilityCardinality" = "UpperBounds" ] || [ "ReachabilityCardinality" = "QuasiLiveness" ] || [ "ReachabilityCardinality" = "StableMarking" ] || [ "ReachabilityCardinality" = "Liveness" ] || [ "ReachabilityCardinality" = "OneSafe" ] || [ "ReachabilityCardinality" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "ReachabilityCardinality" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "ReachabilityCardinality" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "ReachabilityCardinality.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property ReachabilityCardinality.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "ReachabilityCardinality.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' ReachabilityCardinality.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ "ReachabilityCardinality" = "ReachabilityDeadlock" ] || [ "ReachabilityCardinality" = "QuasiLiveness" ] || [ "ReachabilityCardinality" = "StableMarking" ] || [ "ReachabilityCardinality" = "Liveness" ] || [ "ReachabilityCardinality" = "OneSafe" ] ; then
echo "FORMULA_NAME ReachabilityCardinality"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;