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Model Checking Contest 2021
11th edition, Paris, France, June 23, 2021
Execution of r004-tall-162037985400006
Last Updated
Jun 28, 2021

About the Execution of LoLA for ARMCacheCoherence-PT-none

Execution Summary
Max Memory
Used (MB)		 Time wait (ms) CPU Usage (ms) I/O Wait (ms) Computed Result Execution
Status
1448.207 9971.00 18856.00 39.10 FFFTFFTTFTFFFFFF normal

Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/data/fkordon/mcc2021-input.r004-tall-162037985400006.qcow2', fmt=qcow2 size=4294967296 backing_file='/data/fkordon/mcc2021-input.qcow2' encryption=off cluster_size=65536 lazy_refcounts=off
Waiting for the VM to be ready (probing ssh)
...................
=====================================================================
Generated by BenchKit 2-4028
Executing tool lola
Input is ARMCacheCoherence-PT-none, examination is ReachabilityCardinality
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r004-tall-162037985400006
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 14M
-rw-r--r-- 1 mcc users 14K May 5 16:58 CTLCardinality.txt
-rw-r--r-- 1 mcc users 133K May 5 16:58 CTLCardinality.xml
-rw-r--r-- 1 mcc users 8.4K May 5 16:58 CTLFireability.txt
-rw-r--r-- 1 mcc users 65K May 5 16:58 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K May 6 14:48 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.3K May 6 14:48 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 3.5K Mar 28 15:41 LTLCardinality.txt
-rw-r--r-- 1 mcc users 25K Mar 28 15:41 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.3K Mar 28 15:41 LTLFireability.txt
-rw-r--r-- 1 mcc users 19K Mar 28 15:41 LTLFireability.xml
-rw-r--r-- 1 mcc users 3.5K Mar 23 01:15 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 18K Mar 23 01:15 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 3.0K Mar 22 09:35 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 18K Mar 22 09:35 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.7K Mar 22 09:09 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.8K Mar 22 09:09 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 May 5 16:51 equiv_col
-rw-r--r-- 1 mcc users 5 May 5 16:51 instance
-rw-r--r-- 1 mcc users 6 May 5 16:51 iscolored
-rw-r--r-- 1 mcc users 14M May 5 16:51 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME ARMCacheCoherence-PT-none-ReachabilityCardinality-00
FORMULA_NAME ARMCacheCoherence-PT-none-ReachabilityCardinality-01
FORMULA_NAME ARMCacheCoherence-PT-none-ReachabilityCardinality-02
FORMULA_NAME ARMCacheCoherence-PT-none-ReachabilityCardinality-03
FORMULA_NAME ARMCacheCoherence-PT-none-ReachabilityCardinality-04
FORMULA_NAME ARMCacheCoherence-PT-none-ReachabilityCardinality-05
FORMULA_NAME ARMCacheCoherence-PT-none-ReachabilityCardinality-06
FORMULA_NAME ARMCacheCoherence-PT-none-ReachabilityCardinality-07
FORMULA_NAME ARMCacheCoherence-PT-none-ReachabilityCardinality-08
FORMULA_NAME ARMCacheCoherence-PT-none-ReachabilityCardinality-09
FORMULA_NAME ARMCacheCoherence-PT-none-ReachabilityCardinality-10
FORMULA_NAME ARMCacheCoherence-PT-none-ReachabilityCardinality-11
FORMULA_NAME ARMCacheCoherence-PT-none-ReachabilityCardinality-12
FORMULA_NAME ARMCacheCoherence-PT-none-ReachabilityCardinality-13
FORMULA_NAME ARMCacheCoherence-PT-none-ReachabilityCardinality-14
FORMULA_NAME ARMCacheCoherence-PT-none-ReachabilityCardinality-15

=== Now, execution of the tool begins

BK_START 1620391661270

starting LoLA
BK_INPUT ARMCacheCoherence-PT-none
BK_EXAMINATION: ReachabilityCardinality
bin directory: /home/mcc/BenchKit/bin
current directory: /home/mcc/execution
ReachabilityCardinality

FORMULA ARMCacheCoherence-PT-none-ReachabilityCardinality-11 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA ARMCacheCoherence-PT-none-ReachabilityCardinality-08 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA ARMCacheCoherence-PT-none-ReachabilityCardinality-06 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA ARMCacheCoherence-PT-none-ReachabilityCardinality-09 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA ARMCacheCoherence-PT-none-ReachabilityCardinality-15 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA ARMCacheCoherence-PT-none-ReachabilityCardinality-00 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA ARMCacheCoherence-PT-none-ReachabilityCardinality-12 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA ARMCacheCoherence-PT-none-ReachabilityCardinality-14 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA ARMCacheCoherence-PT-none-ReachabilityCardinality-05 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA ARMCacheCoherence-PT-none-ReachabilityCardinality-02 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA ARMCacheCoherence-PT-none-ReachabilityCardinality-03 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA ARMCacheCoherence-PT-none-ReachabilityCardinality-13 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA ARMCacheCoherence-PT-none-ReachabilityCardinality-01 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA ARMCacheCoherence-PT-none-ReachabilityCardinality-04 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA ARMCacheCoherence-PT-none-ReachabilityCardinality-07 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA ARMCacheCoherence-PT-none-ReachabilityCardinality-10 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

BK_STOP 1620391671241

--------------------
content from stderr:

lola: MEM LIMIT 32
lola: MEM LIMIT 5
lola: NET
lola: input: PNML file (--pnmlnet)
lola: reading net from /home/mcc/execution/model.pnml
lola: reading pnml
lola: PNML file contains place/transition net
lola: finished parsing
lola: closed net file /home/mcc/execution/model.pnml
lola: Reading formula.
lola: Using XML format (--xmlformula)
lola: reading XML formula
lola: reading formula from /home/mcc/execution/ReachabilityCardinality.xml
lola: rewrite Frontend/Parser/formula_rewrite.k:96
lola: rewrite Frontend/Parser/formula_rewrite.k:156
lola: rewrite Frontend/Parser/formula_rewrite.k:147
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 1.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Rule S: 0 transitions removed,0 places removed
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: LAUNCH INITIAL
lola: LAUNCH task # 34 (type CNST) for 33 ARMCacheCoherence-PT-none-ReachabilityCardinality-11
lola: time limit : 0 sec
lola: memory limit: 0 pages
lola: FINISHED task # 34 (type CNST) for ARMCacheCoherence-PT-none-ReachabilityCardinality-11
lola: result : false
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: LAUNCH task # 52 (type EXCL) for 24 ARMCacheCoherence-PT-none-ReachabilityCardinality-08
lola: time limit : 239 sec
lola: memory limit: 32 pages
lola: LAUNCH task # 48 (type FNDP) for 24 ARMCacheCoherence-PT-none-ReachabilityCardinality-08
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 49 (type EQUN) for 24 ARMCacheCoherence-PT-none-ReachabilityCardinality-08
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: LAUNCH task # 51 (type SRCH) for 24 ARMCacheCoherence-PT-none-ReachabilityCardinality-08
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-49.sara.
sara: place or transition ordering is non-deterministic

lola: FINISHED task # 49 (type EQUN) for ARMCacheCoherence-PT-none-ReachabilityCardinality-08
lola: result : false
lola: CANCELED task # 48 (type FNDP) for ARMCacheCoherence-PT-none-ReachabilityCardinality-08 (obsolete)
lola: CANCELED task # 51 (type SRCH) for ARMCacheCoherence-PT-none-ReachabilityCardinality-08 (obsolete)
lola: CANCELED task # 52 (type EXCL) for ARMCacheCoherence-PT-none-ReachabilityCardinality-08 (obsolete)
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: LAUNCH task # 66 (type EXCL) for 18 ARMCacheCoherence-PT-none-ReachabilityCardinality-06
lola: time limit : 276 sec
lola: memory limit: 32 pages
lola: LAUNCH task # 54 (type FNDP) for 18 ARMCacheCoherence-PT-none-ReachabilityCardinality-06
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 56 (type EQUN) for 18 ARMCacheCoherence-PT-none-ReachabilityCardinality-06
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 65 (type SRCH) for 18 ARMCacheCoherence-PT-none-ReachabilityCardinality-06
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: FINISHED task # 65 (type SRCH) for ARMCacheCoherence-PT-none-ReachabilityCardinality-06
lola: result : true
lola: markings : 12
lola: fired transitions : 14
lola: time used : 0.000000
lola: memory pages used : 1
lola: CANCELED task # 54 (type FNDP) for ARMCacheCoherence-PT-none-ReachabilityCardinality-06 (obsolete)
lola: CANCELED task # 56 (type EQUN) for ARMCacheCoherence-PT-none-ReachabilityCardinality-06 (obsolete)
lola: CANCELED task # 66 (type EXCL) for ARMCacheCoherence-PT-none-ReachabilityCardinality-06 (obsolete)
lola: LAUNCH task # 110 (type EXCL) for 30 ARMCacheCoherence-PT-none-ReachabilityCardinality-10
lola: time limit : 276 sec
lola: memory limit: 32 pages
lola: LAUNCH task # 87 (type FNDP) for 27 ARMCacheCoherence-PT-none-ReachabilityCardinality-09
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 88 (type EQUN) for 27 ARMCacheCoherence-PT-none-ReachabilityCardinality-09
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 90 (type SRCH) for 27 ARMCacheCoherence-PT-none-ReachabilityCardinality-09
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: FINISHED task # 54 (type FNDP) for ARMCacheCoherence-PT-none-ReachabilityCardinality-06
lola: result : true
lola: fired transitions : 10
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-56.sara.
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-88.sara.
sara: place or transition ordering is non-deterministic

sara: place or transition ordering is non-deterministic
lola: FINISHED task # 56 (type EQUN) for ARMCacheCoherence-PT-none-ReachabilityCardinality-06
lola: result : true

lola: FINISHED task # 88 (type EQUN) for ARMCacheCoherence-PT-none-ReachabilityCardinality-09
lola: result : false
lola: CANCELED task # 87 (type FNDP) for ARMCacheCoherence-PT-none-ReachabilityCardinality-09 (obsolete)
lola: CANCELED task # 90 (type SRCH) for ARMCacheCoherence-PT-none-ReachabilityCardinality-09 (obsolete)
lola: LAUNCH task # 138 (type FNDP) for 45 ARMCacheCoherence-PT-none-ReachabilityCardinality-15
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 139 (type EQUN) for 45 ARMCacheCoherence-PT-none-ReachabilityCardinality-15
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 141 (type SRCH) for 45 ARMCacheCoherence-PT-none-ReachabilityCardinality-15
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 87 (type FNDP) for ARMCacheCoherence-PT-none-ReachabilityCardinality-09
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: result : unknown
lola: fired transitions : 3660
lola: tried executions : 2
lola: time used : 0.000000
lola: memory pages used : 0
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-139.sara.
sara: place or transition ordering is non-deterministic

lola: FINISHED task # 139 (type EQUN) for ARMCacheCoherence-PT-none-ReachabilityCardinality-15
lola: result : false
lola: CANCELED task # 138 (type FNDP) for ARMCacheCoherence-PT-none-ReachabilityCardinality-15 (obsolete)
lola: CANCELED task # 141 (type SRCH) for ARMCacheCoherence-PT-none-ReachabilityCardinality-15 (obsolete)
lola: LAUNCH task # 125 (type FNDP) for 0 ARMCacheCoherence-PT-none-ReachabilityCardinality-00
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 126 (type EQUN) for 0 ARMCacheCoherence-PT-none-ReachabilityCardinality-00
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: LAUNCH task # 128 (type SRCH) for 0 ARMCacheCoherence-PT-none-ReachabilityCardinality-00
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 138 (type FNDP) for ARMCacheCoherence-PT-none-ReachabilityCardinality-15
lola: result : unknown
lola: fired transitions : 6044
lola: tried executions : 2
lola: time used : 0.000000
lola: memory pages used : 0
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-126.sara.
sara: place or transition ordering is non-deterministic

lola: FINISHED task # 126 (type EQUN) for ARMCacheCoherence-PT-none-ReachabilityCardinality-00
lola: result : false
lola: CANCELED task # 125 (type FNDP) for ARMCacheCoherence-PT-none-ReachabilityCardinality-00 (obsolete)
lola: CANCELED task # 128 (type SRCH) for ARMCacheCoherence-PT-none-ReachabilityCardinality-00 (obsolete)
lola: LAUNCH task # 112 (type FNDP) for 36 ARMCacheCoherence-PT-none-ReachabilityCardinality-12
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 113 (type EQUN) for 36 ARMCacheCoherence-PT-none-ReachabilityCardinality-12
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: LAUNCH task # 115 (type SRCH) for 36 ARMCacheCoherence-PT-none-ReachabilityCardinality-12
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 125 (type FNDP) for ARMCacheCoherence-PT-none-ReachabilityCardinality-00
lola: result : unknown
lola: fired transitions : 5078
lola: tried executions : 2
lola: time used : 1.000000
lola: memory pages used : 0
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-113.sara.
sara: place or transition ordering is non-deterministic

lola: FINISHED task # 113 (type EQUN) for ARMCacheCoherence-PT-none-ReachabilityCardinality-12
lola: result : false
lola: CANCELED task # 112 (type FNDP) for ARMCacheCoherence-PT-none-ReachabilityCardinality-12 (obsolete)
lola: CANCELED task # 115 (type SRCH) for ARMCacheCoherence-PT-none-ReachabilityCardinality-12 (obsolete)
lola: LAUNCH task # 132 (type FNDP) for 42 ARMCacheCoherence-PT-none-ReachabilityCardinality-14
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 133 (type EQUN) for 42 ARMCacheCoherence-PT-none-ReachabilityCardinality-14
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 135 (type SRCH) for 42 ARMCacheCoherence-PT-none-ReachabilityCardinality-14
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 112 (type FNDP) for ARMCacheCoherence-PT-none-ReachabilityCardinality-12
lola: result : unknown
lola: fired transitions : 5552
lola: tried executions : 5
lola: time used : 0.000000
lola: memory pages used : 0
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: FINISHED task # 135 (type SRCH) for ARMCacheCoherence-PT-none-ReachabilityCardinality-14
lola: result : true
lola: markings : 6
lola: fired transitions : 5
lola: time used : 0.000000
lola: memory pages used : 1
lola: CANCELED task # 132 (type FNDP) for ARMCacheCoherence-PT-none-ReachabilityCardinality-14 (obsolete)
lola: CANCELED task # 133 (type EQUN) for ARMCacheCoherence-PT-none-ReachabilityCardinality-14 (obsolete)
lola: LAUNCH task # 55 (type FNDP) for 15 ARMCacheCoherence-PT-none-ReachabilityCardinality-05
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 61 (type EQUN) for 15 ARMCacheCoherence-PT-none-ReachabilityCardinality-05
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 71 (type SRCH) for 15 ARMCacheCoherence-PT-none-ReachabilityCardinality-05
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: FINISHED task # 132 (type FNDP) for ARMCacheCoherence-PT-none-ReachabilityCardinality-14
lola: result : true
lola: fired transitions : 4
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-133.sara.
sara: place or transition ordering is non-deterministic
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-61.sara.

lola: FINISHED task # 133 (type EQUN) for ARMCacheCoherence-PT-none-ReachabilityCardinality-14
lola: result : true
sara: place or transition ordering is non-deterministic

lola: FINISHED task # 61 (type EQUN) for ARMCacheCoherence-PT-none-ReachabilityCardinality-05
lola: result : false
lola: CANCELED task # 55 (type FNDP) for ARMCacheCoherence-PT-none-ReachabilityCardinality-05 (obsolete)
lola: CANCELED task # 71 (type SRCH) for ARMCacheCoherence-PT-none-ReachabilityCardinality-05 (obsolete)
lola: LAUNCH task # 76 (type FNDP) for 6 ARMCacheCoherence-PT-none-ReachabilityCardinality-02
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 77 (type EQUN) for 6 ARMCacheCoherence-PT-none-ReachabilityCardinality-02
lola: time limit : 32000000 sec
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: memory limit: 5 pages
lola: LAUNCH task # 79 (type SRCH) for 6 ARMCacheCoherence-PT-none-ReachabilityCardinality-02
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 55 (type FNDP) for ARMCacheCoherence-PT-none-ReachabilityCardinality-05
lola: result : unknown
lola: fired transitions : 4259
lola: tried executions : 5
lola: time used : 0.000000
lola: memory pages used : 0
lola: FINISHED task # 76 (type FNDP) for ARMCacheCoherence-PT-none-ReachabilityCardinality-02
lola: result : true
lola: fired transitions : 9
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
lola: CANCELED task # 77 (type EQUN) for ARMCacheCoherence-PT-none-ReachabilityCardinality-02 (obsolete)
lola: CANCELED task # 79 (type SRCH) for ARMCacheCoherence-PT-none-ReachabilityCardinality-02 (obsolete)
lola: LAUNCH task # 70 (type FNDP) for 9 ARMCacheCoherence-PT-none-ReachabilityCardinality-03
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 74 (type EQUN) for 9 ARMCacheCoherence-PT-none-ReachabilityCardinality-03
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 83 (type SRCH) for 9 ARMCacheCoherence-PT-none-ReachabilityCardinality-03
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-77.sara.
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-74.sara.
sara: place or transition ordering is non-deterministic
sara: place or transition ordering is non-deterministic


lola: FINISHED task # 77 (type EQUN) for ARMCacheCoherence-PT-none-ReachabilityCardinality-02
lola: result : true
lola: FINISHED task # 74 (type EQUN) for ARMCacheCoherence-PT-none-ReachabilityCardinality-03
lola: result : false
lola: CANCELED task # 70 (type FNDP) for ARMCacheCoherence-PT-none-ReachabilityCardinality-03 (obsolete)
lola: CANCELED task # 83 (type SRCH) for ARMCacheCoherence-PT-none-ReachabilityCardinality-03 (obsolete)
lola: LAUNCH task # 119 (type FNDP) for 39 ARMCacheCoherence-PT-none-ReachabilityCardinality-13
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 120 (type EQUN) for 39 ARMCacheCoherence-PT-none-ReachabilityCardinality-13
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 122 (type SRCH) for 39 ARMCacheCoherence-PT-none-ReachabilityCardinality-13
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 70 (type FNDP) for ARMCacheCoherence-PT-none-ReachabilityCardinality-03
lola: result : unknown
lola: fired transitions : 5549
lola: tried executions : 3
lola: time used : 1.000000
lola: memory pages used : 0
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: FINISHED task # 122 (type SRCH) for ARMCacheCoherence-PT-none-ReachabilityCardinality-13
lola: result : true
lola: markings : 9
lola: fired transitions : 11
lola: time used : 0.000000
lola: memory pages used : 1
lola: CANCELED task # 119 (type FNDP) for ARMCacheCoherence-PT-none-ReachabilityCardinality-13 (obsolete)
lola: CANCELED task # 120 (type EQUN) for ARMCacheCoherence-PT-none-ReachabilityCardinality-13 (obsolete)
lola: LAUNCH task # 58 (type FNDP) for 3 ARMCacheCoherence-PT-none-ReachabilityCardinality-01
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 59 (type EQUN) for 3 ARMCacheCoherence-PT-none-ReachabilityCardinality-01
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 62 (type SRCH) for 3 ARMCacheCoherence-PT-none-ReachabilityCardinality-01
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 119 (type FNDP) for ARMCacheCoherence-PT-none-ReachabilityCardinality-13
lola: result : true
lola: fired transitions : 15
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
lola: rewrite Frontend/Parser/formula_rewrite.k:711
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-120.sara.
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-59.sara.
sara: place or transition ordering is non-deterministic

sara: place or transition ordering is non-deterministic
lola: FINISHED task # 120 (type EQUN) for ARMCacheCoherence-PT-none-ReachabilityCardinality-13
lola: result : true

lola: FINISHED task # 59 (type EQUN) for ARMCacheCoherence-PT-none-ReachabilityCardinality-01
lola: result : false
lola: CANCELED task # 58 (type FNDP) for ARMCacheCoherence-PT-none-ReachabilityCardinality-01 (obsolete)
lola: CANCELED task # 62 (type SRCH) for ARMCacheCoherence-PT-none-ReachabilityCardinality-01 (obsolete)
lola: LAUNCH task # 93 (type FNDP) for 12 ARMCacheCoherence-PT-none-ReachabilityCardinality-04
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 94 (type EQUN) for 12 ARMCacheCoherence-PT-none-ReachabilityCardinality-04
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: LAUNCH task # 96 (type SRCH) for 12 ARMCacheCoherence-PT-none-ReachabilityCardinality-04
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 58 (type FNDP) for ARMCacheCoherence-PT-none-ReachabilityCardinality-01
lola: result : unknown
lola: fired transitions : 4672
lola: tried executions : 2
lola: time used : 0.000000
lola: memory pages used : 0
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-94.sara.
sara: place or transition ordering is non-deterministic

FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
ARMCacheCoherence-PT-none-ReachabilityCardinality-00: EF false state equation
ARMCacheCoherence-PT-none-ReachabilityCardinality-01: EF false state equation
ARMCacheCoherence-PT-none-ReachabilityCardinality-02: AG false findpath
ARMCacheCoherence-PT-none-ReachabilityCardinality-03: AG true state equation
ARMCacheCoherence-PT-none-ReachabilityCardinality-05: EF false state equation
ARMCacheCoherence-PT-none-ReachabilityCardinality-06: EF true tandem / insertion
ARMCacheCoherence-PT-none-ReachabilityCardinality-08: EF false state equation
ARMCacheCoherence-PT-none-ReachabilityCardinality-09: AG true state equation
ARMCacheCoherence-PT-none-ReachabilityCardinality-11: INITIAL false preprocessing
ARMCacheCoherence-PT-none-ReachabilityCardinality-12: EF false state equation
ARMCacheCoherence-PT-none-ReachabilityCardinality-13: AG false tandem / insertion
ARMCacheCoherence-PT-none-ReachabilityCardinality-14: AG false tandem / insertion
ARMCacheCoherence-PT-none-ReachabilityCardinality-15: EF false state equation

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
ARMCacheCoherence-PT-none-ReachabilityCardinality-04: EF 0 2 3 0 1 0 0 0
ARMCacheCoherence-PT-none-ReachabilityCardinality-07: AG 0 5 0 0 1 0 0 0
ARMCacheCoherence-PT-none-ReachabilityCardinality-10: EF 0 4 1 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
93 EF FNDP 0/897 0/5 ARMCacheCoherence-PT-none-ReachabilityCardinality-04 4180 t fired, 9 attempts, .
94 EF STEQ 0/897 0/5 ARMCacheCoherence-PT-none-ReachabilityCardinality-04 sara is running.
96 EF SRCH 0/897 1/5 ARMCacheCoherence-PT-none-ReachabilityCardinality-04 3046 m, 609 m/sec, 5898 t fired, .
110 EF EXCL 2/1197 1/32 ARMCacheCoherence-PT-none-ReachabilityCardinality-10 18271 m, 3654 m/sec, 93168 t fired, .

Time elapsed: 9 secs. Pages in use: 3
# running tasks: 4 of 4 Visible: 16
lola: FINISHED task # 94 (type EQUN) for ARMCacheCoherence-PT-none-ReachabilityCardinality-04
lola: result : false
lola: CANCELED task # 93 (type FNDP) for ARMCacheCoherence-PT-none-ReachabilityCardinality-04 (obsolete)
lola: CANCELED task # 96 (type SRCH) for ARMCacheCoherence-PT-none-ReachabilityCardinality-04 (obsolete)
lola: LAUNCH task # 100 (type FNDP) for 21 ARMCacheCoherence-PT-none-ReachabilityCardinality-07
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 101 (type EQUN) for 21 ARMCacheCoherence-PT-none-ReachabilityCardinality-07
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: LAUNCH task # 103 (type SRCH) for 21 ARMCacheCoherence-PT-none-ReachabilityCardinality-07
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: FINISHED task # 93 (type FNDP) for ARMCacheCoherence-PT-none-ReachabilityCardinality-04
lola: result : unknown
lola: fired transitions : 4496
lola: tried executions : 10
lola: time used : 0.000000
lola: memory pages used : 0
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-101.sara.
sara: place or transition ordering is non-deterministic

lola: FINISHED task # 101 (type EQUN) for ARMCacheCoherence-PT-none-ReachabilityCardinality-07
lola: result : false
lola: CANCELED task # 100 (type FNDP) for ARMCacheCoherence-PT-none-ReachabilityCardinality-07 (obsolete)
lola: CANCELED task # 103 (type SRCH) for ARMCacheCoherence-PT-none-ReachabilityCardinality-07 (obsolete)
lola: LAUNCH task # 106 (type FNDP) for 30 ARMCacheCoherence-PT-none-ReachabilityCardinality-10
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 107 (type EQUN) for 30 ARMCacheCoherence-PT-none-ReachabilityCardinality-10
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 109 (type SRCH) for 30 ARMCacheCoherence-PT-none-ReachabilityCardinality-10
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: FINISHED task # 100 (type FNDP) for ARMCacheCoherence-PT-none-ReachabilityCardinality-07
lola: result : unknown
lola: fired transitions : 5289
lola: tried executions : 3
lola: time used : 0.000000
lola: memory pages used : 0
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-107.sara.
sara: place or transition ordering is non-deterministic

lola: FINISHED task # 107 (type EQUN) for ARMCacheCoherence-PT-none-ReachabilityCardinality-10
lola: result : false
lola: CANCELED task # 106 (type FNDP) for ARMCacheCoherence-PT-none-ReachabilityCardinality-10 (obsolete)
lola: CANCELED task # 109 (type SRCH) for ARMCacheCoherence-PT-none-ReachabilityCardinality-10 (obsolete)
lola: CANCELED task # 110 (type EXCL) for ARMCacheCoherence-PT-none-ReachabilityCardinality-10 (obsolete)
lola: Portfolio finished: no open formulas

FINAL RESULTS
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
ARMCacheCoherence-PT-none-ReachabilityCardinality-00: EF false state equation
ARMCacheCoherence-PT-none-ReachabilityCardinality-01: EF false state equation
ARMCacheCoherence-PT-none-ReachabilityCardinality-02: AG false findpath
ARMCacheCoherence-PT-none-ReachabilityCardinality-03: AG true state equation
ARMCacheCoherence-PT-none-ReachabilityCardinality-04: EF false state equation
ARMCacheCoherence-PT-none-ReachabilityCardinality-05: EF false state equation
ARMCacheCoherence-PT-none-ReachabilityCardinality-06: EF true tandem / insertion
ARMCacheCoherence-PT-none-ReachabilityCardinality-07: AG true state equation
ARMCacheCoherence-PT-none-ReachabilityCardinality-08: EF false state equation
ARMCacheCoherence-PT-none-ReachabilityCardinality-09: AG true state equation
ARMCacheCoherence-PT-none-ReachabilityCardinality-10: EF false state equation
ARMCacheCoherence-PT-none-ReachabilityCardinality-11: INITIAL false preprocessing
ARMCacheCoherence-PT-none-ReachabilityCardinality-12: EF false state equation
ARMCacheCoherence-PT-none-ReachabilityCardinality-13: AG false tandem / insertion
ARMCacheCoherence-PT-none-ReachabilityCardinality-14: AG false tandem / insertion
ARMCacheCoherence-PT-none-ReachabilityCardinality-15: EF false state equation


Time elapsed: 10 secs. Pages in use: 3

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="ARMCacheCoherence-PT-none"
export BK_EXAMINATION="ReachabilityCardinality"
export BK_TOOL="lola"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-4028"
echo " Executing tool lola"
echo " Input is ARMCacheCoherence-PT-none, examination is ReachabilityCardinality"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r004-tall-162037985400006"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/ARMCacheCoherence-PT-none.tgz
mv ARMCacheCoherence-PT-none execution
cd execution
if [ "ReachabilityCardinality" = "ReachabilityDeadlock" ] || [ "ReachabilityCardinality" = "UpperBounds" ] || [ "ReachabilityCardinality" = "QuasiLiveness" ] || [ "ReachabilityCardinality" = "StableMarking" ] || [ "ReachabilityCardinality" = "Liveness" ] || [ "ReachabilityCardinality" = "OneSafe" ] || [ "ReachabilityCardinality" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "ReachabilityCardinality" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "ReachabilityCardinality" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "ReachabilityCardinality.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property ReachabilityCardinality.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "ReachabilityCardinality.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' ReachabilityCardinality.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ "ReachabilityCardinality" = "ReachabilityDeadlock" ] || [ "ReachabilityCardinality" = "QuasiLiveness" ] || [ "ReachabilityCardinality" = "StableMarking" ] || [ "ReachabilityCardinality" = "Liveness" ] || [ "ReachabilityCardinality" = "OneSafe" ] ; then
echo "FORMULA_NAME ReachabilityCardinality"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;