Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/data/fkordon/mcc2021-input.r311-tall-162132108700645.qcow2', fmt=qcow2 size=4294967296 backing_file='/data/fkordon/mcc2021-input.qcow2' encryption=off cluster_size=65536 lazy_refcounts=off
Waiting for the VM to be ready (probing ssh)
........................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................
=====================================================================
Generated by BenchKit 2-4028
Executing tool itstools
Input is UtilityControlRoom-PT-Z4T4N08, examination is LTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r311-tall-162132108700645
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 3.6M
-rw-r--r-- 1 mcc users 171K May 15 08:57 CTLCardinality.txt
-rw-r--r-- 1 mcc users 742K May 15 08:57 CTLCardinality.xml
-rw-r--r-- 1 mcc users 439K May 15 08:57 CTLFireability.txt
-rw-r--r-- 1 mcc users 1.6M May 15 08:57 CTLFireability.xml
-rw-r--r-- 1 mcc users 28K May 12 08:04 LTLCardinality.txt
-rw-r--r-- 1 mcc users 94K May 12 08:04 LTLCardinality.xml
-rw-r--r-- 1 mcc users 24K May 12 08:04 LTLFireability.txt
-rw-r--r-- 1 mcc users 73K May 12 08:04 LTLFireability.xml
-rw-r--r-- 1 mcc users 1 May 12 08:13 NewModel
-rw-r--r-- 1 mcc users 15K May 12 04:39 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 45K May 12 04:39 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 24K May 11 18:15 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 74K May 11 18:15 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 3.8K May 12 04:43 UpperBounds.txt
-rw-r--r-- 1 mcc users 7.6K May 12 04:43 UpperBounds.xml
-rw-r--r-- 1 mcc users 5 May 12 08:13 equiv_col
-rw-r--r-- 1 mcc users 8 May 12 08:13 instance
-rw-r--r-- 1 mcc users 6 May 12 08:13 iscolored
-rw-r--r-- 1 mcc users 255K May 12 08:13 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME UtilityControlRoom-PT-Z4T4N08-00
FORMULA_NAME UtilityControlRoom-PT-Z4T4N08-01
FORMULA_NAME UtilityControlRoom-PT-Z4T4N08-02
FORMULA_NAME UtilityControlRoom-PT-Z4T4N08-03
FORMULA_NAME UtilityControlRoom-PT-Z4T4N08-04
FORMULA_NAME UtilityControlRoom-PT-Z4T4N08-05
FORMULA_NAME UtilityControlRoom-PT-Z4T4N08-06
FORMULA_NAME UtilityControlRoom-PT-Z4T4N08-07
FORMULA_NAME UtilityControlRoom-PT-Z4T4N08-08
FORMULA_NAME UtilityControlRoom-PT-Z4T4N08-09
FORMULA_NAME UtilityControlRoom-PT-Z4T4N08-10
FORMULA_NAME UtilityControlRoom-PT-Z4T4N08-11
FORMULA_NAME UtilityControlRoom-PT-Z4T4N08-12
FORMULA_NAME UtilityControlRoom-PT-Z4T4N08-13
FORMULA_NAME UtilityControlRoom-PT-Z4T4N08-14
FORMULA_NAME UtilityControlRoom-PT-Z4T4N08-15

=== Now, execution of the tool begins

BK_START 1621491964158

Running Version 0
[2021-05-20 06:26:06] [INFO ] Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, LTLFireability, -spotpath, /home/mcc/BenchKit/bin//..//ltlfilt, -z3path, /home/mcc/BenchKit/bin//..//z3/bin/z3, -yices2path, /home/mcc/BenchKit/bin//..//yices/bin/yices, -its, -ltsmin, -greatspnpath, /home/mcc/BenchKit/bin//..//greatspn/, -order, META, -manyOrder, -smt, -timeout, 3600]
[2021-05-20 06:26:06] [INFO ] Parsing pnml file : /home/mcc/execution/model.pnml
[2021-05-20 06:26:06] [INFO ] Load time of PNML (sax parser for PT used): 80 ms
[2021-05-20 06:26:06] [INFO ] Transformed 302 places.
[2021-05-20 06:26:06] [INFO ] Transformed 600 transitions.
[2021-05-20 06:26:06] [INFO ] Parsed PT model containing 302 places and 600 transitions in 129 ms.
Parsed 16 properties from file /home/mcc/execution/LTLFireability.xml in 16 ms.
Working with output stream class java.io.PrintStream
[2021-05-20 06:26:06] [INFO ] Reduced 24 identical enabling conditions.
[2021-05-20 06:26:06] [INFO ] Initial state test concluded for 4 properties.
Ensure Unique test removed 128 transitions
Reduce redundant transitions removed 128 transitions.
FORMULA UtilityControlRoom-PT-Z4T4N08-00 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA UtilityControlRoom-PT-Z4T4N08-15 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
Support contains 269 out of 302 places. Attempting structural reductions.
Starting structural reductions, iteration 0 : 302/302 places, 472/472 transitions.
Applied a total of 0 rules in 41 ms. Remains 302 /302 variables (removed 0) and now considering 472/472 (removed 0) transitions.
// Phase 1: matrix 472 rows 302 cols
[2021-05-20 06:26:06] [INFO ] Computed 19 place invariants in 25 ms
[2021-05-20 06:26:06] [INFO ] Implicit Places using invariants in 191 ms returned [245]
Discarding 1 places :
Implicit Place search using SMT only with invariants took 218 ms to find 1 implicit places.
// Phase 1: matrix 472 rows 301 cols
[2021-05-20 06:26:06] [INFO ] Computed 18 place invariants in 23 ms
[2021-05-20 06:26:07] [INFO ] Dead Transitions using invariants and state equation in 244 ms returned []
Starting structural reductions, iteration 1 : 301/302 places, 472/472 transitions.
Applied a total of 0 rules in 6 ms. Remains 301 /301 variables (removed 0) and now considering 472/472 (removed 0) transitions.
// Phase 1: matrix 472 rows 301 cols
[2021-05-20 06:26:07] [INFO ] Computed 18 place invariants in 4 ms
[2021-05-20 06:26:07] [INFO ] Dead Transitions using invariants and state equation in 235 ms returned []
Finished structural reductions, in 2 iterations. Remains : 301/302 places, 472/472 transitions.
[2021-05-20 06:26:07] [INFO ] Initial state reduction rules for LTL removed 1 formulas.
[2021-05-20 06:26:07] [INFO ] Flatten gal took : 108 ms
FORMULA UtilityControlRoom-PT-Z4T4N08-05 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
[2021-05-20 06:26:07] [INFO ] Flatten gal took : 35 ms
[2021-05-20 06:26:07] [INFO ] Input system was already deterministic with 472 transitions.
Finished random walk after 2423 steps, including 0 resets, run visited all 27 properties in 26 ms. (steps per millisecond=93 )
Running Spot : CommandLine [args=[/home/mcc/BenchKit/bin//..//ltl2tgba, --hoaf=tv, -f, !((X(F(p0))||G(p1)))], workingDir=/home/mcc/execution]
Support contains 136 out of 301 places. Attempting structural reductions.
Starting structural reductions, iteration 0 : 301/301 places, 472/472 transitions.
Applied a total of 0 rules in 8 ms. Remains 301 /301 variables (removed 0) and now considering 472/472 (removed 0) transitions.
// Phase 1: matrix 472 rows 301 cols
[2021-05-20 06:26:07] [INFO ] Computed 18 place invariants in 4 ms
[2021-05-20 06:26:08] [INFO ] Implicit Places using invariants in 133 ms returned []
// Phase 1: matrix 472 rows 301 cols
[2021-05-20 06:26:08] [INFO ] Computed 18 place invariants in 9 ms
[2021-05-20 06:26:08] [INFO ] Implicit Places using invariants and state equation in 219 ms returned []
Implicit Place search using SMT with State Equation took 352 ms to find 0 implicit places.
// Phase 1: matrix 472 rows 301 cols
[2021-05-20 06:26:08] [INFO ] Computed 18 place invariants in 11 ms
[2021-05-20 06:26:08] [INFO ] Dead Transitions using invariants and state equation in 231 ms returned []
Finished structural reductions, in 1 iterations. Remains : 301/301 places, 472/472 transitions.
Stuttering acceptance computed with spot in 196 ms :[(NOT p0), (AND (NOT p0) (NOT p1)), (AND (NOT p0) (NOT p1))]
Running random walk in product with property : UtilityControlRoom-PT-Z4T4N08-01 automaton TGBA [mat=[[{ cond=(NOT p0), acceptance={0} source=0 dest: 0}], [{ cond=(NOT p1), acceptance={} source=1 dest: 0}, { cond=p1, acceptance={} source=1 dest: 2}], [{ cond=(AND (NOT p1) (NOT p0)), acceptance={} source=2 dest: 0}, { cond=(AND p1 (NOT p0)), acceptance={} source=2 dest: 2}]], initial=1, aps=[p0:(OR (GEQ s131 1) (GEQ s192 1) (GEQ s135 1) (GEQ s196 1) (GEQ s139 1) (GEQ s200 1) (GEQ s143 1) (GEQ s78 1) (GEQ s147 1) (GEQ s82 1) (GEQ s151 1) (GEQ s86 1) (GEQ s155 1) (GEQ s90 1) (GEQ s159 1) (GEQ s94 1) (GEQ s163 1) (GEQ s98 1) (GEQ s167 1) (GEQ s102 1) (GEQ s106 1) (GEQ s171 1) (GEQ s110 1) (GEQ s175 1) (GEQ s114 1) (GEQ s179 1) (GEQ s118 1) (GEQ s183 1) (GEQ s122 1) (GEQ s187 1) (GEQ s126 1) (GEQ s191 1) (GEQ s130 1) (GEQ s195 1) (GEQ s134 1) (GEQ s199 1) (GEQ s138 1) (GEQ s203 1) (GEQ s77 1) (GEQ s142 1) (GEQ s81 1) (GEQ s146 1) (GEQ s85 1) (GEQ s150 1) (GEQ s89 1) (GEQ s154 1) (GEQ s93 1) (GEQ s158 1) (GEQ s97 1) (GEQ s162 1) (GEQ s101 1) (GEQ s166 1) (GEQ s170 1) (GEQ s105 1) (GEQ s174 1) (GEQ s109 1) (GEQ s178 1) (GEQ s113 1) (GEQ s182 1) (GEQ s117 1) (GEQ s186 1) (GEQ s121 1) (GEQ s190 1) (GEQ s125 1) (GEQ s194 1) (GEQ s129 1) (GEQ s198 1) (GEQ s133 1) (GEQ s202 1) (GEQ s137 1) (GEQ s76 1) (GEQ s141 1) (GEQ s80 1) (GEQ s145 1) (GEQ s84 1) (GEQ s149 1) (GEQ s88 1) (GEQ s153 1) (GEQ s92 1) (GEQ s157 1) (GEQ s96 1) (GEQ s161 1) (GEQ s100 1) (GEQ s165 1) (GEQ s104 1) (GEQ s169 1) (GEQ s108 1) (GEQ s173 1) (GEQ s112 1) (GEQ s177 1) (GEQ s116 1) (GEQ s181 1) (GEQ s120 1) (GEQ s185 1) (GEQ s124 1) (GEQ s189 1) (GEQ s128 1) (GEQ s193 1) (GEQ s132 1) (GEQ s197 1) (GEQ s136 1) (GEQ s201 1) (GEQ s79 1) (GEQ s140 1) (GEQ s83 1) (GEQ s144 1) (GEQ s87 1) (GEQ s148 1) (GEQ s91 1) (GEQ s152 1) (GEQ s95 1) (GEQ s156 1) (GEQ s99 1) (GEQ s160 1) (GEQ s103 1) (GEQ s164 1) (GEQ s107 1) (GEQ s168 1) (GEQ s111 1) (GEQ s172 1) (GEQ s115 1) (GEQ s176 1) (GEQ s119 1) (GEQ s180 1) (GEQ s123 1) (GEQ s184 1) (GEQ s127 1) (GEQ s188 1)), p1:(OR (GEQ s245 1) (GEQ s246 1) (GEQ s251 1) (GEQ s252 1) (GEQ s247 1) (GEQ s248 1) (GEQ s249 1) (GEQ s250 1))], nbAcceptance=1, properties=[trans-labels, explicit-labels, trans-acc, deterministic, no-univ-branch, unambiguous, semi-deterministic, very-weak, weak, inherently-weak], stateDesc=[null, null, null][false, false, false]]
Product exploration explored 100000 steps with 12248 reset in 661 ms.
Product exploration explored 100000 steps with 12290 reset in 661 ms.
Knowledge obtained : [(NOT p0), (NOT p1)]
Stuttering acceptance computed with spot in 66 ms :[(NOT p0), (AND (NOT p0) (NOT p1)), (AND (NOT p0) (NOT p1))]
Product exploration explored 100000 steps with 12339 reset in 541 ms.
Product exploration explored 100000 steps with 12275 reset in 550 ms.
Applying partial POR strategy [true, false, true]
Stuttering acceptance computed with spot in 68 ms :[(NOT p0), (AND (NOT p0) (NOT p1)), (AND (NOT p0) (NOT p1))]
Support contains 136 out of 301 places. Attempting structural reductions.
Property had overlarge support with respect to TGBA, discarding it for now.
Starting structural reductions, iteration 0 : 301/301 places, 472/472 transitions.
Performed 32 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 0 with 32 Pre rules applied. Total rules applied 0 place count 301 transition count 504
Deduced a syphon composed of 32 places in 1 ms
Iterating global reduction 0 with 32 rules applied. Total rules applied 32 place count 301 transition count 504
Performed 8 Post agglomeration using F-continuation condition.Transition count delta: -24
Deduced a syphon composed of 40 places in 1 ms
Iterating global reduction 0 with 8 rules applied. Total rules applied 40 place count 301 transition count 528
Deduced a syphon composed of 40 places in 0 ms
Applied a total of 40 rules in 36 ms. Remains 301 /301 variables (removed 0) and now considering 528/472 (removed -56) transitions.
[2021-05-20 06:26:11] [INFO ] Redundant transitions in 29 ms returned []
// Phase 1: matrix 528 rows 301 cols
[2021-05-20 06:26:11] [INFO ] Computed 18 place invariants in 6 ms
[2021-05-20 06:26:11] [INFO ] Dead Transitions using invariants and state equation in 226 ms returned []
Finished structural reductions, in 1 iterations. Remains : 301/301 places, 528/472 transitions.
Product exploration explored 100000 steps with 14100 reset in 1059 ms.
Product exploration explored 100000 steps with 14174 reset in 1014 ms.
[2021-05-20 06:26:13] [INFO ] Flatten gal took : 28 ms
[2021-05-20 06:26:13] [INFO ] Flatten gal took : 26 ms
[2021-05-20 06:26:13] [INFO ] Time to serialize gal into /tmp/LTL1100565762114530113.gal : 11 ms
[2021-05-20 06:26:13] [INFO ] Time to serialize properties into /tmp/LTL8498046639858240123.ltl : 1 ms
Invoking ITS tools like this :CommandLine [args=[/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.202104292328/bin/its-ltl-linux64, --gc-threshold, 2000000, -i, /tmp/LTL1100565762114530113.gal, -t, CGAL, -LTL, /tmp/LTL8498046639858240123.ltl, -c, -stutter-deadlock, --gen-order, FOLLOW], workingDir=/home/mcc/execution]

its-ltl command run as :

/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.202104292328/bin/its-ltl-linux64 --gc-threshold 2000000 -i /tmp/LTL1100565762114530113.gal -t CGAL -LTL /tmp/LTL8498046639858240123.ltl -c -stutter-deadlock --gen-order FOLLOW
Read 1 LTL properties
Checking formula 0 : !(((X(F("((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((MovetoZ_3_1_3>=1)||(MovetoZ_7_1_0>=1))||(MovetoZ_3_2_3>=1))||(MovetoZ_7_2_0>=1))||(MovetoZ_3_3_3>=1))||(MovetoZ_7_3_0>=1))||(MovetoZ_4_0_3>=1))||(MovetoZ_0_0_2>=1))||(MovetoZ_4_1_3>=1))||(MovetoZ_0_1_2>=1))||(MovetoZ_4_2_3>=1))||(MovetoZ_0_2_2>=1))||(MovetoZ_4_3_3>=1))||(MovetoZ_0_3_2>=1))||(MovetoZ_5_0_3>=1))||(MovetoZ_1_0_2>=1))||(MovetoZ_5_1_3>=1))||(MovetoZ_1_1_2>=1))||(MovetoZ_5_2_3>=1))||(MovetoZ_1_2_2>=1))||(MovetoZ_1_3_2>=1))||(MovetoZ_5_3_3>=1))||(MovetoZ_2_0_2>=1))||(MovetoZ_6_0_3>=1))||(MovetoZ_2_1_2>=1))||(MovetoZ_6_1_3>=1))||(MovetoZ_2_2_2>=1))||(MovetoZ_6_2_3>=1))||(MovetoZ_2_3_2>=1))||(MovetoZ_6_3_3>=1))||(MovetoZ_3_0_2>=1))||(MovetoZ_7_0_3>=1))||(MovetoZ_3_1_2>=1))||(MovetoZ_7_1_3>=1))||(MovetoZ_3_2_2>=1))||(MovetoZ_7_2_3>=1))||(MovetoZ_3_3_2>=1))||(MovetoZ_7_3_3>=1))||(MovetoZ_0_0_1>=1))||(MovetoZ_4_0_2>=1))||(MovetoZ_0_1_1>=1))||(MovetoZ_4_1_2>=1))||(MovetoZ_0_2_1>=1))||(MovetoZ_4_2_2>=1))||(MovetoZ_0_3_1>=1))||(MovetoZ_4_3_2>=1))||(MovetoZ_1_0_1>=1))||(MovetoZ_5_0_2>=1))||(MovetoZ_1_1_1>=1))||(MovetoZ_5_1_2>=1))||(MovetoZ_1_2_1>=1))||(MovetoZ_5_2_2>=1))||(MovetoZ_5_3_2>=1))||(MovetoZ_1_3_1>=1))||(MovetoZ_6_0_2>=1))||(MovetoZ_2_0_1>=1))||(MovetoZ_6_1_2>=1))||(MovetoZ_2_1_1>=1))||(MovetoZ_6_2_2>=1))||(MovetoZ_2_2_1>=1))||(MovetoZ_6_3_2>=1))||(MovetoZ_2_3_1>=1))||(MovetoZ_7_0_2>=1))||(MovetoZ_3_0_1>=1))||(MovetoZ_7_1_2>=1))||(MovetoZ_3_1_1>=1))||(MovetoZ_7_2_2>=1))||(MovetoZ_3_2_1>=1))||(MovetoZ_7_3_2>=1))||(MovetoZ_3_3_1>=1))||(MovetoZ_0_0_0>=1))||(MovetoZ_4_0_1>=1))||(MovetoZ_0_1_0>=1))||(MovetoZ_4_1_1>=1))||(MovetoZ_0_2_0>=1))||(MovetoZ_4_2_1>=1))||(MovetoZ_0_3_0>=1))||(MovetoZ_4_3_1>=1))||(MovetoZ_1_0_0>=1))||(MovetoZ_5_0_1>=1))||(MovetoZ_1_1_0>=1))||(MovetoZ_5_1_1>=1))||(MovetoZ_1_2_0>=1))||(MovetoZ_5_2_1>=1))||(MovetoZ_1_3_0>=1))||(MovetoZ_5_3_1>=1))||(MovetoZ_2_0_0>=1))||(MovetoZ_6_0_1>=1))||(MovetoZ_2_1_0>=1))||(MovetoZ_6_1_1>=1))||(MovetoZ_2_2_0>=1))||(MovetoZ_6_2_1>=1))||(MovetoZ_2_3_0>=1))||(MovetoZ_6_3_1>=1))||(MovetoZ_3_0_0>=1))||(MovetoZ_7_0_1>=1))||(MovetoZ_3_1_0>=1))||(MovetoZ_7_1_1>=1))||(MovetoZ_3_2_0>=1))||(MovetoZ_7_2_1>=1))||(MovetoZ_3_3_0>=1))||(MovetoZ_7_3_1>=1))||(MovetoZ_0_0_3>=1))||(MovetoZ_4_0_0>=1))||(MovetoZ_0_1_3>=1))||(MovetoZ_4_1_0>=1))||(MovetoZ_0_2_3>=1))||(MovetoZ_4_2_0>=1))||(MovetoZ_0_3_3>=1))||(MovetoZ_4_3_0>=1))||(MovetoZ_1_0_3>=1))||(MovetoZ_5_0_0>=1))||(MovetoZ_1_1_3>=1))||(MovetoZ_5_1_0>=1))||(MovetoZ_1_2_3>=1))||(MovetoZ_5_2_0>=1))||(MovetoZ_1_3_3>=1))||(MovetoZ_5_3_0>=1))||(MovetoZ_2_0_3>=1))||(MovetoZ_6_0_0>=1))||(MovetoZ_2_1_3>=1))||(MovetoZ_6_1_0>=1))||(MovetoZ_2_2_3>=1))||(MovetoZ_6_2_0>=1))||(MovetoZ_2_3_3>=1))||(MovetoZ_6_3_0>=1))||(MovetoZ_3_0_3>=1))||(MovetoZ_7_0_0>=1))")))||(G("((((((((Finished_0>=1)||(Finished_1>=1))||(Finished_6>=1))||(Finished_7>=1))||(Finished_2>=1))||(Finished_3>=1))||(Finished_4>=1))||(Finished_5>=1))"))))
Formula 0 simplified : !(XF"((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((MovetoZ_3_1_3>=1)||(MovetoZ_7_1_0>=1))||(MovetoZ_3_2_3>=1))||(MovetoZ_7_2_0>=1))||(MovetoZ_3_3_3>=1))||(MovetoZ_7_3_0>=1))||(MovetoZ_4_0_3>=1))||(MovetoZ_0_0_2>=1))||(MovetoZ_4_1_3>=1))||(MovetoZ_0_1_2>=1))||(MovetoZ_4_2_3>=1))||(MovetoZ_0_2_2>=1))||(MovetoZ_4_3_3>=1))||(MovetoZ_0_3_2>=1))||(MovetoZ_5_0_3>=1))||(MovetoZ_1_0_2>=1))||(MovetoZ_5_1_3>=1))||(MovetoZ_1_1_2>=1))||(MovetoZ_5_2_3>=1))||(MovetoZ_1_2_2>=1))||(MovetoZ_1_3_2>=1))||(MovetoZ_5_3_3>=1))||(MovetoZ_2_0_2>=1))||(MovetoZ_6_0_3>=1))||(MovetoZ_2_1_2>=1))||(MovetoZ_6_1_3>=1))||(MovetoZ_2_2_2>=1))||(MovetoZ_6_2_3>=1))||(MovetoZ_2_3_2>=1))||(MovetoZ_6_3_3>=1))||(MovetoZ_3_0_2>=1))||(MovetoZ_7_0_3>=1))||(MovetoZ_3_1_2>=1))||(MovetoZ_7_1_3>=1))||(MovetoZ_3_2_2>=1))||(MovetoZ_7_2_3>=1))||(MovetoZ_3_3_2>=1))||(MovetoZ_7_3_3>=1))||(MovetoZ_0_0_1>=1))||(MovetoZ_4_0_2>=1))||(MovetoZ_0_1_1>=1))||(MovetoZ_4_1_2>=1))||(MovetoZ_0_2_1>=1))||(MovetoZ_4_2_2>=1))||(MovetoZ_0_3_1>=1))||(MovetoZ_4_3_2>=1))||(MovetoZ_1_0_1>=1))||(MovetoZ_5_0_2>=1))||(MovetoZ_1_1_1>=1))||(MovetoZ_5_1_2>=1))||(MovetoZ_1_2_1>=1))||(MovetoZ_5_2_2>=1))||(MovetoZ_5_3_2>=1))||(MovetoZ_1_3_1>=1))||(MovetoZ_6_0_2>=1))||(MovetoZ_2_0_1>=1))||(MovetoZ_6_1_2>=1))||(MovetoZ_2_1_1>=1))||(MovetoZ_6_2_2>=1))||(MovetoZ_2_2_1>=1))||(MovetoZ_6_3_2>=1))||(MovetoZ_2_3_1>=1))||(MovetoZ_7_0_2>=1))||(MovetoZ_3_0_1>=1))||(MovetoZ_7_1_2>=1))||(MovetoZ_3_1_1>=1))||(MovetoZ_7_2_2>=1))||(MovetoZ_3_2_1>=1))||(MovetoZ_7_3_2>=1))||(MovetoZ_3_3_1>=1))||(MovetoZ_0_0_0>=1))||(MovetoZ_4_0_1>=1))||(MovetoZ_0_1_0>=1))||(MovetoZ_4_1_1>=1))||(MovetoZ_0_2_0>=1))||(MovetoZ_4_2_1>=1))||(MovetoZ_0_3_0>=1))||(MovetoZ_4_3_1>=1))||(MovetoZ_1_0_0>=1))||(MovetoZ_5_0_1>=1))||(MovetoZ_1_1_0>=1))||(MovetoZ_5_1_1>=1))||(MovetoZ_1_2_0>=1))||(MovetoZ_5_2_1>=1))||(MovetoZ_1_3_0>=1))||(MovetoZ_5_3_1>=1))||(MovetoZ_2_0_0>=1))||(MovetoZ_6_0_1>=1))||(MovetoZ_2_1_0>=1))||(MovetoZ_6_1_1>=1))||(MovetoZ_2_2_0>=1))||(MovetoZ_6_2_1>=1))||(MovetoZ_2_3_0>=1))||(MovetoZ_6_3_1>=1))||(MovetoZ_3_0_0>=1))||(MovetoZ_7_0_1>=1))||(MovetoZ_3_1_0>=1))||(MovetoZ_7_1_1>=1))||(MovetoZ_3_2_0>=1))||(MovetoZ_7_2_1>=1))||(MovetoZ_3_3_0>=1))||(MovetoZ_7_3_1>=1))||(MovetoZ_0_0_3>=1))||(MovetoZ_4_0_0>=1))||(MovetoZ_0_1_3>=1))||(MovetoZ_4_1_0>=1))||(MovetoZ_0_2_3>=1))||(MovetoZ_4_2_0>=1))||(MovetoZ_0_3_3>=1))||(MovetoZ_4_3_0>=1))||(MovetoZ_1_0_3>=1))||(MovetoZ_5_0_0>=1))||(MovetoZ_1_1_3>=1))||(MovetoZ_5_1_0>=1))||(MovetoZ_1_2_3>=1))||(MovetoZ_5_2_0>=1))||(MovetoZ_1_3_3>=1))||(MovetoZ_5_3_0>=1))||(MovetoZ_2_0_3>=1))||(MovetoZ_6_0_0>=1))||(MovetoZ_2_1_3>=1))||(MovetoZ_6_1_0>=1))||(MovetoZ_2_2_3>=1))||(MovetoZ_6_2_0>=1))||(MovetoZ_2_3_3>=1))||(MovetoZ_6_3_0>=1))||(MovetoZ_3_0_3>=1))||(MovetoZ_7_0_0>=1))" | G"((((((((Finished_0>=1)||(Finished_1>=1))||(Finished_6>=1))||(Finished_7>=1))||(Finished_2>=1))||(Finished_3>=1))||(Finished_4>=1))||(Finished_5>=1))")
Detected timeout of ITS tools.
[2021-05-20 06:26:28] [INFO ] Flatten gal took : 23 ms
[2021-05-20 06:26:28] [INFO ] Applying decomposition
[2021-05-20 06:26:29] [INFO ] Flatten gal took : 23 ms
Converted graph to binary with : CommandLine [args=[/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.louvain.binaries_1.0.0.202104292328/bin/convert-linux64, -i, /tmp/graph12648372897844997171.txt, -o, /tmp/graph12648372897844997171.bin, -w, /tmp/graph12648372897844997171.weights], workingDir=null]
Built communities with : CommandLine [args=[/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.louvain.binaries_1.0.0.202104292328/bin/louvain-linux64, /tmp/graph12648372897844997171.bin, -l, -1, -v, -w, /tmp/graph12648372897844997171.weights, -q, 0, -e, 0.001], workingDir=null]
[2021-05-20 06:26:29] [INFO ] Decomposing Gal with order
[2021-05-20 06:26:29] [INFO ] Rewriting arrays to variables to allow decomposition.
[2021-05-20 06:26:29] [INFO ] Removed a total of 382 redundant transitions.
[2021-05-20 06:26:29] [INFO ] Flatten gal took : 112 ms
[2021-05-20 06:26:29] [INFO ] Fuse similar labels procedure discarded/fused a total of 265 labels/synchronizations in 32 ms.
[2021-05-20 06:26:29] [INFO ] Time to serialize gal into /tmp/LTL2894004618474608830.gal : 12 ms
[2021-05-20 06:26:29] [INFO ] Time to serialize properties into /tmp/LTL15382265289152142359.ltl : 2 ms
Invoking ITS tools like this :CommandLine [args=[/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.202104292328/bin/its-ltl-linux64, --gc-threshold, 2000000, -i, /tmp/LTL2894004618474608830.gal, -t, CGAL, -LTL, /tmp/LTL15382265289152142359.ltl, -c, -stutter-deadlock], workingDir=/home/mcc/execution]

its-ltl command run as :

/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.202104292328/bin/its-ltl-linux64 --gc-threshold 2000000 -i /tmp/LTL2894004618474608830.gal -t CGAL -LTL /tmp/LTL15382265289152142359.ltl -c -stutter-deadlock
Read 1 LTL properties
Checking formula 0 : !(((X(F("((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((i4.u31.MovetoZ_3_1_3>=1)||(i6.u20.MovetoZ_7_1_0>=1))||(i4.u31.MovetoZ_3_2_3>=1))||(i6.u20.MovetoZ_7_2_0>=1))||(i4.u31.MovetoZ_3_3_3>=1))||(i6.u20.MovetoZ_7_3_0>=1))||(i1.u11.MovetoZ_4_0_3>=1))||(i3.u23.MovetoZ_0_0_2>=1))||(i1.u11.MovetoZ_4_1_3>=1))||(i3.u23.MovetoZ_0_1_2>=1))||(i1.u11.MovetoZ_4_2_3>=1))||(i3.u23.MovetoZ_0_2_2>=1))||(i1.u11.MovetoZ_4_3_3>=1))||(i3.u23.MovetoZ_0_3_2>=1))||(i5.u15.MovetoZ_5_0_3>=1))||(i7.u29.MovetoZ_1_0_2>=1))||(i5.u15.MovetoZ_5_1_3>=1))||(i7.u29.MovetoZ_1_1_2>=1))||(i5.u15.MovetoZ_5_2_3>=1))||(i7.u29.MovetoZ_1_2_2>=1))||(i7.u29.MovetoZ_1_3_2>=1))||(i5.u15.MovetoZ_5_3_3>=1))||(i0.u4.MovetoZ_2_0_2>=1))||(i2.u19.MovetoZ_6_0_3>=1))||(i0.u4.MovetoZ_2_1_2>=1))||(i2.u19.MovetoZ_6_1_3>=1))||(i0.u4.MovetoZ_2_2_2>=1))||(i2.u19.MovetoZ_6_2_3>=1))||(i0.u4.MovetoZ_2_3_2>=1))||(i2.u19.MovetoZ_6_3_3>=1))||(i4.u7.MovetoZ_3_0_2>=1))||(i6.u24.MovetoZ_7_0_3>=1))||(i4.u7.MovetoZ_3_1_2>=1))||(i6.u24.MovetoZ_7_1_3>=1))||(i4.u7.MovetoZ_3_2_2>=1))||(i6.u24.MovetoZ_7_2_3>=1))||(i4.u7.MovetoZ_3_3_2>=1))||(i6.u24.MovetoZ_7_3_3>=1))||(i3.u26.MovetoZ_0_0_1>=1))||(i1.u10.MovetoZ_4_0_2>=1))||(i3.u26.MovetoZ_0_1_1>=1))||(i1.u10.MovetoZ_4_1_2>=1))||(i3.u26.MovetoZ_0_2_1>=1))||(i1.u10.MovetoZ_4_2_2>=1))||(i3.u26.MovetoZ_0_3_1>=1))||(i1.u10.MovetoZ_4_3_2>=1))||(i7.u28.MovetoZ_1_0_1>=1))||(i5.u14.MovetoZ_5_0_2>=1))||(i7.u28.MovetoZ_1_1_1>=1))||(i5.u14.MovetoZ_5_1_2>=1))||(i7.u28.MovetoZ_1_2_1>=1))||(i5.u14.MovetoZ_5_2_2>=1))||(i5.u14.MovetoZ_5_3_2>=1))||(i7.u28.MovetoZ_1_3_1>=1))||(i2.u18.MovetoZ_6_0_2>=1))||(i0.u3.MovetoZ_2_0_1>=1))||(i2.u18.MovetoZ_6_1_2>=1))||(i0.u3.MovetoZ_2_1_1>=1))||(i2.u18.MovetoZ_6_2_2>=1))||(i0.u3.MovetoZ_2_2_1>=1))||(i2.u18.MovetoZ_6_3_2>=1))||(i0.u3.MovetoZ_2_3_1>=1))||(i6.u22.MovetoZ_7_0_2>=1))||(i4.u6.MovetoZ_3_0_1>=1))||(i6.u22.MovetoZ_7_1_2>=1))||(i4.u6.MovetoZ_3_1_1>=1))||(i6.u22.MovetoZ_7_2_2>=1))||(i4.u6.MovetoZ_3_2_1>=1))||(i6.u22.MovetoZ_7_3_2>=1))||(i4.u6.MovetoZ_3_3_1>=1))||(i3.u25.MovetoZ_0_0_0>=1))||(i1.u9.MovetoZ_4_0_1>=1))||(i3.u25.MovetoZ_0_1_0>=1))||(i1.u9.MovetoZ_4_1_1>=1))||(i3.u25.MovetoZ_0_2_0>=1))||(i1.u9.MovetoZ_4_2_1>=1))||(i3.u25.MovetoZ_0_3_0>=1))||(i1.u9.MovetoZ_4_3_1>=1))||(i7.u27.MovetoZ_1_0_0>=1))||(i5.u13.MovetoZ_5_0_1>=1))||(i7.u27.MovetoZ_1_1_0>=1))||(i5.u13.MovetoZ_5_1_1>=1))||(i7.u27.MovetoZ_1_2_0>=1))||(i5.u13.MovetoZ_5_2_1>=1))||(i7.u27.MovetoZ_1_3_0>=1))||(i5.u13.MovetoZ_5_3_1>=1))||(i0.u2.MovetoZ_2_0_0>=1))||(i2.u17.MovetoZ_6_0_1>=1))||(i0.u2.MovetoZ_2_1_0>=1))||(i2.u17.MovetoZ_6_1_1>=1))||(i0.u2.MovetoZ_2_2_0>=1))||(i2.u17.MovetoZ_6_2_1>=1))||(i0.u2.MovetoZ_2_3_0>=1))||(i2.u17.MovetoZ_6_3_1>=1))||(i4.u5.MovetoZ_3_0_0>=1))||(i6.u21.MovetoZ_7_0_1>=1))||(i4.u5.MovetoZ_3_1_0>=1))||(i6.u21.MovetoZ_7_1_1>=1))||(i4.u5.MovetoZ_3_2_0>=1))||(i6.u21.MovetoZ_7_2_1>=1))||(i4.u5.MovetoZ_3_3_0>=1))||(i6.u21.MovetoZ_7_3_1>=1))||(i3.u0.MovetoZ_0_0_3>=1))||(i1.u8.MovetoZ_4_0_0>=1))||(i3.u0.MovetoZ_0_1_3>=1))||(i1.u8.MovetoZ_4_1_0>=1))||(i3.u0.MovetoZ_0_2_3>=1))||(i1.u8.MovetoZ_4_2_0>=1))||(i3.u0.MovetoZ_0_3_3>=1))||(i1.u8.MovetoZ_4_3_0>=1))||(i7.u1.MovetoZ_1_0_3>=1))||(i5.u12.MovetoZ_5_0_0>=1))||(i7.u1.MovetoZ_1_1_3>=1))||(i5.u12.MovetoZ_5_1_0>=1))||(i7.u1.MovetoZ_1_2_3>=1))||(i5.u12.MovetoZ_5_2_0>=1))||(i7.u1.MovetoZ_1_3_3>=1))||(i5.u12.MovetoZ_5_3_0>=1))||(i0.u30.MovetoZ_2_0_3>=1))||(i2.u16.MovetoZ_6_0_0>=1))||(i0.u30.MovetoZ_2_1_3>=1))||(i2.u16.MovetoZ_6_1_0>=1))||(i0.u30.MovetoZ_2_2_3>=1))||(i2.u16.MovetoZ_6_2_0>=1))||(i0.u30.MovetoZ_2_3_3>=1))||(i2.u16.MovetoZ_6_3_0>=1))||(i4.u31.MovetoZ_3_0_3>=1))||(i6.u20.MovetoZ_7_0_0>=1))")))||(G("((((((((i3.u32.Finished_0>=1)||(i7.u35.Finished_1>=1))||(i2.u34.Finished_6>=1))||(i6.u39.Finished_7>=1))||(i0.u36.Finished_2>=1))||(i4.u37.Finished_3>=1))||(i1.u33.Finished_4>=1))||(i5.u38.Finished_5>=1))"))))
Formula 0 simplified : !(XF"((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((i4.u31.MovetoZ_3_1_3>=1)||(i6.u20.MovetoZ_7_1_0>=1))||(i4.u31.MovetoZ_3_2_3>=1))||(i6.u20.MovetoZ_7_2_0>=1))||(i4.u31.MovetoZ_3_3_3>=1))||(i6.u20.MovetoZ_7_3_0>=1))||(i1.u11.MovetoZ_4_0_3>=1))||(i3.u23.MovetoZ_0_0_2>=1))||(i1.u11.MovetoZ_4_1_3>=1))||(i3.u23.MovetoZ_0_1_2>=1))||(i1.u11.MovetoZ_4_2_3>=1))||(i3.u23.MovetoZ_0_2_2>=1))||(i1.u11.MovetoZ_4_3_3>=1))||(i3.u23.MovetoZ_0_3_2>=1))||(i5.u15.MovetoZ_5_0_3>=1))||(i7.u29.MovetoZ_1_0_2>=1))||(i5.u15.MovetoZ_5_1_3>=1))||(i7.u29.MovetoZ_1_1_2>=1))||(i5.u15.MovetoZ_5_2_3>=1))||(i7.u29.MovetoZ_1_2_2>=1))||(i7.u29.MovetoZ_1_3_2>=1))||(i5.u15.MovetoZ_5_3_3>=1))||(i0.u4.MovetoZ_2_0_2>=1))||(i2.u19.MovetoZ_6_0_3>=1))||(i0.u4.MovetoZ_2_1_2>=1))||(i2.u19.MovetoZ_6_1_3>=1))||(i0.u4.MovetoZ_2_2_2>=1))||(i2.u19.MovetoZ_6_2_3>=1))||(i0.u4.MovetoZ_2_3_2>=1))||(i2.u19.MovetoZ_6_3_3>=1))||(i4.u7.MovetoZ_3_0_2>=1))||(i6.u24.MovetoZ_7_0_3>=1))||(i4.u7.MovetoZ_3_1_2>=1))||(i6.u24.MovetoZ_7_1_3>=1))||(i4.u7.MovetoZ_3_2_2>=1))||(i6.u24.MovetoZ_7_2_3>=1))||(i4.u7.MovetoZ_3_3_2>=1))||(i6.u24.MovetoZ_7_3_3>=1))||(i3.u26.MovetoZ_0_0_1>=1))||(i1.u10.MovetoZ_4_0_2>=1))||(i3.u26.MovetoZ_0_1_1>=1))||(i1.u10.MovetoZ_4_1_2>=1))||(i3.u26.MovetoZ_0_2_1>=1))||(i1.u10.MovetoZ_4_2_2>=1))||(i3.u26.MovetoZ_0_3_1>=1))||(i1.u10.MovetoZ_4_3_2>=1))||(i7.u28.MovetoZ_1_0_1>=1))||(i5.u14.MovetoZ_5_0_2>=1))||(i7.u28.MovetoZ_1_1_1>=1))||(i5.u14.MovetoZ_5_1_2>=1))||(i7.u28.MovetoZ_1_2_1>=1))||(i5.u14.MovetoZ_5_2_2>=1))||(i5.u14.MovetoZ_5_3_2>=1))||(i7.u28.MovetoZ_1_3_1>=1))||(i2.u18.MovetoZ_6_0_2>=1))||(i0.u3.MovetoZ_2_0_1>=1))||(i2.u18.MovetoZ_6_1_2>=1))||(i0.u3.MovetoZ_2_1_1>=1))||(i2.u18.MovetoZ_6_2_2>=1))||(i0.u3.MovetoZ_2_2_1>=1))||(i2.u18.MovetoZ_6_3_2>=1))||(i0.u3.MovetoZ_2_3_1>=1))||(i6.u22.MovetoZ_7_0_2>=1))||(i4.u6.MovetoZ_3_0_1>=1))||(i6.u22.MovetoZ_7_1_2>=1))||(i4.u6.MovetoZ_3_1_1>=1))||(i6.u22.MovetoZ_7_2_2>=1))||(i4.u6.MovetoZ_3_2_1>=1))||(i6.u22.MovetoZ_7_3_2>=1))||(i4.u6.MovetoZ_3_3_1>=1))||(i3.u25.MovetoZ_0_0_0>=1))||(i1.u9.MovetoZ_4_0_1>=1))||(i3.u25.MovetoZ_0_1_0>=1))||(i1.u9.MovetoZ_4_1_1>=1))||(i3.u25.MovetoZ_0_2_0>=1))||(i1.u9.MovetoZ_4_2_1>=1))||(i3.u25.MovetoZ_0_3_0>=1))||(i1.u9.MovetoZ_4_3_1>=1))||(i7.u27.MovetoZ_1_0_0>=1))||(i5.u13.MovetoZ_5_0_1>=1))||(i7.u27.MovetoZ_1_1_0>=1))||(i5.u13.MovetoZ_5_1_1>=1))||(i7.u27.MovetoZ_1_2_0>=1))||(i5.u13.MovetoZ_5_2_1>=1))||(i7.u27.MovetoZ_1_3_0>=1))||(i5.u13.MovetoZ_5_3_1>=1))||(i0.u2.MovetoZ_2_0_0>=1))||(i2.u17.MovetoZ_6_0_1>=1))||(i0.u2.MovetoZ_2_1_0>=1))||(i2.u17.MovetoZ_6_1_1>=1))||(i0.u2.MovetoZ_2_2_0>=1))||(i2.u17.MovetoZ_6_2_1>=1))||(i0.u2.MovetoZ_2_3_0>=1))||(i2.u17.MovetoZ_6_3_1>=1))||(i4.u5.MovetoZ_3_0_0>=1))||(i6.u21.MovetoZ_7_0_1>=1))||(i4.u5.MovetoZ_3_1_0>=1))||(i6.u21.MovetoZ_7_1_1>=1))||(i4.u5.MovetoZ_3_2_0>=1))||(i6.u21.MovetoZ_7_2_1>=1))||(i4.u5.MovetoZ_3_3_0>=1))||(i6.u21.MovetoZ_7_3_1>=1))||(i3.u0.MovetoZ_0_0_3>=1))||(i1.u8.MovetoZ_4_0_0>=1))||(i3.u0.MovetoZ_0_1_3>=1))||(i1.u8.MovetoZ_4_1_0>=1))||(i3.u0.MovetoZ_0_2_3>=1))||(i1.u8.MovetoZ_4_2_0>=1))||(i3.u0.MovetoZ_0_3_3>=1))||(i1.u8.MovetoZ_4_3_0>=1))||(i7.u1.MovetoZ_1_0_3>=1))||(i5.u12.MovetoZ_5_0_0>=1))||(i7.u1.MovetoZ_1_1_3>=1))||(i5.u12.MovetoZ_5_1_0>=1))||(i7.u1.MovetoZ_1_2_3>=1))||(i5.u12.MovetoZ_5_2_0>=1))||(i7.u1.MovetoZ_1_3_3>=1))||(i5.u12.MovetoZ_5_3_0>=1))||(i0.u30.MovetoZ_2_0_3>=1))||(i2.u16.MovetoZ_6_0_0>=1))||(i0.u30.MovetoZ_2_1_3>=1))||(i2.u16.MovetoZ_6_1_0>=1))||(i0.u30.MovetoZ_2_2_3>=1))||(i2.u16.MovetoZ_6_2_0>=1))||(i0.u30.MovetoZ_2_3_3>=1))||(i2.u16.MovetoZ_6_3_0>=1))||(i4.u31.MovetoZ_3_0_3>=1))||(i6.u20.MovetoZ_7_0_0>=1))" | G"((((((((i3.u32.Finished_0>=1)||(i7.u35.Finished_1>=1))||(i2.u34.Finished_6>=1))||(i6.u39.Finished_7>=1))||(i0.u36.Finished_2>=1))||(i4.u37.Finished_3>=1))||(i1.u33.Finished_4>=1))||(i5.u38.Finished_5>=1))")
Reverse transition relation is exact ! Faster fixpoint algorithm enabled.
3 unique states visited
3 strongly connected components in search stack
3 transitions explored
3 items max in DFS search stack
308 ticks for the emptiness check
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
STATS,0,3.11434,87240,1,0,150491,3412,2234,217357,533,20735,136157
an accepting run exists (use option '-e' to print it)
Formula 0 is FALSE accepting run found.
FORMULA UtilityControlRoom-PT-Z4T4N08-01 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL USE_NUPN
Treatment of property UtilityControlRoom-PT-Z4T4N08-01 finished in 24993 ms.
Running Spot : CommandLine [args=[/home/mcc/BenchKit/bin//..//ltl2tgba, --hoaf=tv, -f, !((F(p0)||G((X(p1)||F(p2)))))], workingDir=/home/mcc/execution]
Support contains 77 out of 301 places. Attempting structural reductions.
Starting structural reductions, iteration 0 : 301/301 places, 472/472 transitions.
Discarding 96 places :
Symmetric choice reduction at 0 with 96 rule applications. Total rules 96 place count 205 transition count 376
Iterating global reduction 0 with 96 rules applied. Total rules applied 192 place count 205 transition count 376
Applied a total of 192 rules in 14 ms. Remains 205 /301 variables (removed 96) and now considering 376/472 (removed 96) transitions.
// Phase 1: matrix 376 rows 205 cols
[2021-05-20 06:26:32] [INFO ] Computed 18 place invariants in 1 ms
[2021-05-20 06:26:32] [INFO ] Implicit Places using invariants in 68 ms returned []
// Phase 1: matrix 376 rows 205 cols
[2021-05-20 06:26:32] [INFO ] Computed 18 place invariants in 7 ms
[2021-05-20 06:26:33] [INFO ] Implicit Places using invariants and state equation in 179 ms returned []
Implicit Place search using SMT with State Equation took 247 ms to find 0 implicit places.
// Phase 1: matrix 376 rows 205 cols
[2021-05-20 06:26:33] [INFO ] Computed 18 place invariants in 2 ms
[2021-05-20 06:26:33] [INFO ] Dead Transitions using invariants and state equation in 152 ms returned []
Finished structural reductions, in 1 iterations. Remains : 205/301 places, 376/472 transitions.
Stuttering acceptance computed with spot in 78 ms :[(AND (NOT p0) (NOT p2) (NOT p1)), (AND (NOT p0) (NOT p2) (NOT p1)), (AND (NOT p0) (NOT p2))]
Running random walk in product with property : UtilityControlRoom-PT-Z4T4N08-02 automaton TGBA [mat=[[{ cond=(NOT p0), acceptance={} source=0 dest: 0}, { cond=(AND (NOT p0) (NOT p2)), acceptance={} source=0 dest: 1}], [{ cond=(AND (NOT p0) (NOT p2) (NOT p1)), acceptance={} source=1 dest: 2}], [{ cond=(AND (NOT p0) (NOT p2)), acceptance={0} source=2 dest: 2}]], initial=0, aps=[p0:(OR (GEQ s149 1) (GEQ s150 1) (GEQ s155 1) (GEQ s156 1) (GEQ s151 1) (GEQ s152 1) (GEQ s153 1) (GEQ s154 1)), p2:(AND (OR (LT s0 1) (LT s12 1) (LT s148 1)) (OR (LT s2 1) (LT s26 1) (LT s148 1)) (OR (LT s1 1) (LT s33 1) (LT s148 1)) (OR (LT s3 1) (LT s43 1) (LT s148 1)) (OR (LT s0 1) (LT s32 1) (LT s148 1)) (OR (LT s1 1) (LT s29 1) (LT s148 1)) (OR (LT s0 1) (LT s36 1) (LT s148 1)) (OR (LT s2 1) (LT s22 1) (LT s148 1)) (OR (LT s0 1) (LT s40 1) (LT s148 1)) (OR (LT s3 1) (LT s19 1) (LT s148 1)) (OR (LT s1 1) (LT s37 1) (LT s148 1)) (OR (LT s2 1) (LT s42 1) (LT s148 1)) (OR (LT s3 1) (LT s31 1) (LT s148 1)) (OR (LT s2 1) (LT s30 1) (LT s148 1)) (OR (LT s3 1) (LT s27 1) (LT s148 1)) (OR (LT s1 1) (LT s41 1) (LT s148 1)) (OR (LT s2 1) (LT s34 1) (LT s148 1)) (OR (LT s3 1) (LT s23 1) (LT s148 1)) (OR (LT s0 1) (LT s24 1) (LT s148 1)) (OR (LT s1 1) (LT s21 1) (LT s148 1)) (OR (LT s2 1) (LT s38 1) (LT s148 1)) (OR (LT s3 1) (LT s35 1) (LT s148 1)) (OR (LT s3 1) (LT s15 1) (LT s148 1)) (OR (LT s1 1) (LT s17 1) (LT s148 1)) (OR (LT s2 1) (LT s18 1) (LT s148 1)) (OR (LT s3 1) (LT s39 1) (LT s148 1)) (OR (LT s1 1) (LT s25 1) (LT s148 1)) (OR (LT s2 1) (LT s14 1) (LT s148 1)) (OR (LT s0 1) (LT s28 1) (LT s148 1)) (OR (LT s1 1) (LT s13 1) (LT s148 1)) (OR (LT s0 1) (LT s20 1) (LT s148 1)) (OR (LT s0 1) (LT s16 1) (LT s148 1))), p1:(OR (GEQ s65 1) (GEQ s64 1) (GEQ s67 1) (GEQ s66 1) (GEQ s69 1) (GEQ s68 1) (GEQ s71 1) (GEQ s70 1) (GEQ s73 1) (GEQ s72 1) (GEQ s75 1) (GEQ s74 1) (GEQ s45 1) (GEQ s44 1) (GEQ s47 1) (GEQ s46 1) (GEQ s49 1) (GEQ s48 1) (GEQ s51 1) (GEQ s50 1) (GEQ s53 1) (GEQ s52 1) (GEQ s55 1) (GEQ s54 1) (GEQ s57 1) (GEQ s56 1) (GEQ s59 1) (GEQ s58 1) (GEQ s61 1) (GEQ s60 1) (GEQ s63 1) (GEQ s62 1))], nbAcceptance=1, properties=[trans-labels, explicit-labels, trans-acc, no-univ-branch, very-weak, weak, inherently-weak], stateDesc=[null, null, null][false, false, false]]
Product exploration explored 100000 steps with 9060 reset in 520 ms.
Product exploration explored 100000 steps with 8986 reset in 479 ms.
Knowledge obtained : [(NOT p0), p2, (NOT p1)]
Stuttering acceptance computed with spot in 67 ms :[(AND (NOT p0) (NOT p2) (NOT p1)), (AND (NOT p0) (NOT p2) (NOT p1)), (AND (NOT p0) (NOT p2))]
Product exploration explored 100000 steps with 9031 reset in 485 ms.
Product exploration explored 100000 steps with 9078 reset in 471 ms.
Applying partial POR strategy [false, true, true]
Stuttering acceptance computed with spot in 67 ms :[(AND (NOT p0) (NOT p2) (NOT p1)), (AND (NOT p0) (NOT p2) (NOT p1)), (AND (NOT p0) (NOT p2))]
Support contains 77 out of 205 places. Attempting structural reductions.
Property had overlarge support with respect to TGBA, discarding it for now.
Starting structural reductions, iteration 0 : 205/205 places, 376/376 transitions.
Performed 8 Post agglomeration using F-continuation condition.Transition count delta: 0
Deduced a syphon composed of 8 places in 0 ms
Iterating global reduction 0 with 8 rules applied. Total rules applied 8 place count 205 transition count 376
Deduced a syphon composed of 8 places in 1 ms
Applied a total of 8 rules in 14 ms. Remains 205 /205 variables (removed 0) and now considering 376/376 (removed 0) transitions.
[2021-05-20 06:26:35] [INFO ] Redundant transitions in 6 ms returned []
// Phase 1: matrix 376 rows 205 cols
[2021-05-20 06:26:35] [INFO ] Computed 18 place invariants in 2 ms
[2021-05-20 06:26:35] [INFO ] Dead Transitions using invariants and state equation in 142 ms returned []
Finished structural reductions, in 1 iterations. Remains : 205/205 places, 376/376 transitions.
Product exploration explored 100000 steps with 7136 reset in 693 ms.
Product exploration explored 100000 steps with 7190 reset in 670 ms.
[2021-05-20 06:26:37] [INFO ] Flatten gal took : 19 ms
[2021-05-20 06:26:37] [INFO ] Flatten gal took : 18 ms
[2021-05-20 06:26:37] [INFO ] Time to serialize gal into /tmp/LTL4706624563905708384.gal : 2 ms
[2021-05-20 06:26:37] [INFO ] Time to serialize properties into /tmp/LTL8723379873859779437.ltl : 1 ms
Invoking ITS tools like this :CommandLine [args=[/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.202104292328/bin/its-ltl-linux64, --gc-threshold, 2000000, -i, /tmp/LTL4706624563905708384.gal, -t, CGAL, -LTL, /tmp/LTL8723379873859779437.ltl, -c, -stutter-deadlock, --gen-order, FOLLOW], workingDir=/home/mcc/execution]

its-ltl command run as :

/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.202104292328/bin/its-ltl-linux64 --gc-threshold 2000000 -i /tmp/LTL4706624563905708384.gal -t CGAL -LTL /tmp/LTL8723379873859779437.ltl -c -stutter-deadlock --gen-order FOLLOW
Read 1 LTL properties
Checking formula 0 : !(((F("((((((((Finished_0>=1)||(Finished_1>=1))||(Finished_6>=1))||(Finished_7>=1))||(Finished_2>=1))||(Finished_3>=1))||(Finished_4>=1))||(Finished_5>=1))"))||(G((X("((((((((((((((((((((((((((((((((Assigned_5_1>=1)||(Assigned_5_0>=1))||(Assigned_5_3>=1))||(Assigned_5_2>=1))||(Assigned_6_1>=1))||(Assigned_6_0>=1))||(Assigned_6_3>=1))||(Assigned_6_2>=1))||(Assigned_7_1>=1))||(Assigned_7_0>=1))||(Assigned_7_3>=1))||(Assigned_7_2>=1))||(Assigned_0_1>=1))||(Assigned_0_0>=1))||(Assigned_0_3>=1))||(Assigned_0_2>=1))||(Assigned_1_1>=1))||(Assigned_1_0>=1))||(Assigned_1_3>=1))||(Assigned_1_2>=1))||(Assigned_2_1>=1))||(Assigned_2_0>=1))||(Assigned_2_3>=1))||(Assigned_2_2>=1))||(Assigned_3_1>=1))||(Assigned_3_0>=1))||(Assigned_3_3>=1))||(Assigned_3_2>=1))||(Assigned_4_1>=1))||(Assigned_4_0>=1))||(Assigned_4_3>=1))||(Assigned_4_2>=1))"))||(F("((((((((((((((((((((((((((((((((((IdleTechs_0<1)||(OpenRequests_0_0<1))||(Idles<1))&&(((IdleTechs_2<1)||(OpenRequests_3_2<1))||(Idles<1)))&&(((IdleTechs_1<1)||(OpenRequests_5_1<1))||(Idles<1)))&&(((IdleTechs_3<1)||(OpenRequests_7_3<1))||(Idles<1)))&&(((IdleTechs_0<1)||(OpenRequests_5_0<1))||(Idles<1)))&&(((IdleTechs_1<1)||(OpenRequests_4_1<1))||(Idles<1)))&&(((IdleTechs_0<1)||(OpenRequests_6_0<1))||(Idles<1)))&&(((IdleTechs_2<1)||(OpenRequests_2_2<1))||(Idles<1)))&&(((IdleTechs_0<1)||(OpenRequests_7_0<1))||(Idles<1)))&&(((IdleTechs_3<1)||(OpenRequests_1_3<1))||(Idles<1)))&&(((IdleTechs_1<1)||(OpenRequests_6_1<1))||(Idles<1)))&&(((IdleTechs_2<1)||(OpenRequests_7_2<1))||(Idles<1)))&&(((IdleTechs_3<1)||(OpenRequests_4_3<1))||(Idles<1)))&&(((IdleTechs_2<1)||(OpenRequests_4_2<1))||(Idles<1)))&&(((IdleTechs_3<1)||(OpenRequests_3_3<1))||(Idles<1)))&&(((IdleTechs_1<1)||(OpenRequests_7_1<1))||(Idles<1)))&&(((IdleTechs_2<1)||(OpenRequests_5_2<1))||(Idles<1)))&&(((IdleTechs_3<1)||(OpenRequests_2_3<1))||(Idles<1)))&&(((IdleTechs_0<1)||(OpenRequests_3_0<1))||(Idles<1)))&&(((IdleTechs_1<1)||(OpenRequests_2_1<1))||(Idles<1)))&&(((IdleTechs_2<1)||(OpenRequests_6_2<1))||(Idles<1)))&&(((IdleTechs_3<1)||(OpenRequests_5_3<1))||(Idles<1)))&&(((IdleTechs_3<1)||(OpenRequests_0_3<1))||(Idles<1)))&&(((IdleTechs_1<1)||(OpenRequests_1_1<1))||(Idles<1)))&&(((IdleTechs_2<1)||(OpenRequests_1_2<1))||(Idles<1)))&&(((IdleTechs_3<1)||(OpenRequests_6_3<1))||(Idles<1)))&&(((IdleTechs_1<1)||(OpenRequests_3_1<1))||(Idles<1)))&&(((IdleTechs_2<1)||(OpenRequests_0_2<1))||(Idles<1)))&&(((IdleTechs_0<1)||(OpenRequests_4_0<1))||(Idles<1)))&&(((IdleTechs_1<1)||(OpenRequests_0_1<1))||(Idles<1)))&&(((IdleTechs_0<1)||(OpenRequests_2_0<1))||(Idles<1)))&&(((IdleTechs_0<1)||(OpenRequests_1_0<1))||(Idles<1)))"))))))
Formula 0 simplified : !(F"((((((((Finished_0>=1)||(Finished_1>=1))||(Finished_6>=1))||(Finished_7>=1))||(Finished_2>=1))||(Finished_3>=1))||(Finished_4>=1))||(Finished_5>=1))" | G(X"((((((((((((((((((((((((((((((((Assigned_5_1>=1)||(Assigned_5_0>=1))||(Assigned_5_3>=1))||(Assigned_5_2>=1))||(Assigned_6_1>=1))||(Assigned_6_0>=1))||(Assigned_6_3>=1))||(Assigned_6_2>=1))||(Assigned_7_1>=1))||(Assigned_7_0>=1))||(Assigned_7_3>=1))||(Assigned_7_2>=1))||(Assigned_0_1>=1))||(Assigned_0_0>=1))||(Assigned_0_3>=1))||(Assigned_0_2>=1))||(Assigned_1_1>=1))||(Assigned_1_0>=1))||(Assigned_1_3>=1))||(Assigned_1_2>=1))||(Assigned_2_1>=1))||(Assigned_2_0>=1))||(Assigned_2_3>=1))||(Assigned_2_2>=1))||(Assigned_3_1>=1))||(Assigned_3_0>=1))||(Assigned_3_3>=1))||(Assigned_3_2>=1))||(Assigned_4_1>=1))||(Assigned_4_0>=1))||(Assigned_4_3>=1))||(Assigned_4_2>=1))" | F"((((((((((((((((((((((((((((((((((IdleTechs_0<1)||(OpenRequests_0_0<1))||(Idles<1))&&(((IdleTechs_2<1)||(OpenRequests_3_2<1))||(Idles<1)))&&(((IdleTechs_1<1)||(OpenRequests_5_1<1))||(Idles<1)))&&(((IdleTechs_3<1)||(OpenRequests_7_3<1))||(Idles<1)))&&(((IdleTechs_0<1)||(OpenRequests_5_0<1))||(Idles<1)))&&(((IdleTechs_1<1)||(OpenRequests_4_1<1))||(Idles<1)))&&(((IdleTechs_0<1)||(OpenRequests_6_0<1))||(Idles<1)))&&(((IdleTechs_2<1)||(OpenRequests_2_2<1))||(Idles<1)))&&(((IdleTechs_0<1)||(OpenRequests_7_0<1))||(Idles<1)))&&(((IdleTechs_3<1)||(OpenRequests_1_3<1))||(Idles<1)))&&(((IdleTechs_1<1)||(OpenRequests_6_1<1))||(Idles<1)))&&(((IdleTechs_2<1)||(OpenRequests_7_2<1))||(Idles<1)))&&(((IdleTechs_3<1)||(OpenRequests_4_3<1))||(Idles<1)))&&(((IdleTechs_2<1)||(OpenRequests_4_2<1))||(Idles<1)))&&(((IdleTechs_3<1)||(OpenRequests_3_3<1))||(Idles<1)))&&(((IdleTechs_1<1)||(OpenRequests_7_1<1))||(Idles<1)))&&(((IdleTechs_2<1)||(OpenRequests_5_2<1))||(Idles<1)))&&(((IdleTechs_3<1)||(OpenRequests_2_3<1))||(Idles<1)))&&(((IdleTechs_0<1)||(OpenRequests_3_0<1))||(Idles<1)))&&(((IdleTechs_1<1)||(OpenRequests_2_1<1))||(Idles<1)))&&(((IdleTechs_2<1)||(OpenRequests_6_2<1))||(Idles<1)))&&(((IdleTechs_3<1)||(OpenRequests_5_3<1))||(Idles<1)))&&(((IdleTechs_3<1)||(OpenRequests_0_3<1))||(Idles<1)))&&(((IdleTechs_1<1)||(OpenRequests_1_1<1))||(Idles<1)))&&(((IdleTechs_2<1)||(OpenRequests_1_2<1))||(Idles<1)))&&(((IdleTechs_3<1)||(OpenRequests_6_3<1))||(Idles<1)))&&(((IdleTechs_1<1)||(OpenRequests_3_1<1))||(Idles<1)))&&(((IdleTechs_2<1)||(OpenRequests_0_2<1))||(Idles<1)))&&(((IdleTechs_0<1)||(OpenRequests_4_0<1))||(Idles<1)))&&(((IdleTechs_1<1)||(OpenRequests_0_1<1))||(Idles<1)))&&(((IdleTechs_0<1)||(OpenRequests_2_0<1))||(Idles<1)))&&(((IdleTechs_0<1)||(OpenRequests_1_0<1))||(Idles<1)))"))
Reverse transition relation is exact ! Faster fixpoint algorithm enabled.
Detected timeout of ITS tools.
[2021-05-20 06:26:52] [INFO ] Flatten gal took : 18 ms
[2021-05-20 06:26:52] [INFO ] Applying decomposition
[2021-05-20 06:26:52] [INFO ] Flatten gal took : 35 ms
Converted graph to binary with : CommandLine [args=[/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.louvain.binaries_1.0.0.202104292328/bin/convert-linux64, -i, /tmp/graph8937293266237424522.txt, -o, /tmp/graph8937293266237424522.bin, -w, /tmp/graph8937293266237424522.weights], workingDir=null]
Built communities with : CommandLine [args=[/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.louvain.binaries_1.0.0.202104292328/bin/louvain-linux64, /tmp/graph8937293266237424522.bin, -l, -1, -v, -w, /tmp/graph8937293266237424522.weights, -q, 0, -e, 0.001], workingDir=null]
[2021-05-20 06:26:52] [INFO ] Decomposing Gal with order
[2021-05-20 06:26:52] [INFO ] Rewriting arrays to variables to allow decomposition.
[2021-05-20 06:26:52] [INFO ] Removed a total of 540 redundant transitions.
[2021-05-20 06:26:52] [INFO ] Flatten gal took : 47 ms
[2021-05-20 06:26:52] [INFO ] Fuse similar labels procedure discarded/fused a total of 76 labels/synchronizations in 21 ms.
[2021-05-20 06:26:52] [INFO ] Time to serialize gal into /tmp/LTL6771319687980552467.gal : 14 ms
[2021-05-20 06:26:52] [INFO ] Time to serialize properties into /tmp/LTL15093373500939822712.ltl : 0 ms
Invoking ITS tools like this :CommandLine [args=[/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.202104292328/bin/its-ltl-linux64, --gc-threshold, 2000000, -i, /tmp/LTL6771319687980552467.gal, -t, CGAL, -LTL, /tmp/LTL15093373500939822712.ltl, -c, -stutter-deadlock], workingDir=/home/mcc/execution]

its-ltl command run as :

/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.202104292328/bin/its-ltl-linux64 --gc-threshold 2000000 -i /tmp/LTL6771319687980552467.gal -t CGAL -LTL /tmp/LTL15093373500939822712.ltl -c -stutter-deadlock
Read 1 LTL properties
Checking formula 0 : !(((F("((((((((i0.u57.Finished_0>=1)||(i3.u0.Finished_1>=1))||(i4.u5.Finished_6>=1))||(i5.i1.u54.Finished_7>=1))||(i2.i1.u1.Finished_2>=1))||(i8.i1.u2.Finished_3>=1))||(i6.u3.Finished_4>=1))||(i7.u4.Finished_5>=1))"))||(G((X("((((((((((((((((((((((((((((((((i7.u35.Assigned_5_1>=1)||(i7.u34.Assigned_5_0>=1))||(i7.u17.Assigned_5_3>=1))||(i7.u16.Assigned_5_2>=1))||(i4.u19.Assigned_6_1>=1))||(i4.u18.Assigned_6_0>=1))||(i4.u21.Assigned_6_3>=1))||(i4.u20.Assigned_6_2>=1))||(i5.i1.u23.Assigned_7_1>=1))||(i5.i0.u22.Assigned_7_0>=1))||(i5.i1.u37.Assigned_7_3>=1))||(i5.i1.u36.Assigned_7_2>=1))||(i0.u24.Assigned_0_1>=1))||(i0.u6.Assigned_0_0>=1))||(i0.u8.Assigned_0_3>=1))||(i0.u7.Assigned_0_2>=1))||(i3.u9.Assigned_1_1>=1))||(i3.u25.Assigned_1_0>=1))||(i3.u26.Assigned_1_3>=1))||(i3.u10.Assigned_1_2>=1))||(i2.i0.u28.Assigned_2_1>=1))||(i2.i0.u27.Assigned_2_0>=1))||(i2.i0.u30.Assigned_2_3>=1))||(i2.i0.u29.Assigned_2_2>=1))||(i8.i0.u11.Assigned_3_1>=1))||(i8.i1.u31.Assigned_3_0>=1))||(i1.u13.Assigned_3_3>=1))||(i8.i2.u12.Assigned_3_2>=1))||(i6.u32.Assigned_4_1>=1))||(i6.u14.Assigned_4_0>=1))||(i6.u15.Assigned_4_3>=1))||(i6.u33.Assigned_4_2>=1))"))||(F("((((((((((((((((((((((((((((((((((i5.i0.u22.IdleTechs_0<1)||(i0.u6.OpenRequests_0_0<1))||(i2.i0.u29.Idles<1))&&(((i8.i2.u12.IdleTechs_2<1)||(i8.i2.u12.OpenRequests_3_2<1))||(i2.i0.u29.Idles<1)))&&(((i8.i0.u11.IdleTechs_1<1)||(i7.u35.OpenRequests_5_1<1))||(i2.i0.u29.Idles<1)))&&(((i1.u13.IdleTechs_3<1)||(i5.i1.u37.OpenRequests_7_3<1))||(i2.i0.u29.Idles<1)))&&(((i5.i0.u22.IdleTechs_0<1)||(i7.u34.OpenRequests_5_0<1))||(i2.i0.u29.Idles<1)))&&(((i8.i0.u11.IdleTechs_1<1)||(i6.u32.OpenRequests_4_1<1))||(i2.i0.u29.Idles<1)))&&(((i5.i0.u22.IdleTechs_0<1)||(i4.u18.OpenRequests_6_0<1))||(i2.i0.u29.Idles<1)))&&(((i8.i2.u12.IdleTechs_2<1)||(i2.i0.u29.OpenRequests_2_2<1))||(i2.i0.u29.Idles<1)))&&(((i5.i0.u22.IdleTechs_0<1)||(i5.i0.u22.OpenRequests_7_0<1))||(i2.i0.u29.Idles<1)))&&(((i1.u13.IdleTechs_3<1)||(i3.u26.OpenRequests_1_3<1))||(i2.i0.u29.Idles<1)))&&(((i8.i0.u11.IdleTechs_1<1)||(i4.u19.OpenRequests_6_1<1))||(i2.i0.u29.Idles<1)))&&(((i8.i2.u12.IdleTechs_2<1)||(i5.i1.u36.OpenRequests_7_2<1))||(i2.i0.u29.Idles<1)))&&(((i1.u13.IdleTechs_3<1)||(i6.u15.OpenRequests_4_3<1))||(i2.i0.u29.Idles<1)))&&(((i8.i2.u12.IdleTechs_2<1)||(i6.u33.OpenRequests_4_2<1))||(i2.i0.u29.Idles<1)))&&(((i1.u13.IdleTechs_3<1)||(i1.u13.OpenRequests_3_3<1))||(i2.i0.u29.Idles<1)))&&(((i8.i0.u11.IdleTechs_1<1)||(i5.i1.u23.OpenRequests_7_1<1))||(i2.i0.u29.Idles<1)))&&(((i8.i2.u12.IdleTechs_2<1)||(i7.u16.OpenRequests_5_2<1))||(i2.i0.u29.Idles<1)))&&(((i1.u13.IdleTechs_3<1)||(i2.i0.u30.OpenRequests_2_3<1))||(i2.i0.u29.Idles<1)))&&(((i5.i0.u22.IdleTechs_0<1)||(i8.i1.u31.OpenRequests_3_0<1))||(i2.i0.u29.Idles<1)))&&(((i8.i0.u11.IdleTechs_1<1)||(i2.i0.u28.OpenRequests_2_1<1))||(i2.i0.u29.Idles<1)))&&(((i8.i2.u12.IdleTechs_2<1)||(i4.u20.OpenRequests_6_2<1))||(i2.i0.u29.Idles<1)))&&(((i1.u13.IdleTechs_3<1)||(i7.u17.OpenRequests_5_3<1))||(i2.i0.u29.Idles<1)))&&(((i1.u13.IdleTechs_3<1)||(i0.u8.OpenRequests_0_3<1))||(i2.i0.u29.Idles<1)))&&(((i8.i0.u11.IdleTechs_1<1)||(i3.u9.OpenRequests_1_1<1))||(i2.i0.u29.Idles<1)))&&(((i8.i2.u12.IdleTechs_2<1)||(i3.u10.OpenRequests_1_2<1))||(i2.i0.u29.Idles<1)))&&(((i1.u13.IdleTechs_3<1)||(i4.u21.OpenRequests_6_3<1))||(i2.i0.u29.Idles<1)))&&(((i8.i0.u11.IdleTechs_1<1)||(i8.i0.u11.OpenRequests_3_1<1))||(i2.i0.u29.Idles<1)))&&(((i8.i2.u12.IdleTechs_2<1)||(i0.u7.OpenRequests_0_2<1))||(i2.i0.u29.Idles<1)))&&(((i5.i0.u22.IdleTechs_0<1)||(i6.u14.OpenRequests_4_0<1))||(i2.i0.u29.Idles<1)))&&(((i8.i0.u11.IdleTechs_1<1)||(i0.u24.OpenRequests_0_1<1))||(i2.i0.u29.Idles<1)))&&(((i5.i0.u22.IdleTechs_0<1)||(i2.i0.u27.OpenRequests_2_0<1))||(i2.i0.u29.Idles<1)))&&(((i5.i0.u22.IdleTechs_0<1)||(i3.u25.OpenRequests_1_0<1))||(i2.i0.u29.Idles<1)))"))))))
Formula 0 simplified : !(F"((((((((i0.u57.Finished_0>=1)||(i3.u0.Finished_1>=1))||(i4.u5.Finished_6>=1))||(i5.i1.u54.Finished_7>=1))||(i2.i1.u1.Finished_2>=1))||(i8.i1.u2.Finished_3>=1))||(i6.u3.Finished_4>=1))||(i7.u4.Finished_5>=1))" | G(X"((((((((((((((((((((((((((((((((i7.u35.Assigned_5_1>=1)||(i7.u34.Assigned_5_0>=1))||(i7.u17.Assigned_5_3>=1))||(i7.u16.Assigned_5_2>=1))||(i4.u19.Assigned_6_1>=1))||(i4.u18.Assigned_6_0>=1))||(i4.u21.Assigned_6_3>=1))||(i4.u20.Assigned_6_2>=1))||(i5.i1.u23.Assigned_7_1>=1))||(i5.i0.u22.Assigned_7_0>=1))||(i5.i1.u37.Assigned_7_3>=1))||(i5.i1.u36.Assigned_7_2>=1))||(i0.u24.Assigned_0_1>=1))||(i0.u6.Assigned_0_0>=1))||(i0.u8.Assigned_0_3>=1))||(i0.u7.Assigned_0_2>=1))||(i3.u9.Assigned_1_1>=1))||(i3.u25.Assigned_1_0>=1))||(i3.u26.Assigned_1_3>=1))||(i3.u10.Assigned_1_2>=1))||(i2.i0.u28.Assigned_2_1>=1))||(i2.i0.u27.Assigned_2_0>=1))||(i2.i0.u30.Assigned_2_3>=1))||(i2.i0.u29.Assigned_2_2>=1))||(i8.i0.u11.Assigned_3_1>=1))||(i8.i1.u31.Assigned_3_0>=1))||(i1.u13.Assigned_3_3>=1))||(i8.i2.u12.Assigned_3_2>=1))||(i6.u32.Assigned_4_1>=1))||(i6.u14.Assigned_4_0>=1))||(i6.u15.Assigned_4_3>=1))||(i6.u33.Assigned_4_2>=1))" | F"((((((((((((((((((((((((((((((((((i5.i0.u22.IdleTechs_0<1)||(i0.u6.OpenRequests_0_0<1))||(i2.i0.u29.Idles<1))&&(((i8.i2.u12.IdleTechs_2<1)||(i8.i2.u12.OpenRequests_3_2<1))||(i2.i0.u29.Idles<1)))&&(((i8.i0.u11.IdleTechs_1<1)||(i7.u35.OpenRequests_5_1<1))||(i2.i0.u29.Idles<1)))&&(((i1.u13.IdleTechs_3<1)||(i5.i1.u37.OpenRequests_7_3<1))||(i2.i0.u29.Idles<1)))&&(((i5.i0.u22.IdleTechs_0<1)||(i7.u34.OpenRequests_5_0<1))||(i2.i0.u29.Idles<1)))&&(((i8.i0.u11.IdleTechs_1<1)||(i6.u32.OpenRequests_4_1<1))||(i2.i0.u29.Idles<1)))&&(((i5.i0.u22.IdleTechs_0<1)||(i4.u18.OpenRequests_6_0<1))||(i2.i0.u29.Idles<1)))&&(((i8.i2.u12.IdleTechs_2<1)||(i2.i0.u29.OpenRequests_2_2<1))||(i2.i0.u29.Idles<1)))&&(((i5.i0.u22.IdleTechs_0<1)||(i5.i0.u22.OpenRequests_7_0<1))||(i2.i0.u29.Idles<1)))&&(((i1.u13.IdleTechs_3<1)||(i3.u26.OpenRequests_1_3<1))||(i2.i0.u29.Idles<1)))&&(((i8.i0.u11.IdleTechs_1<1)||(i4.u19.OpenRequests_6_1<1))||(i2.i0.u29.Idles<1)))&&(((i8.i2.u12.IdleTechs_2<1)||(i5.i1.u36.OpenRequests_7_2<1))||(i2.i0.u29.Idles<1)))&&(((i1.u13.IdleTechs_3<1)||(i6.u15.OpenRequests_4_3<1))||(i2.i0.u29.Idles<1)))&&(((i8.i2.u12.IdleTechs_2<1)||(i6.u33.OpenRequests_4_2<1))||(i2.i0.u29.Idles<1)))&&(((i1.u13.IdleTechs_3<1)||(i1.u13.OpenRequests_3_3<1))||(i2.i0.u29.Idles<1)))&&(((i8.i0.u11.IdleTechs_1<1)||(i5.i1.u23.OpenRequests_7_1<1))||(i2.i0.u29.Idles<1)))&&(((i8.i2.u12.IdleTechs_2<1)||(i7.u16.OpenRequests_5_2<1))||(i2.i0.u29.Idles<1)))&&(((i1.u13.IdleTechs_3<1)||(i2.i0.u30.OpenRequests_2_3<1))||(i2.i0.u29.Idles<1)))&&(((i5.i0.u22.IdleTechs_0<1)||(i8.i1.u31.OpenRequests_3_0<1))||(i2.i0.u29.Idles<1)))&&(((i8.i0.u11.IdleTechs_1<1)||(i2.i0.u28.OpenRequests_2_1<1))||(i2.i0.u29.Idles<1)))&&(((i8.i2.u12.IdleTechs_2<1)||(i4.u20.OpenRequests_6_2<1))||(i2.i0.u29.Idles<1)))&&(((i1.u13.IdleTechs_3<1)||(i7.u17.OpenRequests_5_3<1))||(i2.i0.u29.Idles<1)))&&(((i1.u13.IdleTechs_3<1)||(i0.u8.OpenRequests_0_3<1))||(i2.i0.u29.Idles<1)))&&(((i8.i0.u11.IdleTechs_1<1)||(i3.u9.OpenRequests_1_1<1))||(i2.i0.u29.Idles<1)))&&(((i8.i2.u12.IdleTechs_2<1)||(i3.u10.OpenRequests_1_2<1))||(i2.i0.u29.Idles<1)))&&(((i1.u13.IdleTechs_3<1)||(i4.u21.OpenRequests_6_3<1))||(i2.i0.u29.Idles<1)))&&(((i8.i0.u11.IdleTechs_1<1)||(i8.i0.u11.OpenRequests_3_1<1))||(i2.i0.u29.Idles<1)))&&(((i8.i2.u12.IdleTechs_2<1)||(i0.u7.OpenRequests_0_2<1))||(i2.i0.u29.Idles<1)))&&(((i5.i0.u22.IdleTechs_0<1)||(i6.u14.OpenRequests_4_0<1))||(i2.i0.u29.Idles<1)))&&(((i8.i0.u11.IdleTechs_1<1)||(i0.u24.OpenRequests_0_1<1))||(i2.i0.u29.Idles<1)))&&(((i5.i0.u22.IdleTechs_0<1)||(i2.i0.u27.OpenRequests_2_0<1))||(i2.i0.u29.Idles<1)))&&(((i5.i0.u22.IdleTechs_0<1)||(i3.u25.OpenRequests_1_0<1))||(i2.i0.u29.Idles<1)))"))
Reverse transition relation is exact ! Faster fixpoint algorithm enabled.
Detected timeout of ITS tools.
Built C files in :
/tmp/ltsmin13420406125596073040
[2021-05-20 06:27:07] [INFO ] Built C files in 14ms conformant to PINS (ltsmin variant)in folder :/tmp/ltsmin13420406125596073040
Running compilation step : CommandLine [args=[gcc, -c, -I/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.ltsmin.binaries_1.0.0.202104292328/bin/include/, -I., -std=c99, -fPIC, -O2, model.c], workingDir=/tmp/ltsmin13420406125596073040]
WARNING : LTS min runner thread failed on error :java.lang.RuntimeException: Compilation or link of executable timed out.java.util.concurrent.TimeoutException: Subprocess running CommandLine [args=[gcc, -c, -I/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.ltsmin.binaries_1.0.0.202104292328/bin/include/, -I., -std=c99, -fPIC, -O2, model.c], workingDir=/tmp/ltsmin13420406125596073040] killed by timeout after 1 SECONDS
java.lang.RuntimeException: Compilation or link of executable timed out.java.util.concurrent.TimeoutException: Subprocess running CommandLine [args=[gcc, -c, -I/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.ltsmin.binaries_1.0.0.202104292328/bin/include/, -I., -std=c99, -fPIC, -O2, model.c], workingDir=/tmp/ltsmin13420406125596073040] killed by timeout after 1 SECONDS
at fr.lip6.move.gal.application.LTSminRunner$1.run(LTSminRunner.java:79)
at java.base/java.lang.Thread.run(Thread.java:834)
Treatment of property UtilityControlRoom-PT-Z4T4N08-02 finished in 35706 ms.
Running Spot : CommandLine [args=[/home/mcc/BenchKit/bin//..//ltl2tgba, --hoaf=tv, -f, !(G(F(p0)))], workingDir=/home/mcc/execution]
Support contains 8 out of 301 places. Attempting structural reductions.
Starting structural reductions, iteration 0 : 301/301 places, 472/472 transitions.
Drop transitions removed 128 transitions
Trivial Post-agglo rules discarded 128 transitions
Performed 128 trivial Post agglomeration. Transition count delta: 128
Iterating post reduction 0 with 128 rules applied. Total rules applied 128 place count 301 transition count 344
Reduce places removed 128 places and 0 transitions.
Ensure Unique test removed 32 transitions
Reduce isomorphic transitions removed 32 transitions.
Iterating post reduction 1 with 160 rules applied. Total rules applied 288 place count 173 transition count 312
Performed 32 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 2 with 32 Pre rules applied. Total rules applied 288 place count 173 transition count 280
Deduced a syphon composed of 32 places in 1 ms
Reduce places removed 32 places and 0 transitions.
Iterating global reduction 2 with 64 rules applied. Total rules applied 352 place count 141 transition count 280
Discarding 3 places :
Symmetric choice reduction at 2 with 3 rule applications. Total rules 355 place count 138 transition count 184
Iterating global reduction 2 with 3 rules applied. Total rules applied 358 place count 138 transition count 184
Discarding 24 places :
Symmetric choice reduction at 2 with 24 rule applications. Total rules 382 place count 114 transition count 160
Iterating global reduction 2 with 24 rules applied. Total rules applied 406 place count 114 transition count 160
Discarding 24 places :
Symmetric choice reduction at 2 with 24 rule applications. Total rules 430 place count 90 transition count 112
Iterating global reduction 2 with 24 rules applied. Total rules applied 454 place count 90 transition count 112
Discarding 24 places :
Symmetric choice reduction at 2 with 24 rule applications. Total rules 478 place count 66 transition count 88
Iterating global reduction 2 with 24 rules applied. Total rules applied 502 place count 66 transition count 88
Ensure Unique test removed 24 transitions
Reduce isomorphic transitions removed 24 transitions.
Iterating post reduction 2 with 24 rules applied. Total rules applied 526 place count 66 transition count 64
Performed 16 Post agglomeration using F-continuation condition.Transition count delta: 16
Deduced a syphon composed of 16 places in 0 ms
Ensure Unique test removed 1 places
Reduce places removed 17 places and 0 transitions.
Iterating global reduction 3 with 33 rules applied. Total rules applied 559 place count 49 transition count 48
Applied a total of 559 rules in 56 ms. Remains 49 /301 variables (removed 252) and now considering 48/472 (removed 424) transitions.
// Phase 1: matrix 48 rows 49 cols
[2021-05-20 06:27:08] [INFO ] Computed 17 place invariants in 1 ms
[2021-05-20 06:27:08] [INFO ] Implicit Places using invariants in 96 ms returned []
// Phase 1: matrix 48 rows 49 cols
[2021-05-20 06:27:08] [INFO ] Computed 17 place invariants in 0 ms
[2021-05-20 06:27:08] [INFO ] Implicit Places using invariants and state equation in 55 ms returned []
Implicit Place search using SMT with State Equation took 154 ms to find 0 implicit places.
[2021-05-20 06:27:08] [INFO ] Redundant transitions in 0 ms returned []
// Phase 1: matrix 48 rows 49 cols
[2021-05-20 06:27:08] [INFO ] Computed 17 place invariants in 0 ms
[2021-05-20 06:27:08] [INFO ] Dead Transitions using invariants and state equation in 48 ms returned []
Finished structural reductions, in 1 iterations. Remains : 49/301 places, 48/472 transitions.
Stuttering acceptance computed with spot in 47 ms :[(NOT p0), (NOT p0)]
Running random walk in product with property : UtilityControlRoom-PT-Z4T4N08-03 automaton TGBA [mat=[[{ cond=true, acceptance={} source=0 dest: 0}, { cond=(NOT p0), acceptance={} source=0 dest: 1}], [{ cond=(NOT p0), acceptance={0} source=1 dest: 1}]], initial=0, aps=[p0:(AND (LT s28 1) (LT s29 1) (LT s30 1) (LT s31 1) (LT s27 1) (LT s26 1) (LT s25 1) (LT s24 1))], nbAcceptance=1, properties=[trans-labels, explicit-labels, trans-acc, no-univ-branch, stutter-invariant, very-weak, weak, inherently-weak], stateDesc=[null, null][true, true]]
Product exploration explored 100000 steps with 1999 reset in 169 ms.
Stack based approach found an accepted trace after 381 steps with 8 reset with depth 7 and stack size 7 in 1 ms.
FORMULA UtilityControlRoom-PT-Z4T4N08-03 FALSE TECHNIQUES STUTTER_TEST
Treatment of property UtilityControlRoom-PT-Z4T4N08-03 finished in 529 ms.
Running Spot : CommandLine [args=[/home/mcc/BenchKit/bin//..//ltl2tgba, --hoaf=tv, -f, !(F(G(p0)))], workingDir=/home/mcc/execution]
Support contains 8 out of 301 places. Attempting structural reductions.
Starting structural reductions, iteration 0 : 301/301 places, 472/472 transitions.
Drop transitions removed 128 transitions
Trivial Post-agglo rules discarded 128 transitions
Performed 128 trivial Post agglomeration. Transition count delta: 128
Iterating post reduction 0 with 128 rules applied. Total rules applied 128 place count 301 transition count 344
Reduce places removed 128 places and 0 transitions.
Ensure Unique test removed 32 transitions
Reduce isomorphic transitions removed 32 transitions.
Iterating post reduction 1 with 160 rules applied. Total rules applied 288 place count 173 transition count 312
Performed 32 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 2 with 32 Pre rules applied. Total rules applied 288 place count 173 transition count 280
Deduced a syphon composed of 32 places in 0 ms
Reduce places removed 32 places and 0 transitions.
Iterating global reduction 2 with 64 rules applied. Total rules applied 352 place count 141 transition count 280
Discarding 3 places :
Symmetric choice reduction at 2 with 3 rule applications. Total rules 355 place count 138 transition count 184
Iterating global reduction 2 with 3 rules applied. Total rules applied 358 place count 138 transition count 184
Discarding 24 places :
Symmetric choice reduction at 2 with 24 rule applications. Total rules 382 place count 114 transition count 160
Iterating global reduction 2 with 24 rules applied. Total rules applied 406 place count 114 transition count 160
Discarding 24 places :
Symmetric choice reduction at 2 with 24 rule applications. Total rules 430 place count 90 transition count 112
Iterating global reduction 2 with 24 rules applied. Total rules applied 454 place count 90 transition count 112
Discarding 24 places :
Symmetric choice reduction at 2 with 24 rule applications. Total rules 478 place count 66 transition count 88
Iterating global reduction 2 with 24 rules applied. Total rules applied 502 place count 66 transition count 88
Ensure Unique test removed 24 transitions
Reduce isomorphic transitions removed 24 transitions.
Iterating post reduction 2 with 24 rules applied. Total rules applied 526 place count 66 transition count 64
Performed 8 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 3 with 8 Pre rules applied. Total rules applied 526 place count 66 transition count 56
Deduced a syphon composed of 8 places in 0 ms
Reduce places removed 8 places and 0 transitions.
Iterating global reduction 3 with 16 rules applied. Total rules applied 542 place count 58 transition count 56
Performed 16 Post agglomeration using F-continuation condition.Transition count delta: 16
Deduced a syphon composed of 16 places in 0 ms
Ensure Unique test removed 1 places
Reduce places removed 17 places and 0 transitions.
Iterating global reduction 3 with 33 rules applied. Total rules applied 575 place count 41 transition count 40
Applied a total of 575 rules in 31 ms. Remains 41 /301 variables (removed 260) and now considering 40/472 (removed 432) transitions.
// Phase 1: matrix 40 rows 41 cols
[2021-05-20 06:27:09] [INFO ] Computed 17 place invariants in 0 ms
[2021-05-20 06:27:09] [INFO ] Implicit Places using invariants in 35 ms returned []
// Phase 1: matrix 40 rows 41 cols
[2021-05-20 06:27:09] [INFO ] Computed 17 place invariants in 0 ms
[2021-05-20 06:27:09] [INFO ] Implicit Places using invariants and state equation in 31 ms returned []
Implicit Place search using SMT with State Equation took 71 ms to find 0 implicit places.
[2021-05-20 06:27:09] [INFO ] Redundant transitions in 0 ms returned []
// Phase 1: matrix 40 rows 41 cols
[2021-05-20 06:27:09] [INFO ] Computed 17 place invariants in 1 ms
[2021-05-20 06:27:09] [INFO ] Dead Transitions using invariants and state equation in 24 ms returned []
Finished structural reductions, in 1 iterations. Remains : 41/301 places, 40/472 transitions.
Stuttering acceptance computed with spot in 28 ms :[(NOT p0)]
Running random walk in product with property : UtilityControlRoom-PT-Z4T4N08-04 automaton TGBA [mat=[[{ cond=(NOT p0), acceptance={0} source=0 dest: 0}, { cond=p0, acceptance={} source=0 dest: 0}]], initial=0, aps=[p0:(OR (GEQ s31 1) (GEQ s32 1) (GEQ s27 1) (GEQ s28 1) (GEQ s29 1) (GEQ s30 1) (GEQ s25 1) (GEQ s26 1))], nbAcceptance=1, properties=[trans-labels, explicit-labels, trans-acc, complete, deterministic, no-univ-branch, unambiguous, semi-deterministic, stutter-invariant], stateDesc=[null][true]]
Product exploration explored 100000 steps with 0 reset in 196 ms.
Stack based approach found an accepted trace after 295 steps with 0 reset with depth 296 and stack size 296 in 1 ms.
FORMULA UtilityControlRoom-PT-Z4T4N08-04 FALSE TECHNIQUES STUTTER_TEST
Treatment of property UtilityControlRoom-PT-Z4T4N08-04 finished in 367 ms.
Running Spot : CommandLine [args=[/home/mcc/BenchKit/bin//..//ltl2tgba, --hoaf=tv, -f, !(G(!p0))], workingDir=/home/mcc/execution]
Support contains 32 out of 301 places. Attempting structural reductions.
Starting structural reductions, iteration 0 : 301/301 places, 472/472 transitions.
Discarding 96 places :
Symmetric choice reduction at 0 with 96 rule applications. Total rules 96 place count 205 transition count 376
Iterating global reduction 0 with 96 rules applied. Total rules applied 192 place count 205 transition count 376
Performed 48 Post agglomeration using F-continuation condition.Transition count delta: 48
Deduced a syphon composed of 48 places in 0 ms
Reduce places removed 48 places and 0 transitions.
Iterating global reduction 0 with 96 rules applied. Total rules applied 288 place count 157 transition count 328
Applied a total of 288 rules in 27 ms. Remains 157 /301 variables (removed 144) and now considering 328/472 (removed 144) transitions.
// Phase 1: matrix 328 rows 157 cols
[2021-05-20 06:27:09] [INFO ] Computed 18 place invariants in 2 ms
[2021-05-20 06:27:09] [INFO ] Implicit Places using invariants in 102 ms returned [140]
Discarding 1 places :
Implicit Place search using SMT only with invariants took 103 ms to find 1 implicit places.
[2021-05-20 06:27:09] [INFO ] Redundant transitions in 1 ms returned []
// Phase 1: matrix 328 rows 156 cols
[2021-05-20 06:27:09] [INFO ] Computed 17 place invariants in 3 ms
[2021-05-20 06:27:09] [INFO ] Dead Transitions using invariants and state equation in 149 ms returned []
Starting structural reductions, iteration 1 : 156/301 places, 328/472 transitions.
Applied a total of 0 rules in 7 ms. Remains 156 /156 variables (removed 0) and now considering 328/328 (removed 0) transitions.
[2021-05-20 06:27:09] [INFO ] Redundant transitions in 1 ms returned []
// Phase 1: matrix 328 rows 156 cols
[2021-05-20 06:27:09] [INFO ] Computed 17 place invariants in 1 ms
[2021-05-20 06:27:09] [INFO ] Dead Transitions using invariants and state equation in 129 ms returned []
Finished structural reductions, in 2 iterations. Remains : 156/301 places, 328/472 transitions.
Stuttering acceptance computed with spot in 35 ms :[true, p0]
Running random walk in product with property : UtilityControlRoom-PT-Z4T4N08-06 automaton TGBA [mat=[[{ cond=true, acceptance={0} source=0 dest: 0}], [{ cond=p0, acceptance={} source=1 dest: 0}, { cond=(NOT p0), acceptance={} source=1 dest: 1}]], initial=1, aps=[p0:(OR (GEQ s65 1) (GEQ s64 1) (GEQ s67 1) (GEQ s66 1) (GEQ s69 1) (GEQ s68 1) (GEQ s71 1) (GEQ s70 1) (GEQ s73 1) (GEQ s72 1) (GEQ s75 1) (GEQ s74 1) (GEQ s45 1) (GEQ s44 1) (GEQ s47 1) (GEQ s46 1) (GEQ s49 1) (GEQ s48 1) (GEQ s51 1) (GEQ s50 1) (GEQ s53 1) (GEQ s52 1) (GEQ s55 1) (GEQ s54 1) (GEQ s57 1) (GEQ s56 1) (GEQ s59 1) (GEQ s58 1) (GEQ s61 1) (GEQ s60 1) (GEQ s63 1) (GEQ s62 1))], nbAcceptance=1, properties=[trans-labels, explicit-labels, trans-acc, complete, deterministic, no-univ-branch, unambiguous, semi-deterministic, stutter-invariant, terminal, very-weak, weak, inherently-weak], stateDesc=[null, null][true, true]]
Entered a terminal (fully accepting) state of product in 4 steps with 0 reset in 0 ms.
FORMULA UtilityControlRoom-PT-Z4T4N08-06 FALSE TECHNIQUES STUTTER_TEST
Treatment of property UtilityControlRoom-PT-Z4T4N08-06 finished in 479 ms.
Running Spot : CommandLine [args=[/home/mcc/BenchKit/bin//..//ltl2tgba, --hoaf=tv, -f, !(X((F(p1)||p0)))], workingDir=/home/mcc/execution]
Support contains 45 out of 301 places. Attempting structural reductions.
Starting structural reductions, iteration 0 : 301/301 places, 472/472 transitions.
Discarding 96 places :
Symmetric choice reduction at 0 with 96 rule applications. Total rules 96 place count 205 transition count 376
Iterating global reduction 0 with 96 rules applied. Total rules applied 192 place count 205 transition count 376
Applied a total of 192 rules in 10 ms. Remains 205 /301 variables (removed 96) and now considering 376/472 (removed 96) transitions.
// Phase 1: matrix 376 rows 205 cols
[2021-05-20 06:27:09] [INFO ] Computed 18 place invariants in 1 ms
[2021-05-20 06:27:09] [INFO ] Implicit Places using invariants in 41 ms returned []
// Phase 1: matrix 376 rows 205 cols
[2021-05-20 06:27:09] [INFO ] Computed 18 place invariants in 3 ms
[2021-05-20 06:27:10] [INFO ] Implicit Places using invariants and state equation in 106 ms returned []
Implicit Place search using SMT with State Equation took 149 ms to find 0 implicit places.
// Phase 1: matrix 376 rows 205 cols
[2021-05-20 06:27:10] [INFO ] Computed 18 place invariants in 2 ms
[2021-05-20 06:27:10] [INFO ] Dead Transitions using invariants and state equation in 188 ms returned []
Finished structural reductions, in 1 iterations. Remains : 205/301 places, 376/472 transitions.
Stuttering acceptance computed with spot in 76 ms :[(AND (NOT p1) (NOT p0)), (NOT p1), (AND (NOT p1) (NOT p0))]
Running random walk in product with property : UtilityControlRoom-PT-Z4T4N08-07 automaton TGBA [mat=[[{ cond=true, acceptance={} source=0 dest: 2}], [{ cond=(NOT p1), acceptance={0} source=1 dest: 1}], [{ cond=(AND (NOT p0) (NOT p1)), acceptance={} source=2 dest: 1}]], initial=0, aps=[p1:(AND (OR (LT s1 1) (LT s19 1) (LT s148 1)) (OR (LT s3 1) (LT s33 1) (LT s148 1)) (OR (LT s3 1) (LT s13 1) (LT s148 1)) (OR (LT s2 1) (LT s25 1) (LT s148 1)) (OR (LT s2 1) (LT s16 1) (LT s148 1)) (OR (LT s3 1) (LT s22 1) (LT s148 1)) (OR (LT s0 1) (LT s13 1) (LT s148 1)) (OR (LT s0 1) (LT s40 1) (LT s148 1)) (OR (LT s3 1) (LT s24 1) (LT s148 1)) (OR (LT s1 1) (LT s37 1) (LT s148 1)) (OR (LT s3 1) (LT s31 1) (LT s148 1)) (OR (LT s0 1) (LT s22 1) (LT s148 1)) (OR (LT s1 1) (LT s28 1) (LT s148 1)) (OR (LT s0 1) (LT s31 1) (LT s148 1)) (OR (LT s2 1) (LT s34 1) (LT s148 1)) (OR (LT s3 1) (LT s40 1) (LT s148 1)) (OR (LT s0 1) (LT s24 1) (LT s148 1)) (OR (LT s1 1) (LT s21 1) (LT s148 1)) (OR (LT s2 1) (LT s38 1) (LT s148 1)) (OR (LT s3 1) (LT s35 1) (LT s148 1)) (OR (LT s2 1) (LT s43 1) (LT s148 1)) (OR (LT s3 1) (LT s15 1) (LT s148 1)) (OR (LT s1 1) (LT s12 1) (LT s148 1)) (OR (LT s3 1) (LT s26 1) (LT s148 1)) (OR (LT s2 1) (LT s18 1) (LT s148 1)) (OR (LT s2 1) (LT s29 1) (LT s148 1)) (OR (LT s0 1) (LT s15 1) (LT s148 1)) (OR (LT s2 1) (LT s27 1) (LT s148 1)) (OR (LT s1 1) (LT s30 1) (LT s148 1)) (OR (LT s3 1) (LT s17 1) (LT s148 1)) (OR (LT s0 1) (LT s42 1) (LT s148 1)) (OR (LT s1 1) (LT s39 1) (LT s148 1)) (OR (LT s2 1) (LT s36 1) (LT s148 1)) (OR (LT s3 1) (LT s42 1) (LT s148 1)) (OR (LT s0 1) (LT s33 1) (LT s148 1)) (OR (LT s3 1) (LT s28 1) (LT s148 1)) (OR (LT s2 1) (LT s21 1) (LT s148 1)) (OR (LT s1 1) (LT s14 1) (LT s148 1)) (OR (LT s1 1) (LT s23 1) (LT s148 1)) (OR (LT s1 1) (LT s34 1) (LT s148 1)) (OR (LT s3 1) (LT s37 1) (LT s148 1)) (OR (LT s0 1) (LT s36 1) (LT s148 1)) (OR (LT s2 1) (LT s12 1) (LT s148 1)) (OR (LT s0 1) (LT s18 1) (LT s148 1)) (OR (LT s2 1) (LT s39 1) (LT s148 1)) (OR (LT s3 1) (LT s19 1) (LT s148 1)) (OR (LT s1 1) (LT s32 1) (LT s148 1)) (OR (LT s0 1) (LT s27 1) (LT s148 1)) (OR (LT s2 1) (LT s30 1) (LT s148 1)) (OR (LT s1 1) (LT s41 1) (LT s148 1)) (OR (LT s1 1) (LT s36 1) (LT s148 1)) (OR (LT s0 1) (LT s29 1) (LT s148 1)) (OR (LT s1 1) (LT s16 1) (LT s148 1)) (OR (LT s3 1) (LT s30 1) (LT s148 1)) (OR (LT s2 1) (LT s23 1) (LT s148 1)) (OR (LT s0 1) (LT s38 1) (LT s148 1)) (OR (LT s1 1) (LT s27 1) (LT s148 1)) (OR (LT s3 1) (LT s39 1) (LT s148 1)) (OR (LT s1 1) (LT s25 1) (LT s148 1)) (OR (LT s2 1) (LT s14 1) (LT s148 1)) (OR (LT s3 1) (LT s12 1) (LT s148 1)) (OR (LT s2 1) (LT s41 1) (LT s148 1)) (OR (LT s3 1) (LT s21 1) (LT s148 1)) (OR (LT s1 1) (LT s18 1) (LT s148 1)) (OR (LT s0 1) (LT s20 1) (LT s148 1)) (OR (LT s1 1) (LT s43 1) (LT s148 1)) (OR (LT s2 1) (LT s32 1) (LT s148 1)) (OR (LT s0 1) (LT s12 1) (LT s148 1)) (OR (LT s2 1) (LT s26 1) (LT s148 1)) (OR (LT s0 1) (LT s41 1) (LT s148 1)) (OR (LT s0 1) (LT s21 1) (LT s148 1)) (OR (LT s3 1) (LT s43 1) (LT s148 1)) (OR (LT s0 1) (LT s32 1) (LT s148 1)) (OR (LT s1 1) (LT s29 1) (LT s148 1)) (OR (LT s2 1) (LT s35 1) (LT s148 1)) (OR (LT s1 1) (LT s38 1) (LT s148 1)) (OR (LT s2 1) (LT s17 1) (LT s148 1)) (OR (LT s0 1) (LT s30 1) (LT s148 1)) (OR (LT s1 1) (LT s20 1) (LT s148 1)) (OR (LT s0 1) (LT s23 1) (LT s148 1)) (OR (LT s3 1) (LT s14 1) (LT s148 1)) (OR (LT s3 1) (LT s32 1) (LT s148 1)) (OR (LT s0 1) (LT s14 1) (LT s148 1)) (OR (LT s3 1) (LT s23 1) (LT s148 1)) (OR (LT s1 1) (LT s31 1) (LT s148 1)) (OR (LT s2 1) (LT s28 1) (LT s148 1)) (OR (LT s0 1) (LT s43 1) (LT s148 1)) (OR (LT s3 1) (LT s16 1) (LT s148 1)) (OR (LT s1 1) (LT s40 1) (LT s148 1)) (OR (LT s3 1) (LT s41 1) (LT s148 1)) (OR (LT s0 1) (LT s34 1) (LT s148 1)) (OR (LT s3 1) (LT s34 1) (LT s148 1)) (OR (LT s2 1) (LT s37 1) (LT s148 1)) (OR (LT s1 1) (LT s13 1) (LT s148 1)) (OR (LT s0 1) (LT s25 1) (LT s148 1)) (OR (LT s2 1) (LT s19 1) (LT s148 1)) (OR (LT s1 1) (LT s22 1) (LT s148 1)) (OR (LT s3 1) (LT s25 1) (LT s148 1)) (OR (LT s0 1) (LT s16 1) (LT s148 1)) (OR (LT s3 1) (LT s18 1) (LT s148 1)) (OR (LT s2 1) (LT s40 1) (LT s148 1)) (OR (LT s0 1) (LT s26 1) (LT s148 1)) (OR (LT s1 1) (LT s33 1) (LT s148 1)) (OR (LT s2 1) (LT s20 1) (LT s148 1)) (OR (LT s0 1) (LT s17 1) (LT s148 1)) (OR (LT s2 1) (LT s31 1) (LT s148 1)) (OR (LT s1 1) (LT s42 1) (LT s148 1)) (OR (LT s0 1) (LT s35 1) (LT s148 1)) (OR (LT s2 1) (LT s22 1) (LT s148 1)) (OR (LT s3 1) (LT s36 1) (LT s148 1)) (OR (LT s2 1) (LT s42 1) (LT s148 1)) (OR (LT s1 1) (LT s15 1) (LT s148 1)) (OR (LT s3 1) (LT s27 1) (LT s148 1)) (OR (LT s2 1) (LT s13 1) (LT s148 1)) (OR (LT s1 1) (LT s24 1) (LT s148 1)) (OR (LT s2 1) (LT s33 1) (LT s148 1)) (OR (LT s1 1) (LT s26 1) (LT s148 1)) (OR (LT s0 1) (LT s19 1) (LT s148 1)) (OR (LT s0 1) (LT s39 1) (LT s148 1)) (OR (LT s1 1) (LT s17 1) (LT s148 1)) (OR (LT s3 1) (LT s20 1) (LT s148 1)) (OR (LT s3 1) (LT s29 1) (LT s148 1)) (OR (LT s0 1) (LT s28 1) (LT s148 1)) (OR (LT s1 1) (LT s35 1) (LT s148 1)) (OR (LT s2 1) (LT s24 1) (LT s148 1)) (OR (LT s3 1) (LT s38 1) (LT s148 1)) (OR (LT s0 1) (LT s37 1) (LT s148 1)) (OR (LT s2 1) (LT s15 1) (LT s148 1))), p0:(OR (GEQ s163 1) (GEQ s164 1) (GEQ s159 1) (GEQ s160 1) (GEQ s161 1) (GEQ s162 1) (GEQ s157 1) (GEQ s158 1))], nbAcceptance=1, properties=[trans-labels, explicit-labels, trans-acc, deterministic, no-univ-branch, unambiguous, semi-deterministic, very-weak, weak, inherently-weak], stateDesc=[null, null, null][false, false, false]]
Product exploration explored 100000 steps with 50000 reset in 201 ms.
Product exploration explored 100000 steps with 50000 reset in 221 ms.
Knowledge obtained : [p1, (NOT p0)]
Stuttering acceptance computed with spot in 69 ms :[(AND (NOT p1) (NOT p0)), (NOT p1), (AND (NOT p1) (NOT p0))]
Product exploration explored 100000 steps with 50000 reset in 206 ms.
Product exploration explored 100000 steps with 50000 reset in 219 ms.
Applying partial POR strategy [false, true, true]
Stuttering acceptance computed with spot in 66 ms :[(AND (NOT p1) (NOT p0)), (NOT p1), (AND (NOT p1) (NOT p0))]
Support contains 45 out of 205 places. Attempting structural reductions.
Property had overlarge support with respect to TGBA, discarding it for now.
Starting structural reductions, iteration 0 : 205/205 places, 376/376 transitions.
Performed 32 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 0 with 32 Pre rules applied. Total rules applied 0 place count 205 transition count 408
Deduced a syphon composed of 32 places in 0 ms
Iterating global reduction 0 with 32 rules applied. Total rules applied 32 place count 205 transition count 408
Performed 32 Post agglomeration using F-continuation condition.Transition count delta: 0
Deduced a syphon composed of 64 places in 1 ms
Iterating global reduction 0 with 32 rules applied. Total rules applied 64 place count 205 transition count 408
Ensure Unique test removed 32 transitions
Reduce isomorphic transitions removed 32 transitions.
Iterating post reduction 0 with 32 rules applied. Total rules applied 96 place count 205 transition count 376
Deduced a syphon composed of 64 places in 0 ms
Applied a total of 96 rules in 16 ms. Remains 205 /205 variables (removed 0) and now considering 376/376 (removed 0) transitions.
[2021-05-20 06:27:11] [INFO ] Redundant transitions in 1 ms returned []
// Phase 1: matrix 376 rows 205 cols
[2021-05-20 06:27:11] [INFO ] Computed 18 place invariants in 2 ms
[2021-05-20 06:27:11] [INFO ] Dead Transitions using invariants and state equation in 151 ms returned []
Finished structural reductions, in 1 iterations. Remains : 205/205 places, 376/376 transitions.
Product exploration explored 100000 steps with 50000 reset in 1569 ms.
Product exploration explored 100000 steps with 50000 reset in 1568 ms.
[2021-05-20 06:27:14] [INFO ] Flatten gal took : 16 ms
[2021-05-20 06:27:14] [INFO ] Flatten gal took : 15 ms
[2021-05-20 06:27:14] [INFO ] Time to serialize gal into /tmp/LTL4694971951998492639.gal : 2 ms
[2021-05-20 06:27:14] [INFO ] Time to serialize properties into /tmp/LTL2164563244125560717.ltl : 1 ms
Invoking ITS tools like this :CommandLine [args=[/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.202104292328/bin/its-ltl-linux64, --gc-threshold, 2000000, -i, /tmp/LTL4694971951998492639.gal, -t, CGAL, -LTL, /tmp/LTL2164563244125560717.ltl, -c, -stutter-deadlock, --gen-order, FOLLOW], workingDir=/home/mcc/execution]

its-ltl command run as :

/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.202104292328/bin/its-ltl-linux64 --gc-threshold 2000000 -i /tmp/LTL4694971951998492639.gal -t CGAL -LTL /tmp/LTL2164563244125560717.ltl -c -stutter-deadlock --gen-order FOLLOW
Read 1 LTL properties
Checking formula 0 : !((X(("((((((((ClientsWaiting_6>=1)||(ClientsWaiting_7>=1))||(ClientsWaiting_2>=1))||(ClientsWaiting_3>=1))||(ClientsWaiting_4>=1))||(ClientsWaiting_5>=1))||(ClientsWaiting_0>=1))||(ClientsWaiting_1>=1))")||(F("((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((IdleTechs_1<1)||(OpenRequests_1_3<1))||(Idles<1))&&(((IdleTechs_3<1)||(OpenRequests_5_1<1))||(Idles<1)))&&(((IdleTechs_3<1)||(OpenRequests_0_1<1))||(Idles<1)))&&(((IdleTechs_2<1)||(OpenRequests_3_1<1))||(Idles<1)))&&(((IdleTechs_2<1)||(OpenRequests_1_0<1))||(Idles<1)))&&(((IdleTechs_3<1)||(OpenRequests_2_2<1))||(Idles<1)))&&(((IdleTechs_0<1)||(OpenRequests_0_1<1))||(Idles<1)))&&(((IdleTechs_0<1)||(OpenRequests_7_0<1))||(Idles<1)))&&(((IdleTechs_3<1)||(OpenRequests_3_0<1))||(Idles<1)))&&(((IdleTechs_1<1)||(OpenRequests_6_1<1))||(Idles<1)))&&(((IdleTechs_3<1)||(OpenRequests_4_3<1))||(Idles<1)))&&(((IdleTechs_0<1)||(OpenRequests_2_2<1))||(Idles<1)))&&(((IdleTechs_1<1)||(OpenRequests_4_0<1))||(Idles<1)))&&(((IdleTechs_0<1)||(OpenRequests_4_3<1))||(Idles<1)))&&(((IdleTechs_2<1)||(OpenRequests_5_2<1))||(Idles<1)))&&(((IdleTechs_3<1)||(OpenRequests_7_0<1))||(Idles<1)))&&(((IdleTechs_0<1)||(OpenRequests_3_0<1))||(Idles<1)))&&(((IdleTechs_1<1)||(OpenRequests_2_1<1))||(Idles<1)))&&(((IdleTechs_2<1)||(OpenRequests_6_2<1))||(Idles<1)))&&(((IdleTechs_3<1)||(OpenRequests_5_3<1))||(Idles<1)))&&(((IdleTechs_2<1)||(OpenRequests_7_3<1))||(Idles<1)))&&(((IdleTechs_3<1)||(OpenRequests_0_3<1))||(Idles<1)))&&(((IdleTechs_1<1)||(OpenRequests_0_0<1))||(Idles<1)))&&(((IdleTechs_3<1)||(OpenRequests_3_2<1))||(Idles<1)))&&(((IdleTechs_2<1)||(OpenRequests_1_2<1))||(Idles<1)))&&(((IdleTechs_2<1)||(OpenRequests_4_1<1))||(Idles<1)))&&(((IdleTechs_0<1)||(OpenRequests_0_3<1))||(Idles<1)))&&(((IdleTechs_2<1)||(OpenRequests_3_3<1))||(Idles<1)))&&(((IdleTechs_1<1)||(OpenRequests_4_2<1))||(Idles<1)))&&(((IdleTechs_3<1)||(OpenRequests_1_1<1))||(Idles<1)))&&(((IdleTechs_0<1)||(OpenRequests_7_2<1))||(Idles<1)))&&(((IdleTechs_1<1)||(OpenRequests_6_3<1))||(Idles<1)))&&(((IdleTechs_2<1)||(OpenRequests_6_0<1))||(Idles<1)))&&(((IdleTechs_3<1)||(OpenRequests_7_2<1))||(Idles<1)))&&(((IdleTechs_0<1)||(OpenRequests_5_1<1))||(Idles<1)))&&(((IdleTechs_3<1)||(OpenRequests_4_0<1))||(Idles<1)))&&(((IdleTechs_2<1)||(OpenRequests_2_1<1))||(Idles<1)))&&(((IdleTechs_1<1)||(OpenRequests_0_2<1))||(Idles<1)))&&(((IdleTechs_1<1)||(OpenRequests_2_3<1))||(Idles<1)))&&(((IdleTechs_1<1)||(OpenRequests_5_2<1))||(Idles<1)))&&(((IdleTechs_3<1)||(OpenRequests_6_1<1))||(Idles<1)))&&(((IdleTechs_0<1)||(OpenRequests_6_0<1))||(Idles<1)))&&(((IdleTechs_2<1)||(OpenRequests_0_0<1))||(Idles<1)))&&(((IdleTechs_0<1)||(OpenRequests_1_2<1))||(Idles<1)))&&(((IdleTechs_2<1)||(OpenRequests_6_3<1))||(Idles<1)))&&(((IdleTechs_3<1)||(OpenRequests_1_3<1))||(Idles<1)))&&(((IdleTechs_1<1)||(OpenRequests_5_0<1))||(Idles<1)))&&(((IdleTechs_0<1)||(OpenRequests_3_3<1))||(Idles<1)))&&(((IdleTechs_2<1)||(OpenRequests_4_2<1))||(Idles<1)))&&(((IdleTechs_1<1)||(OpenRequests_7_1<1))||(Idles<1)))&&(((IdleTechs_1<1)||(OpenRequests_6_0<1))||(Idles<1)))&&(((IdleTechs_0<1)||(OpenRequests_4_1<1))||(Idles<1)))&&(((IdleTechs_1<1)||(OpenRequests_1_0<1))||(Idles<1)))&&(((IdleTechs_3<1)||(OpenRequests_4_2<1))||(Idles<1)))&&(((IdleTechs_2<1)||(OpenRequests_2_3<1))||(Idles<1)))&&(((IdleTechs_0<1)||(OpenRequests_6_2<1))||(Idles<1)))&&(((IdleTechs_1<1)||(OpenRequests_3_3<1))||(Idles<1)))&&(((IdleTechs_3<1)||(OpenRequests_6_3<1))||(Idles<1)))&&(((IdleTechs_1<1)||(OpenRequests_3_1<1))||(Idles<1)))&&(((IdleTechs_2<1)||(OpenRequests_0_2<1))||(Idles<1)))&&(((IdleTechs_3<1)||(OpenRequests_0_0<1))||(Idles<1)))&&(((IdleTechs_2<1)||(OpenRequests_7_1<1))||(Idles<1)))&&(((IdleTechs_3<1)||(OpenRequests_2_1<1))||(Idles<1)))&&(((IdleTechs_1<1)||(OpenRequests_1_2<1))||(Idles<1)))&&(((IdleTechs_0<1)||(OpenRequests_2_0<1))||(Idles<1)))&&(((IdleTechs_1<1)||(OpenRequests_7_3<1))||(Idles<1)))&&(((IdleTechs_2<1)||(OpenRequests_5_0<1))||(Idles<1)))&&(((IdleTechs_0<1)||(OpenRequests_0_0<1))||(Idles<1)))&&(((IdleTechs_2<1)||(OpenRequests_3_2<1))||(Idles<1)))&&(((IdleTechs_0<1)||(OpenRequests_7_1<1))||(Idles<1)))&&(((IdleTechs_0<1)||(OpenRequests_2_1<1))||(Idles<1)))&&(((IdleTechs_3<1)||(OpenRequests_7_3<1))||(Idles<1)))&&(((IdleTechs_0<1)||(OpenRequests_5_0<1))||(Idles<1)))&&(((IdleTechs_1<1)||(OpenRequests_4_1<1))||(Idles<1)))&&(((IdleTechs_2<1)||(OpenRequests_5_3<1))||(Idles<1)))&&(((IdleTechs_1<1)||(OpenRequests_6_2<1))||(Idles<1)))&&(((IdleTechs_2<1)||(OpenRequests_1_1<1))||(Idles<1)))&&(((IdleTechs_0<1)||(OpenRequests_4_2<1))||(Idles<1)))&&(((IdleTechs_1<1)||(OpenRequests_2_0<1))||(Idles<1)))&&(((IdleTechs_0<1)||(OpenRequests_2_3<1))||(Idles<1)))&&(((IdleTechs_3<1)||(OpenRequests_0_2<1))||(Idles<1)))&&(((IdleTechs_3<1)||(OpenRequests_5_0<1))||(Idles<1)))&&(((IdleTechs_0<1)||(OpenRequests_0_2<1))||(Idles<1)))&&(((IdleTechs_3<1)||(OpenRequests_2_3<1))||(Idles<1)))&&(((IdleTechs_1<1)||(OpenRequests_4_3<1))||(Idles<1)))&&(((IdleTechs_2<1)||(OpenRequests_4_0<1))||(Idles<1)))&&(((IdleTechs_0<1)||(OpenRequests_7_3<1))||(Idles<1)))&&(((IdleTechs_3<1)||(OpenRequests_1_0<1))||(Idles<1)))&&(((IdleTechs_1<1)||(OpenRequests_7_0<1))||(Idles<1)))&&(((IdleTechs_3<1)||(OpenRequests_7_1<1))||(Idles<1)))&&(((IdleTechs_0<1)||(OpenRequests_5_2<1))||(Idles<1)))&&(((IdleTechs_3<1)||(OpenRequests_5_2<1))||(Idles<1)))&&(((IdleTechs_2<1)||(OpenRequests_6_1<1))||(Idles<1)))&&(((IdleTechs_1<1)||(OpenRequests_0_1<1))||(Idles<1)))&&(((IdleTechs_0<1)||(OpenRequests_3_1<1))||(Idles<1)))&&(((IdleTechs_2<1)||(OpenRequests_1_3<1))||(Idles<1)))&&(((IdleTechs_1<1)||(OpenRequests_2_2<1))||(Idles<1)))&&(((IdleTechs_3<1)||(OpenRequests_3_1<1))||(Idles<1)))&&(((IdleTechs_0<1)||(OpenRequests_1_0<1))||(Idles<1)))&&(((IdleTechs_3<1)||(OpenRequests_1_2<1))||(Idles<1)))&&(((IdleTechs_2<1)||(OpenRequests_7_0<1))||(Idles<1)))&&(((IdleTechs_0<1)||(OpenRequests_3_2<1))||(Idles<1)))&&(((IdleTechs_1<1)||(OpenRequests_5_1<1))||(Idles<1)))&&(((IdleTechs_2<1)||(OpenRequests_2_0<1))||(Idles<1)))&&(((IdleTechs_0<1)||(OpenRequests_1_1<1))||(Idles<1)))&&(((IdleTechs_2<1)||(OpenRequests_4_3<1))||(Idles<1)))&&(((IdleTechs_1<1)||(OpenRequests_7_2<1))||(Idles<1)))&&(((IdleTechs_0<1)||(OpenRequests_5_3<1))||(Idles<1)))&&(((IdleTechs_2<1)||(OpenRequests_2_2<1))||(Idles<1)))&&(((IdleTechs_3<1)||(OpenRequests_6_0<1))||(Idles<1)))&&(((IdleTechs_2<1)||(OpenRequests_7_2<1))||(Idles<1)))&&(((IdleTechs_1<1)||(OpenRequests_0_3<1))||(Idles<1)))&&(((IdleTechs_3<1)||(OpenRequests_3_3<1))||(Idles<1)))&&(((IdleTechs_2<1)||(OpenRequests_0_1<1))||(Idles<1)))&&(((IdleTechs_1<1)||(OpenRequests_3_0<1))||(Idles<1)))&&(((IdleTechs_2<1)||(OpenRequests_5_1<1))||(Idles<1)))&&(((IdleTechs_1<1)||(OpenRequests_3_2<1))||(Idles<1)))&&(((IdleTechs_0<1)||(OpenRequests_1_3<1))||(Idles<1)))&&(((IdleTechs_0<1)||(OpenRequests_6_3<1))||(Idles<1)))&&(((IdleTechs_1<1)||(OpenRequests_1_1<1))||(Idles<1)))&&(((IdleTechs_3<1)||(OpenRequests_2_0<1))||(Idles<1)))&&(((IdleTechs_3<1)||(OpenRequests_4_1<1))||(Idles<1)))&&(((IdleTechs_0<1)||(OpenRequests_4_0<1))||(Idles<1)))&&(((IdleTechs_1<1)||(OpenRequests_5_3<1))||(Idles<1)))&&(((IdleTechs_2<1)||(OpenRequests_3_0<1))||(Idles<1)))&&(((IdleTechs_3<1)||(OpenRequests_6_2<1))||(Idles<1)))&&(((IdleTechs_0<1)||(OpenRequests_6_1<1))||(Idles<1)))&&(((IdleTechs_2<1)||(OpenRequests_0_3<1))||(Idles<1)))")))))
Formula 0 simplified : !X("((((((((ClientsWaiting_6>=1)||(ClientsWaiting_7>=1))||(ClientsWaiting_2>=1))||(ClientsWaiting_3>=1))||(ClientsWaiting_4>=1))||(ClientsWaiting_5>=1))||(ClientsWaiting_0>=1))||(ClientsWaiting_1>=1))" | F"((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((IdleTechs_1<1)||(OpenRequests_1_3<1))||(Idles<1))&&(((IdleTechs_3<1)||(OpenRequests_5_1<1))||(Idles<1)))&&(((IdleTechs_3<1)||(OpenRequests_0_1<1))||(Idles<1)))&&(((IdleTechs_2<1)||(OpenRequests_3_1<1))||(Idles<1)))&&(((IdleTechs_2<1)||(OpenRequests_1_0<1))||(Idles<1)))&&(((IdleTechs_3<1)||(OpenRequests_2_2<1))||(Idles<1)))&&(((IdleTechs_0<1)||(OpenRequests_0_1<1))||(Idles<1)))&&(((IdleTechs_0<1)||(OpenRequests_7_0<1))||(Idles<1)))&&(((IdleTechs_3<1)||(OpenRequests_3_0<1))||(Idles<1)))&&(((IdleTechs_1<1)||(OpenRequests_6_1<1))||(Idles<1)))&&(((IdleTechs_3<1)||(OpenRequests_4_3<1))||(Idles<1)))&&(((IdleTechs_0<1)||(OpenRequests_2_2<1))||(Idles<1)))&&(((IdleTechs_1<1)||(OpenRequests_4_0<1))||(Idles<1)))&&(((IdleTechs_0<1)||(OpenRequests_4_3<1))||(Idles<1)))&&(((IdleTechs_2<1)||(OpenRequests_5_2<1))||(Idles<1)))&&(((IdleTechs_3<1)||(OpenRequests_7_0<1))||(Idles<1)))&&(((IdleTechs_0<1)||(OpenRequests_3_0<1))||(Idles<1)))&&(((IdleTechs_1<1)||(OpenRequests_2_1<1))||(Idles<1)))&&(((IdleTechs_2<1)||(OpenRequests_6_2<1))||(Idles<1)))&&(((IdleTechs_3<1)||(OpenRequests_5_3<1))||(Idles<1)))&&(((IdleTechs_2<1)||(OpenRequests_7_3<1))||(Idles<1)))&&(((IdleTechs_3<1)||(OpenRequests_0_3<1))||(Idles<1)))&&(((IdleTechs_1<1)||(OpenRequests_0_0<1))||(Idles<1)))&&(((IdleTechs_3<1)||(OpenRequests_3_2<1))||(Idles<1)))&&(((IdleTechs_2<1)||(OpenRequests_1_2<1))||(Idles<1)))&&(((IdleTechs_2<1)||(OpenRequests_4_1<1))||(Idles<1)))&&(((IdleTechs_0<1)||(OpenRequests_0_3<1))||(Idles<1)))&&(((IdleTechs_2<1)||(OpenRequests_3_3<1))||(Idles<1)))&&(((IdleTechs_1<1)||(OpenRequests_4_2<1))||(Idles<1)))&&(((IdleTechs_3<1)||(OpenRequests_1_1<1))||(Idles<1)))&&(((IdleTechs_0<1)||(OpenRequests_7_2<1))||(Idles<1)))&&(((IdleTechs_1<1)||(OpenRequests_6_3<1))||(Idles<1)))&&(((IdleTechs_2<1)||(OpenRequests_6_0<1))||(Idles<1)))&&(((IdleTechs_3<1)||(OpenRequests_7_2<1))||(Idles<1)))&&(((IdleTechs_0<1)||(OpenRequests_5_1<1))||(Idles<1)))&&(((IdleTechs_3<1)||(OpenRequests_4_0<1))||(Idles<1)))&&(((IdleTechs_2<1)||(OpenRequests_2_1<1))||(Idles<1)))&&(((IdleTechs_1<1)||(OpenRequests_0_2<1))||(Idles<1)))&&(((IdleTechs_1<1)||(OpenRequests_2_3<1))||(Idles<1)))&&(((IdleTechs_1<1)||(OpenRequests_5_2<1))||(Idles<1)))&&(((IdleTechs_3<1)||(OpenRequests_6_1<1))||(Idles<1)))&&(((IdleTechs_0<1)||(OpenRequests_6_0<1))||(Idles<1)))&&(((IdleTechs_2<1)||(OpenRequests_0_0<1))||(Idles<1)))&&(((IdleTechs_0<1)||(OpenRequests_1_2<1))||(Idles<1)))&&(((IdleTechs_2<1)||(OpenRequests_6_3<1))||(Idles<1)))&&(((IdleTechs_3<1)||(OpenRequests_1_3<1))||(Idles<1)))&&(((IdleTechs_1<1)||(OpenRequests_5_0<1))||(Idles<1)))&&(((IdleTechs_0<1)||(OpenRequests_3_3<1))||(Idles<1)))&&(((IdleTechs_2<1)||(OpenRequests_4_2<1))||(Idles<1)))&&(((IdleTechs_1<1)||(OpenRequests_7_1<1))||(Idles<1)))&&(((IdleTechs_1<1)||(OpenRequests_6_0<1))||(Idles<1)))&&(((IdleTechs_0<1)||(OpenRequests_4_1<1))||(Idles<1)))&&(((IdleTechs_1<1)||(OpenRequests_1_0<1))||(Idles<1)))&&(((IdleTechs_3<1)||(OpenRequests_4_2<1))||(Idles<1)))&&(((IdleTechs_2<1)||(OpenRequests_2_3<1))||(Idles<1)))&&(((IdleTechs_0<1)||(OpenRequests_6_2<1))||(Idles<1)))&&(((IdleTechs_1<1)||(OpenRequests_3_3<1))||(Idles<1)))&&(((IdleTechs_3<1)||(OpenRequests_6_3<1))||(Idles<1)))&&(((IdleTechs_1<1)||(OpenRequests_3_1<1))||(Idles<1)))&&(((IdleTechs_2<1)||(OpenRequests_0_2<1))||(Idles<1)))&&(((IdleTechs_3<1)||(OpenRequests_0_0<1))||(Idles<1)))&&(((IdleTechs_2<1)||(OpenRequests_7_1<1))||(Idles<1)))&&(((IdleTechs_3<1)||(OpenRequests_2_1<1))||(Idles<1)))&&(((IdleTechs_1<1)||(OpenRequests_1_2<1))||(Idles<1)))&&(((IdleTechs_0<1)||(OpenRequests_2_0<1))||(Idles<1)))&&(((IdleTechs_1<1)||(OpenRequests_7_3<1))||(Idles<1)))&&(((IdleTechs_2<1)||(OpenRequests_5_0<1))||(Idles<1)))&&(((IdleTechs_0<1)||(OpenRequests_0_0<1))||(Idles<1)))&&(((IdleTechs_2<1)||(OpenRequests_3_2<1))||(Idles<1)))&&(((IdleTechs_0<1)||(OpenRequests_7_1<1))||(Idles<1)))&&(((IdleTechs_0<1)||(OpenRequests_2_1<1))||(Idles<1)))&&(((IdleTechs_3<1)||(OpenRequests_7_3<1))||(Idles<1)))&&(((IdleTechs_0<1)||(OpenRequests_5_0<1))||(Idles<1)))&&(((IdleTechs_1<1)||(OpenRequests_4_1<1))||(Idles<1)))&&(((IdleTechs_2<1)||(OpenRequests_5_3<1))||(Idles<1)))&&(((IdleTechs_1<1)||(OpenRequests_6_2<1))||(Idles<1)))&&(((IdleTechs_2<1)||(OpenRequests_1_1<1))||(Idles<1)))&&(((IdleTechs_0<1)||(OpenRequests_4_2<1))||(Idles<1)))&&(((IdleTechs_1<1)||(OpenRequests_2_0<1))||(Idles<1)))&&(((IdleTechs_0<1)||(OpenRequests_2_3<1))||(Idles<1)))&&(((IdleTechs_3<1)||(OpenRequests_0_2<1))||(Idles<1)))&&(((IdleTechs_3<1)||(OpenRequests_5_0<1))||(Idles<1)))&&(((IdleTechs_0<1)||(OpenRequests_0_2<1))||(Idles<1)))&&(((IdleTechs_3<1)||(OpenRequests_2_3<1))||(Idles<1)))&&(((IdleTechs_1<1)||(OpenRequests_4_3<1))||(Idles<1)))&&(((IdleTechs_2<1)||(OpenRequests_4_0<1))||(Idles<1)))&&(((IdleTechs_0<1)||(OpenRequests_7_3<1))||(Idles<1)))&&(((IdleTechs_3<1)||(OpenRequests_1_0<1))||(Idles<1)))&&(((IdleTechs_1<1)||(OpenRequests_7_0<1))||(Idles<1)))&&(((IdleTechs_3<1)||(OpenRequests_7_1<1))||(Idles<1)))&&(((IdleTechs_0<1)||(OpenRequests_5_2<1))||(Idles<1)))&&(((IdleTechs_3<1)||(OpenRequests_5_2<1))||(Idles<1)))&&(((IdleTechs_2<1)||(OpenRequests_6_1<1))||(Idles<1)))&&(((IdleTechs_1<1)||(OpenRequests_0_1<1))||(Idles<1)))&&(((IdleTechs_0<1)||(OpenRequests_3_1<1))||(Idles<1)))&&(((IdleTechs_2<1)||(OpenRequests_1_3<1))||(Idles<1)))&&(((IdleTechs_1<1)||(OpenRequests_2_2<1))||(Idles<1)))&&(((IdleTechs_3<1)||(OpenRequests_3_1<1))||(Idles<1)))&&(((IdleTechs_0<1)||(OpenRequests_1_0<1))||(Idles<1)))&&(((IdleTechs_3<1)||(OpenRequests_1_2<1))||(Idles<1)))&&(((IdleTechs_2<1)||(OpenRequests_7_0<1))||(Idles<1)))&&(((IdleTechs_0<1)||(OpenRequests_3_2<1))||(Idles<1)))&&(((IdleTechs_1<1)||(OpenRequests_5_1<1))||(Idles<1)))&&(((IdleTechs_2<1)||(OpenRequests_2_0<1))||(Idles<1)))&&(((IdleTechs_0<1)||(OpenRequests_1_1<1))||(Idles<1)))&&(((IdleTechs_2<1)||(OpenRequests_4_3<1))||(Idles<1)))&&(((IdleTechs_1<1)||(OpenRequests_7_2<1))||(Idles<1)))&&(((IdleTechs_0<1)||(OpenRequests_5_3<1))||(Idles<1)))&&(((IdleTechs_2<1)||(OpenRequests_2_2<1))||(Idles<1)))&&(((IdleTechs_3<1)||(OpenRequests_6_0<1))||(Idles<1)))&&(((IdleTechs_2<1)||(OpenRequests_7_2<1))||(Idles<1)))&&(((IdleTechs_1<1)||(OpenRequests_0_3<1))||(Idles<1)))&&(((IdleTechs_3<1)||(OpenRequests_3_3<1))||(Idles<1)))&&(((IdleTechs_2<1)||(OpenRequests_0_1<1))||(Idles<1)))&&(((IdleTechs_1<1)||(OpenRequests_3_0<1))||(Idles<1)))&&(((IdleTechs_2<1)||(OpenRequests_5_1<1))||(Idles<1)))&&(((IdleTechs_1<1)||(OpenRequests_3_2<1))||(Idles<1)))&&(((IdleTechs_0<1)||(OpenRequests_1_3<1))||(Idles<1)))&&(((IdleTechs_0<1)||(OpenRequests_6_3<1))||(Idles<1)))&&(((IdleTechs_1<1)||(OpenRequests_1_1<1))||(Idles<1)))&&(((IdleTechs_3<1)||(OpenRequests_2_0<1))||(Idles<1)))&&(((IdleTechs_3<1)||(OpenRequests_4_1<1))||(Idles<1)))&&(((IdleTechs_0<1)||(OpenRequests_4_0<1))||(Idles<1)))&&(((IdleTechs_1<1)||(OpenRequests_5_3<1))||(Idles<1)))&&(((IdleTechs_2<1)||(OpenRequests_3_0<1))||(Idles<1)))&&(((IdleTechs_3<1)||(OpenRequests_6_2<1))||(Idles<1)))&&(((IdleTechs_0<1)||(OpenRequests_6_1<1))||(Idles<1)))&&(((IdleTechs_2<1)||(OpenRequests_0_3<1))||(Idles<1)))")
Reverse transition relation is exact ! Faster fixpoint algorithm enabled.
2 unique states visited
0 strongly connected components in search stack
1 transitions explored
2 items max in DFS search stack
1064 ticks for the emptiness check
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
STATS,0,10.6795,263556,1,0,6,1.71139e+06,18,0,6209,623159,7
no accepting run found
Formula 0 is TRUE no accepting run found.
FORMULA UtilityControlRoom-PT-Z4T4N08-07 TRUE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL
ITS tools runner thread asked to quit. Dying gracefully.
Treatment of property UtilityControlRoom-PT-Z4T4N08-07 finished in 16414 ms.
Running Spot : CommandLine [args=[/home/mcc/BenchKit/bin//..//ltl2tgba, --hoaf=tv, -f, !(X((F(G(p0)) U G((X(p2)&&p1)))))], workingDir=/home/mcc/execution]
Support contains 5 out of 301 places. Attempting structural reductions.
Starting structural reductions, iteration 0 : 301/301 places, 472/472 transitions.
Discarding 95 places :
Symmetric choice reduction at 0 with 95 rule applications. Total rules 95 place count 206 transition count 377
Iterating global reduction 0 with 95 rules applied. Total rules applied 190 place count 206 transition count 377
Applied a total of 190 rules in 6 ms. Remains 206 /301 variables (removed 95) and now considering 377/472 (removed 95) transitions.
// Phase 1: matrix 377 rows 206 cols
[2021-05-20 06:27:26] [INFO ] Computed 18 place invariants in 1 ms
[2021-05-20 06:27:26] [INFO ] Implicit Places using invariants in 61 ms returned []
// Phase 1: matrix 377 rows 206 cols
[2021-05-20 06:27:26] [INFO ] Computed 18 place invariants in 4 ms
[2021-05-20 06:27:26] [INFO ] Implicit Places using invariants and state equation in 138 ms returned []
Implicit Place search using SMT with State Equation took 200 ms to find 0 implicit places.
// Phase 1: matrix 377 rows 206 cols
[2021-05-20 06:27:26] [INFO ] Computed 18 place invariants in 7 ms
[2021-05-20 06:27:26] [INFO ] Dead Transitions using invariants and state equation in 146 ms returned []
Finished structural reductions, in 1 iterations. Remains : 206/301 places, 377/472 transitions.
Stuttering acceptance computed with spot in 159 ms :[(OR (NOT p1) (NOT p2)), (OR (NOT p1) (NOT p2)), (NOT p0), (NOT p2), (AND (NOT p0) p1 (NOT p2))]
Running random walk in product with property : UtilityControlRoom-PT-Z4T4N08-08 automaton TGBA [mat=[[{ cond=true, acceptance={} source=0 dest: 1}], [{ cond=(NOT p1), acceptance={0} source=1 dest: 1}, { cond=p1, acceptance={} source=1 dest: 1}, { cond=(NOT p1), acceptance={} source=1 dest: 2}, { cond=p1, acceptance={0} source=1 dest: 3}, { cond=p1, acceptance={} source=1 dest: 4}], [{ cond=(NOT p0), acceptance={0} source=2 dest: 2}, { cond=p0, acceptance={} source=2 dest: 2}], [{ cond=(AND (NOT p1) (NOT p2)), acceptance={0} source=3 dest: 1}, { cond=(AND p1 (NOT p2)), acceptance={} source=3 dest: 1}, { cond=(AND (NOT p1) (NOT p2)), acceptance={} source=3 dest: 2}, { cond=(AND p1 (NOT p2)), acceptance={0} source=3 dest: 3}, { cond=(AND p1 (NOT p2)), acceptance={} source=3 dest: 4}], [{ cond=(AND p1 (NOT p2)), acceptance={} source=4 dest: 2}]], initial=0, aps=[p1:(AND (GEQ s3 1) (GEQ s28 1) (GEQ s149 1)), p0:(LT s104 1), p2:(GEQ s58 1)], nbAcceptance=1, properties=[trans-labels, explicit-labels, trans-acc, no-univ-branch], stateDesc=[null, null, null, null, null][false, false, false, false, false]]
Product exploration explored 100000 steps with 0 reset in 254 ms.
Product exploration explored 100000 steps with 0 reset in 348 ms.
Knowledge obtained : [(NOT p1), p0, (NOT p2)]
Stuttering acceptance computed with spot in 127 ms :[(OR (NOT p1) (NOT p2)), (OR (NOT p1) (NOT p2)), (NOT p0), (NOT p2), (AND (NOT p0) p1 (NOT p2))]
Product exploration explored 100000 steps with 0 reset in 252 ms.
Stack based approach found an accepted trace after 86542 steps with 0 reset with depth 86543 and stack size 10551 in 290 ms.
FORMULA UtilityControlRoom-PT-Z4T4N08-08 FALSE TECHNIQUES STUTTER_TEST
Treatment of property UtilityControlRoom-PT-Z4T4N08-08 finished in 1908 ms.
Running Spot : CommandLine [args=[/home/mcc/BenchKit/bin//..//ltl2tgba, --hoaf=tv, -f, !(X((F(p0) U X(G(p1)))))], workingDir=/home/mcc/execution]
Support contains 4 out of 301 places. Attempting structural reductions.
Starting structural reductions, iteration 0 : 301/301 places, 472/472 transitions.
Discarding 96 places :
Symmetric choice reduction at 0 with 96 rule applications. Total rules 96 place count 205 transition count 376
Iterating global reduction 0 with 96 rules applied. Total rules applied 192 place count 205 transition count 376
Applied a total of 192 rules in 4 ms. Remains 205 /301 variables (removed 96) and now considering 376/472 (removed 96) transitions.
// Phase 1: matrix 376 rows 205 cols
[2021-05-20 06:27:28] [INFO ] Computed 18 place invariants in 2 ms
[2021-05-20 06:27:28] [INFO ] Implicit Places using invariants in 65 ms returned []
// Phase 1: matrix 376 rows 205 cols
[2021-05-20 06:27:28] [INFO ] Computed 18 place invariants in 2 ms
[2021-05-20 06:27:28] [INFO ] Implicit Places using invariants and state equation in 139 ms returned []
Implicit Place search using SMT with State Equation took 205 ms to find 0 implicit places.
// Phase 1: matrix 376 rows 205 cols
[2021-05-20 06:27:28] [INFO ] Computed 18 place invariants in 3 ms
[2021-05-20 06:27:28] [INFO ] Dead Transitions using invariants and state equation in 151 ms returned []
Finished structural reductions, in 1 iterations. Remains : 205/301 places, 376/472 transitions.
Stuttering acceptance computed with spot in 90 ms :[(NOT p1), (NOT p1), (AND (NOT p0) (NOT p1)), (NOT p0)]
Running random walk in product with property : UtilityControlRoom-PT-Z4T4N08-09 automaton TGBA [mat=[[{ cond=true, acceptance={} source=0 dest: 1}], [{ cond=(NOT p1), acceptance={0} source=1 dest: 1}, { cond=p1, acceptance={} source=1 dest: 1}, { cond=(NOT p0), acceptance={} source=1 dest: 2}], [{ cond=(AND (NOT p0) (NOT p1)), acceptance={} source=2 dest: 3}], [{ cond=(NOT p0), acceptance={0} source=3 dest: 3}]], initial=0, aps=[p1:(OR (LT s136 1) (LT s172 1)), p0:(AND (GEQ s117 1) (GEQ s167 1))], nbAcceptance=1, properties=[trans-labels, explicit-labels, trans-acc, no-univ-branch], stateDesc=[null, null, null, null][false, false, false, false]]
Product exploration explored 100000 steps with 24993 reset in 217 ms.
Product exploration explored 100000 steps with 25008 reset in 236 ms.
Knowledge obtained : [p1, (NOT p0)]
Stuttering acceptance computed with spot in 176 ms :[(NOT p1), (NOT p1), (AND (NOT p0) (NOT p1)), (NOT p0)]
Product exploration explored 100000 steps with 24812 reset in 206 ms.
Product exploration explored 100000 steps with 25060 reset in 218 ms.
Applying partial POR strategy [false, false, true, true]
Stuttering acceptance computed with spot in 91 ms :[(NOT p1), (NOT p1), (AND (NOT p0) (NOT p1)), (NOT p0)]
Support contains 4 out of 205 places. Attempting structural reductions.
Property had overlarge support with respect to TGBA, discarding it for now.
Starting structural reductions, iteration 0 : 205/205 places, 376/376 transitions.
Performed 30 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 0 with 30 Pre rules applied. Total rules applied 0 place count 205 transition count 406
Deduced a syphon composed of 30 places in 0 ms
Iterating global reduction 0 with 30 rules applied. Total rules applied 30 place count 205 transition count 406
Performed 80 Post agglomeration using F-continuation condition.Transition count delta: -24
Deduced a syphon composed of 110 places in 0 ms
Iterating global reduction 0 with 80 rules applied. Total rules applied 110 place count 205 transition count 430
Ensure Unique test removed 32 transitions
Reduce isomorphic transitions removed 32 transitions.
Iterating post reduction 0 with 32 rules applied. Total rules applied 142 place count 205 transition count 398
Discarding 3 places :
Symmetric choice reduction at 1 with 3 rule applications. Total rules 145 place count 202 transition count 302
Deduced a syphon composed of 110 places in 0 ms
Iterating global reduction 1 with 3 rules applied. Total rules applied 148 place count 202 transition count 302
Discarding 68 places :
Symmetric choice reduction at 1 with 68 rule applications. Total rules 216 place count 134 transition count 190
Deduced a syphon composed of 64 places in 0 ms
Iterating global reduction 1 with 68 rules applied. Total rules applied 284 place count 134 transition count 190
Discarding 44 places :
Symmetric choice reduction at 1 with 44 rule applications. Total rules 328 place count 90 transition count 146
Deduced a syphon composed of 42 places in 0 ms
Iterating global reduction 1 with 44 rules applied. Total rules applied 372 place count 90 transition count 146
Ensure Unique test removed 44 transitions
Reduce isomorphic transitions removed 44 transitions.
Iterating post reduction 1 with 44 rules applied. Total rules applied 416 place count 90 transition count 102
Performed 6 Post agglomeration using F-continuation condition.Transition count delta: 0
Deduced a syphon composed of 48 places in 0 ms
Iterating global reduction 2 with 6 rules applied. Total rules applied 422 place count 90 transition count 102
Deduced a syphon composed of 48 places in 0 ms
Applied a total of 422 rules in 25 ms. Remains 90 /205 variables (removed 115) and now considering 102/376 (removed 274) transitions.
[2021-05-20 06:27:29] [INFO ] Redundant transitions in 0 ms returned []
// Phase 1: matrix 102 rows 90 cols
[2021-05-20 06:27:30] [INFO ] Computed 18 place invariants in 0 ms
[2021-05-20 06:27:30] [INFO ] Dead Transitions using invariants and state equation in 45 ms returned []
Finished structural reductions, in 1 iterations. Remains : 90/205 places, 102/376 transitions.
Product exploration explored 100000 steps with 25110 reset in 465 ms.
Product exploration explored 100000 steps with 25042 reset in 478 ms.
[2021-05-20 06:27:31] [INFO ] Flatten gal took : 14 ms
[2021-05-20 06:27:31] [INFO ] Flatten gal took : 14 ms
[2021-05-20 06:27:31] [INFO ] Time to serialize gal into /tmp/LTL6864653265064568060.gal : 1 ms
[2021-05-20 06:27:31] [INFO ] Time to serialize properties into /tmp/LTL11772235655859497255.ltl : 0 ms
Invoking ITS tools like this :CommandLine [args=[/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.202104292328/bin/its-ltl-linux64, --gc-threshold, 2000000, -i, /tmp/LTL6864653265064568060.gal, -t, CGAL, -LTL, /tmp/LTL11772235655859497255.ltl, -c, -stutter-deadlock, --gen-order, FOLLOW], workingDir=/home/mcc/execution]

its-ltl command run as :

/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.202104292328/bin/its-ltl-linux64 --gc-threshold 2000000 -i /tmp/LTL6864653265064568060.gal -t CGAL -LTL /tmp/LTL11772235655859497255.ltl -c -stutter-deadlock --gen-order FOLLOW
Read 1 LTL properties
Checking formula 0 : !((X((F("((StartSecuring_2_1>=1)&&(ClientsTimeout_2>=1))"))U(X(G("((StartSecuring_7_0<1)||(ClientsTimeout_7<1))"))))))
Formula 0 simplified : !X(F"((StartSecuring_2_1>=1)&&(ClientsTimeout_2>=1))" U XG"((StartSecuring_7_0<1)||(ClientsTimeout_7<1))")
Reverse transition relation is exact ! Faster fixpoint algorithm enabled.
Detected timeout of ITS tools.
[2021-05-20 06:27:46] [INFO ] Flatten gal took : 12 ms
[2021-05-20 06:27:46] [INFO ] Applying decomposition
[2021-05-20 06:27:46] [INFO ] Flatten gal took : 12 ms
Converted graph to binary with : CommandLine [args=[/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.louvain.binaries_1.0.0.202104292328/bin/convert-linux64, -i, /tmp/graph3830858893479948868.txt, -o, /tmp/graph3830858893479948868.bin, -w, /tmp/graph3830858893479948868.weights], workingDir=null]
Built communities with : CommandLine [args=[/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.louvain.binaries_1.0.0.202104292328/bin/louvain-linux64, /tmp/graph3830858893479948868.bin, -l, -1, -v, -w, /tmp/graph3830858893479948868.weights, -q, 0, -e, 0.001], workingDir=null]
[2021-05-20 06:27:46] [INFO ] Decomposing Gal with order
[2021-05-20 06:27:46] [INFO ] Rewriting arrays to variables to allow decomposition.
[2021-05-20 06:27:46] [INFO ] Removed a total of 546 redundant transitions.
[2021-05-20 06:27:46] [INFO ] Flatten gal took : 24 ms
[2021-05-20 06:27:46] [INFO ] Fuse similar labels procedure discarded/fused a total of 83 labels/synchronizations in 10 ms.
[2021-05-20 06:27:46] [INFO ] Time to serialize gal into /tmp/LTL16771238152898214995.gal : 8 ms
[2021-05-20 06:27:46] [INFO ] Time to serialize properties into /tmp/LTL8022162139435222586.ltl : 33 ms
Invoking ITS tools like this :CommandLine [args=[/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.202104292328/bin/its-ltl-linux64, --gc-threshold, 2000000, -i, /tmp/LTL16771238152898214995.gal, -t, CGAL, -LTL, /tmp/LTL8022162139435222586.ltl, -c, -stutter-deadlock], workingDir=/home/mcc/execution]

its-ltl command run as :

/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.202104292328/bin/its-ltl-linux64 --gc-threshold 2000000 -i /tmp/LTL16771238152898214995.gal -t CGAL -LTL /tmp/LTL8022162139435222586.ltl -c -stutter-deadlock
Read 1 LTL properties
Checking formula 0 : !((X((F("((i4.u68.StartSecuring_2_1>=1)&&(i4.u58.ClientsTimeout_2>=1))"))U(X(G("((i3.u49.StartSecuring_7_0<1)||(i3.u63.ClientsTimeout_7<1))"))))))
Formula 0 simplified : !X(F"((i4.u68.StartSecuring_2_1>=1)&&(i4.u58.ClientsTimeout_2>=1))" U XG"((i3.u49.StartSecuring_7_0<1)||(i3.u63.ClientsTimeout_7<1))")
Reverse transition relation is exact ! Faster fixpoint algorithm enabled.
5 unique states visited
5 strongly connected components in search stack
5 transitions explored
5 items max in DFS search stack
39 ticks for the emptiness check
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
STATS,0,0.428768,31184,1,0,30802,570,2926,42410,144,2461,62841
an accepting run exists (use option '-e' to print it)
Formula 0 is FALSE accepting run found.
FORMULA UtilityControlRoom-PT-Z4T4N08-09 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL USE_NUPN
Treatment of property UtilityControlRoom-PT-Z4T4N08-09 finished in 18517 ms.
Running Spot : CommandLine [args=[/home/mcc/BenchKit/bin//..//ltl2tgba, --hoaf=tv, -f, !(X((G(p1)&&p0)))], workingDir=/home/mcc/execution]
Support contains 3 out of 301 places. Attempting structural reductions.
Starting structural reductions, iteration 0 : 301/301 places, 472/472 transitions.
Discarding 96 places :
Symmetric choice reduction at 0 with 96 rule applications. Total rules 96 place count 205 transition count 376
Iterating global reduction 0 with 96 rules applied. Total rules applied 192 place count 205 transition count 376
Applied a total of 192 rules in 7 ms. Remains 205 /301 variables (removed 96) and now considering 376/472 (removed 96) transitions.
// Phase 1: matrix 376 rows 205 cols
[2021-05-20 06:27:46] [INFO ] Computed 18 place invariants in 2 ms
[2021-05-20 06:27:46] [INFO ] Implicit Places using invariants in 63 ms returned []
// Phase 1: matrix 376 rows 205 cols
[2021-05-20 06:27:46] [INFO ] Computed 18 place invariants in 2 ms
[2021-05-20 06:27:46] [INFO ] Implicit Places using invariants and state equation in 155 ms returned []
Implicit Place search using SMT with State Equation took 218 ms to find 0 implicit places.
// Phase 1: matrix 376 rows 205 cols
[2021-05-20 06:27:46] [INFO ] Computed 18 place invariants in 2 ms
[2021-05-20 06:27:47] [INFO ] Dead Transitions using invariants and state equation in 188 ms returned []
Finished structural reductions, in 1 iterations. Remains : 205/301 places, 376/472 transitions.
Stuttering acceptance computed with spot in 79 ms :[true, (OR (NOT p1) (NOT p0)), (NOT p1), (OR (NOT p1) (NOT p0))]
Running random walk in product with property : UtilityControlRoom-PT-Z4T4N08-10 automaton TGBA [mat=[[{ cond=true, acceptance={0} source=0 dest: 0}], [{ cond=true, acceptance={} source=1 dest: 3}], [{ cond=(NOT p1), acceptance={} source=2 dest: 0}, { cond=p1, acceptance={} source=2 dest: 2}], [{ cond=(OR (NOT p0) (NOT p1)), acceptance={} source=3 dest: 0}, { cond=(AND p0 p1), acceptance={} source=3 dest: 2}]], initial=1, aps=[p1:(LT s149 1), p0:(AND (GEQ s145 1) (GEQ s163 1))], nbAcceptance=1, properties=[trans-labels, explicit-labels, trans-acc, complete, deterministic, no-univ-branch, unambiguous, semi-deterministic, terminal, very-weak, weak, inherently-weak], stateDesc=[null, null, null, null][false, false, false, false]]
Entered a terminal (fully accepting) state of product in 1 steps with 0 reset in 0 ms.
FORMULA UtilityControlRoom-PT-Z4T4N08-10 FALSE TECHNIQUES STUTTER_TEST
Treatment of property UtilityControlRoom-PT-Z4T4N08-10 finished in 503 ms.
Running Spot : CommandLine [args=[/home/mcc/BenchKit/bin//..//ltl2tgba, --hoaf=tv, -f, !(X(((p0 U p1)&&X(F(p2)))))], workingDir=/home/mcc/execution]
Support contains 7 out of 301 places. Attempting structural reductions.
Starting structural reductions, iteration 0 : 301/301 places, 472/472 transitions.
Discarding 96 places :
Symmetric choice reduction at 0 with 96 rule applications. Total rules 96 place count 205 transition count 376
Iterating global reduction 0 with 96 rules applied. Total rules applied 192 place count 205 transition count 376
Applied a total of 192 rules in 13 ms. Remains 205 /301 variables (removed 96) and now considering 376/472 (removed 96) transitions.
// Phase 1: matrix 376 rows 205 cols
[2021-05-20 06:27:47] [INFO ] Computed 18 place invariants in 2 ms
[2021-05-20 06:27:47] [INFO ] Implicit Places using invariants in 89 ms returned []
// Phase 1: matrix 376 rows 205 cols
[2021-05-20 06:27:47] [INFO ] Computed 18 place invariants in 1 ms
[2021-05-20 06:27:47] [INFO ] Implicit Places using invariants and state equation in 126 ms returned []
Implicit Place search using SMT with State Equation took 217 ms to find 0 implicit places.
// Phase 1: matrix 376 rows 205 cols
[2021-05-20 06:27:47] [INFO ] Computed 18 place invariants in 1 ms
[2021-05-20 06:27:47] [INFO ] Dead Transitions using invariants and state equation in 160 ms returned []
Finished structural reductions, in 1 iterations. Remains : 205/301 places, 376/472 transitions.
Stuttering acceptance computed with spot in 149 ms :[(OR (NOT p1) (NOT p2)), (OR (NOT p1) (NOT p2)), true, (NOT p1), (NOT p2)]
Running random walk in product with property : UtilityControlRoom-PT-Z4T4N08-11 automaton TGBA [mat=[[{ cond=true, acceptance={} source=0 dest: 1}], [{ cond=(AND (NOT p1) (NOT p0)), acceptance={} source=1 dest: 2}, { cond=(AND (NOT p1) p0), acceptance={} source=1 dest: 3}, { cond=(OR p1 p0), acceptance={} source=1 dest: 4}], [{ cond=true, acceptance={} source=2 dest: 2}], [{ cond=(AND (NOT p1) (NOT p0)), acceptance={} source=3 dest: 2}, { cond=(AND (NOT p1) p0), acceptance={} source=3 dest: 3}], [{ cond=(NOT p2), acceptance={} source=4 dest: 4}]], initial=0, aps=[p1:(AND (GEQ s119 1) (GEQ s167 1)), p0:(AND (GEQ s0 1) (GEQ s43 1) (GEQ s148 1)), p2:(AND (GEQ s138 1) (GEQ s172 1))], nbAcceptance=0, properties=[trans-labels, explicit-labels, trans-acc, no-univ-branch, very-weak, weak, inherently-weak], stateDesc=[null, null, null, null, null][false, false, false, false, false]]
Entered a terminal (fully accepting) state of product in 1 steps with 0 reset in 0 ms.
FORMULA UtilityControlRoom-PT-Z4T4N08-11 FALSE TECHNIQUES STUTTER_TEST
Treatment of property UtilityControlRoom-PT-Z4T4N08-11 finished in 549 ms.
Running Spot : CommandLine [args=[/home/mcc/BenchKit/bin//..//ltl2tgba, --hoaf=tv, -f, !(X(X((F((p0||X(p1))) U (p2||(X(p1)&&F(p3)))))))], workingDir=/home/mcc/execution]
Support contains 7 out of 301 places. Attempting structural reductions.
Starting structural reductions, iteration 0 : 301/301 places, 472/472 transitions.
Discarding 96 places :
Symmetric choice reduction at 0 with 96 rule applications. Total rules 96 place count 205 transition count 376
Iterating global reduction 0 with 96 rules applied. Total rules applied 192 place count 205 transition count 376
Applied a total of 192 rules in 3 ms. Remains 205 /301 variables (removed 96) and now considering 376/472 (removed 96) transitions.
// Phase 1: matrix 376 rows 205 cols
[2021-05-20 06:27:47] [INFO ] Computed 18 place invariants in 3 ms
[2021-05-20 06:27:47] [INFO ] Implicit Places using invariants in 60 ms returned []
// Phase 1: matrix 376 rows 205 cols
[2021-05-20 06:27:47] [INFO ] Computed 18 place invariants in 1 ms
[2021-05-20 06:27:48] [INFO ] Implicit Places using invariants and state equation in 142 ms returned []
Implicit Place search using SMT with State Equation took 204 ms to find 0 implicit places.
// Phase 1: matrix 376 rows 205 cols
[2021-05-20 06:27:48] [INFO ] Computed 18 place invariants in 2 ms
[2021-05-20 06:27:48] [INFO ] Dead Transitions using invariants and state equation in 138 ms returned []
Finished structural reductions, in 1 iterations. Remains : 205/301 places, 376/472 transitions.
Stuttering acceptance computed with spot in 211 ms :[(OR (AND (NOT p2) (NOT p3)) (AND (NOT p1) (NOT p2))), (OR (AND (NOT p2) (NOT p3)) (AND (NOT p1) (NOT p2))), (OR (AND (NOT p1) (NOT p2)) (AND (NOT p2) (NOT p3))), (AND (NOT p1) (NOT p2)), (AND (NOT p2) (NOT p3)), (AND (NOT p0) (NOT p1)), (AND (NOT p3) (NOT p0) (NOT p1))]
Running random walk in product with property : UtilityControlRoom-PT-Z4T4N08-12 automaton TGBA [mat=[[{ cond=true, acceptance={} source=0 dest: 1}], [{ cond=true, acceptance={} source=1 dest: 2}], [{ cond=(NOT p2), acceptance={} source=2 dest: 3}, { cond=(AND (NOT p2) (NOT p3)), acceptance={} source=2 dest: 4}, { cond=(AND (NOT p2) (NOT p0)), acceptance={} source=2 dest: 5}], [{ cond=(AND (NOT p2) (NOT p1)), acceptance={} source=3 dest: 3}, { cond=(AND (NOT p2) (NOT p3) (NOT p1)), acceptance={} source=3 dest: 4}, { cond=(AND (NOT p2) (NOT p0) (NOT p1)), acceptance={} source=3 dest: 5}], [{ cond=(AND (NOT p2) (NOT p3)), acceptance={} source=4 dest: 4}, { cond=(AND (NOT p2) (NOT p3) (NOT p0)), acceptance={} source=4 dest: 6}], [{ cond=(AND (NOT p0) (NOT p1)), acceptance={} source=5 dest: 5}], [{ cond=(AND (NOT p3) (NOT p0) (NOT p1)), acceptance={} source=6 dest: 6}]], initial=0, aps=[p2:(GEQ s154 1), p3:(AND (GEQ s2 1) (GEQ s12 1) (GEQ s148 1)), p0:(GEQ s141 1), p1:(AND (GEQ s3 1) (GEQ s27 1) (GEQ s148 1))], nbAcceptance=0, properties=[trans-labels, explicit-labels, trans-acc, no-univ-branch, very-weak, weak, inherently-weak], stateDesc=[null, null, null, null, null, null, null][false, false, false, false, false, false, false]]
Product exploration explored 100000 steps with 3838 reset in 338 ms.
Product exploration explored 100000 steps with 3924 reset in 276 ms.
Knowledge obtained : [(NOT p2), (NOT p3), (NOT p0), (NOT p1)]
Stuttering acceptance computed with spot in 211 ms :[(OR (AND (NOT p2) (NOT p3)) (AND (NOT p1) (NOT p2))), (OR (AND (NOT p2) (NOT p3)) (AND (NOT p1) (NOT p2))), (OR (AND (NOT p1) (NOT p2)) (AND (NOT p2) (NOT p3))), (AND (NOT p1) (NOT p2)), (AND (NOT p2) (NOT p3)), (AND (NOT p0) (NOT p1)), (AND (NOT p3) (NOT p0) (NOT p1))]
Product exploration explored 100000 steps with 3789 reset in 255 ms.
Product exploration explored 100000 steps with 3908 reset in 276 ms.
Applying partial POR strategy [false, false, false, true, true, true, true]
Stuttering acceptance computed with spot in 204 ms :[(OR (AND (NOT p2) (NOT p3)) (AND (NOT p1) (NOT p2))), (OR (AND (NOT p2) (NOT p3)) (AND (NOT p1) (NOT p2))), (OR (AND (NOT p1) (NOT p2)) (AND (NOT p2) (NOT p3))), (AND (NOT p1) (NOT p2)), (AND (NOT p2) (NOT p3)), (AND (NOT p0) (NOT p1)), (AND (NOT p3) (NOT p0) (NOT p1))]
Support contains 7 out of 205 places. Attempting structural reductions.
Property had overlarge support with respect to TGBA, discarding it for now.
Starting structural reductions, iteration 0 : 205/205 places, 376/376 transitions.
Performed 32 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 0 with 32 Pre rules applied. Total rules applied 0 place count 205 transition count 408
Deduced a syphon composed of 32 places in 1 ms
Iterating global reduction 0 with 32 rules applied. Total rules applied 32 place count 205 transition count 408
Performed 51 Post agglomeration using F-continuation condition.Transition count delta: -15
Deduced a syphon composed of 83 places in 0 ms
Iterating global reduction 0 with 51 rules applied. Total rules applied 83 place count 205 transition count 423
Ensure Unique test removed 32 transitions
Reduce isomorphic transitions removed 32 transitions.
Iterating post reduction 0 with 32 rules applied. Total rules applied 115 place count 205 transition count 391
Discarding 1 places :
Symmetric choice reduction at 1 with 1 rule applications. Total rules 116 place count 204 transition count 359
Deduced a syphon composed of 83 places in 0 ms
Iterating global reduction 1 with 1 rules applied. Total rules applied 117 place count 204 transition count 359
Discarding 22 places :
Symmetric choice reduction at 1 with 22 rule applications. Total rules 139 place count 182 transition count 323
Deduced a syphon composed of 69 places in 0 ms
Iterating global reduction 1 with 22 rules applied. Total rules applied 161 place count 182 transition count 323
Discarding 15 places :
Symmetric choice reduction at 1 with 15 rule applications. Total rules 176 place count 167 transition count 294
Deduced a syphon composed of 61 places in 0 ms
Iterating global reduction 1 with 15 rules applied. Total rules applied 191 place count 167 transition count 294
Ensure Unique test removed 10 transitions
Reduce isomorphic transitions removed 10 transitions.
Iterating post reduction 1 with 10 rules applied. Total rules applied 201 place count 167 transition count 284
Discarding 2 places :
Symmetric choice reduction at 2 with 2 rule applications. Total rules 203 place count 165 transition count 280
Deduced a syphon composed of 60 places in 0 ms
Iterating global reduction 2 with 2 rules applied. Total rules applied 205 place count 165 transition count 280
Ensure Unique test removed 2 transitions
Reduce isomorphic transitions removed 2 transitions.
Iterating post reduction 2 with 2 rules applied. Total rules applied 207 place count 165 transition count 278
Performed 2 Post agglomeration using F-continuation condition.Transition count delta: 0
Deduced a syphon composed of 62 places in 0 ms
Iterating global reduction 3 with 2 rules applied. Total rules applied 209 place count 165 transition count 278
Deduced a syphon composed of 62 places in 0 ms
Applied a total of 209 rules in 21 ms. Remains 165 /205 variables (removed 40) and now considering 278/376 (removed 98) transitions.
[2021-05-20 06:27:50] [INFO ] Redundant transitions in 0 ms returned []
// Phase 1: matrix 278 rows 165 cols
[2021-05-20 06:27:50] [INFO ] Computed 18 place invariants in 1 ms
[2021-05-20 06:27:50] [INFO ] Dead Transitions using invariants and state equation in 108 ms returned []
Finished structural reductions, in 1 iterations. Remains : 165/205 places, 278/376 transitions.
Product exploration explored 100000 steps with 4698 reset in 421 ms.
Stack based approach found an accepted trace after 17155 steps with 810 reset with depth 9 and stack size 6 in 75 ms.
FORMULA UtilityControlRoom-PT-Z4T4N08-12 FALSE TECHNIQUES STUTTER_TEST
Treatment of property UtilityControlRoom-PT-Z4T4N08-12 finished in 2969 ms.
Running Spot : CommandLine [args=[/home/mcc/BenchKit/bin//..//ltl2tgba, --hoaf=tv, -f, !(G(F((p0 U (p1||G(p0))))))], workingDir=/home/mcc/execution]
Support contains 4 out of 301 places. Attempting structural reductions.
Starting structural reductions, iteration 0 : 301/301 places, 472/472 transitions.
Performed 127 Post agglomeration using F-continuation condition.Transition count delta: 127
Iterating post reduction 0 with 127 rules applied. Total rules applied 127 place count 301 transition count 345
Reduce places removed 127 places and 0 transitions.
Ensure Unique test removed 32 transitions
Reduce isomorphic transitions removed 32 transitions.
Iterating post reduction 1 with 159 rules applied. Total rules applied 286 place count 174 transition count 313
Performed 32 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 2 with 32 Pre rules applied. Total rules applied 286 place count 174 transition count 281
Deduced a syphon composed of 32 places in 0 ms
Reduce places removed 32 places and 0 transitions.
Iterating global reduction 2 with 64 rules applied. Total rules applied 350 place count 142 transition count 281
Discarding 1 places :
Symmetric choice reduction at 2 with 1 rule applications. Total rules 351 place count 141 transition count 249
Iterating global reduction 2 with 1 rules applied. Total rules applied 352 place count 141 transition count 249
Discarding 8 places :
Symmetric choice reduction at 2 with 8 rule applications. Total rules 360 place count 133 transition count 241
Iterating global reduction 2 with 8 rules applied. Total rules applied 368 place count 133 transition count 241
Discarding 8 places :
Symmetric choice reduction at 2 with 8 rule applications. Total rules 376 place count 125 transition count 225
Iterating global reduction 2 with 8 rules applied. Total rules applied 384 place count 125 transition count 225
Discarding 7 places :
Symmetric choice reduction at 2 with 7 rule applications. Total rules 391 place count 118 transition count 204
Iterating global reduction 2 with 7 rules applied. Total rules applied 398 place count 118 transition count 204
Ensure Unique test removed 7 transitions
Reduce isomorphic transitions removed 7 transitions.
Iterating post reduction 2 with 7 rules applied. Total rules applied 405 place count 118 transition count 197
Performed 23 Post agglomeration using F-continuation condition.Transition count delta: 23
Deduced a syphon composed of 23 places in 0 ms
Reduce places removed 23 places and 0 transitions.
Iterating global reduction 3 with 46 rules applied. Total rules applied 451 place count 95 transition count 174
Performed 1 Post agglomeration using F-continuation condition.Transition count delta: 1
Deduced a syphon composed of 1 places in 0 ms
Reduce places removed 1 places and 0 transitions.
Iterating global reduction 3 with 2 rules applied. Total rules applied 453 place count 94 transition count 173
Applied a total of 453 rules in 18 ms. Remains 94 /301 variables (removed 207) and now considering 173/472 (removed 299) transitions.
// Phase 1: matrix 173 rows 94 cols
[2021-05-20 06:27:50] [INFO ] Computed 18 place invariants in 1 ms
[2021-05-20 06:27:50] [INFO ] Implicit Places using invariants in 39 ms returned []
// Phase 1: matrix 173 rows 94 cols
[2021-05-20 06:27:50] [INFO ] Computed 18 place invariants in 1 ms
[2021-05-20 06:27:50] [INFO ] Implicit Places using invariants and state equation in 64 ms returned []
Implicit Place search using SMT with State Equation took 104 ms to find 0 implicit places.
[2021-05-20 06:27:50] [INFO ] Redundant transitions in 0 ms returned []
// Phase 1: matrix 173 rows 94 cols
[2021-05-20 06:27:50] [INFO ] Computed 18 place invariants in 1 ms
[2021-05-20 06:27:50] [INFO ] Dead Transitions using invariants and state equation in 62 ms returned []
Finished structural reductions, in 1 iterations. Remains : 94/301 places, 173/472 transitions.
Stuttering acceptance computed with spot in 42 ms :[(AND (NOT p1) (NOT p0)), (AND (NOT p1) (NOT p0))]
Running random walk in product with property : UtilityControlRoom-PT-Z4T4N08-13 automaton TGBA [mat=[[{ cond=true, acceptance={} source=0 dest: 0}, { cond=(AND (NOT p1) (NOT p0)), acceptance={} source=0 dest: 1}], [{ cond=(AND (NOT p1) (NOT p0)), acceptance={0} source=1 dest: 1}, { cond=(AND (NOT p1) p0), acceptance={} source=1 dest: 1}]], initial=0, aps=[p1:(AND (LT s59 1) (OR (LT s1 1) (LT s20 1) (LT s61 1))), p0:(LT s59 1)], nbAcceptance=1, properties=[trans-labels, explicit-labels, trans-acc, no-univ-branch, stutter-invariant], stateDesc=[null, null][true, true]]
Product exploration explored 100000 steps with 233 reset in 325 ms.
Stack based approach found an accepted trace after 26676 steps with 55 reset with depth 381 and stack size 380 in 93 ms.
FORMULA UtilityControlRoom-PT-Z4T4N08-13 FALSE TECHNIQUES STUTTER_TEST
Treatment of property UtilityControlRoom-PT-Z4T4N08-13 finished in 659 ms.
Running Spot : CommandLine [args=[/home/mcc/BenchKit/bin//..//ltl2tgba, --hoaf=tv, -f, !((F(p0)&&G((F(p1)&&F(G(p2))))))], workingDir=/home/mcc/execution]
Support contains 5 out of 301 places. Attempting structural reductions.
Starting structural reductions, iteration 0 : 301/301 places, 472/472 transitions.
Performed 128 Post agglomeration using F-continuation condition.Transition count delta: 128
Iterating post reduction 0 with 128 rules applied. Total rules applied 128 place count 301 transition count 344
Reduce places removed 128 places and 0 transitions.
Ensure Unique test removed 32 transitions
Reduce isomorphic transitions removed 32 transitions.
Iterating post reduction 1 with 160 rules applied. Total rules applied 288 place count 173 transition count 312
Performed 32 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 2 with 32 Pre rules applied. Total rules applied 288 place count 173 transition count 280
Deduced a syphon composed of 32 places in 0 ms
Reduce places removed 32 places and 0 transitions.
Iterating global reduction 2 with 64 rules applied. Total rules applied 352 place count 141 transition count 280
Discarding 2 places :
Symmetric choice reduction at 2 with 2 rule applications. Total rules 354 place count 139 transition count 216
Iterating global reduction 2 with 2 rules applied. Total rules applied 356 place count 139 transition count 216
Discarding 16 places :
Symmetric choice reduction at 2 with 16 rule applications. Total rules 372 place count 123 transition count 200
Iterating global reduction 2 with 16 rules applied. Total rules applied 388 place count 123 transition count 200
Discarding 16 places :
Symmetric choice reduction at 2 with 16 rule applications. Total rules 404 place count 107 transition count 168
Iterating global reduction 2 with 16 rules applied. Total rules applied 420 place count 107 transition count 168
Discarding 15 places :
Symmetric choice reduction at 2 with 15 rule applications. Total rules 435 place count 92 transition count 138
Iterating global reduction 2 with 15 rules applied. Total rules applied 450 place count 92 transition count 138
Ensure Unique test removed 15 transitions
Reduce isomorphic transitions removed 15 transitions.
Iterating post reduction 2 with 15 rules applied. Total rules applied 465 place count 92 transition count 123
Performed 15 Post agglomeration using F-continuation condition.Transition count delta: 15
Deduced a syphon composed of 15 places in 0 ms
Reduce places removed 15 places and 0 transitions.
Iterating global reduction 3 with 30 rules applied. Total rules applied 495 place count 77 transition count 108
Performed 1 Post agglomeration using F-continuation condition.Transition count delta: 1
Deduced a syphon composed of 1 places in 0 ms
Reduce places removed 1 places and 0 transitions.
Iterating global reduction 3 with 2 rules applied. Total rules applied 497 place count 76 transition count 107
Applied a total of 497 rules in 17 ms. Remains 76 /301 variables (removed 225) and now considering 107/472 (removed 365) transitions.
// Phase 1: matrix 107 rows 76 cols
[2021-05-20 06:27:51] [INFO ] Computed 18 place invariants in 1 ms
[2021-05-20 06:27:51] [INFO ] Implicit Places using invariants in 108 ms returned []
// Phase 1: matrix 107 rows 76 cols
[2021-05-20 06:27:51] [INFO ] Computed 18 place invariants in 1 ms
[2021-05-20 06:27:51] [INFO ] Implicit Places using invariants and state equation in 50 ms returned []
Implicit Place search using SMT with State Equation took 168 ms to find 0 implicit places.
[2021-05-20 06:27:51] [INFO ] Redundant transitions in 0 ms returned []
// Phase 1: matrix 107 rows 76 cols
[2021-05-20 06:27:51] [INFO ] Computed 18 place invariants in 0 ms
[2021-05-20 06:27:51] [INFO ] Dead Transitions using invariants and state equation in 42 ms returned []
Finished structural reductions, in 1 iterations. Remains : 76/301 places, 107/472 transitions.
Stuttering acceptance computed with spot in 131 ms :[(OR (NOT p0) (NOT p1) (NOT p2)), (NOT p0), (NOT p1), (NOT p2), (OR (NOT p1) (NOT p2))]
Running random walk in product with property : UtilityControlRoom-PT-Z4T4N08-14 automaton TGBA [mat=[[{ cond=(NOT p0), acceptance={} source=0 dest: 1}, { cond=(NOT p1), acceptance={} source=0 dest: 2}, { cond=(NOT p2), acceptance={} source=0 dest: 3}, { cond=true, acceptance={} source=0 dest: 4}], [{ cond=(NOT p0), acceptance={0} source=1 dest: 1}], [{ cond=(NOT p1), acceptance={0} source=2 dest: 2}], [{ cond=(NOT p2), acceptance={0} source=3 dest: 3}, { cond=p2, acceptance={} source=3 dest: 3}], [{ cond=(NOT p1), acceptance={} source=4 dest: 2}, { cond=(NOT p2), acceptance={} source=4 dest: 3}, { cond=true, acceptance={} source=4 dest: 4}]], initial=0, aps=[p0:(OR (LT s0 1) (LT s22 1) (LT s43 1)), p1:(LT s3 1), p2:(LT s7 1)], nbAcceptance=1, properties=[trans-labels, explicit-labels, trans-acc, no-univ-branch, stutter-invariant], stateDesc=[null, null, null, null, null][true, true, true, true, true]]
Product exploration explored 100000 steps with 1 reset in 237 ms.
Stack based approach found an accepted trace after 14147 steps with 2 reset with depth 14122 and stack size 14115 in 40 ms.
FORMULA UtilityControlRoom-PT-Z4T4N08-14 FALSE TECHNIQUES STUTTER_TEST
Treatment of property UtilityControlRoom-PT-Z4T4N08-14 finished in 658 ms.
Using solver Z3 to compute partial order matrices.
Built C files in :
/tmp/ltsmin3974324288309690575
[2021-05-20 06:27:52] [INFO ] Computing symmetric may disable matrix : 472 transitions.
[2021-05-20 06:27:52] [INFO ] Applying decomposition
[2021-05-20 06:27:52] [INFO ] Computation of Complete disable matrix. took 9 ms. Total solver calls (SAT/UNSAT): 0(0/0)
[2021-05-20 06:27:52] [INFO ] Flatten gal took : 14 ms
[2021-05-20 06:27:52] [INFO ] Computing symmetric may enable matrix : 472 transitions.
[2021-05-20 06:27:52] [INFO ] Computation of Complete enable matrix. took 3 ms. Total solver calls (SAT/UNSAT): 0(0/0)
Converted graph to binary with : CommandLine [args=[/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.louvain.binaries_1.0.0.202104292328/bin/convert-linux64, -i, /tmp/graph15799337824851469634.txt, -o, /tmp/graph15799337824851469634.bin, -w, /tmp/graph15799337824851469634.weights], workingDir=null]
Built communities with : CommandLine [args=[/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.louvain.binaries_1.0.0.202104292328/bin/louvain-linux64, /tmp/graph15799337824851469634.bin, -l, -1, -v, -w, /tmp/graph15799337824851469634.weights, -q, 0, -e, 0.001], workingDir=null]
[2021-05-20 06:27:52] [INFO ] Decomposing Gal with order
[2021-05-20 06:27:52] [INFO ] Rewriting arrays to variables to allow decomposition.
[2021-05-20 06:27:52] [INFO ] Removed a total of 421 redundant transitions.
[2021-05-20 06:27:52] [INFO ] Computing Do-Not-Accords matrix : 472 transitions.
[2021-05-20 06:27:52] [INFO ] Flatten gal took : 68 ms
[2021-05-20 06:27:52] [INFO ] Fuse similar labels procedure discarded/fused a total of 268 labels/synchronizations in 10 ms.
[2021-05-20 06:27:52] [INFO ] Computation of Completed DNA matrix. took 37 ms. Total solver calls (SAT/UNSAT): 0(0/0)
[2021-05-20 06:27:52] [INFO ] Built C files in 200ms conformant to PINS (ltsmin variant)in folder :/tmp/ltsmin3974324288309690575
Running compilation step : CommandLine [args=[gcc, -c, -I/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.ltsmin.binaries_1.0.0.202104292328/bin/include/, -I., -std=c99, -fPIC, -O2, model.c], workingDir=/tmp/ltsmin3974324288309690575]
[2021-05-20 06:27:52] [INFO ] Time to serialize gal into /tmp/LTLFireability5602691611184851908.gal : 23 ms
[2021-05-20 06:27:52] [INFO ] Time to serialize properties into /tmp/LTLFireability5847636689113513140.ltl : 1 ms
Invoking ITS tools like this :CommandLine [args=[/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.202104292328/bin/its-ltl-linux64, --gc-threshold, 2000000, -i, /tmp/LTLFireability5602691611184851908.gal, -t, CGAL, -LTL, /tmp/LTLFireability5847636689113513140.ltl, -c, -stutter-deadlock], workingDir=/home/mcc/execution]

its-ltl command run as :

/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.202104292328/bin/its-ltl-linux64 --gc-threshold 2000000 -i /tmp/LTLFireability5602691611184851908.gal -t CGAL -LTL /tmp/LTLFireability5847636689113513140.ltl -c -stutter-deadlock
Read 1 LTL properties
Checking formula 0 : !(((F(!("((((((((i1.u51.Finished_0<1)&&(i0.i0.u0.Finished_1<1))&&(i8.u43.Finished_6<1))&&(i4.i1.u44.Finished_7<1))&&(i2.u46.Finished_2<1))&&(i6.u47.Finished_3<1))&&(i9.u41.Finished_4<1))&&(i7.u42.Finished_5<1))")))||(G((X("((((((((((((((((((((((((((((((((i7.u16.Assigned_5_1>=1)||(i7.u26.Assigned_5_0>=1))||(i7.u18.Assigned_5_3>=1))||(i7.u17.Assigned_5_2>=1))||(i8.u37.Assigned_6_1>=1))||(i8.u19.Assigned_6_0>=1))||(i8.u21.Assigned_6_3>=1))||(i8.u20.Assigned_6_2>=1))||(i4.i1.u23.Assigned_7_1>=1))||(i4.i1.u22.Assigned_7_0>=1))||(i4.i0.u25.Assigned_7_3>=1))||(i4.i1.u24.Assigned_7_2>=1))||(i1.u1.Assigned_0_1>=1))||(i1.u27.Assigned_0_0>=1))||(i1.u3.Assigned_0_3>=1))||(i1.u2.Assigned_0_2>=1))||(u28.Assigned_1_1>=1))||(u4.Assigned_1_0>=1))||(i0.i0.u6.Assigned_1_3>=1))||(i0.i1.u5.Assigned_1_2>=1))||(i2.u30.Assigned_2_1>=1))||(i2.u7.Assigned_2_0>=1))||(i2.u9.Assigned_2_3>=1))||(i2.u8.Assigned_2_2>=1))||(i6.u10.Assigned_3_1>=1))||(i6.u31.Assigned_3_0>=1))||(i6.u11.Assigned_3_3>=1))||(i6.u32.Assigned_3_2>=1))||(i9.u13.Assigned_4_1>=1))||(i9.u12.Assigned_4_0>=1))||(i9.u15.Assigned_4_3>=1))||(i9.u14.Assigned_4_2>=1))"))||(F(!("((((((((((((((((((((((((((((((((((i0.i0.u53.IdleTechs_0>=1)&&(i1.u27.OpenRequests_0_0>=1))&&(u4.Idles>=1))||(((i0.i1.u29.IdleTechs_2>=1)&&(i6.u32.OpenRequests_3_2>=1))&&(u4.Idles>=1)))||(((u28.IdleTechs_1>=1)&&(i7.u16.OpenRequests_5_1>=1))&&(u4.Idles>=1)))||(((i4.i0.u40.IdleTechs_3>=1)&&(i4.i0.u25.OpenRequests_7_3>=1))&&(u4.Idles>=1)))||(((i0.i0.u53.IdleTechs_0>=1)&&(i7.u26.OpenRequests_5_0>=1))&&(u4.Idles>=1)))||(((u28.IdleTechs_1>=1)&&(i9.u13.OpenRequests_4_1>=1))&&(u4.Idles>=1)))||(((i0.i0.u53.IdleTechs_0>=1)&&(i8.u19.OpenRequests_6_0>=1))&&(u4.Idles>=1)))||(((i0.i1.u29.IdleTechs_2>=1)&&(i2.u8.OpenRequests_2_2>=1))&&(u4.Idles>=1)))||(((i0.i0.u53.IdleTechs_0>=1)&&(i4.i1.u22.OpenRequests_7_0>=1))&&(u4.Idles>=1)))||(((i4.i0.u40.IdleTechs_3>=1)&&(i0.i0.u6.OpenRequests_1_3>=1))&&(u4.Idles>=1)))||(((u28.IdleTechs_1>=1)&&(i8.u37.OpenRequests_6_1>=1))&&(u4.Idles>=1)))||(((i0.i1.u29.IdleTechs_2>=1)&&(i4.i1.u24.OpenRequests_7_2>=1))&&(u4.Idles>=1)))||(((i4.i0.u40.IdleTechs_3>=1)&&(i9.u15.OpenRequests_4_3>=1))&&(u4.Idles>=1)))||(((i0.i1.u29.IdleTechs_2>=1)&&(i9.u14.OpenRequests_4_2>=1))&&(u4.Idles>=1)))||(((i4.i0.u40.IdleTechs_3>=1)&&(i6.u11.OpenRequests_3_3>=1))&&(u4.Idles>=1)))||(((u28.IdleTechs_1>=1)&&(i4.i1.u23.OpenRequests_7_1>=1))&&(u4.Idles>=1)))||(((i0.i1.u29.IdleTechs_2>=1)&&(i7.u17.OpenRequests_5_2>=1))&&(u4.Idles>=1)))||(((i4.i0.u40.IdleTechs_3>=1)&&(i2.u9.OpenRequests_2_3>=1))&&(u4.Idles>=1)))||(((i0.i0.u53.IdleTechs_0>=1)&&(i6.u31.OpenRequests_3_0>=1))&&(u4.Idles>=1)))||(((u28.IdleTechs_1>=1)&&(i2.u30.OpenRequests_2_1>=1))&&(u4.Idles>=1)))||(((i0.i1.u29.IdleTechs_2>=1)&&(i8.u20.OpenRequests_6_2>=1))&&(u4.Idles>=1)))||(((i4.i0.u40.IdleTechs_3>=1)&&(i7.u18.OpenRequests_5_3>=1))&&(u4.Idles>=1)))||(((i4.i0.u40.IdleTechs_3>=1)&&(i1.u3.OpenRequests_0_3>=1))&&(u4.Idles>=1)))||(((u28.IdleTechs_1>=1)&&(u28.OpenRequests_1_1>=1))&&(u4.Idles>=1)))||(((i0.i1.u29.IdleTechs_2>=1)&&(i0.i1.u5.OpenRequests_1_2>=1))&&(u4.Idles>=1)))||(((i4.i0.u40.IdleTechs_3>=1)&&(i8.u21.OpenRequests_6_3>=1))&&(u4.Idles>=1)))||(((u28.IdleTechs_1>=1)&&(i6.u10.OpenRequests_3_1>=1))&&(u4.Idles>=1)))||(((i0.i1.u29.IdleTechs_2>=1)&&(i1.u2.OpenRequests_0_2>=1))&&(u4.Idles>=1)))||(((i0.i0.u53.IdleTechs_0>=1)&&(i9.u12.OpenRequests_4_0>=1))&&(u4.Idles>=1)))||(((u28.IdleTechs_1>=1)&&(i1.u1.OpenRequests_0_1>=1))&&(u4.Idles>=1)))||(((i0.i0.u53.IdleTechs_0>=1)&&(i2.u7.OpenRequests_2_0>=1))&&(u4.Idles>=1)))||(((i0.i0.u53.IdleTechs_0>=1)&&(u4.OpenRequests_1_0>=1))&&(u4.Idles>=1)))")))))))
Formula 0 simplified : !(F!"((((((((i1.u51.Finished_0<1)&&(i0.i0.u0.Finished_1<1))&&(i8.u43.Finished_6<1))&&(i4.i1.u44.Finished_7<1))&&(i2.u46.Finished_2<1))&&(i6.u47.Finished_3<1))&&(i9.u41.Finished_4<1))&&(i7.u42.Finished_5<1))" | G(X"((((((((((((((((((((((((((((((((i7.u16.Assigned_5_1>=1)||(i7.u26.Assigned_5_0>=1))||(i7.u18.Assigned_5_3>=1))||(i7.u17.Assigned_5_2>=1))||(i8.u37.Assigned_6_1>=1))||(i8.u19.Assigned_6_0>=1))||(i8.u21.Assigned_6_3>=1))||(i8.u20.Assigned_6_2>=1))||(i4.i1.u23.Assigned_7_1>=1))||(i4.i1.u22.Assigned_7_0>=1))||(i4.i0.u25.Assigned_7_3>=1))||(i4.i1.u24.Assigned_7_2>=1))||(i1.u1.Assigned_0_1>=1))||(i1.u27.Assigned_0_0>=1))||(i1.u3.Assigned_0_3>=1))||(i1.u2.Assigned_0_2>=1))||(u28.Assigned_1_1>=1))||(u4.Assigned_1_0>=1))||(i0.i0.u6.Assigned_1_3>=1))||(i0.i1.u5.Assigned_1_2>=1))||(i2.u30.Assigned_2_1>=1))||(i2.u7.Assigned_2_0>=1))||(i2.u9.Assigned_2_3>=1))||(i2.u8.Assigned_2_2>=1))||(i6.u10.Assigned_3_1>=1))||(i6.u31.Assigned_3_0>=1))||(i6.u11.Assigned_3_3>=1))||(i6.u32.Assigned_3_2>=1))||(i9.u13.Assigned_4_1>=1))||(i9.u12.Assigned_4_0>=1))||(i9.u15.Assigned_4_3>=1))||(i9.u14.Assigned_4_2>=1))" | F!"((((((((((((((((((((((((((((((((((i0.i0.u53.IdleTechs_0>=1)&&(i1.u27.OpenRequests_0_0>=1))&&(u4.Idles>=1))||(((i0.i1.u29.IdleTechs_2>=1)&&(i6.u32.OpenRequests_3_2>=1))&&(u4.Idles>=1)))||(((u28.IdleTechs_1>=1)&&(i7.u16.OpenRequests_5_1>=1))&&(u4.Idles>=1)))||(((i4.i0.u40.IdleTechs_3>=1)&&(i4.i0.u25.OpenRequests_7_3>=1))&&(u4.Idles>=1)))||(((i0.i0.u53.IdleTechs_0>=1)&&(i7.u26.OpenRequests_5_0>=1))&&(u4.Idles>=1)))||(((u28.IdleTechs_1>=1)&&(i9.u13.OpenRequests_4_1>=1))&&(u4.Idles>=1)))||(((i0.i0.u53.IdleTechs_0>=1)&&(i8.u19.OpenRequests_6_0>=1))&&(u4.Idles>=1)))||(((i0.i1.u29.IdleTechs_2>=1)&&(i2.u8.OpenRequests_2_2>=1))&&(u4.Idles>=1)))||(((i0.i0.u53.IdleTechs_0>=1)&&(i4.i1.u22.OpenRequests_7_0>=1))&&(u4.Idles>=1)))||(((i4.i0.u40.IdleTechs_3>=1)&&(i0.i0.u6.OpenRequests_1_3>=1))&&(u4.Idles>=1)))||(((u28.IdleTechs_1>=1)&&(i8.u37.OpenRequests_6_1>=1))&&(u4.Idles>=1)))||(((i0.i1.u29.IdleTechs_2>=1)&&(i4.i1.u24.OpenRequests_7_2>=1))&&(u4.Idles>=1)))||(((i4.i0.u40.IdleTechs_3>=1)&&(i9.u15.OpenRequests_4_3>=1))&&(u4.Idles>=1)))||(((i0.i1.u29.IdleTechs_2>=1)&&(i9.u14.OpenRequests_4_2>=1))&&(u4.Idles>=1)))||(((i4.i0.u40.IdleTechs_3>=1)&&(i6.u11.OpenRequests_3_3>=1))&&(u4.Idles>=1)))||(((u28.IdleTechs_1>=1)&&(i4.i1.u23.OpenRequests_7_1>=1))&&(u4.Idles>=1)))||(((i0.i1.u29.IdleTechs_2>=1)&&(i7.u17.OpenRequests_5_2>=1))&&(u4.Idles>=1)))||(((i4.i0.u40.IdleTechs_3>=1)&&(i2.u9.OpenRequests_2_3>=1))&&(u4.Idles>=1)))||(((i0.i0.u53.IdleTechs_0>=1)&&(i6.u31.OpenRequests_3_0>=1))&&(u4.Idles>=1)))||(((u28.IdleTechs_1>=1)&&(i2.u30.OpenRequests_2_1>=1))&&(u4.Idles>=1)))||(((i0.i1.u29.IdleTechs_2>=1)&&(i8.u20.OpenRequests_6_2>=1))&&(u4.Idles>=1)))||(((i4.i0.u40.IdleTechs_3>=1)&&(i7.u18.OpenRequests_5_3>=1))&&(u4.Idles>=1)))||(((i4.i0.u40.IdleTechs_3>=1)&&(i1.u3.OpenRequests_0_3>=1))&&(u4.Idles>=1)))||(((u28.IdleTechs_1>=1)&&(u28.OpenRequests_1_1>=1))&&(u4.Idles>=1)))||(((i0.i1.u29.IdleTechs_2>=1)&&(i0.i1.u5.OpenRequests_1_2>=1))&&(u4.Idles>=1)))||(((i4.i0.u40.IdleTechs_3>=1)&&(i8.u21.OpenRequests_6_3>=1))&&(u4.Idles>=1)))||(((u28.IdleTechs_1>=1)&&(i6.u10.OpenRequests_3_1>=1))&&(u4.Idles>=1)))||(((i0.i1.u29.IdleTechs_2>=1)&&(i1.u2.OpenRequests_0_2>=1))&&(u4.Idles>=1)))||(((i0.i0.u53.IdleTechs_0>=1)&&(i9.u12.OpenRequests_4_0>=1))&&(u4.Idles>=1)))||(((u28.IdleTechs_1>=1)&&(i1.u1.OpenRequests_0_1>=1))&&(u4.Idles>=1)))||(((i0.i0.u53.IdleTechs_0>=1)&&(i2.u7.OpenRequests_2_0>=1))&&(u4.Idles>=1)))||(((i0.i0.u53.IdleTechs_0>=1)&&(u4.OpenRequests_1_0>=1))&&(u4.Idles>=1)))"))
Reverse transition relation is exact ! Faster fixpoint algorithm enabled.
Compilation finished in 2602 ms.
Running link step : CommandLine [args=[gcc, -shared, -o, gal.so, model.o], workingDir=/tmp/ltsmin3974324288309690575]
Link finished in 63 ms.
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.ltsmin.binaries_1.0.0.202104292328/bin/pins2lts-mc-linux64, ./gal.so, --threads=8, --when, --ltl, (<>((LTLAPp0==true))||[]((X((LTLAPp1==true))||<>((LTLAPp2==true))))), --buchi-type=spotba], workingDir=/tmp/ltsmin3974324288309690575]
WARNING : LTSmin timed out (>276 s) on command CommandLine [args=[/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.ltsmin.binaries_1.0.0.202104292328/bin/pins2lts-mc-linux64, ./gal.so, --threads=8, --when, --ltl, (<>((LTLAPp0==true))||[]((X((LTLAPp1==true))||<>((LTLAPp2==true))))), --buchi-type=spotba], workingDir=/tmp/ltsmin3974324288309690575]
Retrying LTSmin with larger timeout 2208 s
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.ltsmin.binaries_1.0.0.202104292328/bin/pins2lts-mc-linux64, ./gal.so, --threads=8, --when, --ltl, (<>((LTLAPp0==true))||[]((X((LTLAPp1==true))||<>((LTLAPp2==true))))), --buchi-type=spotba], workingDir=/tmp/ltsmin3974324288309690575]
pins2lts-mc-linux64, 0.000: Registering PINS so language module
pins2lts-mc-linux64( 3/ 8), 0.001: library has no initializer
pins2lts-mc-linux64( 2/ 8), 0.001: library has no initializer
pins2lts-mc-linux64( 3/ 8), 0.001: loading model GAL
pins2lts-mc-linux64( 2/ 8), 0.001: loading model GAL
pins2lts-mc-linux64( 0/ 8), 0.001: Loading model from ./gal.so
pins2lts-mc-linux64( 0/ 8), 0.001: library has no initializer
pins2lts-mc-linux64( 0/ 8), 0.001: loading model GAL
pins2lts-mc-linux64( 1/ 8), 0.001: library has no initializer
pins2lts-mc-linux64( 1/ 8), 0.002: loading model GAL
pins2lts-mc-linux64( 5/ 8), 0.001: library has no initializer
pins2lts-mc-linux64( 5/ 8), 0.001: loading model GAL
pins2lts-mc-linux64( 7/ 8), 0.001: library has no initializer
pins2lts-mc-linux64( 7/ 8), 0.001: loading model GAL
pins2lts-mc-linux64( 4/ 8), 0.001: library has no initializer
pins2lts-mc-linux64( 4/ 8), 0.001: loading model GAL
pins2lts-mc-linux64( 6/ 8), 0.001: library has no initializer
pins2lts-mc-linux64( 6/ 8), 0.002: loading model GAL
pins2lts-mc-linux64( 0/ 8), 0.018: completed loading model GAL
pins2lts-mc-linux64( 2/ 8), 0.018: completed loading model GAL
pins2lts-mc-linux64( 0/ 8), 0.019: LTL layer: formula: (<>((LTLAPp0==true))||[]((X((LTLAPp1==true))||<>((LTLAPp2==true)))))
pins2lts-mc-linux64( 1/ 8), 0.021: completed loading model GAL
pins2lts-mc-linux64( 5/ 8), 0.021: completed loading model GAL
pins2lts-mc-linux64( 0/ 8), 0.022: "(<>((LTLAPp0==true))||[]((X((LTLAPp1==true))||<>((LTLAPp2==true)))))" is not a file, parsing as formula...
pins2lts-mc-linux64( 3/ 8), 0.022: completed loading model GAL
pins2lts-mc-linux64( 0/ 8), 0.022: Using Spin LTL semantics
pins2lts-mc-linux64( 4/ 8), 0.023: completed loading model GAL
pins2lts-mc-linux64( 6/ 8), 0.025: completed loading model GAL
pins2lts-mc-linux64( 7/ 8), 0.031: completed loading model GAL
pins2lts-mc-linux64( 0/ 8), 0.034: buchi has 3 states
pins2lts-mc-linux64( 0/ 8), 0.035: Weak Buchi automaton detected, adding non-accepting as progress label.
pins2lts-mc-linux64( 0/ 8), 0.311: DFS-FIFO for weak LTL, using special progress label 476
pins2lts-mc-linux64( 0/ 8), 0.311: There are 477 state labels and 1 edge labels
pins2lts-mc-linux64( 0/ 8), 0.311: State length is 302, there are 476 groups
pins2lts-mc-linux64( 0/ 8), 0.311: Running dfsfifo using 8 cores
pins2lts-mc-linux64( 0/ 8), 0.311: Using a tree table with 2^27 elements
pins2lts-mc-linux64( 0/ 8), 0.311: Successor permutation: rr
pins2lts-mc-linux64( 0/ 8), 0.311: Global bits: 2, count bits: 0, local bits: 0
pins2lts-mc-linux64( 6/ 8), 0.458: ~34 levels ~960 states ~5208 transitions
pins2lts-mc-linux64( 6/ 8), 0.461: ~34 levels ~1920 states ~6208 transitions
pins2lts-mc-linux64( 6/ 8), 0.476: ~34 levels ~3840 states ~8552 transitions
pins2lts-mc-linux64( 6/ 8), 0.496: ~34 levels ~7680 states ~13440 transitions
pins2lts-mc-linux64( 3/ 8), 0.553: ~33 levels ~15360 states ~24368 transitions
pins2lts-mc-linux64( 6/ 8), 0.663: ~34 levels ~30720 states ~45080 transitions
pins2lts-mc-linux64( 3/ 8), 0.883: ~33 levels ~61440 states ~88936 transitions
pins2lts-mc-linux64( 0/ 8), 1.187: ~34 levels ~122880 states ~172960 transitions
pins2lts-mc-linux64( 7/ 8), 2.325: ~35 levels ~245760 states ~354752 transitions
pins2lts-mc-linux64( 7/ 8), 4.259: ~35 levels ~491520 states ~720720 transitions
pins2lts-mc-linux64( 4/ 8), 8.095: ~33 levels ~983040 states ~1491112 transitions
pins2lts-mc-linux64( 4/ 8), 15.618: ~33 levels ~1966080 states ~3177432 transitions
pins2lts-mc-linux64( 4/ 8), 32.114: ~33 levels ~3932160 states ~6663048 transitions
pins2lts-mc-linux64( 4/ 8), 66.668: ~33 levels ~7864320 states ~13901776 transitions
pins2lts-mc-linux64( 5/ 8), 135.139: ~34 levels ~15728640 states ~26525360 transitions
pins2lts-mc-linux64( 4/ 8), 272.478: ~35 levels ~31457280 states ~58434088 transitions
pins2lts-mc-linux64( 0/ 8), 471.109: Error: tree leafs table full! Change -s/--ratio.
pins2lts-mc-linux64( 0/ 8), 471.199:
pins2lts-mc-linux64( 0/ 8), 471.199: mean standard work distribution: 1.7% (states) 3.0% (transitions)
pins2lts-mc-linux64( 0/ 8), 471.199:
pins2lts-mc-linux64( 0/ 8), 471.199: Explored 51225989 states 96780250 transitions, fanout: 1.889
pins2lts-mc-linux64( 0/ 8), 471.199: Total exploration time 470.880 sec (470.790 sec minimum, 470.823 sec on average)
pins2lts-mc-linux64( 0/ 8), 471.199: States per second: 108788, Transitions per second: 205531
pins2lts-mc-linux64( 0/ 8), 471.199:
pins2lts-mc-linux64( 0/ 8), 471.199: Progress states detected: 1856
pins2lts-mc-linux64( 0/ 8), 471.199: Redundant explorations: -0.0091
pins2lts-mc-linux64( 0/ 8), 471.199:
pins2lts-mc-linux64( 0/ 8), 471.199: Queue width: 8B, total height: 2986, memory: 0.02MB
pins2lts-mc-linux64( 0/ 8), 471.199: Tree memory: 646.9MB, 13.2 B/state, compr.: 1.1%
pins2lts-mc-linux64( 0/ 8), 471.199: Tree fill ratio (roots/leafs): 38.0%/99.0%
pins2lts-mc-linux64( 0/ 8), 471.199: Stored 488 string chucks using 0MB
pins2lts-mc-linux64( 0/ 8), 471.199: Total memory used for chunk indexing: 0MB
pins2lts-mc-linux64( 0/ 8), 471.199: Est. total memory use: 646.9MB (~1024.0MB paged-in)
WARNING : LTS min runner thread failed on error :java.lang.RuntimeException: Unexpected exception when executing ltsmin :CommandLine [args=[/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.ltsmin.binaries_1.0.0.202104292328/bin/pins2lts-mc-linux64, ./gal.so, --threads=8, --when, --ltl, (<>((LTLAPp0==true))||[]((X((LTLAPp1==true))||<>((LTLAPp2==true))))), --buchi-type=spotba], workingDir=/tmp/ltsmin3974324288309690575]
255
java.lang.RuntimeException: Unexpected exception when executing ltsmin :CommandLine [args=[/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.ltsmin.binaries_1.0.0.202104292328/bin/pins2lts-mc-linux64, ./gal.so, --threads=8, --when, --ltl, (<>((LTLAPp0==true))||[]((X((LTLAPp1==true))||<>((LTLAPp2==true))))), --buchi-type=spotba], workingDir=/tmp/ltsmin3974324288309690575]
255
at fr.lip6.move.gal.application.LTSminRunner.checkProperty(LTSminRunner.java:214)
at fr.lip6.move.gal.application.LTSminRunner.access$10(LTSminRunner.java:165)
at fr.lip6.move.gal.application.LTSminRunner$1.checkProperties(LTSminRunner.java:154)
at fr.lip6.move.gal.application.LTSminRunner$1.run(LTSminRunner.java:102)
at java.base/java.lang.Thread.run(Thread.java:834)
Detected timeout of ITS tools.
[2021-05-20 06:48:27] [INFO ] Flatten gal took : 15 ms
[2021-05-20 06:48:27] [INFO ] Time to serialize gal into /tmp/LTLFireability3479501065217289918.gal : 3 ms
[2021-05-20 06:48:27] [INFO ] Time to serialize properties into /tmp/LTLFireability6996816704068223504.ltl : 1 ms
Invoking ITS tools like this :CommandLine [args=[/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.202104292328/bin/its-ltl-linux64, --gc-threshold, 2000000, -i, /tmp/LTLFireability3479501065217289918.gal, -t, CGAL, -LTL, /tmp/LTLFireability6996816704068223504.ltl, -c, -stutter-deadlock, --gen-order, FOLLOW], workingDir=/home/mcc/execution]

its-ltl command run as :

/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.202104292328/bin/its-ltl-linux64 --gc-threshold 2000000 -i /tmp/LTLFireability3479501065217289918.gal -t CGAL -LTL /tmp/LTLFireability6996816704068223504.ltl -c -stutter-deadlock --gen-order FOLLOW
Read 1 LTL properties
Checking formula 0 : !(((F(!("((((((((Finished_0<1)&&(Finished_1<1))&&(Finished_6<1))&&(Finished_7<1))&&(Finished_2<1))&&(Finished_3<1))&&(Finished_4<1))&&(Finished_5<1))")))||(G((X("((((((((((((((((((((((((((((((((Assigned_5_1>=1)||(Assigned_5_0>=1))||(Assigned_5_3>=1))||(Assigned_5_2>=1))||(Assigned_6_1>=1))||(Assigned_6_0>=1))||(Assigned_6_3>=1))||(Assigned_6_2>=1))||(Assigned_7_1>=1))||(Assigned_7_0>=1))||(Assigned_7_3>=1))||(Assigned_7_2>=1))||(Assigned_0_1>=1))||(Assigned_0_0>=1))||(Assigned_0_3>=1))||(Assigned_0_2>=1))||(Assigned_1_1>=1))||(Assigned_1_0>=1))||(Assigned_1_3>=1))||(Assigned_1_2>=1))||(Assigned_2_1>=1))||(Assigned_2_0>=1))||(Assigned_2_3>=1))||(Assigned_2_2>=1))||(Assigned_3_1>=1))||(Assigned_3_0>=1))||(Assigned_3_3>=1))||(Assigned_3_2>=1))||(Assigned_4_1>=1))||(Assigned_4_0>=1))||(Assigned_4_3>=1))||(Assigned_4_2>=1))"))||(F(!("((((((((((((((((((((((((((((((((((IdleTechs_0>=1)&&(OpenRequests_0_0>=1))&&(Idles>=1))||(((IdleTechs_2>=1)&&(OpenRequests_3_2>=1))&&(Idles>=1)))||(((IdleTechs_1>=1)&&(OpenRequests_5_1>=1))&&(Idles>=1)))||(((IdleTechs_3>=1)&&(OpenRequests_7_3>=1))&&(Idles>=1)))||(((IdleTechs_0>=1)&&(OpenRequests_5_0>=1))&&(Idles>=1)))||(((IdleTechs_1>=1)&&(OpenRequests_4_1>=1))&&(Idles>=1)))||(((IdleTechs_0>=1)&&(OpenRequests_6_0>=1))&&(Idles>=1)))||(((IdleTechs_2>=1)&&(OpenRequests_2_2>=1))&&(Idles>=1)))||(((IdleTechs_0>=1)&&(OpenRequests_7_0>=1))&&(Idles>=1)))||(((IdleTechs_3>=1)&&(OpenRequests_1_3>=1))&&(Idles>=1)))||(((IdleTechs_1>=1)&&(OpenRequests_6_1>=1))&&(Idles>=1)))||(((IdleTechs_2>=1)&&(OpenRequests_7_2>=1))&&(Idles>=1)))||(((IdleTechs_3>=1)&&(OpenRequests_4_3>=1))&&(Idles>=1)))||(((IdleTechs_2>=1)&&(OpenRequests_4_2>=1))&&(Idles>=1)))||(((IdleTechs_3>=1)&&(OpenRequests_3_3>=1))&&(Idles>=1)))||(((IdleTechs_1>=1)&&(OpenRequests_7_1>=1))&&(Idles>=1)))||(((IdleTechs_2>=1)&&(OpenRequests_5_2>=1))&&(Idles>=1)))||(((IdleTechs_3>=1)&&(OpenRequests_2_3>=1))&&(Idles>=1)))||(((IdleTechs_0>=1)&&(OpenRequests_3_0>=1))&&(Idles>=1)))||(((IdleTechs_1>=1)&&(OpenRequests_2_1>=1))&&(Idles>=1)))||(((IdleTechs_2>=1)&&(OpenRequests_6_2>=1))&&(Idles>=1)))||(((IdleTechs_3>=1)&&(OpenRequests_5_3>=1))&&(Idles>=1)))||(((IdleTechs_3>=1)&&(OpenRequests_0_3>=1))&&(Idles>=1)))||(((IdleTechs_1>=1)&&(OpenRequests_1_1>=1))&&(Idles>=1)))||(((IdleTechs_2>=1)&&(OpenRequests_1_2>=1))&&(Idles>=1)))||(((IdleTechs_3>=1)&&(OpenRequests_6_3>=1))&&(Idles>=1)))||(((IdleTechs_1>=1)&&(OpenRequests_3_1>=1))&&(Idles>=1)))||(((IdleTechs_2>=1)&&(OpenRequests_0_2>=1))&&(Idles>=1)))||(((IdleTechs_0>=1)&&(OpenRequests_4_0>=1))&&(Idles>=1)))||(((IdleTechs_1>=1)&&(OpenRequests_0_1>=1))&&(Idles>=1)))||(((IdleTechs_0>=1)&&(OpenRequests_2_0>=1))&&(Idles>=1)))||(((IdleTechs_0>=1)&&(OpenRequests_1_0>=1))&&(Idles>=1)))")))))))
Formula 0 simplified : !(F!"((((((((Finished_0<1)&&(Finished_1<1))&&(Finished_6<1))&&(Finished_7<1))&&(Finished_2<1))&&(Finished_3<1))&&(Finished_4<1))&&(Finished_5<1))" | G(X"((((((((((((((((((((((((((((((((Assigned_5_1>=1)||(Assigned_5_0>=1))||(Assigned_5_3>=1))||(Assigned_5_2>=1))||(Assigned_6_1>=1))||(Assigned_6_0>=1))||(Assigned_6_3>=1))||(Assigned_6_2>=1))||(Assigned_7_1>=1))||(Assigned_7_0>=1))||(Assigned_7_3>=1))||(Assigned_7_2>=1))||(Assigned_0_1>=1))||(Assigned_0_0>=1))||(Assigned_0_3>=1))||(Assigned_0_2>=1))||(Assigned_1_1>=1))||(Assigned_1_0>=1))||(Assigned_1_3>=1))||(Assigned_1_2>=1))||(Assigned_2_1>=1))||(Assigned_2_0>=1))||(Assigned_2_3>=1))||(Assigned_2_2>=1))||(Assigned_3_1>=1))||(Assigned_3_0>=1))||(Assigned_3_3>=1))||(Assigned_3_2>=1))||(Assigned_4_1>=1))||(Assigned_4_0>=1))||(Assigned_4_3>=1))||(Assigned_4_2>=1))" | F!"((((((((((((((((((((((((((((((((((IdleTechs_0>=1)&&(OpenRequests_0_0>=1))&&(Idles>=1))||(((IdleTechs_2>=1)&&(OpenRequests_3_2>=1))&&(Idles>=1)))||(((IdleTechs_1>=1)&&(OpenRequests_5_1>=1))&&(Idles>=1)))||(((IdleTechs_3>=1)&&(OpenRequests_7_3>=1))&&(Idles>=1)))||(((IdleTechs_0>=1)&&(OpenRequests_5_0>=1))&&(Idles>=1)))||(((IdleTechs_1>=1)&&(OpenRequests_4_1>=1))&&(Idles>=1)))||(((IdleTechs_0>=1)&&(OpenRequests_6_0>=1))&&(Idles>=1)))||(((IdleTechs_2>=1)&&(OpenRequests_2_2>=1))&&(Idles>=1)))||(((IdleTechs_0>=1)&&(OpenRequests_7_0>=1))&&(Idles>=1)))||(((IdleTechs_3>=1)&&(OpenRequests_1_3>=1))&&(Idles>=1)))||(((IdleTechs_1>=1)&&(OpenRequests_6_1>=1))&&(Idles>=1)))||(((IdleTechs_2>=1)&&(OpenRequests_7_2>=1))&&(Idles>=1)))||(((IdleTechs_3>=1)&&(OpenRequests_4_3>=1))&&(Idles>=1)))||(((IdleTechs_2>=1)&&(OpenRequests_4_2>=1))&&(Idles>=1)))||(((IdleTechs_3>=1)&&(OpenRequests_3_3>=1))&&(Idles>=1)))||(((IdleTechs_1>=1)&&(OpenRequests_7_1>=1))&&(Idles>=1)))||(((IdleTechs_2>=1)&&(OpenRequests_5_2>=1))&&(Idles>=1)))||(((IdleTechs_3>=1)&&(OpenRequests_2_3>=1))&&(Idles>=1)))||(((IdleTechs_0>=1)&&(OpenRequests_3_0>=1))&&(Idles>=1)))||(((IdleTechs_1>=1)&&(OpenRequests_2_1>=1))&&(Idles>=1)))||(((IdleTechs_2>=1)&&(OpenRequests_6_2>=1))&&(Idles>=1)))||(((IdleTechs_3>=1)&&(OpenRequests_5_3>=1))&&(Idles>=1)))||(((IdleTechs_3>=1)&&(OpenRequests_0_3>=1))&&(Idles>=1)))||(((IdleTechs_1>=1)&&(OpenRequests_1_1>=1))&&(Idles>=1)))||(((IdleTechs_2>=1)&&(OpenRequests_1_2>=1))&&(Idles>=1)))||(((IdleTechs_3>=1)&&(OpenRequests_6_3>=1))&&(Idles>=1)))||(((IdleTechs_1>=1)&&(OpenRequests_3_1>=1))&&(Idles>=1)))||(((IdleTechs_2>=1)&&(OpenRequests_0_2>=1))&&(Idles>=1)))||(((IdleTechs_0>=1)&&(OpenRequests_4_0>=1))&&(Idles>=1)))||(((IdleTechs_1>=1)&&(OpenRequests_0_1>=1))&&(Idles>=1)))||(((IdleTechs_0>=1)&&(OpenRequests_2_0>=1))&&(Idles>=1)))||(((IdleTechs_0>=1)&&(OpenRequests_1_0>=1))&&(Idles>=1)))"))
Reverse transition relation is exact ! Faster fixpoint algorithm enabled.
Detected timeout of ITS tools.
[2021-05-20 07:09:02] [INFO ] Flatten gal took : 16 ms
[2021-05-20 07:09:02] [INFO ] Input system was already deterministic with 472 transitions.
[2021-05-20 07:09:02] [INFO ] Transformed 301 places.
[2021-05-20 07:09:02] [INFO ] Transformed 472 transitions.
Running greatSPN : CommandLine [args=[/home/mcc/BenchKit/bin//..//greatspn//bin/pinvar, /home/mcc/execution/gspn], workingDir=/home/mcc/execution]
Run of greatSPN captured in /home/mcc/execution/outPut.txt
Running greatSPN : CommandLine [args=[/home/mcc/BenchKit/bin//..//greatspn//bin/RGMEDD2, /home/mcc/execution/gspn, -META, -varord-only], workingDir=/home/mcc/execution]
Run of greatSPN captured in /home/mcc/execution/outPut.txt
Using order generated by GreatSPN with heuristic : META
[2021-05-20 07:09:02] [INFO ] Time to serialize gal into /tmp/LTLFireability4753885449125085680.gal : 2 ms
[2021-05-20 07:09:02] [INFO ] Time to serialize properties into /tmp/LTLFireability17143376763216346559.ltl : 1 ms
Invoking ITS tools like this :CommandLine [args=[/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.202104292328/bin/its-ltl-linux64, --gc-threshold, 2000000, -i, /tmp/LTLFireability4753885449125085680.gal, -t, CGAL, -LTL, /tmp/LTLFireability17143376763216346559.ltl, -c, -stutter-deadlock, --load-order, /home/mcc/execution/model.ord, --gen-order, FOLLOW], workingDir=/home/mcc/execution]

its-ltl command run as :

/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.202104292328/bin/its-ltl-linux64 --gc-threshold 2000000 -i /tmp/LTLFireability4753885449125085680.gal -t CGAL -LTL /tmp/LTLFireability17143376763216346559.ltl -c -stutter-deadlock --load-order /home/mcc/execution/model.ord --gen-order FOLLOW
Read 1 LTL properties
Successfully loaded order from file /home/mcc/execution/model.ord
Checking formula 0 : !(((F(!("((((((((Finished_0<1)&&(Finished_1<1))&&(Finished_6<1))&&(Finished_7<1))&&(Finished_2<1))&&(Finished_3<1))&&(Finished_4<1))&&(Finished_5<1))")))||(G((X("((((((((((((((((((((((((((((((((Assigned_5_1>=1)||(Assigned_5_0>=1))||(Assigned_5_3>=1))||(Assigned_5_2>=1))||(Assigned_6_1>=1))||(Assigned_6_0>=1))||(Assigned_6_3>=1))||(Assigned_6_2>=1))||(Assigned_7_1>=1))||(Assigned_7_0>=1))||(Assigned_7_3>=1))||(Assigned_7_2>=1))||(Assigned_0_1>=1))||(Assigned_0_0>=1))||(Assigned_0_3>=1))||(Assigned_0_2>=1))||(Assigned_1_1>=1))||(Assigned_1_0>=1))||(Assigned_1_3>=1))||(Assigned_1_2>=1))||(Assigned_2_1>=1))||(Assigned_2_0>=1))||(Assigned_2_3>=1))||(Assigned_2_2>=1))||(Assigned_3_1>=1))||(Assigned_3_0>=1))||(Assigned_3_3>=1))||(Assigned_3_2>=1))||(Assigned_4_1>=1))||(Assigned_4_0>=1))||(Assigned_4_3>=1))||(Assigned_4_2>=1))"))||(F(!("((((((((((((((((((((((((((((((((((IdleTechs_0>=1)&&(OpenRequests_0_0>=1))&&(Idles>=1))||(((IdleTechs_2>=1)&&(OpenRequests_3_2>=1))&&(Idles>=1)))||(((IdleTechs_1>=1)&&(OpenRequests_5_1>=1))&&(Idles>=1)))||(((IdleTechs_3>=1)&&(OpenRequests_7_3>=1))&&(Idles>=1)))||(((IdleTechs_0>=1)&&(OpenRequests_5_0>=1))&&(Idles>=1)))||(((IdleTechs_1>=1)&&(OpenRequests_4_1>=1))&&(Idles>=1)))||(((IdleTechs_0>=1)&&(OpenRequests_6_0>=1))&&(Idles>=1)))||(((IdleTechs_2>=1)&&(OpenRequests_2_2>=1))&&(Idles>=1)))||(((IdleTechs_0>=1)&&(OpenRequests_7_0>=1))&&(Idles>=1)))||(((IdleTechs_3>=1)&&(OpenRequests_1_3>=1))&&(Idles>=1)))||(((IdleTechs_1>=1)&&(OpenRequests_6_1>=1))&&(Idles>=1)))||(((IdleTechs_2>=1)&&(OpenRequests_7_2>=1))&&(Idles>=1)))||(((IdleTechs_3>=1)&&(OpenRequests_4_3>=1))&&(Idles>=1)))||(((IdleTechs_2>=1)&&(OpenRequests_4_2>=1))&&(Idles>=1)))||(((IdleTechs_3>=1)&&(OpenRequests_3_3>=1))&&(Idles>=1)))||(((IdleTechs_1>=1)&&(OpenRequests_7_1>=1))&&(Idles>=1)))||(((IdleTechs_2>=1)&&(OpenRequests_5_2>=1))&&(Idles>=1)))||(((IdleTechs_3>=1)&&(OpenRequests_2_3>=1))&&(Idles>=1)))||(((IdleTechs_0>=1)&&(OpenRequests_3_0>=1))&&(Idles>=1)))||(((IdleTechs_1>=1)&&(OpenRequests_2_1>=1))&&(Idles>=1)))||(((IdleTechs_2>=1)&&(OpenRequests_6_2>=1))&&(Idles>=1)))||(((IdleTechs_3>=1)&&(OpenRequests_5_3>=1))&&(Idles>=1)))||(((IdleTechs_3>=1)&&(OpenRequests_0_3>=1))&&(Idles>=1)))||(((IdleTechs_1>=1)&&(OpenRequests_1_1>=1))&&(Idles>=1)))||(((IdleTechs_2>=1)&&(OpenRequests_1_2>=1))&&(Idles>=1)))||(((IdleTechs_3>=1)&&(OpenRequests_6_3>=1))&&(Idles>=1)))||(((IdleTechs_1>=1)&&(OpenRequests_3_1>=1))&&(Idles>=1)))||(((IdleTechs_2>=1)&&(OpenRequests_0_2>=1))&&(Idles>=1)))||(((IdleTechs_0>=1)&&(OpenRequests_4_0>=1))&&(Idles>=1)))||(((IdleTechs_1>=1)&&(OpenRequests_0_1>=1))&&(Idles>=1)))||(((IdleTechs_0>=1)&&(OpenRequests_2_0>=1))&&(Idles>=1)))||(((IdleTechs_0>=1)&&(OpenRequests_1_0>=1))&&(Idles>=1)))")))))))
Formula 0 simplified : !(F!"((((((((Finished_0<1)&&(Finished_1<1))&&(Finished_6<1))&&(Finished_7<1))&&(Finished_2<1))&&(Finished_3<1))&&(Finished_4<1))&&(Finished_5<1))" | G(X"((((((((((((((((((((((((((((((((Assigned_5_1>=1)||(Assigned_5_0>=1))||(Assigned_5_3>=1))||(Assigned_5_2>=1))||(Assigned_6_1>=1))||(Assigned_6_0>=1))||(Assigned_6_3>=1))||(Assigned_6_2>=1))||(Assigned_7_1>=1))||(Assigned_7_0>=1))||(Assigned_7_3>=1))||(Assigned_7_2>=1))||(Assigned_0_1>=1))||(Assigned_0_0>=1))||(Assigned_0_3>=1))||(Assigned_0_2>=1))||(Assigned_1_1>=1))||(Assigned_1_0>=1))||(Assigned_1_3>=1))||(Assigned_1_2>=1))||(Assigned_2_1>=1))||(Assigned_2_0>=1))||(Assigned_2_3>=1))||(Assigned_2_2>=1))||(Assigned_3_1>=1))||(Assigned_3_0>=1))||(Assigned_3_3>=1))||(Assigned_3_2>=1))||(Assigned_4_1>=1))||(Assigned_4_0>=1))||(Assigned_4_3>=1))||(Assigned_4_2>=1))" | F!"((((((((((((((((((((((((((((((((((IdleTechs_0>=1)&&(OpenRequests_0_0>=1))&&(Idles>=1))||(((IdleTechs_2>=1)&&(OpenRequests_3_2>=1))&&(Idles>=1)))||(((IdleTechs_1>=1)&&(OpenRequests_5_1>=1))&&(Idles>=1)))||(((IdleTechs_3>=1)&&(OpenRequests_7_3>=1))&&(Idles>=1)))||(((IdleTechs_0>=1)&&(OpenRequests_5_0>=1))&&(Idles>=1)))||(((IdleTechs_1>=1)&&(OpenRequests_4_1>=1))&&(Idles>=1)))||(((IdleTechs_0>=1)&&(OpenRequests_6_0>=1))&&(Idles>=1)))||(((IdleTechs_2>=1)&&(OpenRequests_2_2>=1))&&(Idles>=1)))||(((IdleTechs_0>=1)&&(OpenRequests_7_0>=1))&&(Idles>=1)))||(((IdleTechs_3>=1)&&(OpenRequests_1_3>=1))&&(Idles>=1)))||(((IdleTechs_1>=1)&&(OpenRequests_6_1>=1))&&(Idles>=1)))||(((IdleTechs_2>=1)&&(OpenRequests_7_2>=1))&&(Idles>=1)))||(((IdleTechs_3>=1)&&(OpenRequests_4_3>=1))&&(Idles>=1)))||(((IdleTechs_2>=1)&&(OpenRequests_4_2>=1))&&(Idles>=1)))||(((IdleTechs_3>=1)&&(OpenRequests_3_3>=1))&&(Idles>=1)))||(((IdleTechs_1>=1)&&(OpenRequests_7_1>=1))&&(Idles>=1)))||(((IdleTechs_2>=1)&&(OpenRequests_5_2>=1))&&(Idles>=1)))||(((IdleTechs_3>=1)&&(OpenRequests_2_3>=1))&&(Idles>=1)))||(((IdleTechs_0>=1)&&(OpenRequests_3_0>=1))&&(Idles>=1)))||(((IdleTechs_1>=1)&&(OpenRequests_2_1>=1))&&(Idles>=1)))||(((IdleTechs_2>=1)&&(OpenRequests_6_2>=1))&&(Idles>=1)))||(((IdleTechs_3>=1)&&(OpenRequests_5_3>=1))&&(Idles>=1)))||(((IdleTechs_3>=1)&&(OpenRequests_0_3>=1))&&(Idles>=1)))||(((IdleTechs_1>=1)&&(OpenRequests_1_1>=1))&&(Idles>=1)))||(((IdleTechs_2>=1)&&(OpenRequests_1_2>=1))&&(Idles>=1)))||(((IdleTechs_3>=1)&&(OpenRequests_6_3>=1))&&(Idles>=1)))||(((IdleTechs_1>=1)&&(OpenRequests_3_1>=1))&&(Idles>=1)))||(((IdleTechs_2>=1)&&(OpenRequests_0_2>=1))&&(Idles>=1)))||(((IdleTechs_0>=1)&&(OpenRequests_4_0>=1))&&(Idles>=1)))||(((IdleTechs_1>=1)&&(OpenRequests_0_1>=1))&&(Idles>=1)))||(((IdleTechs_0>=1)&&(OpenRequests_2_0>=1))&&(Idles>=1)))||(((IdleTechs_0>=1)&&(OpenRequests_1_0>=1))&&(Idles>=1)))"))
Reverse transition relation is exact ! Faster fixpoint algorithm enabled.

BK_TIME_CONFINEMENT_REACHED

--------------------
content from stderr:

+ export BINDIR=/home/mcc/BenchKit/bin//../
+ BINDIR=/home/mcc/BenchKit/bin//../
++ pwd
+ export MODEL=/home/mcc/execution
+ MODEL=/home/mcc/execution
+ [[ LTLFireability = StateSpace ]]
+ /home/mcc/BenchKit/bin//..//runeclipse.sh /home/mcc/execution LTLFireability -its -ltsmin -greatspnpath /home/mcc/BenchKit/bin//..//greatspn/ -order META -manyOrder -smt -timeout 3600
+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
++ cut -d . -f 9
++ ls /home/mcc/BenchKit/bin//..//itstools/plugins/fr.lip6.move.gal.application.pnmcc_1.0.0.202104292328.jar
+ VERSION=0
+ echo 'Running Version 0'
+ /home/mcc/BenchKit/bin//..//itstools/its-tools -data /home/mcc/execution/workspace -pnfolder /home/mcc/execution -examination LTLFireability -spotpath /home/mcc/BenchKit/bin//..//ltlfilt -z3path /home/mcc/BenchKit/bin//..//z3/bin/z3 -yices2path /home/mcc/BenchKit/bin//..//yices/bin/yices -its -ltsmin -greatspnpath /home/mcc/BenchKit/bin//..//greatspn/ -order META -manyOrder -smt -timeout 3600 -vmargs -Dosgi.locking=none -Declipse.stateSaveDelayInterval=-1 -Dosgi.configuration.area=/tmp/.eclipse -Xss128m -Xms40m -Xmx16000m

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="UtilityControlRoom-PT-Z4T4N08"
export BK_EXAMINATION="LTLFireability"
export BK_TOOL="itstools"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-4028"
echo " Executing tool itstools"
echo " Input is UtilityControlRoom-PT-Z4T4N08, examination is LTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r311-tall-162132108700645"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/UtilityControlRoom-PT-Z4T4N08.tgz
mv UtilityControlRoom-PT-Z4T4N08 execution
cd execution
if [ "LTLFireability" = "ReachabilityDeadlock" ] || [ "LTLFireability" = "UpperBounds" ] || [ "LTLFireability" = "QuasiLiveness" ] || [ "LTLFireability" = "StableMarking" ] || [ "LTLFireability" = "Liveness" ] || [ "LTLFireability" = "OneSafe" ] || [ "LTLFireability" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "LTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "LTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "LTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property LTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "LTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' LTLFireability.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ "LTLFireability" = "ReachabilityDeadlock" ] || [ "LTLFireability" = "QuasiLiveness" ] || [ "LTLFireability" = "StableMarking" ] || [ "LTLFireability" = "Liveness" ] || [ "LTLFireability" = "OneSafe" ] ; then
echo "FORMULA_NAME LTLFireability"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;