fond
Model Checking Contest 2021
11th edition, Paris, France, June 23, 2021
Execution of r308-tall-162132105100610
Last Updated
Jun 28, 2021

About the Execution of LoLA for UtilityControlRoom-PT-Z4T3N10

Execution Summary
Max Memory
Used (MB)
Time wait (ms) CPU Usage (ms) I/O Wait (ms) Computed Result Execution
Status
8759.155 296903.00 290239.00 663.00 ?T?TFTTTFTFFF??T normal

Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/data/fkordon/mcc2021-input.r308-tall-162132105100610.qcow2', fmt=qcow2 size=4294967296 backing_file='/data/fkordon/mcc2021-input.qcow2' encryption=off cluster_size=65536 lazy_refcounts=off
Waiting for the VM to be ready (probing ssh)
............................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................
=====================================================================
Generated by BenchKit 2-4028
Executing tool lola
Input is UtilityControlRoom-PT-Z4T3N10, examination is CTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r308-tall-162132105100610
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 4.6M
-rw-r--r-- 1 mcc users 277K May 15 08:57 CTLCardinality.txt
-rw-r--r-- 1 mcc users 1.2M May 15 08:57 CTLCardinality.xml
-rw-r--r-- 1 mcc users 478K May 15 08:57 CTLFireability.txt
-rw-r--r-- 1 mcc users 1.8M May 15 08:57 CTLFireability.xml
-rw-r--r-- 1 mcc users 35K May 12 08:04 LTLCardinality.txt
-rw-r--r-- 1 mcc users 113K May 12 08:04 LTLCardinality.xml
-rw-r--r-- 1 mcc users 42K May 12 08:04 LTLFireability.txt
-rw-r--r-- 1 mcc users 124K May 12 08:04 LTLFireability.xml
-rw-r--r-- 1 mcc users 1 May 12 08:13 NewModel
-rw-r--r-- 1 mcc users 27K May 12 04:38 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 80K May 12 04:38 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 63K May 11 18:12 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 176K May 11 18:12 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 8.0K May 12 04:43 UpperBounds.txt
-rw-r--r-- 1 mcc users 17K May 12 04:43 UpperBounds.xml
-rw-r--r-- 1 mcc users 5 May 12 08:13 equiv_col
-rw-r--r-- 1 mcc users 8 May 12 08:13 instance
-rw-r--r-- 1 mcc users 6 May 12 08:13 iscolored
-rw-r--r-- 1 mcc users 319K May 12 08:13 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME UtilityControlRoom-PT-Z4T3N10-CTLFireability-00
FORMULA_NAME UtilityControlRoom-PT-Z4T3N10-CTLFireability-01
FORMULA_NAME UtilityControlRoom-PT-Z4T3N10-CTLFireability-02
FORMULA_NAME UtilityControlRoom-PT-Z4T3N10-CTLFireability-03
FORMULA_NAME UtilityControlRoom-PT-Z4T3N10-CTLFireability-04
FORMULA_NAME UtilityControlRoom-PT-Z4T3N10-CTLFireability-05
FORMULA_NAME UtilityControlRoom-PT-Z4T3N10-CTLFireability-06
FORMULA_NAME UtilityControlRoom-PT-Z4T3N10-CTLFireability-07
FORMULA_NAME UtilityControlRoom-PT-Z4T3N10-CTLFireability-08
FORMULA_NAME UtilityControlRoom-PT-Z4T3N10-CTLFireability-09
FORMULA_NAME UtilityControlRoom-PT-Z4T3N10-CTLFireability-10
FORMULA_NAME UtilityControlRoom-PT-Z4T3N10-CTLFireability-11
FORMULA_NAME UtilityControlRoom-PT-Z4T3N10-CTLFireability-12
FORMULA_NAME UtilityControlRoom-PT-Z4T3N10-CTLFireability-13
FORMULA_NAME UtilityControlRoom-PT-Z4T3N10-CTLFireability-14
FORMULA_NAME UtilityControlRoom-PT-Z4T3N10-CTLFireability-15

=== Now, execution of the tool begins

BK_START 1621386970100

starting LoLA
BK_INPUT UtilityControlRoom-PT-Z4T3N10
BK_EXAMINATION: CTLFireability
bin directory: /home/mcc/BenchKit/bin
current directory: /home/mcc/execution
CTLFireability

FORMULA UtilityControlRoom-PT-Z4T3N10-CTLFireability-12 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA UtilityControlRoom-PT-Z4T3N10-CTLFireability-01 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA UtilityControlRoom-PT-Z4T3N10-CTLFireability-10 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA UtilityControlRoom-PT-Z4T3N10-CTLFireability-15 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA UtilityControlRoom-PT-Z4T3N10-CTLFireability-09 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA UtilityControlRoom-PT-Z4T3N10-CTLFireability-07 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA UtilityControlRoom-PT-Z4T3N10-CTLFireability-06 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA UtilityControlRoom-PT-Z4T3N10-CTLFireability-05 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA UtilityControlRoom-PT-Z4T3N10-CTLFireability-03 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA UtilityControlRoom-PT-Z4T3N10-CTLFireability-04 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA UtilityControlRoom-PT-Z4T3N10-CTLFireability-11 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA UtilityControlRoom-PT-Z4T3N10-CTLFireability-08 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

BK_STOP 1621387267003

--------------------
content from stderr:

lola: MEM LIMIT 32
lola: MEM LIMIT 5
lola: NET
lola: input: PNML file (--pnmlnet)
lola: reading net from /home/mcc/execution/model.pnml
lola: reading pnml
lola: PNML file contains place/transition net
lola: finished parsing
lola: closed net file /home/mcc/execution/model.pnml
lola: Reading formula.
lola: Using XML format (--xmlformula)
lola: reading XML formula
lola: reading formula from /home/mcc/execution/CTLFireability.xml
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:475
lola: rewrite Frontend/Parser/formula_rewrite.k:445
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:340
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:553
lola: rewrite Frontend/Parser/formula_rewrite.k:460
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:340
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:448
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:448
lola: rewrite Frontend/Parser/formula_rewrite.k:469
lola: rewrite Frontend/Parser/formula_rewrite.k:469
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:394
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:340
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:340
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:439
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Rule S: 0 transitions removed,0 places removed
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: LAUNCH task # 57 (type EXCL) for 56 UtilityControlRoom-PT-Z4T3N10-CTLFireability-12
lola: time limit : 123 sec
lola: memory limit: 32 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:726
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: FINISHED task # 57 (type EXCL) for UtilityControlRoom-PT-Z4T3N10-CTLFireability-12
lola: result : false
lola: markings : 42
lola: fired transitions : 127
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 4 (type EXCL) for 3 UtilityControlRoom-PT-Z4T3N10-CTLFireability-01
lola: time limit : 137 sec
lola: memory limit: 32 pages
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:730
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:754
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:806
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
UtilityControlRoom-PT-Z4T3N10-CTLFireability-12: CTL false CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
UtilityControlRoom-PT-Z4T3N10-CTLFireability-00: EFEG 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T3N10-CTLFireability-01: CTL 0 0 1 0 1 0 0 0
UtilityControlRoom-PT-Z4T3N10-CTLFireability-02: EFAG 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T3N10-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T3N10-CTLFireability-04: CONJ 0 2 0 0 2 0 0 0
UtilityControlRoom-PT-Z4T3N10-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T3N10-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T3N10-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T3N10-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T3N10-CTLFireability-09: CONJ 0 5 0 0 5 0 0 0
UtilityControlRoom-PT-Z4T3N10-CTLFireability-10: AXAF 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T3N10-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T3N10-CTLFireability-13: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T3N10-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T3N10-CTLFireability-15: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
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1 EFEG EXCL 65/849 25/32 UtilityControlRoom-PT-Z4T3N10-CTLFireability-00 3575103 m, 52942 m/sec, 6588098 t fired, .

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UtilityControlRoom-PT-Z4T3N10-CTLFireability-01: CTL true CTL model checker
UtilityControlRoom-PT-Z4T3N10-CTLFireability-03: CTL true CTL model checker
UtilityControlRoom-PT-Z4T3N10-CTLFireability-05: CTL true CTL model checker
UtilityControlRoom-PT-Z4T3N10-CTLFireability-06: CTL true CTL model checker
UtilityControlRoom-PT-Z4T3N10-CTLFireability-07: CTL true CTL model checker
UtilityControlRoom-PT-Z4T3N10-CTLFireability-09: CONJ true CONJ
UtilityControlRoom-PT-Z4T3N10-CTLFireability-10: AXAF false state space /EXEG
UtilityControlRoom-PT-Z4T3N10-CTLFireability-12: CTL false CTL model checker
UtilityControlRoom-PT-Z4T3N10-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
UtilityControlRoom-PT-Z4T3N10-CTLFireability-00: EFEG 0 0 1 0 1 0 0 0
UtilityControlRoom-PT-Z4T3N10-CTLFireability-02: EFAG 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T3N10-CTLFireability-04: CONJ 0 1 0 0 3 0 0 0
UtilityControlRoom-PT-Z4T3N10-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T3N10-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T3N10-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T3N10-CTLFireability-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
1 EFEG EXCL 70/849 27/32 UtilityControlRoom-PT-Z4T3N10-CTLFireability-00 3838095 m, 52598 m/sec, 7078166 t fired, .

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UtilityControlRoom-PT-Z4T3N10-CTLFireability-01: CTL true CTL model checker
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UtilityControlRoom-PT-Z4T3N10-CTLFireability-05: CTL true CTL model checker
UtilityControlRoom-PT-Z4T3N10-CTLFireability-06: CTL true CTL model checker
UtilityControlRoom-PT-Z4T3N10-CTLFireability-07: CTL true CTL model checker
UtilityControlRoom-PT-Z4T3N10-CTLFireability-09: CONJ true CONJ
UtilityControlRoom-PT-Z4T3N10-CTLFireability-10: AXAF false state space /EXEG
UtilityControlRoom-PT-Z4T3N10-CTLFireability-12: CTL false CTL model checker
UtilityControlRoom-PT-Z4T3N10-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
UtilityControlRoom-PT-Z4T3N10-CTLFireability-00: EFEG 0 0 1 0 1 0 0 0
UtilityControlRoom-PT-Z4T3N10-CTLFireability-02: EFAG 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T3N10-CTLFireability-04: CONJ 0 1 0 0 3 0 0 0
UtilityControlRoom-PT-Z4T3N10-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T3N10-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T3N10-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T3N10-CTLFireability-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
1 EFEG EXCL 75/849 29/32 UtilityControlRoom-PT-Z4T3N10-CTLFireability-00 4102058 m, 52792 m/sec, 7571004 t fired, .

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UtilityControlRoom-PT-Z4T3N10-CTLFireability-01: CTL true CTL model checker
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UtilityControlRoom-PT-Z4T3N10-CTLFireability-05: CTL true CTL model checker
UtilityControlRoom-PT-Z4T3N10-CTLFireability-06: CTL true CTL model checker
UtilityControlRoom-PT-Z4T3N10-CTLFireability-07: CTL true CTL model checker
UtilityControlRoom-PT-Z4T3N10-CTLFireability-09: CONJ true CONJ
UtilityControlRoom-PT-Z4T3N10-CTLFireability-10: AXAF false state space /EXEG
UtilityControlRoom-PT-Z4T3N10-CTLFireability-12: CTL false CTL model checker
UtilityControlRoom-PT-Z4T3N10-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
UtilityControlRoom-PT-Z4T3N10-CTLFireability-00: EFEG 0 0 1 0 1 0 0 0
UtilityControlRoom-PT-Z4T3N10-CTLFireability-02: EFAG 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T3N10-CTLFireability-04: CONJ 0 1 0 0 3 0 0 0
UtilityControlRoom-PT-Z4T3N10-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T3N10-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T3N10-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T3N10-CTLFireability-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
1 EFEG EXCL 80/849 30/32 UtilityControlRoom-PT-Z4T3N10-CTLFireability-00 4366585 m, 52905 m/sec, 8065005 t fired, .

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UtilityControlRoom-PT-Z4T3N10-CTLFireability-01: CTL true CTL model checker
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UtilityControlRoom-PT-Z4T3N10-CTLFireability-05: CTL true CTL model checker
UtilityControlRoom-PT-Z4T3N10-CTLFireability-06: CTL true CTL model checker
UtilityControlRoom-PT-Z4T3N10-CTLFireability-07: CTL true CTL model checker
UtilityControlRoom-PT-Z4T3N10-CTLFireability-09: CONJ true CONJ
UtilityControlRoom-PT-Z4T3N10-CTLFireability-10: AXAF false state space /EXEG
UtilityControlRoom-PT-Z4T3N10-CTLFireability-12: CTL false CTL model checker
UtilityControlRoom-PT-Z4T3N10-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
UtilityControlRoom-PT-Z4T3N10-CTLFireability-00: EFEG 0 0 1 0 1 0 0 0
UtilityControlRoom-PT-Z4T3N10-CTLFireability-02: EFAG 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T3N10-CTLFireability-04: CONJ 0 1 0 0 3 0 0 0
UtilityControlRoom-PT-Z4T3N10-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T3N10-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T3N10-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T3N10-CTLFireability-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
1 EFEG EXCL 85/849 32/32 UtilityControlRoom-PT-Z4T3N10-CTLFireability-00 4628780 m, 52439 m/sec, 8555692 t fired, .

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UtilityControlRoom-PT-Z4T3N10-CTLFireability-01: CTL true CTL model checker
UtilityControlRoom-PT-Z4T3N10-CTLFireability-03: CTL true CTL model checker
UtilityControlRoom-PT-Z4T3N10-CTLFireability-05: CTL true CTL model checker
UtilityControlRoom-PT-Z4T3N10-CTLFireability-06: CTL true CTL model checker
UtilityControlRoom-PT-Z4T3N10-CTLFireability-07: CTL true CTL model checker
UtilityControlRoom-PT-Z4T3N10-CTLFireability-09: CONJ true CONJ
UtilityControlRoom-PT-Z4T3N10-CTLFireability-10: AXAF false state space /EXEG
UtilityControlRoom-PT-Z4T3N10-CTLFireability-12: CTL false CTL model checker
UtilityControlRoom-PT-Z4T3N10-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
UtilityControlRoom-PT-Z4T3N10-CTLFireability-00: EFEG 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T3N10-CTLFireability-02: EFAG 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T3N10-CTLFireability-04: CONJ 0 1 0 0 3 0 0 0
UtilityControlRoom-PT-Z4T3N10-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T3N10-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
UtilityControlRoom-PT-Z4T3N10-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
UtilityControlRoom-PT-Z4T3N10-CTLFireability-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

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lola: LAUNCH task # 17 (type EXCL) for 12 UtilityControlRoom-PT-Z4T3N10-CTLFireability-04
lola: time limit : 1102 sec
lola: memory limit: 32 pages
lola: FINISHED task # 17 (type EXCL) for UtilityControlRoom-PT-Z4T3N10-CTLFireability-04
lola: result : false
lola: markings : 261828
lola: fired transitions : 503761
lola: time used : 2.000000
lola: memory pages used : 2
lola: LAUNCH task # 54 (type EXCL) for 53 UtilityControlRoom-PT-Z4T3N10-CTLFireability-11
lola: time limit : 1652 sec
lola: memory limit: 32 pages
lola: FINISHED task # 54 (type EXCL) for UtilityControlRoom-PT-Z4T3N10-CTLFireability-11
lola: result : false
lola: markings : 72
lola: fired transitions : 122
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 29 (type EXCL) for 28 UtilityControlRoom-PT-Z4T3N10-CTLFireability-08
lola: time limit : 3304 sec
lola: memory limit: 32 pages
lola: FINISHED task # 29 (type EXCL) for UtilityControlRoom-PT-Z4T3N10-CTLFireability-08
lola: result : false
lola: markings : 56
lola: fired transitions : 57
lola: time used : 0.000000
lola: memory pages used : 1
lola: Portfolio finished: no open tasks 16

FINAL RESULTS
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
UtilityControlRoom-PT-Z4T3N10-CTLFireability-00: EFEG unknown AGGR
UtilityControlRoom-PT-Z4T3N10-CTLFireability-01: CTL true CTL model checker
UtilityControlRoom-PT-Z4T3N10-CTLFireability-02: EFAG unknown AGGR
UtilityControlRoom-PT-Z4T3N10-CTLFireability-03: CTL true CTL model checker
UtilityControlRoom-PT-Z4T3N10-CTLFireability-04: CONJ false CTL model checker
UtilityControlRoom-PT-Z4T3N10-CTLFireability-05: CTL true CTL model checker
UtilityControlRoom-PT-Z4T3N10-CTLFireability-06: CTL true CTL model checker
UtilityControlRoom-PT-Z4T3N10-CTLFireability-07: CTL true CTL model checker
UtilityControlRoom-PT-Z4T3N10-CTLFireability-08: CTL false CTL model checker
UtilityControlRoom-PT-Z4T3N10-CTLFireability-09: CONJ true CONJ
UtilityControlRoom-PT-Z4T3N10-CTLFireability-10: AXAF false state space /EXEG
UtilityControlRoom-PT-Z4T3N10-CTLFireability-11: CTL false CTL model checker
UtilityControlRoom-PT-Z4T3N10-CTLFireability-12: CTL false CTL model checker
UtilityControlRoom-PT-Z4T3N10-CTLFireability-13: CTL unknown AGGR
UtilityControlRoom-PT-Z4T3N10-CTLFireability-14: CTL unknown AGGR
UtilityControlRoom-PT-Z4T3N10-CTLFireability-15: CTL true CTL model checker


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Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="UtilityControlRoom-PT-Z4T3N10"
export BK_EXAMINATION="CTLFireability"
export BK_TOOL="lola"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-4028"
echo " Executing tool lola"
echo " Input is UtilityControlRoom-PT-Z4T3N10, examination is CTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r308-tall-162132105100610"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/UtilityControlRoom-PT-Z4T3N10.tgz
mv UtilityControlRoom-PT-Z4T3N10 execution
cd execution
if [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "UpperBounds" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] || [ "CTLFireability" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property CTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "CTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' CTLFireability.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] ; then
echo "FORMULA_NAME CTLFireability"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;