Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/data/fkordon/mcc2021-input.r307-tall-162132103600461.qcow2', fmt=qcow2 size=4294967296 backing_file='/data/fkordon/mcc2021-input.qcow2' encryption=off cluster_size=65536 lazy_refcounts=off
Waiting for the VM to be ready (probing ssh)
..................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................
=====================================================================
Generated by BenchKit 2-4028
Executing tool gspn
Input is UtilityControlRoom-COL-Z4T3N06, examination is LTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r307-tall-162132103600461
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 356K
-rw-r--r-- 1 mcc users 14K May 15 08:57 CTLCardinality.txt
-rw-r--r-- 1 mcc users 91K May 15 08:57 CTLCardinality.xml
-rw-r--r-- 1 mcc users 12K May 15 08:57 CTLFireability.txt
-rw-r--r-- 1 mcc users 73K May 15 08:57 CTLFireability.xml
-rw-r--r-- 1 mcc users 3.8K May 12 08:04 LTLCardinality.txt
-rw-r--r-- 1 mcc users 24K May 12 08:04 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.5K May 12 08:04 LTLFireability.txt
-rw-r--r-- 1 mcc users 19K May 12 08:04 LTLFireability.xml
-rw-r--r-- 1 mcc users 1 May 12 08:13 NewModel
-rw-r--r-- 1 mcc users 5.0K May 12 04:37 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 23K May 12 04:37 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 3.0K May 11 18:10 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 14K May 11 18:10 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 2.0K May 12 04:43 UpperBounds.txt
-rw-r--r-- 1 mcc users 4.0K May 12 04:43 UpperBounds.xml
-rw-r--r-- 1 mcc users 5 May 12 08:13 equiv_pt
-rw-r--r-- 1 mcc users 8 May 12 08:13 instance
-rw-r--r-- 1 mcc users 5 May 12 08:13 iscolored
-rw-r--r-- 1 mcc users 29K May 12 08:13 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME UtilityControlRoom-COL-Z4T3N06-00
FORMULA_NAME UtilityControlRoom-COL-Z4T3N06-01
FORMULA_NAME UtilityControlRoom-COL-Z4T3N06-02
FORMULA_NAME UtilityControlRoom-COL-Z4T3N06-03
FORMULA_NAME UtilityControlRoom-COL-Z4T3N06-04
FORMULA_NAME UtilityControlRoom-COL-Z4T3N06-05
FORMULA_NAME UtilityControlRoom-COL-Z4T3N06-06
FORMULA_NAME UtilityControlRoom-COL-Z4T3N06-07
FORMULA_NAME UtilityControlRoom-COL-Z4T3N06-08
FORMULA_NAME UtilityControlRoom-COL-Z4T3N06-09
FORMULA_NAME UtilityControlRoom-COL-Z4T3N06-10
FORMULA_NAME UtilityControlRoom-COL-Z4T3N06-11
FORMULA_NAME UtilityControlRoom-COL-Z4T3N06-12
FORMULA_NAME UtilityControlRoom-COL-Z4T3N06-13
FORMULA_NAME UtilityControlRoom-COL-Z4T3N06-14
FORMULA_NAME UtilityControlRoom-COL-Z4T3N06-15

=== Now, execution of the tool begins

BK_START 1621409768997

----------------------------------------------------------------------
GreatSPN-meddly tool, MCC 2021
----------------------------------------------------------------------

Running UtilityControlRoom-COL-Z4T3N06

IS_COLORED=1
IS_NUPN=

LOADING model.pnml ...
MODEL CLASS: SYMMETRIC NET
PLACES: 13
TRANSITIONS: 12
CONSTANTS: 0
TEMPLATE VARS: 0
COLOR CLASSES: 6
COLOR VARS: 3
ARCS: 37
LOADING TIME: 0.278

UNFOLDING COLORS...
MODEL CLASS: P/T NET
PLACES: 228
TRANSITIONS: 450
CONSTANTS: 0
TEMPLATE VARS: 0
ARCS: 1446
UNFOLDING TIME: 0.358

SAVING AS /home/mcc/execution/model.(net/def) ...
SAVING TIME: 0.087
SAVING NAME MAP FILE /home/mcc/execution/model.id2name ...
SAVING UNFOLDING MAP FILE /home/mcc/execution/model.unfmap ...
TOTAL TIME: 1.117
OK.
----------------------------------------------------------------------
GreatSPN/Meddly.
Copyright (C) 1987-2020, University of Torino, Italy.

Based on MEDDLY version 0.16.0
Copyright (C) 2009, Iowa State University Research Foundation, Inc.
website: http://meddly.sourceforge.net

Process ID: 464
MODEL NAME: /home/mcc/execution/model
228 places, 450 transitions.

Creating all event NSFs..
Creating all event NSFs..
Creating all event NSFs..
Creating all event NSFs..
Split: SplitSubtract
Start RS construction.
Split: SplitSubtract
Start RS construction.
Split: SplitSubtract
Start RS construction.
Split: SplitSubtract
Start RS construction.
Building monolithic NSF...
FORMULA UtilityControlRoom-COL-Z4T3N06-00 FALSE TECHNIQUES DECISION_DIAGRAMS PARALLEL_PROCESSING UNFOLDING_TO_PT USE_NUPN TOPOLOGICAL
FORMULA UtilityControlRoom-COL-Z4T3N06-04 FALSE TECHNIQUES DECISION_DIAGRAMS PARALLEL_PROCESSING UNFOLDING_TO_PT USE_NUPN TOPOLOGICAL
FORMULA UtilityControlRoom-COL-Z4T3N06-01 FALSE TECHNIQUES DECISION_DIAGRAMS PARALLEL_PROCESSING UNFOLDING_TO_PT USE_NUPN TOPOLOGICAL
FORMULA UtilityControlRoom-COL-Z4T3N06-06 FALSE TECHNIQUES DECISION_DIAGRAMS PARALLEL_PROCESSING UNFOLDING_TO_PT USE_NUPN TOPOLOGICAL
FORMULA UtilityControlRoom-COL-Z4T3N06-07 FALSE TECHNIQUES DECISION_DIAGRAMS PARALLEL_PROCESSING UNFOLDING_TO_PT USE_NUPN TOPOLOGICAL
FORMULA UtilityControlRoom-COL-Z4T3N06-08 TRUE TECHNIQUES DECISION_DIAGRAMS PARALLEL_PROCESSING UNFOLDING_TO_PT USE_NUPN TOPOLOGICAL
FORMULA UtilityControlRoom-COL-Z4T3N06-02 FALSE TECHNIQUES DECISION_DIAGRAMS PARALLEL_PROCESSING UNFOLDING_TO_PT USE_NUPN TOPOLOGICAL
FORMULA UtilityControlRoom-COL-Z4T3N06-09 FALSE TECHNIQUES DECISION_DIAGRAMS PARALLEL_PROCESSING UNFOLDING_TO_PT USE_NUPN TOPOLOGICAL
FORMULA UtilityControlRoom-COL-Z4T3N06-12 TRUE TECHNIQUES DECISION_DIAGRAMS PARALLEL_PROCESSING UNFOLDING_TO_PT USE_NUPN TOPOLOGICAL
FORMULA UtilityControlRoom-COL-Z4T3N06-11 FALSE TECHNIQUES DECISION_DIAGRAMS PARALLEL_PROCESSING UNFOLDING_TO_PT USE_NUPN TOPOLOGICAL
FORMULA UtilityControlRoom-COL-Z4T3N06-14 FALSE TECHNIQUES DECISION_DIAGRAMS PARALLEL_PROCESSING UNFOLDING_TO_PT USE_NUPN TOPOLOGICAL
FORMULA UtilityControlRoom-COL-Z4T3N06-13 TRUE TECHNIQUES DECISION_DIAGRAMS PARALLEL_PROCESSING UNFOLDING_TO_PT USE_NUPN TOPOLOGICAL
FORMULA UtilityControlRoom-COL-Z4T3N06-15 FALSE TECHNIQUES DECISION_DIAGRAMS PARALLEL_PROCESSING UNFOLDING_TO_PT USE_NUPN TOPOLOGICAL
FORMULA UtilityControlRoom-COL-Z4T3N06-10 TRUE TECHNIQUES DECISION_DIAGRAMS PARALLEL_PROCESSING UNFOLDING_TO_PT USE_NUPN TOPOLOGICAL
FORMULA UtilityControlRoom-COL-Z4T3N06-05 FALSE TECHNIQUES DECISION_DIAGRAMS PARALLEL_PROCESSING UNFOLDING_TO_PT USE_NUPN TOPOLOGICAL
FORMULA UtilityControlRoom-COL-Z4T3N06-03 CANNOT_COMPUTE
Ok.
EXITCODE: 0
----------------------------------------------------------------------

BK_STOP 1621410302734

--------------------
content from stderr:

May 19, 2021 7:36:11 AM com.sun.xml.bind.v2.runtime.reflect.opt.AccessorInjector
INFO: The optimized code generation is disabled
MEDDLY ERROR: Insufficient memory

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="UtilityControlRoom-COL-Z4T3N06"
export BK_EXAMINATION="LTLFireability"
export BK_TOOL="gspn"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-4028"
echo " Executing tool gspn"
echo " Input is UtilityControlRoom-COL-Z4T3N06, examination is LTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r307-tall-162132103600461"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/UtilityControlRoom-COL-Z4T3N06.tgz
mv UtilityControlRoom-COL-Z4T3N06 execution
cd execution
if [ "LTLFireability" = "ReachabilityDeadlock" ] || [ "LTLFireability" = "UpperBounds" ] || [ "LTLFireability" = "QuasiLiveness" ] || [ "LTLFireability" = "StableMarking" ] || [ "LTLFireability" = "Liveness" ] || [ "LTLFireability" = "OneSafe" ] || [ "LTLFireability" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "LTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "LTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "LTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property LTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "LTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' LTLFireability.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ "LTLFireability" = "ReachabilityDeadlock" ] || [ "LTLFireability" = "QuasiLiveness" ] || [ "LTLFireability" = "StableMarking" ] || [ "LTLFireability" = "Liveness" ] || [ "LTLFireability" = "OneSafe" ] ; then
echo "FORMULA_NAME LTLFireability"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;