About the Execution of LoLA for MultiCrashLeafsetExtension-PT-S16C05
| Execution Summary | |||||
| Max Memory Used (MB) |
Time wait (ms) | CPU Usage (ms) | I/O Wait (ms) | Computed Result | Execution Status |
| 16215.188 | 3600000.00 | 11899386.00 | 4776.60 | FT?T?T?FFFFFFFTT | normal |
Execution Chart
We display below the execution chart for this examination (boot time has been removed).
Trace from the execution
Formatting '/data/fkordon/mcc2021-input.r289-tall-162124152700599.qcow2', fmt=qcow2 size=4294967296 backing_file='/data/fkordon/mcc2021-input.qcow2' encryption=off cluster_size=65536 lazy_refcounts=off
Waiting for the VM to be ready (probing ssh)
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=====================================================================
Generated by BenchKit 2-4028
Executing tool lola
Input is MultiCrashLeafsetExtension-PT-S16C05, examination is ReachabilityFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r289-tall-162124152700599
=====================================================================
--------------------
preparation of the directory to be used:
/home/mcc/execution
total 9.7M
-rw-r--r-- 1 mcc users 54K May 15 08:57 CTLCardinality.txt
-rw-r--r-- 1 mcc users 189K May 15 08:57 CTLCardinality.xml
-rw-r--r-- 1 mcc users 45K May 15 08:57 CTLFireability.txt
-rw-r--r-- 1 mcc users 154K May 15 08:57 CTLFireability.xml
-rw-r--r-- 1 mcc users 7.0K May 12 07:58 LTLCardinality.txt
-rw-r--r-- 1 mcc users 31K May 12 07:58 LTLCardinality.xml
-rw-r--r-- 1 mcc users 4.4K May 12 07:58 LTLFireability.txt
-rw-r--r-- 1 mcc users 19K May 12 07:58 LTLFireability.xml
-rw-r--r-- 1 mcc users 1 May 12 08:13 NewModel
-rw-r--r-- 1 mcc users 6.2K May 11 18:51 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 22K May 11 18:51 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 5.1K May 11 15:53 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 19K May 11 15:53 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.9K May 12 04:40 UpperBounds.txt
-rw-r--r-- 1 mcc users 4.0K May 12 04:40 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 May 12 08:13 equiv_col
-rw-r--r-- 1 mcc users 7 May 12 08:13 instance
-rw-r--r-- 1 mcc users 6 May 12 08:13 iscolored
-rw-r--r-- 1 mcc users 9.1M May 12 08:13 model.pnml
--------------------
content from stdout:
=== Data for post analysis generated by BenchKit (invocation template)
The expected result is a vector of booleans
BOOL_VECTOR
here is the order used to build the result vector(from text file)
FORMULA_NAME gen-ReachabilityFireability-00
FORMULA_NAME gen-ReachabilityFireability-01
FORMULA_NAME gen-ReachabilityFireability-02
FORMULA_NAME gen-ReachabilityFireability-03
FORMULA_NAME gen-ReachabilityFireability-04
FORMULA_NAME gen-ReachabilityFireability-05
FORMULA_NAME gen-ReachabilityFireability-06
FORMULA_NAME gen-ReachabilityFireability-07
FORMULA_NAME gen-ReachabilityFireability-08
FORMULA_NAME gen-ReachabilityFireability-09
FORMULA_NAME gen-ReachabilityFireability-10
FORMULA_NAME gen-ReachabilityFireability-11
FORMULA_NAME gen-ReachabilityFireability-12
FORMULA_NAME gen-ReachabilityFireability-13
FORMULA_NAME gen-ReachabilityFireability-14
FORMULA_NAME gen-ReachabilityFireability-15
=== Now, execution of the tool begins
BK_START 1621299114095
starting LoLA
BK_INPUT MultiCrashLeafsetExtension-PT-S16C05
BK_EXAMINATION: ReachabilityFireability
bin directory: /home/mcc/BenchKit/bin
current directory: /home/mcc/execution
ReachabilityFireability
FORMULA gen-ReachabilityFireability-12 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA gen-ReachabilityFireability-13 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA gen-ReachabilityFireability-11 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA gen-ReachabilityFireability-09 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA gen-ReachabilityFireability-05 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA gen-ReachabilityFireability-07 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA gen-ReachabilityFireability-03 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA gen-ReachabilityFireability-01 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA gen-ReachabilityFireability-10 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA gen-ReachabilityFireability-00 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA gen-ReachabilityFireability-08 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA gen-ReachabilityFireability-14 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA gen-ReachabilityFireability-15 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
BK_TIME_CONFINEMENT_REACHED
--------------------
content from stderr:
lola: MEM LIMIT 32
lola: MEM LIMIT 5
lola: NET
lola: input: PNML file (--pnmlnet)
lola: reading net from /home/mcc/execution/model.pnml
lola: reading pnml
lola: PNML file contains place/transition net
lola: finished parsing
lola: closed net file /home/mcc/execution/model.pnml
lola: Reading formula.
lola: Using XML format (--xmlformula)
lola: reading XML formula
lola: reading formula from /home/mcc/execution/ReachabilityFireability.xml
lola: rewrite Frontend/Parser/formula_rewrite.k:96
lola: rewrite Frontend/Parser/formula_rewrite.k:156
lola: rewrite Frontend/Parser/formula_rewrite.k:147
lola: rewrite Frontend/Parser/formula_rewrite.k:96
lola: rewrite Frontend/Parser/formula_rewrite.k:156
lola: rewrite Frontend/Parser/formula_rewrite.k:147
lola: rewrite Frontend/Parser/formula_rewrite.k:96
lola: rewrite Frontend/Parser/formula_rewrite.k:156
lola: rewrite Frontend/Parser/formula_rewrite.k:147
lola: Created skeleton in 1.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 1.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Rule S: 0 transitions removed,0 places removed
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 1.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 1.000000 secs.
lola: LAUNCH INITIAL
lola: LAUNCH task # 37 (type CNST) for 36 gen-ReachabilityFireability-12
lola: time limit : 0 sec
lola: memory limit: 0 pages
lola: FINISHED task # 37 (type CNST) for gen-ReachabilityFireability-12
lola: result : false
lola: LAUNCH INITIAL
lola: LAUNCH task # 40 (type CNST) for 39 gen-ReachabilityFireability-13
lola: time limit : 0 sec
lola: memory limit: 0 pages
lola: FINISHED task # 40 (type CNST) for gen-ReachabilityFireability-13
lola: result : false
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
gen-ReachabilityFireability-12: INITIAL false preprocessing
gen-ReachabilityFireability-13: INITIAL false preprocessing
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
gen-ReachabilityFireability-00: EF 0 0 0 0 1 0 0 0
gen-ReachabilityFireability-01: AG 0 0 0 0 1 0 0 0
gen-ReachabilityFireability-02: EF 0 0 0 0 1 0 0 0
gen-ReachabilityFireability-03: EF 0 0 0 0 1 0 0 0
gen-ReachabilityFireability-04: AG 0 0 0 0 1 0 0 0
gen-ReachabilityFireability-05: EF 0 0 0 0 1 0 0 0
gen-ReachabilityFireability-06: EF 0 0 0 0 1 0 0 0
gen-ReachabilityFireability-07: AG 0 0 0 0 1 0 0 0
gen-ReachabilityFireability-08: AG 0 0 0 0 0 0 0 0
gen-ReachabilityFireability-09: AG 0 0 0 0 0 0 0 0
gen-ReachabilityFireability-10: EF 0 0 0 0 0 0 0 0
gen-ReachabilityFireability-11: INITIAL 0 0 0 0 0 0 0 0
gen-ReachabilityFireability-14: EF 0 0 0 0 1 0 0 0
gen-ReachabilityFireability-15: AG 0 0 0 0 0 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
Time elapsed: 34 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 16
lola: Created skeleton in 1.000000 secs.
lola: Created skeleton in 1.000000 secs.
lola: Created skeleton in 1.000000 secs.
lola: LAUNCH INITIAL
lola: LAUNCH task # 34 (type CNST) for 33 gen-ReachabilityFireability-11
lola: time limit : 0 sec
lola: memory limit: 0 pages
lola: FINISHED task # 34 (type CNST) for gen-ReachabilityFireability-11
lola: result : false
lola: Created skeleton in 1.000000 secs.
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
gen-ReachabilityFireability-11: INITIAL false preprocessing
gen-ReachabilityFireability-12: INITIAL false preprocessing
gen-ReachabilityFireability-13: INITIAL false preprocessing
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
gen-ReachabilityFireability-00: EF 0 0 0 0 1 0 0 0
gen-ReachabilityFireability-01: AG 0 0 0 0 1 0 0 0
gen-ReachabilityFireability-02: EF 0 0 0 0 1 0 0 0
gen-ReachabilityFireability-03: EF 0 0 0 0 1 0 0 0
gen-ReachabilityFireability-04: AG 0 0 0 0 1 0 0 0
gen-ReachabilityFireability-05: EF 0 0 0 0 1 0 0 0
gen-ReachabilityFireability-06: EF 0 0 0 0 1 0 0 0
gen-ReachabilityFireability-07: AG 0 0 0 0 1 0 0 0
gen-ReachabilityFireability-08: AG 0 0 0 0 1 0 0 0
gen-ReachabilityFireability-09: AG 0 0 0 0 1 0 0 0
gen-ReachabilityFireability-10: EF 0 0 0 0 1 0 0 0
gen-ReachabilityFireability-14: EF 0 0 0 0 1 0 0 0
gen-ReachabilityFireability-15: AG 0 0 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
Time elapsed: 39 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 16
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: LAUNCH task # 53 (type EXCL) for 27 gen-ReachabilityFireability-09
lola: time limit : 273 sec
lola: memory limit: 32 pages
lola: LAUNCH task # 49 (type FNDP) for 27 gen-ReachabilityFireability-09
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 50 (type EQUN) for 27 gen-ReachabilityFireability-09
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: LAUNCH task # 52 (type SRCH) for 27 gen-ReachabilityFireability-09
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
gen-ReachabilityFireability-11: INITIAL false preprocessing
gen-ReachabilityFireability-12: INITIAL false preprocessing
gen-ReachabilityFireability-13: INITIAL false preprocessing
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
gen-ReachabilityFireability-00: EF 0 0 0 0 1 0 0 0
gen-ReachabilityFireability-01: AG 0 0 0 0 1 0 0 0
gen-ReachabilityFireability-02: EF 0 0 0 0 1 0 0 0
gen-ReachabilityFireability-03: EF 0 0 0 0 1 0 0 0
gen-ReachabilityFireability-04: AG 0 0 0 0 1 0 0 0
gen-ReachabilityFireability-05: EF 0 0 0 0 1 0 0 0
gen-ReachabilityFireability-06: EF 0 0 0 0 1 0 0 0
gen-ReachabilityFireability-07: AG 0 0 0 0 1 0 0 0
gen-ReachabilityFireability-08: AG 0 0 0 0 1 0 0 0
gen-ReachabilityFireability-09: AG 0 1 4 0 1 0 0 0
gen-ReachabilityFireability-10: EF 0 0 0 0 1 0 0 0
gen-ReachabilityFireability-14: EF 0 0 0 0 1 0 0 0
gen-ReachabilityFireability-15: AG 0 0 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
49 EF FNDP 0/1778 0/5 gen-ReachabilityFireability-09 --
50 EF STEQ 0/3556 0/5 gen-ReachabilityFireability-09 sara not yet started (preprocessing).
52 EF SRCH 0/3556 1/5 gen-ReachabilityFireability-09 --
53 EF EXCL 0/273 1/32 gen-ReachabilityFireability-09 --
Time elapsed: 44 secs. Pages in use: 2
# running tasks: 4 of 4 Visible: 16
sara: try reading problem file /home/mcc/execution/ReachabilityFireability-50.sara.
lola: FINISHED task # 53 (type EXCL) for gen-ReachabilityFireability-09
lola: result : true
lola: markings : 1576
lola: fired transitions : 1831
lola: time used : 1.000000
lola: memory pages used : 1
lola: CANCELED task # 49 (type FNDP) for gen-ReachabilityFireability-09 (obsolete)
lola: CANCELED task # 50 (type EQUN) for gen-ReachabilityFireability-09 (obsolete)
lola: CANCELED task # 52 (type SRCH) for gen-ReachabilityFireability-09 (obsolete)
lola: FINISHED task # 50 (type EQUN) for gen-ReachabilityFireability-09
lola: result : unknown
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: LAUNCH task # 59 (type EXCL) for 15 gen-ReachabilityFireability-05
lola: time limit : 323 sec
lola: memory limit: 32 pages
lola: LAUNCH task # 55 (type FNDP) for 15 gen-ReachabilityFireability-05
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 56 (type EQUN) for 15 gen-ReachabilityFireability-05
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: LAUNCH task # 58 (type SRCH) for 15 gen-ReachabilityFireability-05
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
sara: try reading problem file /home/mcc/execution/ReachabilityFireability-56.sara.
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: FINISHED task # 58 (type SRCH) for gen-ReachabilityFireability-05
lola: result : true
lola: markings : 78
lola: fired transitions : 77
lola: time used : 1.000000
lola: memory pages used : 1
lola: CANCELED task # 55 (type FNDP) for gen-ReachabilityFireability-05 (obsolete)
lola: CANCELED task # 56 (type EQUN) for gen-ReachabilityFireability-05 (obsolete)
lola: CANCELED task # 59 (type EXCL) for gen-ReachabilityFireability-05 (obsolete)
lola: LAUNCH task # 78 (type EXCL) for 6 gen-ReachabilityFireability-02
lola: time limit : 323 sec
lola: memory limit: 32 pages
lola: LAUNCH task # 62 (type FNDP) for 21 gen-ReachabilityFireability-07
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 63 (type EQUN) for 21 gen-ReachabilityFireability-07
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 65 (type SRCH) for 21 gen-ReachabilityFireability-07
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 56 (type EQUN) for gen-ReachabilityFireability-05
lola: result : unknown
lola: FINISHED task # 55 (type FNDP) for gen-ReachabilityFireability-05
lola: result : unknown
lola: fired transitions : 422
lola: tried executions : 12
lola: time used : 1.000000
lola: memory pages used : 0
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: FINISHED task # 49 (type FNDP) for gen-ReachabilityFireability-09
lola: result : true
lola: fired transitions : 4783
lola: tried executions : 207
lola: time used : 3.000000
lola: memory pages used : 0
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
sara: try reading problem file /home/mcc/execution/ReachabilityFireability-63.sara.
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: FINISHED task # 62 (type FNDP) for gen-ReachabilityFireability-07
lola: result : true
lola: fired transitions : 9618
lola: tried executions : 251
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lola: LAUNCH task # 129 (type SRCH) for 9 gen-ReachabilityFireability-03
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lola: result : true
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lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
sara: try reading problem file /home/mcc/execution/ReachabilityFireability-127.sara.
sara: try reading problem file /home/mcc/execution/ReachabilityFireability-91.sara.
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
gen-ReachabilityFireability-03: EF true findpath
gen-ReachabilityFireability-05: EF true tandem / insertion
gen-ReachabilityFireability-07: AG false findpath
gen-ReachabilityFireability-09: AG false tandem / relaxed
gen-ReachabilityFireability-11: INITIAL false preprocessing
gen-ReachabilityFireability-12: INITIAL false preprocessing
gen-ReachabilityFireability-13: INITIAL false preprocessing
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
gen-ReachabilityFireability-00: EF 0 5 0 0 1 0 0 0
gen-ReachabilityFireability-01: AG 0 2 3 0 1 0 0 0
gen-ReachabilityFireability-02: EF 0 4 1 0 1 0 0 0
gen-ReachabilityFireability-04: AG 0 5 0 0 1 0 0 0
gen-ReachabilityFireability-06: EF 0 5 0 0 1 0 0 0
gen-ReachabilityFireability-08: AG 0 5 0 0 1 0 0 0
gen-ReachabilityFireability-10: EF 0 5 0 0 1 0 0 0
gen-ReachabilityFireability-14: EF 0 5 0 0 1 0 0 0
gen-ReachabilityFireability-15: AG 0 5 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
78 EF EXCL 2/394 3/32 gen-ReachabilityFireability-02 53129 m, 10625 m/sec, 62622 t fired, .
90 EF FNDP 1/296 0/5 gen-ReachabilityFireability-01 8467 t fired, 398 attempts, .
91 EF STEQ 1/296 0/5 gen-ReachabilityFireability-01 sara is running.
95 EF SRCH 1/296 1/5 gen-ReachabilityFireability-01 7803 m, 1560 m/sec, 8953 t fired, .
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sara: place or transition ordering is non-deterministic
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gen-ReachabilityFireability-03: EF true findpath
gen-ReachabilityFireability-05: EF true tandem / insertion
gen-ReachabilityFireability-07: AG false findpath
gen-ReachabilityFireability-09: AG false tandem / relaxed
gen-ReachabilityFireability-11: INITIAL false preprocessing
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gen-ReachabilityFireability-13: INITIAL false preprocessing
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
gen-ReachabilityFireability-00: EF 0 5 0 0 1 0 0 0
gen-ReachabilityFireability-01: AG 0 2 3 0 1 0 0 0
gen-ReachabilityFireability-02: EF 0 4 1 0 1 0 0 0
gen-ReachabilityFireability-04: AG 0 5 0 0 1 0 0 0
gen-ReachabilityFireability-06: EF 0 5 0 0 1 0 0 0
gen-ReachabilityFireability-08: AG 0 5 0 0 1 0 0 0
gen-ReachabilityFireability-10: EF 0 5 0 0 1 0 0 0
gen-ReachabilityFireability-14: EF 0 5 0 0 1 0 0 0
gen-ReachabilityFireability-15: AG 0 5 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
78 EF EXCL 7/394 8/32 gen-ReachabilityFireability-02 197417 m, 28857 m/sec, 233149 t fired, .
90 EF FNDP 6/295 0/5 gen-ReachabilityFireability-01 65522 t fired, 2764 attempts, .
91 EF STEQ 6/295 0/5 gen-ReachabilityFireability-01 sara is running.
95 EF SRCH 6/295 3/5 gen-ReachabilityFireability-01 60892 m, 10617 m/sec, 70514 t fired, .
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gen-ReachabilityFireability-03: EF true findpath
gen-ReachabilityFireability-05: EF true tandem / insertion
gen-ReachabilityFireability-07: AG false findpath
gen-ReachabilityFireability-09: AG false tandem / relaxed
gen-ReachabilityFireability-11: INITIAL false preprocessing
gen-ReachabilityFireability-12: INITIAL false preprocessing
gen-ReachabilityFireability-13: INITIAL false preprocessing
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
gen-ReachabilityFireability-00: EF 0 5 0 0 1 0 0 0
gen-ReachabilityFireability-01: AG 0 2 3 0 1 0 0 0
gen-ReachabilityFireability-02: EF 0 4 1 0 1 0 0 0
gen-ReachabilityFireability-04: AG 0 5 0 0 1 0 0 0
gen-ReachabilityFireability-06: EF 0 5 0 0 1 0 0 0
gen-ReachabilityFireability-08: AG 0 5 0 0 1 0 0 0
gen-ReachabilityFireability-10: EF 0 5 0 0 1 0 0 0
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gen-ReachabilityFireability-15: AG 0 5 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
78 EF EXCL 12/394 14/32 gen-ReachabilityFireability-02 343088 m, 29134 m/sec, 405548 t fired, .
90 EF FNDP 11/290 0/5 gen-ReachabilityFireability-01 128253 t fired, 5290 attempts, .
91 EF STEQ 11/290 0/5 gen-ReachabilityFireability-01 sara is running.
95 EF SRCH 11/290 5/5 gen-ReachabilityFireability-01 107120 m, 9245 m/sec, 124495 t fired, .
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lola: result : unknown
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lola: FINISHED task # 115 (type EQUN) for gen-ReachabilityFireability-10
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lola: rewrite Frontend/Parser/formula_rewrite.k:711
sara: try reading problem file /home/mcc/execution/ReachabilityFireability-70.sara.
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
gen-ReachabilityFireability-01: AG true state equation
gen-ReachabilityFireability-03: EF true findpath
gen-ReachabilityFireability-05: EF true tandem / insertion
gen-ReachabilityFireability-07: AG false findpath
gen-ReachabilityFireability-09: AG false tandem / relaxed
gen-ReachabilityFireability-10: EF false state equation
gen-ReachabilityFireability-11: INITIAL false preprocessing
gen-ReachabilityFireability-12: INITIAL false preprocessing
gen-ReachabilityFireability-13: INITIAL false preprocessing
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
gen-ReachabilityFireability-00: EF 0 2 3 0 1 0 0 0
gen-ReachabilityFireability-02: EF 0 4 1 0 1 0 0 0
gen-ReachabilityFireability-04: AG 0 5 0 0 1 0 0 0
gen-ReachabilityFireability-06: EF 0 5 0 0 1 0 0 0
gen-ReachabilityFireability-08: AG 0 5 0 0 1 0 0 0
gen-ReachabilityFireability-14: EF 0 5 0 0 1 0 0 0
gen-ReachabilityFireability-15: AG 0 5 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
68 EF FNDP 1/353 0/5 gen-ReachabilityFireability-00 12874 t fired, 386 attempts, .
70 EF STEQ 1/393 0/5 gen-ReachabilityFireability-00 sara is running.
72 EF SRCH 1/393 1/5 gen-ReachabilityFireability-00 10462 m, 2092 m/sec, 12210 t fired, .
78 EF EXCL 17/507 20/32 gen-ReachabilityFireability-02 489407 m, 29263 m/sec, 578849 t fired, .
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gen-ReachabilityFireability-01: AG true state equation
gen-ReachabilityFireability-03: EF true findpath
gen-ReachabilityFireability-05: EF true tandem / insertion
gen-ReachabilityFireability-07: AG false findpath
gen-ReachabilityFireability-09: AG false tandem / relaxed
gen-ReachabilityFireability-10: EF false state equation
gen-ReachabilityFireability-11: INITIAL false preprocessing
gen-ReachabilityFireability-12: INITIAL false preprocessing
gen-ReachabilityFireability-13: INITIAL false preprocessing
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
gen-ReachabilityFireability-00: EF 0 2 3 0 1 0 0 0
gen-ReachabilityFireability-02: EF 0 4 1 0 1 0 0 0
gen-ReachabilityFireability-04: AG 0 5 0 0 1 0 0 0
gen-ReachabilityFireability-06: EF 0 5 0 0 1 0 0 0
gen-ReachabilityFireability-08: AG 0 5 0 0 1 0 0 0
gen-ReachabilityFireability-14: EF 0 5 0 0 1 0 0 0
gen-ReachabilityFireability-15: AG 0 5 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
68 EF FNDP 6/352 0/5 gen-ReachabilityFireability-00 61439 t fired, 1794 attempts, .
70 EF STEQ 6/392 0/5 gen-ReachabilityFireability-00 sara is running.
72 EF SRCH 6/392 3/5 gen-ReachabilityFireability-00 62442 m, 10396 m/sec, 73105 t fired, .
78 EF EXCL 22/507 24/32 gen-ReachabilityFireability-02 612667 m, 24652 m/sec, 725046 t fired, .
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gen-ReachabilityFireability-01: AG true state equation
gen-ReachabilityFireability-03: EF true findpath
gen-ReachabilityFireability-05: EF true tandem / insertion
gen-ReachabilityFireability-07: AG false findpath
gen-ReachabilityFireability-09: AG false tandem / relaxed
gen-ReachabilityFireability-10: EF false state equation
gen-ReachabilityFireability-11: INITIAL false preprocessing
gen-ReachabilityFireability-12: INITIAL false preprocessing
gen-ReachabilityFireability-13: INITIAL false preprocessing
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
gen-ReachabilityFireability-00: EF 0 2 3 0 1 0 0 0
gen-ReachabilityFireability-02: EF 0 4 1 0 1 0 0 0
gen-ReachabilityFireability-04: AG 0 5 0 0 1 0 0 0
gen-ReachabilityFireability-06: EF 0 5 0 0 1 0 0 0
gen-ReachabilityFireability-08: AG 0 5 0 0 1 0 0 0
gen-ReachabilityFireability-14: EF 0 5 0 0 1 0 0 0
gen-ReachabilityFireability-15: AG 0 5 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
68 EF FNDP 11/347 0/5 gen-ReachabilityFireability-00 113400 t fired, 3289 attempts, .
70 EF STEQ 11/387 0/5 gen-ReachabilityFireability-00 sara is running.
72 EF SRCH 11/387 5/5 gen-ReachabilityFireability-00 110880 m, 9687 m/sec, 130096 t fired, .
78 EF EXCL 27/507 28/32 gen-ReachabilityFireability-02 718849 m, 21236 m/sec, 851039 t fired, .
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FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
gen-ReachabilityFireability-01: AG true state equation
gen-ReachabilityFireability-03: EF true findpath
gen-ReachabilityFireability-05: EF true tandem / insertion
gen-ReachabilityFireability-07: AG false findpath
gen-ReachabilityFireability-09: AG false tandem / relaxed
gen-ReachabilityFireability-10: EF false state equation
gen-ReachabilityFireability-11: INITIAL false preprocessing
gen-ReachabilityFireability-12: INITIAL false preprocessing
gen-ReachabilityFireability-13: INITIAL false preprocessing
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gen-ReachabilityFireability-00: EF 0 2 2 0 1 0 1 0
gen-ReachabilityFireability-02: EF 0 4 0 0 1 0 1 0
gen-ReachabilityFireability-04: AG 0 5 0 0 1 0 0 0
gen-ReachabilityFireability-06: EF 0 5 0 0 1 0 0 0
gen-ReachabilityFireability-08: AG 0 5 0 0 1 0 0 0
gen-ReachabilityFireability-14: EF 0 5 0 0 1 0 0 0
gen-ReachabilityFireability-15: AG 0 5 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
68 EF FNDP 16/342 0/5 gen-ReachabilityFireability-00 173627 t fired, 4997 attempts, .
70 EF STEQ 16/382 0/5 gen-ReachabilityFireability-00 sara is running.
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lola: result : false
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lola: result : unknown
lola: fired transitions : 181678
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lola: time used : 17.000000
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lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: FINISHED task # 89 (type FNDP) for gen-ReachabilityFireability-08
lola: result : true
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lola: time limit : 32000000 sec
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lola: rewrite Frontend/Parser/formula_rewrite.k:711
sara: try reading problem file /home/mcc/execution/ReachabilityFireability-93.sara.
sara: try reading problem file /home/mcc/execution/ReachabilityFireability-102.sara.
lola: FINISHED task # 101 (type FNDP) for gen-ReachabilityFireability-14
lola: result : true
lola: fired transitions : 2310
lola: tried executions : 67
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lola: memory pages used : 0
lola: CANCELED task # 102 (type EQUN) for gen-ReachabilityFireability-14 (obsolete)
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lola: FINISHED task # 102 (type EQUN) for gen-ReachabilityFireability-14
lola: result : unknown
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
sara: try reading problem file /home/mcc/execution/ReachabilityFireability-109.sara.
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
gen-ReachabilityFireability-00: EF false state equation
gen-ReachabilityFireability-01: AG true state equation
gen-ReachabilityFireability-03: EF true findpath
gen-ReachabilityFireability-05: EF true tandem / insertion
gen-ReachabilityFireability-07: AG false findpath
gen-ReachabilityFireability-08: AG false findpath
gen-ReachabilityFireability-09: AG false tandem / relaxed
gen-ReachabilityFireability-10: EF false state equation
gen-ReachabilityFireability-11: INITIAL false preprocessing
gen-ReachabilityFireability-12: INITIAL false preprocessing
gen-ReachabilityFireability-13: INITIAL false preprocessing
gen-ReachabilityFireability-14: EF true findpath
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
gen-ReachabilityFireability-02: EF 0 4 0 0 1 0 1 0
gen-ReachabilityFireability-04: AG 0 3 2 0 1 0 0 0
gen-ReachabilityFireability-06: EF 0 4 1 0 1 0 0 0
gen-ReachabilityFireability-15: AG 0 4 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
81 EF FNDP 5/702 0/5 gen-ReachabilityFireability-15 39933 t fired, 1276 attempts, .
108 EF FNDP 3/703 0/5 gen-ReachabilityFireability-04 31146 t fired, 1030 attempts, .
109 EF STEQ 3/586 0/5 gen-ReachabilityFireability-04 sara is running.
124 EF EXCL 5/1173 4/32 gen-ReachabilityFireability-06 95965 m, 19193 m/sec, 113315 t fired, .
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gen-ReachabilityFireability-00: EF false state equation
gen-ReachabilityFireability-01: AG true state equation
gen-ReachabilityFireability-03: EF true findpath
gen-ReachabilityFireability-05: EF true tandem / insertion
gen-ReachabilityFireability-07: AG false findpath
gen-ReachabilityFireability-08: AG false findpath
gen-ReachabilityFireability-09: AG false tandem / relaxed
gen-ReachabilityFireability-10: EF false state equation
gen-ReachabilityFireability-11: INITIAL false preprocessing
gen-ReachabilityFireability-12: INITIAL false preprocessing
gen-ReachabilityFireability-13: INITIAL false preprocessing
gen-ReachabilityFireability-14: EF true findpath
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
gen-ReachabilityFireability-02: EF 0 4 0 0 1 0 1 0
gen-ReachabilityFireability-04: AG 0 3 2 0 1 0 0 0
gen-ReachabilityFireability-06: EF 0 4 1 0 1 0 0 0
gen-ReachabilityFireability-15: AG 0 4 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
81 EF FNDP 10/699 0/5 gen-ReachabilityFireability-15 78334 t fired, 2549 attempts, .
108 EF FNDP 8/700 0/5 gen-ReachabilityFireability-04 70097 t fired, 2318 attempts, .
109 EF STEQ 8/583 0/5 gen-ReachabilityFireability-04 sara is running.
124 EF EXCL 10/1173 9/32 gen-ReachabilityFireability-06 203185 m, 21444 m/sec, 239997 t fired, .
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lola: FINISHED task # 93 (type EQUN) for gen-ReachabilityFireability-08
lola: result : true
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
gen-ReachabilityFireability-00: EF false state equation
gen-ReachabilityFireability-01: AG true state equation
gen-ReachabilityFireability-03: EF true findpath
gen-ReachabilityFireability-05: EF true tandem / insertion
gen-ReachabilityFireability-07: AG false findpath
gen-ReachabilityFireability-08: AG false findpath
gen-ReachabilityFireability-09: AG false tandem / relaxed
gen-ReachabilityFireability-10: EF false state equation
gen-ReachabilityFireability-11: INITIAL false preprocessing
gen-ReachabilityFireability-12: INITIAL false preprocessing
gen-ReachabilityFireability-13: INITIAL false preprocessing
gen-ReachabilityFireability-14: EF true findpath
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
gen-ReachabilityFireability-02: EF 0 3 1 0 1 0 1 0
gen-ReachabilityFireability-04: AG 0 3 1 0 2 0 0 0
gen-ReachabilityFireability-06: EF 0 4 1 0 1 0 0 0
gen-ReachabilityFireability-15: AG 0 4 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
69 EF FNDP 3/699 0/5 gen-ReachabilityFireability-02 26314 t fired, 826 attempts, .
81 EF FNDP 15/690 0/5 gen-ReachabilityFireability-15 117942 t fired, 3846 attempts, .
108 EF FNDP 13/691 0/5 gen-ReachabilityFireability-04 111836 t fired, 3703 attempts, .
124 EF EXCL 15/1173 13/32 gen-ReachabilityFireability-06 309362 m, 21235 m/sec, 365715 t fired, .
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gen-ReachabilityFireability-00: EF false state equation
gen-ReachabilityFireability-01: AG true state equation
gen-ReachabilityFireability-03: EF true findpath
gen-ReachabilityFireability-05: EF true tandem / insertion
gen-ReachabilityFireability-07: AG false findpath
gen-ReachabilityFireability-08: AG false findpath
gen-ReachabilityFireability-09: AG false tandem / relaxed
gen-ReachabilityFireability-10: EF false state equation
gen-ReachabilityFireability-11: INITIAL false preprocessing
gen-ReachabilityFireability-12: INITIAL false preprocessing
gen-ReachabilityFireability-13: INITIAL false preprocessing
gen-ReachabilityFireability-14: EF true findpath
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
gen-ReachabilityFireability-02: EF 0 3 1 0 1 0 1 0
gen-ReachabilityFireability-04: AG 0 3 1 0 2 0 0 0
gen-ReachabilityFireability-06: EF 0 4 1 0 1 0 0 0
gen-ReachabilityFireability-15: AG 0 4 1 0 1 0 0 0
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85 EF EXCL 25/3446 25/32 gen-ReachabilityFireability-15 633837 m, 24069 m/sec, 750192 t fired, .
108 EF FNDP 98/610 0/5 gen-ReachabilityFireability-04 955878 t fired, 31856 attempts, .
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69 EF FNDP 93/613 0/5 gen-ReachabilityFireability-02 896113 t fired, 29850 attempts, .
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85 EF EXCL 30/3446 29/32 gen-ReachabilityFireability-15 751517 m, 23536 m/sec, 889502 t fired, .
108 EF FNDP 103/605 0/5 gen-ReachabilityFireability-04 1011573 t fired, 33728 attempts, .
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69 EF FNDP 418/464 0/5 gen-ReachabilityFireability-02 4079119 t fired, 136853 attempts, .
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gen-ReachabilityFireability-08: AG false findpath
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gen-ReachabilityFireability-08: AG false findpath
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sara: try reading problem file /home/mcc/execution/ReachabilityFireability-75.sara.
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gen-ReachabilityFireability-00: EF false state equation
gen-ReachabilityFireability-01: AG true state equation
gen-ReachabilityFireability-03: EF true findpath
gen-ReachabilityFireability-05: EF true tandem / insertion
gen-ReachabilityFireability-07: AG false findpath
gen-ReachabilityFireability-08: AG false findpath
gen-ReachabilityFireability-09: AG false tandem / relaxed
gen-ReachabilityFireability-10: EF false state equation
gen-ReachabilityFireability-11: INITIAL false preprocessing
gen-ReachabilityFireability-12: INITIAL false preprocessing
gen-ReachabilityFireability-13: INITIAL false preprocessing
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gen-ReachabilityFireability-15: AG true state equation
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69 EF FNDP 473/1283 0/5 gen-ReachabilityFireability-02 4616153 t fired, 154967 attempts, .
75 EF STEQ 2/1519 0/5 gen-ReachabilityFireability-02 sara is running.
77 EF SRCH 2/1519 1/5 gen-ReachabilityFireability-02 20816 m, 4163 m/sec, 24167 t fired, .
120 EF FNDP 375/1332 0/5 gen-ReachabilityFireability-06 3404110 t fired, 97391 attempts, .
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gen-ReachabilityFireability-12: INITIAL false preprocessing
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69 EF FNDP 478/1281 0/5 gen-ReachabilityFireability-02 4666555 t fired, 156643 attempts, .
75 EF STEQ 7/1517 0/5 gen-ReachabilityFireability-02 sara is running.
77 EF SRCH 7/1517 3/5 gen-ReachabilityFireability-02 62695 m, 8375 m/sec, 73111 t fired, .
120 EF FNDP 380/1330 0/5 gen-ReachabilityFireability-06 3451450 t fired, 98749 attempts, .
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gen-ReachabilityFireability-10: EF false state equation
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gen-ReachabilityFireability-12: INITIAL false preprocessing
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69 EF FNDP 483/1276 0/5 gen-ReachabilityFireability-02 4719449 t fired, 158416 attempts, .
75 EF STEQ 12/1512 0/5 gen-ReachabilityFireability-02 sara is running.
77 EF SRCH 12/1512 4/5 gen-ReachabilityFireability-02 101676 m, 7796 m/sec, 118907 t fired, .
120 EF FNDP 385/1325 0/5 gen-ReachabilityFireability-06 3498031 t fired, 100083 attempts, .
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69 EF FNDP 488/1271 0/5 gen-ReachabilityFireability-02 4774277 t fired, 160260 attempts, .
75 EF STEQ 17/1507 0/5 gen-ReachabilityFireability-02 sara is running.
120 EF FNDP 390/1320 0/5 gen-ReachabilityFireability-06 3547521 t fired, 101500 attempts, .
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gen-ReachabilityFireability-07: AG false findpath
gen-ReachabilityFireability-08: AG false findpath
gen-ReachabilityFireability-09: AG false tandem / relaxed
gen-ReachabilityFireability-10: EF false state equation
gen-ReachabilityFireability-11: INITIAL false preprocessing
gen-ReachabilityFireability-12: INITIAL false preprocessing
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69 EF FNDP 493/3021 0/5 gen-ReachabilityFireability-02 4825175 t fired, 161983 attempts, .
75 EF STEQ 22/1502 0/5 gen-ReachabilityFireability-02 sara is running.
120 EF FNDP 395/1315 0/5 gen-ReachabilityFireability-06 3587332 t fired, 102642 attempts, .
121 EF STEQ 5/1510 0/5 gen-ReachabilityFireability-06 sara is running.
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gen-ReachabilityFireability-03: EF true findpath
gen-ReachabilityFireability-05: EF true tandem / insertion
gen-ReachabilityFireability-07: AG false findpath
gen-ReachabilityFireability-08: AG false findpath
gen-ReachabilityFireability-09: AG false tandem / relaxed
gen-ReachabilityFireability-10: EF false state equation
gen-ReachabilityFireability-11: INITIAL false preprocessing
gen-ReachabilityFireability-12: INITIAL false preprocessing
gen-ReachabilityFireability-13: INITIAL false preprocessing
gen-ReachabilityFireability-14: EF true findpath
gen-ReachabilityFireability-15: AG true state equation
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69 EF FNDP 498/3016 0/5 gen-ReachabilityFireability-02 4876216 t fired, 163695 attempts, .
75 EF STEQ 27/1497 0/5 gen-ReachabilityFireability-02 sara is running.
120 EF FNDP 400/1310 0/5 gen-ReachabilityFireability-06 3633841 t fired, 103974 attempts, .
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gen-ReachabilityFireability-07: AG false findpath
gen-ReachabilityFireability-08: AG false findpath
gen-ReachabilityFireability-09: AG false tandem / relaxed
gen-ReachabilityFireability-10: EF false state equation
gen-ReachabilityFireability-11: INITIAL false preprocessing
gen-ReachabilityFireability-12: INITIAL false preprocessing
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69 EF FNDP 503/3011 0/5 gen-ReachabilityFireability-02 4930046 t fired, 165488 attempts, .
75 EF STEQ 32/1492 0/5 gen-ReachabilityFireability-02 sara is running.
120 EF FNDP 405/1305 0/5 gen-ReachabilityFireability-06 3680757 t fired, 105318 attempts, .
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gen-ReachabilityFireability-07: AG false findpath
gen-ReachabilityFireability-08: AG false findpath
gen-ReachabilityFireability-09: AG false tandem / relaxed
gen-ReachabilityFireability-10: EF false state equation
gen-ReachabilityFireability-11: INITIAL false preprocessing
gen-ReachabilityFireability-12: INITIAL false preprocessing
gen-ReachabilityFireability-13: INITIAL false preprocessing
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69 EF FNDP 508/3006 0/5 gen-ReachabilityFireability-02 4980870 t fired, 167201 attempts, .
75 EF STEQ 37/1487 0/5 gen-ReachabilityFireability-02 sara is running.
120 EF FNDP 410/1300 0/5 gen-ReachabilityFireability-06 3727014 t fired, 106642 attempts, .
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gen-ReachabilityFireability-07: AG false findpath
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gen-ReachabilityFireability-10: EF false state equation
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gen-ReachabilityFireability-12: INITIAL false preprocessing
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69 EF FNDP 513/3001 0/5 gen-ReachabilityFireability-02 5030480 t fired, 168863 attempts, .
75 EF STEQ 42/1482 0/5 gen-ReachabilityFireability-02 sara is running.
120 EF FNDP 415/1295 0/5 gen-ReachabilityFireability-06 3772845 t fired, 107953 attempts, .
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gen-ReachabilityFireability-12: INITIAL false preprocessing
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69 EF FNDP 518/2996 0/5 gen-ReachabilityFireability-02 5078603 t fired, 170465 attempts, .
75 EF STEQ 47/1477 0/5 gen-ReachabilityFireability-02 sara is running.
120 EF FNDP 420/1290 0/5 gen-ReachabilityFireability-06 3815833 t fired, 109185 attempts, .
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69 EF FNDP 523/2991 0/5 gen-ReachabilityFireability-02 5125488 t fired, 172044 attempts, .
75 EF STEQ 52/1472 0/5 gen-ReachabilityFireability-02 sara is running.
120 EF FNDP 425/1285 0/5 gen-ReachabilityFireability-06 3856792 t fired, 110358 attempts, .
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69 EF FNDP 528/2986 0/5 gen-ReachabilityFireability-02 5171913 t fired, 173604 attempts, .
75 EF STEQ 57/1467 0/5 gen-ReachabilityFireability-02 sara is running.
120 EF FNDP 430/1280 0/5 gen-ReachabilityFireability-06 3906637 t fired, 111785 attempts, .
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69 EF FNDP 533/2981 0/5 gen-ReachabilityFireability-02 5220884 t fired, 175251 attempts, .
75 EF STEQ 62/1462 0/5 gen-ReachabilityFireability-02 sara is running.
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69 EF FNDP 538/2976 0/5 gen-ReachabilityFireability-02 5270101 t fired, 176927 attempts, .
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69 EF FNDP 543/2971 0/5 gen-ReachabilityFireability-02 5320557 t fired, 178602 attempts, .
75 EF STEQ 72/1452 0/5 gen-ReachabilityFireability-02 sara is running.
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69 EF FNDP 553/2961 0/5 gen-ReachabilityFireability-02 5427264 t fired, 182140 attempts, .
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69 EF FNDP 558/2956 0/5 gen-ReachabilityFireability-02 5477525 t fired, 183848 attempts, .
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69 EF FNDP 633/2881 0/5 gen-ReachabilityFireability-02 6228658 t fired, 209081 attempts, .
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69 EF FNDP 638/2876 0/5 gen-ReachabilityFireability-02 6276263 t fired, 210676 attempts, .
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69 EF FNDP 643/2871 0/5 gen-ReachabilityFireability-02 6328308 t fired, 212407 attempts, .
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69 EF FNDP 713/2801 0/5 gen-ReachabilityFireability-02 7027481 t fired, 235850 attempts, .
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69 EF FNDP 718/2796 0/5 gen-ReachabilityFireability-02 7078974 t fired, 237596 attempts, .
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69 EF FNDP 873/2641 0/5 gen-ReachabilityFireability-02 8615051 t fired, 289159 attempts, .
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69 EF FNDP 878/2636 0/5 gen-ReachabilityFireability-02 8666774 t fired, 290903 attempts, .
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69 EF FNDP 948/2566 0/5 gen-ReachabilityFireability-02 9345514 t fired, 313715 attempts, .
75 EF STEQ 477/1047 0/5 gen-ReachabilityFireability-02 sara is running.
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69 EF FNDP 953/2561 0/5 gen-ReachabilityFireability-02 9398633 t fired, 315505 attempts, .
75 EF STEQ 482/1042 0/5 gen-ReachabilityFireability-02 sara is running.
120 EF FNDP 855/855 0/5 gen-ReachabilityFireability-06 7822122 t fired, 223987 attempts, .
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69 EF FNDP 958/2556 0/5 gen-ReachabilityFireability-02 9446973 t fired, 317115 attempts, .
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69 EF FNDP 963/2551 0/5 gen-ReachabilityFireability-02 9502531 t fired, 318969 attempts, .
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69 EF FNDP 968/3509 0/5 gen-ReachabilityFireability-02 9560468 t fired, 320891 attempts, .
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123 EF SRCH 10/2551 5/5 gen-ReachabilityFireability-06 94966 m, 9413 m/sec, 106236 t fired, .
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69 EF FNDP 973/3509 0/5 gen-ReachabilityFireability-02 9629946 t fired, 323220 attempts, .
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69 EF FNDP 978/3509 0/5 gen-ReachabilityFireability-02 9705284 t fired, 325787 attempts, .
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69 EF FNDP 1213/3509 0/5 gen-ReachabilityFireability-02 13236661 t fired, 444463 attempts, .
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69 EF FNDP 1218/3509 0/5 gen-ReachabilityFireability-02 13311906 t fired, 446997 attempts, .
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69 EF FNDP 1308/3509 0/5 gen-ReachabilityFireability-02 14666493 t fired, 492481 attempts, .
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69 EF FNDP 1763/3509 0/5 gen-ReachabilityFireability-02 21528214 t fired, 723078 attempts, .
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69 EF FNDP 1768/3509 0/5 gen-ReachabilityFireability-02 21603743 t fired, 725623 attempts, .
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69 EF FNDP 1773/3509 0/5 gen-ReachabilityFireability-02 21679497 t fired, 728181 attempts, .
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69 EF FNDP 1803/3509 0/5 gen-ReachabilityFireability-02 22132128 t fired, 743412 attempts, .
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69 EF FNDP 1854/3509 0/5 gen-ReachabilityFireability-02 22887125 t fired, 768803 attempts, .
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69 EF FNDP 1859/3509 0/5 gen-ReachabilityFireability-02 22962605 t fired, 771325 attempts, .
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69 EF FNDP 1864/3509 0/5 gen-ReachabilityFireability-02 23038113 t fired, 773841 attempts, .
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69 EF FNDP 1869/3509 0/5 gen-ReachabilityFireability-02 23113633 t fired, 776413 attempts, .
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69 EF FNDP 1874/3509 0/5 gen-ReachabilityFireability-02 23189029 t fired, 778935 attempts, .
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69 EF FNDP 1879/3509 0/5 gen-ReachabilityFireability-02 23264561 t fired, 781465 attempts, .
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69 EF FNDP 1884/3509 0/5 gen-ReachabilityFireability-02 23340197 t fired, 784039 attempts, .
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69 EF FNDP 1889/3509 0/5 gen-ReachabilityFireability-02 23415618 t fired, 786570 attempts, .
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69 EF FNDP 1894/3509 0/5 gen-ReachabilityFireability-02 23491161 t fired, 789089 attempts, .
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69 EF FNDP 1899/3509 0/5 gen-ReachabilityFireability-02 23566806 t fired, 791637 attempts, .
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69 EF FNDP 1904/3509 0/5 gen-ReachabilityFireability-02 23642143 t fired, 794157 attempts, .
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69 EF FNDP 1909/3509 0/5 gen-ReachabilityFireability-02 23717772 t fired, 796699 attempts, .
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69 EF FNDP 1914/3509 0/5 gen-ReachabilityFireability-02 23793341 t fired, 799235 attempts, .
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69 EF FNDP 1919/3509 0/5 gen-ReachabilityFireability-02 23868824 t fired, 801771 attempts, .
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69 EF FNDP 1924/3509 0/5 gen-ReachabilityFireability-02 23944330 t fired, 804305 attempts, .
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69 EF FNDP 1944/3509 0/5 gen-ReachabilityFireability-02 24246547 t fired, 814454 attempts, .
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69 EF FNDP 1949/3509 0/5 gen-ReachabilityFireability-02 24322014 t fired, 816985 attempts, .
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69 EF FNDP 1954/3509 0/5 gen-ReachabilityFireability-02 24397661 t fired, 819536 attempts, .
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69 EF FNDP 1959/3509 0/5 gen-ReachabilityFireability-02 24473111 t fired, 822065 attempts, .
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69 EF FNDP 1964/3509 0/5 gen-ReachabilityFireability-02 24548633 t fired, 824603 attempts, .
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69 EF FNDP 1969/3509 0/5 gen-ReachabilityFireability-02 24624052 t fired, 827126 attempts, .
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69 EF FNDP 1974/3509 0/5 gen-ReachabilityFireability-02 24699614 t fired, 829663 attempts, .
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69 EF FNDP 1984/3509 0/5 gen-ReachabilityFireability-02 24850547 t fired, 834764 attempts, .
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69 EF FNDP 1989/3509 0/5 gen-ReachabilityFireability-02 24926122 t fired, 837309 attempts, .
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69 EF FNDP 1999/3509 0/5 gen-ReachabilityFireability-02 25077108 t fired, 842363 attempts, .
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69 EF FNDP 2399/3509 0/5 gen-ReachabilityFireability-02 31111179 t fired, 1045320 attempts, .
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69 EF FNDP 2494/3509 0/5 gen-ReachabilityFireability-02 32544275 t fired, 1093519 attempts, .
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69 EF FNDP 2499/3509 0/5 gen-ReachabilityFireability-02 32619663 t fired, 1096026 attempts, .
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69 EF FNDP 2504/3509 0/5 gen-ReachabilityFireability-02 32694954 t fired, 1098570 attempts, .
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69 EF FNDP 2509/3509 0/5 gen-ReachabilityFireability-02 32770754 t fired, 1101121 attempts, .
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69 EF FNDP 2514/3509 0/5 gen-ReachabilityFireability-02 32846387 t fired, 1103663 attempts, .
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69 EF FNDP 2519/3509 0/5 gen-ReachabilityFireability-02 32921616 t fired, 1106205 attempts, .
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69 EF FNDP 2529/3509 0/5 gen-ReachabilityFireability-02 33071455 t fired, 1111210 attempts, .
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69 EF FNDP 2534/3509 0/5 gen-ReachabilityFireability-02 33146339 t fired, 1113743 attempts, .
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========== file over 1MB has been truncated ======
retrieve it from the run archives if needed
Sequence of Actions to be Executed by the VM
This is useful if one wants to reexecute the tool in the VM from the submitted image disk.
set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="MultiCrashLeafsetExtension-PT-S16C05"
export BK_EXAMINATION="ReachabilityFireability"
export BK_TOOL="lola"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"
# this is specific to your benchmark or test
export BIN_DIR="$HOME/BenchKit/bin"
# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi
# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-4028"
echo " Executing tool lola"
echo " Input is MultiCrashLeafsetExtension-PT-S16C05, examination is ReachabilityFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r289-tall-162124152700599"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"
tar xzf /home/mcc/BenchKit/INPUTS/MultiCrashLeafsetExtension-PT-S16C05.tgz
mv MultiCrashLeafsetExtension-PT-S16C05 execution
cd execution
if [ "ReachabilityFireability" = "ReachabilityDeadlock" ] || [ "ReachabilityFireability" = "UpperBounds" ] || [ "ReachabilityFireability" = "QuasiLiveness" ] || [ "ReachabilityFireability" = "StableMarking" ] || [ "ReachabilityFireability" = "Liveness" ] || [ "ReachabilityFireability" = "OneSafe" ] || [ "ReachabilityFireability" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh
echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "ReachabilityFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "ReachabilityFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "ReachabilityFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property ReachabilityFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "ReachabilityFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '
echo "FORMULA_NAME $x"
done
elif [ "ReachabilityFireability" = "ReachabilityDeadlock" ] || [ "ReachabilityFireability" = "QuasiLiveness" ] || [ "ReachabilityFireability" = "StableMarking" ] || [ "ReachabilityFireability" = "Liveness" ] || [ "ReachabilityFireability" = "OneSafe" ] ; then
echo "FORMULA_NAME ReachabilityFireability"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;