fond
Model Checking Contest 2021
11th edition, Paris, France, June 23, 2021
Execution of r289-tall-162124152600538
Last Updated
Jun 28, 2021

About the Execution of LoLA for LeafsetExtension-PT-S32C4

Execution Summary
Max Memory
Used (MB)
Time wait (ms) CPU Usage (ms) I/O Wait (ms) Computed Result Execution
Status
6173.392 1172723.00 1203906.00 3000.40 FT?T???TTT?FT?TT normal

Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/data/fkordon/mcc2021-input.r289-tall-162124152600538.qcow2', fmt=qcow2 size=4294967296 backing_file='/data/fkordon/mcc2021-input.qcow2' encryption=off cluster_size=65536 lazy_refcounts=off
Waiting for the VM to be ready (probing ssh)
...................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................
=====================================================================
Generated by BenchKit 2-4028
Executing tool lola
Input is LeafsetExtension-PT-S32C4, examination is CTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r289-tall-162124152600538
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 8.8M
-rw-r--r-- 1 mcc users 36K May 15 08:57 CTLCardinality.txt
-rw-r--r-- 1 mcc users 134K May 15 08:57 CTLCardinality.xml
-rw-r--r-- 1 mcc users 34K May 15 08:57 CTLFireability.txt
-rw-r--r-- 1 mcc users 111K May 15 08:57 CTLFireability.xml
-rw-r--r-- 1 mcc users 5.4K May 12 07:58 LTLCardinality.txt
-rw-r--r-- 1 mcc users 24K May 12 07:58 LTLCardinality.xml
-rw-r--r-- 1 mcc users 3.9K May 12 07:58 LTLFireability.txt
-rw-r--r-- 1 mcc users 19K May 12 07:58 LTLFireability.xml
-rw-r--r-- 1 mcc users 1 May 12 08:13 NewModel
-rw-r--r-- 1 mcc users 4.4K May 11 18:44 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 15K May 11 18:44 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 3.9K May 11 15:50 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 14K May 11 15:50 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.9K May 12 04:40 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.9K May 12 04:40 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 May 12 08:13 equiv_col
-rw-r--r-- 1 mcc users 6 May 12 08:13 instance
-rw-r--r-- 1 mcc users 6 May 12 08:13 iscolored
-rw-r--r-- 1 mcc users 8.4M May 12 08:13 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME LeafsetExtension-PT-S32C4-CTLFireability-00
FORMULA_NAME LeafsetExtension-PT-S32C4-CTLFireability-01
FORMULA_NAME LeafsetExtension-PT-S32C4-CTLFireability-02
FORMULA_NAME LeafsetExtension-PT-S32C4-CTLFireability-03
FORMULA_NAME LeafsetExtension-PT-S32C4-CTLFireability-04
FORMULA_NAME LeafsetExtension-PT-S32C4-CTLFireability-05
FORMULA_NAME LeafsetExtension-PT-S32C4-CTLFireability-06
FORMULA_NAME LeafsetExtension-PT-S32C4-CTLFireability-07
FORMULA_NAME LeafsetExtension-PT-S32C4-CTLFireability-08
FORMULA_NAME LeafsetExtension-PT-S32C4-CTLFireability-09
FORMULA_NAME LeafsetExtension-PT-S32C4-CTLFireability-10
FORMULA_NAME LeafsetExtension-PT-S32C4-CTLFireability-11
FORMULA_NAME LeafsetExtension-PT-S32C4-CTLFireability-12
FORMULA_NAME LeafsetExtension-PT-S32C4-CTLFireability-13
FORMULA_NAME LeafsetExtension-PT-S32C4-CTLFireability-14
FORMULA_NAME LeafsetExtension-PT-S32C4-CTLFireability-15

=== Now, execution of the tool begins

BK_START 1621290151210

starting LoLA
BK_INPUT LeafsetExtension-PT-S32C4
BK_EXAMINATION: CTLFireability
bin directory: /home/mcc/BenchKit/bin
current directory: /home/mcc/execution
CTLFireability

FORMULA LeafsetExtension-PT-S32C4-CTLFireability-12 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA LeafsetExtension-PT-S32C4-CTLFireability-03 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA LeafsetExtension-PT-S32C4-CTLFireability-15 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA LeafsetExtension-PT-S32C4-CTLFireability-11 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA LeafsetExtension-PT-S32C4-CTLFireability-14 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA LeafsetExtension-PT-S32C4-CTLFireability-09 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA LeafsetExtension-PT-S32C4-CTLFireability-08 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA LeafsetExtension-PT-S32C4-CTLFireability-07 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA LeafsetExtension-PT-S32C4-CTLFireability-01 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA LeafsetExtension-PT-S32C4-CTLFireability-00 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

BK_STOP 1621291323933

--------------------
content from stderr:

lola: MEM LIMIT 32
lola: MEM LIMIT 5
lola: NET
lola: input: PNML file (--pnmlnet)
lola: reading net from /home/mcc/execution/model.pnml
lola: reading pnml
lola: PNML file contains place/transition net
lola: finished parsing
lola: closed net file /home/mcc/execution/model.pnml
lola: Reading formula.
lola: Using XML format (--xmlformula)
lola: reading XML formula
lola: reading formula from /home/mcc/execution/CTLFireability.xml
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:457
lola: RELEASE
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:400
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:469
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:553
lola: rewrite Frontend/Parser/formula_rewrite.k:553
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:340
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:457
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:391
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:547
lola: rewrite Frontend/Parser/formula_rewrite.k:394
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:448
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 1.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Rule S: 0 transitions removed,0 places removed
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 1.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
LeafsetExtension-PT-S32C4-CTLFireability-00: CTL 0 0 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-01: CTL 0 0 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-02: CTL 0 0 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-03: CTL 0 0 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-04: CTL 0 0 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-05: CTL 0 0 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-06: DISJ 0 0 0 0 2 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-07: CTL 0 0 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-08: CTL 0 0 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-09: CTL 0 0 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-10: CTL 0 0 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-11: CTL 0 0 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-12: EG 0 0 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-13: CTL 0 0 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-14: CTL 0 0 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-15: EFEG 0 0 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 120 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 16
lola: LAUNCH task # 41 (type EXCL) for 40 LeafsetExtension-PT-S32C4-CTLFireability-12
lola: time limit : 204 sec
lola: memory limit: 32 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: FINISHED task # 41 (type EXCL) for LeafsetExtension-PT-S32C4-CTLFireability-12
lola: result : true
lola: markings : 21
lola: fired transitions : 20
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 10 (type EXCL) for 9 LeafsetExtension-PT-S32C4-CTLFireability-03
lola: time limit : 217 sec
lola: memory limit: 32 pages
lola: FINISHED task # 10 (type EXCL) for LeafsetExtension-PT-S32C4-CTLFireability-03
lola: result : true
lola: markings : 23
lola: fired transitions : 45
lola: time used : 0.000000
lola: memory pages used : 1
lola: rewrite Frontend/Parser/formula_rewrite.k:730
lola: LAUNCH task # 50 (type EXCL) for 49 LeafsetExtension-PT-S32C4-CTLFireability-15
lola: time limit : 231 sec
lola: memory limit: 32 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: FINISHED task # 50 (type EXCL) for LeafsetExtension-PT-S32C4-CTLFireability-15
lola: result : true
lola: markings : 20
lola: fired transitions : 19
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 38 (type EXCL) for 37 LeafsetExtension-PT-S32C4-CTLFireability-11
lola: time limit : 248 sec
lola: memory limit: 32 pages
lola: FINISHED task # 38 (type EXCL) for LeafsetExtension-PT-S32C4-CTLFireability-11
lola: result : false
lola: markings : 2570
lola: fired transitions : 8143
lola: time used : 1.000000
lola: memory pages used : 1
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
LeafsetExtension-PT-S32C4-CTLFireability-03: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-11: CTL false CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-12: EG true state space / EG
LeafsetExtension-PT-S32C4-CTLFireability-15: EFEG true state space /EFEG

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
LeafsetExtension-PT-S32C4-CTLFireability-00: CTL 0 0 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-01: CTL 0 0 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-02: CTL 0 0 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-04: CTL 0 0 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-05: CTL 0 0 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-06: DISJ 0 0 0 0 2 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-07: CTL 0 0 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-08: CTL 0 0 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-09: CTL 0 0 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-10: CTL 0 0 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-13: CTL 0 0 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-14: CTL 0 0 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 125 secs. Pages in use: 1
# running tasks: 0 of 4 Visible: 16
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:807
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
LeafsetExtension-PT-S32C4-CTLFireability-03: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-11: CTL false CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-12: EG true state space / EG
LeafsetExtension-PT-S32C4-CTLFireability-15: EFEG true state space /EFEG

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
LeafsetExtension-PT-S32C4-CTLFireability-00: CTL 0 0 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-01: CTL 0 0 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-02: CTL 0 0 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-04: CTL 0 0 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-05: CTL 0 0 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-06: DISJ 1 0 0 0 2 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-07: CTL 0 0 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-08: CTL 0 0 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-09: CTL 0 0 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-10: CTL 0 0 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-13: CTL 0 0 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-14: CTL 0 0 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 130 secs. Pages in use: 1
# running tasks: 0 of 4 Visible: 16
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: LAUNCH task # 21 (type EXCL) for 18 LeafsetExtension-PT-S32C4-CTLFireability-06
lola: time limit : 266 sec
lola: memory limit: 32 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: FINISHED task # 21 (type EXCL) for LeafsetExtension-PT-S32C4-CTLFireability-06
lola: result : false
lola: markings : 73056
lola: fired transitions : 77080
lola: time used : 2.000000
lola: memory pages used : 3
lola: LAUNCH task # 47 (type EXCL) for 46 LeafsetExtension-PT-S32C4-CTLFireability-14
lola: time limit : 289 sec
lola: memory limit: 32 pages
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
LeafsetExtension-PT-S32C4-CTLFireability-03: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-11: CTL false CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-12: EG true state space / EG
LeafsetExtension-PT-S32C4-CTLFireability-15: EFEG true state space /EFEG

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
LeafsetExtension-PT-S32C4-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-06: DISJ 0 1 0 0 3 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-13: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-14: CTL 0 0 1 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
47 CTL EXCL 3/289 2/32 LeafsetExtension-PT-S32C4-CTLFireability-14 29307 m, 5861 m/sec, 91443 t fired, .

Time elapsed: 135 secs. Pages in use: 3
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
LeafsetExtension-PT-S32C4-CTLFireability-03: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-11: CTL false CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-12: EG true state space / EG
LeafsetExtension-PT-S32C4-CTLFireability-15: EFEG true state space /EFEG

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
LeafsetExtension-PT-S32C4-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-06: DISJ 0 1 0 0 3 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-13: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-14: CTL 0 0 1 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
47 CTL EXCL 8/289 3/32 LeafsetExtension-PT-S32C4-CTLFireability-14 81613 m, 10461 m/sec, 270606 t fired, .

Time elapsed: 140 secs. Pages in use: 3
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
LeafsetExtension-PT-S32C4-CTLFireability-03: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-11: CTL false CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-12: EG true state space / EG
LeafsetExtension-PT-S32C4-CTLFireability-15: EFEG true state space /EFEG

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
LeafsetExtension-PT-S32C4-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-06: DISJ 0 1 0 0 3 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-13: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-14: CTL 0 0 1 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
47 CTL EXCL 13/289 5/32 LeafsetExtension-PT-S32C4-CTLFireability-14 138623 m, 11402 m/sec, 450603 t fired, .

Time elapsed: 145 secs. Pages in use: 5
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
LeafsetExtension-PT-S32C4-CTLFireability-03: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-11: CTL false CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-12: EG true state space / EG
LeafsetExtension-PT-S32C4-CTLFireability-15: EFEG true state space /EFEG

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
LeafsetExtension-PT-S32C4-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-06: DISJ 0 1 0 0 3 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-13: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-14: CTL 0 0 1 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
47 CTL EXCL 18/289 7/32 LeafsetExtension-PT-S32C4-CTLFireability-14 192089 m, 10693 m/sec, 630019 t fired, .

Time elapsed: 150 secs. Pages in use: 7
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
LeafsetExtension-PT-S32C4-CTLFireability-03: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-11: CTL false CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-12: EG true state space / EG
LeafsetExtension-PT-S32C4-CTLFireability-15: EFEG true state space /EFEG

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
LeafsetExtension-PT-S32C4-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-06: DISJ 0 1 0 0 3 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-13: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-14: CTL 0 0 1 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
47 CTL EXCL 23/289 9/32 LeafsetExtension-PT-S32C4-CTLFireability-14 244872 m, 10556 m/sec, 807439 t fired, .

Time elapsed: 155 secs. Pages in use: 9
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
LeafsetExtension-PT-S32C4-CTLFireability-03: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-11: CTL false CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-12: EG true state space / EG
LeafsetExtension-PT-S32C4-CTLFireability-15: EFEG true state space /EFEG

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
LeafsetExtension-PT-S32C4-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-06: DISJ 0 1 0 0 3 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-13: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-14: CTL 0 0 1 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
47 CTL EXCL 28/289 11/32 LeafsetExtension-PT-S32C4-CTLFireability-14 301248 m, 11275 m/sec, 983282 t fired, .

Time elapsed: 160 secs. Pages in use: 11
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
LeafsetExtension-PT-S32C4-CTLFireability-03: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-11: CTL false CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-12: EG true state space / EG
LeafsetExtension-PT-S32C4-CTLFireability-15: EFEG true state space /EFEG

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
LeafsetExtension-PT-S32C4-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-06: DISJ 0 1 0 0 3 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-13: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-14: CTL 0 0 1 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
47 CTL EXCL 33/289 13/32 LeafsetExtension-PT-S32C4-CTLFireability-14 353222 m, 10394 m/sec, 1157332 t fired, .

Time elapsed: 165 secs. Pages in use: 13
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
LeafsetExtension-PT-S32C4-CTLFireability-03: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-11: CTL false CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-12: EG true state space / EG
LeafsetExtension-PT-S32C4-CTLFireability-15: EFEG true state space /EFEG

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
LeafsetExtension-PT-S32C4-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-06: DISJ 0 1 0 0 3 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-13: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-14: CTL 0 0 1 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
47 CTL EXCL 38/289 14/32 LeafsetExtension-PT-S32C4-CTLFireability-14 405983 m, 10552 m/sec, 1328790 t fired, .

Time elapsed: 170 secs. Pages in use: 14
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
LeafsetExtension-PT-S32C4-CTLFireability-03: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-11: CTL false CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-12: EG true state space / EG
LeafsetExtension-PT-S32C4-CTLFireability-15: EFEG true state space /EFEG

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
LeafsetExtension-PT-S32C4-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-06: DISJ 0 1 0 0 3 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-13: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-14: CTL 0 0 1 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
47 CTL EXCL 43/289 16/32 LeafsetExtension-PT-S32C4-CTLFireability-14 460511 m, 10905 m/sec, 1497923 t fired, .

Time elapsed: 175 secs. Pages in use: 16
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
LeafsetExtension-PT-S32C4-CTLFireability-03: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-11: CTL false CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-12: EG true state space / EG
LeafsetExtension-PT-S32C4-CTLFireability-15: EFEG true state space /EFEG

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
LeafsetExtension-PT-S32C4-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-06: DISJ 0 1 0 0 3 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-13: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-14: CTL 0 0 1 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
47 CTL EXCL 48/289 18/32 LeafsetExtension-PT-S32C4-CTLFireability-14 511435 m, 10184 m/sec, 1665614 t fired, .

Time elapsed: 180 secs. Pages in use: 18
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
LeafsetExtension-PT-S32C4-CTLFireability-03: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-11: CTL false CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-12: EG true state space / EG
LeafsetExtension-PT-S32C4-CTLFireability-15: EFEG true state space /EFEG

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
LeafsetExtension-PT-S32C4-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-06: DISJ 0 1 0 0 3 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-13: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-14: CTL 0 0 1 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
47 CTL EXCL 53/289 19/32 LeafsetExtension-PT-S32C4-CTLFireability-14 561674 m, 10047 m/sec, 1832303 t fired, .

Time elapsed: 185 secs. Pages in use: 19
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
LeafsetExtension-PT-S32C4-CTLFireability-03: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-11: CTL false CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-12: EG true state space / EG
LeafsetExtension-PT-S32C4-CTLFireability-15: EFEG true state space /EFEG

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
LeafsetExtension-PT-S32C4-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-06: DISJ 0 1 0 0 3 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-13: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-14: CTL 0 0 1 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
47 CTL EXCL 58/289 21/32 LeafsetExtension-PT-S32C4-CTLFireability-14 612261 m, 10117 m/sec, 1995223 t fired, .

Time elapsed: 190 secs. Pages in use: 21
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
LeafsetExtension-PT-S32C4-CTLFireability-03: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-11: CTL false CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-12: EG true state space / EG
LeafsetExtension-PT-S32C4-CTLFireability-15: EFEG true state space /EFEG

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
LeafsetExtension-PT-S32C4-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-06: DISJ 0 1 0 0 3 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-13: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-14: CTL 0 0 1 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
47 CTL EXCL 63/289 23/32 LeafsetExtension-PT-S32C4-CTLFireability-14 659206 m, 9389 m/sec, 2158980 t fired, .

Time elapsed: 195 secs. Pages in use: 23
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
LeafsetExtension-PT-S32C4-CTLFireability-03: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-11: CTL false CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-12: EG true state space / EG
LeafsetExtension-PT-S32C4-CTLFireability-15: EFEG true state space /EFEG

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
LeafsetExtension-PT-S32C4-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-06: DISJ 0 1 0 0 3 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-13: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-14: CTL 0 0 1 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
47 CTL EXCL 68/289 25/32 LeafsetExtension-PT-S32C4-CTLFireability-14 713440 m, 10846 m/sec, 2334795 t fired, .

Time elapsed: 200 secs. Pages in use: 25
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
LeafsetExtension-PT-S32C4-CTLFireability-03: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-11: CTL false CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-12: EG true state space / EG
LeafsetExtension-PT-S32C4-CTLFireability-15: EFEG true state space /EFEG

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
LeafsetExtension-PT-S32C4-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-06: DISJ 0 1 0 0 3 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-13: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-14: CTL 0 0 1 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
47 CTL EXCL 73/289 26/32 LeafsetExtension-PT-S32C4-CTLFireability-14 767371 m, 10786 m/sec, 2512531 t fired, .

Time elapsed: 205 secs. Pages in use: 26
# running tasks: 1 of 4 Visible: 16
lola: FINISHED task # 47 (type EXCL) for LeafsetExtension-PT-S32C4-CTLFireability-14
lola: result : true
lola: markings : 771793
lola: fired transitions : 2526084
lola: time used : 73.000000
lola: memory pages used : 27
lola: LAUNCH task # 44 (type EXCL) for 43 LeafsetExtension-PT-S32C4-CTLFireability-13
lola: time limit : 308 sec
lola: memory limit: 32 pages
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
LeafsetExtension-PT-S32C4-CTLFireability-03: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-11: CTL false CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-12: EG true state space / EG
LeafsetExtension-PT-S32C4-CTLFireability-14: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-15: EFEG true state space /EFEG

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
LeafsetExtension-PT-S32C4-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-06: DISJ 0 1 0 0 3 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-13: CTL 0 0 1 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
44 CTL EXCL 5/308 2/32 LeafsetExtension-PT-S32C4-CTLFireability-13 44543 m, 8908 m/sec, 169420 t fired, .

Time elapsed: 210 secs. Pages in use: 27
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
LeafsetExtension-PT-S32C4-CTLFireability-03: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-11: CTL false CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-12: EG true state space / EG
LeafsetExtension-PT-S32C4-CTLFireability-14: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-15: EFEG true state space /EFEG

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
LeafsetExtension-PT-S32C4-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-06: DISJ 0 1 0 0 3 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-13: CTL 0 0 1 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
44 CTL EXCL 10/308 3/32 LeafsetExtension-PT-S32C4-CTLFireability-13 79333 m, 6958 m/sec, 350897 t fired, .

Time elapsed: 215 secs. Pages in use: 27
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
LeafsetExtension-PT-S32C4-CTLFireability-03: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-11: CTL false CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-12: EG true state space / EG
LeafsetExtension-PT-S32C4-CTLFireability-14: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-15: EFEG true state space /EFEG

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
LeafsetExtension-PT-S32C4-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-06: DISJ 0 1 0 0 3 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-13: CTL 0 0 1 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
44 CTL EXCL 15/308 5/32 LeafsetExtension-PT-S32C4-CTLFireability-13 123365 m, 8806 m/sec, 534122 t fired, .

Time elapsed: 220 secs. Pages in use: 27
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
LeafsetExtension-PT-S32C4-CTLFireability-03: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-11: CTL false CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-12: EG true state space / EG
LeafsetExtension-PT-S32C4-CTLFireability-14: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-15: EFEG true state space /EFEG

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
LeafsetExtension-PT-S32C4-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-06: DISJ 0 1 0 0 3 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-13: CTL 0 0 1 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
44 CTL EXCL 20/308 6/32 LeafsetExtension-PT-S32C4-CTLFireability-13 163422 m, 8011 m/sec, 716038 t fired, .

Time elapsed: 225 secs. Pages in use: 27
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
LeafsetExtension-PT-S32C4-CTLFireability-03: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-11: CTL false CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-12: EG true state space / EG
LeafsetExtension-PT-S32C4-CTLFireability-14: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-15: EFEG true state space /EFEG

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
LeafsetExtension-PT-S32C4-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-06: DISJ 0 1 0 0 3 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-13: CTL 0 0 1 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
44 CTL EXCL 25/308 8/32 LeafsetExtension-PT-S32C4-CTLFireability-13 207612 m, 8838 m/sec, 898115 t fired, .

Time elapsed: 230 secs. Pages in use: 27
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
LeafsetExtension-PT-S32C4-CTLFireability-03: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-11: CTL false CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-12: EG true state space / EG
LeafsetExtension-PT-S32C4-CTLFireability-14: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-15: EFEG true state space /EFEG

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
LeafsetExtension-PT-S32C4-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-06: DISJ 0 1 0 0 3 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-13: CTL 0 0 1 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
44 CTL EXCL 30/308 9/32 LeafsetExtension-PT-S32C4-CTLFireability-13 247998 m, 8077 m/sec, 1078107 t fired, .

Time elapsed: 235 secs. Pages in use: 27
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
LeafsetExtension-PT-S32C4-CTLFireability-03: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-11: CTL false CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-12: EG true state space / EG
LeafsetExtension-PT-S32C4-CTLFireability-14: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-15: EFEG true state space /EFEG

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
LeafsetExtension-PT-S32C4-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-06: DISJ 0 1 0 0 3 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-13: CTL 0 0 1 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
44 CTL EXCL 35/308 11/32 LeafsetExtension-PT-S32C4-CTLFireability-13 290632 m, 8526 m/sec, 1257080 t fired, .

Time elapsed: 240 secs. Pages in use: 27
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
LeafsetExtension-PT-S32C4-CTLFireability-03: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-11: CTL false CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-12: EG true state space / EG
LeafsetExtension-PT-S32C4-CTLFireability-14: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-15: EFEG true state space /EFEG

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
LeafsetExtension-PT-S32C4-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-06: DISJ 0 1 0 0 3 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-13: CTL 0 0 1 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
44 CTL EXCL 40/308 12/32 LeafsetExtension-PT-S32C4-CTLFireability-13 330409 m, 7955 m/sec, 1434662 t fired, .

Time elapsed: 245 secs. Pages in use: 27
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
LeafsetExtension-PT-S32C4-CTLFireability-03: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-11: CTL false CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-12: EG true state space / EG
LeafsetExtension-PT-S32C4-CTLFireability-14: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-15: EFEG true state space /EFEG

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
LeafsetExtension-PT-S32C4-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-06: DISJ 0 1 0 0 3 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-13: CTL 0 0 1 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
44 CTL EXCL 45/308 13/32 LeafsetExtension-PT-S32C4-CTLFireability-13 373021 m, 8522 m/sec, 1609799 t fired, .

Time elapsed: 250 secs. Pages in use: 27
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
LeafsetExtension-PT-S32C4-CTLFireability-03: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-11: CTL false CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-12: EG true state space / EG
LeafsetExtension-PT-S32C4-CTLFireability-14: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-15: EFEG true state space /EFEG

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
LeafsetExtension-PT-S32C4-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-06: DISJ 0 1 0 0 3 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-13: CTL 0 0 1 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
44 CTL EXCL 50/308 14/32 LeafsetExtension-PT-S32C4-CTLFireability-13 412748 m, 7945 m/sec, 1783834 t fired, .

Time elapsed: 255 secs. Pages in use: 27
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
LeafsetExtension-PT-S32C4-CTLFireability-03: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-11: CTL false CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-12: EG true state space / EG
LeafsetExtension-PT-S32C4-CTLFireability-14: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-15: EFEG true state space /EFEG

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
LeafsetExtension-PT-S32C4-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-06: DISJ 0 1 0 0 3 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-13: CTL 0 0 1 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
44 CTL EXCL 55/308 16/32 LeafsetExtension-PT-S32C4-CTLFireability-13 454490 m, 8348 m/sec, 1955844 t fired, .

Time elapsed: 260 secs. Pages in use: 27
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
LeafsetExtension-PT-S32C4-CTLFireability-03: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-11: CTL false CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-12: EG true state space / EG
LeafsetExtension-PT-S32C4-CTLFireability-14: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-15: EFEG true state space /EFEG

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
LeafsetExtension-PT-S32C4-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-06: DISJ 0 1 0 0 3 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-13: CTL 0 0 1 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
44 CTL EXCL 60/308 17/32 LeafsetExtension-PT-S32C4-CTLFireability-13 493746 m, 7851 m/sec, 2127396 t fired, .

Time elapsed: 265 secs. Pages in use: 27
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
LeafsetExtension-PT-S32C4-CTLFireability-03: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-11: CTL false CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-12: EG true state space / EG
LeafsetExtension-PT-S32C4-CTLFireability-14: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-15: EFEG true state space /EFEG

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
LeafsetExtension-PT-S32C4-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-06: DISJ 0 1 0 0 3 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-13: CTL 0 0 1 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
44 CTL EXCL 65/308 19/32 LeafsetExtension-PT-S32C4-CTLFireability-13 534840 m, 8218 m/sec, 2296389 t fired, .

Time elapsed: 270 secs. Pages in use: 27
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
LeafsetExtension-PT-S32C4-CTLFireability-03: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-11: CTL false CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-12: EG true state space / EG
LeafsetExtension-PT-S32C4-CTLFireability-14: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-15: EFEG true state space /EFEG

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
LeafsetExtension-PT-S32C4-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-06: DISJ 0 1 0 0 3 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-13: CTL 0 0 1 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
44 CTL EXCL 70/308 20/32 LeafsetExtension-PT-S32C4-CTLFireability-13 571359 m, 7303 m/sec, 2465199 t fired, .

Time elapsed: 275 secs. Pages in use: 27
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
LeafsetExtension-PT-S32C4-CTLFireability-03: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-11: CTL false CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-12: EG true state space / EG
LeafsetExtension-PT-S32C4-CTLFireability-14: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-15: EFEG true state space /EFEG

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
LeafsetExtension-PT-S32C4-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-06: DISJ 0 1 0 0 3 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-13: CTL 0 0 1 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
44 CTL EXCL 75/308 21/32 LeafsetExtension-PT-S32C4-CTLFireability-13 611719 m, 8072 m/sec, 2630292 t fired, .

Time elapsed: 280 secs. Pages in use: 27
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
LeafsetExtension-PT-S32C4-CTLFireability-03: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-11: CTL false CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-12: EG true state space / EG
LeafsetExtension-PT-S32C4-CTLFireability-14: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-15: EFEG true state space /EFEG

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
LeafsetExtension-PT-S32C4-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-06: DISJ 0 1 0 0 3 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-13: CTL 0 0 1 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
44 CTL EXCL 80/308 22/32 LeafsetExtension-PT-S32C4-CTLFireability-13 648435 m, 7343 m/sec, 2795947 t fired, .

Time elapsed: 285 secs. Pages in use: 27
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
LeafsetExtension-PT-S32C4-CTLFireability-03: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-11: CTL false CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-12: EG true state space / EG
LeafsetExtension-PT-S32C4-CTLFireability-14: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-15: EFEG true state space /EFEG

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
LeafsetExtension-PT-S32C4-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-06: DISJ 0 1 0 0 3 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-13: CTL 0 0 1 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
44 CTL EXCL 85/308 24/32 LeafsetExtension-PT-S32C4-CTLFireability-13 691006 m, 8514 m/sec, 2973686 t fired, .

Time elapsed: 290 secs. Pages in use: 27
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
LeafsetExtension-PT-S32C4-CTLFireability-03: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-11: CTL false CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-12: EG true state space / EG
LeafsetExtension-PT-S32C4-CTLFireability-14: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-15: EFEG true state space /EFEG

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
LeafsetExtension-PT-S32C4-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-06: DISJ 0 1 0 0 3 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-13: CTL 0 0 1 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
44 CTL EXCL 90/308 25/32 LeafsetExtension-PT-S32C4-CTLFireability-13 730894 m, 7977 m/sec, 3152046 t fired, .

Time elapsed: 295 secs. Pages in use: 27
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
LeafsetExtension-PT-S32C4-CTLFireability-03: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-11: CTL false CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-12: EG true state space / EG
LeafsetExtension-PT-S32C4-CTLFireability-14: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-15: EFEG true state space /EFEG

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
LeafsetExtension-PT-S32C4-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-06: DISJ 0 1 0 0 3 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-13: CTL 0 0 1 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
44 CTL EXCL 95/308 27/32 LeafsetExtension-PT-S32C4-CTLFireability-13 774471 m, 8715 m/sec, 3335219 t fired, .

Time elapsed: 300 secs. Pages in use: 27
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
LeafsetExtension-PT-S32C4-CTLFireability-03: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-11: CTL false CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-12: EG true state space / EG
LeafsetExtension-PT-S32C4-CTLFireability-14: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-15: EFEG true state space /EFEG

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
LeafsetExtension-PT-S32C4-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-06: DISJ 0 1 0 0 3 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-13: CTL 0 0 1 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
44 CTL EXCL 100/308 28/32 LeafsetExtension-PT-S32C4-CTLFireability-13 815441 m, 8194 m/sec, 3516813 t fired, .

Time elapsed: 305 secs. Pages in use: 28
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
LeafsetExtension-PT-S32C4-CTLFireability-03: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-11: CTL false CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-12: EG true state space / EG
LeafsetExtension-PT-S32C4-CTLFireability-14: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-15: EFEG true state space /EFEG

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
LeafsetExtension-PT-S32C4-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-06: DISJ 0 1 0 0 3 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-13: CTL 0 0 1 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
44 CTL EXCL 105/308 30/32 LeafsetExtension-PT-S32C4-CTLFireability-13 856705 m, 8252 m/sec, 3688403 t fired, .

Time elapsed: 310 secs. Pages in use: 30
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
LeafsetExtension-PT-S32C4-CTLFireability-03: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-11: CTL false CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-12: EG true state space / EG
LeafsetExtension-PT-S32C4-CTLFireability-14: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-15: EFEG true state space /EFEG

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
LeafsetExtension-PT-S32C4-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-06: DISJ 0 1 0 0 3 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-13: CTL 0 0 1 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
44 CTL EXCL 110/308 31/32 LeafsetExtension-PT-S32C4-CTLFireability-13 895008 m, 7660 m/sec, 3857514 t fired, .

Time elapsed: 315 secs. Pages in use: 31
# running tasks: 1 of 4 Visible: 16
lola: CANCELED task # 44 (type EXCL) for LeafsetExtension-PT-S32C4-CTLFireability-13 (memory limit exceeded)
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
LeafsetExtension-PT-S32C4-CTLFireability-03: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-11: CTL false CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-12: EG true state space / EG
LeafsetExtension-PT-S32C4-CTLFireability-14: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-15: EFEG true state space /EFEG

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
LeafsetExtension-PT-S32C4-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-06: DISJ 0 1 0 0 3 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 320 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
lola: LAUNCH task # 35 (type EXCL) for 34 LeafsetExtension-PT-S32C4-CTLFireability-10
lola: time limit : 328 sec
lola: memory limit: 32 pages
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
LeafsetExtension-PT-S32C4-CTLFireability-03: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-11: CTL false CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-12: EG true state space / EG
LeafsetExtension-PT-S32C4-CTLFireability-14: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-15: EFEG true state space /EFEG

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
LeafsetExtension-PT-S32C4-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-06: DISJ 0 1 0 0 3 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-10: CTL 0 0 1 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
35 CTL EXCL 5/328 3/32 LeafsetExtension-PT-S32C4-CTLFireability-10 60343 m, 12068 m/sec, 162756 t fired, .

Time elapsed: 325 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
LeafsetExtension-PT-S32C4-CTLFireability-03: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-11: CTL false CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-12: EG true state space / EG
LeafsetExtension-PT-S32C4-CTLFireability-14: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-15: EFEG true state space /EFEG

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
LeafsetExtension-PT-S32C4-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-06: DISJ 0 1 0 0 3 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-10: CTL 0 0 1 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
35 CTL EXCL 10/328 5/32 LeafsetExtension-PT-S32C4-CTLFireability-10 118495 m, 11630 m/sec, 322657 t fired, .

Time elapsed: 330 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
LeafsetExtension-PT-S32C4-CTLFireability-03: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-11: CTL false CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-12: EG true state space / EG
LeafsetExtension-PT-S32C4-CTLFireability-14: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-15: EFEG true state space /EFEG

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
LeafsetExtension-PT-S32C4-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-06: DISJ 0 1 0 0 3 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-10: CTL 0 0 1 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
35 CTL EXCL 15/328 7/32 LeafsetExtension-PT-S32C4-CTLFireability-10 175895 m, 11480 m/sec, 482424 t fired, .

Time elapsed: 335 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
LeafsetExtension-PT-S32C4-CTLFireability-03: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-11: CTL false CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-12: EG true state space / EG
LeafsetExtension-PT-S32C4-CTLFireability-14: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-15: EFEG true state space /EFEG

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
LeafsetExtension-PT-S32C4-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-06: DISJ 0 1 0 0 3 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-10: CTL 0 0 1 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
35 CTL EXCL 20/328 9/32 LeafsetExtension-PT-S32C4-CTLFireability-10 235573 m, 11935 m/sec, 641830 t fired, .

Time elapsed: 340 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
LeafsetExtension-PT-S32C4-CTLFireability-03: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-11: CTL false CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-12: EG true state space / EG
LeafsetExtension-PT-S32C4-CTLFireability-14: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-15: EFEG true state space /EFEG

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
LeafsetExtension-PT-S32C4-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-06: DISJ 0 1 0 0 3 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-10: CTL 0 0 1 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
35 CTL EXCL 25/328 11/32 LeafsetExtension-PT-S32C4-CTLFireability-10 292208 m, 11327 m/sec, 801858 t fired, .

Time elapsed: 345 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
LeafsetExtension-PT-S32C4-CTLFireability-03: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-11: CTL false CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-12: EG true state space / EG
LeafsetExtension-PT-S32C4-CTLFireability-14: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-15: EFEG true state space /EFEG

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
LeafsetExtension-PT-S32C4-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-06: DISJ 0 1 0 0 3 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-10: CTL 0 0 1 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
35 CTL EXCL 30/328 13/32 LeafsetExtension-PT-S32C4-CTLFireability-10 347694 m, 11097 m/sec, 961292 t fired, .

Time elapsed: 350 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
LeafsetExtension-PT-S32C4-CTLFireability-03: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-11: CTL false CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-12: EG true state space / EG
LeafsetExtension-PT-S32C4-CTLFireability-14: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-15: EFEG true state space /EFEG

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
LeafsetExtension-PT-S32C4-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-06: DISJ 0 1 0 0 3 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-10: CTL 0 0 1 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
35 CTL EXCL 35/328 15/32 LeafsetExtension-PT-S32C4-CTLFireability-10 408885 m, 12238 m/sec, 1119796 t fired, .

Time elapsed: 355 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
LeafsetExtension-PT-S32C4-CTLFireability-03: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-11: CTL false CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-12: EG true state space / EG
LeafsetExtension-PT-S32C4-CTLFireability-14: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-15: EFEG true state space /EFEG

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
LeafsetExtension-PT-S32C4-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-06: DISJ 0 1 0 0 3 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-10: CTL 0 0 1 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
35 CTL EXCL 40/328 17/32 LeafsetExtension-PT-S32C4-CTLFireability-10 466358 m, 11494 m/sec, 1279537 t fired, .

Time elapsed: 360 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
LeafsetExtension-PT-S32C4-CTLFireability-03: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-11: CTL false CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-12: EG true state space / EG
LeafsetExtension-PT-S32C4-CTLFireability-14: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-15: EFEG true state space /EFEG

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
LeafsetExtension-PT-S32C4-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-06: DISJ 0 1 0 0 3 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-10: CTL 0 0 1 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
35 CTL EXCL 45/328 19/32 LeafsetExtension-PT-S32C4-CTLFireability-10 522616 m, 11251 m/sec, 1442880 t fired, .

Time elapsed: 365 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
LeafsetExtension-PT-S32C4-CTLFireability-03: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-11: CTL false CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-12: EG true state space / EG
LeafsetExtension-PT-S32C4-CTLFireability-14: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-15: EFEG true state space /EFEG

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
LeafsetExtension-PT-S32C4-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-06: DISJ 0 1 0 0 3 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-10: CTL 0 0 1 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
35 CTL EXCL 50/328 21/32 LeafsetExtension-PT-S32C4-CTLFireability-10 580581 m, 11593 m/sec, 1604277 t fired, .

Time elapsed: 370 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
LeafsetExtension-PT-S32C4-CTLFireability-03: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-11: CTL false CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-12: EG true state space / EG
LeafsetExtension-PT-S32C4-CTLFireability-14: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-15: EFEG true state space /EFEG

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
LeafsetExtension-PT-S32C4-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-06: DISJ 0 1 0 0 3 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-10: CTL 0 0 1 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
35 CTL EXCL 55/328 23/32 LeafsetExtension-PT-S32C4-CTLFireability-10 636533 m, 11190 m/sec, 1765175 t fired, .

Time elapsed: 375 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
LeafsetExtension-PT-S32C4-CTLFireability-03: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-11: CTL false CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-12: EG true state space / EG
LeafsetExtension-PT-S32C4-CTLFireability-14: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-15: EFEG true state space /EFEG

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
LeafsetExtension-PT-S32C4-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-06: DISJ 0 1 0 0 3 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-10: CTL 0 0 1 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
35 CTL EXCL 60/328 24/32 LeafsetExtension-PT-S32C4-CTLFireability-10 690254 m, 10744 m/sec, 1927241 t fired, .

Time elapsed: 380 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
LeafsetExtension-PT-S32C4-CTLFireability-03: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-11: CTL false CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-12: EG true state space / EG
LeafsetExtension-PT-S32C4-CTLFireability-14: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-15: EFEG true state space /EFEG

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
LeafsetExtension-PT-S32C4-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-06: DISJ 0 1 0 0 3 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-10: CTL 0 0 1 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
35 CTL EXCL 65/328 26/32 LeafsetExtension-PT-S32C4-CTLFireability-10 743021 m, 10553 m/sec, 2088866 t fired, .

Time elapsed: 385 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
LeafsetExtension-PT-S32C4-CTLFireability-03: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-11: CTL false CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-12: EG true state space / EG
LeafsetExtension-PT-S32C4-CTLFireability-14: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-15: EFEG true state space /EFEG

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
LeafsetExtension-PT-S32C4-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-06: DISJ 0 1 0 0 3 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-10: CTL 0 0 1 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
35 CTL EXCL 70/328 28/32 LeafsetExtension-PT-S32C4-CTLFireability-10 800712 m, 11538 m/sec, 2248364 t fired, .

Time elapsed: 390 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
LeafsetExtension-PT-S32C4-CTLFireability-03: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-11: CTL false CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-12: EG true state space / EG
LeafsetExtension-PT-S32C4-CTLFireability-14: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-15: EFEG true state space /EFEG

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
LeafsetExtension-PT-S32C4-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-06: DISJ 0 1 0 0 3 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-10: CTL 0 0 1 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
35 CTL EXCL 75/328 30/32 LeafsetExtension-PT-S32C4-CTLFireability-10 857712 m, 11400 m/sec, 2405227 t fired, .

Time elapsed: 395 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
LeafsetExtension-PT-S32C4-CTLFireability-03: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-11: CTL false CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-12: EG true state space / EG
LeafsetExtension-PT-S32C4-CTLFireability-14: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-15: EFEG true state space /EFEG

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
LeafsetExtension-PT-S32C4-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-06: DISJ 0 1 0 0 3 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-10: CTL 0 0 1 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
35 CTL EXCL 80/328 32/32 LeafsetExtension-PT-S32C4-CTLFireability-10 913448 m, 11147 m/sec, 2557441 t fired, .

Time elapsed: 400 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
lola: CANCELED task # 35 (type EXCL) for LeafsetExtension-PT-S32C4-CTLFireability-10 (memory limit exceeded)
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
LeafsetExtension-PT-S32C4-CTLFireability-03: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-11: CTL false CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-12: EG true state space / EG
LeafsetExtension-PT-S32C4-CTLFireability-14: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-15: EFEG true state space /EFEG

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
LeafsetExtension-PT-S32C4-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-06: DISJ 0 1 0 0 3 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
LeafsetExtension-PT-S32C4-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 405 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
lola: LAUNCH task # 32 (type EXCL) for 31 LeafsetExtension-PT-S32C4-CTLFireability-09
lola: time limit : 355 sec
lola: memory limit: 32 pages
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
LeafsetExtension-PT-S32C4-CTLFireability-03: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-11: CTL false CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-12: EG true state space / EG
LeafsetExtension-PT-S32C4-CTLFireability-14: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-15: EFEG true state space /EFEG

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
LeafsetExtension-PT-S32C4-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-06: DISJ 0 1 0 0 3 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-09: CTL 0 0 1 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
LeafsetExtension-PT-S32C4-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
32 CTL EXCL 5/355 3/32 LeafsetExtension-PT-S32C4-CTLFireability-09 56774 m, 11354 m/sec, 180373 t fired, .

Time elapsed: 410 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
LeafsetExtension-PT-S32C4-CTLFireability-03: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-11: CTL false CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-12: EG true state space / EG
LeafsetExtension-PT-S32C4-CTLFireability-14: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-15: EFEG true state space /EFEG

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
LeafsetExtension-PT-S32C4-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-06: DISJ 0 1 0 0 3 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-09: CTL 0 0 1 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
LeafsetExtension-PT-S32C4-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
32 CTL EXCL 10/355 4/32 LeafsetExtension-PT-S32C4-CTLFireability-09 110496 m, 10744 m/sec, 360710 t fired, .

Time elapsed: 415 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
LeafsetExtension-PT-S32C4-CTLFireability-03: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-11: CTL false CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-12: EG true state space / EG
LeafsetExtension-PT-S32C4-CTLFireability-14: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-15: EFEG true state space /EFEG

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
LeafsetExtension-PT-S32C4-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-06: DISJ 0 1 0 0 3 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-09: CTL 0 0 1 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
LeafsetExtension-PT-S32C4-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
32 CTL EXCL 15/355 6/32 LeafsetExtension-PT-S32C4-CTLFireability-09 162985 m, 10497 m/sec, 539712 t fired, .

Time elapsed: 420 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
LeafsetExtension-PT-S32C4-CTLFireability-03: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-11: CTL false CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-12: EG true state space / EG
LeafsetExtension-PT-S32C4-CTLFireability-14: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-15: EFEG true state space /EFEG

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
LeafsetExtension-PT-S32C4-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-06: DISJ 0 1 0 0 3 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-09: CTL 0 0 1 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
LeafsetExtension-PT-S32C4-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
32 CTL EXCL 20/355 8/32 LeafsetExtension-PT-S32C4-CTLFireability-09 220037 m, 11410 m/sec, 718479 t fired, .

Time elapsed: 425 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
LeafsetExtension-PT-S32C4-CTLFireability-03: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-11: CTL false CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-12: EG true state space / EG
LeafsetExtension-PT-S32C4-CTLFireability-14: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-15: EFEG true state space /EFEG

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
LeafsetExtension-PT-S32C4-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-06: DISJ 0 1 0 0 3 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-09: CTL 0 0 1 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
LeafsetExtension-PT-S32C4-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
32 CTL EXCL 25/355 10/32 LeafsetExtension-PT-S32C4-CTLFireability-09 273415 m, 10675 m/sec, 896096 t fired, .

Time elapsed: 430 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
LeafsetExtension-PT-S32C4-CTLFireability-03: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-11: CTL false CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-12: EG true state space / EG
LeafsetExtension-PT-S32C4-CTLFireability-14: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-15: EFEG true state space /EFEG

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
LeafsetExtension-PT-S32C4-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-06: DISJ 0 1 0 0 3 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-09: CTL 0 0 1 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
LeafsetExtension-PT-S32C4-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
32 CTL EXCL 30/355 12/32 LeafsetExtension-PT-S32C4-CTLFireability-09 325527 m, 10422 m/sec, 1071335 t fired, .

Time elapsed: 435 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
LeafsetExtension-PT-S32C4-CTLFireability-03: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-11: CTL false CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-12: EG true state space / EG
LeafsetExtension-PT-S32C4-CTLFireability-14: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-15: EFEG true state space /EFEG

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
LeafsetExtension-PT-S32C4-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-06: DISJ 0 1 0 0 3 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-09: CTL 0 0 1 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
LeafsetExtension-PT-S32C4-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
32 CTL EXCL 35/355 14/32 LeafsetExtension-PT-S32C4-CTLFireability-09 380975 m, 11089 m/sec, 1243511 t fired, .

Time elapsed: 440 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
LeafsetExtension-PT-S32C4-CTLFireability-03: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-11: CTL false CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-12: EG true state space / EG
LeafsetExtension-PT-S32C4-CTLFireability-14: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-15: EFEG true state space /EFEG

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
LeafsetExtension-PT-S32C4-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-06: DISJ 0 1 0 0 3 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-09: CTL 0 0 1 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
LeafsetExtension-PT-S32C4-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
32 CTL EXCL 40/355 15/32 LeafsetExtension-PT-S32C4-CTLFireability-09 432874 m, 10379 m/sec, 1414713 t fired, .

Time elapsed: 445 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
LeafsetExtension-PT-S32C4-CTLFireability-03: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-11: CTL false CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-12: EG true state space / EG
LeafsetExtension-PT-S32C4-CTLFireability-14: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-15: EFEG true state space /EFEG

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
LeafsetExtension-PT-S32C4-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-06: DISJ 0 1 0 0 3 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-09: CTL 0 0 1 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
LeafsetExtension-PT-S32C4-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
32 CTL EXCL 45/355 17/32 LeafsetExtension-PT-S32C4-CTLFireability-09 485131 m, 10451 m/sec, 1583500 t fired, .

Time elapsed: 450 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
LeafsetExtension-PT-S32C4-CTLFireability-03: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-11: CTL false CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-12: EG true state space / EG
LeafsetExtension-PT-S32C4-CTLFireability-14: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-15: EFEG true state space /EFEG

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
LeafsetExtension-PT-S32C4-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-06: DISJ 0 1 0 0 3 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-09: CTL 0 0 1 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
LeafsetExtension-PT-S32C4-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
32 CTL EXCL 50/355 19/32 LeafsetExtension-PT-S32C4-CTLFireability-09 537855 m, 10544 m/sec, 1750097 t fired, .

Time elapsed: 455 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
LeafsetExtension-PT-S32C4-CTLFireability-03: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-11: CTL false CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-12: EG true state space / EG
LeafsetExtension-PT-S32C4-CTLFireability-14: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-15: EFEG true state space /EFEG

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
LeafsetExtension-PT-S32C4-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-06: DISJ 0 1 0 0 3 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-09: CTL 0 0 1 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
LeafsetExtension-PT-S32C4-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
32 CTL EXCL 55/355 20/32 LeafsetExtension-PT-S32C4-CTLFireability-09 585737 m, 9576 m/sec, 1915449 t fired, .

Time elapsed: 460 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
LeafsetExtension-PT-S32C4-CTLFireability-03: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-11: CTL false CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-12: EG true state space / EG
LeafsetExtension-PT-S32C4-CTLFireability-14: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-15: EFEG true state space /EFEG

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
LeafsetExtension-PT-S32C4-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-06: DISJ 0 1 0 0 3 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-09: CTL 0 0 1 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
LeafsetExtension-PT-S32C4-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
32 CTL EXCL 60/355 22/32 LeafsetExtension-PT-S32C4-CTLFireability-09 635338 m, 9920 m/sec, 2077824 t fired, .

Time elapsed: 465 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
LeafsetExtension-PT-S32C4-CTLFireability-03: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-11: CTL false CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-12: EG true state space / EG
LeafsetExtension-PT-S32C4-CTLFireability-14: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-15: EFEG true state space /EFEG

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
LeafsetExtension-PT-S32C4-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-06: DISJ 0 1 0 0 3 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-09: CTL 0 0 1 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
LeafsetExtension-PT-S32C4-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
32 CTL EXCL 65/355 24/32 LeafsetExtension-PT-S32C4-CTLFireability-09 687805 m, 10493 m/sec, 2249073 t fired, .

Time elapsed: 470 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
LeafsetExtension-PT-S32C4-CTLFireability-03: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-11: CTL false CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-12: EG true state space / EG
LeafsetExtension-PT-S32C4-CTLFireability-14: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-15: EFEG true state space /EFEG

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
LeafsetExtension-PT-S32C4-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-06: DISJ 0 1 0 0 3 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-09: CTL 0 0 1 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
LeafsetExtension-PT-S32C4-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
32 CTL EXCL 70/355 25/32 LeafsetExtension-PT-S32C4-CTLFireability-09 738847 m, 10208 m/sec, 2424990 t fired, .

Time elapsed: 475 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
LeafsetExtension-PT-S32C4-CTLFireability-03: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-11: CTL false CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-12: EG true state space / EG
LeafsetExtension-PT-S32C4-CTLFireability-14: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-15: EFEG true state space /EFEG

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
LeafsetExtension-PT-S32C4-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-06: DISJ 0 1 0 0 3 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-09: CTL 0 0 1 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
LeafsetExtension-PT-S32C4-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
32 CTL EXCL 75/355 27/32 LeafsetExtension-PT-S32C4-CTLFireability-09 795527 m, 11336 m/sec, 2605310 t fired, .

Time elapsed: 480 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
LeafsetExtension-PT-S32C4-CTLFireability-03: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-11: CTL false CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-12: EG true state space / EG
LeafsetExtension-PT-S32C4-CTLFireability-14: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-15: EFEG true state space /EFEG

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
LeafsetExtension-PT-S32C4-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-06: DISJ 0 1 0 0 3 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-09: CTL 0 0 1 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
LeafsetExtension-PT-S32C4-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
32 CTL EXCL 80/355 29/32 LeafsetExtension-PT-S32C4-CTLFireability-09 848346 m, 10563 m/sec, 2779024 t fired, .

Time elapsed: 485 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
LeafsetExtension-PT-S32C4-CTLFireability-03: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-11: CTL false CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-12: EG true state space / EG
LeafsetExtension-PT-S32C4-CTLFireability-14: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-15: EFEG true state space /EFEG

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
LeafsetExtension-PT-S32C4-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-06: DISJ 0 1 0 0 3 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-09: CTL 0 0 1 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
LeafsetExtension-PT-S32C4-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
32 CTL EXCL 85/355 31/32 LeafsetExtension-PT-S32C4-CTLFireability-09 897836 m, 9898 m/sec, 2945646 t fired, .

Time elapsed: 490 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
lola: FINISHED task # 32 (type EXCL) for LeafsetExtension-PT-S32C4-CTLFireability-09
lola: result : true
lola: markings : 899690
lola: fired transitions : 2950119
lola: time used : 85.000000
lola: memory pages used : 31
lola: LAUNCH task # 29 (type EXCL) for 28 LeafsetExtension-PT-S32C4-CTLFireability-08
lola: time limit : 388 sec
lola: memory limit: 32 pages
lola: FINISHED task # 29 (type EXCL) for LeafsetExtension-PT-S32C4-CTLFireability-08
lola: result : true
lola: markings : 1665
lola: fired transitions : 2192
lola: time used : 1.000000
lola: memory pages used : 1
lola: LAUNCH task # 26 (type EXCL) for 25 LeafsetExtension-PT-S32C4-CTLFireability-07
lola: time limit : 444 sec
lola: memory limit: 32 pages
lola: FINISHED task # 26 (type EXCL) for LeafsetExtension-PT-S32C4-CTLFireability-07
lola: result : true
lola: markings : 76
lola: fired transitions : 179
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 23 (type EXCL) for 18 LeafsetExtension-PT-S32C4-CTLFireability-06
lola: time limit : 518 sec
lola: memory limit: 32 pages
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
LeafsetExtension-PT-S32C4-CTLFireability-03: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-07: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-08: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-09: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-11: CTL false CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-12: EG true state space / EG
LeafsetExtension-PT-S32C4-CTLFireability-14: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-15: EFEG true state space /EFEG

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
LeafsetExtension-PT-S32C4-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-06: DISJ 0 0 1 0 3 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
LeafsetExtension-PT-S32C4-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
23 CTL EXCL 4/518 4/32 LeafsetExtension-PT-S32C4-CTLFireability-06 82101 m, 16420 m/sec, 137715 t fired, .

Time elapsed: 495 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
LeafsetExtension-PT-S32C4-CTLFireability-03: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-07: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-08: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-09: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-11: CTL false CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-12: EG true state space / EG
LeafsetExtension-PT-S32C4-CTLFireability-14: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-15: EFEG true state space /EFEG

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
LeafsetExtension-PT-S32C4-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-06: DISJ 0 0 1 0 3 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
LeafsetExtension-PT-S32C4-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
23 CTL EXCL 9/518 7/32 LeafsetExtension-PT-S32C4-CTLFireability-06 187633 m, 21106 m/sec, 316136 t fired, .

Time elapsed: 500 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
LeafsetExtension-PT-S32C4-CTLFireability-03: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-07: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-08: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-09: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-11: CTL false CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-12: EG true state space / EG
LeafsetExtension-PT-S32C4-CTLFireability-14: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-15: EFEG true state space /EFEG

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
LeafsetExtension-PT-S32C4-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-06: DISJ 0 0 1 0 3 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
LeafsetExtension-PT-S32C4-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
23 CTL EXCL 14/518 11/32 LeafsetExtension-PT-S32C4-CTLFireability-06 291892 m, 20851 m/sec, 493066 t fired, .

Time elapsed: 505 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
LeafsetExtension-PT-S32C4-CTLFireability-03: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-07: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-08: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-09: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-11: CTL false CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-12: EG true state space / EG
LeafsetExtension-PT-S32C4-CTLFireability-14: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-15: EFEG true state space /EFEG

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
LeafsetExtension-PT-S32C4-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-06: DISJ 0 0 1 0 3 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
LeafsetExtension-PT-S32C4-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
23 CTL EXCL 19/518 15/32 LeafsetExtension-PT-S32C4-CTLFireability-06 400220 m, 21665 m/sec, 668728 t fired, .

Time elapsed: 510 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
LeafsetExtension-PT-S32C4-CTLFireability-03: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-07: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-08: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-09: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-11: CTL false CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-12: EG true state space / EG
LeafsetExtension-PT-S32C4-CTLFireability-14: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-15: EFEG true state space /EFEG

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
LeafsetExtension-PT-S32C4-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-06: DISJ 0 0 1 0 3 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
LeafsetExtension-PT-S32C4-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
23 CTL EXCL 24/518 19/32 LeafsetExtension-PT-S32C4-CTLFireability-06 496316 m, 19219 m/sec, 844832 t fired, .

Time elapsed: 515 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
LeafsetExtension-PT-S32C4-CTLFireability-03: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-07: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-08: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-09: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-11: CTL false CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-12: EG true state space / EG
LeafsetExtension-PT-S32C4-CTLFireability-14: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-15: EFEG true state space /EFEG

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
LeafsetExtension-PT-S32C4-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-06: DISJ 0 0 1 0 3 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
LeafsetExtension-PT-S32C4-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
23 CTL EXCL 29/518 22/32 LeafsetExtension-PT-S32C4-CTLFireability-06 588340 m, 18404 m/sec, 1018705 t fired, .

Time elapsed: 520 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
LeafsetExtension-PT-S32C4-CTLFireability-03: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-07: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-08: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-09: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-11: CTL false CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-12: EG true state space / EG
LeafsetExtension-PT-S32C4-CTLFireability-14: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-15: EFEG true state space /EFEG

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
LeafsetExtension-PT-S32C4-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-06: DISJ 0 0 1 0 3 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
LeafsetExtension-PT-S32C4-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
23 CTL EXCL 34/518 25/32 LeafsetExtension-PT-S32C4-CTLFireability-06 690776 m, 20487 m/sec, 1195531 t fired, .

Time elapsed: 525 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
LeafsetExtension-PT-S32C4-CTLFireability-03: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-07: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-08: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-09: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-11: CTL false CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-12: EG true state space / EG
LeafsetExtension-PT-S32C4-CTLFireability-14: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-15: EFEG true state space /EFEG

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
LeafsetExtension-PT-S32C4-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-06: DISJ 0 0 1 0 3 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
LeafsetExtension-PT-S32C4-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
23 CTL EXCL 39/518 30/32 LeafsetExtension-PT-S32C4-CTLFireability-06 797069 m, 21258 m/sec, 1374343 t fired, .

Time elapsed: 530 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
lola: CANCELED task # 23 (type EXCL) for LeafsetExtension-PT-S32C4-CTLFireability-06 (memory limit exceeded)
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
LeafsetExtension-PT-S32C4-CTLFireability-03: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-07: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-08: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-09: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-11: CTL false CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-12: EG true state space / EG
LeafsetExtension-PT-S32C4-CTLFireability-14: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-15: EFEG true state space /EFEG

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
LeafsetExtension-PT-S32C4-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-06: DISJ 0 0 0 0 3 0 1 0
LeafsetExtension-PT-S32C4-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
LeafsetExtension-PT-S32C4-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 535 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
lola: LAUNCH task # 16 (type EXCL) for 15 LeafsetExtension-PT-S32C4-CTLFireability-05
lola: time limit : 613 sec
lola: memory limit: 32 pages
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
LeafsetExtension-PT-S32C4-CTLFireability-03: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-07: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-08: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-09: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-11: CTL false CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-12: EG true state space / EG
LeafsetExtension-PT-S32C4-CTLFireability-14: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-15: EFEG true state space /EFEG

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
LeafsetExtension-PT-S32C4-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-05: CTL 0 0 1 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-06: DISJ 0 0 0 0 3 0 1 0
LeafsetExtension-PT-S32C4-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
LeafsetExtension-PT-S32C4-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
16 CTL EXCL 5/613 2/32 LeafsetExtension-PT-S32C4-CTLFireability-05 49488 m, 9897 m/sec, 175191 t fired, .

Time elapsed: 540 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
LeafsetExtension-PT-S32C4-CTLFireability-03: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-07: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-08: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-09: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-11: CTL false CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-12: EG true state space / EG
LeafsetExtension-PT-S32C4-CTLFireability-14: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-15: EFEG true state space /EFEG

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
LeafsetExtension-PT-S32C4-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-05: CTL 0 0 1 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-06: DISJ 0 0 0 0 3 0 1 0
LeafsetExtension-PT-S32C4-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
LeafsetExtension-PT-S32C4-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
16 CTL EXCL 10/613 3/32 LeafsetExtension-PT-S32C4-CTLFireability-05 83039 m, 6710 m/sec, 351694 t fired, .

Time elapsed: 545 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
LeafsetExtension-PT-S32C4-CTLFireability-03: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-07: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-08: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-09: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-11: CTL false CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-12: EG true state space / EG
LeafsetExtension-PT-S32C4-CTLFireability-14: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-15: EFEG true state space /EFEG

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
LeafsetExtension-PT-S32C4-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-05: CTL 0 0 1 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-06: DISJ 0 0 0 0 3 0 1 0
LeafsetExtension-PT-S32C4-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
LeafsetExtension-PT-S32C4-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
16 CTL EXCL 15/613 3/32 LeafsetExtension-PT-S32C4-CTLFireability-05 83039 m, 0 m/sec, 535758 t fired, .

Time elapsed: 550 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
LeafsetExtension-PT-S32C4-CTLFireability-03: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-07: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-08: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-09: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-11: CTL false CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-12: EG true state space / EG
LeafsetExtension-PT-S32C4-CTLFireability-14: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-15: EFEG true state space /EFEG

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
LeafsetExtension-PT-S32C4-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-05: CTL 0 0 1 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-06: DISJ 0 0 0 0 3 0 1 0
LeafsetExtension-PT-S32C4-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
LeafsetExtension-PT-S32C4-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
16 CTL EXCL 20/613 4/32 LeafsetExtension-PT-S32C4-CTLFireability-05 89069 m, 1206 m/sec, 719057 t fired, .

Time elapsed: 555 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
LeafsetExtension-PT-S32C4-CTLFireability-03: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-07: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-08: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-09: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-11: CTL false CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-12: EG true state space / EG
LeafsetExtension-PT-S32C4-CTLFireability-14: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-15: EFEG true state space /EFEG

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
LeafsetExtension-PT-S32C4-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-05: CTL 0 0 1 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-06: DISJ 0 0 0 0 3 0 1 0
LeafsetExtension-PT-S32C4-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
LeafsetExtension-PT-S32C4-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
16 CTL EXCL 25/613 5/32 LeafsetExtension-PT-S32C4-CTLFireability-05 138035 m, 9793 m/sec, 894153 t fired, .

Time elapsed: 560 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
LeafsetExtension-PT-S32C4-CTLFireability-03: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-07: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-08: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-09: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-11: CTL false CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-12: EG true state space / EG
LeafsetExtension-PT-S32C4-CTLFireability-14: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-15: EFEG true state space /EFEG

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
LeafsetExtension-PT-S32C4-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-05: CTL 0 0 1 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-06: DISJ 0 0 0 0 3 0 1 0
LeafsetExtension-PT-S32C4-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
LeafsetExtension-PT-S32C4-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
16 CTL EXCL 30/613 6/32 LeafsetExtension-PT-S32C4-CTLFireability-05 166071 m, 5607 m/sec, 1072082 t fired, .

Time elapsed: 565 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
LeafsetExtension-PT-S32C4-CTLFireability-03: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-07: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-08: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-09: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-11: CTL false CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-12: EG true state space / EG
LeafsetExtension-PT-S32C4-CTLFireability-14: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-15: EFEG true state space /EFEG

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
LeafsetExtension-PT-S32C4-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-05: CTL 0 0 1 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-06: DISJ 0 0 0 0 3 0 1 0
LeafsetExtension-PT-S32C4-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
LeafsetExtension-PT-S32C4-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
16 CTL EXCL 35/613 6/32 LeafsetExtension-PT-S32C4-CTLFireability-05 166071 m, 0 m/sec, 1256126 t fired, .

Time elapsed: 570 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
LeafsetExtension-PT-S32C4-CTLFireability-03: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-07: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-08: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-09: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-11: CTL false CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-12: EG true state space / EG
LeafsetExtension-PT-S32C4-CTLFireability-14: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-15: EFEG true state space /EFEG

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
LeafsetExtension-PT-S32C4-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-05: CTL 0 0 1 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-06: DISJ 0 0 0 0 3 0 1 0
LeafsetExtension-PT-S32C4-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
LeafsetExtension-PT-S32C4-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
16 CTL EXCL 40/613 6/32 LeafsetExtension-PT-S32C4-CTLFireability-05 172562 m, 1298 m/sec, 1438912 t fired, .

Time elapsed: 575 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
LeafsetExtension-PT-S32C4-CTLFireability-03: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-07: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-08: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-09: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-11: CTL false CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-12: EG true state space / EG
LeafsetExtension-PT-S32C4-CTLFireability-14: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-15: EFEG true state space /EFEG

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
LeafsetExtension-PT-S32C4-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-05: CTL 0 0 1 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-06: DISJ 0 0 0 0 3 0 1 0
LeafsetExtension-PT-S32C4-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
LeafsetExtension-PT-S32C4-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
16 CTL EXCL 45/613 7/32 LeafsetExtension-PT-S32C4-CTLFireability-05 195218 m, 4531 m/sec, 1619881 t fired, .

Time elapsed: 580 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
LeafsetExtension-PT-S32C4-CTLFireability-03: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-07: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-08: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-09: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-11: CTL false CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-12: EG true state space / EG
LeafsetExtension-PT-S32C4-CTLFireability-14: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-15: EFEG true state space /EFEG

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
LeafsetExtension-PT-S32C4-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-05: CTL 0 0 1 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-06: DISJ 0 0 0 0 3 0 1 0
LeafsetExtension-PT-S32C4-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
LeafsetExtension-PT-S32C4-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
16 CTL EXCL 50/613 8/32 LeafsetExtension-PT-S32C4-CTLFireability-05 214424 m, 3841 m/sec, 1798862 t fired, .

Time elapsed: 585 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
LeafsetExtension-PT-S32C4-CTLFireability-03: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-07: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-08: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-09: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-11: CTL false CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-12: EG true state space / EG
LeafsetExtension-PT-S32C4-CTLFireability-14: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-15: EFEG true state space /EFEG

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
LeafsetExtension-PT-S32C4-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-05: CTL 0 0 1 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-06: DISJ 0 0 0 0 3 0 1 0
LeafsetExtension-PT-S32C4-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
LeafsetExtension-PT-S32C4-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
16 CTL EXCL 55/613 9/32 LeafsetExtension-PT-S32C4-CTLFireability-05 232496 m, 3614 m/sec, 1976538 t fired, .

Time elapsed: 590 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
LeafsetExtension-PT-S32C4-CTLFireability-03: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-07: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-08: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-09: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-11: CTL false CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-12: EG true state space / EG
LeafsetExtension-PT-S32C4-CTLFireability-14: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-15: EFEG true state space /EFEG

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
LeafsetExtension-PT-S32C4-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-05: CTL 0 0 1 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-06: DISJ 0 0 0 0 3 0 1 0
LeafsetExtension-PT-S32C4-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
LeafsetExtension-PT-S32C4-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
16 CTL EXCL 60/613 9/32 LeafsetExtension-PT-S32C4-CTLFireability-05 251596 m, 3820 m/sec, 2153767 t fired, .

Time elapsed: 595 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
LeafsetExtension-PT-S32C4-CTLFireability-03: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-07: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-08: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-09: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-11: CTL false CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-12: EG true state space / EG
LeafsetExtension-PT-S32C4-CTLFireability-14: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-15: EFEG true state space /EFEG

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
LeafsetExtension-PT-S32C4-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-05: CTL 0 0 1 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-06: DISJ 0 0 0 0 3 0 1 0
LeafsetExtension-PT-S32C4-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
LeafsetExtension-PT-S32C4-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
16 CTL EXCL 65/613 11/32 LeafsetExtension-PT-S32C4-CTLFireability-05 299586 m, 9598 m/sec, 2325228 t fired, .

Time elapsed: 600 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
LeafsetExtension-PT-S32C4-CTLFireability-03: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-07: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-08: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-09: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-11: CTL false CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-12: EG true state space / EG
LeafsetExtension-PT-S32C4-CTLFireability-14: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-15: EFEG true state space /EFEG

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
LeafsetExtension-PT-S32C4-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-05: CTL 0 0 1 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-06: DISJ 0 0 0 0 3 0 1 0
LeafsetExtension-PT-S32C4-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
LeafsetExtension-PT-S32C4-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
16 CTL EXCL 70/613 12/32 LeafsetExtension-PT-S32C4-CTLFireability-05 332569 m, 6596 m/sec, 2497917 t fired, .

Time elapsed: 605 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
LeafsetExtension-PT-S32C4-CTLFireability-03: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-07: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-08: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-09: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-11: CTL false CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-12: EG true state space / EG
LeafsetExtension-PT-S32C4-CTLFireability-14: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-15: EFEG true state space /EFEG

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
LeafsetExtension-PT-S32C4-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-05: CTL 0 0 1 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-06: DISJ 0 0 0 0 3 0 1 0
LeafsetExtension-PT-S32C4-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
LeafsetExtension-PT-S32C4-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
16 CTL EXCL 75/613 12/32 LeafsetExtension-PT-S32C4-CTLFireability-05 332569 m, 0 m/sec, 2678453 t fired, .

Time elapsed: 610 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
LeafsetExtension-PT-S32C4-CTLFireability-03: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-07: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-08: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-09: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-11: CTL false CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-12: EG true state space / EG
LeafsetExtension-PT-S32C4-CTLFireability-14: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-15: EFEG true state space /EFEG

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
LeafsetExtension-PT-S32C4-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-05: CTL 0 0 1 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-06: DISJ 0 0 0 0 3 0 1 0
LeafsetExtension-PT-S32C4-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
LeafsetExtension-PT-S32C4-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
16 CTL EXCL 80/613 12/32 LeafsetExtension-PT-S32C4-CTLFireability-05 335374 m, 561 m/sec, 2858099 t fired, .

Time elapsed: 615 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
LeafsetExtension-PT-S32C4-CTLFireability-03: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-07: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-08: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-09: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-11: CTL false CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-12: EG true state space / EG
LeafsetExtension-PT-S32C4-CTLFireability-14: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-15: EFEG true state space /EFEG

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
LeafsetExtension-PT-S32C4-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-05: CTL 0 0 1 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-06: DISJ 0 0 0 0 3 0 1 0
LeafsetExtension-PT-S32C4-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
LeafsetExtension-PT-S32C4-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
16 CTL EXCL 85/613 13/32 LeafsetExtension-PT-S32C4-CTLFireability-05 382223 m, 9369 m/sec, 3025582 t fired, .

Time elapsed: 620 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
LeafsetExtension-PT-S32C4-CTLFireability-03: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-07: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-08: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-09: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-11: CTL false CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-12: EG true state space / EG
LeafsetExtension-PT-S32C4-CTLFireability-14: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-15: EFEG true state space /EFEG

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
LeafsetExtension-PT-S32C4-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-05: CTL 0 0 1 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-06: DISJ 0 0 0 0 3 0 1 0
LeafsetExtension-PT-S32C4-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
LeafsetExtension-PT-S32C4-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
16 CTL EXCL 90/613 14/32 LeafsetExtension-PT-S32C4-CTLFireability-05 415818 m, 6719 m/sec, 3194216 t fired, .

Time elapsed: 625 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
LeafsetExtension-PT-S32C4-CTLFireability-03: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-07: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-08: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-09: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-11: CTL false CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-12: EG true state space / EG
LeafsetExtension-PT-S32C4-CTLFireability-14: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-15: EFEG true state space /EFEG

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
LeafsetExtension-PT-S32C4-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-05: CTL 0 0 1 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-06: DISJ 0 0 0 0 3 0 1 0
LeafsetExtension-PT-S32C4-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
LeafsetExtension-PT-S32C4-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
16 CTL EXCL 95/613 14/32 LeafsetExtension-PT-S32C4-CTLFireability-05 415818 m, 0 m/sec, 3370454 t fired, .

Time elapsed: 630 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
LeafsetExtension-PT-S32C4-CTLFireability-03: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-07: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-08: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-09: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-11: CTL false CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-12: EG true state space / EG
LeafsetExtension-PT-S32C4-CTLFireability-14: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-15: EFEG true state space /EFEG

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
LeafsetExtension-PT-S32C4-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-05: CTL 0 0 1 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-06: DISJ 0 0 0 0 3 0 1 0
LeafsetExtension-PT-S32C4-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
LeafsetExtension-PT-S32C4-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
16 CTL EXCL 100/613 14/32 LeafsetExtension-PT-S32C4-CTLFireability-05 415818 m, 0 m/sec, 3546625 t fired, .

Time elapsed: 635 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
LeafsetExtension-PT-S32C4-CTLFireability-03: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-07: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-08: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-09: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-11: CTL false CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-12: EG true state space / EG
LeafsetExtension-PT-S32C4-CTLFireability-14: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-15: EFEG true state space /EFEG

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
LeafsetExtension-PT-S32C4-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-05: CTL 0 0 1 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-06: DISJ 0 0 0 0 3 0 1 0
LeafsetExtension-PT-S32C4-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
LeafsetExtension-PT-S32C4-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
16 CTL EXCL 105/613 16/32 LeafsetExtension-PT-S32C4-CTLFireability-05 461174 m, 9071 m/sec, 3712145 t fired, .

Time elapsed: 640 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
LeafsetExtension-PT-S32C4-CTLFireability-03: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-07: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-08: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-09: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-11: CTL false CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-12: EG true state space / EG
LeafsetExtension-PT-S32C4-CTLFireability-14: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-15: EFEG true state space /EFEG

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
LeafsetExtension-PT-S32C4-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-05: CTL 0 0 1 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-06: DISJ 0 0 0 0 3 0 1 0
LeafsetExtension-PT-S32C4-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
LeafsetExtension-PT-S32C4-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
16 CTL EXCL 110/613 17/32 LeafsetExtension-PT-S32C4-CTLFireability-05 499067 m, 7578 m/sec, 3877336 t fired, .

Time elapsed: 645 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
LeafsetExtension-PT-S32C4-CTLFireability-03: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-07: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-08: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-09: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-11: CTL false CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-12: EG true state space / EG
LeafsetExtension-PT-S32C4-CTLFireability-14: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-15: EFEG true state space /EFEG

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
LeafsetExtension-PT-S32C4-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-05: CTL 0 0 1 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-06: DISJ 0 0 0 0 3 0 1 0
LeafsetExtension-PT-S32C4-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
LeafsetExtension-PT-S32C4-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
16 CTL EXCL 115/613 17/32 LeafsetExtension-PT-S32C4-CTLFireability-05 499067 m, 0 m/sec, 4050707 t fired, .

Time elapsed: 650 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
LeafsetExtension-PT-S32C4-CTLFireability-03: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-07: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-08: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-09: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-11: CTL false CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-12: EG true state space / EG
LeafsetExtension-PT-S32C4-CTLFireability-14: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-15: EFEG true state space /EFEG

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
LeafsetExtension-PT-S32C4-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-05: CTL 0 0 1 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-06: DISJ 0 0 0 0 3 0 1 0
LeafsetExtension-PT-S32C4-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
LeafsetExtension-PT-S32C4-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
16 CTL EXCL 120/613 17/32 LeafsetExtension-PT-S32C4-CTLFireability-05 499067 m, 0 m/sec, 4224256 t fired, .

Time elapsed: 655 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
LeafsetExtension-PT-S32C4-CTLFireability-03: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-07: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-08: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-09: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-11: CTL false CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-12: EG true state space / EG
LeafsetExtension-PT-S32C4-CTLFireability-14: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-15: EFEG true state space /EFEG

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
LeafsetExtension-PT-S32C4-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-05: CTL 0 0 1 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-06: DISJ 0 0 0 0 3 0 1 0
LeafsetExtension-PT-S32C4-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
LeafsetExtension-PT-S32C4-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
16 CTL EXCL 125/613 18/32 LeafsetExtension-PT-S32C4-CTLFireability-05 537447 m, 7676 m/sec, 4388467 t fired, .

Time elapsed: 660 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
LeafsetExtension-PT-S32C4-CTLFireability-03: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-07: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-08: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-09: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-11: CTL false CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-12: EG true state space / EG
LeafsetExtension-PT-S32C4-CTLFireability-14: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-15: EFEG true state space /EFEG

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
LeafsetExtension-PT-S32C4-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-05: CTL 0 0 1 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-06: DISJ 0 0 0 0 3 0 1 0
LeafsetExtension-PT-S32C4-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
LeafsetExtension-PT-S32C4-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
16 CTL EXCL 130/613 20/32 LeafsetExtension-PT-S32C4-CTLFireability-05 579493 m, 8409 m/sec, 4550423 t fired, .

Time elapsed: 665 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
LeafsetExtension-PT-S32C4-CTLFireability-03: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-07: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-08: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-09: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-11: CTL false CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-12: EG true state space / EG
LeafsetExtension-PT-S32C4-CTLFireability-14: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-15: EFEG true state space /EFEG

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
LeafsetExtension-PT-S32C4-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-05: CTL 0 0 1 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-06: DISJ 0 0 0 0 3 0 1 0
LeafsetExtension-PT-S32C4-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
LeafsetExtension-PT-S32C4-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
16 CTL EXCL 135/613 20/32 LeafsetExtension-PT-S32C4-CTLFireability-05 582099 m, 521 m/sec, 4719067 t fired, .

Time elapsed: 670 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
LeafsetExtension-PT-S32C4-CTLFireability-03: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-07: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-08: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-09: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-11: CTL false CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-12: EG true state space / EG
LeafsetExtension-PT-S32C4-CTLFireability-14: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-15: EFEG true state space /EFEG

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
LeafsetExtension-PT-S32C4-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-05: CTL 0 0 1 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-06: DISJ 0 0 0 0 3 0 1 0
LeafsetExtension-PT-S32C4-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
LeafsetExtension-PT-S32C4-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
16 CTL EXCL 140/613 20/32 LeafsetExtension-PT-S32C4-CTLFireability-05 582099 m, 0 m/sec, 4890304 t fired, .

Time elapsed: 675 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
LeafsetExtension-PT-S32C4-CTLFireability-03: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-07: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-08: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-09: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-11: CTL false CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-12: EG true state space / EG
LeafsetExtension-PT-S32C4-CTLFireability-14: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-15: EFEG true state space /EFEG

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
LeafsetExtension-PT-S32C4-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-05: CTL 0 0 1 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-06: DISJ 0 0 0 0 3 0 1 0
LeafsetExtension-PT-S32C4-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
LeafsetExtension-PT-S32C4-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
16 CTL EXCL 145/613 21/32 LeafsetExtension-PT-S32C4-CTLFireability-05 610764 m, 5733 m/sec, 5053120 t fired, .

Time elapsed: 680 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
LeafsetExtension-PT-S32C4-CTLFireability-03: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-07: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-08: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-09: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-11: CTL false CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-12: EG true state space / EG
LeafsetExtension-PT-S32C4-CTLFireability-14: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-15: EFEG true state space /EFEG

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
LeafsetExtension-PT-S32C4-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-05: CTL 0 0 1 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-06: DISJ 0 0 0 0 3 0 1 0
LeafsetExtension-PT-S32C4-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
LeafsetExtension-PT-S32C4-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
16 CTL EXCL 150/613 22/32 LeafsetExtension-PT-S32C4-CTLFireability-05 653364 m, 8520 m/sec, 5211944 t fired, .

Time elapsed: 685 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
LeafsetExtension-PT-S32C4-CTLFireability-03: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-07: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-08: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-09: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-11: CTL false CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-12: EG true state space / EG
LeafsetExtension-PT-S32C4-CTLFireability-14: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-15: EFEG true state space /EFEG

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
LeafsetExtension-PT-S32C4-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-05: CTL 0 0 1 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-06: DISJ 0 0 0 0 3 0 1 0
LeafsetExtension-PT-S32C4-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
LeafsetExtension-PT-S32C4-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
16 CTL EXCL 155/613 23/32 LeafsetExtension-PT-S32C4-CTLFireability-05 665131 m, 2353 m/sec, 5375018 t fired, .

Time elapsed: 690 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
LeafsetExtension-PT-S32C4-CTLFireability-03: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-07: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-08: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-09: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-11: CTL false CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-12: EG true state space / EG
LeafsetExtension-PT-S32C4-CTLFireability-14: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-15: EFEG true state space /EFEG

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
LeafsetExtension-PT-S32C4-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-05: CTL 0 0 1 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-06: DISJ 0 0 0 0 3 0 1 0
LeafsetExtension-PT-S32C4-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
LeafsetExtension-PT-S32C4-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
16 CTL EXCL 160/613 23/32 LeafsetExtension-PT-S32C4-CTLFireability-05 665131 m, 0 m/sec, 5542591 t fired, .

Time elapsed: 695 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
LeafsetExtension-PT-S32C4-CTLFireability-03: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-07: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-08: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-09: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-11: CTL false CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-12: EG true state space / EG
LeafsetExtension-PT-S32C4-CTLFireability-14: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-15: EFEG true state space /EFEG

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
LeafsetExtension-PT-S32C4-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-05: CTL 0 0 1 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-06: DISJ 0 0 0 0 3 0 1 0
LeafsetExtension-PT-S32C4-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
LeafsetExtension-PT-S32C4-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
16 CTL EXCL 165/613 23/32 LeafsetExtension-PT-S32C4-CTLFireability-05 682752 m, 3524 m/sec, 5712020 t fired, .

Time elapsed: 700 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
LeafsetExtension-PT-S32C4-CTLFireability-03: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-07: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-08: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-09: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-11: CTL false CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-12: EG true state space / EG
LeafsetExtension-PT-S32C4-CTLFireability-14: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-15: EFEG true state space /EFEG

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
LeafsetExtension-PT-S32C4-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-05: CTL 0 0 1 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-06: DISJ 0 0 0 0 3 0 1 0
LeafsetExtension-PT-S32C4-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
LeafsetExtension-PT-S32C4-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
16 CTL EXCL 170/613 25/32 LeafsetExtension-PT-S32C4-CTLFireability-05 729423 m, 9334 m/sec, 5883069 t fired, .

Time elapsed: 705 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
LeafsetExtension-PT-S32C4-CTLFireability-03: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-07: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-08: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-09: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-11: CTL false CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-12: EG true state space / EG
LeafsetExtension-PT-S32C4-CTLFireability-14: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-15: EFEG true state space /EFEG

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
LeafsetExtension-PT-S32C4-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-05: CTL 0 0 1 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-06: DISJ 0 0 0 0 3 0 1 0
LeafsetExtension-PT-S32C4-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
LeafsetExtension-PT-S32C4-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
16 CTL EXCL 175/613 26/32 LeafsetExtension-PT-S32C4-CTLFireability-05 748163 m, 3748 m/sec, 6058703 t fired, .

Time elapsed: 710 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
LeafsetExtension-PT-S32C4-CTLFireability-03: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-07: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-08: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-09: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-11: CTL false CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-12: EG true state space / EG
LeafsetExtension-PT-S32C4-CTLFireability-14: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-15: EFEG true state space /EFEG

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
LeafsetExtension-PT-S32C4-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-05: CTL 0 0 1 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-06: DISJ 0 0 0 0 3 0 1 0
LeafsetExtension-PT-S32C4-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
LeafsetExtension-PT-S32C4-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
16 CTL EXCL 180/613 26/32 LeafsetExtension-PT-S32C4-CTLFireability-05 748163 m, 0 m/sec, 6239138 t fired, .

Time elapsed: 715 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
LeafsetExtension-PT-S32C4-CTLFireability-03: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-07: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-08: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-09: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-11: CTL false CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-12: EG true state space / EG
LeafsetExtension-PT-S32C4-CTLFireability-14: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-15: EFEG true state space /EFEG

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
LeafsetExtension-PT-S32C4-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-05: CTL 0 0 1 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-06: DISJ 0 0 0 0 3 0 1 0
LeafsetExtension-PT-S32C4-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
LeafsetExtension-PT-S32C4-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
16 CTL EXCL 185/613 26/32 LeafsetExtension-PT-S32C4-CTLFireability-05 767775 m, 3922 m/sec, 6417526 t fired, .

Time elapsed: 720 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
LeafsetExtension-PT-S32C4-CTLFireability-03: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-07: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-08: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-09: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-11: CTL false CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-12: EG true state space / EG
LeafsetExtension-PT-S32C4-CTLFireability-14: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-15: EFEG true state space /EFEG

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
LeafsetExtension-PT-S32C4-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-05: CTL 0 0 1 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-06: DISJ 0 0 0 0 3 0 1 0
LeafsetExtension-PT-S32C4-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
LeafsetExtension-PT-S32C4-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
16 CTL EXCL 190/613 28/32 LeafsetExtension-PT-S32C4-CTLFireability-05 814972 m, 9439 m/sec, 6592053 t fired, .

Time elapsed: 725 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
LeafsetExtension-PT-S32C4-CTLFireability-03: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-07: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-08: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-09: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-11: CTL false CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-12: EG true state space / EG
LeafsetExtension-PT-S32C4-CTLFireability-14: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-15: EFEG true state space /EFEG

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
LeafsetExtension-PT-S32C4-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-05: CTL 0 0 1 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-06: DISJ 0 0 0 0 3 0 1 0
LeafsetExtension-PT-S32C4-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
LeafsetExtension-PT-S32C4-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
16 CTL EXCL 195/613 28/32 LeafsetExtension-PT-S32C4-CTLFireability-05 831412 m, 3288 m/sec, 6772613 t fired, .

Time elapsed: 730 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
LeafsetExtension-PT-S32C4-CTLFireability-03: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-07: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-08: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-09: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-11: CTL false CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-12: EG true state space / EG
LeafsetExtension-PT-S32C4-CTLFireability-14: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-15: EFEG true state space /EFEG

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
LeafsetExtension-PT-S32C4-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-05: CTL 0 0 1 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-06: DISJ 0 0 0 0 3 0 1 0
LeafsetExtension-PT-S32C4-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
LeafsetExtension-PT-S32C4-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
16 CTL EXCL 200/613 28/32 LeafsetExtension-PT-S32C4-CTLFireability-05 831412 m, 0 m/sec, 6956830 t fired, .

Time elapsed: 735 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
LeafsetExtension-PT-S32C4-CTLFireability-03: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-07: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-08: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-09: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-11: CTL false CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-12: EG true state space / EG
LeafsetExtension-PT-S32C4-CTLFireability-14: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-15: EFEG true state space /EFEG

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
LeafsetExtension-PT-S32C4-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-05: CTL 0 0 1 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-06: DISJ 0 0 0 0 3 0 1 0
LeafsetExtension-PT-S32C4-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
LeafsetExtension-PT-S32C4-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
16 CTL EXCL 205/613 29/32 LeafsetExtension-PT-S32C4-CTLFireability-05 854313 m, 4580 m/sec, 7131845 t fired, .

Time elapsed: 740 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
LeafsetExtension-PT-S32C4-CTLFireability-03: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-07: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-08: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-09: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-11: CTL false CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-12: EG true state space / EG
LeafsetExtension-PT-S32C4-CTLFireability-14: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-15: EFEG true state space /EFEG

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
LeafsetExtension-PT-S32C4-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-05: CTL 0 0 1 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-06: DISJ 0 0 0 0 3 0 1 0
LeafsetExtension-PT-S32C4-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
LeafsetExtension-PT-S32C4-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
16 CTL EXCL 210/613 31/32 LeafsetExtension-PT-S32C4-CTLFireability-05 898208 m, 8779 m/sec, 7294477 t fired, .

Time elapsed: 745 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
LeafsetExtension-PT-S32C4-CTLFireability-03: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-07: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-08: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-09: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-11: CTL false CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-12: EG true state space / EG
LeafsetExtension-PT-S32C4-CTLFireability-14: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-15: EFEG true state space /EFEG

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
LeafsetExtension-PT-S32C4-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-05: CTL 0 0 1 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-06: DISJ 0 0 0 0 3 0 1 0
LeafsetExtension-PT-S32C4-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
LeafsetExtension-PT-S32C4-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
16 CTL EXCL 215/613 31/32 LeafsetExtension-PT-S32C4-CTLFireability-05 914661 m, 3290 m/sec, 7463118 t fired, .

Time elapsed: 750 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
LeafsetExtension-PT-S32C4-CTLFireability-03: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-07: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-08: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-09: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-11: CTL false CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-12: EG true state space / EG
LeafsetExtension-PT-S32C4-CTLFireability-14: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-15: EFEG true state space /EFEG

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
LeafsetExtension-PT-S32C4-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-05: CTL 0 0 1 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-06: DISJ 0 0 0 0 3 0 1 0
LeafsetExtension-PT-S32C4-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
LeafsetExtension-PT-S32C4-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
16 CTL EXCL 220/613 31/32 LeafsetExtension-PT-S32C4-CTLFireability-05 914661 m, 0 m/sec, 7634045 t fired, .

Time elapsed: 755 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
LeafsetExtension-PT-S32C4-CTLFireability-03: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-07: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-08: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-09: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-11: CTL false CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-12: EG true state space / EG
LeafsetExtension-PT-S32C4-CTLFireability-14: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-15: EFEG true state space /EFEG

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
LeafsetExtension-PT-S32C4-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-05: CTL 0 0 1 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-06: DISJ 0 0 0 0 3 0 1 0
LeafsetExtension-PT-S32C4-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
LeafsetExtension-PT-S32C4-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
16 CTL EXCL 225/613 32/32 LeafsetExtension-PT-S32C4-CTLFireability-05 926661 m, 2400 m/sec, 7803007 t fired, .

Time elapsed: 760 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
LeafsetExtension-PT-S32C4-CTLFireability-03: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-07: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-08: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-09: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-11: CTL false CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-12: EG true state space / EG
LeafsetExtension-PT-S32C4-CTLFireability-14: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-15: EFEG true state space /EFEG

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
LeafsetExtension-PT-S32C4-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-05: CTL 0 0 1 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-06: DISJ 0 0 0 0 3 0 1 0
LeafsetExtension-PT-S32C4-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
LeafsetExtension-PT-S32C4-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
16 CTL EXCL 230/613 32/32 LeafsetExtension-PT-S32C4-CTLFireability-05 945186 m, 3705 m/sec, 7965045 t fired, .

Time elapsed: 765 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
lola: CANCELED task # 16 (type EXCL) for LeafsetExtension-PT-S32C4-CTLFireability-05 (memory limit exceeded)
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
LeafsetExtension-PT-S32C4-CTLFireability-03: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-07: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-08: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-09: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-11: CTL false CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-12: EG true state space / EG
LeafsetExtension-PT-S32C4-CTLFireability-14: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-15: EFEG true state space /EFEG

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
LeafsetExtension-PT-S32C4-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
LeafsetExtension-PT-S32C4-CTLFireability-06: DISJ 0 0 0 0 3 0 1 0
LeafsetExtension-PT-S32C4-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
LeafsetExtension-PT-S32C4-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 770 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
lola: LAUNCH task # 13 (type EXCL) for 12 LeafsetExtension-PT-S32C4-CTLFireability-04
lola: time limit : 707 sec
lola: memory limit: 32 pages
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
LeafsetExtension-PT-S32C4-CTLFireability-03: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-07: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-08: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-09: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-11: CTL false CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-12: EG true state space / EG
LeafsetExtension-PT-S32C4-CTLFireability-14: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-15: EFEG true state space /EFEG

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
LeafsetExtension-PT-S32C4-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-04: CTL 0 0 1 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
LeafsetExtension-PT-S32C4-CTLFireability-06: DISJ 0 0 0 0 3 0 1 0
LeafsetExtension-PT-S32C4-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
LeafsetExtension-PT-S32C4-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
13 CTL EXCL 5/707 2/32 LeafsetExtension-PT-S32C4-CTLFireability-04 34492 m, 6898 m/sec, 178239 t fired, .

Time elapsed: 775 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
LeafsetExtension-PT-S32C4-CTLFireability-03: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-07: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-08: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-09: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-11: CTL false CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-12: EG true state space / EG
LeafsetExtension-PT-S32C4-CTLFireability-14: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-15: EFEG true state space /EFEG

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
LeafsetExtension-PT-S32C4-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-04: CTL 0 0 1 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
LeafsetExtension-PT-S32C4-CTLFireability-06: DISJ 0 0 0 0 3 0 1 0
LeafsetExtension-PT-S32C4-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
LeafsetExtension-PT-S32C4-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
13 CTL EXCL 10/707 3/32 LeafsetExtension-PT-S32C4-CTLFireability-04 66845 m, 6470 m/sec, 354402 t fired, .

Time elapsed: 780 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
LeafsetExtension-PT-S32C4-CTLFireability-03: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-07: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-08: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-09: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-11: CTL false CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-12: EG true state space / EG
LeafsetExtension-PT-S32C4-CTLFireability-14: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-15: EFEG true state space /EFEG

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
LeafsetExtension-PT-S32C4-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-04: CTL 0 0 1 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
LeafsetExtension-PT-S32C4-CTLFireability-06: DISJ 0 0 0 0 3 0 1 0
LeafsetExtension-PT-S32C4-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
LeafsetExtension-PT-S32C4-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
13 CTL EXCL 15/707 4/32 LeafsetExtension-PT-S32C4-CTLFireability-04 99699 m, 6570 m/sec, 531714 t fired, .

Time elapsed: 785 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
LeafsetExtension-PT-S32C4-CTLFireability-03: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-07: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-08: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-09: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-11: CTL false CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-12: EG true state space / EG
LeafsetExtension-PT-S32C4-CTLFireability-14: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-15: EFEG true state space /EFEG

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
LeafsetExtension-PT-S32C4-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-04: CTL 0 0 1 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
LeafsetExtension-PT-S32C4-CTLFireability-06: DISJ 0 0 0 0 3 0 1 0
LeafsetExtension-PT-S32C4-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
LeafsetExtension-PT-S32C4-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
13 CTL EXCL 20/707 5/32 LeafsetExtension-PT-S32C4-CTLFireability-04 133584 m, 6777 m/sec, 708880 t fired, .

Time elapsed: 790 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
LeafsetExtension-PT-S32C4-CTLFireability-03: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-07: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-08: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-09: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-11: CTL false CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-12: EG true state space / EG
LeafsetExtension-PT-S32C4-CTLFireability-14: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-15: EFEG true state space /EFEG

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
LeafsetExtension-PT-S32C4-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-04: CTL 0 0 1 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
LeafsetExtension-PT-S32C4-CTLFireability-06: DISJ 0 0 0 0 3 0 1 0
LeafsetExtension-PT-S32C4-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
LeafsetExtension-PT-S32C4-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
13 CTL EXCL 25/707 6/32 LeafsetExtension-PT-S32C4-CTLFireability-04 165093 m, 6301 m/sec, 884997 t fired, .

Time elapsed: 795 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
LeafsetExtension-PT-S32C4-CTLFireability-03: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-07: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-08: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-09: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-11: CTL false CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-12: EG true state space / EG
LeafsetExtension-PT-S32C4-CTLFireability-14: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-15: EFEG true state space /EFEG

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
LeafsetExtension-PT-S32C4-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-04: CTL 0 0 1 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
LeafsetExtension-PT-S32C4-CTLFireability-06: DISJ 0 0 0 0 3 0 1 0
LeafsetExtension-PT-S32C4-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
LeafsetExtension-PT-S32C4-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
13 CTL EXCL 30/707 7/32 LeafsetExtension-PT-S32C4-CTLFireability-04 198760 m, 6733 m/sec, 1061790 t fired, .

Time elapsed: 800 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
LeafsetExtension-PT-S32C4-CTLFireability-03: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-07: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-08: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-09: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-11: CTL false CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-12: EG true state space / EG
LeafsetExtension-PT-S32C4-CTLFireability-14: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-15: EFEG true state space /EFEG

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
LeafsetExtension-PT-S32C4-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-04: CTL 0 0 1 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
LeafsetExtension-PT-S32C4-CTLFireability-06: DISJ 0 0 0 0 3 0 1 0
LeafsetExtension-PT-S32C4-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
LeafsetExtension-PT-S32C4-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
13 CTL EXCL 35/707 8/32 LeafsetExtension-PT-S32C4-CTLFireability-04 231087 m, 6465 m/sec, 1236811 t fired, .

Time elapsed: 805 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
LeafsetExtension-PT-S32C4-CTLFireability-03: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-07: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-08: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-09: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-11: CTL false CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-12: EG true state space / EG
LeafsetExtension-PT-S32C4-CTLFireability-14: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-15: EFEG true state space /EFEG

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
LeafsetExtension-PT-S32C4-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-04: CTL 0 0 1 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
LeafsetExtension-PT-S32C4-CTLFireability-06: DISJ 0 0 0 0 3 0 1 0
LeafsetExtension-PT-S32C4-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
LeafsetExtension-PT-S32C4-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
13 CTL EXCL 40/707 10/32 LeafsetExtension-PT-S32C4-CTLFireability-04 263004 m, 6383 m/sec, 1411459 t fired, .

Time elapsed: 810 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
LeafsetExtension-PT-S32C4-CTLFireability-03: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-07: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-08: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-09: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-11: CTL false CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-12: EG true state space / EG
LeafsetExtension-PT-S32C4-CTLFireability-14: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-15: EFEG true state space /EFEG

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
LeafsetExtension-PT-S32C4-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-04: CTL 0 0 1 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
LeafsetExtension-PT-S32C4-CTLFireability-06: DISJ 0 0 0 0 3 0 1 0
LeafsetExtension-PT-S32C4-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
LeafsetExtension-PT-S32C4-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
13 CTL EXCL 45/707 11/32 LeafsetExtension-PT-S32C4-CTLFireability-04 296014 m, 6602 m/sec, 1585371 t fired, .

Time elapsed: 815 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
LeafsetExtension-PT-S32C4-CTLFireability-03: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-07: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-08: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-09: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-11: CTL false CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-12: EG true state space / EG
LeafsetExtension-PT-S32C4-CTLFireability-14: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-15: EFEG true state space /EFEG

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
LeafsetExtension-PT-S32C4-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-04: CTL 0 0 1 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
LeafsetExtension-PT-S32C4-CTLFireability-06: DISJ 0 0 0 0 3 0 1 0
LeafsetExtension-PT-S32C4-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
LeafsetExtension-PT-S32C4-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
13 CTL EXCL 50/707 12/32 LeafsetExtension-PT-S32C4-CTLFireability-04 327027 m, 6202 m/sec, 1757916 t fired, .

Time elapsed: 820 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
LeafsetExtension-PT-S32C4-CTLFireability-03: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-07: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-08: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-09: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-11: CTL false CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-12: EG true state space / EG
LeafsetExtension-PT-S32C4-CTLFireability-14: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-15: EFEG true state space /EFEG

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
LeafsetExtension-PT-S32C4-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-04: CTL 0 0 1 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
LeafsetExtension-PT-S32C4-CTLFireability-06: DISJ 0 0 0 0 3 0 1 0
LeafsetExtension-PT-S32C4-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
LeafsetExtension-PT-S32C4-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
13 CTL EXCL 55/707 13/32 LeafsetExtension-PT-S32C4-CTLFireability-04 359187 m, 6432 m/sec, 1929108 t fired, .

Time elapsed: 825 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
LeafsetExtension-PT-S32C4-CTLFireability-03: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-07: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-08: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-09: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-11: CTL false CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-12: EG true state space / EG
LeafsetExtension-PT-S32C4-CTLFireability-14: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-15: EFEG true state space /EFEG

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
LeafsetExtension-PT-S32C4-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-04: CTL 0 0 1 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
LeafsetExtension-PT-S32C4-CTLFireability-06: DISJ 0 0 0 0 3 0 1 0
LeafsetExtension-PT-S32C4-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
LeafsetExtension-PT-S32C4-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
13 CTL EXCL 60/707 14/32 LeafsetExtension-PT-S32C4-CTLFireability-04 391236 m, 6409 m/sec, 2098520 t fired, .

Time elapsed: 830 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
LeafsetExtension-PT-S32C4-CTLFireability-03: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-07: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-08: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-09: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-11: CTL false CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-12: EG true state space / EG
LeafsetExtension-PT-S32C4-CTLFireability-14: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-15: EFEG true state space /EFEG

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
LeafsetExtension-PT-S32C4-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-04: CTL 0 0 1 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
LeafsetExtension-PT-S32C4-CTLFireability-06: DISJ 0 0 0 0 3 0 1 0
LeafsetExtension-PT-S32C4-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
LeafsetExtension-PT-S32C4-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
13 CTL EXCL 65/707 15/32 LeafsetExtension-PT-S32C4-CTLFireability-04 421589 m, 6070 m/sec, 2267455 t fired, .

Time elapsed: 835 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
LeafsetExtension-PT-S32C4-CTLFireability-03: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-07: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-08: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-09: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-11: CTL false CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-12: EG true state space / EG
LeafsetExtension-PT-S32C4-CTLFireability-14: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-15: EFEG true state space /EFEG

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
LeafsetExtension-PT-S32C4-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-04: CTL 0 0 1 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
LeafsetExtension-PT-S32C4-CTLFireability-06: DISJ 0 0 0 0 3 0 1 0
LeafsetExtension-PT-S32C4-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
LeafsetExtension-PT-S32C4-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
13 CTL EXCL 70/707 16/32 LeafsetExtension-PT-S32C4-CTLFireability-04 453783 m, 6438 m/sec, 2435006 t fired, .

Time elapsed: 840 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
LeafsetExtension-PT-S32C4-CTLFireability-03: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-07: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-08: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-09: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-11: CTL false CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-12: EG true state space / EG
LeafsetExtension-PT-S32C4-CTLFireability-14: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-15: EFEG true state space /EFEG

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
LeafsetExtension-PT-S32C4-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-04: CTL 0 0 1 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
LeafsetExtension-PT-S32C4-CTLFireability-06: DISJ 0 0 0 0 3 0 1 0
LeafsetExtension-PT-S32C4-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
LeafsetExtension-PT-S32C4-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
13 CTL EXCL 75/707 17/32 LeafsetExtension-PT-S32C4-CTLFireability-04 484250 m, 6093 m/sec, 2601066 t fired, .

Time elapsed: 845 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
LeafsetExtension-PT-S32C4-CTLFireability-03: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-07: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-08: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-09: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-11: CTL false CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-12: EG true state space / EG
LeafsetExtension-PT-S32C4-CTLFireability-14: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-15: EFEG true state space /EFEG

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
LeafsetExtension-PT-S32C4-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-04: CTL 0 0 1 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
LeafsetExtension-PT-S32C4-CTLFireability-06: DISJ 0 0 0 0 3 0 1 0
LeafsetExtension-PT-S32C4-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
LeafsetExtension-PT-S32C4-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
13 CTL EXCL 80/707 18/32 LeafsetExtension-PT-S32C4-CTLFireability-04 515122 m, 6174 m/sec, 2766516 t fired, .

Time elapsed: 850 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
LeafsetExtension-PT-S32C4-CTLFireability-03: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-07: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-08: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-09: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-11: CTL false CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-12: EG true state space / EG
LeafsetExtension-PT-S32C4-CTLFireability-14: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-15: EFEG true state space /EFEG

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
LeafsetExtension-PT-S32C4-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-04: CTL 0 0 1 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
LeafsetExtension-PT-S32C4-CTLFireability-06: DISJ 0 0 0 0 3 0 1 0
LeafsetExtension-PT-S32C4-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
LeafsetExtension-PT-S32C4-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
13 CTL EXCL 85/707 19/32 LeafsetExtension-PT-S32C4-CTLFireability-04 546573 m, 6290 m/sec, 2930799 t fired, .

Time elapsed: 855 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
LeafsetExtension-PT-S32C4-CTLFireability-03: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-07: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-08: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-09: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-11: CTL false CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-12: EG true state space / EG
LeafsetExtension-PT-S32C4-CTLFireability-14: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-15: EFEG true state space /EFEG

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
LeafsetExtension-PT-S32C4-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-04: CTL 0 0 1 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
LeafsetExtension-PT-S32C4-CTLFireability-06: DISJ 0 0 0 0 3 0 1 0
LeafsetExtension-PT-S32C4-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
LeafsetExtension-PT-S32C4-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
13 CTL EXCL 90/707 20/32 LeafsetExtension-PT-S32C4-CTLFireability-04 576047 m, 5894 m/sec, 3094839 t fired, .

Time elapsed: 860 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
LeafsetExtension-PT-S32C4-CTLFireability-03: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-07: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-08: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-09: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-11: CTL false CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-12: EG true state space / EG
LeafsetExtension-PT-S32C4-CTLFireability-14: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-15: EFEG true state space /EFEG

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
LeafsetExtension-PT-S32C4-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-04: CTL 0 0 1 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
LeafsetExtension-PT-S32C4-CTLFireability-06: DISJ 0 0 0 0 3 0 1 0
LeafsetExtension-PT-S32C4-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
LeafsetExtension-PT-S32C4-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
13 CTL EXCL 95/707 21/32 LeafsetExtension-PT-S32C4-CTLFireability-04 606424 m, 6075 m/sec, 3255470 t fired, .

Time elapsed: 865 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
LeafsetExtension-PT-S32C4-CTLFireability-03: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-07: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-08: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-09: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-11: CTL false CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-12: EG true state space / EG
LeafsetExtension-PT-S32C4-CTLFireability-14: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-15: EFEG true state space /EFEG

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
LeafsetExtension-PT-S32C4-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-04: CTL 0 0 1 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
LeafsetExtension-PT-S32C4-CTLFireability-06: DISJ 0 0 0 0 3 0 1 0
LeafsetExtension-PT-S32C4-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
LeafsetExtension-PT-S32C4-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
13 CTL EXCL 100/707 22/32 LeafsetExtension-PT-S32C4-CTLFireability-04 636836 m, 6082 m/sec, 3415794 t fired, .

Time elapsed: 870 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
LeafsetExtension-PT-S32C4-CTLFireability-03: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-07: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-08: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-09: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-11: CTL false CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-12: EG true state space / EG
LeafsetExtension-PT-S32C4-CTLFireability-14: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-15: EFEG true state space /EFEG

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
LeafsetExtension-PT-S32C4-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-04: CTL 0 0 1 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
LeafsetExtension-PT-S32C4-CTLFireability-06: DISJ 0 0 0 0 3 0 1 0
LeafsetExtension-PT-S32C4-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
LeafsetExtension-PT-S32C4-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
13 CTL EXCL 105/707 23/32 LeafsetExtension-PT-S32C4-CTLFireability-04 665639 m, 5760 m/sec, 3577266 t fired, .

Time elapsed: 875 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
LeafsetExtension-PT-S32C4-CTLFireability-03: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-07: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-08: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-09: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-11: CTL false CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-12: EG true state space / EG
LeafsetExtension-PT-S32C4-CTLFireability-14: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-15: EFEG true state space /EFEG

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
LeafsetExtension-PT-S32C4-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-04: CTL 0 0 1 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
LeafsetExtension-PT-S32C4-CTLFireability-06: DISJ 0 0 0 0 3 0 1 0
LeafsetExtension-PT-S32C4-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
LeafsetExtension-PT-S32C4-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
13 CTL EXCL 110/707 24/32 LeafsetExtension-PT-S32C4-CTLFireability-04 699344 m, 6741 m/sec, 3751930 t fired, .

Time elapsed: 880 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
LeafsetExtension-PT-S32C4-CTLFireability-03: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-07: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-08: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-09: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-11: CTL false CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-12: EG true state space / EG
LeafsetExtension-PT-S32C4-CTLFireability-14: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-15: EFEG true state space /EFEG

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
LeafsetExtension-PT-S32C4-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-04: CTL 0 0 1 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
LeafsetExtension-PT-S32C4-CTLFireability-06: DISJ 0 0 0 0 3 0 1 0
LeafsetExtension-PT-S32C4-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
LeafsetExtension-PT-S32C4-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
13 CTL EXCL 115/707 25/32 LeafsetExtension-PT-S32C4-CTLFireability-04 730982 m, 6327 m/sec, 3924158 t fired, .

Time elapsed: 885 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
LeafsetExtension-PT-S32C4-CTLFireability-03: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-07: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-08: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-09: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-11: CTL false CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-12: EG true state space / EG
LeafsetExtension-PT-S32C4-CTLFireability-14: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-15: EFEG true state space /EFEG

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
LeafsetExtension-PT-S32C4-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-04: CTL 0 0 1 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
LeafsetExtension-PT-S32C4-CTLFireability-06: DISJ 0 0 0 0 3 0 1 0
LeafsetExtension-PT-S32C4-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
LeafsetExtension-PT-S32C4-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
13 CTL EXCL 120/707 26/32 LeafsetExtension-PT-S32C4-CTLFireability-04 763375 m, 6478 m/sec, 4099665 t fired, .

Time elapsed: 890 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
LeafsetExtension-PT-S32C4-CTLFireability-03: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-07: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-08: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-09: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-11: CTL false CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-12: EG true state space / EG
LeafsetExtension-PT-S32C4-CTLFireability-14: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-15: EFEG true state space /EFEG

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
LeafsetExtension-PT-S32C4-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-04: CTL 0 0 1 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
LeafsetExtension-PT-S32C4-CTLFireability-06: DISJ 0 0 0 0 3 0 1 0
LeafsetExtension-PT-S32C4-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
LeafsetExtension-PT-S32C4-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
13 CTL EXCL 125/707 27/32 LeafsetExtension-PT-S32C4-CTLFireability-04 796936 m, 6712 m/sec, 4276764 t fired, .

Time elapsed: 895 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
LeafsetExtension-PT-S32C4-CTLFireability-03: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-07: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-08: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-09: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-11: CTL false CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-12: EG true state space / EG
LeafsetExtension-PT-S32C4-CTLFireability-14: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-15: EFEG true state space /EFEG

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
LeafsetExtension-PT-S32C4-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-04: CTL 0 0 1 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
LeafsetExtension-PT-S32C4-CTLFireability-06: DISJ 0 0 0 0 3 0 1 0
LeafsetExtension-PT-S32C4-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
LeafsetExtension-PT-S32C4-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
13 CTL EXCL 130/707 28/32 LeafsetExtension-PT-S32C4-CTLFireability-04 828218 m, 6256 m/sec, 4452787 t fired, .

Time elapsed: 900 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
LeafsetExtension-PT-S32C4-CTLFireability-03: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-07: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-08: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-09: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-11: CTL false CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-12: EG true state space / EG
LeafsetExtension-PT-S32C4-CTLFireability-14: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-15: EFEG true state space /EFEG

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
LeafsetExtension-PT-S32C4-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-04: CTL 0 0 1 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
LeafsetExtension-PT-S32C4-CTLFireability-06: DISJ 0 0 0 0 3 0 1 0
LeafsetExtension-PT-S32C4-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
LeafsetExtension-PT-S32C4-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
13 CTL EXCL 135/707 29/32 LeafsetExtension-PT-S32C4-CTLFireability-04 860090 m, 6374 m/sec, 4620200 t fired, .

Time elapsed: 905 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
LeafsetExtension-PT-S32C4-CTLFireability-03: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-07: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-08: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-09: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-11: CTL false CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-12: EG true state space / EG
LeafsetExtension-PT-S32C4-CTLFireability-14: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-15: EFEG true state space /EFEG

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
LeafsetExtension-PT-S32C4-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-04: CTL 0 0 1 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
LeafsetExtension-PT-S32C4-CTLFireability-06: DISJ 0 0 0 0 3 0 1 0
LeafsetExtension-PT-S32C4-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
LeafsetExtension-PT-S32C4-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
13 CTL EXCL 140/707 30/32 LeafsetExtension-PT-S32C4-CTLFireability-04 890834 m, 6148 m/sec, 4784485 t fired, .

Time elapsed: 910 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
LeafsetExtension-PT-S32C4-CTLFireability-03: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-07: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-08: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-09: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-11: CTL false CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-12: EG true state space / EG
LeafsetExtension-PT-S32C4-CTLFireability-14: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-15: EFEG true state space /EFEG

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
LeafsetExtension-PT-S32C4-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-04: CTL 0 0 1 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
LeafsetExtension-PT-S32C4-CTLFireability-06: DISJ 0 0 0 0 3 0 1 0
LeafsetExtension-PT-S32C4-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
LeafsetExtension-PT-S32C4-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
13 CTL EXCL 145/707 31/32 LeafsetExtension-PT-S32C4-CTLFireability-04 920320 m, 5897 m/sec, 4949145 t fired, .

Time elapsed: 915 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
lola: CANCELED task # 13 (type EXCL) for LeafsetExtension-PT-S32C4-CTLFireability-04 (memory limit exceeded)
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
LeafsetExtension-PT-S32C4-CTLFireability-03: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-07: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-08: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-09: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-11: CTL false CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-12: EG true state space / EG
LeafsetExtension-PT-S32C4-CTLFireability-14: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-15: EFEG true state space /EFEG

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
LeafsetExtension-PT-S32C4-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
LeafsetExtension-PT-S32C4-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
LeafsetExtension-PT-S32C4-CTLFireability-06: DISJ 0 0 0 0 3 0 1 0
LeafsetExtension-PT-S32C4-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
LeafsetExtension-PT-S32C4-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 920 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
lola: LAUNCH task # 7 (type EXCL) for 6 LeafsetExtension-PT-S32C4-CTLFireability-02
lola: time limit : 893 sec
lola: memory limit: 32 pages
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
LeafsetExtension-PT-S32C4-CTLFireability-03: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-07: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-08: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-09: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-11: CTL false CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-12: EG true state space / EG
LeafsetExtension-PT-S32C4-CTLFireability-14: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-15: EFEG true state space /EFEG

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
LeafsetExtension-PT-S32C4-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-02: CTL 0 0 1 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
LeafsetExtension-PT-S32C4-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
LeafsetExtension-PT-S32C4-CTLFireability-06: DISJ 0 0 0 0 3 0 1 0
LeafsetExtension-PT-S32C4-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
LeafsetExtension-PT-S32C4-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
7 CTL EXCL 5/893 2/32 LeafsetExtension-PT-S32C4-CTLFireability-02 41377 m, 8275 m/sec, 187092 t fired, .

Time elapsed: 925 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
LeafsetExtension-PT-S32C4-CTLFireability-03: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-07: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-08: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-09: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-11: CTL false CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-12: EG true state space / EG
LeafsetExtension-PT-S32C4-CTLFireability-14: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-15: EFEG true state space /EFEG

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
LeafsetExtension-PT-S32C4-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-02: CTL 0 0 1 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
LeafsetExtension-PT-S32C4-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
LeafsetExtension-PT-S32C4-CTLFireability-06: DISJ 0 0 0 0 3 0 1 0
LeafsetExtension-PT-S32C4-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
LeafsetExtension-PT-S32C4-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
7 CTL EXCL 10/893 3/32 LeafsetExtension-PT-S32C4-CTLFireability-02 79261 m, 7576 m/sec, 371211 t fired, .

Time elapsed: 930 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
LeafsetExtension-PT-S32C4-CTLFireability-03: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-07: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-08: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-09: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-11: CTL false CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-12: EG true state space / EG
LeafsetExtension-PT-S32C4-CTLFireability-14: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-15: EFEG true state space /EFEG

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
LeafsetExtension-PT-S32C4-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-02: CTL 0 0 1 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
LeafsetExtension-PT-S32C4-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
LeafsetExtension-PT-S32C4-CTLFireability-06: DISJ 0 0 0 0 3 0 1 0
LeafsetExtension-PT-S32C4-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
LeafsetExtension-PT-S32C4-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
7 CTL EXCL 15/893 5/32 LeafsetExtension-PT-S32C4-CTLFireability-02 120145 m, 8176 m/sec, 558060 t fired, .

Time elapsed: 935 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
LeafsetExtension-PT-S32C4-CTLFireability-03: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-07: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-08: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-09: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-11: CTL false CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-12: EG true state space / EG
LeafsetExtension-PT-S32C4-CTLFireability-14: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-15: EFEG true state space /EFEG

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
LeafsetExtension-PT-S32C4-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-02: CTL 0 0 1 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
LeafsetExtension-PT-S32C4-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
LeafsetExtension-PT-S32C4-CTLFireability-06: DISJ 0 0 0 0 3 0 1 0
LeafsetExtension-PT-S32C4-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
LeafsetExtension-PT-S32C4-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
7 CTL EXCL 20/893 6/32 LeafsetExtension-PT-S32C4-CTLFireability-02 158222 m, 7615 m/sec, 741770 t fired, .

Time elapsed: 940 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
LeafsetExtension-PT-S32C4-CTLFireability-03: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-07: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-08: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-09: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-11: CTL false CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-12: EG true state space / EG
LeafsetExtension-PT-S32C4-CTLFireability-14: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-15: EFEG true state space /EFEG

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
LeafsetExtension-PT-S32C4-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-02: CTL 0 0 1 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
LeafsetExtension-PT-S32C4-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
LeafsetExtension-PT-S32C4-CTLFireability-06: DISJ 0 0 0 0 3 0 1 0
LeafsetExtension-PT-S32C4-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
LeafsetExtension-PT-S32C4-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
7 CTL EXCL 25/893 7/32 LeafsetExtension-PT-S32C4-CTLFireability-02 198243 m, 8004 m/sec, 927521 t fired, .

Time elapsed: 945 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
LeafsetExtension-PT-S32C4-CTLFireability-03: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-07: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-08: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-09: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-11: CTL false CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-12: EG true state space / EG
LeafsetExtension-PT-S32C4-CTLFireability-14: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-15: EFEG true state space /EFEG

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
LeafsetExtension-PT-S32C4-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-02: CTL 0 0 1 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
LeafsetExtension-PT-S32C4-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
LeafsetExtension-PT-S32C4-CTLFireability-06: DISJ 0 0 0 0 3 0 1 0
LeafsetExtension-PT-S32C4-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
LeafsetExtension-PT-S32C4-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
7 CTL EXCL 30/893 9/32 LeafsetExtension-PT-S32C4-CTLFireability-02 236732 m, 7697 m/sec, 1110846 t fired, .

Time elapsed: 950 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
LeafsetExtension-PT-S32C4-CTLFireability-03: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-07: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-08: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-09: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-11: CTL false CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-12: EG true state space / EG
LeafsetExtension-PT-S32C4-CTLFireability-14: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-15: EFEG true state space /EFEG

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
LeafsetExtension-PT-S32C4-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-02: CTL 0 0 1 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
LeafsetExtension-PT-S32C4-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
LeafsetExtension-PT-S32C4-CTLFireability-06: DISJ 0 0 0 0 3 0 1 0
LeafsetExtension-PT-S32C4-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
LeafsetExtension-PT-S32C4-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
7 CTL EXCL 35/893 10/32 LeafsetExtension-PT-S32C4-CTLFireability-02 275774 m, 7808 m/sec, 1294254 t fired, .

Time elapsed: 955 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
LeafsetExtension-PT-S32C4-CTLFireability-03: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-07: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-08: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-09: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-11: CTL false CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-12: EG true state space / EG
LeafsetExtension-PT-S32C4-CTLFireability-14: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-15: EFEG true state space /EFEG

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
LeafsetExtension-PT-S32C4-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-02: CTL 0 0 1 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
LeafsetExtension-PT-S32C4-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
LeafsetExtension-PT-S32C4-CTLFireability-06: DISJ 0 0 0 0 3 0 1 0
LeafsetExtension-PT-S32C4-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
LeafsetExtension-PT-S32C4-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
7 CTL EXCL 40/893 11/32 LeafsetExtension-PT-S32C4-CTLFireability-02 314062 m, 7657 m/sec, 1474837 t fired, .

Time elapsed: 960 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
LeafsetExtension-PT-S32C4-CTLFireability-03: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-07: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-08: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-09: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-11: CTL false CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-12: EG true state space / EG
LeafsetExtension-PT-S32C4-CTLFireability-14: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-15: EFEG true state space /EFEG

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
LeafsetExtension-PT-S32C4-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-02: CTL 0 0 1 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
LeafsetExtension-PT-S32C4-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
LeafsetExtension-PT-S32C4-CTLFireability-06: DISJ 0 0 0 0 3 0 1 0
LeafsetExtension-PT-S32C4-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
LeafsetExtension-PT-S32C4-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
7 CTL EXCL 45/893 12/32 LeafsetExtension-PT-S32C4-CTLFireability-02 351843 m, 7556 m/sec, 1654351 t fired, .

Time elapsed: 965 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
LeafsetExtension-PT-S32C4-CTLFireability-03: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-07: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-08: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-09: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-11: CTL false CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-12: EG true state space / EG
LeafsetExtension-PT-S32C4-CTLFireability-14: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-15: EFEG true state space /EFEG

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
LeafsetExtension-PT-S32C4-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-02: CTL 0 0 1 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
LeafsetExtension-PT-S32C4-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
LeafsetExtension-PT-S32C4-CTLFireability-06: DISJ 0 0 0 0 3 0 1 0
LeafsetExtension-PT-S32C4-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
LeafsetExtension-PT-S32C4-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
7 CTL EXCL 50/893 14/32 LeafsetExtension-PT-S32C4-CTLFireability-02 389809 m, 7593 m/sec, 1831464 t fired, .

Time elapsed: 970 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
LeafsetExtension-PT-S32C4-CTLFireability-03: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-07: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-08: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-09: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-11: CTL false CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-12: EG true state space / EG
LeafsetExtension-PT-S32C4-CTLFireability-14: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-15: EFEG true state space /EFEG

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
LeafsetExtension-PT-S32C4-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-02: CTL 0 0 1 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
LeafsetExtension-PT-S32C4-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
LeafsetExtension-PT-S32C4-CTLFireability-06: DISJ 0 0 0 0 3 0 1 0
LeafsetExtension-PT-S32C4-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
LeafsetExtension-PT-S32C4-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
7 CTL EXCL 55/893 15/32 LeafsetExtension-PT-S32C4-CTLFireability-02 435120 m, 9062 m/sec, 2007271 t fired, .

Time elapsed: 975 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
LeafsetExtension-PT-S32C4-CTLFireability-03: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-07: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-08: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-09: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-11: CTL false CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-12: EG true state space / EG
LeafsetExtension-PT-S32C4-CTLFireability-14: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-15: EFEG true state space /EFEG

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
LeafsetExtension-PT-S32C4-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-02: CTL 0 0 1 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
LeafsetExtension-PT-S32C4-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
LeafsetExtension-PT-S32C4-CTLFireability-06: DISJ 0 0 0 0 3 0 1 0
LeafsetExtension-PT-S32C4-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
LeafsetExtension-PT-S32C4-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
7 CTL EXCL 60/893 16/32 LeafsetExtension-PT-S32C4-CTLFireability-02 466945 m, 6365 m/sec, 2181985 t fired, .

Time elapsed: 980 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
LeafsetExtension-PT-S32C4-CTLFireability-03: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-07: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-08: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-09: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-11: CTL false CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-12: EG true state space / EG
LeafsetExtension-PT-S32C4-CTLFireability-14: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-15: EFEG true state space /EFEG

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
LeafsetExtension-PT-S32C4-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-02: CTL 0 0 1 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
LeafsetExtension-PT-S32C4-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
LeafsetExtension-PT-S32C4-CTLFireability-06: DISJ 0 0 0 0 3 0 1 0
LeafsetExtension-PT-S32C4-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
LeafsetExtension-PT-S32C4-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
7 CTL EXCL 65/893 17/32 LeafsetExtension-PT-S32C4-CTLFireability-02 496175 m, 5846 m/sec, 2355214 t fired, .

Time elapsed: 985 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
LeafsetExtension-PT-S32C4-CTLFireability-03: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-07: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-08: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-09: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-11: CTL false CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-12: EG true state space / EG
LeafsetExtension-PT-S32C4-CTLFireability-14: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-15: EFEG true state space /EFEG

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
LeafsetExtension-PT-S32C4-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-02: CTL 0 0 1 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
LeafsetExtension-PT-S32C4-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
LeafsetExtension-PT-S32C4-CTLFireability-06: DISJ 0 0 0 0 3 0 1 0
LeafsetExtension-PT-S32C4-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
LeafsetExtension-PT-S32C4-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
7 CTL EXCL 70/893 18/32 LeafsetExtension-PT-S32C4-CTLFireability-02 533065 m, 7378 m/sec, 2527284 t fired, .

Time elapsed: 990 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
LeafsetExtension-PT-S32C4-CTLFireability-03: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-07: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-08: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-09: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-11: CTL false CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-12: EG true state space / EG
LeafsetExtension-PT-S32C4-CTLFireability-14: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-15: EFEG true state space /EFEG

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
LeafsetExtension-PT-S32C4-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-02: CTL 0 0 1 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
LeafsetExtension-PT-S32C4-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
LeafsetExtension-PT-S32C4-CTLFireability-06: DISJ 0 0 0 0 3 0 1 0
LeafsetExtension-PT-S32C4-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
LeafsetExtension-PT-S32C4-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
7 CTL EXCL 75/893 20/32 LeafsetExtension-PT-S32C4-CTLFireability-02 568501 m, 7087 m/sec, 2698490 t fired, .

Time elapsed: 995 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
LeafsetExtension-PT-S32C4-CTLFireability-03: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-07: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-08: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-09: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-11: CTL false CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-12: EG true state space / EG
LeafsetExtension-PT-S32C4-CTLFireability-14: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-15: EFEG true state space /EFEG

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
LeafsetExtension-PT-S32C4-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-02: CTL 0 0 1 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
LeafsetExtension-PT-S32C4-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
LeafsetExtension-PT-S32C4-CTLFireability-06: DISJ 0 0 0 0 3 0 1 0
LeafsetExtension-PT-S32C4-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
LeafsetExtension-PT-S32C4-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
7 CTL EXCL 80/893 21/32 LeafsetExtension-PT-S32C4-CTLFireability-02 603998 m, 7099 m/sec, 2866858 t fired, .

Time elapsed: 1000 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
LeafsetExtension-PT-S32C4-CTLFireability-03: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-07: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-08: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-09: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-11: CTL false CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-12: EG true state space / EG
LeafsetExtension-PT-S32C4-CTLFireability-14: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-15: EFEG true state space /EFEG

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
LeafsetExtension-PT-S32C4-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-02: CTL 0 0 1 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
LeafsetExtension-PT-S32C4-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
LeafsetExtension-PT-S32C4-CTLFireability-06: DISJ 0 0 0 0 3 0 1 0
LeafsetExtension-PT-S32C4-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
LeafsetExtension-PT-S32C4-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
7 CTL EXCL 85/893 22/32 LeafsetExtension-PT-S32C4-CTLFireability-02 640629 m, 7326 m/sec, 3034663 t fired, .

Time elapsed: 1005 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
LeafsetExtension-PT-S32C4-CTLFireability-03: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-07: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-08: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-09: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-11: CTL false CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-12: EG true state space / EG
LeafsetExtension-PT-S32C4-CTLFireability-14: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-15: EFEG true state space /EFEG

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
LeafsetExtension-PT-S32C4-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-02: CTL 0 0 1 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
LeafsetExtension-PT-S32C4-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
LeafsetExtension-PT-S32C4-CTLFireability-06: DISJ 0 0 0 0 3 0 1 0
LeafsetExtension-PT-S32C4-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
LeafsetExtension-PT-S32C4-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
7 CTL EXCL 90/893 23/32 LeafsetExtension-PT-S32C4-CTLFireability-02 675808 m, 7035 m/sec, 3206405 t fired, .

Time elapsed: 1010 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
LeafsetExtension-PT-S32C4-CTLFireability-03: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-07: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-08: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-09: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-11: CTL false CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-12: EG true state space / EG
LeafsetExtension-PT-S32C4-CTLFireability-14: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-15: EFEG true state space /EFEG

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
LeafsetExtension-PT-S32C4-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-02: CTL 0 0 1 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
LeafsetExtension-PT-S32C4-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
LeafsetExtension-PT-S32C4-CTLFireability-06: DISJ 0 0 0 0 3 0 1 0
LeafsetExtension-PT-S32C4-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
LeafsetExtension-PT-S32C4-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
7 CTL EXCL 95/893 25/32 LeafsetExtension-PT-S32C4-CTLFireability-02 715662 m, 7970 m/sec, 3388148 t fired, .

Time elapsed: 1015 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
LeafsetExtension-PT-S32C4-CTLFireability-03: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-07: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-08: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-09: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-11: CTL false CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-12: EG true state space / EG
LeafsetExtension-PT-S32C4-CTLFireability-14: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-15: EFEG true state space /EFEG

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
LeafsetExtension-PT-S32C4-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-02: CTL 0 0 1 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
LeafsetExtension-PT-S32C4-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
LeafsetExtension-PT-S32C4-CTLFireability-06: DISJ 0 0 0 0 3 0 1 0
LeafsetExtension-PT-S32C4-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
LeafsetExtension-PT-S32C4-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
7 CTL EXCL 100/893 26/32 LeafsetExtension-PT-S32C4-CTLFireability-02 752772 m, 7422 m/sec, 3569269 t fired, .

Time elapsed: 1020 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
LeafsetExtension-PT-S32C4-CTLFireability-03: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-07: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-08: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-09: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-11: CTL false CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-12: EG true state space / EG
LeafsetExtension-PT-S32C4-CTLFireability-14: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-15: EFEG true state space /EFEG

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
LeafsetExtension-PT-S32C4-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-02: CTL 0 0 1 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
LeafsetExtension-PT-S32C4-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
LeafsetExtension-PT-S32C4-CTLFireability-06: DISJ 0 0 0 0 3 0 1 0
LeafsetExtension-PT-S32C4-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
LeafsetExtension-PT-S32C4-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
7 CTL EXCL 105/893 27/32 LeafsetExtension-PT-S32C4-CTLFireability-02 793689 m, 8183 m/sec, 3756194 t fired, .

Time elapsed: 1025 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
LeafsetExtension-PT-S32C4-CTLFireability-03: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-07: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-08: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-09: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-11: CTL false CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-12: EG true state space / EG
LeafsetExtension-PT-S32C4-CTLFireability-14: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-15: EFEG true state space /EFEG

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
LeafsetExtension-PT-S32C4-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-02: CTL 0 0 1 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
LeafsetExtension-PT-S32C4-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
LeafsetExtension-PT-S32C4-CTLFireability-06: DISJ 0 0 0 0 3 0 1 0
LeafsetExtension-PT-S32C4-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
LeafsetExtension-PT-S32C4-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
7 CTL EXCL 110/893 28/32 LeafsetExtension-PT-S32C4-CTLFireability-02 831232 m, 7508 m/sec, 3940847 t fired, .

Time elapsed: 1030 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
LeafsetExtension-PT-S32C4-CTLFireability-03: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-07: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-08: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-09: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-11: CTL false CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-12: EG true state space / EG
LeafsetExtension-PT-S32C4-CTLFireability-14: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-15: EFEG true state space /EFEG

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
LeafsetExtension-PT-S32C4-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-02: CTL 0 0 1 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
LeafsetExtension-PT-S32C4-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
LeafsetExtension-PT-S32C4-CTLFireability-06: DISJ 0 0 0 0 3 0 1 0
LeafsetExtension-PT-S32C4-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
LeafsetExtension-PT-S32C4-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
7 CTL EXCL 115/893 30/32 LeafsetExtension-PT-S32C4-CTLFireability-02 869672 m, 7688 m/sec, 4115757 t fired, .

Time elapsed: 1035 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
LeafsetExtension-PT-S32C4-CTLFireability-03: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-07: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-08: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-09: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-11: CTL false CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-12: EG true state space / EG
LeafsetExtension-PT-S32C4-CTLFireability-14: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-15: EFEG true state space /EFEG

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
LeafsetExtension-PT-S32C4-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-02: CTL 0 0 1 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
LeafsetExtension-PT-S32C4-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
LeafsetExtension-PT-S32C4-CTLFireability-06: DISJ 0 0 0 0 3 0 1 0
LeafsetExtension-PT-S32C4-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
LeafsetExtension-PT-S32C4-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
7 CTL EXCL 120/893 31/32 LeafsetExtension-PT-S32C4-CTLFireability-02 905370 m, 7139 m/sec, 4287641 t fired, .

Time elapsed: 1040 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
LeafsetExtension-PT-S32C4-CTLFireability-03: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-07: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-08: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-09: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-11: CTL false CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-12: EG true state space / EG
LeafsetExtension-PT-S32C4-CTLFireability-14: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-15: EFEG true state space /EFEG

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
LeafsetExtension-PT-S32C4-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-02: CTL 0 0 1 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
LeafsetExtension-PT-S32C4-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
LeafsetExtension-PT-S32C4-CTLFireability-06: DISJ 0 0 0 0 3 0 1 0
LeafsetExtension-PT-S32C4-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
LeafsetExtension-PT-S32C4-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
7 CTL EXCL 125/893 32/32 LeafsetExtension-PT-S32C4-CTLFireability-02 942394 m, 7404 m/sec, 4456514 t fired, .

Time elapsed: 1045 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
lola: CANCELED task # 7 (type EXCL) for LeafsetExtension-PT-S32C4-CTLFireability-02 (memory limit exceeded)
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
LeafsetExtension-PT-S32C4-CTLFireability-03: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-07: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-08: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-09: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-11: CTL false CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-12: EG true state space / EG
LeafsetExtension-PT-S32C4-CTLFireability-14: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-15: EFEG true state space /EFEG

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
LeafsetExtension-PT-S32C4-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
LeafsetExtension-PT-S32C4-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
LeafsetExtension-PT-S32C4-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
LeafsetExtension-PT-S32C4-CTLFireability-06: DISJ 0 0 0 0 3 0 1 0
LeafsetExtension-PT-S32C4-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
LeafsetExtension-PT-S32C4-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 1050 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
lola: LAUNCH task # 4 (type EXCL) for 3 LeafsetExtension-PT-S32C4-CTLFireability-01
lola: time limit : 1275 sec
lola: memory limit: 32 pages
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
LeafsetExtension-PT-S32C4-CTLFireability-03: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-07: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-08: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-09: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-11: CTL false CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-12: EG true state space / EG
LeafsetExtension-PT-S32C4-CTLFireability-14: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-15: EFEG true state space /EFEG

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
LeafsetExtension-PT-S32C4-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-01: CTL 0 0 1 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
LeafsetExtension-PT-S32C4-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
LeafsetExtension-PT-S32C4-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
LeafsetExtension-PT-S32C4-CTLFireability-06: DISJ 0 0 0 0 3 0 1 0
LeafsetExtension-PT-S32C4-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
LeafsetExtension-PT-S32C4-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
4 CTL EXCL 5/1275 1/32 LeafsetExtension-PT-S32C4-CTLFireability-01 27480 m, 5496 m/sec, 179267 t fired, .

Time elapsed: 1055 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
LeafsetExtension-PT-S32C4-CTLFireability-03: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-07: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-08: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-09: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-11: CTL false CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-12: EG true state space / EG
LeafsetExtension-PT-S32C4-CTLFireability-14: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-15: EFEG true state space /EFEG

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
LeafsetExtension-PT-S32C4-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-01: CTL 0 0 1 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
LeafsetExtension-PT-S32C4-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
LeafsetExtension-PT-S32C4-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
LeafsetExtension-PT-S32C4-CTLFireability-06: DISJ 0 0 0 0 3 0 1 0
LeafsetExtension-PT-S32C4-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
LeafsetExtension-PT-S32C4-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
4 CTL EXCL 10/1275 2/32 LeafsetExtension-PT-S32C4-CTLFireability-01 54195 m, 5343 m/sec, 355670 t fired, .

Time elapsed: 1060 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
LeafsetExtension-PT-S32C4-CTLFireability-03: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-07: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-08: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-09: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-11: CTL false CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-12: EG true state space / EG
LeafsetExtension-PT-S32C4-CTLFireability-14: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-15: EFEG true state space /EFEG

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
LeafsetExtension-PT-S32C4-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-01: CTL 0 0 1 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
LeafsetExtension-PT-S32C4-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
LeafsetExtension-PT-S32C4-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
LeafsetExtension-PT-S32C4-CTLFireability-06: DISJ 0 0 0 0 3 0 1 0
LeafsetExtension-PT-S32C4-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
LeafsetExtension-PT-S32C4-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
4 CTL EXCL 15/1275 3/32 LeafsetExtension-PT-S32C4-CTLFireability-01 79453 m, 5051 m/sec, 531666 t fired, .

Time elapsed: 1065 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
LeafsetExtension-PT-S32C4-CTLFireability-03: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-07: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-08: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-09: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-11: CTL false CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-12: EG true state space / EG
LeafsetExtension-PT-S32C4-CTLFireability-14: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-15: EFEG true state space /EFEG

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
LeafsetExtension-PT-S32C4-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-01: CTL 0 0 1 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
LeafsetExtension-PT-S32C4-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
LeafsetExtension-PT-S32C4-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
LeafsetExtension-PT-S32C4-CTLFireability-06: DISJ 0 0 0 0 3 0 1 0
LeafsetExtension-PT-S32C4-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
LeafsetExtension-PT-S32C4-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
4 CTL EXCL 20/1275 4/32 LeafsetExtension-PT-S32C4-CTLFireability-01 106496 m, 5408 m/sec, 710402 t fired, .

Time elapsed: 1070 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
LeafsetExtension-PT-S32C4-CTLFireability-03: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-07: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-08: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-09: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-11: CTL false CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-12: EG true state space / EG
LeafsetExtension-PT-S32C4-CTLFireability-14: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-15: EFEG true state space /EFEG

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
LeafsetExtension-PT-S32C4-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-01: CTL 0 0 1 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
LeafsetExtension-PT-S32C4-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
LeafsetExtension-PT-S32C4-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
LeafsetExtension-PT-S32C4-CTLFireability-06: DISJ 0 0 0 0 3 0 1 0
LeafsetExtension-PT-S32C4-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
LeafsetExtension-PT-S32C4-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
4 CTL EXCL 25/1275 5/32 LeafsetExtension-PT-S32C4-CTLFireability-01 133401 m, 5381 m/sec, 887402 t fired, .

Time elapsed: 1075 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
LeafsetExtension-PT-S32C4-CTLFireability-03: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-07: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-08: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-09: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-11: CTL false CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-12: EG true state space / EG
LeafsetExtension-PT-S32C4-CTLFireability-14: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-15: EFEG true state space /EFEG

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
LeafsetExtension-PT-S32C4-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-01: CTL 0 0 1 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
LeafsetExtension-PT-S32C4-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
LeafsetExtension-PT-S32C4-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
LeafsetExtension-PT-S32C4-CTLFireability-06: DISJ 0 0 0 0 3 0 1 0
LeafsetExtension-PT-S32C4-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
LeafsetExtension-PT-S32C4-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
4 CTL EXCL 30/1275 6/32 LeafsetExtension-PT-S32C4-CTLFireability-01 158776 m, 5075 m/sec, 1063315 t fired, .

Time elapsed: 1080 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
LeafsetExtension-PT-S32C4-CTLFireability-03: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-07: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-08: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-09: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-11: CTL false CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-12: EG true state space / EG
LeafsetExtension-PT-S32C4-CTLFireability-14: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-15: EFEG true state space /EFEG

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
LeafsetExtension-PT-S32C4-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-01: CTL 0 0 1 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
LeafsetExtension-PT-S32C4-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
LeafsetExtension-PT-S32C4-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
LeafsetExtension-PT-S32C4-CTLFireability-06: DISJ 0 0 0 0 3 0 1 0
LeafsetExtension-PT-S32C4-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
LeafsetExtension-PT-S32C4-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
4 CTL EXCL 35/1275 7/32 LeafsetExtension-PT-S32C4-CTLFireability-01 185393 m, 5323 m/sec, 1240602 t fired, .

Time elapsed: 1085 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
LeafsetExtension-PT-S32C4-CTLFireability-03: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-07: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-08: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-09: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-11: CTL false CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-12: EG true state space / EG
LeafsetExtension-PT-S32C4-CTLFireability-14: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-15: EFEG true state space /EFEG

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
LeafsetExtension-PT-S32C4-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-01: CTL 0 0 1 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
LeafsetExtension-PT-S32C4-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
LeafsetExtension-PT-S32C4-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
LeafsetExtension-PT-S32C4-CTLFireability-06: DISJ 0 0 0 0 3 0 1 0
LeafsetExtension-PT-S32C4-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
LeafsetExtension-PT-S32C4-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
4 CTL EXCL 40/1275 8/32 LeafsetExtension-PT-S32C4-CTLFireability-01 212158 m, 5353 m/sec, 1416544 t fired, .

Time elapsed: 1090 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
LeafsetExtension-PT-S32C4-CTLFireability-03: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-07: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-08: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-09: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-11: CTL false CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-12: EG true state space / EG
LeafsetExtension-PT-S32C4-CTLFireability-14: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-15: EFEG true state space /EFEG

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
LeafsetExtension-PT-S32C4-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-01: CTL 0 0 1 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
LeafsetExtension-PT-S32C4-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
LeafsetExtension-PT-S32C4-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
LeafsetExtension-PT-S32C4-CTLFireability-06: DISJ 0 0 0 0 3 0 1 0
LeafsetExtension-PT-S32C4-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
LeafsetExtension-PT-S32C4-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
4 CTL EXCL 45/1275 9/32 LeafsetExtension-PT-S32C4-CTLFireability-01 237571 m, 5082 m/sec, 1591179 t fired, .

Time elapsed: 1095 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
LeafsetExtension-PT-S32C4-CTLFireability-03: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-07: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-08: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-09: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-11: CTL false CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-12: EG true state space / EG
LeafsetExtension-PT-S32C4-CTLFireability-14: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-15: EFEG true state space /EFEG

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
LeafsetExtension-PT-S32C4-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-01: CTL 0 0 1 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
LeafsetExtension-PT-S32C4-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
LeafsetExtension-PT-S32C4-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
LeafsetExtension-PT-S32C4-CTLFireability-06: DISJ 0 0 0 0 3 0 1 0
LeafsetExtension-PT-S32C4-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
LeafsetExtension-PT-S32C4-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
4 CTL EXCL 50/1275 10/32 LeafsetExtension-PT-S32C4-CTLFireability-01 263461 m, 5178 m/sec, 1766161 t fired, .

Time elapsed: 1100 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
LeafsetExtension-PT-S32C4-CTLFireability-03: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-07: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-08: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-09: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-11: CTL false CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-12: EG true state space / EG
LeafsetExtension-PT-S32C4-CTLFireability-14: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-15: EFEG true state space /EFEG

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
LeafsetExtension-PT-S32C4-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-01: CTL 0 0 1 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
LeafsetExtension-PT-S32C4-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
LeafsetExtension-PT-S32C4-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
LeafsetExtension-PT-S32C4-CTLFireability-06: DISJ 0 0 0 0 3 0 1 0
LeafsetExtension-PT-S32C4-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
LeafsetExtension-PT-S32C4-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
4 CTL EXCL 55/1275 10/32 LeafsetExtension-PT-S32C4-CTLFireability-01 290099 m, 5327 m/sec, 1940495 t fired, .

Time elapsed: 1105 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
LeafsetExtension-PT-S32C4-CTLFireability-03: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-07: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-08: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-09: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-11: CTL false CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-12: EG true state space / EG
LeafsetExtension-PT-S32C4-CTLFireability-14: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-15: EFEG true state space /EFEG

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
LeafsetExtension-PT-S32C4-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-01: CTL 0 0 1 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
LeafsetExtension-PT-S32C4-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
LeafsetExtension-PT-S32C4-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
LeafsetExtension-PT-S32C4-CTLFireability-06: DISJ 0 0 0 0 3 0 1 0
LeafsetExtension-PT-S32C4-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
LeafsetExtension-PT-S32C4-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
4 CTL EXCL 60/1275 11/32 LeafsetExtension-PT-S32C4-CTLFireability-01 315357 m, 5051 m/sec, 2112963 t fired, .

Time elapsed: 1110 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
LeafsetExtension-PT-S32C4-CTLFireability-03: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-07: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-08: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-09: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-11: CTL false CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-12: EG true state space / EG
LeafsetExtension-PT-S32C4-CTLFireability-14: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-15: EFEG true state space /EFEG

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
LeafsetExtension-PT-S32C4-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-01: CTL 0 0 1 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
LeafsetExtension-PT-S32C4-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
LeafsetExtension-PT-S32C4-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
LeafsetExtension-PT-S32C4-CTLFireability-06: DISJ 0 0 0 0 3 0 1 0
LeafsetExtension-PT-S32C4-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
LeafsetExtension-PT-S32C4-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
4 CTL EXCL 65/1275 12/32 LeafsetExtension-PT-S32C4-CTLFireability-01 340527 m, 5034 m/sec, 2284963 t fired, .

Time elapsed: 1115 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
LeafsetExtension-PT-S32C4-CTLFireability-03: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-07: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-08: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-09: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-11: CTL false CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-12: EG true state space / EG
LeafsetExtension-PT-S32C4-CTLFireability-14: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-15: EFEG true state space /EFEG

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
LeafsetExtension-PT-S32C4-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-01: CTL 0 0 1 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
LeafsetExtension-PT-S32C4-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
LeafsetExtension-PT-S32C4-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
LeafsetExtension-PT-S32C4-CTLFireability-06: DISJ 0 0 0 0 3 0 1 0
LeafsetExtension-PT-S32C4-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
LeafsetExtension-PT-S32C4-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
4 CTL EXCL 70/1275 13/32 LeafsetExtension-PT-S32C4-CTLFireability-01 366527 m, 5200 m/sec, 2455825 t fired, .

Time elapsed: 1120 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
LeafsetExtension-PT-S32C4-CTLFireability-03: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-07: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-08: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-09: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-11: CTL false CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-12: EG true state space / EG
LeafsetExtension-PT-S32C4-CTLFireability-14: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-15: EFEG true state space /EFEG

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
LeafsetExtension-PT-S32C4-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-01: CTL 0 0 1 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
LeafsetExtension-PT-S32C4-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
LeafsetExtension-PT-S32C4-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
LeafsetExtension-PT-S32C4-CTLFireability-06: DISJ 0 0 0 0 3 0 1 0
LeafsetExtension-PT-S32C4-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
LeafsetExtension-PT-S32C4-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
4 CTL EXCL 75/1275 14/32 LeafsetExtension-PT-S32C4-CTLFireability-01 391880 m, 5070 m/sec, 2624601 t fired, .

Time elapsed: 1125 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
LeafsetExtension-PT-S32C4-CTLFireability-03: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-07: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-08: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-09: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-11: CTL false CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-12: EG true state space / EG
LeafsetExtension-PT-S32C4-CTLFireability-14: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-15: EFEG true state space /EFEG

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
LeafsetExtension-PT-S32C4-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-01: CTL 0 0 1 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
LeafsetExtension-PT-S32C4-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
LeafsetExtension-PT-S32C4-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
LeafsetExtension-PT-S32C4-CTLFireability-06: DISJ 0 0 0 0 3 0 1 0
LeafsetExtension-PT-S32C4-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
LeafsetExtension-PT-S32C4-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
4 CTL EXCL 80/1275 14/32 LeafsetExtension-PT-S32C4-CTLFireability-01 415792 m, 4782 m/sec, 2793087 t fired, .

Time elapsed: 1130 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
LeafsetExtension-PT-S32C4-CTLFireability-03: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-07: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-08: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-09: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-11: CTL false CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-12: EG true state space / EG
LeafsetExtension-PT-S32C4-CTLFireability-14: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-15: EFEG true state space /EFEG

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
LeafsetExtension-PT-S32C4-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-01: CTL 0 0 1 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
LeafsetExtension-PT-S32C4-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
LeafsetExtension-PT-S32C4-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
LeafsetExtension-PT-S32C4-CTLFireability-06: DISJ 0 0 0 0 3 0 1 0
LeafsetExtension-PT-S32C4-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
LeafsetExtension-PT-S32C4-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
4 CTL EXCL 85/1275 15/32 LeafsetExtension-PT-S32C4-CTLFireability-01 441544 m, 5150 m/sec, 2961690 t fired, .

Time elapsed: 1135 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
LeafsetExtension-PT-S32C4-CTLFireability-03: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-07: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-08: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-09: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-11: CTL false CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-12: EG true state space / EG
LeafsetExtension-PT-S32C4-CTLFireability-14: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-15: EFEG true state space /EFEG

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
LeafsetExtension-PT-S32C4-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-01: CTL 0 0 1 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
LeafsetExtension-PT-S32C4-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
LeafsetExtension-PT-S32C4-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
LeafsetExtension-PT-S32C4-CTLFireability-06: DISJ 0 0 0 0 3 0 1 0
LeafsetExtension-PT-S32C4-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
LeafsetExtension-PT-S32C4-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
4 CTL EXCL 90/1275 16/32 LeafsetExtension-PT-S32C4-CTLFireability-01 466718 m, 5034 m/sec, 3127898 t fired, .

Time elapsed: 1140 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
LeafsetExtension-PT-S32C4-CTLFireability-03: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-07: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-08: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-09: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-11: CTL false CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-12: EG true state space / EG
LeafsetExtension-PT-S32C4-CTLFireability-14: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-15: EFEG true state space /EFEG

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
LeafsetExtension-PT-S32C4-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-01: CTL 0 0 1 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
LeafsetExtension-PT-S32C4-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
LeafsetExtension-PT-S32C4-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
LeafsetExtension-PT-S32C4-CTLFireability-06: DISJ 0 0 0 0 3 0 1 0
LeafsetExtension-PT-S32C4-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
LeafsetExtension-PT-S32C4-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
4 CTL EXCL 95/1275 17/32 LeafsetExtension-PT-S32C4-CTLFireability-01 490675 m, 4791 m/sec, 3293868 t fired, .

Time elapsed: 1145 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
LeafsetExtension-PT-S32C4-CTLFireability-03: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-07: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-08: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-09: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-11: CTL false CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-12: EG true state space / EG
LeafsetExtension-PT-S32C4-CTLFireability-14: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-15: EFEG true state space /EFEG

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
LeafsetExtension-PT-S32C4-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-01: CTL 0 0 1 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
LeafsetExtension-PT-S32C4-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
LeafsetExtension-PT-S32C4-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
LeafsetExtension-PT-S32C4-CTLFireability-06: DISJ 0 0 0 0 3 0 1 0
LeafsetExtension-PT-S32C4-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
LeafsetExtension-PT-S32C4-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
4 CTL EXCL 100/1275 18/32 LeafsetExtension-PT-S32C4-CTLFireability-01 515517 m, 4968 m/sec, 3459870 t fired, .

Time elapsed: 1150 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
LeafsetExtension-PT-S32C4-CTLFireability-03: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-07: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-08: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-09: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-11: CTL false CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-12: EG true state space / EG
LeafsetExtension-PT-S32C4-CTLFireability-14: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-15: EFEG true state space /EFEG

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
LeafsetExtension-PT-S32C4-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-01: CTL 0 0 1 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
LeafsetExtension-PT-S32C4-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
LeafsetExtension-PT-S32C4-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
LeafsetExtension-PT-S32C4-CTLFireability-06: DISJ 0 0 0 0 3 0 1 0
LeafsetExtension-PT-S32C4-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
LeafsetExtension-PT-S32C4-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
4 CTL EXCL 105/1275 19/32 LeafsetExtension-PT-S32C4-CTLFireability-01 540741 m, 5044 m/sec, 3624440 t fired, .

Time elapsed: 1155 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
LeafsetExtension-PT-S32C4-CTLFireability-03: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-07: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-08: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-09: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-11: CTL false CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-12: EG true state space / EG
LeafsetExtension-PT-S32C4-CTLFireability-14: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-15: EFEG true state space /EFEG

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
LeafsetExtension-PT-S32C4-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-01: CTL 0 0 1 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
LeafsetExtension-PT-S32C4-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
LeafsetExtension-PT-S32C4-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
LeafsetExtension-PT-S32C4-CTLFireability-06: DISJ 0 0 0 0 3 0 1 0
LeafsetExtension-PT-S32C4-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
LeafsetExtension-PT-S32C4-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
4 CTL EXCL 110/1275 19/32 LeafsetExtension-PT-S32C4-CTLFireability-01 564786 m, 4809 m/sec, 3788500 t fired, .

Time elapsed: 1160 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
LeafsetExtension-PT-S32C4-CTLFireability-03: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-07: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-08: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-09: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-11: CTL false CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-12: EG true state space / EG
LeafsetExtension-PT-S32C4-CTLFireability-14: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-15: EFEG true state space /EFEG

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
LeafsetExtension-PT-S32C4-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-01: CTL 0 0 1 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
LeafsetExtension-PT-S32C4-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
LeafsetExtension-PT-S32C4-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
LeafsetExtension-PT-S32C4-CTLFireability-06: DISJ 0 0 0 0 3 0 1 0
LeafsetExtension-PT-S32C4-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
LeafsetExtension-PT-S32C4-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
4 CTL EXCL 115/1275 20/32 LeafsetExtension-PT-S32C4-CTLFireability-01 595689 m, 6180 m/sec, 3951581 t fired, .

Time elapsed: 1165 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
LeafsetExtension-PT-S32C4-CTLFireability-03: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-07: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-08: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-09: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-11: CTL false CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-12: EG true state space / EG
LeafsetExtension-PT-S32C4-CTLFireability-14: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-15: EFEG true state space /EFEG

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
LeafsetExtension-PT-S32C4-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-01: CTL 0 0 1 0 1 0 0 0
LeafsetExtension-PT-S32C4-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
LeafsetExtension-PT-S32C4-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
LeafsetExtension-PT-S32C4-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
LeafsetExtension-PT-S32C4-CTLFireability-06: DISJ 0 0 0 0 3 0 1 0
LeafsetExtension-PT-S32C4-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
LeafsetExtension-PT-S32C4-CTLFireability-13: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
4 CTL EXCL 120/1275 22/32 LeafsetExtension-PT-S32C4-CTLFireability-01 645432 m, 9948 m/sec, 4114255 t fired, .

Time elapsed: 1170 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
lola: FINISHED task # 4 (type EXCL) for LeafsetExtension-PT-S32C4-CTLFireability-01
lola: result : true
lola: markings : 664010
lola: fired transitions : 4181049
lola: time used : 122.000000
lola: memory pages used : 23
lola: LAUNCH task # 1 (type EXCL) for 0 LeafsetExtension-PT-S32C4-CTLFireability-00
lola: time limit : 2428 sec
lola: memory limit: 32 pages
lola: FINISHED task # 1 (type EXCL) for LeafsetExtension-PT-S32C4-CTLFireability-00
lola: result : false
lola: markings : 5067
lola: fired transitions : 5469
lola: time used : 0.000000
lola: memory pages used : 1
lola: Portfolio finished: no open tasks 16

FINAL RESULTS
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
LeafsetExtension-PT-S32C4-CTLFireability-00: CTL false CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-01: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-02: CTL unknown AGGR
LeafsetExtension-PT-S32C4-CTLFireability-03: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-04: CTL unknown AGGR
LeafsetExtension-PT-S32C4-CTLFireability-05: CTL unknown AGGR
LeafsetExtension-PT-S32C4-CTLFireability-06: DISJ unknown DISJ
LeafsetExtension-PT-S32C4-CTLFireability-07: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-08: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-09: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-10: CTL unknown AGGR
LeafsetExtension-PT-S32C4-CTLFireability-11: CTL false CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-12: EG true state space / EG
LeafsetExtension-PT-S32C4-CTLFireability-13: CTL unknown AGGR
LeafsetExtension-PT-S32C4-CTLFireability-14: CTL true CTL model checker
LeafsetExtension-PT-S32C4-CTLFireability-15: EFEG true state space /EFEG


Time elapsed: 1172 secs. Pages in use: 32

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="LeafsetExtension-PT-S32C4"
export BK_EXAMINATION="CTLFireability"
export BK_TOOL="lola"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-4028"
echo " Executing tool lola"
echo " Input is LeafsetExtension-PT-S32C4, examination is CTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r289-tall-162124152600538"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/LeafsetExtension-PT-S32C4.tgz
mv LeafsetExtension-PT-S32C4 execution
cd execution
if [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "UpperBounds" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] || [ "CTLFireability" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property CTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "CTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' CTLFireability.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] ; then
echo "FORMULA_NAME CTLFireability"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;