MCC'2021- Execution of r289-tall-162124152600530

About the Execution of LoLA for LeafsetExtension-PT-S32C3

Execution Summary
Max Memory Used (MB)	Time wait (ms)	CPU Usage (ms)	I/O Wait (ms)	Computed Result	Execution Status
6704.955	906931.00	925564.00	2022.10	?TF?FT?T?FFT??F?	normal

Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/data/fkordon/mcc2021-input.r289-tall-
Waiting for the VM to be ready (probing ssh)
............................................
======================
Generated by BenchKit 2-4028
Executing tool lola
Input is LeafsetExtension-PT-S32C3,
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r289-tall-162124152600
============================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 8.9M
-rw-r--r-- 1 mcc users 52K May 15
-rw-r--r-- 1 mcc users 191K May 15
-rw-r--r-- 1 mcc users 42K May 15
-rw-r--r-- 1 mcc users 140K May 15
-rw-r--r-- 1 mcc users 5.5K May 12
-rw-r--r-- 1 mcc users 25K May 12
-rw-r--r-- 1 mcc users 4.2K May 12
-rw-r--r-- 1 mcc users 19K May 12
-rw-r--r-- 1 mcc users 1 May 12
-rw-r--r-- 1 mcc users 4.7K May 11
-rw-r--r-- 1 mcc users 18K May 11
-rw-r--r-- 1 mcc users 4.6K May 11
-rw-r--r-- 1 mcc users 17K May 11
-rw-r--r-- 1 mcc users 1.9K May 12
-rw-r--r-- 1 mcc users 3.9K May 12
-rw-r--r-- 1 mcc users 6 May 12
-rw-r--r-- 1 mcc users 6 May 12
-rw-r--r-- 1 mcc users 6 May 12
-rw-r--r-- 1 mcc users 8.4M May 12

--------------------
content from stdout:

=== Data for post analysis generated

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the
FORMULA_NAME LeafsetExtension-PT-S32C3-CTLFi
FORMULA_NAME LeafsetExtension-PT-S32C3-CTLFi
FORMULA_NAME LeafsetExtension-PT-S32C3-CTLFi
FORMULA_NAME LeafsetExtension-PT-S32C3-CTLFi
FORMULA_NAME LeafsetExtension-PT-S32C3-CTLFi
FORMULA_NAME LeafsetExtension-PT-S32C3-CTLFi
FORMULA_NAME LeafsetExtension-PT-S32C3-CTLFi
FORMULA_NAME LeafsetExtension-PT-S32C3-CTLFi
FORMULA_NAME LeafsetExtension-PT-S32C3-CTLFi
FORMULA_NAME LeafsetExtension-PT-S32C3-CTLFi
FORMULA_NAME LeafsetExtension-PT-S32C3-CTLFi
FORMULA_NAME LeafsetExtension-PT-S32C3-CTLFi
FORMULA_NAME LeafsetExtension-PT-S32C3-CTLFi
FORMULA_NAME LeafsetExtension-PT-S32C3-CTLFi
FORMULA_NAME LeafsetExtension-PT-S32C3-CTLFi
FORMULA_NAME LeafsetExtension-PT-S32C3-CTLFi

=== Now, execution of the tool begins

BK_START 1621288801165

starting LoLA
BK_INPUT LeafsetExtension-PT-S32C3
BK_EXAMINATION: CTLFireability
bin directory: /home/mcc/BenchKit/bin
current directory: /home/mcc/execution
CTLFireability

FORMULA LeafsetExtension-PT-S32C3-CTLFireability-11

FORMULA LeafsetExtension-PT-S32C3-CTLFireability-07

FORMULA LeafsetExtension-PT-S32C3-CTLFireability-05

FORMULA LeafsetExtension-PT-S32C3-CTLFireability-04

FORMULA LeafsetExtension-PT-S32C3-CTLFireability-02

FORMULA LeafsetExtension-PT-S32C3-CTLFireability-01

FORMULA LeafsetExtension-PT-S32C3-CTLFireability-10

FORMULA LeafsetExtension-PT-S32C3-CTLFireability-09

FORMULA LeafsetExtension-PT-S32C3-CTLFireability-14

BK_STOP 1621289708096

--------------------
content from stderr:

lola: MEM LIMIT 32
lola: MEM LIMIT 5
lola: NET
lola: input: PNML file (--pnmlnet)
lola: reading net from /home/mcc/execution
lola: reading pnml
lola: PNML file contains place/transition
lola: finished parsing
lola: closed net file /home/mcc/execution/
lola: Reading formula.
lola: Using XML format (--xmlformula)
lola: reading XML formula
lola: reading formula from /home/mcc/execu
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: RELEASE
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: RELEASE
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 1.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Rule S: 0 transitions removed,0
lola: Created skeleton in 1.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 1.000000 secs.
lola: Created skeleton in 1.000000 secs.
lola: Created skeleton in 0.000000 secs.
FINISHED FORMULA: CATEGORY

PENDING FORMULAS: CATEGORY
LeafsetExtension-PT-S32C3-CTLFireability-00:
LeafsetExtension-PT-S32C3-CTLFireability-01:
LeafsetExtension-PT-S32C3-CTLFireability-02:
LeafsetExtension-PT-S32C3-CTLFireability-03:
LeafsetExtension-PT-S32C3-CTLFireability-04:
LeafsetExtension-PT-S32C3-CTLFireability-05:
LeafsetExtension-PT-S32C3-CTLFireability-06:
LeafsetExtension-PT-S32C3-CTLFireability-07:
LeafsetExtension-PT-S32C3-CTLFireability-08:
LeafsetExtension-PT-S32C3-CTLFireability-09:
LeafsetExtension-PT-S32C3-CTLFireability-10:
LeafsetExtension-PT-S32C3-CTLFireability-11:
LeafsetExtension-PT-S32C3-CTLFireability-12:
LeafsetExtension-PT-S32C3-CTLFireability-13:
LeafsetExtension-PT-S32C3-CTLFireability-14:
LeafsetExtension-PT-S32C3-CTLFireability-15:

TASK CATEGORY TYPE TIME/TLIMIT

Time elapsed: 146 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 16
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 1.000000 secs.
lola: rewrite Frontend/Parser/formula_rewr
lola: LAUNCH task # 68 (type SKEL/SRCH)
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 68 (type SKEL/SRCH)
lola: result : true
lola: markings :
lola: fired transitions :
lola: time used :
lola: memory pages used :
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: NOTDEADLOCKFREE
lola: Created skeleton in 1.000000 secs.
lola: Created skeleton in 1.000000 secs.
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: LAUNCH task # 72 (type EXCL)
lola: time limit : 143 sec
lola: memory limit: 32 pages
lola: LAUNCH task # 70 (type FNDP)
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 71 (type EQUN)
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 73 (type SRCH)
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 72 (type EXCL)
lola: result : true
lola: time used :
lola: memory pages used :
lola: CANCELED task # 70 (type FNDP)
lola: CANCELED task # 71 (type EQUN)
lola: CANCELED task # 73 (type SRCH)
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: FINISHED task # 70 (type FNDP)
lola: result : true
lola: tried executions :
lola: time used :
lola: memory pages used :
sara: try reading problem file /home/mcc/exe
sara: place or transition ordering

lola: FINISHED task # 71 (type EQUN)
lola: result : true
lola: Created skeleton in 1.000000 secs.
lola: Created skeleton in 1.000000 secs.
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
FINISHED FORMULA: CATEGORY

PENDING FORMULAS: CATEGORY
LeafsetExtension-PT-S32C3-CTLFireability-00:
LeafsetExtension-PT-S32C3-CTLFireability-01:
LeafsetExtension-PT-S32C3-CTLFireability-02:
LeafsetExtension-PT-S32C3-CTLFireability-03:
LeafsetExtension-PT-S32C3-CTLFireability-04:
LeafsetExtension-PT-S32C3-CTLFireability-05:
LeafsetExtension-PT-S32C3-CTLFireability-06:
LeafsetExtension-PT-S32C3-CTLFireability-07:
LeafsetExtension-PT-S32C3-CTLFireability-08:
LeafsetExtension-PT-S32C3-CTLFireability-09:
LeafsetExtension-PT-S32C3-CTLFireability-10:
LeafsetExtension-PT-S32C3-CTLFireability-11:
LeafsetExtension-PT-S32C3-CTLFireability-12:
LeafsetExtension-PT-S32C3-CTLFireability-13:
LeafsetExtension-PT-S32C3-CTLFireability-14:
LeafsetExtension-PT-S32C3-CTLFireability-15:

TASK CATEGORY TYPE TIME/TLIMIT

Time elapsed: 151 secs. Pages in use: 1
# running tasks: 0 of 4 Visible: 16
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: LAUNCH task # 45 (type EXCL)
lola: time limit : 181 sec
lola: memory limit: 32 pages
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: FINISHED task # 45 (type EXCL)
lola: result : false
lola: markings :
lola: time used :
lola: memory pages used :
lola: LAUNCH task # 51 (type EXCL)
lola: time limit : 191 sec
lola: memory limit: 32 pages
lola: FINISHED task # 51 (type EXCL)
lola: result : false
lola: markings :
lola: time used :
lola: memory pages used :
lola: LAUNCH task # 25 (type EXCL)
lola: time limit : 202 sec
lola: memory limit: 32 pages
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
FINISHED FORMULA: CATEGORY

PENDING FORMULAS: CATEGORY
LeafsetExtension-PT-S32C3-CTLFireability-00:
LeafsetExtension-PT-S32C3-CTLFireability-01:
LeafsetExtension-PT-S32C3-CTLFireability-02:
LeafsetExtension-PT-S32C3-CTLFireability-03:
LeafsetExtension-PT-S32C3-CTLFireability-04:
LeafsetExtension-PT-S32C3-CTLFireability-05:
LeafsetExtension-PT-S32C3-CTLFireability-06:
LeafsetExtension-PT-S32C3-CTLFireability-07:
LeafsetExtension-PT-S32C3-CTLFireability-08:
LeafsetExtension-PT-S32C3-CTLFireability-09:
LeafsetExtension-PT-S32C3-CTLFireability-10:
LeafsetExtension-PT-S32C3-CTLFireability-11:
LeafsetExtension-PT-S32C3-CTLFireability-12:
LeafsetExtension-PT-S32C3-CTLFireability-13:
LeafsetExtension-PT-S32C3-CTLFireability-14:
LeafsetExtension-PT-S32C3-CTLFireability-15:

TASK CATEGORY TYPE TIME/TLIMIT
25 CTL EXCL 0/202

Time elapsed: 156 secs. Pages in use: 1
# running tasks: 1 of 4 Visible: 16
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
lola: rewrite Frontend/Parser/formula_rewr
FINISHED FORMULA: CATEGORY

PENDING FORMULAS: CATEGORY
LeafsetExtension-PT-S32C3-CTLFireability-00:
LeafsetExtension-PT-S32C3-CTLFireability-01:
LeafsetExtension-PT-S32C3-CTLFireability-02:
LeafsetExtension-PT-S32C3-CTLFireability-03:
LeafsetExtension-PT-S32C3-CTLFireability-04:
LeafsetExtension-PT-S32C3-CTLFireability-05:
LeafsetExtension-PT-S32C3-CTLFireability-06:
LeafsetExtension-PT-S32C3-CTLFireability-07:
LeafsetExtension-PT-S32C3-CTLFireability-08:
LeafsetExtension-PT-S32C3-CTLFireability-09:
LeafsetExtension-PT-S32C3-CTLFireability-10:
LeafsetExtension-PT-S32C3-CTLFireability-11:
LeafsetExtension-PT-S32C3-CTLFireability-12:
LeafsetExtension-PT-S32C3-CTLFireability-13:
LeafsetExtension-PT-S32C3-CTLFireability-14:
LeafsetExtension-PT-S32C3-CTLFireability-15:

TASK CATEGORY TYPE TIME/TLIMIT
25 CTL EXCL 5/202

Time elapsed: 161 secs. Pages in use: 3
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY

PENDING FORMULAS: CATEGORY
LeafsetExtension-PT-S32C3-CTLFireability-00:
LeafsetExtension-PT-S32C3-CTLFireability-01:
LeafsetExtension-PT-S32C3-CTLFireability-02:
LeafsetExtension-PT-S32C3-CTLFireability-03:
LeafsetExtension-PT-S32C3-CTLFireability-04:
LeafsetExtension-PT-S32C3-CTLFireability-05:
LeafsetExtension-PT-S32C3-CTLFireability-06:
LeafsetExtension-PT-S32C3-CTLFireability-07:
LeafsetExtension-PT-S32C3-CTLFireability-08:
LeafsetExtension-PT-S32C3-CTLFireability-09:
LeafsetExtension-PT-S32C3-CTLFireability-10:
LeafsetExtension-PT-S32C3-CTLFireability-11:
LeafsetExtension-PT-S32C3-CTLFireability-12:
LeafsetExtension-PT-S32C3-CTLFireability-13:
LeafsetExtension-PT-S32C3-CTLFireability-14:
LeafsetExtension-PT-S32C3-CTLFireability-15:

TASK CATEGORY TYPE TIME/TLIMIT
25 CTL EXCL 10/202

Time elapsed: 166 secs. Pages in use: 5
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY

PENDING FORMULAS: CATEGORY
LeafsetExtension-PT-S32C3-CTLFireability-00:
LeafsetExtension-PT-S32C3-CTLFireability-01:
LeafsetExtension-PT-S32C3-CTLFireability-02:
LeafsetExtension-PT-S32C3-CTLFireability-03:
LeafsetExtension-PT-S32C3-CTLFireability-04:
LeafsetExtension-PT-S32C3-CTLFireability-05:
LeafsetExtension-PT-S32C3-CTLFireability-06:
LeafsetExtension-PT-S32C3-CTLFireability-07:
LeafsetExtension-PT-S32C3-CTLFireability-08:
LeafsetExtension-PT-S32C3-CTLFireability-09:
LeafsetExtension-PT-S32C3-CTLFireability-10:
LeafsetExtension-PT-S32C3-CTLFireability-11:
LeafsetExtension-PT-S32C3-CTLFireability-12:
LeafsetExtension-PT-S32C3-CTLFireability-13:
LeafsetExtension-PT-S32C3-CTLFireability-14:
LeafsetExtension-PT-S32C3-CTLFireability-15:

TASK CATEGORY TYPE TIME/TLIMIT
25 CTL EXCL 15/202

Time elapsed: 171 secs. Pages in use: 7
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY

PENDING FORMULAS: CATEGORY
LeafsetExtension-PT-S32C3-CTLFireability-00:
LeafsetExtension-PT-S32C3-CTLFireability-01:
LeafsetExtension-PT-S32C3-CTLFireability-02:
LeafsetExtension-PT-S32C3-CTLFireability-03:
LeafsetExtension-PT-S32C3-CTLFireability-04:
LeafsetExtension-PT-S32C3-CTLFireability-05:
LeafsetExtension-PT-S32C3-CTLFireability-06:
LeafsetExtension-PT-S32C3-CTLFireability-07:
LeafsetExtension-PT-S32C3-CTLFireability-08:
LeafsetExtension-PT-S32C3-CTLFireability-09:
LeafsetExtension-PT-S32C3-CTLFireability-10:
LeafsetExtension-PT-S32C3-CTLFireability-11:
LeafsetExtension-PT-S32C3-CTLFireability-12:
LeafsetExtension-PT-S32C3-CTLFireability-13:
LeafsetExtension-PT-S32C3-CTLFireability-14:
LeafsetExtension-PT-S32C3-CTLFireability-15:

TASK CATEGORY TYPE TIME/TLIMIT
25 CTL EXCL 20/202

Time elapsed: 176 secs. Pages in use: 9
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY

PENDING FORMULAS: CATEGORY
LeafsetExtension-PT-S32C3-CTLFireability-00:
LeafsetExtension-PT-S32C3-CTLFireability-01:
LeafsetExtension-PT-S32C3-CTLFireability-02:
LeafsetExtension-PT-S32C3-CTLFireability-03:
LeafsetExtension-PT-S32C3-CTLFireability-04:
LeafsetExtension-PT-S32C3-CTLFireability-05:
LeafsetExtension-PT-S32C3-CTLFireability-06:
LeafsetExtension-PT-S32C3-CTLFireability-07:
LeafsetExtension-PT-S32C3-CTLFireability-08:
LeafsetExtension-PT-S32C3-CTLFireability-09:
LeafsetExtension-PT-S32C3-CTLFireability-10:
LeafsetExtension-PT-S32C3-CTLFireability-11:
LeafsetExtension-PT-S32C3-CTLFireability-12:
LeafsetExtension-PT-S32C3-CTLFireability-13:
LeafsetExtension-PT-S32C3-CTLFireability-14:
LeafsetExtension-PT-S32C3-CTLFireability-15:

TASK CATEGORY TYPE TIME/TLIMIT
25 CTL EXCL 25/202

Time elapsed: 181 secs. Pages in use: 11
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY

PENDING FORMULAS: CATEGORY
LeafsetExtension-PT-S32C3-CTLFireability-00:
LeafsetExtension-PT-S32C3-CTLFireability-01:
LeafsetExtension-PT-S32C3-CTLFireability-02:
LeafsetExtension-PT-S32C3-CTLFireability-03:
LeafsetExtension-PT-S32C3-CTLFireability-04:
LeafsetExtension-PT-S32C3-CTLFireability-05:
LeafsetExtension-PT-S32C3-CTLFireability-06:
LeafsetExtension-PT-S32C3-CTLFireability-07:
LeafsetExtension-PT-S32C3-CTLFireability-08:
LeafsetExtension-PT-S32C3-CTLFireability-09:
LeafsetExtension-PT-S32C3-CTLFireability-10:
LeafsetExtension-PT-S32C3-CTLFireability-11:
LeafsetExtension-PT-S32C3-CTLFireability-12:
LeafsetExtension-PT-S32C3-CTLFireability-13:
LeafsetExtension-PT-S32C3-CTLFireability-14:
LeafsetExtension-PT-S32C3-CTLFireability-15:

TASK CATEGORY TYPE TIME/TLIMIT
25 CTL EXCL 30/202

Time elapsed: 186 secs. Pages in use: 13
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY

PENDING FORMULAS: CATEGORY
LeafsetExtension-PT-S32C3-CTLFireability-00:
LeafsetExtension-PT-S32C3-CTLFireability-01:
LeafsetExtension-PT-S32C3-CTLFireability-02:
LeafsetExtension-PT-S32C3-CTLFireability-03:
LeafsetExtension-PT-S32C3-CTLFireability-04:
LeafsetExtension-PT-S32C3-CTLFireability-05:
LeafsetExtension-PT-S32C3-CTLFireability-06:
LeafsetExtension-PT-S32C3-CTLFireability-07:
LeafsetExtension-PT-S32C3-CTLFireability-08:
LeafsetExtension-PT-S32C3-CTLFireability-09:
LeafsetExtension-PT-S32C3-CTLFireability-10:
LeafsetExtension-PT-S32C3-CTLFireability-11:
LeafsetExtension-PT-S32C3-CTLFireability-12:
LeafsetExtension-PT-S32C3-CTLFireability-13:
LeafsetExtension-PT-S32C3-CTLFireability-14:
LeafsetExtension-PT-S32C3-CTLFireability-15:

TASK CATEGORY TYPE TIME/TLIMIT
25 CTL EXCL 35/202

Time elapsed: 191 secs. Pages in use: 15
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY

PENDING FORMULAS: CATEGORY
LeafsetExtension-PT-S32C3-CTLFireability-00:
LeafsetExtension-PT-S32C3-CTLFireability-01:
LeafsetExtension-PT-S32C3-CTLFireability-02:
LeafsetExtension-PT-S32C3-CTLFireability-03:
LeafsetExtension-PT-S32C3-CTLFireability-04:
LeafsetExtension-PT-S32C3-CTLFireability-05:
LeafsetExtension-PT-S32C3-CTLFireability-06:
LeafsetExtension-PT-S32C3-CTLFireability-07:
LeafsetExtension-PT-S32C3-CTLFireability-08:
LeafsetExtension-PT-S32C3-CTLFireability-09:
LeafsetExtension-PT-S32C3-CTLFireability-10:
LeafsetExtension-PT-S32C3-CTLFireability-11:
LeafsetExtension-PT-S32C3-CTLFireability-12:
LeafsetExtension-PT-S32C3-CTLFireability-13:
LeafsetExtension-PT-S32C3-CTLFireability-14:
LeafsetExtension-PT-S32C3-CTLFireability-15:

TASK CATEGORY TYPE TIME/TLIMIT
25 CTL EXCL 40/202

Time elapsed: 196 secs. Pages in use: 17
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY

PENDING FORMULAS: CATEGORY
LeafsetExtension-PT-S32C3-CTLFireability-00:
LeafsetExtension-PT-S32C3-CTLFireability-01:
LeafsetExtension-PT-S32C3-CTLFireability-02:
LeafsetExtension-PT-S32C3-CTLFireability-03:
LeafsetExtension-PT-S32C3-CTLFireability-04:
LeafsetExtension-PT-S32C3-CTLFireability-05:
LeafsetExtension-PT-S32C3-CTLFireability-06:
LeafsetExtension-PT-S32C3-CTLFireability-07:
LeafsetExtension-PT-S32C3-CTLFireability-08:
LeafsetExtension-PT-S32C3-CTLFireability-09:
LeafsetExtension-PT-S32C3-CTLFireability-10:
LeafsetExtension-PT-S32C3-CTLFireability-11:
LeafsetExtension-PT-S32C3-CTLFireability-12:
LeafsetExtension-PT-S32C3-CTLFireability-13:
LeafsetExtension-PT-S32C3-CTLFireability-14:
LeafsetExtension-PT-S32C3-CTLFireability-15:

TASK CATEGORY TYPE TIME/TLIMIT
25 CTL EXCL 45/202

Time elapsed: 201 secs. Pages in use: 19
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY

PENDING FORMULAS: CATEGORY
LeafsetExtension-PT-S32C3-CTLFireability-00:
LeafsetExtension-PT-S32C3-CTLFireability-01:
LeafsetExtension-PT-S32C3-CTLFireability-02:
LeafsetExtension-PT-S32C3-CTLFireability-03:
LeafsetExtension-PT-S32C3-CTLFireability-04:
LeafsetExtension-PT-S32C3-CTLFireability-05:
LeafsetExtension-PT-S32C3-CTLFireability-06:
LeafsetExtension-PT-S32C3-CTLFireability-07:
LeafsetExtension-PT-S32C3-CTLFireability-08:
LeafsetExtension-PT-S32C3-CTLFireability-09:
LeafsetExtension-PT-S32C3-CTLFireability-10:
LeafsetExtension-PT-S32C3-CTLFireability-11:
LeafsetExtension-PT-S32C3-CTLFireability-12:
LeafsetExtension-PT-S32C3-CTLFireability-13:
LeafsetExtension-PT-S32C3-CTLFireability-14:
LeafsetExtension-PT-S32C3-CTLFireability-15:

TASK CATEGORY TYPE TIME/TLIMIT
25 CTL EXCL 50/202

Time elapsed: 206 secs. Pages in use: 21
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY

PENDING FORMULAS: CATEGORY
LeafsetExtension-PT-S32C3-CTLFireability-00:
LeafsetExtension-PT-S32C3-CTLFireability-01:
LeafsetExtension-PT-S32C3-CTLFireability-02:
LeafsetExtension-PT-S32C3-CTLFireability-03:
LeafsetExtension-PT-S32C3-CTLFireability-04:
LeafsetExtension-PT-S32C3-CTLFireability-05:
LeafsetExtension-PT-S32C3-CTLFireability-06:
LeafsetExtension-PT-S32C3-CTLFireability-07:
LeafsetExtension-PT-S32C3-CTLFireability-08:
LeafsetExtension-PT-S32C3-CTLFireability-09:
LeafsetExtension-PT-S32C3-CTLFireability-10:
LeafsetExtension-PT-S32C3-CTLFireability-11:
LeafsetExtension-PT-S32C3-CTLFireability-12:
LeafsetExtension-PT-S32C3-CTLFireability-13:
LeafsetExtension-PT-S32C3-CTLFireability-14:
LeafsetExtension-PT-S32C3-CTLFireability-15:

TASK CATEGORY TYPE TIME/TLIMIT
25 CTL EXCL 55/202

Time elapsed: 211 secs. Pages in use: 22
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY

PENDING FORMULAS: CATEGORY
LeafsetExtension-PT-S32C3-CTLFireability-00:
LeafsetExtension-PT-S32C3-CTLFireability-01:
LeafsetExtension-PT-S32C3-CTLFireability-02:
LeafsetExtension-PT-S32C3-CTLFireability-03:
LeafsetExtension-PT-S32C3-CTLFireability-04:
LeafsetExtension-PT-S32C3-CTLFireability-05:
LeafsetExtension-PT-S32C3-CTLFireability-06:
LeafsetExtension-PT-S32C3-CTLFireability-07:
LeafsetExtension-PT-S32C3-CTLFireability-08:
LeafsetExtension-PT-S32C3-CTLFireability-09:
LeafsetExtension-PT-S32C3-CTLFireability-10:
LeafsetExtension-PT-S32C3-CTLFireability-11:
LeafsetExtension-PT-S32C3-CTLFireability-12:
LeafsetExtension-PT-S32C3-CTLFireability-13:
LeafsetExtension-PT-S32C3-CTLFireability-14:
LeafsetExtension-PT-S32C3-CTLFireability-15:

TASK CATEGORY TYPE TIME/TLIMIT
25 CTL EXCL 60/202

Time elapsed: 216 secs. Pages in use: 24
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY

PENDING FORMULAS: CATEGORY
LeafsetExtension-PT-S32C3-CTLFireability-00:
LeafsetExtension-PT-S32C3-CTLFireability-01:
LeafsetExtension-PT-S32C3-CTLFireability-02:
LeafsetExtension-PT-S32C3-CTLFireability-03:
LeafsetExtension-PT-S32C3-CTLFireability-04:
LeafsetExtension-PT-S32C3-CTLFireability-05:
LeafsetExtension-PT-S32C3-CTLFireability-06:
LeafsetExtension-PT-S32C3-CTLFireability-07:
LeafsetExtension-PT-S32C3-CTLFireability-08:
LeafsetExtension-PT-S32C3-CTLFireability-09:
LeafsetExtension-PT-S32C3-CTLFireability-10:
LeafsetExtension-PT-S32C3-CTLFireability-11:
LeafsetExtension-PT-S32C3-CTLFireability-12:
LeafsetExtension-PT-S32C3-CTLFireability-13:
LeafsetExtension-PT-S32C3-CTLFireability-14:
LeafsetExtension-PT-S32C3-CTLFireability-15:

TASK CATEGORY TYPE TIME/TLIMIT
25 CTL EXCL 65/202

Time elapsed: 221 secs. Pages in use: 26
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY

PENDING FORMULAS: CATEGORY
LeafsetExtension-PT-S32C3-CTLFireability-00:
LeafsetExtension-PT-S32C3-CTLFireability-01:
LeafsetExtension-PT-S32C3-CTLFireability-02:
LeafsetExtension-PT-S32C3-CTLFireability-03:
LeafsetExtension-PT-S32C3-CTLFireability-04:
LeafsetExtension-PT-S32C3-CTLFireability-05:
LeafsetExtension-PT-S32C3-CTLFireability-06:
LeafsetExtension-PT-S32C3-CTLFireability-07:
LeafsetExtension-PT-S32C3-CTLFireability-08:
LeafsetExtension-PT-S32C3-CTLFireability-09:
LeafsetExtension-PT-S32C3-CTLFireability-10:
LeafsetExtension-PT-S32C3-CTLFireability-11:
LeafsetExtension-PT-S32C3-CTLFireability-12:
LeafsetExtension-PT-S32C3-CTLFireability-13:
LeafsetExtension-PT-S32C3-CTLFireability-14:
LeafsetExtension-PT-S32C3-CTLFireability-15:

TASK CATEGORY TYPE TIME/TLIMIT
25 CTL EXCL 70/202

Time elapsed: 226 secs. Pages in use: 28
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY

PENDING FORMULAS: CATEGORY
LeafsetExtension-PT-S32C3-CTLFireability-00:
LeafsetExtension-PT-S32C3-CTLFireability-01:
LeafsetExtension-PT-S32C3-CTLFireability-02:
LeafsetExtension-PT-S32C3-CTLFireability-03:
LeafsetExtension-PT-S32C3-CTLFireability-04:
LeafsetExtension-PT-S32C3-CTLFireability-05:
LeafsetExtension-PT-S32C3-CTLFireability-06:
LeafsetExtension-PT-S32C3-CTLFireability-07:
LeafsetExtension-PT-S32C3-CTLFireability-08:
LeafsetExtension-PT-S32C3-CTLFireability-09:
LeafsetExtension-PT-S32C3-CTLFireability-10:
LeafsetExtension-PT-S32C3-CTLFireability-11:
LeafsetExtension-PT-S32C3-CTLFireability-12:
LeafsetExtension-PT-S32C3-CTLFireability-13:
LeafsetExtension-PT-S32C3-CTLFireability-14:
LeafsetExtension-PT-S32C3-CTLFireability-15:

TASK CATEGORY TYPE TIME/TLIMIT
25 CTL EXCL 75/202

Time elapsed: 231 secs. Pages in use: 30
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY

PENDING FORMULAS: CATEGORY
LeafsetExtension-PT-S32C3-CTLFireability-00:
LeafsetExtension-PT-S32C3-CTLFireability-01:
LeafsetExtension-PT-S32C3-CTLFireability-02:
LeafsetExtension-PT-S32C3-CTLFireability-03:
LeafsetExtension-PT-S32C3-CTLFireability-04:
LeafsetExtension-PT-S32C3-CTLFireability-05:
LeafsetExtension-PT-S32C3-CTLFireability-06:
LeafsetExtension-PT-S32C3-CTLFireability-07:
LeafsetExtension-PT-S32C3-CTLFireability-08:
LeafsetExtension-PT-S32C3-CTLFireability-09:
LeafsetExtension-PT-S32C3-CTLFireability-10:
LeafsetExtension-PT-S32C3-CTLFireability-11:
LeafsetExtension-PT-S32C3-CTLFireability-12:
LeafsetExtension-PT-S32C3-CTLFireability-13:
LeafsetExtension-PT-S32C3-CTLFireability-14:
LeafsetExtension-PT-S32C3-CTLFireability-15:

TASK CATEGORY TYPE TIME/TLIMIT
25 CTL EXCL 80/202

Time elapsed: 236 secs. Pages in use: 31
# running tasks: 1 of 4 Visible: 16
lola: CANCELED task # 25 (type EXCL)
FINISHED FORMULA: CATEGORY

PENDING FORMULAS: CATEGORY
LeafsetExtension-PT-S32C3-CTLFireability-00:
LeafsetExtension-PT-S32C3-CTLFireability-01:
LeafsetExtension-PT-S32C3-CTLFireability-02:
LeafsetExtension-PT-S32C3-CTLFireability-03:
LeafsetExtension-PT-S32C3-CTLFireability-04:
LeafsetExtension-PT-S32C3-CTLFireability-05:
LeafsetExtension-PT-S32C3-CTLFireability-06:
LeafsetExtension-PT-S32C3-CTLFireability-07:
LeafsetExtension-PT-S32C3-CTLFireability-08:
LeafsetExtension-PT-S32C3-CTLFireability-09:
LeafsetExtension-PT-S32C3-CTLFireability-10:
LeafsetExtension-PT-S32C3-CTLFireability-11:
LeafsetExtension-PT-S32C3-CTLFireability-12:
LeafsetExtension-PT-S32C3-CTLFireability-13:
LeafsetExtension-PT-S32C3-CTLFireability-14:
LeafsetExtension-PT-S32C3-CTLFireability-15:

TASK CATEGORY TYPE TIME/TLIMIT

Time elapsed: 241 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
lola: LAUNCH task # 60 (type EXCL)
lola: time limit : 209 sec
lola: memory limit: 32 pages
FINISHED FORMULA: CATEGORY

PENDING FORMULAS: CATEGORY
LeafsetExtension-PT-S32C3-CTLFireability-00:
LeafsetExtension-PT-S32C3-CTLFireability-01:
LeafsetExtension-PT-S32C3-CTLFireability-02:
LeafsetExtension-PT-S32C3-CTLFireability-03:
LeafsetExtension-PT-S32C3-CTLFireability-04:
LeafsetExtension-PT-S32C3-CTLFireability-05:
LeafsetExtension-PT-S32C3-CTLFireability-06:
LeafsetExtension-PT-S32C3-CTLFireability-07:
LeafsetExtension-PT-S32C3-CTLFireability-08:
LeafsetExtension-PT-S32C3-CTLFireability-09:
LeafsetExtension-PT-S32C3-CTLFireability-10:
LeafsetExtension-PT-S32C3-CTLFireability-11:
LeafsetExtension-PT-S32C3-CTLFireability-12:
LeafsetExtension-PT-S32C3-CTLFireability-13:
LeafsetExtension-PT-S32C3-CTLFireability-14:
LeafsetExtension-PT-S32C3-CTLFireability-15:

TASK CATEGORY TYPE TIME/TLIMIT
60 CTL EXCL 5/209

Time elapsed: 246 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY

PENDING FORMULAS: CATEGORY
LeafsetExtension-PT-S32C3-CTLFireability-00:
LeafsetExtension-PT-S32C3-CTLFireability-01:
LeafsetExtension-PT-S32C3-CTLFireability-02:
LeafsetExtension-PT-S32C3-CTLFireability-03:
LeafsetExtension-PT-S32C3-CTLFireability-04:
LeafsetExtension-PT-S32C3-CTLFireability-05:
LeafsetExtension-PT-S32C3-CTLFireability-06:
LeafsetExtension-PT-S32C3-CTLFireability-07:
LeafsetExtension-PT-S32C3-CTLFireability-08:
LeafsetExtension-PT-S32C3-CTLFireability-09:
LeafsetExtension-PT-S32C3-CTLFireability-10:
LeafsetExtension-PT-S32C3-CTLFireability-11:
LeafsetExtension-PT-S32C3-CTLFireability-12:
LeafsetExtension-PT-S32C3-CTLFireability-13:
LeafsetExtension-PT-S32C3-CTLFireability-14:
LeafsetExtension-PT-S32C3-CTLFireability-15:

TASK CATEGORY TYPE TIME/TLIMIT
60 CTL EXCL 10/209

Time elapsed: 251 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY

PENDING FORMULAS: CATEGORY
LeafsetExtension-PT-S32C3-CTLFireability-00:
LeafsetExtension-PT-S32C3-CTLFireability-01:
LeafsetExtension-PT-S32C3-CTLFireability-02:
LeafsetExtension-PT-S32C3-CTLFireability-03:
LeafsetExtension-PT-S32C3-CTLFireability-04:
LeafsetExtension-PT-S32C3-CTLFireability-05:
LeafsetExtension-PT-S32C3-CTLFireability-06:
LeafsetExtension-PT-S32C3-CTLFireability-07:
LeafsetExtension-PT-S32C3-CTLFireability-08:
LeafsetExtension-PT-S32C3-CTLFireability-09:
LeafsetExtension-PT-S32C3-CTLFireability-10:
LeafsetExtension-PT-S32C3-CTLFireability-11:
LeafsetExtension-PT-S32C3-CTLFireability-12:
LeafsetExtension-PT-S32C3-CTLFireability-13:
LeafsetExtension-PT-S32C3-CTLFireability-14:
LeafsetExtension-PT-S32C3-CTLFireability-15:

TASK CATEGORY TYPE TIME/TLIMIT
60 CTL EXCL 15/209

Time elapsed: 256 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY

PENDING FORMULAS: CATEGORY
LeafsetExtension-PT-S32C3-CTLFireability-00:
LeafsetExtension-PT-S32C3-CTLFireability-01:
LeafsetExtension-PT-S32C3-CTLFireability-02:
LeafsetExtension-PT-S32C3-CTLFireability-03:
LeafsetExtension-PT-S32C3-CTLFireability-04:
LeafsetExtension-PT-S32C3-CTLFireability-05:
LeafsetExtension-PT-S32C3-CTLFireability-06:
LeafsetExtension-PT-S32C3-CTLFireability-07:
LeafsetExtension-PT-S32C3-CTLFireability-08:
LeafsetExtension-PT-S32C3-CTLFireability-09:
LeafsetExtension-PT-S32C3-CTLFireability-10:
LeafsetExtension-PT-S32C3-CTLFireability-11:
LeafsetExtension-PT-S32C3-CTLFireability-12:
LeafsetExtension-PT-S32C3-CTLFireability-13:
LeafsetExtension-PT-S32C3-CTLFireability-14:
LeafsetExtension-PT-S32C3-CTLFireability-15:

TASK CATEGORY TYPE TIME/TLIMIT
60 CTL EXCL 20/209

Time elapsed: 261 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY

PENDING FORMULAS: CATEGORY
LeafsetExtension-PT-S32C3-CTLFireability-00:
LeafsetExtension-PT-S32C3-CTLFireability-01:
LeafsetExtension-PT-S32C3-CTLFireability-02:
LeafsetExtension-PT-S32C3-CTLFireability-03:
LeafsetExtension-PT-S32C3-CTLFireability-04:
LeafsetExtension-PT-S32C3-CTLFireability-05:
LeafsetExtension-PT-S32C3-CTLFireability-06:
LeafsetExtension-PT-S32C3-CTLFireability-07:
LeafsetExtension-PT-S32C3-CTLFireability-08:
LeafsetExtension-PT-S32C3-CTLFireability-09:
LeafsetExtension-PT-S32C3-CTLFireability-10:
LeafsetExtension-PT-S32C3-CTLFireability-11:
LeafsetExtension-PT-S32C3-CTLFireability-12:
LeafsetExtension-PT-S32C3-CTLFireability-13:
LeafsetExtension-PT-S32C3-CTLFireability-14:
LeafsetExtension-PT-S32C3-CTLFireability-15:

TASK CATEGORY TYPE TIME/TLIMIT
60 CTL EXCL 25/209

Time elapsed: 266 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY

PENDING FORMULAS: CATEGORY
LeafsetExtension-PT-S32C3-CTLFireability-00:
LeafsetExtension-PT-S32C3-CTLFireability-01:
LeafsetExtension-PT-S32C3-CTLFireability-02:
LeafsetExtension-PT-S32C3-CTLFireability-03:
LeafsetExtension-PT-S32C3-CTLFireability-04:
LeafsetExtension-PT-S32C3-CTLFireability-05:
LeafsetExtension-PT-S32C3-CTLFireability-06:
LeafsetExtension-PT-S32C3-CTLFireability-07:
LeafsetExtension-PT-S32C3-CTLFireability-08:
LeafsetExtension-PT-S32C3-CTLFireability-09:
LeafsetExtension-PT-S32C3-CTLFireability-10:
LeafsetExtension-PT-S32C3-CTLFireability-11:
LeafsetExtension-PT-S32C3-CTLFireability-12:
LeafsetExtension-PT-S32C3-CTLFireability-13:
LeafsetExtension-PT-S32C3-CTLFireability-14:
LeafsetExtension-PT-S32C3-CTLFireability-15:

TASK CATEGORY TYPE TIME/TLIMIT
60 CTL EXCL 30/209

Time elapsed: 271 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY

PENDING FORMULAS: CATEGORY
LeafsetExtension-PT-S32C3-CTLFireability-00:
LeafsetExtension-PT-S32C3-CTLFireability-01:
LeafsetExtension-PT-S32C3-CTLFireability-02:
LeafsetExtension-PT-S32C3-CTLFireability-03:
LeafsetExtension-PT-S32C3-CTLFireability-04:
LeafsetExtension-PT-S32C3-CTLFireability-05:
LeafsetExtension-PT-S32C3-CTLFireability-06:
LeafsetExtension-PT-S32C3-CTLFireability-07:
LeafsetExtension-PT-S32C3-CTLFireability-08:
LeafsetExtension-PT-S32C3-CTLFireability-09:
LeafsetExtension-PT-S32C3-CTLFireability-10:
LeafsetExtension-PT-S32C3-CTLFireability-11:
LeafsetExtension-PT-S32C3-CTLFireability-12:
LeafsetExtension-PT-S32C3-CTLFireability-13:
LeafsetExtension-PT-S32C3-CTLFireability-14:
LeafsetExtension-PT-S32C3-CTLFireability-15:

TASK CATEGORY TYPE TIME/TLIMIT
60 CTL EXCL 35/209

Time elapsed: 276 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY

PENDING FORMULAS: CATEGORY
LeafsetExtension-PT-S32C3-CTLFireability-00:
LeafsetExtension-PT-S32C3-CTLFireability-01:
LeafsetExtension-PT-S32C3-CTLFireability-02:
LeafsetExtension-PT-S32C3-CTLFireability-03:
LeafsetExtension-PT-S32C3-CTLFireability-04:
LeafsetExtension-PT-S32C3-CTLFireability-05:
LeafsetExtension-PT-S32C3-CTLFireability-06:
LeafsetExtension-PT-S32C3-CTLFireability-07:
LeafsetExtension-PT-S32C3-CTLFireability-08:
LeafsetExtension-PT-S32C3-CTLFireability-09:
LeafsetExtension-PT-S32C3-CTLFireability-10:
LeafsetExtension-PT-S32C3-CTLFireability-11:
LeafsetExtension-PT-S32C3-CTLFireability-12:
LeafsetExtension-PT-S32C3-CTLFireability-13:
LeafsetExtension-PT-S32C3-CTLFireability-14:
LeafsetExtension-PT-S32C3-CTLFireability-15:

TASK CATEGORY TYPE TIME/TLIMIT
60 CTL EXCL 40/209

Time elapsed: 281 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY

PENDING FORMULAS: CATEGORY
LeafsetExtension-PT-S32C3-CTLFireability-00:
LeafsetExtension-PT-S32C3-CTLFireability-01:
LeafsetExtension-PT-S32C3-CTLFireability-02:
LeafsetExtension-PT-S32C3-CTLFireability-03:
LeafsetExtension-PT-S32C3-CTLFireability-04:
LeafsetExtension-PT-S32C3-CTLFireability-05:
LeafsetExtension-PT-S32C3-CTLFireability-06:
LeafsetExtension-PT-S32C3-CTLFireability-07:
LeafsetExtension-PT-S32C3-CTLFireability-08:
LeafsetExtension-PT-S32C3-CTLFireability-09:
LeafsetExtension-PT-S32C3-CTLFireability-10:
LeafsetExtension-PT-S32C3-CTLFireability-11:
LeafsetExtension-PT-S32C3-CTLFireability-12:
LeafsetExtension-PT-S32C3-CTLFireability-13:
LeafsetExtension-PT-S32C3-CTLFireability-14:
LeafsetExtension-PT-S32C3-CTLFireability-15:

TASK CATEGORY TYPE TIME/TLIMIT
60 CTL EXCL 45/209

Time elapsed: 286 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY

PENDING FORMULAS: CATEGORY
LeafsetExtension-PT-S32C3-CTLFireability-00:
LeafsetExtension-PT-S32C3-CTLFireability-01:
LeafsetExtension-PT-S32C3-CTLFireability-02:
LeafsetExtension-PT-S32C3-CTLFireability-03:
LeafsetExtension-PT-S32C3-CTLFireability-04:
LeafsetExtension-PT-S32C3-CTLFireability-05:
LeafsetExtension-PT-S32C3-CTLFireability-06:
LeafsetExtension-PT-S32C3-CTLFireability-07:
LeafsetExtension-PT-S32C3-CTLFireability-08:
LeafsetExtension-PT-S32C3-CTLFireability-09:
LeafsetExtension-PT-S32C3-CTLFireability-10:
LeafsetExtension-PT-S32C3-CTLFireability-11:
LeafsetExtension-PT-S32C3-CTLFireability-12:
LeafsetExtension-PT-S32C3-CTLFireability-13:
LeafsetExtension-PT-S32C3-CTLFireability-14:
LeafsetExtension-PT-S32C3-CTLFireability-15:

TASK CATEGORY TYPE TIME/TLIMIT
60 CTL EXCL 50/209

Time elapsed: 291 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY

PENDING FORMULAS: CATEGORY
LeafsetExtension-PT-S32C3-CTLFireability-00:
LeafsetExtension-PT-S32C3-CTLFireability-01:
LeafsetExtension-PT-S32C3-CTLFireability-02:
LeafsetExtension-PT-S32C3-CTLFireability-03:
LeafsetExtension-PT-S32C3-CTLFireability-04:
LeafsetExtension-PT-S32C3-CTLFireability-05:
LeafsetExtension-PT-S32C3-CTLFireability-06:
LeafsetExtension-PT-S32C3-CTLFireability-07:
LeafsetExtension-PT-S32C3-CTLFireability-08:
LeafsetExtension-PT-S32C3-CTLFireability-09:
LeafsetExtension-PT-S32C3-CTLFireability-10:
LeafsetExtension-PT-S32C3-CTLFireability-11:
LeafsetExtension-PT-S32C3-CTLFireability-12:
LeafsetExtension-PT-S32C3-CTLFireability-13:
LeafsetExtension-PT-S32C3-CTLFireability-14:
LeafsetExtension-PT-S32C3-CTLFireability-15:

TASK CATEGORY TYPE TIME/TLIMIT
60 CTL EXCL 55/209

Time elapsed: 296 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY

PENDING FORMULAS: CATEGORY
LeafsetExtension-PT-S32C3-CTLFireability-00:
LeafsetExtension-PT-S32C3-CTLFireability-01:
LeafsetExtension-PT-S32C3-CTLFireability-02:
LeafsetExtension-PT-S32C3-CTLFireability-03:
LeafsetExtension-PT-S32C3-CTLFireability-04:
LeafsetExtension-PT-S32C3-CTLFireability-05:
LeafsetExtension-PT-S32C3-CTLFireability-06:
LeafsetExtension-PT-S32C3-CTLFireability-07:
LeafsetExtension-PT-S32C3-CTLFireability-08:
LeafsetExtension-PT-S32C3-CTLFireability-09:
LeafsetExtension-PT-S32C3-CTLFireability-10:
LeafsetExtension-PT-S32C3-CTLFireability-11:
LeafsetExtension-PT-S32C3-CTLFireability-12:
LeafsetExtension-PT-S32C3-CTLFireability-13:
LeafsetExtension-PT-S32C3-CTLFireability-14:
LeafsetExtension-PT-S32C3-CTLFireability-15:

TASK CATEGORY TYPE TIME/TLIMIT
60 CTL EXCL 60/209

Time elapsed: 301 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY

PENDING FORMULAS: CATEGORY
LeafsetExtension-PT-S32C3-CTLFireability-00:
LeafsetExtension-PT-S32C3-CTLFireability-01:
LeafsetExtension-PT-S32C3-CTLFireability-02:
LeafsetExtension-PT-S32C3-CTLFireability-03:
LeafsetExtension-PT-S32C3-CTLFireability-04:
LeafsetExtension-PT-S32C3-CTLFireability-05:
LeafsetExtension-PT-S32C3-CTLFireability-06:
LeafsetExtension-PT-S32C3-CTLFireability-07:
LeafsetExtension-PT-S32C3-CTLFireability-08:
LeafsetExtension-PT-S32C3-CTLFireability-09:
LeafsetExtension-PT-S32C3-CTLFireability-10:
LeafsetExtension-PT-S32C3-CTLFireability-11:
LeafsetExtension-PT-S32C3-CTLFireability-12:
LeafsetExtension-PT-S32C3-CTLFireability-13:
LeafsetExtension-PT-S32C3-CTLFireability-14:
LeafsetExtension-PT-S32C3-CTLFireability-15:

TASK CATEGORY TYPE TIME/TLIMIT
60 CTL EXCL 65/209

Time elapsed: 306 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY

PENDING FORMULAS: CATEGORY
LeafsetExtension-PT-S32C3-CTLFireability-00:
LeafsetExtension-PT-S32C3-CTLFireability-01:
LeafsetExtension-PT-S32C3-CTLFireability-02:
LeafsetExtension-PT-S32C3-CTLFireability-03:
LeafsetExtension-PT-S32C3-CTLFireability-04:
LeafsetExtension-PT-S32C3-CTLFireability-05:
LeafsetExtension-PT-S32C3-CTLFireability-06:
LeafsetExtension-PT-S32C3-CTLFireability-07:
LeafsetExtension-PT-S32C3-CTLFireability-08:
LeafsetExtension-PT-S32C3-CTLFireability-09:
LeafsetExtension-PT-S32C3-CTLFireability-10:
LeafsetExtension-PT-S32C3-CTLFireability-11:
LeafsetExtension-PT-S32C3-CTLFireability-12:
LeafsetExtension-PT-S32C3-CTLFireability-13:
LeafsetExtension-PT-S32C3-CTLFireability-14:
LeafsetExtension-PT-S32C3-CTLFireability-15:

TASK CATEGORY TYPE TIME/TLIMIT
60 CTL EXCL 70/209

Time elapsed: 311 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY

PENDING FORMULAS: CATEGORY
LeafsetExtension-PT-S32C3-CTLFireability-00:
LeafsetExtension-PT-S32C3-CTLFireability-01:
LeafsetExtension-PT-S32C3-CTLFireability-02:
LeafsetExtension-PT-S32C3-CTLFireability-03:
LeafsetExtension-PT-S32C3-CTLFireability-04:
LeafsetExtension-PT-S32C3-CTLFireability-05:
LeafsetExtension-PT-S32C3-CTLFireability-06:
LeafsetExtension-PT-S32C3-CTLFireability-07:
LeafsetExtension-PT-S32C3-CTLFireability-08:
LeafsetExtension-PT-S32C3-CTLFireability-09:
LeafsetExtension-PT-S32C3-CTLFireability-10:
LeafsetExtension-PT-S32C3-CTLFireability-11:
LeafsetExtension-PT-S32C3-CTLFireability-12:
LeafsetExtension-PT-S32C3-CTLFireability-13:
LeafsetExtension-PT-S32C3-CTLFireability-14:
LeafsetExtension-PT-S32C3-CTLFireability-15:

TASK CATEGORY TYPE TIME/TLIMIT
60 CTL EXCL 75/209

Time elapsed: 316 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY

PENDING FORMULAS: CATEGORY
LeafsetExtension-PT-S32C3-CTLFireability-00:
LeafsetExtension-PT-S32C3-CTLFireability-01:
LeafsetExtension-PT-S32C3-CTLFireability-02:
LeafsetExtension-PT-S32C3-CTLFireability-03:
LeafsetExtension-PT-S32C3-CTLFireability-04:
LeafsetExtension-PT-S32C3-CTLFireability-05:
LeafsetExtension-PT-S32C3-CTLFireability-06:
LeafsetExtension-PT-S32C3-CTLFireability-07:
LeafsetExtension-PT-S32C3-CTLFireability-08:
LeafsetExtension-PT-S32C3-CTLFireability-09:
LeafsetExtension-PT-S32C3-CTLFireability-10:
LeafsetExtension-PT-S32C3-CTLFireability-11:
LeafsetExtension-PT-S32C3-CTLFireability-12:
LeafsetExtension-PT-S32C3-CTLFireability-13:
LeafsetExtension-PT-S32C3-CTLFireability-14:
LeafsetExtension-PT-S32C3-CTLFireability-15:

TASK CATEGORY TYPE TIME/TLIMIT
60 CTL EXCL 80/209

Time elapsed: 321 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY

PENDING FORMULAS: CATEGORY
LeafsetExtension-PT-S32C3-CTLFireability-00:
LeafsetExtension-PT-S32C3-CTLFireability-01:
LeafsetExtension-PT-S32C3-CTLFireability-02:
LeafsetExtension-PT-S32C3-CTLFireability-03:
LeafsetExtension-PT-S32C3-CTLFireability-04:
LeafsetExtension-PT-S32C3-CTLFireability-05:
LeafsetExtension-PT-S32C3-CTLFireability-06:
LeafsetExtension-PT-S32C3-CTLFireability-07:
LeafsetExtension-PT-S32C3-CTLFireability-08:
LeafsetExtension-PT-S32C3-CTLFireability-09:
LeafsetExtension-PT-S32C3-CTLFireability-10:
LeafsetExtension-PT-S32C3-CTLFireability-11:
LeafsetExtension-PT-S32C3-CTLFireability-12:
LeafsetExtension-PT-S32C3-CTLFireability-13:
LeafsetExtension-PT-S32C3-CTLFireability-14:
LeafsetExtension-PT-S32C3-CTLFireability-15:

TASK CATEGORY TYPE TIME/TLIMIT
60 CTL EXCL 85/209

Time elapsed: 326 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY

PENDING FORMULAS: CATEGORY
LeafsetExtension-PT-S32C3-CTLFireability-00:
LeafsetExtension-PT-S32C3-CTLFireability-01:
LeafsetExtension-PT-S32C3-CTLFireability-02:
LeafsetExtension-PT-S32C3-CTLFireability-03:
LeafsetExtension-PT-S32C3-CTLFireability-04:
LeafsetExtension-PT-S32C3-CTLFireability-05:
LeafsetExtension-PT-S32C3-CTLFireability-06:
LeafsetExtension-PT-S32C3-CTLFireability-07:
LeafsetExtension-PT-S32C3-CTLFireability-08:
LeafsetExtension-PT-S32C3-CTLFireability-09:
LeafsetExtension-PT-S32C3-CTLFireability-10:
LeafsetExtension-PT-S32C3-CTLFireability-11:
LeafsetExtension-PT-S32C3-CTLFireability-12:
LeafsetExtension-PT-S32C3-CTLFireability-13:
LeafsetExtension-PT-S32C3-CTLFireability-14:
LeafsetExtension-PT-S32C3-CTLFireability-15:

TASK CATEGORY TYPE TIME/TLIMIT
60 CTL EXCL 90/209

Time elapsed: 331 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY

PENDING FORMULAS: CATEGORY
LeafsetExtension-PT-S32C3-CTLFireability-00:
LeafsetExtension-PT-S32C3-CTLFireability-01:
LeafsetExtension-PT-S32C3-CTLFireability-02:
LeafsetExtension-PT-S32C3-CTLFireability-03:
LeafsetExtension-PT-S32C3-CTLFireability-04:
LeafsetExtension-PT-S32C3-CTLFireability-05:
LeafsetExtension-PT-S32C3-CTLFireability-06:
LeafsetExtension-PT-S32C3-CTLFireability-07:
LeafsetExtension-PT-S32C3-CTLFireability-08:
LeafsetExtension-PT-S32C3-CTLFireability-09:
LeafsetExtension-PT-S32C3-CTLFireability-10:
LeafsetExtension-PT-S32C3-CTLFireability-11:
LeafsetExtension-PT-S32C3-CTLFireability-12:
LeafsetExtension-PT-S32C3-CTLFireability-13:
LeafsetExtension-PT-S32C3-CTLFireability-14:
LeafsetExtension-PT-S32C3-CTLFireability-15:

TASK CATEGORY TYPE TIME/TLIMIT
60 CTL EXCL 95/209

Time elapsed: 336 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY

PENDING FORMULAS: CATEGORY
LeafsetExtension-PT-S32C3-CTLFireability-00:
LeafsetExtension-PT-S32C3-CTLFireability-01:
LeafsetExtension-PT-S32C3-CTLFireability-02:
LeafsetExtension-PT-S32C3-CTLFireability-03:
LeafsetExtension-PT-S32C3-CTLFireability-04:
LeafsetExtension-PT-S32C3-CTLFireability-05:
LeafsetExtension-PT-S32C3-CTLFireability-06:
LeafsetExtension-PT-S32C3-CTLFireability-07:
LeafsetExtension-PT-S32C3-CTLFireability-08:
LeafsetExtension-PT-S32C3-CTLFireability-09:
LeafsetExtension-PT-S32C3-CTLFireability-10:
LeafsetExtension-PT-S32C3-CTLFireability-11:
LeafsetExtension-PT-S32C3-CTLFireability-12:
LeafsetExtension-PT-S32C3-CTLFireability-13:
LeafsetExtension-PT-S32C3-CTLFireability-14:
LeafsetExtension-PT-S32C3-CTLFireability-15:

TASK CATEGORY TYPE TIME/TLIMIT
60 CTL EXCL 100/209

Time elapsed: 341 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY

PENDING FORMULAS: CATEGORY
LeafsetExtension-PT-S32C3-CTLFireability-00:
LeafsetExtension-PT-S32C3-CTLFireability-01:
LeafsetExtension-PT-S32C3-CTLFireability-02:
LeafsetExtension-PT-S32C3-CTLFireability-03:
LeafsetExtension-PT-S32C3-CTLFireability-04:
LeafsetExtension-PT-S32C3-CTLFireability-05:
LeafsetExtension-PT-S32C3-CTLFireability-06:
LeafsetExtension-PT-S32C3-CTLFireability-07:
LeafsetExtension-PT-S32C3-CTLFireability-08:
LeafsetExtension-PT-S32C3-CTLFireability-09:
LeafsetExtension-PT-S32C3-CTLFireability-10:
LeafsetExtension-PT-S32C3-CTLFireability-11:
LeafsetExtension-PT-S32C3-CTLFireability-12:
LeafsetExtension-PT-S32C3-CTLFireability-13:
LeafsetExtension-PT-S32C3-CTLFireability-14:
LeafsetExtension-PT-S32C3-CTLFireability-15:

TASK CATEGORY TYPE TIME/TLIMIT
60 CTL EXCL 105/209

Time elapsed: 346 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY

PENDING FORMULAS: CATEGORY
LeafsetExtension-PT-S32C3-CTLFireability-00:
LeafsetExtension-PT-S32C3-CTLFireability-01:
LeafsetExtension-PT-S32C3-CTLFireability-02:
LeafsetExtension-PT-S32C3-CTLFireability-03:
LeafsetExtension-PT-S32C3-CTLFireability-04:
LeafsetExtension-PT-S32C3-CTLFireability-05:
LeafsetExtension-PT-S32C3-CTLFireability-06:
LeafsetExtension-PT-S32C3-CTLFireability-07:
LeafsetExtension-PT-S32C3-CTLFireability-08:
LeafsetExtension-PT-S32C3-CTLFireability-09:
LeafsetExtension-PT-S32C3-CTLFireability-10:
LeafsetExtension-PT-S32C3-CTLFireability-11:
LeafsetExtension-PT-S32C3-CTLFireability-12:
LeafsetExtension-PT-S32C3-CTLFireability-13:
LeafsetExtension-PT-S32C3-CTLFireability-14:
LeafsetExtension-PT-S32C3-CTLFireability-15:

TASK CATEGORY TYPE TIME/TLIMIT
60 CTL EXCL 110/209

Time elapsed: 351 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY

PENDING FORMULAS: CATEGORY
LeafsetExtension-PT-S32C3-CTLFireability-00:
LeafsetExtension-PT-S32C3-CTLFireability-01:
LeafsetExtension-PT-S32C3-CTLFireability-02:
LeafsetExtension-PT-S32C3-CTLFireability-03:
LeafsetExtension-PT-S32C3-CTLFireability-04:
LeafsetExtension-PT-S32C3-CTLFireability-05:
LeafsetExtension-PT-S32C3-CTLFireability-06:
LeafsetExtension-PT-S32C3-CTLFireability-07:
LeafsetExtension-PT-S32C3-CTLFireability-08:
LeafsetExtension-PT-S32C3-CTLFireability-09:
LeafsetExtension-PT-S32C3-CTLFireability-10:
LeafsetExtension-PT-S32C3-CTLFireability-11:
LeafsetExtension-PT-S32C3-CTLFireability-12:
LeafsetExtension-PT-S32C3-CTLFireability-13:
LeafsetExtension-PT-S32C3-CTLFireability-14:
LeafsetExtension-PT-S32C3-CTLFireability-15:

TASK CATEGORY TYPE TIME/TLIMIT
60 CTL EXCL 115/209

Time elapsed: 356 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY

PENDING FORMULAS: CATEGORY
LeafsetExtension-PT-S32C3-CTLFireability-00:
LeafsetExtension-PT-S32C3-CTLFireability-01:
LeafsetExtension-PT-S32C3-CTLFireability-02:
LeafsetExtension-PT-S32C3-CTLFireability-03:
LeafsetExtension-PT-S32C3-CTLFireability-04:
LeafsetExtension-PT-S32C3-CTLFireability-05:
LeafsetExtension-PT-S32C3-CTLFireability-06:
LeafsetExtension-PT-S32C3-CTLFireability-07:
LeafsetExtension-PT-S32C3-CTLFireability-08:
LeafsetExtension-PT-S32C3-CTLFireability-09:
LeafsetExtension-PT-S32C3-CTLFireability-10:
LeafsetExtension-PT-S32C3-CTLFireability-11:
LeafsetExtension-PT-S32C3-CTLFireability-12:
LeafsetExtension-PT-S32C3-CTLFireability-13:
LeafsetExtension-PT-S32C3-CTLFireability-14:
LeafsetExtension-PT-S32C3-CTLFireability-15:

TASK CATEGORY TYPE TIME/TLIMIT
60 CTL EXCL 120/209

Time elapsed: 361 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY

PENDING FORMULAS: CATEGORY
LeafsetExtension-PT-S32C3-CTLFireability-00:
LeafsetExtension-PT-S32C3-CTLFireability-01:
LeafsetExtension-PT-S32C3-CTLFireability-02:
LeafsetExtension-PT-S32C3-CTLFireability-03:
LeafsetExtension-PT-S32C3-CTLFireability-04:
LeafsetExtension-PT-S32C3-CTLFireability-05:
LeafsetExtension-PT-S32C3-CTLFireability-06:
LeafsetExtension-PT-S32C3-CTLFireability-07:
LeafsetExtension-PT-S32C3-CTLFireability-08:
LeafsetExtension-PT-S32C3-CTLFireability-09:
LeafsetExtension-PT-S32C3-CTLFireability-10:
LeafsetExtension-PT-S32C3-CTLFireability-11:
LeafsetExtension-PT-S32C3-CTLFireability-12:
LeafsetExtension-PT-S32C3-CTLFireability-13:
LeafsetExtension-PT-S32C3-CTLFireability-14:
LeafsetExtension-PT-S32C3-CTLFireability-15:

TASK CATEGORY TYPE TIME/TLIMIT
60 CTL EXCL 125/209

Time elapsed: 366 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
lola: CANCELED task # 60 (type EXCL)
FINISHED FORMULA: CATEGORY

PENDING FORMULAS: CATEGORY
LeafsetExtension-PT-S32C3-CTLFireability-00:
LeafsetExtension-PT-S32C3-CTLFireability-01:
LeafsetExtension-PT-S32C3-CTLFireability-02:
LeafsetExtension-PT-S32C3-CTLFireability-03:
LeafsetExtension-PT-S32C3-CTLFireability-04:
LeafsetExtension-PT-S32C3-CTLFireability-05:
LeafsetExtension-PT-S32C3-CTLFireability-06:
LeafsetExtension-PT-S32C3-CTLFireability-07:
LeafsetExtension-PT-S32C3-CTLFireability-08:
LeafsetExtension-PT-S32C3-CTLFireability-09:
LeafsetExtension-PT-S32C3-CTLFireability-10:
LeafsetExtension-PT-S32C3-CTLFireability-11:
LeafsetExtension-PT-S32C3-CTLFireability-12:
LeafsetExtension-PT-S32C3-CTLFireability-13:
LeafsetExtension-PT-S32C3-CTLFireability-14:
LeafsetExtension-PT-S32C3-CTLFireability-15:

TASK CATEGORY TYPE TIME/TLIMIT

Time elapsed: 371 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
lola: LAUNCH task # 41 (type EXCL)
lola: time limit : 215 sec
lola: memory limit: 32 pages
lola: FINISHED task # 41 (type EXCL)
lola: result : true
lola: markings :
lola: fired transitions :
lola: time used :
lola: memory pages used :
lola: LAUNCH task # 34 (type EXCL)
lola: time limit : 230 sec
lola: memory limit: 32 pages
lola: FINISHED task # 34 (type EXCL)
lola: result : true
lola: markings :
lola: fired transitions :
lola: time used :
lola: memory pages used :
lola: LAUNCH task # 22 (type EXCL)
lola: time limit : 248 sec
lola: memory limit: 32 pages
lola: FINISHED task # 22 (type EXCL)
lola: result : true
lola: markings :
lola: fired transitions :
lola: time used :
lola: memory pages used :
lola: LAUNCH task # 16 (type EXCL)
lola: time limit : 269 sec
lola: memory limit: 32 pages
lola: FINISHED task # 16 (type EXCL)
lola: result : true
lola: markings :
lola: fired transitions :
lola: time used :
lola: memory pages used :
lola: LAUNCH task # 13 (type EXCL)
lola: time limit : 293 sec
lola: memory limit: 32 pages
lola: FINISHED task # 13 (type EXCL)
lola: result : false
lola: markings :
lola: fired transitions :
lola: time used :
lola: memory pages used :
lola: LAUNCH task # 10 (type EXCL)
lola: time limit : 322 sec
lola: memory limit: 32 pages
FINISHED FORMULA: CATEGORY
LeafsetExtension-PT-S32C3-CTLFireability-04:
LeafsetExtension-PT-S32C3-CTLFireability-05:
LeafsetExtension-PT-S32C3-CTLFireability-07:
LeafsetExtension-PT-S32C3-CTLFireability-11:

PENDING FORMULAS: CATEGORY
LeafsetExtension-PT-S32C3-CTLFireability-00:
LeafsetExtension-PT-S32C3-CTLFireability-01:
LeafsetExtension-PT-S32C3-CTLFireability-02:
LeafsetExtension-PT-S32C3-CTLFireability-03:
LeafsetExtension-PT-S32C3-CTLFireability-06:
LeafsetExtension-PT-S32C3-CTLFireability-08:
LeafsetExtension-PT-S32C3-CTLFireability-09:
LeafsetExtension-PT-S32C3-CTLFireability-10:
LeafsetExtension-PT-S32C3-CTLFireability-12:
LeafsetExtension-PT-S32C3-CTLFireability-13:
LeafsetExtension-PT-S32C3-CTLFireability-14:
LeafsetExtension-PT-S32C3-CTLFireability-15:

TASK CATEGORY TYPE TIME/TLIMIT
10 CTL EXCL 3/322

Time elapsed: 376 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY
LeafsetExtension-PT-S32C3-CTLFireability-04:
LeafsetExtension-PT-S32C3-CTLFireability-05:
LeafsetExtension-PT-S32C3-CTLFireability-07:
LeafsetExtension-PT-S32C3-CTLFireability-11:

PENDING FORMULAS: CATEGORY
LeafsetExtension-PT-S32C3-CTLFireability-00:
LeafsetExtension-PT-S32C3-CTLFireability-01:
LeafsetExtension-PT-S32C3-CTLFireability-02:
LeafsetExtension-PT-S32C3-CTLFireability-03:
LeafsetExtension-PT-S32C3-CTLFireability-06:
LeafsetExtension-PT-S32C3-CTLFireability-08:
LeafsetExtension-PT-S32C3-CTLFireability-09:
LeafsetExtension-PT-S32C3-CTLFireability-10:
LeafsetExtension-PT-S32C3-CTLFireability-12:
LeafsetExtension-PT-S32C3-CTLFireability-13:
LeafsetExtension-PT-S32C3-CTLFireability-14:
LeafsetExtension-PT-S32C3-CTLFireability-15:

TASK CATEGORY TYPE TIME/TLIMIT
10 CTL EXCL 8/322

Time elapsed: 381 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY
LeafsetExtension-PT-S32C3-CTLFireability-04:
LeafsetExtension-PT-S32C3-CTLFireability-05:
LeafsetExtension-PT-S32C3-CTLFireability-07:
LeafsetExtension-PT-S32C3-CTLFireability-11:

PENDING FORMULAS: CATEGORY
LeafsetExtension-PT-S32C3-CTLFireability-00:
LeafsetExtension-PT-S32C3-CTLFireability-01:
LeafsetExtension-PT-S32C3-CTLFireability-02:
LeafsetExtension-PT-S32C3-CTLFireability-03:
LeafsetExtension-PT-S32C3-CTLFireability-06:
LeafsetExtension-PT-S32C3-CTLFireability-08:
LeafsetExtension-PT-S32C3-CTLFireability-09:
LeafsetExtension-PT-S32C3-CTLFireability-10:
LeafsetExtension-PT-S32C3-CTLFireability-12:
LeafsetExtension-PT-S32C3-CTLFireability-13:
LeafsetExtension-PT-S32C3-CTLFireability-14:
LeafsetExtension-PT-S32C3-CTLFireability-15:

TASK CATEGORY TYPE TIME/TLIMIT
10 CTL EXCL 13/322

Time elapsed: 386 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY
LeafsetExtension-PT-S32C3-CTLFireability-04:
LeafsetExtension-PT-S32C3-CTLFireability-05:
LeafsetExtension-PT-S32C3-CTLFireability-07:
LeafsetExtension-PT-S32C3-CTLFireability-11:

PENDING FORMULAS: CATEGORY
LeafsetExtension-PT-S32C3-CTLFireability-00:
LeafsetExtension-PT-S32C3-CTLFireability-01:
LeafsetExtension-PT-S32C3-CTLFireability-02:
LeafsetExtension-PT-S32C3-CTLFireability-03:
LeafsetExtension-PT-S32C3-CTLFireability-06:
LeafsetExtension-PT-S32C3-CTLFireability-08:
LeafsetExtension-PT-S32C3-CTLFireability-09:
LeafsetExtension-PT-S32C3-CTLFireability-10:
LeafsetExtension-PT-S32C3-CTLFireability-12:
LeafsetExtension-PT-S32C3-CTLFireability-13:
LeafsetExtension-PT-S32C3-CTLFireability-14:
LeafsetExtension-PT-S32C3-CTLFireability-15:

TASK CATEGORY TYPE TIME/TLIMIT
10 CTL EXCL 18/322

Time elapsed: 391 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY
LeafsetExtension-PT-S32C3-CTLFireability-04:
LeafsetExtension-PT-S32C3-CTLFireability-05:
LeafsetExtension-PT-S32C3-CTLFireability-07:
LeafsetExtension-PT-S32C3-CTLFireability-11:

PENDING FORMULAS: CATEGORY
LeafsetExtension-PT-S32C3-CTLFireability-00:
LeafsetExtension-PT-S32C3-CTLFireability-01:
LeafsetExtension-PT-S32C3-CTLFireability-02:
LeafsetExtension-PT-S32C3-CTLFireability-03:
LeafsetExtension-PT-S32C3-CTLFireability-06:
LeafsetExtension-PT-S32C3-CTLFireability-08:
LeafsetExtension-PT-S32C3-CTLFireability-09:
LeafsetExtension-PT-S32C3-CTLFireability-10:
LeafsetExtension-PT-S32C3-CTLFireability-12:
LeafsetExtension-PT-S32C3-CTLFireability-13:
LeafsetExtension-PT-S32C3-CTLFireability-14:
LeafsetExtension-PT-S32C3-CTLFireability-15:

TASK CATEGORY TYPE TIME/TLIMIT
10 CTL EXCL 23/322

Time elapsed: 396 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY
LeafsetExtension-PT-S32C3-CTLFireability-04:
LeafsetExtension-PT-S32C3-CTLFireability-05:
LeafsetExtension-PT-S32C3-CTLFireability-07:
LeafsetExtension-PT-S32C3-CTLFireability-11:

PENDING FORMULAS: CATEGORY
LeafsetExtension-PT-S32C3-CTLFireability-00:
LeafsetExtension-PT-S32C3-CTLFireability-01:
LeafsetExtension-PT-S32C3-CTLFireability-02:
LeafsetExtension-PT-S32C3-CTLFireability-03:
LeafsetExtension-PT-S32C3-CTLFireability-06:
LeafsetExtension-PT-S32C3-CTLFireability-08:
LeafsetExtension-PT-S32C3-CTLFireability-09:
LeafsetExtension-PT-S32C3-CTLFireability-10:
LeafsetExtension-PT-S32C3-CTLFireability-12:
LeafsetExtension-PT-S32C3-CTLFireability-13:
LeafsetExtension-PT-S32C3-CTLFireability-14:
LeafsetExtension-PT-S32C3-CTLFireability-15:

TASK CATEGORY TYPE TIME/TLIMIT
10 CTL EXCL 28/322

Time elapsed: 401 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY
LeafsetExtension-PT-S32C3-CTLFireability-04:
LeafsetExtension-PT-S32C3-CTLFireability-05:
LeafsetExtension-PT-S32C3-CTLFireability-07:
LeafsetExtension-PT-S32C3-CTLFireability-11:

PENDING FORMULAS: CATEGORY
LeafsetExtension-PT-S32C3-CTLFireability-00:
LeafsetExtension-PT-S32C3-CTLFireability-01:
LeafsetExtension-PT-S32C3-CTLFireability-02:
LeafsetExtension-PT-S32C3-CTLFireability-03:
LeafsetExtension-PT-S32C3-CTLFireability-06:
LeafsetExtension-PT-S32C3-CTLFireability-08:
LeafsetExtension-PT-S32C3-CTLFireability-09:
LeafsetExtension-PT-S32C3-CTLFireability-10:
LeafsetExtension-PT-S32C3-CTLFireability-12:
LeafsetExtension-PT-S32C3-CTLFireability-13:
LeafsetExtension-PT-S32C3-CTLFireability-14:
LeafsetExtension-PT-S32C3-CTLFireability-15:

TASK CATEGORY TYPE TIME/TLIMIT
10 CTL EXCL 33/322

Time elapsed: 406 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY
LeafsetExtension-PT-S32C3-CTLFireability-04:
LeafsetExtension-PT-S32C3-CTLFireability-05:
LeafsetExtension-PT-S32C3-CTLFireability-07:
LeafsetExtension-PT-S32C3-CTLFireability-11:

PENDING FORMULAS: CATEGORY
LeafsetExtension-PT-S32C3-CTLFireability-00:
LeafsetExtension-PT-S32C3-CTLFireability-01:
LeafsetExtension-PT-S32C3-CTLFireability-02:
LeafsetExtension-PT-S32C3-CTLFireability-03:
LeafsetExtension-PT-S32C3-CTLFireability-06:
LeafsetExtension-PT-S32C3-CTLFireability-08:
LeafsetExtension-PT-S32C3-CTLFireability-09:
LeafsetExtension-PT-S32C3-CTLFireability-10:
LeafsetExtension-PT-S32C3-CTLFireability-12:
LeafsetExtension-PT-S32C3-CTLFireability-13:
LeafsetExtension-PT-S32C3-CTLFireability-14:
LeafsetExtension-PT-S32C3-CTLFireability-15:

TASK CATEGORY TYPE TIME/TLIMIT
10 CTL EXCL 38/322

Time elapsed: 411 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY
LeafsetExtension-PT-S32C3-CTLFireability-04:
LeafsetExtension-PT-S32C3-CTLFireability-05:
LeafsetExtension-PT-S32C3-CTLFireability-07:
LeafsetExtension-PT-S32C3-CTLFireability-11:

PENDING FORMULAS: CATEGORY
LeafsetExtension-PT-S32C3-CTLFireability-00:
LeafsetExtension-PT-S32C3-CTLFireability-01:
LeafsetExtension-PT-S32C3-CTLFireability-02:
LeafsetExtension-PT-S32C3-CTLFireability-03:
LeafsetExtension-PT-S32C3-CTLFireability-06:
LeafsetExtension-PT-S32C3-CTLFireability-08:
LeafsetExtension-PT-S32C3-CTLFireability-09:
LeafsetExtension-PT-S32C3-CTLFireability-10:
LeafsetExtension-PT-S32C3-CTLFireability-12:
LeafsetExtension-PT-S32C3-CTLFireability-13:
LeafsetExtension-PT-S32C3-CTLFireability-14:
LeafsetExtension-PT-S32C3-CTLFireability-15:

TASK CATEGORY TYPE TIME/TLIMIT
10 CTL EXCL 43/322

Time elapsed: 416 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY
LeafsetExtension-PT-S32C3-CTLFireability-04:
LeafsetExtension-PT-S32C3-CTLFireability-05:
LeafsetExtension-PT-S32C3-CTLFireability-07:
LeafsetExtension-PT-S32C3-CTLFireability-11:

PENDING FORMULAS: CATEGORY
LeafsetExtension-PT-S32C3-CTLFireability-00:
LeafsetExtension-PT-S32C3-CTLFireability-01:
LeafsetExtension-PT-S32C3-CTLFireability-02:
LeafsetExtension-PT-S32C3-CTLFireability-03:
LeafsetExtension-PT-S32C3-CTLFireability-06:
LeafsetExtension-PT-S32C3-CTLFireability-08:
LeafsetExtension-PT-S32C3-CTLFireability-09:
LeafsetExtension-PT-S32C3-CTLFireability-10:
LeafsetExtension-PT-S32C3-CTLFireability-12:
LeafsetExtension-PT-S32C3-CTLFireability-13:
LeafsetExtension-PT-S32C3-CTLFireability-14:
LeafsetExtension-PT-S32C3-CTLFireability-15:

TASK CATEGORY TYPE TIME/TLIMIT
10 CTL EXCL 48/322

Time elapsed: 421 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY
LeafsetExtension-PT-S32C3-CTLFireability-04:
LeafsetExtension-PT-S32C3-CTLFireability-05:
LeafsetExtension-PT-S32C3-CTLFireability-07:
LeafsetExtension-PT-S32C3-CTLFireability-11:

PENDING FORMULAS: CATEGORY
LeafsetExtension-PT-S32C3-CTLFireability-00:
LeafsetExtension-PT-S32C3-CTLFireability-01:
LeafsetExtension-PT-S32C3-CTLFireability-02:
LeafsetExtension-PT-S32C3-CTLFireability-03:
LeafsetExtension-PT-S32C3-CTLFireability-06:
LeafsetExtension-PT-S32C3-CTLFireability-08:
LeafsetExtension-PT-S32C3-CTLFireability-09:
LeafsetExtension-PT-S32C3-CTLFireability-10:
LeafsetExtension-PT-S32C3-CTLFireability-12:
LeafsetExtension-PT-S32C3-CTLFireability-13:
LeafsetExtension-PT-S32C3-CTLFireability-14:
LeafsetExtension-PT-S32C3-CTLFireability-15:

TASK CATEGORY TYPE TIME/TLIMIT
10 CTL EXCL 53/322

Time elapsed: 426 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY
LeafsetExtension-PT-S32C3-CTLFireability-04:
LeafsetExtension-PT-S32C3-CTLFireability-05:
LeafsetExtension-PT-S32C3-CTLFireability-07:
LeafsetExtension-PT-S32C3-CTLFireability-11:

PENDING FORMULAS: CATEGORY
LeafsetExtension-PT-S32C3-CTLFireability-00:
LeafsetExtension-PT-S32C3-CTLFireability-01:
LeafsetExtension-PT-S32C3-CTLFireability-02:
LeafsetExtension-PT-S32C3-CTLFireability-03:
LeafsetExtension-PT-S32C3-CTLFireability-06:
LeafsetExtension-PT-S32C3-CTLFireability-08:
LeafsetExtension-PT-S32C3-CTLFireability-09:
LeafsetExtension-PT-S32C3-CTLFireability-10:
LeafsetExtension-PT-S32C3-CTLFireability-12:
LeafsetExtension-PT-S32C3-CTLFireability-13:
LeafsetExtension-PT-S32C3-CTLFireability-14:
LeafsetExtension-PT-S32C3-CTLFireability-15:

TASK CATEGORY TYPE TIME/TLIMIT
10 CTL EXCL 58/322

Time elapsed: 431 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY
LeafsetExtension-PT-S32C3-CTLFireability-04:
LeafsetExtension-PT-S32C3-CTLFireability-05:
LeafsetExtension-PT-S32C3-CTLFireability-07:
LeafsetExtension-PT-S32C3-CTLFireability-11:

PENDING FORMULAS: CATEGORY
LeafsetExtension-PT-S32C3-CTLFireability-00:
LeafsetExtension-PT-S32C3-CTLFireability-01:
LeafsetExtension-PT-S32C3-CTLFireability-02:
LeafsetExtension-PT-S32C3-CTLFireability-03:
LeafsetExtension-PT-S32C3-CTLFireability-06:
LeafsetExtension-PT-S32C3-CTLFireability-08:
LeafsetExtension-PT-S32C3-CTLFireability-09:
LeafsetExtension-PT-S32C3-CTLFireability-10:
LeafsetExtension-PT-S32C3-CTLFireability-12:
LeafsetExtension-PT-S32C3-CTLFireability-13:
LeafsetExtension-PT-S32C3-CTLFireability-14:
LeafsetExtension-PT-S32C3-CTLFireability-15:

TASK CATEGORY TYPE TIME/TLIMIT
10 CTL EXCL 63/322

Time elapsed: 436 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY
LeafsetExtension-PT-S32C3-CTLFireability-04:
LeafsetExtension-PT-S32C3-CTLFireability-05:
LeafsetExtension-PT-S32C3-CTLFireability-07:
LeafsetExtension-PT-S32C3-CTLFireability-11:

PENDING FORMULAS: CATEGORY
LeafsetExtension-PT-S32C3-CTLFireability-00:
LeafsetExtension-PT-S32C3-CTLFireability-01:
LeafsetExtension-PT-S32C3-CTLFireability-02:
LeafsetExtension-PT-S32C3-CTLFireability-03:
LeafsetExtension-PT-S32C3-CTLFireability-06:
LeafsetExtension-PT-S32C3-CTLFireability-08:
LeafsetExtension-PT-S32C3-CTLFireability-09:
LeafsetExtension-PT-S32C3-CTLFireability-10:
LeafsetExtension-PT-S32C3-CTLFireability-12:
LeafsetExtension-PT-S32C3-CTLFireability-13:
LeafsetExtension-PT-S32C3-CTLFireability-14:
LeafsetExtension-PT-S32C3-CTLFireability-15:

TASK CATEGORY TYPE TIME/TLIMIT
10 CTL EXCL 68/322

Time elapsed: 441 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY
LeafsetExtension-PT-S32C3-CTLFireability-04:
LeafsetExtension-PT-S32C3-CTLFireability-05:
LeafsetExtension-PT-S32C3-CTLFireability-07:
LeafsetExtension-PT-S32C3-CTLFireability-11:

PENDING FORMULAS: CATEGORY
LeafsetExtension-PT-S32C3-CTLFireability-00:
LeafsetExtension-PT-S32C3-CTLFireability-01:
LeafsetExtension-PT-S32C3-CTLFireability-02:
LeafsetExtension-PT-S32C3-CTLFireability-03:
LeafsetExtension-PT-S32C3-CTLFireability-06:
LeafsetExtension-PT-S32C3-CTLFireability-08:
LeafsetExtension-PT-S32C3-CTLFireability-09:
LeafsetExtension-PT-S32C3-CTLFireability-10:
LeafsetExtension-PT-S32C3-CTLFireability-12:
LeafsetExtension-PT-S32C3-CTLFireability-13:
LeafsetExtension-PT-S32C3-CTLFireability-14:
LeafsetExtension-PT-S32C3-CTLFireability-15:

TASK CATEGORY TYPE TIME/TLIMIT
10 CTL EXCL 73/322

Time elapsed: 446 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
lola: CANCELED task # 10 (type EXCL)
FINISHED FORMULA: CATEGORY
LeafsetExtension-PT-S32C3-CTLFireability-04:
LeafsetExtension-PT-S32C3-CTLFireability-05:
LeafsetExtension-PT-S32C3-CTLFireability-07:
LeafsetExtension-PT-S32C3-CTLFireability-11:

PENDING FORMULAS: CATEGORY
LeafsetExtension-PT-S32C3-CTLFireability-00:
LeafsetExtension-PT-S32C3-CTLFireability-01:
LeafsetExtension-PT-S32C3-CTLFireability-02:
LeafsetExtension-PT-S32C3-CTLFireability-03:
LeafsetExtension-PT-S32C3-CTLFireability-06:
LeafsetExtension-PT-S32C3-CTLFireability-08:
LeafsetExtension-PT-S32C3-CTLFireability-09:
LeafsetExtension-PT-S32C3-CTLFireability-10:
LeafsetExtension-PT-S32C3-CTLFireability-12:
LeafsetExtension-PT-S32C3-CTLFireability-13:
LeafsetExtension-PT-S32C3-CTLFireability-14:
LeafsetExtension-PT-S32C3-CTLFireability-15:

TASK CATEGORY TYPE TIME/TLIMIT

Time elapsed: 451 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
lola: LAUNCH task # 7 (type EXCL)
lola: time limit : 349 sec
lola: memory limit: 32 pages
lola: FINISHED task # 7 (type EXCL)
lola: result : false
lola: markings :
lola: fired transitions :
lola: time used :
lola: memory pages used :
lola: LAUNCH task # 4 (type EXCL)
lola: time limit : 393 sec
lola: memory limit: 32 pages
lola: FINISHED task # 4 (type EXCL)
lola: result : true
lola: markings :
lola: fired transitions :
lola: time used :
lola: memory pages used :
lola: LAUNCH task # 47 (type EXCL)
lola: time limit : 449 sec
lola: memory limit: 32 pages
FINISHED FORMULA: CATEGORY
LeafsetExtension-PT-S32C3-CTLFireability-01:
LeafsetExtension-PT-S32C3-CTLFireability-02:
LeafsetExtension-PT-S32C3-CTLFireability-04:
LeafsetExtension-PT-S32C3-CTLFireability-05:
LeafsetExtension-PT-S32C3-CTLFireability-07:
LeafsetExtension-PT-S32C3-CTLFireability-11:

PENDING FORMULAS: CATEGORY
LeafsetExtension-PT-S32C3-CTLFireability-00:
LeafsetExtension-PT-S32C3-CTLFireability-03:
LeafsetExtension-PT-S32C3-CTLFireability-06:
LeafsetExtension-PT-S32C3-CTLFireability-08:
LeafsetExtension-PT-S32C3-CTLFireability-09:
LeafsetExtension-PT-S32C3-CTLFireability-10:
LeafsetExtension-PT-S32C3-CTLFireability-12:
LeafsetExtension-PT-S32C3-CTLFireability-13:
LeafsetExtension-PT-S32C3-CTLFireability-14:
LeafsetExtension-PT-S32C3-CTLFireability-15:

TASK CATEGORY TYPE TIME/TLIMIT
47 EG EXCL 5/449

Time elapsed: 456 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY
LeafsetExtension-PT-S32C3-CTLFireability-01:
LeafsetExtension-PT-S32C3-CTLFireability-02:
LeafsetExtension-PT-S32C3-CTLFireability-04:
LeafsetExtension-PT-S32C3-CTLFireability-05:
LeafsetExtension-PT-S32C3-CTLFireability-07:
LeafsetExtension-PT-S32C3-CTLFireability-11:

PENDING FORMULAS: CATEGORY
LeafsetExtension-PT-S32C3-CTLFireability-00:
LeafsetExtension-PT-S32C3-CTLFireability-03:
LeafsetExtension-PT-S32C3-CTLFireability-06:
LeafsetExtension-PT-S32C3-CTLFireability-08:
LeafsetExtension-PT-S32C3-CTLFireability-09:
LeafsetExtension-PT-S32C3-CTLFireability-10:
LeafsetExtension-PT-S32C3-CTLFireability-12:
LeafsetExtension-PT-S32C3-CTLFireability-13:
LeafsetExtension-PT-S32C3-CTLFireability-14:
LeafsetExtension-PT-S32C3-CTLFireability-15:

TASK CATEGORY TYPE TIME/TLIMIT
47 EG EXCL 10/449

Time elapsed: 461 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY
LeafsetExtension-PT-S32C3-CTLFireability-01:
LeafsetExtension-PT-S32C3-CTLFireability-02:
LeafsetExtension-PT-S32C3-CTLFireability-04:
LeafsetExtension-PT-S32C3-CTLFireability-05:
LeafsetExtension-PT-S32C3-CTLFireability-07:
LeafsetExtension-PT-S32C3-CTLFireability-11:

PENDING FORMULAS: CATEGORY
LeafsetExtension-PT-S32C3-CTLFireability-00:
LeafsetExtension-PT-S32C3-CTLFireability-03:
LeafsetExtension-PT-S32C3-CTLFireability-06:
LeafsetExtension-PT-S32C3-CTLFireability-08:
LeafsetExtension-PT-S32C3-CTLFireability-09:
LeafsetExtension-PT-S32C3-CTLFireability-10:
LeafsetExtension-PT-S32C3-CTLFireability-12:
LeafsetExtension-PT-S32C3-CTLFireability-13:
LeafsetExtension-PT-S32C3-CTLFireability-14:
LeafsetExtension-PT-S32C3-CTLFireability-15:

TASK CATEGORY TYPE TIME/TLIMIT
47 EG EXCL 15/449

Time elapsed: 466 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY
LeafsetExtension-PT-S32C3-CTLFireability-01:
LeafsetExtension-PT-S32C3-CTLFireability-02:
LeafsetExtension-PT-S32C3-CTLFireability-04:
LeafsetExtension-PT-S32C3-CTLFireability-05:
LeafsetExtension-PT-S32C3-CTLFireability-07:
LeafsetExtension-PT-S32C3-CTLFireability-11:

PENDING FORMULAS: CATEGORY
LeafsetExtension-PT-S32C3-CTLFireability-00:
LeafsetExtension-PT-S32C3-CTLFireability-03:
LeafsetExtension-PT-S32C3-CTLFireability-06:
LeafsetExtension-PT-S32C3-CTLFireability-08:
LeafsetExtension-PT-S32C3-CTLFireability-09:
LeafsetExtension-PT-S32C3-CTLFireability-10:
LeafsetExtension-PT-S32C3-CTLFireability-12:
LeafsetExtension-PT-S32C3-CTLFireability-13:
LeafsetExtension-PT-S32C3-CTLFireability-14:
LeafsetExtension-PT-S32C3-CTLFireability-15:

TASK CATEGORY TYPE TIME/TLIMIT
47 EG EXCL 20/449

Time elapsed: 471 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY
LeafsetExtension-PT-S32C3-CTLFireability-01:
LeafsetExtension-PT-S32C3-CTLFireability-02:
LeafsetExtension-PT-S32C3-CTLFireability-04:
LeafsetExtension-PT-S32C3-CTLFireability-05:
LeafsetExtension-PT-S32C3-CTLFireability-07:
LeafsetExtension-PT-S32C3-CTLFireability-11:

PENDING FORMULAS: CATEGORY
LeafsetExtension-PT-S32C3-CTLFireability-00:
LeafsetExtension-PT-S32C3-CTLFireability-03:
LeafsetExtension-PT-S32C3-CTLFireability-06:
LeafsetExtension-PT-S32C3-CTLFireability-08:
LeafsetExtension-PT-S32C3-CTLFireability-09:
LeafsetExtension-PT-S32C3-CTLFireability-10:
LeafsetExtension-PT-S32C3-CTLFireability-12:
LeafsetExtension-PT-S32C3-CTLFireability-13:
LeafsetExtension-PT-S32C3-CTLFireability-14:
LeafsetExtension-PT-S32C3-CTLFireability-15:

TASK CATEGORY TYPE TIME/TLIMIT
47 EG EXCL 25/449

Time elapsed: 476 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY
LeafsetExtension-PT-S32C3-CTLFireability-01:
LeafsetExtension-PT-S32C3-CTLFireability-02:
LeafsetExtension-PT-S32C3-CTLFireability-04:
LeafsetExtension-PT-S32C3-CTLFireability-05:
LeafsetExtension-PT-S32C3-CTLFireability-07:
LeafsetExtension-PT-S32C3-CTLFireability-11:

PENDING FORMULAS: CATEGORY
LeafsetExtension-PT-S32C3-CTLFireability-00:
LeafsetExtension-PT-S32C3-CTLFireability-03:
LeafsetExtension-PT-S32C3-CTLFireability-06:
LeafsetExtension-PT-S32C3-CTLFireability-08:
LeafsetExtension-PT-S32C3-CTLFireability-09:
LeafsetExtension-PT-S32C3-CTLFireability-10:
LeafsetExtension-PT-S32C3-CTLFireability-12:
LeafsetExtension-PT-S32C3-CTLFireability-13:
LeafsetExtension-PT-S32C3-CTLFireability-14:
LeafsetExtension-PT-S32C3-CTLFireability-15:

TASK CATEGORY TYPE TIME/TLIMIT
47 EG EXCL 30/449

Time elapsed: 481 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY
LeafsetExtension-PT-S32C3-CTLFireability-01:
LeafsetExtension-PT-S32C3-CTLFireability-02:
LeafsetExtension-PT-S32C3-CTLFireability-04:
LeafsetExtension-PT-S32C3-CTLFireability-05:
LeafsetExtension-PT-S32C3-CTLFireability-07:
LeafsetExtension-PT-S32C3-CTLFireability-11:

PENDING FORMULAS: CATEGORY
LeafsetExtension-PT-S32C3-CTLFireability-00:
LeafsetExtension-PT-S32C3-CTLFireability-03:
LeafsetExtension-PT-S32C3-CTLFireability-06:
LeafsetExtension-PT-S32C3-CTLFireability-08:
LeafsetExtension-PT-S32C3-CTLFireability-09:
LeafsetExtension-PT-S32C3-CTLFireability-10:
LeafsetExtension-PT-S32C3-CTLFireability-12:
LeafsetExtension-PT-S32C3-CTLFireability-13:
LeafsetExtension-PT-S32C3-CTLFireability-14:
LeafsetExtension-PT-S32C3-CTLFireability-15:

TASK CATEGORY TYPE TIME/TLIMIT
47 EG EXCL 35/449

Time elapsed: 486 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY
LeafsetExtension-PT-S32C3-CTLFireability-01:
LeafsetExtension-PT-S32C3-CTLFireability-02:
LeafsetExtension-PT-S32C3-CTLFireability-04:
LeafsetExtension-PT-S32C3-CTLFireability-05:
LeafsetExtension-PT-S32C3-CTLFireability-07:
LeafsetExtension-PT-S32C3-CTLFireability-11:

PENDING FORMULAS: CATEGORY
LeafsetExtension-PT-S32C3-CTLFireability-00:
LeafsetExtension-PT-S32C3-CTLFireability-03:
LeafsetExtension-PT-S32C3-CTLFireability-06:
LeafsetExtension-PT-S32C3-CTLFireability-08:
LeafsetExtension-PT-S32C3-CTLFireability-09:
LeafsetExtension-PT-S32C3-CTLFireability-10:
LeafsetExtension-PT-S32C3-CTLFireability-12:
LeafsetExtension-PT-S32C3-CTLFireability-13:
LeafsetExtension-PT-S32C3-CTLFireability-14:
LeafsetExtension-PT-S32C3-CTLFireability-15:

TASK CATEGORY TYPE TIME/TLIMIT
47 EG EXCL 40/449

Time elapsed: 491 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY
LeafsetExtension-PT-S32C3-CTLFireability-01:
LeafsetExtension-PT-S32C3-CTLFireability-02:
LeafsetExtension-PT-S32C3-CTLFireability-04:
LeafsetExtension-PT-S32C3-CTLFireability-05:
LeafsetExtension-PT-S32C3-CTLFireability-07:
LeafsetExtension-PT-S32C3-CTLFireability-11:

PENDING FORMULAS: CATEGORY
LeafsetExtension-PT-S32C3-CTLFireability-00:
LeafsetExtension-PT-S32C3-CTLFireability-03:
LeafsetExtension-PT-S32C3-CTLFireability-06:
LeafsetExtension-PT-S32C3-CTLFireability-08:
LeafsetExtension-PT-S32C3-CTLFireability-09:
LeafsetExtension-PT-S32C3-CTLFireability-10:
LeafsetExtension-PT-S32C3-CTLFireability-12:
LeafsetExtension-PT-S32C3-CTLFireability-13:
LeafsetExtension-PT-S32C3-CTLFireability-14:
LeafsetExtension-PT-S32C3-CTLFireability-15:

TASK CATEGORY TYPE TIME/TLIMIT
47 EG EXCL 45/449

Time elapsed: 496 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY
LeafsetExtension-PT-S32C3-CTLFireability-01:
LeafsetExtension-PT-S32C3-CTLFireability-02:
LeafsetExtension-PT-S32C3-CTLFireability-04:
LeafsetExtension-PT-S32C3-CTLFireability-05:
LeafsetExtension-PT-S32C3-CTLFireability-07:
LeafsetExtension-PT-S32C3-CTLFireability-11:

PENDING FORMULAS: CATEGORY
LeafsetExtension-PT-S32C3-CTLFireability-00:
LeafsetExtension-PT-S32C3-CTLFireability-03:
LeafsetExtension-PT-S32C3-CTLFireability-06:
LeafsetExtension-PT-S32C3-CTLFireability-08:
LeafsetExtension-PT-S32C3-CTLFireability-09:
LeafsetExtension-PT-S32C3-CTLFireability-10:
LeafsetExtension-PT-S32C3-CTLFireability-12:
LeafsetExtension-PT-S32C3-CTLFireability-13:
LeafsetExtension-PT-S32C3-CTLFireability-14:
LeafsetExtension-PT-S32C3-CTLFireability-15:

TASK CATEGORY TYPE TIME/TLIMIT
47 EG EXCL 50/449

Time elapsed: 501 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
lola: CANCELED task # 47 (type EXCL)
FINISHED FORMULA: CATEGORY
LeafsetExtension-PT-S32C3-CTLFireability-01:
LeafsetExtension-PT-S32C3-CTLFireability-02:
LeafsetExtension-PT-S32C3-CTLFireability-04:
LeafsetExtension-PT-S32C3-CTLFireability-05:
LeafsetExtension-PT-S32C3-CTLFireability-07:
LeafsetExtension-PT-S32C3-CTLFireability-11:

PENDING FORMULAS: CATEGORY
LeafsetExtension-PT-S32C3-CTLFireability-00:
LeafsetExtension-PT-S32C3-CTLFireability-03:
LeafsetExtension-PT-S32C3-CTLFireability-06:
LeafsetExtension-PT-S32C3-CTLFireability-08:
LeafsetExtension-PT-S32C3-CTLFireability-09:
LeafsetExtension-PT-S32C3-CTLFireability-10:
LeafsetExtension-PT-S32C3-CTLFireability-12:
LeafsetExtension-PT-S32C3-CTLFireability-13:
LeafsetExtension-PT-S32C3-CTLFireability-14:
LeafsetExtension-PT-S32C3-CTLFireability-15:

TASK CATEGORY TYPE TIME/TLIMIT

Time elapsed: 506 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
lola: LAUNCH task # 31 (type EXCL)
lola: time limit : 515 sec
lola: memory limit: 32 pages
lola: FINISHED task # 31 (type EXCL)
lola: result : false
lola: markings :
lola: fired transitions :
lola: time used :
lola: memory pages used :
lola: LAUNCH task # 28 (type EXCL)
lola: time limit : 618 sec
lola: memory limit: 32 pages
lola: FINISHED task # 28 (type EXCL)
lola: result : false
lola: markings :
lola: fired transitions :
lola: time used :
lola: memory pages used :
lola: LAUNCH task # 63 (type EXCL)
lola: time limit : 773 sec
lola: memory limit: 32 pages
lola: FINISHED task # 63 (type EXCL)
lola: result : false
lola: markings :
lola: fired transitions :
lola: time used :
lola: memory pages used :
lola: LAUNCH task # 19 (type EXCL)
lola: time limit : 1031 sec
lola: memory limit: 32 pages
FINISHED FORMULA: CATEGORY
LeafsetExtension-PT-S32C3-CTLFireability-01:
LeafsetExtension-PT-S32C3-CTLFireability-02:
LeafsetExtension-PT-S32C3-CTLFireability-04:
LeafsetExtension-PT-S32C3-CTLFireability-05:
LeafsetExtension-PT-S32C3-CTLFireability-07:
LeafsetExtension-PT-S32C3-CTLFireability-09:
LeafsetExtension-PT-S32C3-CTLFireability-10:
LeafsetExtension-PT-S32C3-CTLFireability-11:
LeafsetExtension-PT-S32C3-CTLFireability-14:

PENDING FORMULAS: CATEGORY
LeafsetExtension-PT-S32C3-CTLFireability-00:
LeafsetExtension-PT-S32C3-CTLFireability-03:
LeafsetExtension-PT-S32C3-CTLFireability-06:
LeafsetExtension-PT-S32C3-CTLFireability-08:
LeafsetExtension-PT-S32C3-CTLFireability-12:
LeafsetExtension-PT-S32C3-CTLFireability-13:
LeafsetExtension-PT-S32C3-CTLFireability-15:

TASK CATEGORY TYPE TIME/TLIMIT
19 CTL EXCL 5/1031

Time elapsed: 511 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY
LeafsetExtension-PT-S32C3-CTLFireability-01:
LeafsetExtension-PT-S32C3-CTLFireability-02:
LeafsetExtension-PT-S32C3-CTLFireability-04:
LeafsetExtension-PT-S32C3-CTLFireability-05:
LeafsetExtension-PT-S32C3-CTLFireability-07:
LeafsetExtension-PT-S32C3-CTLFireability-09:
LeafsetExtension-PT-S32C3-CTLFireability-10:
LeafsetExtension-PT-S32C3-CTLFireability-11:
LeafsetExtension-PT-S32C3-CTLFireability-14:

PENDING FORMULAS: CATEGORY
LeafsetExtension-PT-S32C3-CTLFireability-00:
LeafsetExtension-PT-S32C3-CTLFireability-03:
LeafsetExtension-PT-S32C3-CTLFireability-06:
LeafsetExtension-PT-S32C3-CTLFireability-08:
LeafsetExtension-PT-S32C3-CTLFireability-12:
LeafsetExtension-PT-S32C3-CTLFireability-13:
LeafsetExtension-PT-S32C3-CTLFireability-15:

TASK CATEGORY TYPE TIME/TLIMIT
19 CTL EXCL 10/1031

Time elapsed: 516 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY
LeafsetExtension-PT-S32C3-CTLFireability-01:
LeafsetExtension-PT-S32C3-CTLFireability-02:
LeafsetExtension-PT-S32C3-CTLFireability-04:
LeafsetExtension-PT-S32C3-CTLFireability-05:
LeafsetExtension-PT-S32C3-CTLFireability-07:
LeafsetExtension-PT-S32C3-CTLFireability-09:
LeafsetExtension-PT-S32C3-CTLFireability-10:
LeafsetExtension-PT-S32C3-CTLFireability-11:
LeafsetExtension-PT-S32C3-CTLFireability-14:

PENDING FORMULAS: CATEGORY
LeafsetExtension-PT-S32C3-CTLFireability-00:
LeafsetExtension-PT-S32C3-CTLFireability-03:
LeafsetExtension-PT-S32C3-CTLFireability-06:
LeafsetExtension-PT-S32C3-CTLFireability-08:
LeafsetExtension-PT-S32C3-CTLFireability-12:
LeafsetExtension-PT-S32C3-CTLFireability-13:
LeafsetExtension-PT-S32C3-CTLFireability-15:

TASK CATEGORY TYPE TIME/TLIMIT
19 CTL EXCL 15/1031

Time elapsed: 521 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY
LeafsetExtension-PT-S32C3-CTLFireability-01:
LeafsetExtension-PT-S32C3-CTLFireability-02:
LeafsetExtension-PT-S32C3-CTLFireability-04:
LeafsetExtension-PT-S32C3-CTLFireability-05:
LeafsetExtension-PT-S32C3-CTLFireability-07:
LeafsetExtension-PT-S32C3-CTLFireability-09:
LeafsetExtension-PT-S32C3-CTLFireability-10:
LeafsetExtension-PT-S32C3-CTLFireability-11:
LeafsetExtension-PT-S32C3-CTLFireability-14:

PENDING FORMULAS: CATEGORY
LeafsetExtension-PT-S32C3-CTLFireability-00:
LeafsetExtension-PT-S32C3-CTLFireability-03:
LeafsetExtension-PT-S32C3-CTLFireability-06:
LeafsetExtension-PT-S32C3-CTLFireability-08:
LeafsetExtension-PT-S32C3-CTLFireability-12:
LeafsetExtension-PT-S32C3-CTLFireability-13:
LeafsetExtension-PT-S32C3-CTLFireability-15:

TASK CATEGORY TYPE TIME/TLIMIT
19 CTL EXCL 20/1031

Time elapsed: 526 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY
LeafsetExtension-PT-S32C3-CTLFireability-01:
LeafsetExtension-PT-S32C3-CTLFireability-02:
LeafsetExtension-PT-S32C3-CTLFireability-04:
LeafsetExtension-PT-S32C3-CTLFireability-05:
LeafsetExtension-PT-S32C3-CTLFireability-07:
LeafsetExtension-PT-S32C3-CTLFireability-09:
LeafsetExtension-PT-S32C3-CTLFireability-10:
LeafsetExtension-PT-S32C3-CTLFireability-11:
LeafsetExtension-PT-S32C3-CTLFireability-14:

PENDING FORMULAS: CATEGORY
LeafsetExtension-PT-S32C3-CTLFireability-00:
LeafsetExtension-PT-S32C3-CTLFireability-03:
LeafsetExtension-PT-S32C3-CTLFireability-06:
LeafsetExtension-PT-S32C3-CTLFireability-08:
LeafsetExtension-PT-S32C3-CTLFireability-12:
LeafsetExtension-PT-S32C3-CTLFireability-13:
LeafsetExtension-PT-S32C3-CTLFireability-15:

TASK CATEGORY TYPE TIME/TLIMIT
19 CTL EXCL 25/1031

Time elapsed: 531 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY
LeafsetExtension-PT-S32C3-CTLFireability-01:
LeafsetExtension-PT-S32C3-CTLFireability-02:
LeafsetExtension-PT-S32C3-CTLFireability-04:
LeafsetExtension-PT-S32C3-CTLFireability-05:
LeafsetExtension-PT-S32C3-CTLFireability-07:
LeafsetExtension-PT-S32C3-CTLFireability-09:
LeafsetExtension-PT-S32C3-CTLFireability-10:
LeafsetExtension-PT-S32C3-CTLFireability-11:
LeafsetExtension-PT-S32C3-CTLFireability-14:

PENDING FORMULAS: CATEGORY
LeafsetExtension-PT-S32C3-CTLFireability-00:
LeafsetExtension-PT-S32C3-CTLFireability-03:
LeafsetExtension-PT-S32C3-CTLFireability-06:
LeafsetExtension-PT-S32C3-CTLFireability-08:
LeafsetExtension-PT-S32C3-CTLFireability-12:
LeafsetExtension-PT-S32C3-CTLFireability-13:
LeafsetExtension-PT-S32C3-CTLFireability-15:

TASK CATEGORY TYPE TIME/TLIMIT
19 CTL EXCL 30/1031

Time elapsed: 536 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY
LeafsetExtension-PT-S32C3-CTLFireability-01:
LeafsetExtension-PT-S32C3-CTLFireability-02:
LeafsetExtension-PT-S32C3-CTLFireability-04:
LeafsetExtension-PT-S32C3-CTLFireability-05:
LeafsetExtension-PT-S32C3-CTLFireability-07:
LeafsetExtension-PT-S32C3-CTLFireability-09:
LeafsetExtension-PT-S32C3-CTLFireability-10:
LeafsetExtension-PT-S32C3-CTLFireability-11:
LeafsetExtension-PT-S32C3-CTLFireability-14:

PENDING FORMULAS: CATEGORY
LeafsetExtension-PT-S32C3-CTLFireability-00:
LeafsetExtension-PT-S32C3-CTLFireability-03:
LeafsetExtension-PT-S32C3-CTLFireability-06:
LeafsetExtension-PT-S32C3-CTLFireability-08:
LeafsetExtension-PT-S32C3-CTLFireability-12:
LeafsetExtension-PT-S32C3-CTLFireability-13:
LeafsetExtension-PT-S32C3-CTLFireability-15:

TASK CATEGORY TYPE TIME/TLIMIT
19 CTL EXCL 35/1031

Time elapsed: 541 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY
LeafsetExtension-PT-S32C3-CTLFireability-01:
LeafsetExtension-PT-S32C3-CTLFireability-02:
LeafsetExtension-PT-S32C3-CTLFireability-04:
LeafsetExtension-PT-S32C3-CTLFireability-05:
LeafsetExtension-PT-S32C3-CTLFireability-07:
LeafsetExtension-PT-S32C3-CTLFireability-09:
LeafsetExtension-PT-S32C3-CTLFireability-10:
LeafsetExtension-PT-S32C3-CTLFireability-11:
LeafsetExtension-PT-S32C3-CTLFireability-14:

PENDING FORMULAS: CATEGORY
LeafsetExtension-PT-S32C3-CTLFireability-00:
LeafsetExtension-PT-S32C3-CTLFireability-03:
LeafsetExtension-PT-S32C3-CTLFireability-06:
LeafsetExtension-PT-S32C3-CTLFireability-08:
LeafsetExtension-PT-S32C3-CTLFireability-12:
LeafsetExtension-PT-S32C3-CTLFireability-13:
LeafsetExtension-PT-S32C3-CTLFireability-15:

TASK CATEGORY TYPE TIME/TLIMIT
19 CTL EXCL 40/1031

Time elapsed: 546 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY
LeafsetExtension-PT-S32C3-CTLFireability-01:
LeafsetExtension-PT-S32C3-CTLFireability-02:
LeafsetExtension-PT-S32C3-CTLFireability-04:
LeafsetExtension-PT-S32C3-CTLFireability-05:
LeafsetExtension-PT-S32C3-CTLFireability-07:
LeafsetExtension-PT-S32C3-CTLFireability-09:
LeafsetExtension-PT-S32C3-CTLFireability-10:
LeafsetExtension-PT-S32C3-CTLFireability-11:
LeafsetExtension-PT-S32C3-CTLFireability-14:

PENDING FORMULAS: CATEGORY
LeafsetExtension-PT-S32C3-CTLFireability-00:
LeafsetExtension-PT-S32C3-CTLFireability-03:
LeafsetExtension-PT-S32C3-CTLFireability-06:
LeafsetExtension-PT-S32C3-CTLFireability-08:
LeafsetExtension-PT-S32C3-CTLFireability-12:
LeafsetExtension-PT-S32C3-CTLFireability-13:
LeafsetExtension-PT-S32C3-CTLFireability-15:

TASK CATEGORY TYPE TIME/TLIMIT
19 CTL EXCL 45/1031

Time elapsed: 551 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY
LeafsetExtension-PT-S32C3-CTLFireability-01:
LeafsetExtension-PT-S32C3-CTLFireability-02:
LeafsetExtension-PT-S32C3-CTLFireability-04:
LeafsetExtension-PT-S32C3-CTLFireability-05:
LeafsetExtension-PT-S32C3-CTLFireability-07:
LeafsetExtension-PT-S32C3-CTLFireability-09:
LeafsetExtension-PT-S32C3-CTLFireability-10:
LeafsetExtension-PT-S32C3-CTLFireability-11:
LeafsetExtension-PT-S32C3-CTLFireability-14:

PENDING FORMULAS: CATEGORY
LeafsetExtension-PT-S32C3-CTLFireability-00:
LeafsetExtension-PT-S32C3-CTLFireability-03:
LeafsetExtension-PT-S32C3-CTLFireability-06:
LeafsetExtension-PT-S32C3-CTLFireability-08:
LeafsetExtension-PT-S32C3-CTLFireability-12:
LeafsetExtension-PT-S32C3-CTLFireability-13:
LeafsetExtension-PT-S32C3-CTLFireability-15:

TASK CATEGORY TYPE TIME/TLIMIT
19 CTL EXCL 50/1031

Time elapsed: 556 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY
LeafsetExtension-PT-S32C3-CTLFireability-01:
LeafsetExtension-PT-S32C3-CTLFireability-02:
LeafsetExtension-PT-S32C3-CTLFireability-04:
LeafsetExtension-PT-S32C3-CTLFireability-05:
LeafsetExtension-PT-S32C3-CTLFireability-07:
LeafsetExtension-PT-S32C3-CTLFireability-09:
LeafsetExtension-PT-S32C3-CTLFireability-10:
LeafsetExtension-PT-S32C3-CTLFireability-11:
LeafsetExtension-PT-S32C3-CTLFireability-14:

PENDING FORMULAS: CATEGORY
LeafsetExtension-PT-S32C3-CTLFireability-00:
LeafsetExtension-PT-S32C3-CTLFireability-03:
LeafsetExtension-PT-S32C3-CTLFireability-06:
LeafsetExtension-PT-S32C3-CTLFireability-08:
LeafsetExtension-PT-S32C3-CTLFireability-12:
LeafsetExtension-PT-S32C3-CTLFireability-13:
LeafsetExtension-PT-S32C3-CTLFireability-15:

TASK CATEGORY TYPE TIME/TLIMIT
19 CTL EXCL 55/1031

Time elapsed: 561 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY
LeafsetExtension-PT-S32C3-CTLFireability-01:
LeafsetExtension-PT-S32C3-CTLFireability-02:
LeafsetExtension-PT-S32C3-CTLFireability-04:
LeafsetExtension-PT-S32C3-CTLFireability-05:
LeafsetExtension-PT-S32C3-CTLFireability-07:
LeafsetExtension-PT-S32C3-CTLFireability-09:
LeafsetExtension-PT-S32C3-CTLFireability-10:
LeafsetExtension-PT-S32C3-CTLFireability-11:
LeafsetExtension-PT-S32C3-CTLFireability-14:

PENDING FORMULAS: CATEGORY
LeafsetExtension-PT-S32C3-CTLFireability-00:
LeafsetExtension-PT-S32C3-CTLFireability-03:
LeafsetExtension-PT-S32C3-CTLFireability-06:
LeafsetExtension-PT-S32C3-CTLFireability-08:
LeafsetExtension-PT-S32C3-CTLFireability-12:
LeafsetExtension-PT-S32C3-CTLFireability-13:
LeafsetExtension-PT-S32C3-CTLFireability-15:

TASK CATEGORY TYPE TIME/TLIMIT
19 CTL EXCL 60/1031

Time elapsed: 566 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY
LeafsetExtension-PT-S32C3-CTLFireability-01:
LeafsetExtension-PT-S32C3-CTLFireability-02:
LeafsetExtension-PT-S32C3-CTLFireability-04:
LeafsetExtension-PT-S32C3-CTLFireability-05:
LeafsetExtension-PT-S32C3-CTLFireability-07:
LeafsetExtension-PT-S32C3-CTLFireability-09:
LeafsetExtension-PT-S32C3-CTLFireability-10:
LeafsetExtension-PT-S32C3-CTLFireability-11:
LeafsetExtension-PT-S32C3-CTLFireability-14:

PENDING FORMULAS: CATEGORY
LeafsetExtension-PT-S32C3-CTLFireability-00:
LeafsetExtension-PT-S32C3-CTLFireability-03:
LeafsetExtension-PT-S32C3-CTLFireability-06:
LeafsetExtension-PT-S32C3-CTLFireability-08:
LeafsetExtension-PT-S32C3-CTLFireability-12:
LeafsetExtension-PT-S32C3-CTLFireability-13:
LeafsetExtension-PT-S32C3-CTLFireability-15:

TASK CATEGORY TYPE TIME/TLIMIT
19 CTL EXCL 65/1031

Time elapsed: 571 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY
LeafsetExtension-PT-S32C3-CTLFireability-01:
LeafsetExtension-PT-S32C3-CTLFireability-02:
LeafsetExtension-PT-S32C3-CTLFireability-04:
LeafsetExtension-PT-S32C3-CTLFireability-05:
LeafsetExtension-PT-S32C3-CTLFireability-07:
LeafsetExtension-PT-S32C3-CTLFireability-09:
LeafsetExtension-PT-S32C3-CTLFireability-10:
LeafsetExtension-PT-S32C3-CTLFireability-11:
LeafsetExtension-PT-S32C3-CTLFireability-14:

PENDING FORMULAS: CATEGORY
LeafsetExtension-PT-S32C3-CTLFireability-00:
LeafsetExtension-PT-S32C3-CTLFireability-03:
LeafsetExtension-PT-S32C3-CTLFireability-06:
LeafsetExtension-PT-S32C3-CTLFireability-08:
LeafsetExtension-PT-S32C3-CTLFireability-12:
LeafsetExtension-PT-S32C3-CTLFireability-13:
LeafsetExtension-PT-S32C3-CTLFireability-15:

TASK CATEGORY TYPE TIME/TLIMIT
19 CTL EXCL 70/1031

Time elapsed: 576 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY
LeafsetExtension-PT-S32C3-CTLFireability-01:
LeafsetExtension-PT-S32C3-CTLFireability-02:
LeafsetExtension-PT-S32C3-CTLFireability-04:
LeafsetExtension-PT-S32C3-CTLFireability-05:
LeafsetExtension-PT-S32C3-CTLFireability-07:
LeafsetExtension-PT-S32C3-CTLFireability-09:
LeafsetExtension-PT-S32C3-CTLFireability-10:
LeafsetExtension-PT-S32C3-CTLFireability-11:
LeafsetExtension-PT-S32C3-CTLFireability-14:

PENDING FORMULAS: CATEGORY
LeafsetExtension-PT-S32C3-CTLFireability-00:
LeafsetExtension-PT-S32C3-CTLFireability-03:
LeafsetExtension-PT-S32C3-CTLFireability-06:
LeafsetExtension-PT-S32C3-CTLFireability-08:
LeafsetExtension-PT-S32C3-CTLFireability-12:
LeafsetExtension-PT-S32C3-CTLFireability-13:
LeafsetExtension-PT-S32C3-CTLFireability-15:

TASK CATEGORY TYPE TIME/TLIMIT
19 CTL EXCL 75/1031

Time elapsed: 581 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY
LeafsetExtension-PT-S32C3-CTLFireability-01:
LeafsetExtension-PT-S32C3-CTLFireability-02:
LeafsetExtension-PT-S32C3-CTLFireability-04:
LeafsetExtension-PT-S32C3-CTLFireability-05:
LeafsetExtension-PT-S32C3-CTLFireability-07:
LeafsetExtension-PT-S32C3-CTLFireability-09:
LeafsetExtension-PT-S32C3-CTLFireability-10:
LeafsetExtension-PT-S32C3-CTLFireability-11:
LeafsetExtension-PT-S32C3-CTLFireability-14:

PENDING FORMULAS: CATEGORY
LeafsetExtension-PT-S32C3-CTLFireability-00:
LeafsetExtension-PT-S32C3-CTLFireability-03:
LeafsetExtension-PT-S32C3-CTLFireability-06:
LeafsetExtension-PT-S32C3-CTLFireability-08:
LeafsetExtension-PT-S32C3-CTLFireability-12:
LeafsetExtension-PT-S32C3-CTLFireability-13:
LeafsetExtension-PT-S32C3-CTLFireability-15:

TASK CATEGORY TYPE TIME/TLIMIT
19 CTL EXCL 80/1031

Time elapsed: 586 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY
LeafsetExtension-PT-S32C3-CTLFireability-01:
LeafsetExtension-PT-S32C3-CTLFireability-02:
LeafsetExtension-PT-S32C3-CTLFireability-04:
LeafsetExtension-PT-S32C3-CTLFireability-05:
LeafsetExtension-PT-S32C3-CTLFireability-07:
LeafsetExtension-PT-S32C3-CTLFireability-09:
LeafsetExtension-PT-S32C3-CTLFireability-10:
LeafsetExtension-PT-S32C3-CTLFireability-11:
LeafsetExtension-PT-S32C3-CTLFireability-14:

PENDING FORMULAS: CATEGORY
LeafsetExtension-PT-S32C3-CTLFireability-00:
LeafsetExtension-PT-S32C3-CTLFireability-03:
LeafsetExtension-PT-S32C3-CTLFireability-06:
LeafsetExtension-PT-S32C3-CTLFireability-08:
LeafsetExtension-PT-S32C3-CTLFireability-12:
LeafsetExtension-PT-S32C3-CTLFireability-13:
LeafsetExtension-PT-S32C3-CTLFireability-15:

TASK CATEGORY TYPE TIME/TLIMIT
19 CTL EXCL 85/1031

Time elapsed: 591 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY
LeafsetExtension-PT-S32C3-CTLFireability-01:
LeafsetExtension-PT-S32C3-CTLFireability-02:
LeafsetExtension-PT-S32C3-CTLFireability-04:
LeafsetExtension-PT-S32C3-CTLFireability-05:
LeafsetExtension-PT-S32C3-CTLFireability-07:
LeafsetExtension-PT-S32C3-CTLFireability-09:
LeafsetExtension-PT-S32C3-CTLFireability-10:
LeafsetExtension-PT-S32C3-CTLFireability-11:
LeafsetExtension-PT-S32C3-CTLFireability-14:

PENDING FORMULAS: CATEGORY
LeafsetExtension-PT-S32C3-CTLFireability-00:
LeafsetExtension-PT-S32C3-CTLFireability-03:
LeafsetExtension-PT-S32C3-CTLFireability-06:
LeafsetExtension-PT-S32C3-CTLFireability-08:
LeafsetExtension-PT-S32C3-CTLFireability-12:
LeafsetExtension-PT-S32C3-CTLFireability-13:
LeafsetExtension-PT-S32C3-CTLFireability-15:

TASK CATEGORY TYPE TIME/TLIMIT
19 CTL EXCL 90/1031

Time elapsed: 596 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY
LeafsetExtension-PT-S32C3-CTLFireability-01:
LeafsetExtension-PT-S32C3-CTLFireability-02:
LeafsetExtension-PT-S32C3-CTLFireability-04:
LeafsetExtension-PT-S32C3-CTLFireability-05:
LeafsetExtension-PT-S32C3-CTLFireability-07:
LeafsetExtension-PT-S32C3-CTLFireability-09:
LeafsetExtension-PT-S32C3-CTLFireability-10:
LeafsetExtension-PT-S32C3-CTLFireability-11:
LeafsetExtension-PT-S32C3-CTLFireability-14:

PENDING FORMULAS: CATEGORY
LeafsetExtension-PT-S32C3-CTLFireability-00:
LeafsetExtension-PT-S32C3-CTLFireability-03:
LeafsetExtension-PT-S32C3-CTLFireability-06:
LeafsetExtension-PT-S32C3-CTLFireability-08:
LeafsetExtension-PT-S32C3-CTLFireability-12:
LeafsetExtension-PT-S32C3-CTLFireability-13:
LeafsetExtension-PT-S32C3-CTLFireability-15:

TASK CATEGORY TYPE TIME/TLIMIT
19 CTL EXCL 95/1031

Time elapsed: 601 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY
LeafsetExtension-PT-S32C3-CTLFireability-01:
LeafsetExtension-PT-S32C3-CTLFireability-02:
LeafsetExtension-PT-S32C3-CTLFireability-04:
LeafsetExtension-PT-S32C3-CTLFireability-05:
LeafsetExtension-PT-S32C3-CTLFireability-07:
LeafsetExtension-PT-S32C3-CTLFireability-09:
LeafsetExtension-PT-S32C3-CTLFireability-10:
LeafsetExtension-PT-S32C3-CTLFireability-11:
LeafsetExtension-PT-S32C3-CTLFireability-14:

PENDING FORMULAS: CATEGORY
LeafsetExtension-PT-S32C3-CTLFireability-00:
LeafsetExtension-PT-S32C3-CTLFireability-03:
LeafsetExtension-PT-S32C3-CTLFireability-06:
LeafsetExtension-PT-S32C3-CTLFireability-08:
LeafsetExtension-PT-S32C3-CTLFireability-12:
LeafsetExtension-PT-S32C3-CTLFireability-13:
LeafsetExtension-PT-S32C3-CTLFireability-15:

TASK CATEGORY TYPE TIME/TLIMIT
19 CTL EXCL 100/1031

Time elapsed: 606 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY
LeafsetExtension-PT-S32C3-CTLFireability-01:
LeafsetExtension-PT-S32C3-CTLFireability-02:
LeafsetExtension-PT-S32C3-CTLFireability-04:
LeafsetExtension-PT-S32C3-CTLFireability-05:
LeafsetExtension-PT-S32C3-CTLFireability-07:
LeafsetExtension-PT-S32C3-CTLFireability-09:
LeafsetExtension-PT-S32C3-CTLFireability-10:
LeafsetExtension-PT-S32C3-CTLFireability-11:
LeafsetExtension-PT-S32C3-CTLFireability-14:

PENDING FORMULAS: CATEGORY
LeafsetExtension-PT-S32C3-CTLFireability-00:
LeafsetExtension-PT-S32C3-CTLFireability-03:
LeafsetExtension-PT-S32C3-CTLFireability-06:
LeafsetExtension-PT-S32C3-CTLFireability-08:
LeafsetExtension-PT-S32C3-CTLFireability-12:
LeafsetExtension-PT-S32C3-CTLFireability-13:
LeafsetExtension-PT-S32C3-CTLFireability-15:

TASK CATEGORY TYPE TIME/TLIMIT
19 CTL EXCL 105/1031

Time elapsed: 611 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY
LeafsetExtension-PT-S32C3-CTLFireability-01:
LeafsetExtension-PT-S32C3-CTLFireability-02:
LeafsetExtension-PT-S32C3-CTLFireability-04:
LeafsetExtension-PT-S32C3-CTLFireability-05:
LeafsetExtension-PT-S32C3-CTLFireability-07:
LeafsetExtension-PT-S32C3-CTLFireability-09:
LeafsetExtension-PT-S32C3-CTLFireability-10:
LeafsetExtension-PT-S32C3-CTLFireability-11:
LeafsetExtension-PT-S32C3-CTLFireability-14:

PENDING FORMULAS: CATEGORY
LeafsetExtension-PT-S32C3-CTLFireability-00:
LeafsetExtension-PT-S32C3-CTLFireability-03:
LeafsetExtension-PT-S32C3-CTLFireability-06:
LeafsetExtension-PT-S32C3-CTLFireability-08:
LeafsetExtension-PT-S32C3-CTLFireability-12:
LeafsetExtension-PT-S32C3-CTLFireability-13:
LeafsetExtension-PT-S32C3-CTLFireability-15:

TASK CATEGORY TYPE TIME/TLIMIT
19 CTL EXCL 110/1031

Time elapsed: 616 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY
LeafsetExtension-PT-S32C3-CTLFireability-01:
LeafsetExtension-PT-S32C3-CTLFireability-02:
LeafsetExtension-PT-S32C3-CTLFireability-04:
LeafsetExtension-PT-S32C3-CTLFireability-05:
LeafsetExtension-PT-S32C3-CTLFireability-07:
LeafsetExtension-PT-S32C3-CTLFireability-09:
LeafsetExtension-PT-S32C3-CTLFireability-10:
LeafsetExtension-PT-S32C3-CTLFireability-11:
LeafsetExtension-PT-S32C3-CTLFireability-14:

PENDING FORMULAS: CATEGORY
LeafsetExtension-PT-S32C3-CTLFireability-00:
LeafsetExtension-PT-S32C3-CTLFireability-03:
LeafsetExtension-PT-S32C3-CTLFireability-06:
LeafsetExtension-PT-S32C3-CTLFireability-08:
LeafsetExtension-PT-S32C3-CTLFireability-12:
LeafsetExtension-PT-S32C3-CTLFireability-13:
LeafsetExtension-PT-S32C3-CTLFireability-15:

TASK CATEGORY TYPE TIME/TLIMIT
19 CTL EXCL 115/1031

Time elapsed: 621 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY
LeafsetExtension-PT-S32C3-CTLFireability-01:
LeafsetExtension-PT-S32C3-CTLFireability-02:
LeafsetExtension-PT-S32C3-CTLFireability-04:
LeafsetExtension-PT-S32C3-CTLFireability-05:
LeafsetExtension-PT-S32C3-CTLFireability-07:
LeafsetExtension-PT-S32C3-CTLFireability-09:
LeafsetExtension-PT-S32C3-CTLFireability-10:
LeafsetExtension-PT-S32C3-CTLFireability-11:
LeafsetExtension-PT-S32C3-CTLFireability-14:

PENDING FORMULAS: CATEGORY
LeafsetExtension-PT-S32C3-CTLFireability-00:
LeafsetExtension-PT-S32C3-CTLFireability-03:
LeafsetExtension-PT-S32C3-CTLFireability-06:
LeafsetExtension-PT-S32C3-CTLFireability-08:
LeafsetExtension-PT-S32C3-CTLFireability-12:
LeafsetExtension-PT-S32C3-CTLFireability-13:
LeafsetExtension-PT-S32C3-CTLFireability-15:

TASK CATEGORY TYPE TIME/TLIMIT
19 CTL EXCL 120/1031

Time elapsed: 626 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY
LeafsetExtension-PT-S32C3-CTLFireability-01:
LeafsetExtension-PT-S32C3-CTLFireability-02:
LeafsetExtension-PT-S32C3-CTLFireability-04:
LeafsetExtension-PT-S32C3-CTLFireability-05:
LeafsetExtension-PT-S32C3-CTLFireability-07:
LeafsetExtension-PT-S32C3-CTLFireability-09:
LeafsetExtension-PT-S32C3-CTLFireability-10:
LeafsetExtension-PT-S32C3-CTLFireability-11:
LeafsetExtension-PT-S32C3-CTLFireability-14:

PENDING FORMULAS: CATEGORY
LeafsetExtension-PT-S32C3-CTLFireability-00:
LeafsetExtension-PT-S32C3-CTLFireability-03:
LeafsetExtension-PT-S32C3-CTLFireability-06:
LeafsetExtension-PT-S32C3-CTLFireability-08:
LeafsetExtension-PT-S32C3-CTLFireability-12:
LeafsetExtension-PT-S32C3-CTLFireability-13:
LeafsetExtension-PT-S32C3-CTLFireability-15:

TASK CATEGORY TYPE TIME/TLIMIT
19 CTL EXCL 125/1031

Time elapsed: 631 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY
LeafsetExtension-PT-S32C3-CTLFireability-01:
LeafsetExtension-PT-S32C3-CTLFireability-02:
LeafsetExtension-PT-S32C3-CTLFireability-04:
LeafsetExtension-PT-S32C3-CTLFireability-05:
LeafsetExtension-PT-S32C3-CTLFireability-07:
LeafsetExtension-PT-S32C3-CTLFireability-09:
LeafsetExtension-PT-S32C3-CTLFireability-10:
LeafsetExtension-PT-S32C3-CTLFireability-11:
LeafsetExtension-PT-S32C3-CTLFireability-14:

PENDING FORMULAS: CATEGORY
LeafsetExtension-PT-S32C3-CTLFireability-00:
LeafsetExtension-PT-S32C3-CTLFireability-03:
LeafsetExtension-PT-S32C3-CTLFireability-06:
LeafsetExtension-PT-S32C3-CTLFireability-08:
LeafsetExtension-PT-S32C3-CTLFireability-12:
LeafsetExtension-PT-S32C3-CTLFireability-13:
LeafsetExtension-PT-S32C3-CTLFireability-15:

TASK CATEGORY TYPE TIME/TLIMIT
19 CTL EXCL 130/1031

Time elapsed: 636 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY
LeafsetExtension-PT-S32C3-CTLFireability-01:
LeafsetExtension-PT-S32C3-CTLFireability-02:
LeafsetExtension-PT-S32C3-CTLFireability-04:
LeafsetExtension-PT-S32C3-CTLFireability-05:
LeafsetExtension-PT-S32C3-CTLFireability-07:
LeafsetExtension-PT-S32C3-CTLFireability-09:
LeafsetExtension-PT-S32C3-CTLFireability-10:
LeafsetExtension-PT-S32C3-CTLFireability-11:
LeafsetExtension-PT-S32C3-CTLFireability-14:

PENDING FORMULAS: CATEGORY
LeafsetExtension-PT-S32C3-CTLFireability-00:
LeafsetExtension-PT-S32C3-CTLFireability-03:
LeafsetExtension-PT-S32C3-CTLFireability-06:
LeafsetExtension-PT-S32C3-CTLFireability-08:
LeafsetExtension-PT-S32C3-CTLFireability-12:
LeafsetExtension-PT-S32C3-CTLFireability-13:
LeafsetExtension-PT-S32C3-CTLFireability-15:

TASK CATEGORY TYPE TIME/TLIMIT
19 CTL EXCL 135/1031

Time elapsed: 641 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY
LeafsetExtension-PT-S32C3-CTLFireability-01:
LeafsetExtension-PT-S32C3-CTLFireability-02:
LeafsetExtension-PT-S32C3-CTLFireability-04:
LeafsetExtension-PT-S32C3-CTLFireability-05:
LeafsetExtension-PT-S32C3-CTLFireability-07:
LeafsetExtension-PT-S32C3-CTLFireability-09:
LeafsetExtension-PT-S32C3-CTLFireability-10:
LeafsetExtension-PT-S32C3-CTLFireability-11:
LeafsetExtension-PT-S32C3-CTLFireability-14:

PENDING FORMULAS: CATEGORY
LeafsetExtension-PT-S32C3-CTLFireability-00:
LeafsetExtension-PT-S32C3-CTLFireability-03:
LeafsetExtension-PT-S32C3-CTLFireability-06:
LeafsetExtension-PT-S32C3-CTLFireability-08:
LeafsetExtension-PT-S32C3-CTLFireability-12:
LeafsetExtension-PT-S32C3-CTLFireability-13:
LeafsetExtension-PT-S32C3-CTLFireability-15:

TASK CATEGORY TYPE TIME/TLIMIT
19 CTL EXCL 140/1031

Time elapsed: 646 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY
LeafsetExtension-PT-S32C3-CTLFireability-01:
LeafsetExtension-PT-S32C3-CTLFireability-02:
LeafsetExtension-PT-S32C3-CTLFireability-04:
LeafsetExtension-PT-S32C3-CTLFireability-05:
LeafsetExtension-PT-S32C3-CTLFireability-07:
LeafsetExtension-PT-S32C3-CTLFireability-09:
LeafsetExtension-PT-S32C3-CTLFireability-10:
LeafsetExtension-PT-S32C3-CTLFireability-11:
LeafsetExtension-PT-S32C3-CTLFireability-14:

PENDING FORMULAS: CATEGORY
LeafsetExtension-PT-S32C3-CTLFireability-00:
LeafsetExtension-PT-S32C3-CTLFireability-03:
LeafsetExtension-PT-S32C3-CTLFireability-06:
LeafsetExtension-PT-S32C3-CTLFireability-08:
LeafsetExtension-PT-S32C3-CTLFireability-12:
LeafsetExtension-PT-S32C3-CTLFireability-13:
LeafsetExtension-PT-S32C3-CTLFireability-15:

TASK CATEGORY TYPE TIME/TLIMIT
19 CTL EXCL 145/1031

Time elapsed: 651 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY
LeafsetExtension-PT-S32C3-CTLFireability-01:
LeafsetExtension-PT-S32C3-CTLFireability-02:
LeafsetExtension-PT-S32C3-CTLFireability-04:
LeafsetExtension-PT-S32C3-CTLFireability-05:
LeafsetExtension-PT-S32C3-CTLFireability-07:
LeafsetExtension-PT-S32C3-CTLFireability-09:
LeafsetExtension-PT-S32C3-CTLFireability-10:
LeafsetExtension-PT-S32C3-CTLFireability-11:
LeafsetExtension-PT-S32C3-CTLFireability-14:

PENDING FORMULAS: CATEGORY
LeafsetExtension-PT-S32C3-CTLFireability-00:
LeafsetExtension-PT-S32C3-CTLFireability-03:
LeafsetExtension-PT-S32C3-CTLFireability-06:
LeafsetExtension-PT-S32C3-CTLFireability-08:
LeafsetExtension-PT-S32C3-CTLFireability-12:
LeafsetExtension-PT-S32C3-CTLFireability-13:
LeafsetExtension-PT-S32C3-CTLFireability-15:

TASK CATEGORY TYPE TIME/TLIMIT
19 CTL EXCL 150/1031

Time elapsed: 656 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY
LeafsetExtension-PT-S32C3-CTLFireability-01:
LeafsetExtension-PT-S32C3-CTLFireability-02:
LeafsetExtension-PT-S32C3-CTLFireability-04:
LeafsetExtension-PT-S32C3-CTLFireability-05:
LeafsetExtension-PT-S32C3-CTLFireability-07:
LeafsetExtension-PT-S32C3-CTLFireability-09:
LeafsetExtension-PT-S32C3-CTLFireability-10:
LeafsetExtension-PT-S32C3-CTLFireability-11:
LeafsetExtension-PT-S32C3-CTLFireability-14:

PENDING FORMULAS: CATEGORY
LeafsetExtension-PT-S32C3-CTLFireability-00:
LeafsetExtension-PT-S32C3-CTLFireability-03:
LeafsetExtension-PT-S32C3-CTLFireability-06:
LeafsetExtension-PT-S32C3-CTLFireability-08:
LeafsetExtension-PT-S32C3-CTLFireability-12:
LeafsetExtension-PT-S32C3-CTLFireability-13:
LeafsetExtension-PT-S32C3-CTLFireability-15:

TASK CATEGORY TYPE TIME/TLIMIT
19 CTL EXCL 155/1031

Time elapsed: 661 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY
LeafsetExtension-PT-S32C3-CTLFireability-01:
LeafsetExtension-PT-S32C3-CTLFireability-02:
LeafsetExtension-PT-S32C3-CTLFireability-04:
LeafsetExtension-PT-S32C3-CTLFireability-05:
LeafsetExtension-PT-S32C3-CTLFireability-07:
LeafsetExtension-PT-S32C3-CTLFireability-09:
LeafsetExtension-PT-S32C3-CTLFireability-10:
LeafsetExtension-PT-S32C3-CTLFireability-11:
LeafsetExtension-PT-S32C3-CTLFireability-14:

PENDING FORMULAS: CATEGORY
LeafsetExtension-PT-S32C3-CTLFireability-00:
LeafsetExtension-PT-S32C3-CTLFireability-03:
LeafsetExtension-PT-S32C3-CTLFireability-06:
LeafsetExtension-PT-S32C3-CTLFireability-08:
LeafsetExtension-PT-S32C3-CTLFireability-12:
LeafsetExtension-PT-S32C3-CTLFireability-13:
LeafsetExtension-PT-S32C3-CTLFireability-15:

TASK CATEGORY TYPE TIME/TLIMIT
19 CTL EXCL 160/1031

Time elapsed: 666 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY
LeafsetExtension-PT-S32C3-CTLFireability-01:
LeafsetExtension-PT-S32C3-CTLFireability-02:
LeafsetExtension-PT-S32C3-CTLFireability-04:
LeafsetExtension-PT-S32C3-CTLFireability-05:
LeafsetExtension-PT-S32C3-CTLFireability-07:
LeafsetExtension-PT-S32C3-CTLFireability-09:
LeafsetExtension-PT-S32C3-CTLFireability-10:
LeafsetExtension-PT-S32C3-CTLFireability-11:
LeafsetExtension-PT-S32C3-CTLFireability-14:

PENDING FORMULAS: CATEGORY
LeafsetExtension-PT-S32C3-CTLFireability-00:
LeafsetExtension-PT-S32C3-CTLFireability-03:
LeafsetExtension-PT-S32C3-CTLFireability-06:
LeafsetExtension-PT-S32C3-CTLFireability-08:
LeafsetExtension-PT-S32C3-CTLFireability-12:
LeafsetExtension-PT-S32C3-CTLFireability-13:
LeafsetExtension-PT-S32C3-CTLFireability-15:

TASK CATEGORY TYPE TIME/TLIMIT
19 CTL EXCL 165/1031

Time elapsed: 671 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY
LeafsetExtension-PT-S32C3-CTLFireability-01:
LeafsetExtension-PT-S32C3-CTLFireability-02:
LeafsetExtension-PT-S32C3-CTLFireability-04:
LeafsetExtension-PT-S32C3-CTLFireability-05:
LeafsetExtension-PT-S32C3-CTLFireability-07:
LeafsetExtension-PT-S32C3-CTLFireability-09:
LeafsetExtension-PT-S32C3-CTLFireability-10:
LeafsetExtension-PT-S32C3-CTLFireability-11:
LeafsetExtension-PT-S32C3-CTLFireability-14:

PENDING FORMULAS: CATEGORY
LeafsetExtension-PT-S32C3-CTLFireability-00:
LeafsetExtension-PT-S32C3-CTLFireability-03:
LeafsetExtension-PT-S32C3-CTLFireability-06:
LeafsetExtension-PT-S32C3-CTLFireability-08:
LeafsetExtension-PT-S32C3-CTLFireability-12:
LeafsetExtension-PT-S32C3-CTLFireability-13:
LeafsetExtension-PT-S32C3-CTLFireability-15:

TASK CATEGORY TYPE TIME/TLIMIT
19 CTL EXCL 170/1031

Time elapsed: 676 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY
LeafsetExtension-PT-S32C3-CTLFireability-01:
LeafsetExtension-PT-S32C3-CTLFireability-02:
LeafsetExtension-PT-S32C3-CTLFireability-04:
LeafsetExtension-PT-S32C3-CTLFireability-05:
LeafsetExtension-PT-S32C3-CTLFireability-07:
LeafsetExtension-PT-S32C3-CTLFireability-09:
LeafsetExtension-PT-S32C3-CTLFireability-10:
LeafsetExtension-PT-S32C3-CTLFireability-11:
LeafsetExtension-PT-S32C3-CTLFireability-14:

PENDING FORMULAS: CATEGORY
LeafsetExtension-PT-S32C3-CTLFireability-00:
LeafsetExtension-PT-S32C3-CTLFireability-03:
LeafsetExtension-PT-S32C3-CTLFireability-06:
LeafsetExtension-PT-S32C3-CTLFireability-08:
LeafsetExtension-PT-S32C3-CTLFireability-12:
LeafsetExtension-PT-S32C3-CTLFireability-13:
LeafsetExtension-PT-S32C3-CTLFireability-15:

TASK CATEGORY TYPE TIME/TLIMIT
19 CTL EXCL 175/1031

Time elapsed: 681 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY
LeafsetExtension-PT-S32C3-CTLFireability-01:
LeafsetExtension-PT-S32C3-CTLFireability-02:
LeafsetExtension-PT-S32C3-CTLFireability-04:
LeafsetExtension-PT-S32C3-CTLFireability-05:
LeafsetExtension-PT-S32C3-CTLFireability-07:
LeafsetExtension-PT-S32C3-CTLFireability-09:
LeafsetExtension-PT-S32C3-CTLFireability-10:
LeafsetExtension-PT-S32C3-CTLFireability-11:
LeafsetExtension-PT-S32C3-CTLFireability-14:

PENDING FORMULAS: CATEGORY
LeafsetExtension-PT-S32C3-CTLFireability-00:
LeafsetExtension-PT-S32C3-CTLFireability-03:
LeafsetExtension-PT-S32C3-CTLFireability-06:
LeafsetExtension-PT-S32C3-CTLFireability-08:
LeafsetExtension-PT-S32C3-CTLFireability-12:
LeafsetExtension-PT-S32C3-CTLFireability-13:
LeafsetExtension-PT-S32C3-CTLFireability-15:

TASK CATEGORY TYPE TIME/TLIMIT
19 CTL EXCL 180/1031

Time elapsed: 686 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY
LeafsetExtension-PT-S32C3-CTLFireability-01:
LeafsetExtension-PT-S32C3-CTLFireability-02:
LeafsetExtension-PT-S32C3-CTLFireability-04:
LeafsetExtension-PT-S32C3-CTLFireability-05:
LeafsetExtension-PT-S32C3-CTLFireability-07:
LeafsetExtension-PT-S32C3-CTLFireability-09:
LeafsetExtension-PT-S32C3-CTLFireability-10:
LeafsetExtension-PT-S32C3-CTLFireability-11:
LeafsetExtension-PT-S32C3-CTLFireability-14:

PENDING FORMULAS: CATEGORY
LeafsetExtension-PT-S32C3-CTLFireability-00:
LeafsetExtension-PT-S32C3-CTLFireability-03:
LeafsetExtension-PT-S32C3-CTLFireability-06:
LeafsetExtension-PT-S32C3-CTLFireability-08:
LeafsetExtension-PT-S32C3-CTLFireability-12:
LeafsetExtension-PT-S32C3-CTLFireability-13:
LeafsetExtension-PT-S32C3-CTLFireability-15:

TASK CATEGORY TYPE TIME/TLIMIT
19 CTL EXCL 185/1031

Time elapsed: 691 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY
LeafsetExtension-PT-S32C3-CTLFireability-01:
LeafsetExtension-PT-S32C3-CTLFireability-02:
LeafsetExtension-PT-S32C3-CTLFireability-04:
LeafsetExtension-PT-S32C3-CTLFireability-05:
LeafsetExtension-PT-S32C3-CTLFireability-07:
LeafsetExtension-PT-S32C3-CTLFireability-09:
LeafsetExtension-PT-S32C3-CTLFireability-10:
LeafsetExtension-PT-S32C3-CTLFireability-11:
LeafsetExtension-PT-S32C3-CTLFireability-14:

PENDING FORMULAS: CATEGORY
LeafsetExtension-PT-S32C3-CTLFireability-00:
LeafsetExtension-PT-S32C3-CTLFireability-03:
LeafsetExtension-PT-S32C3-CTLFireability-06:
LeafsetExtension-PT-S32C3-CTLFireability-08:
LeafsetExtension-PT-S32C3-CTLFireability-12:
LeafsetExtension-PT-S32C3-CTLFireability-13:
LeafsetExtension-PT-S32C3-CTLFireability-15:

TASK CATEGORY TYPE TIME/TLIMIT
19 CTL EXCL 190/1031

Time elapsed: 696 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY
LeafsetExtension-PT-S32C3-CTLFireability-01:
LeafsetExtension-PT-S32C3-CTLFireability-02:
LeafsetExtension-PT-S32C3-CTLFireability-04:
LeafsetExtension-PT-S32C3-CTLFireability-05:
LeafsetExtension-PT-S32C3-CTLFireability-07:
LeafsetExtension-PT-S32C3-CTLFireability-09:
LeafsetExtension-PT-S32C3-CTLFireability-10:
LeafsetExtension-PT-S32C3-CTLFireability-11:
LeafsetExtension-PT-S32C3-CTLFireability-14:

PENDING FORMULAS: CATEGORY
LeafsetExtension-PT-S32C3-CTLFireability-00:
LeafsetExtension-PT-S32C3-CTLFireability-03:
LeafsetExtension-PT-S32C3-CTLFireability-06:
LeafsetExtension-PT-S32C3-CTLFireability-08:
LeafsetExtension-PT-S32C3-CTLFireability-12:
LeafsetExtension-PT-S32C3-CTLFireability-13:
LeafsetExtension-PT-S32C3-CTLFireability-15:

TASK CATEGORY TYPE TIME/TLIMIT
19 CTL EXCL 195/1031

Time elapsed: 701 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY
LeafsetExtension-PT-S32C3-CTLFireability-01:
LeafsetExtension-PT-S32C3-CTLFireability-02:
LeafsetExtension-PT-S32C3-CTLFireability-04:
LeafsetExtension-PT-S32C3-CTLFireability-05:
LeafsetExtension-PT-S32C3-CTLFireability-07:
LeafsetExtension-PT-S32C3-CTLFireability-09:
LeafsetExtension-PT-S32C3-CTLFireability-10:
LeafsetExtension-PT-S32C3-CTLFireability-11:
LeafsetExtension-PT-S32C3-CTLFireability-14:

PENDING FORMULAS: CATEGORY
LeafsetExtension-PT-S32C3-CTLFireability-00:
LeafsetExtension-PT-S32C3-CTLFireability-03:
LeafsetExtension-PT-S32C3-CTLFireability-06:
LeafsetExtension-PT-S32C3-CTLFireability-08:
LeafsetExtension-PT-S32C3-CTLFireability-12:
LeafsetExtension-PT-S32C3-CTLFireability-13:
LeafsetExtension-PT-S32C3-CTLFireability-15:

TASK CATEGORY TYPE TIME/TLIMIT
19 CTL EXCL 200/1031

Time elapsed: 706 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY
LeafsetExtension-PT-S32C3-CTLFireability-01:
LeafsetExtension-PT-S32C3-CTLFireability-02:
LeafsetExtension-PT-S32C3-CTLFireability-04:
LeafsetExtension-PT-S32C3-CTLFireability-05:
LeafsetExtension-PT-S32C3-CTLFireability-07:
LeafsetExtension-PT-S32C3-CTLFireability-09:
LeafsetExtension-PT-S32C3-CTLFireability-10:
LeafsetExtension-PT-S32C3-CTLFireability-11:
LeafsetExtension-PT-S32C3-CTLFireability-14:

PENDING FORMULAS: CATEGORY
LeafsetExtension-PT-S32C3-CTLFireability-00:
LeafsetExtension-PT-S32C3-CTLFireability-03:
LeafsetExtension-PT-S32C3-CTLFireability-06:
LeafsetExtension-PT-S32C3-CTLFireability-08:
LeafsetExtension-PT-S32C3-CTLFireability-12:
LeafsetExtension-PT-S32C3-CTLFireability-13:
LeafsetExtension-PT-S32C3-CTLFireability-15:

TASK CATEGORY TYPE TIME/TLIMIT
19 CTL EXCL 205/1031

Time elapsed: 711 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY
LeafsetExtension-PT-S32C3-CTLFireability-01:
LeafsetExtension-PT-S32C3-CTLFireability-02:
LeafsetExtension-PT-S32C3-CTLFireability-04:
LeafsetExtension-PT-S32C3-CTLFireability-05:
LeafsetExtension-PT-S32C3-CTLFireability-07:
LeafsetExtension-PT-S32C3-CTLFireability-09:
LeafsetExtension-PT-S32C3-CTLFireability-10:
LeafsetExtension-PT-S32C3-CTLFireability-11:
LeafsetExtension-PT-S32C3-CTLFireability-14:

PENDING FORMULAS: CATEGORY
LeafsetExtension-PT-S32C3-CTLFireability-00:
LeafsetExtension-PT-S32C3-CTLFireability-03:
LeafsetExtension-PT-S32C3-CTLFireability-06:
LeafsetExtension-PT-S32C3-CTLFireability-08:
LeafsetExtension-PT-S32C3-CTLFireability-12:
LeafsetExtension-PT-S32C3-CTLFireability-13:
LeafsetExtension-PT-S32C3-CTLFireability-15:

TASK CATEGORY TYPE TIME/TLIMIT
19 CTL EXCL 210/1031

Time elapsed: 716 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY
LeafsetExtension-PT-S32C3-CTLFireability-01:
LeafsetExtension-PT-S32C3-CTLFireability-02:
LeafsetExtension-PT-S32C3-CTLFireability-04:
LeafsetExtension-PT-S32C3-CTLFireability-05:
LeafsetExtension-PT-S32C3-CTLFireability-07:
LeafsetExtension-PT-S32C3-CTLFireability-09:
LeafsetExtension-PT-S32C3-CTLFireability-10:
LeafsetExtension-PT-S32C3-CTLFireability-11:
LeafsetExtension-PT-S32C3-CTLFireability-14:

PENDING FORMULAS: CATEGORY
LeafsetExtension-PT-S32C3-CTLFireability-00:
LeafsetExtension-PT-S32C3-CTLFireability-03:
LeafsetExtension-PT-S32C3-CTLFireability-06:
LeafsetExtension-PT-S32C3-CTLFireability-08:
LeafsetExtension-PT-S32C3-CTLFireability-12:
LeafsetExtension-PT-S32C3-CTLFireability-13:
LeafsetExtension-PT-S32C3-CTLFireability-15:

TASK CATEGORY TYPE TIME/TLIMIT
19 CTL EXCL 215/1031

Time elapsed: 721 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY
LeafsetExtension-PT-S32C3-CTLFireability-01:
LeafsetExtension-PT-S32C3-CTLFireability-02:
LeafsetExtension-PT-S32C3-CTLFireability-04:
LeafsetExtension-PT-S32C3-CTLFireability-05:
LeafsetExtension-PT-S32C3-CTLFireability-07:
LeafsetExtension-PT-S32C3-CTLFireability-09:
LeafsetExtension-PT-S32C3-CTLFireability-10:
LeafsetExtension-PT-S32C3-CTLFireability-11:
LeafsetExtension-PT-S32C3-CTLFireability-14:

PENDING FORMULAS: CATEGORY
LeafsetExtension-PT-S32C3-CTLFireability-00:
LeafsetExtension-PT-S32C3-CTLFireability-03:
LeafsetExtension-PT-S32C3-CTLFireability-06:
LeafsetExtension-PT-S32C3-CTLFireability-08:
LeafsetExtension-PT-S32C3-CTLFireability-12:
LeafsetExtension-PT-S32C3-CTLFireability-13:
LeafsetExtension-PT-S32C3-CTLFireability-15:

TASK CATEGORY TYPE TIME/TLIMIT
19 CTL EXCL 220/1031

Time elapsed: 726 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY
LeafsetExtension-PT-S32C3-CTLFireability-01:
LeafsetExtension-PT-S32C3-CTLFireability-02:
LeafsetExtension-PT-S32C3-CTLFireability-04:
LeafsetExtension-PT-S32C3-CTLFireability-05:
LeafsetExtension-PT-S32C3-CTLFireability-07:
LeafsetExtension-PT-S32C3-CTLFireability-09:
LeafsetExtension-PT-S32C3-CTLFireability-10:
LeafsetExtension-PT-S32C3-CTLFireability-11:
LeafsetExtension-PT-S32C3-CTLFireability-14:

PENDING FORMULAS: CATEGORY
LeafsetExtension-PT-S32C3-CTLFireability-00:
LeafsetExtension-PT-S32C3-CTLFireability-03:
LeafsetExtension-PT-S32C3-CTLFireability-06:
LeafsetExtension-PT-S32C3-CTLFireability-08:
LeafsetExtension-PT-S32C3-CTLFireability-12:
LeafsetExtension-PT-S32C3-CTLFireability-13:
LeafsetExtension-PT-S32C3-CTLFireability-15:

TASK CATEGORY TYPE TIME/TLIMIT
19 CTL EXCL 225/1031

Time elapsed: 731 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
lola: CANCELED task # 19 (type EXCL)
FINISHED FORMULA: CATEGORY
LeafsetExtension-PT-S32C3-CTLFireability-01:
LeafsetExtension-PT-S32C3-CTLFireability-02:
LeafsetExtension-PT-S32C3-CTLFireability-04:
LeafsetExtension-PT-S32C3-CTLFireability-05:
LeafsetExtension-PT-S32C3-CTLFireability-07:
LeafsetExtension-PT-S32C3-CTLFireability-09:
LeafsetExtension-PT-S32C3-CTLFireability-10:
LeafsetExtension-PT-S32C3-CTLFireability-11:
LeafsetExtension-PT-S32C3-CTLFireability-14:

PENDING FORMULAS: CATEGORY
LeafsetExtension-PT-S32C3-CTLFireability-00:
LeafsetExtension-PT-S32C3-CTLFireability-03:
LeafsetExtension-PT-S32C3-CTLFireability-06:
LeafsetExtension-PT-S32C3-CTLFireability-08:
LeafsetExtension-PT-S32C3-CTLFireability-12:
LeafsetExtension-PT-S32C3-CTLFireability-13:
LeafsetExtension-PT-S32C3-CTLFireability-15:

TASK CATEGORY TYPE TIME/TLIMIT

Time elapsed: 736 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
lola: LAUNCH task # 1 (type EXCL)
lola: time limit : 1432 sec
lola: memory limit: 32 pages
FINISHED FORMULA: CATEGORY
LeafsetExtension-PT-S32C3-CTLFireability-01:
LeafsetExtension-PT-S32C3-CTLFireability-02:
LeafsetExtension-PT-S32C3-CTLFireability-04:
LeafsetExtension-PT-S32C3-CTLFireability-05:
LeafsetExtension-PT-S32C3-CTLFireability-07:
LeafsetExtension-PT-S32C3-CTLFireability-09:
LeafsetExtension-PT-S32C3-CTLFireability-10:
LeafsetExtension-PT-S32C3-CTLFireability-11:
LeafsetExtension-PT-S32C3-CTLFireability-14:

PENDING FORMULAS: CATEGORY
LeafsetExtension-PT-S32C3-CTLFireability-00:
LeafsetExtension-PT-S32C3-CTLFireability-03:
LeafsetExtension-PT-S32C3-CTLFireability-06:
LeafsetExtension-PT-S32C3-CTLFireability-08:
LeafsetExtension-PT-S32C3-CTLFireability-12:
LeafsetExtension-PT-S32C3-CTLFireability-13:
LeafsetExtension-PT-S32C3-CTLFireability-15:

TASK CATEGORY TYPE TIME/TLIMIT
1 CTL EXCL 5/1432

Time elapsed: 741 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY
LeafsetExtension-PT-S32C3-CTLFireability-01:
LeafsetExtension-PT-S32C3-CTLFireability-02:
LeafsetExtension-PT-S32C3-CTLFireability-04:
LeafsetExtension-PT-S32C3-CTLFireability-05:
LeafsetExtension-PT-S32C3-CTLFireability-07:
LeafsetExtension-PT-S32C3-CTLFireability-09:
LeafsetExtension-PT-S32C3-CTLFireability-10:
LeafsetExtension-PT-S32C3-CTLFireability-11:
LeafsetExtension-PT-S32C3-CTLFireability-14:

PENDING FORMULAS: CATEGORY
LeafsetExtension-PT-S32C3-CTLFireability-00:
LeafsetExtension-PT-S32C3-CTLFireability-03:
LeafsetExtension-PT-S32C3-CTLFireability-06:
LeafsetExtension-PT-S32C3-CTLFireability-08:
LeafsetExtension-PT-S32C3-CTLFireability-12:
LeafsetExtension-PT-S32C3-CTLFireability-13:
LeafsetExtension-PT-S32C3-CTLFireability-15:

TASK CATEGORY TYPE TIME/TLIMIT
1 CTL EXCL 10/1432

Time elapsed: 746 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY
LeafsetExtension-PT-S32C3-CTLFireability-01:
LeafsetExtension-PT-S32C3-CTLFireability-02:
LeafsetExtension-PT-S32C3-CTLFireability-04:
LeafsetExtension-PT-S32C3-CTLFireability-05:
LeafsetExtension-PT-S32C3-CTLFireability-07:
LeafsetExtension-PT-S32C3-CTLFireability-09:
LeafsetExtension-PT-S32C3-CTLFireability-10:
LeafsetExtension-PT-S32C3-CTLFireability-11:
LeafsetExtension-PT-S32C3-CTLFireability-14:

PENDING FORMULAS: CATEGORY
LeafsetExtension-PT-S32C3-CTLFireability-00:
LeafsetExtension-PT-S32C3-CTLFireability-03:
LeafsetExtension-PT-S32C3-CTLFireability-06:
LeafsetExtension-PT-S32C3-CTLFireability-08:
LeafsetExtension-PT-S32C3-CTLFireability-12:
LeafsetExtension-PT-S32C3-CTLFireability-13:
LeafsetExtension-PT-S32C3-CTLFireability-15:

TASK CATEGORY TYPE TIME/TLIMIT
1 CTL EXCL 15/1432

Time elapsed: 751 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY
LeafsetExtension-PT-S32C3-CTLFireability-01:
LeafsetExtension-PT-S32C3-CTLFireability-02:
LeafsetExtension-PT-S32C3-CTLFireability-04:
LeafsetExtension-PT-S32C3-CTLFireability-05:
LeafsetExtension-PT-S32C3-CTLFireability-07:
LeafsetExtension-PT-S32C3-CTLFireability-09:
LeafsetExtension-PT-S32C3-CTLFireability-10:
LeafsetExtension-PT-S32C3-CTLFireability-11:
LeafsetExtension-PT-S32C3-CTLFireability-14:

PENDING FORMULAS: CATEGORY
LeafsetExtension-PT-S32C3-CTLFireability-00:
LeafsetExtension-PT-S32C3-CTLFireability-03:
LeafsetExtension-PT-S32C3-CTLFireability-06:
LeafsetExtension-PT-S32C3-CTLFireability-08:
LeafsetExtension-PT-S32C3-CTLFireability-12:
LeafsetExtension-PT-S32C3-CTLFireability-13:
LeafsetExtension-PT-S32C3-CTLFireability-15:

TASK CATEGORY TYPE TIME/TLIMIT
1 CTL EXCL 20/1432

Time elapsed: 756 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY
LeafsetExtension-PT-S32C3-CTLFireability-01:
LeafsetExtension-PT-S32C3-CTLFireability-02:
LeafsetExtension-PT-S32C3-CTLFireability-04:
LeafsetExtension-PT-S32C3-CTLFireability-05:
LeafsetExtension-PT-S32C3-CTLFireability-07:
LeafsetExtension-PT-S32C3-CTLFireability-09:
LeafsetExtension-PT-S32C3-CTLFireability-10:
LeafsetExtension-PT-S32C3-CTLFireability-11:
LeafsetExtension-PT-S32C3-CTLFireability-14:

PENDING FORMULAS: CATEGORY
LeafsetExtension-PT-S32C3-CTLFireability-00:
LeafsetExtension-PT-S32C3-CTLFireability-03:
LeafsetExtension-PT-S32C3-CTLFireability-06:
LeafsetExtension-PT-S32C3-CTLFireability-08:
LeafsetExtension-PT-S32C3-CTLFireability-12:
LeafsetExtension-PT-S32C3-CTLFireability-13:
LeafsetExtension-PT-S32C3-CTLFireability-15:

TASK CATEGORY TYPE TIME/TLIMIT
1 CTL EXCL 25/1432

Time elapsed: 761 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY
LeafsetExtension-PT-S32C3-CTLFireability-01:
LeafsetExtension-PT-S32C3-CTLFireability-02:
LeafsetExtension-PT-S32C3-CTLFireability-04:
LeafsetExtension-PT-S32C3-CTLFireability-05:
LeafsetExtension-PT-S32C3-CTLFireability-07:
LeafsetExtension-PT-S32C3-CTLFireability-09:
LeafsetExtension-PT-S32C3-CTLFireability-10:
LeafsetExtension-PT-S32C3-CTLFireability-11:
LeafsetExtension-PT-S32C3-CTLFireability-14:

PENDING FORMULAS: CATEGORY
LeafsetExtension-PT-S32C3-CTLFireability-00:
LeafsetExtension-PT-S32C3-CTLFireability-03:
LeafsetExtension-PT-S32C3-CTLFireability-06:
LeafsetExtension-PT-S32C3-CTLFireability-08:
LeafsetExtension-PT-S32C3-CTLFireability-12:
LeafsetExtension-PT-S32C3-CTLFireability-13:
LeafsetExtension-PT-S32C3-CTLFireability-15:

TASK CATEGORY TYPE TIME/TLIMIT
1 CTL EXCL 30/1432

Time elapsed: 766 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY
LeafsetExtension-PT-S32C3-CTLFireability-01:
LeafsetExtension-PT-S32C3-CTLFireability-02:
LeafsetExtension-PT-S32C3-CTLFireability-04:
LeafsetExtension-PT-S32C3-CTLFireability-05:
LeafsetExtension-PT-S32C3-CTLFireability-07:
LeafsetExtension-PT-S32C3-CTLFireability-09:
LeafsetExtension-PT-S32C3-CTLFireability-10:
LeafsetExtension-PT-S32C3-CTLFireability-11:
LeafsetExtension-PT-S32C3-CTLFireability-14:

PENDING FORMULAS: CATEGORY
LeafsetExtension-PT-S32C3-CTLFireability-00:
LeafsetExtension-PT-S32C3-CTLFireability-03:
LeafsetExtension-PT-S32C3-CTLFireability-06:
LeafsetExtension-PT-S32C3-CTLFireability-08:
LeafsetExtension-PT-S32C3-CTLFireability-12:
LeafsetExtension-PT-S32C3-CTLFireability-13:
LeafsetExtension-PT-S32C3-CTLFireability-15:

TASK CATEGORY TYPE TIME/TLIMIT
1 CTL EXCL 35/1432

Time elapsed: 771 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY
LeafsetExtension-PT-S32C3-CTLFireability-01:
LeafsetExtension-PT-S32C3-CTLFireability-02:
LeafsetExtension-PT-S32C3-CTLFireability-04:
LeafsetExtension-PT-S32C3-CTLFireability-05:
LeafsetExtension-PT-S32C3-CTLFireability-07:
LeafsetExtension-PT-S32C3-CTLFireability-09:
LeafsetExtension-PT-S32C3-CTLFireability-10:
LeafsetExtension-PT-S32C3-CTLFireability-11:
LeafsetExtension-PT-S32C3-CTLFireability-14:

PENDING FORMULAS: CATEGORY
LeafsetExtension-PT-S32C3-CTLFireability-00:
LeafsetExtension-PT-S32C3-CTLFireability-03:
LeafsetExtension-PT-S32C3-CTLFireability-06:
LeafsetExtension-PT-S32C3-CTLFireability-08:
LeafsetExtension-PT-S32C3-CTLFireability-12:
LeafsetExtension-PT-S32C3-CTLFireability-13:
LeafsetExtension-PT-S32C3-CTLFireability-15:

TASK CATEGORY TYPE TIME/TLIMIT
1 CTL EXCL 40/1432

Time elapsed: 776 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY
LeafsetExtension-PT-S32C3-CTLFireability-01:
LeafsetExtension-PT-S32C3-CTLFireability-02:
LeafsetExtension-PT-S32C3-CTLFireability-04:
LeafsetExtension-PT-S32C3-CTLFireability-05:
LeafsetExtension-PT-S32C3-CTLFireability-07:
LeafsetExtension-PT-S32C3-CTLFireability-09:
LeafsetExtension-PT-S32C3-CTLFireability-10:
LeafsetExtension-PT-S32C3-CTLFireability-11:
LeafsetExtension-PT-S32C3-CTLFireability-14:

PENDING FORMULAS: CATEGORY
LeafsetExtension-PT-S32C3-CTLFireability-00:
LeafsetExtension-PT-S32C3-CTLFireability-03:
LeafsetExtension-PT-S32C3-CTLFireability-06:
LeafsetExtension-PT-S32C3-CTLFireability-08:
LeafsetExtension-PT-S32C3-CTLFireability-12:
LeafsetExtension-PT-S32C3-CTLFireability-13:
LeafsetExtension-PT-S32C3-CTLFireability-15:

TASK CATEGORY TYPE TIME/TLIMIT
1 CTL EXCL 45/1432

Time elapsed: 781 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY
LeafsetExtension-PT-S32C3-CTLFireability-01:
LeafsetExtension-PT-S32C3-CTLFireability-02:
LeafsetExtension-PT-S32C3-CTLFireability-04:
LeafsetExtension-PT-S32C3-CTLFireability-05:
LeafsetExtension-PT-S32C3-CTLFireability-07:
LeafsetExtension-PT-S32C3-CTLFireability-09:
LeafsetExtension-PT-S32C3-CTLFireability-10:
LeafsetExtension-PT-S32C3-CTLFireability-11:
LeafsetExtension-PT-S32C3-CTLFireability-14:

PENDING FORMULAS: CATEGORY
LeafsetExtension-PT-S32C3-CTLFireability-00:
LeafsetExtension-PT-S32C3-CTLFireability-03:
LeafsetExtension-PT-S32C3-CTLFireability-06:
LeafsetExtension-PT-S32C3-CTLFireability-08:
LeafsetExtension-PT-S32C3-CTLFireability-12:
LeafsetExtension-PT-S32C3-CTLFireability-13:
LeafsetExtension-PT-S32C3-CTLFireability-15:

TASK CATEGORY TYPE TIME/TLIMIT
1 CTL EXCL 50/1432

Time elapsed: 786 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY
LeafsetExtension-PT-S32C3-CTLFireability-01:
LeafsetExtension-PT-S32C3-CTLFireability-02:
LeafsetExtension-PT-S32C3-CTLFireability-04:
LeafsetExtension-PT-S32C3-CTLFireability-05:
LeafsetExtension-PT-S32C3-CTLFireability-07:
LeafsetExtension-PT-S32C3-CTLFireability-09:
LeafsetExtension-PT-S32C3-CTLFireability-10:
LeafsetExtension-PT-S32C3-CTLFireability-11:
LeafsetExtension-PT-S32C3-CTLFireability-14:

PENDING FORMULAS: CATEGORY
LeafsetExtension-PT-S32C3-CTLFireability-00:
LeafsetExtension-PT-S32C3-CTLFireability-03:
LeafsetExtension-PT-S32C3-CTLFireability-06:
LeafsetExtension-PT-S32C3-CTLFireability-08:
LeafsetExtension-PT-S32C3-CTLFireability-12:
LeafsetExtension-PT-S32C3-CTLFireability-13:
LeafsetExtension-PT-S32C3-CTLFireability-15:

TASK CATEGORY TYPE TIME/TLIMIT
1 CTL EXCL 55/1432

Time elapsed: 791 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY
LeafsetExtension-PT-S32C3-CTLFireability-01:
LeafsetExtension-PT-S32C3-CTLFireability-02:
LeafsetExtension-PT-S32C3-CTLFireability-04:
LeafsetExtension-PT-S32C3-CTLFireability-05:
LeafsetExtension-PT-S32C3-CTLFireability-07:
LeafsetExtension-PT-S32C3-CTLFireability-09:
LeafsetExtension-PT-S32C3-CTLFireability-10:
LeafsetExtension-PT-S32C3-CTLFireability-11:
LeafsetExtension-PT-S32C3-CTLFireability-14:

PENDING FORMULAS: CATEGORY
LeafsetExtension-PT-S32C3-CTLFireability-00:
LeafsetExtension-PT-S32C3-CTLFireability-03:
LeafsetExtension-PT-S32C3-CTLFireability-06:
LeafsetExtension-PT-S32C3-CTLFireability-08:
LeafsetExtension-PT-S32C3-CTLFireability-12:
LeafsetExtension-PT-S32C3-CTLFireability-13:
LeafsetExtension-PT-S32C3-CTLFireability-15:

TASK CATEGORY TYPE TIME/TLIMIT
1 CTL EXCL 60/1432

Time elapsed: 796 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY
LeafsetExtension-PT-S32C3-CTLFireability-01:
LeafsetExtension-PT-S32C3-CTLFireability-02:
LeafsetExtension-PT-S32C3-CTLFireability-04:
LeafsetExtension-PT-S32C3-CTLFireability-05:
LeafsetExtension-PT-S32C3-CTLFireability-07:
LeafsetExtension-PT-S32C3-CTLFireability-09:
LeafsetExtension-PT-S32C3-CTLFireability-10:
LeafsetExtension-PT-S32C3-CTLFireability-11:
LeafsetExtension-PT-S32C3-CTLFireability-14:

PENDING FORMULAS: CATEGORY
LeafsetExtension-PT-S32C3-CTLFireability-00:
LeafsetExtension-PT-S32C3-CTLFireability-03:
LeafsetExtension-PT-S32C3-CTLFireability-06:
LeafsetExtension-PT-S32C3-CTLFireability-08:
LeafsetExtension-PT-S32C3-CTLFireability-12:
LeafsetExtension-PT-S32C3-CTLFireability-13:
LeafsetExtension-PT-S32C3-CTLFireability-15:

TASK CATEGORY TYPE TIME/TLIMIT
1 CTL EXCL 65/1432

Time elapsed: 801 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY
LeafsetExtension-PT-S32C3-CTLFireability-01:
LeafsetExtension-PT-S32C3-CTLFireability-02:
LeafsetExtension-PT-S32C3-CTLFireability-04:
LeafsetExtension-PT-S32C3-CTLFireability-05:
LeafsetExtension-PT-S32C3-CTLFireability-07:
LeafsetExtension-PT-S32C3-CTLFireability-09:
LeafsetExtension-PT-S32C3-CTLFireability-10:
LeafsetExtension-PT-S32C3-CTLFireability-11:
LeafsetExtension-PT-S32C3-CTLFireability-14:

PENDING FORMULAS: CATEGORY
LeafsetExtension-PT-S32C3-CTLFireability-00:
LeafsetExtension-PT-S32C3-CTLFireability-03:
LeafsetExtension-PT-S32C3-CTLFireability-06:
LeafsetExtension-PT-S32C3-CTLFireability-08:
LeafsetExtension-PT-S32C3-CTLFireability-12:
LeafsetExtension-PT-S32C3-CTLFireability-13:
LeafsetExtension-PT-S32C3-CTLFireability-15:

TASK CATEGORY TYPE TIME/TLIMIT
1 CTL EXCL 70/1432

Time elapsed: 806 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY
LeafsetExtension-PT-S32C3-CTLFireability-01:
LeafsetExtension-PT-S32C3-CTLFireability-02:
LeafsetExtension-PT-S32C3-CTLFireability-04:
LeafsetExtension-PT-S32C3-CTLFireability-05:
LeafsetExtension-PT-S32C3-CTLFireability-07:
LeafsetExtension-PT-S32C3-CTLFireability-09:
LeafsetExtension-PT-S32C3-CTLFireability-10:
LeafsetExtension-PT-S32C3-CTLFireability-11:
LeafsetExtension-PT-S32C3-CTLFireability-14:

PENDING FORMULAS: CATEGORY
LeafsetExtension-PT-S32C3-CTLFireability-00:
LeafsetExtension-PT-S32C3-CTLFireability-03:
LeafsetExtension-PT-S32C3-CTLFireability-06:
LeafsetExtension-PT-S32C3-CTLFireability-08:
LeafsetExtension-PT-S32C3-CTLFireability-12:
LeafsetExtension-PT-S32C3-CTLFireability-13:
LeafsetExtension-PT-S32C3-CTLFireability-15:

TASK CATEGORY TYPE TIME/TLIMIT
1 CTL EXCL 75/1432

Time elapsed: 811 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY
LeafsetExtension-PT-S32C3-CTLFireability-01:
LeafsetExtension-PT-S32C3-CTLFireability-02:
LeafsetExtension-PT-S32C3-CTLFireability-04:
LeafsetExtension-PT-S32C3-CTLFireability-05:
LeafsetExtension-PT-S32C3-CTLFireability-07:
LeafsetExtension-PT-S32C3-CTLFireability-09:
LeafsetExtension-PT-S32C3-CTLFireability-10:
LeafsetExtension-PT-S32C3-CTLFireability-11:
LeafsetExtension-PT-S32C3-CTLFireability-14:

PENDING FORMULAS: CATEGORY
LeafsetExtension-PT-S32C3-CTLFireability-00:
LeafsetExtension-PT-S32C3-CTLFireability-03:
LeafsetExtension-PT-S32C3-CTLFireability-06:
LeafsetExtension-PT-S32C3-CTLFireability-08:
LeafsetExtension-PT-S32C3-CTLFireability-12:
LeafsetExtension-PT-S32C3-CTLFireability-13:
LeafsetExtension-PT-S32C3-CTLFireability-15:

TASK CATEGORY TYPE TIME/TLIMIT
1 CTL EXCL 80/1432

Time elapsed: 816 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
lola: CANCELED task # 1 (type EXCL)
FINISHED FORMULA: CATEGORY
LeafsetExtension-PT-S32C3-CTLFireability-01:
LeafsetExtension-PT-S32C3-CTLFireability-02:
LeafsetExtension-PT-S32C3-CTLFireability-04:
LeafsetExtension-PT-S32C3-CTLFireability-05:
LeafsetExtension-PT-S32C3-CTLFireability-07:
LeafsetExtension-PT-S32C3-CTLFireability-09:
LeafsetExtension-PT-S32C3-CTLFireability-10:
LeafsetExtension-PT-S32C3-CTLFireability-11:
LeafsetExtension-PT-S32C3-CTLFireability-14:

PENDING FORMULAS: CATEGORY
LeafsetExtension-PT-S32C3-CTLFireability-00:
LeafsetExtension-PT-S32C3-CTLFireability-03:
LeafsetExtension-PT-S32C3-CTLFireability-06:
LeafsetExtension-PT-S32C3-CTLFireability-08:
LeafsetExtension-PT-S32C3-CTLFireability-12:
LeafsetExtension-PT-S32C3-CTLFireability-13:
LeafsetExtension-PT-S32C3-CTLFireability-15:

TASK CATEGORY TYPE TIME/TLIMIT

Time elapsed: 821 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
lola: LAUNCH task # 66 (type EXCL)
lola: time limit : 2779 sec
lola: memory limit: 32 pages
FINISHED FORMULA: CATEGORY
LeafsetExtension-PT-S32C3-CTLFireability-01:
LeafsetExtension-PT-S32C3-CTLFireability-02:
LeafsetExtension-PT-S32C3-CTLFireability-04:
LeafsetExtension-PT-S32C3-CTLFireability-05:
LeafsetExtension-PT-S32C3-CTLFireability-07:
LeafsetExtension-PT-S32C3-CTLFireability-09:
LeafsetExtension-PT-S32C3-CTLFireability-10:
LeafsetExtension-PT-S32C3-CTLFireability-11:
LeafsetExtension-PT-S32C3-CTLFireability-14:

PENDING FORMULAS: CATEGORY
LeafsetExtension-PT-S32C3-CTLFireability-00:
LeafsetExtension-PT-S32C3-CTLFireability-03:
LeafsetExtension-PT-S32C3-CTLFireability-06:
LeafsetExtension-PT-S32C3-CTLFireability-08:
LeafsetExtension-PT-S32C3-CTLFireability-12:
LeafsetExtension-PT-S32C3-CTLFireability-13:
LeafsetExtension-PT-S32C3-CTLFireability-15:

TASK CATEGORY TYPE TIME/TLIMIT
66 CTL EXCL 5/2779

Time elapsed: 826 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY
LeafsetExtension-PT-S32C3-CTLFireability-01:
LeafsetExtension-PT-S32C3-CTLFireability-02:
LeafsetExtension-PT-S32C3-CTLFireability-04:
LeafsetExtension-PT-S32C3-CTLFireability-05:
LeafsetExtension-PT-S32C3-CTLFireability-07:
LeafsetExtension-PT-S32C3-CTLFireability-09:
LeafsetExtension-PT-S32C3-CTLFireability-10:
LeafsetExtension-PT-S32C3-CTLFireability-11:
LeafsetExtension-PT-S32C3-CTLFireability-14:

PENDING FORMULAS: CATEGORY
LeafsetExtension-PT-S32C3-CTLFireability-00:
LeafsetExtension-PT-S32C3-CTLFireability-03:
LeafsetExtension-PT-S32C3-CTLFireability-06:
LeafsetExtension-PT-S32C3-CTLFireability-08:
LeafsetExtension-PT-S32C3-CTLFireability-12:
LeafsetExtension-PT-S32C3-CTLFireability-13:
LeafsetExtension-PT-S32C3-CTLFireability-15:

TASK CATEGORY TYPE TIME/TLIMIT
66 CTL EXCL 10/2779

Time elapsed: 831 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY
LeafsetExtension-PT-S32C3-CTLFireability-01:
LeafsetExtension-PT-S32C3-CTLFireability-02:
LeafsetExtension-PT-S32C3-CTLFireability-04:
LeafsetExtension-PT-S32C3-CTLFireability-05:
LeafsetExtension-PT-S32C3-CTLFireability-07:
LeafsetExtension-PT-S32C3-CTLFireability-09:
LeafsetExtension-PT-S32C3-CTLFireability-10:
LeafsetExtension-PT-S32C3-CTLFireability-11:
LeafsetExtension-PT-S32C3-CTLFireability-14:

PENDING FORMULAS: CATEGORY
LeafsetExtension-PT-S32C3-CTLFireability-00:
LeafsetExtension-PT-S32C3-CTLFireability-03:
LeafsetExtension-PT-S32C3-CTLFireability-06:
LeafsetExtension-PT-S32C3-CTLFireability-08:
LeafsetExtension-PT-S32C3-CTLFireability-12:
LeafsetExtension-PT-S32C3-CTLFireability-13:
LeafsetExtension-PT-S32C3-CTLFireability-15:

TASK CATEGORY TYPE TIME/TLIMIT
66 CTL EXCL 15/2779

Time elapsed: 836 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY
LeafsetExtension-PT-S32C3-CTLFireability-01:
LeafsetExtension-PT-S32C3-CTLFireability-02:
LeafsetExtension-PT-S32C3-CTLFireability-04:
LeafsetExtension-PT-S32C3-CTLFireability-05:
LeafsetExtension-PT-S32C3-CTLFireability-07:
LeafsetExtension-PT-S32C3-CTLFireability-09:
LeafsetExtension-PT-S32C3-CTLFireability-10:
LeafsetExtension-PT-S32C3-CTLFireability-11:
LeafsetExtension-PT-S32C3-CTLFireability-14:

PENDING FORMULAS: CATEGORY
LeafsetExtension-PT-S32C3-CTLFireability-00:
LeafsetExtension-PT-S32C3-CTLFireability-03:
LeafsetExtension-PT-S32C3-CTLFireability-06:
LeafsetExtension-PT-S32C3-CTLFireability-08:
LeafsetExtension-PT-S32C3-CTLFireability-12:
LeafsetExtension-PT-S32C3-CTLFireability-13:
LeafsetExtension-PT-S32C3-CTLFireability-15:

TASK CATEGORY TYPE TIME/TLIMIT
66 CTL EXCL 20/2779

Time elapsed: 841 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY
LeafsetExtension-PT-S32C3-CTLFireability-01:
LeafsetExtension-PT-S32C3-CTLFireability-02:
LeafsetExtension-PT-S32C3-CTLFireability-04:
LeafsetExtension-PT-S32C3-CTLFireability-05:
LeafsetExtension-PT-S32C3-CTLFireability-07:
LeafsetExtension-PT-S32C3-CTLFireability-09:
LeafsetExtension-PT-S32C3-CTLFireability-10:
LeafsetExtension-PT-S32C3-CTLFireability-11:
LeafsetExtension-PT-S32C3-CTLFireability-14:

PENDING FORMULAS: CATEGORY
LeafsetExtension-PT-S32C3-CTLFireability-00:
LeafsetExtension-PT-S32C3-CTLFireability-03:
LeafsetExtension-PT-S32C3-CTLFireability-06:
LeafsetExtension-PT-S32C3-CTLFireability-08:
LeafsetExtension-PT-S32C3-CTLFireability-12:
LeafsetExtension-PT-S32C3-CTLFireability-13:
LeafsetExtension-PT-S32C3-CTLFireability-15:

TASK CATEGORY TYPE TIME/TLIMIT
66 CTL EXCL 25/2779

Time elapsed: 846 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY
LeafsetExtension-PT-S32C3-CTLFireability-01:
LeafsetExtension-PT-S32C3-CTLFireability-02:
LeafsetExtension-PT-S32C3-CTLFireability-04:
LeafsetExtension-PT-S32C3-CTLFireability-05:
LeafsetExtension-PT-S32C3-CTLFireability-07:
LeafsetExtension-PT-S32C3-CTLFireability-09:
LeafsetExtension-PT-S32C3-CTLFireability-10:
LeafsetExtension-PT-S32C3-CTLFireability-11:
LeafsetExtension-PT-S32C3-CTLFireability-14:

PENDING FORMULAS: CATEGORY
LeafsetExtension-PT-S32C3-CTLFireability-00:
LeafsetExtension-PT-S32C3-CTLFireability-03:
LeafsetExtension-PT-S32C3-CTLFireability-06:
LeafsetExtension-PT-S32C3-CTLFireability-08:
LeafsetExtension-PT-S32C3-CTLFireability-12:
LeafsetExtension-PT-S32C3-CTLFireability-13:
LeafsetExtension-PT-S32C3-CTLFireability-15:

TASK CATEGORY TYPE TIME/TLIMIT
66 CTL EXCL 30/2779

Time elapsed: 851 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY
LeafsetExtension-PT-S32C3-CTLFireability-01:
LeafsetExtension-PT-S32C3-CTLFireability-02:
LeafsetExtension-PT-S32C3-CTLFireability-04:
LeafsetExtension-PT-S32C3-CTLFireability-05:
LeafsetExtension-PT-S32C3-CTLFireability-07:
LeafsetExtension-PT-S32C3-CTLFireability-09:
LeafsetExtension-PT-S32C3-CTLFireability-10:
LeafsetExtension-PT-S32C3-CTLFireability-11:
LeafsetExtension-PT-S32C3-CTLFireability-14:

PENDING FORMULAS: CATEGORY
LeafsetExtension-PT-S32C3-CTLFireability-00:
LeafsetExtension-PT-S32C3-CTLFireability-03:
LeafsetExtension-PT-S32C3-CTLFireability-06:
LeafsetExtension-PT-S32C3-CTLFireability-08:
LeafsetExtension-PT-S32C3-CTLFireability-12:
LeafsetExtension-PT-S32C3-CTLFireability-13:
LeafsetExtension-PT-S32C3-CTLFireability-15:

TASK CATEGORY TYPE TIME/TLIMIT
66 CTL EXCL 35/2779

Time elapsed: 856 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY
LeafsetExtension-PT-S32C3-CTLFireability-01:
LeafsetExtension-PT-S32C3-CTLFireability-02:
LeafsetExtension-PT-S32C3-CTLFireability-04:
LeafsetExtension-PT-S32C3-CTLFireability-05:
LeafsetExtension-PT-S32C3-CTLFireability-07:
LeafsetExtension-PT-S32C3-CTLFireability-09:
LeafsetExtension-PT-S32C3-CTLFireability-10:
LeafsetExtension-PT-S32C3-CTLFireability-11:
LeafsetExtension-PT-S32C3-CTLFireability-14:

PENDING FORMULAS: CATEGORY
LeafsetExtension-PT-S32C3-CTLFireability-00:
LeafsetExtension-PT-S32C3-CTLFireability-03:
LeafsetExtension-PT-S32C3-CTLFireability-06:
LeafsetExtension-PT-S32C3-CTLFireability-08:
LeafsetExtension-PT-S32C3-CTLFireability-12:
LeafsetExtension-PT-S32C3-CTLFireability-13:
LeafsetExtension-PT-S32C3-CTLFireability-15:

TASK CATEGORY TYPE TIME/TLIMIT
66 CTL EXCL 40/2779

Time elapsed: 861 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY
LeafsetExtension-PT-S32C3-CTLFireability-01:
LeafsetExtension-PT-S32C3-CTLFireability-02:
LeafsetExtension-PT-S32C3-CTLFireability-04:
LeafsetExtension-PT-S32C3-CTLFireability-05:
LeafsetExtension-PT-S32C3-CTLFireability-07:
LeafsetExtension-PT-S32C3-CTLFireability-09:
LeafsetExtension-PT-S32C3-CTLFireability-10:
LeafsetExtension-PT-S32C3-CTLFireability-11:
LeafsetExtension-PT-S32C3-CTLFireability-14:

PENDING FORMULAS: CATEGORY
LeafsetExtension-PT-S32C3-CTLFireability-00:
LeafsetExtension-PT-S32C3-CTLFireability-03:
LeafsetExtension-PT-S32C3-CTLFireability-06:
LeafsetExtension-PT-S32C3-CTLFireability-08:
LeafsetExtension-PT-S32C3-CTLFireability-12:
LeafsetExtension-PT-S32C3-CTLFireability-13:
LeafsetExtension-PT-S32C3-CTLFireability-15:

TASK CATEGORY TYPE TIME/TLIMIT
66 CTL EXCL 45/2779

Time elapsed: 866 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY
LeafsetExtension-PT-S32C3-CTLFireability-01:
LeafsetExtension-PT-S32C3-CTLFireability-02:
LeafsetExtension-PT-S32C3-CTLFireability-04:
LeafsetExtension-PT-S32C3-CTLFireability-05:
LeafsetExtension-PT-S32C3-CTLFireability-07:
LeafsetExtension-PT-S32C3-CTLFireability-09:
LeafsetExtension-PT-S32C3-CTLFireability-10:
LeafsetExtension-PT-S32C3-CTLFireability-11:
LeafsetExtension-PT-S32C3-CTLFireability-14:

PENDING FORMULAS: CATEGORY
LeafsetExtension-PT-S32C3-CTLFireability-00:
LeafsetExtension-PT-S32C3-CTLFireability-03:
LeafsetExtension-PT-S32C3-CTLFireability-06:
LeafsetExtension-PT-S32C3-CTLFireability-08:
LeafsetExtension-PT-S32C3-CTLFireability-12:
LeafsetExtension-PT-S32C3-CTLFireability-13:
LeafsetExtension-PT-S32C3-CTLFireability-15:

TASK CATEGORY TYPE TIME/TLIMIT
66 CTL EXCL 50/2779

Time elapsed: 871 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY
LeafsetExtension-PT-S32C3-CTLFireability-01:
LeafsetExtension-PT-S32C3-CTLFireability-02:
LeafsetExtension-PT-S32C3-CTLFireability-04:
LeafsetExtension-PT-S32C3-CTLFireability-05:
LeafsetExtension-PT-S32C3-CTLFireability-07:
LeafsetExtension-PT-S32C3-CTLFireability-09:
LeafsetExtension-PT-S32C3-CTLFireability-10:
LeafsetExtension-PT-S32C3-CTLFireability-11:
LeafsetExtension-PT-S32C3-CTLFireability-14:

PENDING FORMULAS: CATEGORY
LeafsetExtension-PT-S32C3-CTLFireability-00:
LeafsetExtension-PT-S32C3-CTLFireability-03:
LeafsetExtension-PT-S32C3-CTLFireability-06:
LeafsetExtension-PT-S32C3-CTLFireability-08:
LeafsetExtension-PT-S32C3-CTLFireability-12:
LeafsetExtension-PT-S32C3-CTLFireability-13:
LeafsetExtension-PT-S32C3-CTLFireability-15:

TASK CATEGORY TYPE TIME/TLIMIT
66 CTL EXCL 55/2779

Time elapsed: 876 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY
LeafsetExtension-PT-S32C3-CTLFireability-01:
LeafsetExtension-PT-S32C3-CTLFireability-02:
LeafsetExtension-PT-S32C3-CTLFireability-04:
LeafsetExtension-PT-S32C3-CTLFireability-05:
LeafsetExtension-PT-S32C3-CTLFireability-07:
LeafsetExtension-PT-S32C3-CTLFireability-09:
LeafsetExtension-PT-S32C3-CTLFireability-10:
LeafsetExtension-PT-S32C3-CTLFireability-11:
LeafsetExtension-PT-S32C3-CTLFireability-14:

PENDING FORMULAS: CATEGORY
LeafsetExtension-PT-S32C3-CTLFireability-00:
LeafsetExtension-PT-S32C3-CTLFireability-03:
LeafsetExtension-PT-S32C3-CTLFireability-06:
LeafsetExtension-PT-S32C3-CTLFireability-08:
LeafsetExtension-PT-S32C3-CTLFireability-12:
LeafsetExtension-PT-S32C3-CTLFireability-13:
LeafsetExtension-PT-S32C3-CTLFireability-15:

TASK CATEGORY TYPE TIME/TLIMIT
66 CTL EXCL 60/2779

Time elapsed: 881 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY
LeafsetExtension-PT-S32C3-CTLFireability-01:
LeafsetExtension-PT-S32C3-CTLFireability-02:
LeafsetExtension-PT-S32C3-CTLFireability-04:
LeafsetExtension-PT-S32C3-CTLFireability-05:
LeafsetExtension-PT-S32C3-CTLFireability-07:
LeafsetExtension-PT-S32C3-CTLFireability-09:
LeafsetExtension-PT-S32C3-CTLFireability-10:
LeafsetExtension-PT-S32C3-CTLFireability-11:
LeafsetExtension-PT-S32C3-CTLFireability-14:

PENDING FORMULAS: CATEGORY
LeafsetExtension-PT-S32C3-CTLFireability-00:
LeafsetExtension-PT-S32C3-CTLFireability-03:
LeafsetExtension-PT-S32C3-CTLFireability-06:
LeafsetExtension-PT-S32C3-CTLFireability-08:
LeafsetExtension-PT-S32C3-CTLFireability-12:
LeafsetExtension-PT-S32C3-CTLFireability-13:
LeafsetExtension-PT-S32C3-CTLFireability-15:

TASK CATEGORY TYPE TIME/TLIMIT
66 CTL EXCL 65/2779

Time elapsed: 886 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY
LeafsetExtension-PT-S32C3-CTLFireability-01:
LeafsetExtension-PT-S32C3-CTLFireability-02:
LeafsetExtension-PT-S32C3-CTLFireability-04:
LeafsetExtension-PT-S32C3-CTLFireability-05:
LeafsetExtension-PT-S32C3-CTLFireability-07:
LeafsetExtension-PT-S32C3-CTLFireability-09:
LeafsetExtension-PT-S32C3-CTLFireability-10:
LeafsetExtension-PT-S32C3-CTLFireability-11:
LeafsetExtension-PT-S32C3-CTLFireability-14:

PENDING FORMULAS: CATEGORY
LeafsetExtension-PT-S32C3-CTLFireability-00:
LeafsetExtension-PT-S32C3-CTLFireability-03:
LeafsetExtension-PT-S32C3-CTLFireability-06:
LeafsetExtension-PT-S32C3-CTLFireability-08:
LeafsetExtension-PT-S32C3-CTLFireability-12:
LeafsetExtension-PT-S32C3-CTLFireability-13:
LeafsetExtension-PT-S32C3-CTLFireability-15:

TASK CATEGORY TYPE TIME/TLIMIT
66 CTL EXCL 70/2779

Time elapsed: 891 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY
LeafsetExtension-PT-S32C3-CTLFireability-01:
LeafsetExtension-PT-S32C3-CTLFireability-02:
LeafsetExtension-PT-S32C3-CTLFireability-04:
LeafsetExtension-PT-S32C3-CTLFireability-05:
LeafsetExtension-PT-S32C3-CTLFireability-07:
LeafsetExtension-PT-S32C3-CTLFireability-09:
LeafsetExtension-PT-S32C3-CTLFireability-10:
LeafsetExtension-PT-S32C3-CTLFireability-11:
LeafsetExtension-PT-S32C3-CTLFireability-14:

PENDING FORMULAS: CATEGORY
LeafsetExtension-PT-S32C3-CTLFireability-00:
LeafsetExtension-PT-S32C3-CTLFireability-03:
LeafsetExtension-PT-S32C3-CTLFireability-06:
LeafsetExtension-PT-S32C3-CTLFireability-08:
LeafsetExtension-PT-S32C3-CTLFireability-12:
LeafsetExtension-PT-S32C3-CTLFireability-13:
LeafsetExtension-PT-S32C3-CTLFireability-15:

TASK CATEGORY TYPE TIME/TLIMIT
66 CTL EXCL 75/2779

Time elapsed: 896 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY
LeafsetExtension-PT-S32C3-CTLFireability-01:
LeafsetExtension-PT-S32C3-CTLFireability-02:
LeafsetExtension-PT-S32C3-CTLFireability-04:
LeafsetExtension-PT-S32C3-CTLFireability-05:
LeafsetExtension-PT-S32C3-CTLFireability-07:
LeafsetExtension-PT-S32C3-CTLFireability-09:
LeafsetExtension-PT-S32C3-CTLFireability-10:
LeafsetExtension-PT-S32C3-CTLFireability-11:
LeafsetExtension-PT-S32C3-CTLFireability-14:

PENDING FORMULAS: CATEGORY
LeafsetExtension-PT-S32C3-CTLFireability-00:
LeafsetExtension-PT-S32C3-CTLFireability-03:
LeafsetExtension-PT-S32C3-CTLFireability-06:
LeafsetExtension-PT-S32C3-CTLFireability-08:
LeafsetExtension-PT-S32C3-CTLFireability-12:
LeafsetExtension-PT-S32C3-CTLFireability-13:
LeafsetExtension-PT-S32C3-CTLFireability-15:

TASK CATEGORY TYPE TIME/TLIMIT
66 CTL EXCL 80/2779

Time elapsed: 901 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
lola: CANCELED task # 66 (type EXCL)
FINISHED FORMULA: CATEGORY
LeafsetExtension-PT-S32C3-CTLFireability-01:
LeafsetExtension-PT-S32C3-CTLFireability-02:
LeafsetExtension-PT-S32C3-CTLFireability-04:
LeafsetExtension-PT-S32C3-CTLFireability-05:
LeafsetExtension-PT-S32C3-CTLFireability-07:
LeafsetExtension-PT-S32C3-CTLFireability-09:
LeafsetExtension-PT-S32C3-CTLFireability-10:
LeafsetExtension-PT-S32C3-CTLFireability-11:
LeafsetExtension-PT-S32C3-CTLFireability-14:

PENDING FORMULAS: CATEGORY
LeafsetExtension-PT-S32C3-CTLFireability-00:
LeafsetExtension-PT-S32C3-CTLFireability-03:
LeafsetExtension-PT-S32C3-CTLFireability-06:
LeafsetExtension-PT-S32C3-CTLFireability-08:
LeafsetExtension-PT-S32C3-CTLFireability-12:
LeafsetExtension-PT-S32C3-CTLFireability-13:
LeafsetExtension-PT-S32C3-CTLFireability-15:

TASK CATEGORY TYPE TIME/TLIMIT

Time elapsed: 906 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
lola: Portfolio finished: no open

FINAL RESULTS
FINISHED FORMULA: CATEGORY
LeafsetExtension-PT-S32C3-CTLFireability-00:
LeafsetExtension-PT-S32C3-CTLFireability-01:
LeafsetExtension-PT-S32C3-CTLFireability-02:
LeafsetExtension-PT-S32C3-CTLFireability-03:
LeafsetExtension-PT-S32C3-CTLFireability-04:
LeafsetExtension-PT-S32C3-CTLFireability-05:
LeafsetExtension-PT-S32C3-CTLFireability-06:
LeafsetExtension-PT-S32C3-CTLFireability-07:
LeafsetExtension-PT-S32C3-CTLFireability-08:
LeafsetExtension-PT-S32C3-CTLFireability-09:
LeafsetExtension-PT-S32C3-CTLFireability-10:
LeafsetExtension-PT-S32C3-CTLFireability-11:
LeafsetExtension-PT-S32C3-CTLFireability-12:
LeafsetExtension-PT-S32C3-CTLFireability-13:
LeafsetExtension-PT-S32C3-CTLFireability-14:
LeafsetExtension-PT-S32C3-CTLFireability-15:

Time elapsed: 906 secs. Pages in use: 32
162124152600530.qcow2', fmt=qcow2 size=4294967296 backing_file='/data/fkordon/mcc2021-input.qcow2' encryption=off cluster_size=65536 lazy_refcounts=off ............................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................... =============================================== examination is CTLFireability 530 ========================= 08:57 CTLCardinality.txt 08:57 CTLCardinality.xml 08:57 CTLFireability.txt 08:57 CTLFireability.xml 07:58 LTLCardinality.txt 07:58 LTLCardinality.xml 07:58 LTLFireability.txt 07:58 LTLFireability.xml 08:13 NewModel 18:44 ReachabilityCardinality.txt 18:44 ReachabilityCardinality.xml 15:50 ReachabilityFireability.txt 15:50 ReachabilityFireability.xml 04:40 UpperBounds.txt 04:40 UpperBounds.xml 08:13 equiv_col 08:13 instance 08:13 iscolored 08:13 model.pnml by BenchKit (invocation template) result vector(from text file) reability-00 reability-01 reability-02 reability-03 reability-04 reability-05 reability-06 reability-07 reability-08 reability-09 reability-10 reability-11 reability-12 reability-13 reability-14 reability-15 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT /model.pnml net model.pnml tion/CTLFireability.xml ite.k:388 ite.k:250 ite.k:317 ite.k:325 ite.k:337 ite.k:296 ite.k:296 ite.k:296 ite.k:250 ite.k:250 ite.k:250 ite.k:325 ite.k:334 ite.k:296 ite.k:253 ite.k:253 ite.k:253 ite.k:460 ite.k:314 ite.k:325 ite.k:334 ite.k:296 ite.k:314 ite.k:317 ite.k:325 ite.k:337 ite.k:296 ite.k:296 ite.k:296 ite.k:314 ite.k:322 ite.k:337 ite.k:296 ite.k:296 ite.k:296 ite.k:253 ite.k:253 ite.k:253 ite.k:322 ite.k:331 ite.k:296 ite.k:322 ite.k:337 ite.k:296 ite.k:314 ite.k:317 ite.k:322 ite.k:331 ite.k:296 ite.k:325 ite.k:328 ite.k:299 ite.k:325 ite.k:328 ite.k:296 ite.k:250 ite.k:250 ite.k:250 ite.k:253 ite.k:475 ite.k:325 ite.k:334 ite.k:322 ite.k:331 ite.k:322 ite.k:328 ite.k:296 ite.k:322 ite.k:331 ite.k:325 ite.k:337 ite.k:296 ite.k:296 ite.k:250 ite.k:322 ite.k:337 ite.k:322 ite.k:331 ite.k:296 ite.k:325 ite.k:337 ite.k:296 ite.k:296 ite.k:325 ite.k:331 ite.k:325 ite.k:340 ite.k:325 ite.k:328 ite.k:299 ite.k:322 ite.k:340 ite.k:299 ite.k:299 ite.k:325 ite.k:328 ite.k:296 ite.k:325 ite.k:331 ite.k:314 ite.k:322 ite.k:334 ite.k:322 ite.k:334 ite.k:296 ite.k:322 ite.k:328 ite.k:322 ite.k:331 ite.k:299 ite.k:322 ite.k:328 ite.k:317 ite.k:325 ite.k:334 ite.k:325 ite.k:334 ite.k:299 ite.k:325 ite.k:331 ite.k:325 ite.k:328 ite.k:296 ite.k:394 ite.k:322 ite.k:331 ite.k:296 ite.k:317 ite.k:314 ite.k:325 ite.k:334 ite.k:325 ite.k:331 ite.k:296 ite.k:317 ite.k:325 ite.k:328 ite.k:296 ite.k:325 ite.k:328 ite.k:296 ite.k:317 ite.k:325 ite.k:328 ite.k:299 ite.k:314 ite.k:322 ite.k:328 ite.k:296 ite.k:325 ite.k:328 ite.k:296 ite.k:314 ite.k:317 ite.k:322 ite.k:334 ite.k:322 ite.k:328 ite.k:299 ite.k:314 ite.k:322 ite.k:331 ite.k:299 ite.k:322 ite.k:331 ite.k:299 ite.k:314 ite.k:322 ite.k:331 ite.k:296 ite.k:317 ite.k:325 ite.k:331 ite.k:299 ite.k:322 ite.k:331 ite.k:299 ite.k:253 ite.k:317 ite.k:314 ite.k:296 ite.k:325 ite.k:337 ite.k:296 ite.k:296 ite.k:317 ite.k:296 ite.k:317 ite.k:322 ite.k:334 ite.k:296 ite.k:322 ite.k:328 ite.k:296 ite.k:448 ite.k:314 ite.k:325 ite.k:328 ite.k:317 ite.k:325 ite.k:331 ite.k:296 ite.k:296 ite.k:317 ite.k:325 ite.k:331 ite.k:296 ite.k:322 ite.k:331 ite.k:322 ite.k:328 ite.k:296 ite.k:325 ite.k:337 ite.k:296 ite.k:296 places removed VALUE PRODUCED BY IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 0 0 CTL 0 0 0 0 1 0 0 0 CTL 0 0 0 0 1 0 0 0 CTL 0 0 0 0 1 0 0 0 CTL 0 0 0 0 1 0 0 0 CTL 0 0 0 0 1 0 0 0 CTL 0 0 0 0 1 0 0 0 CTL 0 0 0 0 1 0 0 0 CTL 0 0 0 0 1 0 0 0 CTL 0 0 0 0 1 0 0 0 CTL 0 0 0 0 0 0 0 0 CTL 0 0 0 0 1 0 0 0 DISJ 0 0 0 0 0 0 0 0 CTL 0 0 0 0 0 0 0 0 CTL 0 0 0 0 0 0 0 0 CTL 0 0 0 0 0 0 0 0 MEM PG/PGLIMIT FORMULA STATUS ite.k:714 for 36 LeafsetExtension-PT-S32C3-CTLFireability-12 for LeafsetExtension-PT-S32C3-CTLFireability-12 2 1 0.000000 1 ite.k:721 ite.k:787 ite.k:721 ite.k:787 ite.k:721 ite.k:787 for 36 LeafsetExtension-PT-S32C3-CTLFireability-12 for 36 LeafsetExtension-PT-S32C3-CTLFireability-12 for 36 LeafsetExtension-PT-S32C3-CTLFireability-12 for 36 LeafsetExtension-PT-S32C3-CTLFireability-12 for LeafsetExtension-PT-S32C3-CTLFireability-12 0.000000 1 for LeafsetExtension-PT-S32C3-CTLFireability-12 (obsolete) for LeafsetExtension-PT-S32C3-CTLFireability-12 (obsolete) for LeafsetExtension-PT-S32C3-CTLFireability-12 (obsolete) ite.k:721 ite.k:787 for LeafsetExtension-PT-S32C3-CTLFireability-12 1 1.000000 0 cution/CTLFireability-71.sara. is non-deterministic for LeafsetExtension-PT-S32C3-CTLFireability-12 ite.k:813 ite.k:815 ite.k:808 ite.k:806 VALUE PRODUCED BY IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 0 0 CTL 0 0 0 0 1 0 0 0 CTL 0 0 0 0 1 0 0 0 CTL 0 0 0 0 1 0 0 0 CTL 0 0 0 0 1 0 0 0 CTL 0 0 0 0 1 0 0 0 CTL 1 0 0 0 1 0 0 0 CTL 0 0 0 0 1 0 0 0 CTL 1 0 0 0 1 0 0 0 CTL 0 0 0 0 1 0 0 0 CTL 0 0 0 0 1 0 0 0 CTL 0 0 0 0 1 0 0 0 DISJ 0 0 0 0 9 0 0 1 CTL 0 0 0 0 1 0 0 0 CTL 0 0 0 0 1 0 0 0 CTL 0 0 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS ite.k:811 ite.k:808 ite.k:809 ite.k:809 ite.k:813 ite.k:806 for 36 LeafsetExtension-PT-S32C3-CTLFireability-12 ite.k:813 ite.k:811 ite.k:813 ite.k:806 ite.k:808 ite.k:815 ite.k:809 ite.k:814 ite.k:806 ite.k:813 ite.k:808 ite.k:814 ite.k:813 ite.k:811 ite.k:809 ite.k:811 ite.k:811 for LeafsetExtension-PT-S32C3-CTLFireability-12 1 1.000000 1 for 36 LeafsetExtension-PT-S32C3-CTLFireability-12 for LeafsetExtension-PT-S32C3-CTLFireability-12 1 0.000000 1 for 24 LeafsetExtension-PT-S32C3-CTLFireability-08 ite.k:811 ite.k:809 ite.k:814 ite.k:813 ite.k:811 ite.k:808 ite.k:813 ite.k:806 ite.k:808 ite.k:814 ite.k:809 ite.k:809 ite.k:807 ite.k:811 ite.k:809 ite.k:808 ite.k:811 ite.k:808 ite.k:812 ite.k:815 ite.k:810 ite.k:809 ite.k:812 ite.k:809 ite.k:808 ite.k:806 ite.k:815 ite.k:807 ite.k:806 ite.k:814 VALUE PRODUCED BY IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 0 0 CTL 0 0 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 0 0 CTL 0 0 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 0 0 DISJ 0 1 0 0 11 0 0 2 CTL 1 0 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 1/32 LeafsetExtension-PT-S32C3-CTLFireability-08 10377 m, 2075 m/sec, 29079 t fired, . ite.k:812 ite.k:812 ite.k:811 ite.k:813 ite.k:806 ite.k:808 ite.k:811 ite.k:811 ite.k:810 ite.k:808 ite.k:811 ite.k:811 ite.k:814 ite.k:811 ite.k:812 ite.k:814 ite.k:814 ite.k:807 ite.k:811 ite.k:813 ite.k:807 ite.k:811 ite.k:809 ite.k:806 ite.k:814 ite.k:815 ite.k:811 ite.k:812 ite.k:809 ite.k:812 ite.k:813 ite.k:809 ite.k:808 ite.k:714 ite.k:813 ite.k:807 ite.k:811 ite.k:809 ite.k:806 ite.k:808 ite.k:812 ite.k:807 ite.k:813 ite.k:813 ite.k:807 ite.k:809 ite.k:813 ite.k:806 ite.k:809 VALUE PRODUCED BY IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 2 0 0 11 0 0 2 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 3/32 LeafsetExtension-PT-S32C3-CTLFireability-08 107223 m, 19369 m/sec, 312268 t fired, . VALUE PRODUCED BY IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 2 0 0 11 0 0 2 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 5/32 LeafsetExtension-PT-S32C3-CTLFireability-08 198108 m, 18177 m/sec, 591058 t fired, . VALUE PRODUCED BY IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 2 0 0 11 0 0 2 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 7/32 LeafsetExtension-PT-S32C3-CTLFireability-08 284592 m, 17296 m/sec, 880827 t fired, . VALUE PRODUCED BY IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 2 0 0 11 0 0 2 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 9/32 LeafsetExtension-PT-S32C3-CTLFireability-08 366241 m, 16329 m/sec, 1158867 t fired, . VALUE PRODUCED BY IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 2 0 0 11 0 0 2 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 11/32 LeafsetExtension-PT-S32C3-CTLFireability-08 456060 m, 17963 m/sec, 1436002 t fired, . VALUE PRODUCED BY IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 2 0 0 11 0 0 2 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 13/32 LeafsetExtension-PT-S32C3-CTLFireability-08 539572 m, 16702 m/sec, 1705952 t fired, . VALUE PRODUCED BY IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 2 0 0 11 0 0 2 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 15/32 LeafsetExtension-PT-S32C3-CTLFireability-08 618197 m, 15725 m/sec, 1972515 t fired, . VALUE PRODUCED BY IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 2 0 0 11 0 0 2 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 17/32 LeafsetExtension-PT-S32C3-CTLFireability-08 702092 m, 16779 m/sec, 2244651 t fired, . VALUE PRODUCED BY IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 2 0 0 11 0 0 2 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 19/32 LeafsetExtension-PT-S32C3-CTLFireability-08 784524 m, 16486 m/sec, 2513472 t fired, . VALUE PRODUCED BY IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 2 0 0 11 0 0 2 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 21/32 LeafsetExtension-PT-S32C3-CTLFireability-08 872864 m, 17668 m/sec, 2812412 t fired, . VALUE PRODUCED BY IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 2 0 0 11 0 0 2 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 22/32 LeafsetExtension-PT-S32C3-CTLFireability-08 956302 m, 16687 m/sec, 3082187 t fired, . VALUE PRODUCED BY IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 2 0 0 11 0 0 2 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 24/32 LeafsetExtension-PT-S32C3-CTLFireability-08 1043337 m, 17407 m/sec, 3347247 t fired, . VALUE PRODUCED BY IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 2 0 0 11 0 0 2 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 26/32 LeafsetExtension-PT-S32C3-CTLFireability-08 1130694 m, 17471 m/sec, 3621872 t fired, . VALUE PRODUCED BY IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 2 0 0 11 0 0 2 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 28/32 LeafsetExtension-PT-S32C3-CTLFireability-08 1201898 m, 14240 m/sec, 3891403 t fired, . VALUE PRODUCED BY IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 2 0 0 11 0 0 2 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 30/32 LeafsetExtension-PT-S32C3-CTLFireability-08 1273196 m, 14259 m/sec, 4169058 t fired, . VALUE PRODUCED BY IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 2 0 0 11 0 0 2 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 31/32 LeafsetExtension-PT-S32C3-CTLFireability-08 1346212 m, 14603 m/sec, 4438050 t fired, . for LeafsetExtension-PT-S32C3-CTLFireability-08 (memory limit exceeded) VALUE PRODUCED BY IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 2 0 0 11 0 0 2 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS for 59 LeafsetExtension-PT-S32C3-CTLFireability-13 VALUE PRODUCED BY IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 2 0 0 11 0 0 2 CTL 0 0 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 2/32 LeafsetExtension-PT-S32C3-CTLFireability-13 40733 m, 8146 m/sec, 182883 t fired, . VALUE PRODUCED BY IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 2 0 0 11 0 0 2 CTL 0 0 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 4/32 LeafsetExtension-PT-S32C3-CTLFireability-13 79509 m, 7755 m/sec, 357641 t fired, . VALUE PRODUCED BY IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 2 0 0 11 0 0 2 CTL 0 0 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 5/32 LeafsetExtension-PT-S32C3-CTLFireability-13 117641 m, 7626 m/sec, 530476 t fired, . VALUE PRODUCED BY IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 2 0 0 11 0 0 2 CTL 0 0 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 7/32 LeafsetExtension-PT-S32C3-CTLFireability-13 156303 m, 7732 m/sec, 696878 t fired, . VALUE PRODUCED BY IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 2 0 0 11 0 0 2 CTL 0 0 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 8/32 LeafsetExtension-PT-S32C3-CTLFireability-13 191299 m, 6999 m/sec, 850395 t fired, . VALUE PRODUCED BY IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 2 0 0 11 0 0 2 CTL 0 0 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 9/32 LeafsetExtension-PT-S32C3-CTLFireability-13 223518 m, 6443 m/sec, 1004731 t fired, . VALUE PRODUCED BY IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 2 0 0 11 0 0 2 CTL 0 0 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 11/32 LeafsetExtension-PT-S32C3-CTLFireability-13 254704 m, 6237 m/sec, 1158019 t fired, . VALUE PRODUCED BY IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 2 0 0 11 0 0 2 CTL 0 0 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 12/32 LeafsetExtension-PT-S32C3-CTLFireability-13 287452 m, 6549 m/sec, 1311473 t fired, . VALUE PRODUCED BY IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 2 0 0 11 0 0 2 CTL 0 0 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 13/32 LeafsetExtension-PT-S32C3-CTLFireability-13 318070 m, 6123 m/sec, 1463476 t fired, . VALUE PRODUCED BY IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 2 0 0 11 0 0 2 CTL 0 0 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 14/32 LeafsetExtension-PT-S32C3-CTLFireability-13 350265 m, 6439 m/sec, 1616441 t fired, . VALUE PRODUCED BY IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 2 0 0 11 0 0 2 CTL 0 0 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 15/32 LeafsetExtension-PT-S32C3-CTLFireability-13 382016 m, 6350 m/sec, 1770624 t fired, . VALUE PRODUCED BY IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 2 0 0 11 0 0 2 CTL 0 0 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 16/32 LeafsetExtension-PT-S32C3-CTLFireability-13 414953 m, 6587 m/sec, 1924538 t fired, . VALUE PRODUCED BY IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 2 0 0 11 0 0 2 CTL 0 0 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 17/32 LeafsetExtension-PT-S32C3-CTLFireability-13 446976 m, 6404 m/sec, 2074881 t fired, . VALUE PRODUCED BY IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 2 0 0 11 0 0 2 CTL 0 0 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 18/32 LeafsetExtension-PT-S32C3-CTLFireability-13 481194 m, 6843 m/sec, 2229964 t fired, . VALUE PRODUCED BY IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 2 0 0 11 0 0 2 CTL 0 0 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 19/32 LeafsetExtension-PT-S32C3-CTLFireability-13 511740 m, 6109 m/sec, 2382859 t fired, . VALUE PRODUCED BY IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 2 0 0 11 0 0 2 CTL 0 0 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 20/32 LeafsetExtension-PT-S32C3-CTLFireability-13 542329 m, 6117 m/sec, 2535278 t fired, . VALUE PRODUCED BY IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 2 0 0 11 0 0 2 CTL 0 0 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 21/32 LeafsetExtension-PT-S32C3-CTLFireability-13 572543 m, 6042 m/sec, 2686658 t fired, . VALUE PRODUCED BY IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 2 0 0 11 0 0 2 CTL 0 0 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 22/32 LeafsetExtension-PT-S32C3-CTLFireability-13 606558 m, 6803 m/sec, 2845381 t fired, . VALUE PRODUCED BY IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 2 0 0 11 0 0 2 CTL 0 0 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 24/32 LeafsetExtension-PT-S32C3-CTLFireability-13 637426 m, 6173 m/sec, 2998560 t fired, . VALUE PRODUCED BY IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 2 0 0 11 0 0 2 CTL 0 0 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 25/32 LeafsetExtension-PT-S32C3-CTLFireability-13 670837 m, 6682 m/sec, 3151732 t fired, . VALUE PRODUCED BY IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 2 0 0 11 0 0 2 CTL 0 0 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 27/32 LeafsetExtension-PT-S32C3-CTLFireability-13 703431 m, 6518 m/sec, 3298574 t fired, . VALUE PRODUCED BY IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 2 0 0 11 0 0 2 CTL 0 0 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 28/32 LeafsetExtension-PT-S32C3-CTLFireability-13 738205 m, 6954 m/sec, 3455899 t fired, . VALUE PRODUCED BY IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 2 0 0 11 0 0 2 CTL 0 0 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 30/32 LeafsetExtension-PT-S32C3-CTLFireability-13 773909 m, 7140 m/sec, 3608845 t fired, . VALUE PRODUCED BY IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 2 0 0 11 0 0 2 CTL 0 0 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 31/32 LeafsetExtension-PT-S32C3-CTLFireability-13 806139 m, 6446 m/sec, 3761462 t fired, . VALUE PRODUCED BY IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 2 0 0 11 0 0 2 CTL 0 0 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 32/32 LeafsetExtension-PT-S32C3-CTLFireability-13 837462 m, 6264 m/sec, 3913015 t fired, . for LeafsetExtension-PT-S32C3-CTLFireability-13 (memory limit exceeded) VALUE PRODUCED BY IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 2 0 0 11 0 0 2 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS for 36 LeafsetExtension-PT-S32C3-CTLFireability-12 for LeafsetExtension-PT-S32C3-CTLFireability-12 2 1 0.000000 1 for 33 LeafsetExtension-PT-S32C3-CTLFireability-11 for LeafsetExtension-PT-S32C3-CTLFireability-11 27 29 0.000000 1 for 21 LeafsetExtension-PT-S32C3-CTLFireability-07 for LeafsetExtension-PT-S32C3-CTLFireability-07 1362 2739 0.000000 1 for 15 LeafsetExtension-PT-S32C3-CTLFireability-05 for LeafsetExtension-PT-S32C3-CTLFireability-05 16217 39596 2.000000 1 for 12 LeafsetExtension-PT-S32C3-CTLFireability-04 for LeafsetExtension-PT-S32C3-CTLFireability-04 59 143 0.000000 1 for 9 LeafsetExtension-PT-S32C3-CTLFireability-03 VALUE PRODUCED BY CTL false CTL model checker CTL true CTL model checker CTL true CTL model checker CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 1 0 0 12 0 0 2 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 2/32 LeafsetExtension-PT-S32C3-CTLFireability-03 43355 m, 8671 m/sec, 125452 t fired, . VALUE PRODUCED BY CTL false CTL model checker CTL true CTL model checker CTL true CTL model checker CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 1 0 0 12 0 0 2 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 4/32 LeafsetExtension-PT-S32C3-CTLFireability-03 98540 m, 11037 m/sec, 290938 t fired, . VALUE PRODUCED BY CTL false CTL model checker CTL true CTL model checker CTL true CTL model checker CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 1 0 0 12 0 0 2 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 7/32 LeafsetExtension-PT-S32C3-CTLFireability-03 151899 m, 10671 m/sec, 457325 t fired, . VALUE PRODUCED BY CTL false CTL model checker CTL true CTL model checker CTL true CTL model checker CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 1 0 0 12 0 0 2 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 9/32 LeafsetExtension-PT-S32C3-CTLFireability-03 205712 m, 10762 m/sec, 621388 t fired, . VALUE PRODUCED BY CTL false CTL model checker CTL true CTL model checker CTL true CTL model checker CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 1 0 0 12 0 0 2 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 11/32 LeafsetExtension-PT-S32C3-CTLFireability-03 260545 m, 10966 m/sec, 784036 t fired, . VALUE PRODUCED BY CTL false CTL model checker CTL true CTL model checker CTL true CTL model checker CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 1 0 0 12 0 0 2 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 13/32 LeafsetExtension-PT-S32C3-CTLFireability-03 316686 m, 11228 m/sec, 944490 t fired, . VALUE PRODUCED BY CTL false CTL model checker CTL true CTL model checker CTL true CTL model checker CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 1 0 0 12 0 0 2 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 15/32 LeafsetExtension-PT-S32C3-CTLFireability-03 370479 m, 10758 m/sec, 1105897 t fired, . VALUE PRODUCED BY CTL false CTL model checker CTL true CTL model checker CTL true CTL model checker CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 1 0 0 12 0 0 2 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 17/32 LeafsetExtension-PT-S32C3-CTLFireability-03 425050 m, 10914 m/sec, 1265516 t fired, . VALUE PRODUCED BY CTL false CTL model checker CTL true CTL model checker CTL true CTL model checker CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 1 0 0 12 0 0 2 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 19/32 LeafsetExtension-PT-S32C3-CTLFireability-03 486940 m, 12378 m/sec, 1419523 t fired, . VALUE PRODUCED BY CTL false CTL model checker CTL true CTL model checker CTL true CTL model checker CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 1 0 0 12 0 0 2 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 21/32 LeafsetExtension-PT-S32C3-CTLFireability-03 537265 m, 10065 m/sec, 1577133 t fired, . VALUE PRODUCED BY CTL false CTL model checker CTL true CTL model checker CTL true CTL model checker CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 1 0 0 12 0 0 2 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 24/32 LeafsetExtension-PT-S32C3-CTLFireability-03 594719 m, 11490 m/sec, 1733112 t fired, . VALUE PRODUCED BY CTL false CTL model checker CTL true CTL model checker CTL true CTL model checker CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 1 0 0 12 0 0 2 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 26/32 LeafsetExtension-PT-S32C3-CTLFireability-03 645344 m, 10125 m/sec, 1892500 t fired, . VALUE PRODUCED BY CTL false CTL model checker CTL true CTL model checker CTL true CTL model checker CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 1 0 0 12 0 0 2 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 28/32 LeafsetExtension-PT-S32C3-CTLFireability-03 695687 m, 10068 m/sec, 2054430 t fired, . VALUE PRODUCED BY CTL false CTL model checker CTL true CTL model checker CTL true CTL model checker CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 1 0 0 12 0 0 2 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 30/32 LeafsetExtension-PT-S32C3-CTLFireability-03 747033 m, 10269 m/sec, 2212847 t fired, . VALUE PRODUCED BY CTL false CTL model checker CTL true CTL model checker CTL true CTL model checker CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 1 0 0 12 0 0 2 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 32/32 LeafsetExtension-PT-S32C3-CTLFireability-03 798596 m, 10312 m/sec, 2370577 t fired, . for LeafsetExtension-PT-S32C3-CTLFireability-03 (memory limit exceeded) VALUE PRODUCED BY CTL false CTL model checker CTL true CTL model checker CTL true CTL model checker CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 1 0 0 12 0 0 2 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS for 6 LeafsetExtension-PT-S32C3-CTLFireability-02 for LeafsetExtension-PT-S32C3-CTLFireability-02 27 28 0.000000 1 for 3 LeafsetExtension-PT-S32C3-CTLFireability-01 for LeafsetExtension-PT-S32C3-CTLFireability-01 49 155 0.000000 1 for 36 LeafsetExtension-PT-S32C3-CTLFireability-12 VALUE PRODUCED BY CTL true CTL model checker CTL false CTL model checker CTL false CTL model checker CTL true CTL model checker CTL true CTL model checker CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 0 1 0 12 0 0 2 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 4/32 LeafsetExtension-PT-S32C3-CTLFireability-12 136140 m, 27228 m/sec, 195472 t fired, . VALUE PRODUCED BY CTL true CTL model checker CTL false CTL model checker CTL false CTL model checker CTL true CTL model checker CTL true CTL model checker CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 0 1 0 12 0 0 2 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 7/32 LeafsetExtension-PT-S32C3-CTLFireability-12 253441 m, 23460 m/sec, 391907 t fired, . VALUE PRODUCED BY CTL true CTL model checker CTL false CTL model checker CTL false CTL model checker CTL true CTL model checker CTL true CTL model checker CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 0 1 0 12 0 0 2 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 10/32 LeafsetExtension-PT-S32C3-CTLFireability-12 369729 m, 23257 m/sec, 581340 t fired, . VALUE PRODUCED BY CTL true CTL model checker CTL false CTL model checker CTL false CTL model checker CTL true CTL model checker CTL true CTL model checker CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 0 1 0 12 0 0 2 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 13/32 LeafsetExtension-PT-S32C3-CTLFireability-12 485193 m, 23092 m/sec, 774837 t fired, . VALUE PRODUCED BY CTL true CTL model checker CTL false CTL model checker CTL false CTL model checker CTL true CTL model checker CTL true CTL model checker CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 0 1 0 12 0 0 2 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 16/32 LeafsetExtension-PT-S32C3-CTLFireability-12 601445 m, 23250 m/sec, 971419 t fired, . VALUE PRODUCED BY CTL true CTL model checker CTL false CTL model checker CTL false CTL model checker CTL true CTL model checker CTL true CTL model checker CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 0 1 0 12 0 0 2 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 19/32 LeafsetExtension-PT-S32C3-CTLFireability-12 715011 m, 22713 m/sec, 1167942 t fired, . VALUE PRODUCED BY CTL true CTL model checker CTL false CTL model checker CTL false CTL model checker CTL true CTL model checker CTL true CTL model checker CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 0 1 0 12 0 0 2 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 22/32 LeafsetExtension-PT-S32C3-CTLFireability-12 837660 m, 24529 m/sec, 1366911 t fired, . VALUE PRODUCED BY CTL true CTL model checker CTL false CTL model checker CTL false CTL model checker CTL true CTL model checker CTL true CTL model checker CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 0 1 0 12 0 0 2 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 24/32 LeafsetExtension-PT-S32C3-CTLFireability-12 956244 m, 23716 m/sec, 1573413 t fired, . VALUE PRODUCED BY CTL true CTL model checker CTL false CTL model checker CTL false CTL model checker CTL true CTL model checker CTL true CTL model checker CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 0 1 0 12 0 0 2 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 27/32 LeafsetExtension-PT-S32C3-CTLFireability-12 1067022 m, 22155 m/sec, 1764915 t fired, . VALUE PRODUCED BY CTL true CTL model checker CTL false CTL model checker CTL false CTL model checker CTL true CTL model checker CTL true CTL model checker CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 0 1 0 12 0 0 2 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 30/32 LeafsetExtension-PT-S32C3-CTLFireability-12 1183098 m, 23215 m/sec, 1954937 t fired, . for LeafsetExtension-PT-S32C3-CTLFireability-12 (memory limit exceeded) VALUE PRODUCED BY CTL true CTL model checker CTL false CTL model checker CTL false CTL model checker CTL true CTL model checker CTL true CTL model checker CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 0 0 0 12 0 1 2 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS for 30 LeafsetExtension-PT-S32C3-CTLFireability-10 for LeafsetExtension-PT-S32C3-CTLFireability-10 18 18 0.000000 1 for 27 LeafsetExtension-PT-S32C3-CTLFireability-09 for LeafsetExtension-PT-S32C3-CTLFireability-09 20 22 0.000000 1 for 62 LeafsetExtension-PT-S32C3-CTLFireability-14 for LeafsetExtension-PT-S32C3-CTLFireability-14 18 36 0.000000 1 for 18 LeafsetExtension-PT-S32C3-CTLFireability-06 VALUE PRODUCED BY CTL true CTL model checker CTL false CTL model checker CTL false CTL model checker CTL true CTL model checker CTL true CTL model checker CTL false CTL model checker CTL false CTL model checker CTL true CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 12 0 1 2 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 2/32 LeafsetExtension-PT-S32C3-CTLFireability-06 36606 m, 7321 m/sec, 318283 t fired, . VALUE PRODUCED BY CTL true CTL model checker CTL false CTL model checker CTL false CTL model checker CTL true CTL model checker CTL true CTL model checker CTL false CTL model checker CTL false CTL model checker CTL true CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 12 0 1 2 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 2/32 LeafsetExtension-PT-S32C3-CTLFireability-06 68821 m, 6443 m/sec, 606322 t fired, . VALUE PRODUCED BY CTL true CTL model checker CTL false CTL model checker CTL false CTL model checker CTL true CTL model checker CTL true CTL model checker CTL false CTL model checker CTL false CTL model checker CTL true CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 12 0 1 2 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 3/32 LeafsetExtension-PT-S32C3-CTLFireability-06 100259 m, 6287 m/sec, 891398 t fired, . VALUE PRODUCED BY CTL true CTL model checker CTL false CTL model checker CTL false CTL model checker CTL true CTL model checker CTL true CTL model checker CTL false CTL model checker CTL false CTL model checker CTL true CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 12 0 1 2 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 4/32 LeafsetExtension-PT-S32C3-CTLFireability-06 131733 m, 6294 m/sec, 1176209 t fired, . VALUE PRODUCED BY CTL true CTL model checker CTL false CTL model checker CTL false CTL model checker CTL true CTL model checker CTL true CTL model checker CTL false CTL model checker CTL false CTL model checker CTL true CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 12 0 1 2 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 5/32 LeafsetExtension-PT-S32C3-CTLFireability-06 163017 m, 6256 m/sec, 1463756 t fired, . VALUE PRODUCED BY CTL true CTL model checker CTL false CTL model checker CTL false CTL model checker CTL true CTL model checker CTL true CTL model checker CTL false CTL model checker CTL false CTL model checker CTL true CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 12 0 1 2 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 5/32 LeafsetExtension-PT-S32C3-CTLFireability-06 194571 m, 6310 m/sec, 1749646 t fired, . VALUE PRODUCED BY CTL true CTL model checker CTL false CTL model checker CTL false CTL model checker CTL true CTL model checker CTL true CTL model checker CTL false CTL model checker CTL false CTL model checker CTL true CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 12 0 1 2 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 6/32 LeafsetExtension-PT-S32C3-CTLFireability-06 225289 m, 6143 m/sec, 2030343 t fired, . VALUE PRODUCED BY CTL true CTL model checker CTL false CTL model checker CTL false CTL model checker CTL true CTL model checker CTL true CTL model checker CTL false CTL model checker CTL false CTL model checker CTL true CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 12 0 1 2 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 7/32 LeafsetExtension-PT-S32C3-CTLFireability-06 255043 m, 5950 m/sec, 2312412 t fired, . VALUE PRODUCED BY CTL true CTL model checker CTL false CTL model checker CTL false CTL model checker CTL true CTL model checker CTL true CTL model checker CTL false CTL model checker CTL false CTL model checker CTL true CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 12 0 1 2 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 7/32 LeafsetExtension-PT-S32C3-CTLFireability-06 289425 m, 6876 m/sec, 2631768 t fired, . VALUE PRODUCED BY CTL true CTL model checker CTL false CTL model checker CTL false CTL model checker CTL true CTL model checker CTL true CTL model checker CTL false CTL model checker CTL false CTL model checker CTL true CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 12 0 1 2 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 8/32 LeafsetExtension-PT-S32C3-CTLFireability-06 320026 m, 6120 m/sec, 2916787 t fired, . VALUE PRODUCED BY CTL true CTL model checker CTL false CTL model checker CTL false CTL model checker CTL true CTL model checker CTL true CTL model checker CTL false CTL model checker CTL false CTL model checker CTL true CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 12 0 1 2 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 9/32 LeafsetExtension-PT-S32C3-CTLFireability-06 349953 m, 5985 m/sec, 3200414 t fired, . VALUE PRODUCED BY CTL true CTL model checker CTL false CTL model checker CTL false CTL model checker CTL true CTL model checker CTL true CTL model checker CTL false CTL model checker CTL false CTL model checker CTL true CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 12 0 1 2 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 9/32 LeafsetExtension-PT-S32C3-CTLFireability-06 380306 m, 6070 m/sec, 3489050 t fired, . VALUE PRODUCED BY CTL true CTL model checker CTL false CTL model checker CTL false CTL model checker CTL true CTL model checker CTL true CTL model checker CTL false CTL model checker CTL false CTL model checker CTL true CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 12 0 1 2 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 10/32 LeafsetExtension-PT-S32C3-CTLFireability-06 412491 m, 6437 m/sec, 3781273 t fired, . VALUE PRODUCED BY CTL true CTL model checker CTL false CTL model checker CTL false CTL model checker CTL true CTL model checker CTL true CTL model checker CTL false CTL model checker CTL false CTL model checker CTL true CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 12 0 1 2 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 11/32 LeafsetExtension-PT-S32C3-CTLFireability-06 444141 m, 6330 m/sec, 4067056 t fired, . VALUE PRODUCED BY CTL true CTL model checker CTL false CTL model checker CTL false CTL model checker CTL true CTL model checker CTL true CTL model checker CTL false CTL model checker CTL false CTL model checker CTL true CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 12 0 1 2 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 12/32 LeafsetExtension-PT-S32C3-CTLFireability-06 474286 m, 6029 m/sec, 4343810 t fired, . VALUE PRODUCED BY CTL true CTL model checker CTL false CTL model checker CTL false CTL model checker CTL true CTL model checker CTL true CTL model checker CTL false CTL model checker CTL false CTL model checker CTL true CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 12 0 1 2 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 12/32 LeafsetExtension-PT-S32C3-CTLFireability-06 503165 m, 5775 m/sec, 4616373 t fired, . VALUE PRODUCED BY CTL true CTL model checker CTL false CTL model checker CTL false CTL model checker CTL true CTL model checker CTL true CTL model checker CTL false CTL model checker CTL false CTL model checker CTL true CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 12 0 1 2 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 13/32 LeafsetExtension-PT-S32C3-CTLFireability-06 534010 m, 6169 m/sec, 4898796 t fired, . VALUE PRODUCED BY CTL true CTL model checker CTL false CTL model checker CTL false CTL model checker CTL true CTL model checker CTL true CTL model checker CTL false CTL model checker CTL false CTL model checker CTL true CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 12 0 1 2 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 14/32 LeafsetExtension-PT-S32C3-CTLFireability-06 564820 m, 6162 m/sec, 5177371 t fired, . VALUE PRODUCED BY CTL true CTL model checker CTL false CTL model checker CTL false CTL model checker CTL true CTL model checker CTL true CTL model checker CTL false CTL model checker CTL false CTL model checker CTL true CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 12 0 1 2 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 14/32 LeafsetExtension-PT-S32C3-CTLFireability-06 595362 m, 6108 m/sec, 5457907 t fired, . VALUE PRODUCED BY CTL true CTL model checker CTL false CTL model checker CTL false CTL model checker CTL true CTL model checker CTL true CTL model checker CTL false CTL model checker CTL false CTL model checker CTL true CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 12 0 1 2 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 15/32 LeafsetExtension-PT-S32C3-CTLFireability-06 624016 m, 5730 m/sec, 5730834 t fired, . VALUE PRODUCED BY CTL true CTL model checker CTL false CTL model checker CTL false CTL model checker CTL true CTL model checker CTL true CTL model checker CTL false CTL model checker CTL false CTL model checker CTL true CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 12 0 1 2 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 16/32 LeafsetExtension-PT-S32C3-CTLFireability-06 653290 m, 5854 m/sec, 6002263 t fired, . VALUE PRODUCED BY CTL true CTL model checker CTL false CTL model checker CTL false CTL model checker CTL true CTL model checker CTL true CTL model checker CTL false CTL model checker CTL false CTL model checker CTL true CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 12 0 1 2 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 16/32 LeafsetExtension-PT-S32C3-CTLFireability-06 685720 m, 6486 m/sec, 6270882 t fired, . VALUE PRODUCED BY CTL true CTL model checker CTL false CTL model checker CTL false CTL model checker CTL true CTL model checker CTL true CTL model checker CTL false CTL model checker CTL false CTL model checker CTL true CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 12 0 1 2 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 17/32 LeafsetExtension-PT-S32C3-CTLFireability-06 711468 m, 5149 m/sec, 6556351 t fired, . VALUE PRODUCED BY CTL true CTL model checker CTL false CTL model checker CTL false CTL model checker CTL true CTL model checker CTL true CTL model checker CTL false CTL model checker CTL false CTL model checker CTL true CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 12 0 1 2 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 18/32 LeafsetExtension-PT-S32C3-CTLFireability-06 742526 m, 6211 m/sec, 6843126 t fired, . VALUE PRODUCED BY CTL true CTL model checker CTL false CTL model checker CTL false CTL model checker CTL true CTL model checker CTL true CTL model checker CTL false CTL model checker CTL false CTL model checker CTL true CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 12 0 1 2 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 19/32 LeafsetExtension-PT-S32C3-CTLFireability-06 774262 m, 6347 m/sec, 7131551 t fired, . VALUE PRODUCED BY CTL true CTL model checker CTL false CTL model checker CTL false CTL model checker CTL true CTL model checker CTL true CTL model checker CTL false CTL model checker CTL false CTL model checker CTL true CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 12 0 1 2 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 19/32 LeafsetExtension-PT-S32C3-CTLFireability-06 802943 m, 5736 m/sec, 7398507 t fired, . VALUE PRODUCED BY CTL true CTL model checker CTL false CTL model checker CTL false CTL model checker CTL true CTL model checker CTL true CTL model checker CTL false CTL model checker CTL false CTL model checker CTL true CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 12 0 1 2 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 20/32 LeafsetExtension-PT-S32C3-CTLFireability-06 835139 m, 6439 m/sec, 7701890 t fired, . VALUE PRODUCED BY CTL true CTL model checker CTL false CTL model checker CTL false CTL model checker CTL true CTL model checker CTL true CTL model checker CTL false CTL model checker CTL false CTL model checker CTL true CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 12 0 1 2 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 21/32 LeafsetExtension-PT-S32C3-CTLFireability-06 867475 m, 6467 m/sec, 7988324 t fired, . VALUE PRODUCED BY CTL true CTL model checker CTL false CTL model checker CTL false CTL model checker CTL true CTL model checker CTL true CTL model checker CTL false CTL model checker CTL false CTL model checker CTL true CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 12 0 1 2 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 21/32 LeafsetExtension-PT-S32C3-CTLFireability-06 899666 m, 6438 m/sec, 8278183 t fired, . VALUE PRODUCED BY CTL true CTL model checker CTL false CTL model checker CTL false CTL model checker CTL true CTL model checker CTL true CTL model checker CTL false CTL model checker CTL false CTL model checker CTL true CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 12 0 1 2 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 22/32 LeafsetExtension-PT-S32C3-CTLFireability-06 932937 m, 6654 m/sec, 8595354 t fired, . VALUE PRODUCED BY CTL true CTL model checker CTL false CTL model checker CTL false CTL model checker CTL true CTL model checker CTL true CTL model checker CTL false CTL model checker CTL false CTL model checker CTL true CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 12 0 1 2 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 23/32 LeafsetExtension-PT-S32C3-CTLFireability-06 962674 m, 5947 m/sec, 8874403 t fired, . VALUE PRODUCED BY CTL true CTL model checker CTL false CTL model checker CTL false CTL model checker CTL true CTL model checker CTL true CTL model checker CTL false CTL model checker CTL false CTL model checker CTL true CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 12 0 1 2 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 23/32 LeafsetExtension-PT-S32C3-CTLFireability-06 993130 m, 6091 m/sec, 9154133 t fired, . VALUE PRODUCED BY CTL true CTL model checker CTL false CTL model checker CTL false CTL model checker CTL true CTL model checker CTL true CTL model checker CTL false CTL model checker CTL false CTL model checker CTL true CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 12 0 1 2 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 24/32 LeafsetExtension-PT-S32C3-CTLFireability-06 1024165 m, 6207 m/sec, 9433242 t fired, . VALUE PRODUCED BY CTL true CTL model checker CTL false CTL model checker CTL false CTL model checker CTL true CTL model checker CTL true CTL model checker CTL false CTL model checker CTL false CTL model checker CTL true CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 12 0 1 2 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 25/32 LeafsetExtension-PT-S32C3-CTLFireability-06 1055947 m, 6356 m/sec, 9707984 t fired, . VALUE PRODUCED BY CTL true CTL model checker CTL false CTL model checker CTL false CTL model checker CTL true CTL model checker CTL true CTL model checker CTL false CTL model checker CTL false CTL model checker CTL true CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 12 0 1 2 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 25/32 LeafsetExtension-PT-S32C3-CTLFireability-06 1084269 m, 5664 m/sec, 9980493 t fired, . VALUE PRODUCED BY CTL true CTL model checker CTL false CTL model checker CTL false CTL model checker CTL true CTL model checker CTL true CTL model checker CTL false CTL model checker CTL false CTL model checker CTL true CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 12 0 1 2 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 26/32 LeafsetExtension-PT-S32C3-CTLFireability-06 1115261 m, 6198 m/sec, 10263676 t fired, . VALUE PRODUCED BY CTL true CTL model checker CTL false CTL model checker CTL false CTL model checker CTL true CTL model checker CTL true CTL model checker CTL false CTL model checker CTL false CTL model checker CTL true CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 12 0 1 2 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 27/32 LeafsetExtension-PT-S32C3-CTLFireability-06 1147606 m, 6469 m/sec, 10542812 t fired, . VALUE PRODUCED BY CTL true CTL model checker CTL false CTL model checker CTL false CTL model checker CTL true CTL model checker CTL true CTL model checker CTL false CTL model checker CTL false CTL model checker CTL true CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 12 0 1 2 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 28/32 LeafsetExtension-PT-S32C3-CTLFireability-06 1177121 m, 5903 m/sec, 10819451 t fired, . VALUE PRODUCED BY CTL true CTL model checker CTL false CTL model checker CTL false CTL model checker CTL true CTL model checker CTL true CTL model checker CTL false CTL model checker CTL false CTL model checker CTL true CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 12 0 1 2 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 28/32 LeafsetExtension-PT-S32C3-CTLFireability-06 1206135 m, 5802 m/sec, 11098525 t fired, . VALUE PRODUCED BY CTL true CTL model checker CTL false CTL model checker CTL false CTL model checker CTL true CTL model checker CTL true CTL model checker CTL false CTL model checker CTL false CTL model checker CTL true CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 12 0 1 2 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 29/32 LeafsetExtension-PT-S32C3-CTLFireability-06 1233471 m, 5467 m/sec, 11375817 t fired, . VALUE PRODUCED BY CTL true CTL model checker CTL false CTL model checker CTL false CTL model checker CTL true CTL model checker CTL true CTL model checker CTL false CTL model checker CTL false CTL model checker CTL true CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 12 0 1 2 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 30/32 LeafsetExtension-PT-S32C3-CTLFireability-06 1262031 m, 5712 m/sec, 11654508 t fired, . VALUE PRODUCED BY CTL true CTL model checker CTL false CTL model checker CTL false CTL model checker CTL true CTL model checker CTL true CTL model checker CTL false CTL model checker CTL false CTL model checker CTL true CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 12 0 1 2 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 30/32 LeafsetExtension-PT-S32C3-CTLFireability-06 1292030 m, 5999 m/sec, 11942331 t fired, . VALUE PRODUCED BY CTL true CTL model checker CTL false CTL model checker CTL false CTL model checker CTL true CTL model checker CTL true CTL model checker CTL false CTL model checker CTL false CTL model checker CTL true CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 12 0 1 2 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 31/32 LeafsetExtension-PT-S32C3-CTLFireability-06 1320906 m, 5775 m/sec, 12225333 t fired, . VALUE PRODUCED BY CTL true CTL model checker CTL false CTL model checker CTL false CTL model checker CTL true CTL model checker CTL true CTL model checker CTL false CTL model checker CTL false CTL model checker CTL true CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 12 0 1 2 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 31/32 LeafsetExtension-PT-S32C3-CTLFireability-06 1348634 m, 5545 m/sec, 12506680 t fired, . VALUE PRODUCED BY CTL true CTL model checker CTL false CTL model checker CTL false CTL model checker CTL true CTL model checker CTL true CTL model checker CTL false CTL model checker CTL false CTL model checker CTL true CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 12 0 1 2 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 32/32 LeafsetExtension-PT-S32C3-CTLFireability-06 1376433 m, 5559 m/sec, 12776740 t fired, . for LeafsetExtension-PT-S32C3-CTLFireability-06 (memory limit exceeded) VALUE PRODUCED BY CTL true CTL model checker CTL false CTL model checker CTL false CTL model checker CTL true CTL model checker CTL true CTL model checker CTL false CTL model checker CTL false CTL model checker CTL true CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 12 0 1 2 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS for 0 LeafsetExtension-PT-S32C3-CTLFireability-00 VALUE PRODUCED BY CTL true CTL model checker CTL false CTL model checker CTL false CTL model checker CTL true CTL model checker CTL true CTL model checker CTL false CTL model checker CTL false CTL model checker CTL true CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 12 0 1 2 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 3/32 LeafsetExtension-PT-S32C3-CTLFireability-00 100518 m, 20103 m/sec, 283276 t fired, . VALUE PRODUCED BY CTL true CTL model checker CTL false CTL model checker CTL false CTL model checker CTL true CTL model checker CTL true CTL model checker CTL false CTL model checker CTL false CTL model checker CTL true CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 12 0 1 2 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 5/32 LeafsetExtension-PT-S32C3-CTLFireability-00 190920 m, 18080 m/sec, 557004 t fired, . VALUE PRODUCED BY CTL true CTL model checker CTL false CTL model checker CTL false CTL model checker CTL true CTL model checker CTL true CTL model checker CTL false CTL model checker CTL false CTL model checker CTL true CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 12 0 1 2 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 7/32 LeafsetExtension-PT-S32C3-CTLFireability-00 280106 m, 17837 m/sec, 835453 t fired, . VALUE PRODUCED BY CTL true CTL model checker CTL false CTL model checker CTL false CTL model checker CTL true CTL model checker CTL true CTL model checker CTL false CTL model checker CTL false CTL model checker CTL true CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 12 0 1 2 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 9/32 LeafsetExtension-PT-S32C3-CTLFireability-00 367125 m, 17403 m/sec, 1117997 t fired, . VALUE PRODUCED BY CTL true CTL model checker CTL false CTL model checker CTL false CTL model checker CTL true CTL model checker CTL true CTL model checker CTL false CTL model checker CTL false CTL model checker CTL true CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 12 0 1 2 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 11/32 LeafsetExtension-PT-S32C3-CTLFireability-00 455701 m, 17715 m/sec, 1395756 t fired, . VALUE PRODUCED BY CTL true CTL model checker CTL false CTL model checker CTL false CTL model checker CTL true CTL model checker CTL true CTL model checker CTL false CTL model checker CTL false CTL model checker CTL true CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 12 0 1 2 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 13/32 LeafsetExtension-PT-S32C3-CTLFireability-00 539457 m, 16751 m/sec, 1661454 t fired, . VALUE PRODUCED BY CTL true CTL model checker CTL false CTL model checker CTL false CTL model checker CTL true CTL model checker CTL true CTL model checker CTL false CTL model checker CTL false CTL model checker CTL true CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 12 0 1 2 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 15/32 LeafsetExtension-PT-S32C3-CTLFireability-00 625214 m, 17151 m/sec, 1927514 t fired, . VALUE PRODUCED BY CTL true CTL model checker CTL false CTL model checker CTL false CTL model checker CTL true CTL model checker CTL true CTL model checker CTL false CTL model checker CTL false CTL model checker CTL true CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 12 0 1 2 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 17/32 LeafsetExtension-PT-S32C3-CTLFireability-00 705047 m, 15966 m/sec, 2191378 t fired, . VALUE PRODUCED BY CTL true CTL model checker CTL false CTL model checker CTL false CTL model checker CTL true CTL model checker CTL true CTL model checker CTL false CTL model checker CTL false CTL model checker CTL true CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 12 0 1 2 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 19/32 LeafsetExtension-PT-S32C3-CTLFireability-00 792506 m, 17491 m/sec, 2458068 t fired, . VALUE PRODUCED BY CTL true CTL model checker CTL false CTL model checker CTL false CTL model checker CTL true CTL model checker CTL true CTL model checker CTL false CTL model checker CTL false CTL model checker CTL true CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 12 0 1 2 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 21/32 LeafsetExtension-PT-S32C3-CTLFireability-00 881556 m, 17810 m/sec, 2745779 t fired, . VALUE PRODUCED BY CTL true CTL model checker CTL false CTL model checker CTL false CTL model checker CTL true CTL model checker CTL true CTL model checker CTL false CTL model checker CTL false CTL model checker CTL true CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 12 0 1 2 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 23/32 LeafsetExtension-PT-S32C3-CTLFireability-00 963382 m, 16365 m/sec, 3025110 t fired, . VALUE PRODUCED BY CTL true CTL model checker CTL false CTL model checker CTL false CTL model checker CTL true CTL model checker CTL true CTL model checker CTL false CTL model checker CTL false CTL model checker CTL true CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 12 0 1 2 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 25/32 LeafsetExtension-PT-S32C3-CTLFireability-00 1053334 m, 17990 m/sec, 3287448 t fired, . VALUE PRODUCED BY CTL true CTL model checker CTL false CTL model checker CTL false CTL model checker CTL true CTL model checker CTL true CTL model checker CTL false CTL model checker CTL false CTL model checker CTL true CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 12 0 1 2 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 27/32 LeafsetExtension-PT-S32C3-CTLFireability-00 1144563 m, 18245 m/sec, 3553329 t fired, . VALUE PRODUCED BY CTL true CTL model checker CTL false CTL model checker CTL false CTL model checker CTL true CTL model checker CTL true CTL model checker CTL false CTL model checker CTL false CTL model checker CTL true CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 12 0 1 2 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 29/32 LeafsetExtension-PT-S32C3-CTLFireability-00 1216783 m, 14444 m/sec, 3820551 t fired, . VALUE PRODUCED BY CTL true CTL model checker CTL false CTL model checker CTL false CTL model checker CTL true CTL model checker CTL true CTL model checker CTL false CTL model checker CTL false CTL model checker CTL true CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 12 0 1 2 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 31/32 LeafsetExtension-PT-S32C3-CTLFireability-00 1294386 m, 15520 m/sec, 4091060 t fired, . VALUE PRODUCED BY CTL true CTL model checker CTL false CTL model checker CTL false CTL model checker CTL true CTL model checker CTL true CTL model checker CTL false CTL model checker CTL false CTL model checker CTL true CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 12 0 1 2 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 32/32 LeafsetExtension-PT-S32C3-CTLFireability-00 1366231 m, 14369 m/sec, 4353711 t fired, . for LeafsetExtension-PT-S32C3-CTLFireability-00 (memory limit exceeded) VALUE PRODUCED BY CTL true CTL model checker CTL false CTL model checker CTL false CTL model checker CTL true CTL model checker CTL true CTL model checker CTL false CTL model checker CTL false CTL model checker CTL true CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 12 0 1 2 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS for 65 LeafsetExtension-PT-S32C3-CTLFireability-15 VALUE PRODUCED BY CTL true CTL model checker CTL false CTL model checker CTL false CTL model checker CTL true CTL model checker CTL true CTL model checker CTL false CTL model checker CTL false CTL model checker CTL true CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 12 0 1 2 CTL 0 0 0 0 1 0 1 0 CTL 0 0 1 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 3/32 LeafsetExtension-PT-S32C3-CTLFireability-15 75003 m, 15000 m/sec, 289500 t fired, . VALUE PRODUCED BY CTL true CTL model checker CTL false CTL model checker CTL false CTL model checker CTL true CTL model checker CTL true CTL model checker CTL false CTL model checker CTL false CTL model checker CTL true CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 12 0 1 2 CTL 0 0 0 0 1 0 1 0 CTL 0 0 1 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 5/32 LeafsetExtension-PT-S32C3-CTLFireability-15 164018 m, 17803 m/sec, 560909 t fired, . VALUE PRODUCED BY CTL true CTL model checker CTL false CTL model checker CTL false CTL model checker CTL true CTL model checker CTL true CTL model checker CTL false CTL model checker CTL false CTL model checker CTL true CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 12 0 1 2 CTL 0 0 0 0 1 0 1 0 CTL 0 0 1 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 7/32 LeafsetExtension-PT-S32C3-CTLFireability-15 252012 m, 17598 m/sec, 829134 t fired, . VALUE PRODUCED BY CTL true CTL model checker CTL false CTL model checker CTL false CTL model checker CTL true CTL model checker CTL true CTL model checker CTL false CTL model checker CTL false CTL model checker CTL true CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 12 0 1 2 CTL 0 0 0 0 1 0 1 0 CTL 0 0 1 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 9/32 LeafsetExtension-PT-S32C3-CTLFireability-15 337629 m, 17123 m/sec, 1118065 t fired, . VALUE PRODUCED BY CTL true CTL model checker CTL false CTL model checker CTL false CTL model checker CTL true CTL model checker CTL true CTL model checker CTL false CTL model checker CTL false CTL model checker CTL true CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 12 0 1 2 CTL 0 0 0 0 1 0 1 0 CTL 0 0 1 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 11/32 LeafsetExtension-PT-S32C3-CTLFireability-15 423980 m, 17270 m/sec, 1396084 t fired, . VALUE PRODUCED BY CTL true CTL model checker CTL false CTL model checker CTL false CTL model checker CTL true CTL model checker CTL true CTL model checker CTL false CTL model checker CTL false CTL model checker CTL true CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 12 0 1 2 CTL 0 0 0 0 1 0 1 0 CTL 0 0 1 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 13/32 LeafsetExtension-PT-S32C3-CTLFireability-15 512487 m, 17701 m/sec, 1664822 t fired, . VALUE PRODUCED BY CTL true CTL model checker CTL false CTL model checker CTL false CTL model checker CTL true CTL model checker CTL true CTL model checker CTL false CTL model checker CTL false CTL model checker CTL true CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 12 0 1 2 CTL 0 0 0 0 1 0 1 0 CTL 0 0 1 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 15/32 LeafsetExtension-PT-S32C3-CTLFireability-15 594265 m, 16355 m/sec, 1928671 t fired, . VALUE PRODUCED BY CTL true CTL model checker CTL false CTL model checker CTL false CTL model checker CTL true CTL model checker CTL true CTL model checker CTL false CTL model checker CTL false CTL model checker CTL true CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 12 0 1 2 CTL 0 0 0 0 1 0 1 0 CTL 0 0 1 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 17/32 LeafsetExtension-PT-S32C3-CTLFireability-15 677874 m, 16721 m/sec, 2190613 t fired, . VALUE PRODUCED BY CTL true CTL model checker CTL false CTL model checker CTL false CTL model checker CTL true CTL model checker CTL true CTL model checker CTL false CTL model checker CTL false CTL model checker CTL true CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 12 0 1 2 CTL 0 0 0 0 1 0 1 0 CTL 0 0 1 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 19/32 LeafsetExtension-PT-S32C3-CTLFireability-15 760402 m, 16505 m/sec, 2453958 t fired, . VALUE PRODUCED BY CTL true CTL model checker CTL false CTL model checker CTL false CTL model checker CTL true CTL model checker CTL true CTL model checker CTL false CTL model checker CTL false CTL model checker CTL true CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 12 0 1 2 CTL 0 0 0 0 1 0 1 0 CTL 0 0 1 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 21/32 LeafsetExtension-PT-S32C3-CTLFireability-15 845250 m, 16969 m/sec, 2719725 t fired, . VALUE PRODUCED BY CTL true CTL model checker CTL false CTL model checker CTL false CTL model checker CTL true CTL model checker CTL true CTL model checker CTL false CTL model checker CTL false CTL model checker CTL true CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 12 0 1 2 CTL 0 0 0 0 1 0 1 0 CTL 0 0 1 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 23/32 LeafsetExtension-PT-S32C3-CTLFireability-15 928538 m, 16657 m/sec, 2997941 t fired, . VALUE PRODUCED BY CTL true CTL model checker CTL false CTL model checker CTL false CTL model checker CTL true CTL model checker CTL true CTL model checker CTL false CTL model checker CTL false CTL model checker CTL true CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 12 0 1 2 CTL 0 0 0 0 1 0 1 0 CTL 0 0 1 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 25/32 LeafsetExtension-PT-S32C3-CTLFireability-15 1017996 m, 17891 m/sec, 3283981 t fired, . VALUE PRODUCED BY CTL true CTL model checker CTL false CTL model checker CTL false CTL model checker CTL true CTL model checker CTL true CTL model checker CTL false CTL model checker CTL false CTL model checker CTL true CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 12 0 1 2 CTL 0 0 0 0 1 0 1 0 CTL 0 0 1 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 27/32 LeafsetExtension-PT-S32C3-CTLFireability-15 1103948 m, 17190 m/sec, 3547045 t fired, . VALUE PRODUCED BY CTL true CTL model checker CTL false CTL model checker CTL false CTL model checker CTL true CTL model checker CTL true CTL model checker CTL false CTL model checker CTL false CTL model checker CTL true CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 12 0 1 2 CTL 0 0 0 0 1 0 1 0 CTL 0 0 1 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 29/32 LeafsetExtension-PT-S32C3-CTLFireability-15 1194453 m, 18101 m/sec, 3809592 t fired, . VALUE PRODUCED BY CTL true CTL model checker CTL false CTL model checker CTL false CTL model checker CTL true CTL model checker CTL true CTL model checker CTL false CTL model checker CTL false CTL model checker CTL true CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 12 0 1 2 CTL 0 0 0 0 1 0 1 0 CTL 0 0 1 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 31/32 LeafsetExtension-PT-S32C3-CTLFireability-15 1275757 m, 16260 m/sec, 4074262 t fired, . VALUE PRODUCED BY CTL true CTL model checker CTL false CTL model checker CTL false CTL model checker CTL true CTL model checker CTL true CTL model checker CTL false CTL model checker CTL false CTL model checker CTL true CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 12 0 1 2 CTL 0 0 0 0 1 0 1 0 CTL 0 0 1 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 32/32 LeafsetExtension-PT-S32C3-CTLFireability-15 1348224 m, 14493 m/sec, 4337879 t fired, . for LeafsetExtension-PT-S32C3-CTLFireability-15 (memory limit exceeded) VALUE PRODUCED BY CTL true CTL model checker CTL false CTL model checker CTL false CTL model checker CTL true CTL model checker CTL true CTL model checker CTL false CTL model checker CTL false CTL model checker CTL true CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 12 0 1 2 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 MEM PG/PGLIMIT FORMULA STATUS tasks 16 VALUE PRODUCED BY CTL unknown AGGR CTL true CTL model checker CTL false CTL model checker CTL unknown AGGR CTL false CTL model checker CTL true CTL model checker CTL unknown AGGR CTL true CTL model checker CTL unknown AGGR CTL false CTL model checker CTL false CTL model checker CTL true CTL model checker DISJ unknown DISJ CTL unknown AGGR CTL false CTL model checker CTL unknown AGGR

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="LeafsetExtension-PT-S32C3"
export BK_EXAMINATION="CTLFireability"
export BK_TOOL="lola"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-4028"
echo " Executing tool lola"
echo " Input is LeafsetExtension-PT-S32C3, examination is CTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r289-tall-162124152600530"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/LeafsetExtension-PT-S32C3.tgz
mv LeafsetExtension-PT-S32C3 execution
cd execution
if [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "UpperBounds" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] || [ "CTLFireability" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property CTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "CTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' CTLFireability.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] ; then
echo "FORMULA_NAME CTLFireability"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;