fond
Model Checking Contest 2021
11th edition, Paris, France, June 23, 2021
Execution of r270-smll-162123877100034
Last Updated
Jun 28, 2021

About the Execution of LoLA for TokenRing-COL-030

Execution Summary
Max Memory
Used (MB)
Time wait (ms) CPU Usage (ms) I/O Wait (ms) Computed Result Execution
Status
16241.107 455096.00 465279.00 1726.90 F??????T????TF?? normal

Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/data/fkordon/mcc2021-input.r270-smll-162123877100034.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2021-input.qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
............................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................
=====================================================================
Generated by BenchKit 2-4028
Executing tool lola
Input is TokenRing-COL-030, examination is CTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r270-smll-162123877100034
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 304K
-rw-r--r-- 1 mcc users 7.8K May 5 16:58 CTLCardinality.txt
-rw-r--r-- 1 mcc users 86K May 10 09:44 CTLCardinality.xml
-rw-r--r-- 1 mcc users 6.8K May 5 16:58 CTLFireability.txt
-rw-r--r-- 1 mcc users 51K May 10 09:44 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K May 6 14:48 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.6K May 6 14:48 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 3.3K Mar 28 16:46 LTLCardinality.txt
-rw-r--r-- 1 mcc users 23K Mar 28 16:46 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.3K Mar 28 16:46 LTLFireability.txt
-rw-r--r-- 1 mcc users 16K Mar 28 16:46 LTLFireability.xml
-rw-r--r-- 1 mcc users 3.4K Mar 27 14:17 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 17K Mar 27 14:17 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 2.6K Mar 25 20:24 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 12K Mar 25 20:24 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.6K Mar 22 08:16 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.7K Mar 22 08:16 UpperBounds.xml
-rw-r--r-- 1 mcc users 5 May 5 16:52 equiv_pt
-rw-r--r-- 1 mcc users 4 May 5 16:52 instance
-rw-r--r-- 1 mcc users 5 May 5 16:52 iscolored
-rw-r--r-- 1 mcc users 23K May 5 16:52 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME TokenRing-COL-030-CTLFireability-00
FORMULA_NAME TokenRing-COL-030-CTLFireability-01
FORMULA_NAME TokenRing-COL-030-CTLFireability-02
FORMULA_NAME TokenRing-COL-030-CTLFireability-03
FORMULA_NAME TokenRing-COL-030-CTLFireability-04
FORMULA_NAME TokenRing-COL-030-CTLFireability-05
FORMULA_NAME TokenRing-COL-030-CTLFireability-06
FORMULA_NAME TokenRing-COL-030-CTLFireability-07
FORMULA_NAME TokenRing-COL-030-CTLFireability-08
FORMULA_NAME TokenRing-COL-030-CTLFireability-09
FORMULA_NAME TokenRing-COL-030-CTLFireability-10
FORMULA_NAME TokenRing-COL-030-CTLFireability-11
FORMULA_NAME TokenRing-COL-030-CTLFireability-12
FORMULA_NAME TokenRing-COL-030-CTLFireability-13
FORMULA_NAME TokenRing-COL-030-CTLFireability-14
FORMULA_NAME TokenRing-COL-030-CTLFireability-15

=== Now, execution of the tool begins

BK_START 1621335285680

starting LoLA
BK_INPUT TokenRing-COL-030
BK_EXAMINATION: CTLFireability
bin directory: /home/mcc/BenchKit/bin
current directory: /home/mcc/execution
CTLFireability

FORMULA TokenRing-COL-030-CTLFireability-00 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA TokenRing-COL-030-CTLFireability-07 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA TokenRing-COL-030-CTLFireability-12 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA TokenRing-COL-030-CTLFireability-13 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

BK_STOP 1621335740776

--------------------
content from stderr:

lola: MEM LIMIT 32
lola: MEM LIMIT 5
lola: NET
lola: input: PNML file (--pnmlnet)
lola: reading net from /home/mcc/execution/model.pnml
lola: reading pnml
lola: PNML file contains High-Level net
lola: finished parsing
lola: closed net file /home/mcc/execution/model.pnml
lola: Reading HL formula in XML format (--xmlformula)
lola: reading formula from /home/mcc/execution/CTLFireability.xml
lola: rewrite Frontend/Parser/formula_rewrite.k:96
lola: rewrite Frontend/Parser/formula_rewrite.k:156
lola: rewrite Frontend/Parser/formula_rewrite.k:150
lola: rewrite Frontend/Parser/formula_rewrite.k:116
lola: rewrite Frontend/Parser/formula_rewrite.k:162
lola: rewrite Frontend/Parser/formula_rewrite.k:147
lola: rewrite Frontend/Parser/formula_rewrite.k:469
lola: rewrite Frontend/Parser/formula_rewrite.k:454
lola: rewrite Frontend/Parser/formula_rewrite.k:98
lola: rewrite Frontend/Parser/formula_rewrite.k:115
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:439
lola: rewrite Frontend/Parser/formula_rewrite.k:96
lola: rewrite Frontend/Parser/formula_rewrite.k:96
lola: rewrite Frontend/Parser/formula_rewrite.k:156
lola: rewrite Frontend/Parser/formula_rewrite.k:147
lola: rewrite Frontend/Parser/formula_rewrite.k:138
lola: rewrite Frontend/Parser/formula_rewrite.k:121
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:340
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:284
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: RELEASE
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:96
lola: rewrite Frontend/Parser/formula_rewrite.k:121
lola: rewrite Frontend/Parser/formula_rewrite.k:96
lola: rewrite Frontend/Parser/formula_rewrite.k:156
lola: rewrite Frontend/Parser/formula_rewrite.k:150
lola: rewrite Frontend/Parser/formula_rewrite.k:182
lola: rewrite Frontend/Parser/formula_rewrite.k:98
lola: rewrite Frontend/Parser/formula_rewrite.k:153
lola: rewrite Frontend/Parser/formula_rewrite.k:150
lola: rewrite Frontend/Parser/formula_rewrite.k:278
lola: rewrite Frontend/Parser/formula_rewrite.k:281
lola: rewrite Frontend/Parser/formula_rewrite.k:415
lola: rewrite Frontend/Parser/formula_rewrite.k:147
lola: rewrite Frontend/Parser/formula_rewrite.k:115
lola: rewrite Frontend/Parser/formula_rewrite.k:96
lola: rewrite Frontend/Parser/formula_rewrite.k:132
lola: rewrite Frontend/Parser/formula_rewrite.k:281
lola: rewrite Frontend/Parser/formula_rewrite.k:400
lola: rewrite Frontend/Parser/formula_rewrite.k:448
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:115
lola: rewrite Frontend/Parser/formula_rewrite.k:475
lola: rewrite Frontend/Parser/formula_rewrite.k:96
lola: rewrite Frontend/Parser/formula_rewrite.k:162
lola: rewrite Frontend/Parser/formula_rewrite.k:147
lola: rewrite Frontend/Parser/formula_rewrite.k:96
lola: rewrite Frontend/Parser/formula_rewrite.k:138
lola: rewrite Frontend/Parser/formula_rewrite.k:284
lola: rewrite Frontend/Parser/formula_rewrite.k:121
lola: rewrite Frontend/Parser/formula_rewrite.k:96
lola: rewrite Frontend/Parser/formula_rewrite.k:179
lola: rewrite Frontend/Parser/formula_rewrite.k:150
lola: rewrite Frontend/Parser/formula_rewrite.k:96
lola: rewrite Frontend/Parser/formula_rewrite.k:179
lola: rewrite Frontend/Parser/formula_rewrite.k:150
lola: rewrite Frontend/Parser/formula_rewrite.k:120
lola: rewrite Frontend/Parser/formula_rewrite.k:547
lola: rewrite Frontend/Parser/formula_rewrite.k:196
lola: rewrite Frontend/Parser/formula_rewrite.k:147
lola: rewrite Frontend/Parser/formula_rewrite.k:98
lola: rewrite Frontend/Parser/formula_rewrite.k:129
lola: rewrite Frontend/Parser/formula_rewrite.k:544
lola: rewrite Frontend/Parser/formula_rewrite.k:96
lola: rewrite Frontend/Parser/formula_rewrite.k:96
lola: rewrite Frontend/Parser/formula_rewrite.k:132
lola: rewrite Frontend/Parser/formula_rewrite.k:281
lola: rewrite Frontend/Parser/formula_rewrite.k:96
lola: rewrite Frontend/Parser/formula_rewrite.k:162
lola: rewrite Frontend/Parser/formula_rewrite.k:147
lola: rewrite Frontend/Parser/formula_rewrite.k:281
lola: rewrite Frontend/Parser/formula_rewrite.k:123
lola: rewrite Frontend/Parser/formula_rewrite.k:165
lola: rewrite Frontend/Parser/formula_rewrite.k:147
lola: rewrite Frontend/Parser/formula_rewrite.k:96
lola: rewrite Frontend/Parser/formula_rewrite.k:162
lola: rewrite Frontend/Parser/formula_rewrite.k:150
lola: rewrite Frontend/Parser/formula_rewrite.k:156
lola: rewrite Frontend/Parser/formula_rewrite.k:150
lola: rewrite Frontend/Parser/formula_rewrite.k:281
lola: rewrite Frontend/Parser/formula_rewrite.k:96
lola: rewrite Frontend/Parser/formula_rewrite.k:121
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:123
lola: rewrite Frontend/Parser/formula_rewrite.k:123
lola: rewrite Frontend/Parser/formula_rewrite.k:159
lola: rewrite Frontend/Parser/formula_rewrite.k:150
lola: rewrite Frontend/Parser/formula_rewrite.k:98
lola: rewrite Frontend/Parser/formula_rewrite.k:122
lola: rewrite Frontend/Parser/formula_rewrite.k:159
lola: rewrite Frontend/Parser/formula_rewrite.k:147
lola: rewrite Frontend/Parser/formula_rewrite.k:115
lola: rewrite Frontend/Parser/formula_rewrite.k:98
lola: rewrite Frontend/Parser/formula_rewrite.k:165
lola: rewrite Frontend/Parser/formula_rewrite.k:147
lola: rewrite Frontend/Parser/formula_rewrite.k:129
lola: rewrite Frontend/Parser/formula_rewrite.k:96
lola: rewrite Frontend/Parser/formula_rewrite.k:96
lola: rewrite Frontend/Parser/formula_rewrite.k:162
lola: rewrite Frontend/Parser/formula_rewrite.k:150
lola: rewrite Frontend/Parser/formula_rewrite.k:156
lola: rewrite Frontend/Parser/formula_rewrite.k:150
lola: rewrite Frontend/Parser/formula_rewrite.k:121
lola: rewrite Frontend/Parser/formula_rewrite.k:162
lola: rewrite Frontend/Parser/formula_rewrite.k:150
lola: rewrite Frontend/Parser/formula_rewrite.k:120
lola: rewrite Frontend/Parser/formula_rewrite.k:96
lola: rewrite Frontend/Parser/formula_rewrite.k:162
lola: rewrite Frontend/Parser/formula_rewrite.k:147
lola: rewrite Frontend/Parser/formula_rewrite.k:281
lola: rewrite Frontend/Parser/formula_rewrite.k:98
lola: rewrite Frontend/Parser/formula_rewrite.k:96
lola: rewrite Frontend/Parser/formula_rewrite.k:121
lola: rewrite Frontend/Parser/formula_rewrite.k:115
lola: rewrite Frontend/Parser/formula_rewrite.k:168
lola: rewrite Frontend/Parser/formula_rewrite.k:391
lola: rewrite Frontend/Parser/formula_rewrite.k:96
lola: rewrite Frontend/Parser/formula_rewrite.k:138
lola: rewrite Frontend/Parser/formula_rewrite.k:199
lola: rewrite Frontend/Parser/formula_rewrite.k:147
lola: rewrite Frontend/Parser/formula_rewrite.k:553
lola: rewrite Frontend/Parser/formula_rewrite.k:96
lola: rewrite Frontend/Parser/formula_rewrite.k:96
lola: rewrite Frontend/Parser/formula_rewrite.k:96
lola: rewrite Frontend/Parser/formula_rewrite.k:162
lola: rewrite Frontend/Parser/formula_rewrite.k:147
lola: rewrite Frontend/Parser/formula_rewrite.k:98
lola: rewrite Frontend/Parser/formula_rewrite.k:165
lola: rewrite Frontend/Parser/formula_rewrite.k:147
lola: rewrite Frontend/Parser/formula_rewrite.k:121
lola: rewrite Frontend/Parser/formula_rewrite.k:121
lola: rewrite Frontend/Parser/formula_rewrite.k:159
lola: rewrite Frontend/Parser/formula_rewrite.k:147
lola: rewrite Frontend/Parser/formula_rewrite.k:114
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:284
lola: rewrite Frontend/Parser/formula_rewrite.k:96
lola: rewrite Frontend/Parser/formula_rewrite.k:156
lola: rewrite Frontend/Parser/formula_rewrite.k:147
lola: rewrite Frontend/Parser/formula_rewrite.k:281
lola: rewrite Frontend/Parser/formula_rewrite.k:159
lola: rewrite Frontend/Parser/formula_rewrite.k:147
lola: rewrite Frontend/Parser/formula_rewrite.k:278
lola: rewrite Frontend/Parser/formula_rewrite.k:281
lola: rewrite Frontend/Parser/formula_rewrite.k:96
lola: rewrite Frontend/Parser/formula_rewrite.k:132
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:460
lola: rewrite Frontend/Parser/formula_rewrite.k:182
lola: rewrite Frontend/Parser/formula_rewrite.k:123
lola: rewrite Frontend/Parser/formula_rewrite.k:122
lola: rewrite Frontend/Parser/formula_rewrite.k:96
lola: rewrite Frontend/Parser/formula_rewrite.k:162
lola: rewrite Frontend/Parser/formula_rewrite.k:147
lola: rewrite Frontend/Parser/formula_rewrite.k:98
lola: rewrite Frontend/Parser/formula_rewrite.k:96
lola: rewrite Frontend/Parser/formula_rewrite.k:168
lola: rewrite Frontend/Parser/formula_rewrite.k:156
lola: rewrite Frontend/Parser/formula_rewrite.k:150
lola: rewrite Frontend/Parser/formula_rewrite.k:156
lola: rewrite Frontend/Parser/formula_rewrite.k:147
lola: rewrite Frontend/Parser/formula_rewrite.k:96
lola: rewrite Frontend/Parser/formula_rewrite.k:138
lola: rewrite Frontend/Parser/formula_rewrite.k:284
lola: rewrite Frontend/Parser/formula_rewrite.k:121
lola: rewrite Frontend/Parser/formula_rewrite.k:544
lola: rewrite Frontend/Parser/formula_rewrite.k:457
lola: rewrite Frontend/Parser/formula_rewrite.k:544
lola: rewrite Frontend/Parser/formula_rewrite.k:397
lola: rewrite Frontend/Parser/formula_rewrite.k:96
lola: rewrite Frontend/Parser/formula_rewrite.k:182
lola: rewrite Frontend/Parser/formula_rewrite.k:96
lola: rewrite Frontend/Parser/formula_rewrite.k:116
lola: rewrite Frontend/Parser/formula_rewrite.k:162
lola: rewrite Frontend/Parser/formula_rewrite.k:147
lola: rewrite Frontend/Parser/formula_rewrite.k:96
lola: rewrite Frontend/Parser/formula_rewrite.k:121
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:121
lola: rewrite Frontend/Parser/formula_rewrite.k:96
lola: rewrite Frontend/Parser/formula_rewrite.k:162
lola: rewrite Frontend/Parser/formula_rewrite.k:147
lola: rewrite Frontend/Parser/formula_rewrite.k:96
lola: rewrite Frontend/Parser/formula_rewrite.k:117
lola: rewrite Frontend/Parser/formula_rewrite.k:179
lola: rewrite Frontend/Parser/formula_rewrite.k:147
lola: rewrite Frontend/Parser/formula_rewrite.k:96
lola: rewrite Frontend/Parser/formula_rewrite.k:121
lola: rewrite Frontend/Parser/formula_rewrite.k:121
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: ASSUMEDDEADLOCKFREE
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: ASSUMEDDEADLOCKFREE
lola: LAUNCH task # 75 (type SKEL/FNDP) for 9 TokenRing-COL-030-CTLFireability-03
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 76 (type SKEL/EQUN) for 9 TokenRing-COL-030-CTLFireability-03
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 77 (type SKEL/SRCH) for 9 TokenRing-COL-030-CTLFireability-03
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 78 (type SKEL/SRCH) for 9 TokenRing-COL-030-CTLFireability-03
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:715
lola: rewrite Frontend/Parser/formula_rewrite.k:797
lola: LAUNCH INITIAL
lola: LAUNCH task # 2 (type SKEL/CNST) for 0 TokenRing-COL-030-CTLFireability-00
lola: time limit : 0 sec
lola: memory limit: 0 pages
lola: LAUNCH INITIAL
lola: LAUNCH task # 43 (type SKEL/CNST) for 41 TokenRing-COL-030-CTLFireability-07
lola: time limit : 0 sec
lola: memory limit: 0 pages
lola: LAUNCH INITIAL
lola: LAUNCH task # 62 (type SKEL/CNST) for 60 TokenRing-COL-030-CTLFireability-12
lola: time limit : 0 sec
lola: memory limit: 0 pages
lola: LAUNCH INITIAL
lola: LAUNCH task # 65 (type SKEL/CNST) for 63 TokenRing-COL-030-CTLFireability-13
lola: time limit : 0 sec
lola: memory limit: 0 pages
lola: LAUNCH INITIAL
lola: LAUNCH task # 72 (type SKEL/CNST) for 9 TokenRing-COL-030-CTLFireability-03
lola: time limit : 0 sec
lola: memory limit: 0 pages
lola: FINISHED task # 62 (type SKEL/CNST) for TokenRing-COL-030-CTLFireability-12
lola: result : true
lola: FINISHED task # 2 (type SKEL/CNST) for TokenRing-COL-030-CTLFireability-00
lola: result : false
lola: FINISHED task # 43 (type SKEL/CNST) for TokenRing-COL-030-CTLFireability-07
lola: result : true
lola: FINISHED task # 77 (type SKEL/SRCH) for TokenRing-COL-030-CTLFireability-03
lola: result : true
lola: time used : 0.000000
lola: memory pages used : 1
lola: FINISHED task # 75 (type SKEL/FNDP) for TokenRing-COL-030-CTLFireability-03
lola: result : true
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
lola: CANCELED task # 76 (type EQUN) for TokenRing-COL-030-CTLFireability-03 (obsolete)
lola: CANCELED task # 78 (type SRCH) for TokenRing-COL-030-CTLFireability-03 (obsolete)
lola: LAUNCH task # 73 (type SKEL/SRCH) for 44 TokenRing-COL-030-CTLFireability-08
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 79 (type SKEL/SRCH) for 9 TokenRing-COL-030-CTLFireability-03
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 65 (type SKEL/CNST) for TokenRing-COL-030-CTLFireability-13
lola: result : false
lola: FINISHED task # 72 (type SKEL/CNST) for TokenRing-COL-030-CTLFireability-03
lola: result : false
lola: FINISHED task # 73 (type SKEL/SRCH) for TokenRing-COL-030-CTLFireability-08
lola: result : true
lola: time used : 0.000000
lola: memory pages used : 1
lola: FINISHED task # 76 (type SKEL/EQUN) for TokenRing-COL-030-CTLFireability-03
lola: result : unknown
lola: FINISHED task # 79 (type SKEL/SRCH) for TokenRing-COL-030-CTLFireability-03
lola: result : true
lola: markings : 1
lola: fired transitions : 1
lola: time used : 0.000000
lola: memory pages used : 1
lola: TR BINDINGS
lola: TR BINDINGS DONE
lola: Places: 961, Transitions: 27931
lola: @ trans MainProcess
lola: @ trans OtherProcess
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
TokenRing-COL-030-CTLFireability-00: INITIAL false skeleton: preprocessing
TokenRing-COL-030-CTLFireability-07: INITIAL true skeleton: preprocessing
TokenRing-COL-030-CTLFireability-12: INITIAL true skeleton: preprocessing
TokenRing-COL-030-CTLFireability-13: INITIAL false skeleton: preprocessing

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
TokenRing-COL-030-CTLFireability-01: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-02: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-03: DISJ 0 0 0 0 7 0 0 1
TokenRing-COL-030-CTLFireability-04: AG 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-05: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-06: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-08: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-09: INITIAL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-10: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-11: CONJ 0 0 0 0 2 0 0 0
TokenRing-COL-030-CTLFireability-14: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-15: CTL 0 0 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 6 secs. Pages in use: 1
# running tasks: 0 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
TokenRing-COL-030-CTLFireability-00: INITIAL false skeleton: preprocessing
TokenRing-COL-030-CTLFireability-07: INITIAL true skeleton: preprocessing
TokenRing-COL-030-CTLFireability-12: INITIAL true skeleton: preprocessing
TokenRing-COL-030-CTLFireability-13: INITIAL false skeleton: preprocessing

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
TokenRing-COL-030-CTLFireability-01: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-02: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-03: DISJ 0 0 0 0 7 0 0 1
TokenRing-COL-030-CTLFireability-04: AG 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-05: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-06: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-08: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-09: INITIAL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-10: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-11: CONJ 0 0 0 0 2 0 0 0
TokenRing-COL-030-CTLFireability-14: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-15: CTL 0 0 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 11 secs. Pages in use: 1
# running tasks: 0 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
TokenRing-COL-030-CTLFireability-00: INITIAL false skeleton: preprocessing
TokenRing-COL-030-CTLFireability-07: INITIAL true skeleton: preprocessing
TokenRing-COL-030-CTLFireability-12: INITIAL true skeleton: preprocessing
TokenRing-COL-030-CTLFireability-13: INITIAL false skeleton: preprocessing

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
TokenRing-COL-030-CTLFireability-01: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-02: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-03: DISJ 0 0 0 0 7 0 0 1
TokenRing-COL-030-CTLFireability-04: AG 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-05: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-06: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-08: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-09: INITIAL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-10: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-11: CONJ 0 0 0 0 2 0 0 0
TokenRing-COL-030-CTLFireability-14: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-15: CTL 0 0 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 16 secs. Pages in use: 1
# running tasks: 0 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
TokenRing-COL-030-CTLFireability-00: INITIAL false skeleton: preprocessing
TokenRing-COL-030-CTLFireability-07: INITIAL true skeleton: preprocessing
TokenRing-COL-030-CTLFireability-12: INITIAL true skeleton: preprocessing
TokenRing-COL-030-CTLFireability-13: INITIAL false skeleton: preprocessing

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
TokenRing-COL-030-CTLFireability-01: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-02: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-03: DISJ 0 0 0 0 7 0 0 1
TokenRing-COL-030-CTLFireability-04: AG 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-05: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-06: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-08: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-09: INITIAL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-10: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-11: CONJ 0 0 0 0 2 0 0 0
TokenRing-COL-030-CTLFireability-14: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-15: CTL 0 0 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 21 secs. Pages in use: 1
# running tasks: 0 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
TokenRing-COL-030-CTLFireability-00: INITIAL false skeleton: preprocessing
TokenRing-COL-030-CTLFireability-07: INITIAL true skeleton: preprocessing
TokenRing-COL-030-CTLFireability-12: INITIAL true skeleton: preprocessing
TokenRing-COL-030-CTLFireability-13: INITIAL false skeleton: preprocessing

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
TokenRing-COL-030-CTLFireability-01: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-02: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-03: DISJ 0 0 0 0 7 0 0 1
TokenRing-COL-030-CTLFireability-04: AG 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-05: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-06: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-08: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-09: INITIAL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-10: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-11: CONJ 0 0 0 0 2 0 0 0
TokenRing-COL-030-CTLFireability-14: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-15: CTL 0 0 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 26 secs. Pages in use: 1
# running tasks: 0 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
TokenRing-COL-030-CTLFireability-00: INITIAL false skeleton: preprocessing
TokenRing-COL-030-CTLFireability-07: INITIAL true skeleton: preprocessing
TokenRing-COL-030-CTLFireability-12: INITIAL true skeleton: preprocessing
TokenRing-COL-030-CTLFireability-13: INITIAL false skeleton: preprocessing

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
TokenRing-COL-030-CTLFireability-01: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-02: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-03: DISJ 0 0 0 0 7 0 0 1
TokenRing-COL-030-CTLFireability-04: AG 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-05: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-06: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-08: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-09: INITIAL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-10: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-11: CONJ 0 0 0 0 2 0 0 0
TokenRing-COL-030-CTLFireability-14: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-15: CTL 0 0 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 31 secs. Pages in use: 1
# running tasks: 0 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
TokenRing-COL-030-CTLFireability-00: INITIAL false skeleton: preprocessing
TokenRing-COL-030-CTLFireability-07: INITIAL true skeleton: preprocessing
TokenRing-COL-030-CTLFireability-12: INITIAL true skeleton: preprocessing
TokenRing-COL-030-CTLFireability-13: INITIAL false skeleton: preprocessing

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
TokenRing-COL-030-CTLFireability-01: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-02: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-03: DISJ 0 0 0 0 7 0 0 1
TokenRing-COL-030-CTLFireability-04: AG 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-05: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-06: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-08: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-09: INITIAL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-10: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-11: CONJ 0 0 0 0 2 0 0 0
TokenRing-COL-030-CTLFireability-14: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-15: CTL 0 0 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 36 secs. Pages in use: 1
# running tasks: 0 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
TokenRing-COL-030-CTLFireability-00: INITIAL false skeleton: preprocessing
TokenRing-COL-030-CTLFireability-07: INITIAL true skeleton: preprocessing
TokenRing-COL-030-CTLFireability-12: INITIAL true skeleton: preprocessing
TokenRing-COL-030-CTLFireability-13: INITIAL false skeleton: preprocessing

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
TokenRing-COL-030-CTLFireability-01: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-02: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-03: DISJ 0 0 0 0 7 0 0 1
TokenRing-COL-030-CTLFireability-04: AG 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-05: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-06: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-08: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-09: INITIAL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-10: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-11: CONJ 0 0 0 0 2 0 0 0
TokenRing-COL-030-CTLFireability-14: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-15: CTL 0 0 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 41 secs. Pages in use: 1
# running tasks: 0 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
TokenRing-COL-030-CTLFireability-00: INITIAL false skeleton: preprocessing
TokenRing-COL-030-CTLFireability-07: INITIAL true skeleton: preprocessing
TokenRing-COL-030-CTLFireability-12: INITIAL true skeleton: preprocessing
TokenRing-COL-030-CTLFireability-13: INITIAL false skeleton: preprocessing

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
TokenRing-COL-030-CTLFireability-01: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-02: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-03: DISJ 0 0 0 0 7 0 0 1
TokenRing-COL-030-CTLFireability-04: AG 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-05: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-06: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-08: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-09: INITIAL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-10: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-11: CONJ 0 0 0 0 2 0 0 0
TokenRing-COL-030-CTLFireability-14: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-15: CTL 0 0 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 46 secs. Pages in use: 1
# running tasks: 0 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
TokenRing-COL-030-CTLFireability-00: INITIAL false skeleton: preprocessing
TokenRing-COL-030-CTLFireability-07: INITIAL true skeleton: preprocessing
TokenRing-COL-030-CTLFireability-12: INITIAL true skeleton: preprocessing
TokenRing-COL-030-CTLFireability-13: INITIAL false skeleton: preprocessing

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
TokenRing-COL-030-CTLFireability-01: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-02: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-03: DISJ 0 0 0 0 7 0 0 1
TokenRing-COL-030-CTLFireability-04: AG 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-05: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-06: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-08: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-09: INITIAL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-10: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-11: CONJ 0 0 0 0 2 0 0 0
TokenRing-COL-030-CTLFireability-14: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-15: CTL 0 0 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 51 secs. Pages in use: 1
# running tasks: 0 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
TokenRing-COL-030-CTLFireability-00: INITIAL false skeleton: preprocessing
TokenRing-COL-030-CTLFireability-07: INITIAL true skeleton: preprocessing
TokenRing-COL-030-CTLFireability-12: INITIAL true skeleton: preprocessing
TokenRing-COL-030-CTLFireability-13: INITIAL false skeleton: preprocessing

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
TokenRing-COL-030-CTLFireability-01: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-02: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-03: DISJ 0 0 0 0 7 0 0 1
TokenRing-COL-030-CTLFireability-04: AG 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-05: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-06: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-08: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-09: INITIAL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-10: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-11: CONJ 0 0 0 0 2 0 0 0
TokenRing-COL-030-CTLFireability-14: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-15: CTL 0 0 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 56 secs. Pages in use: 1
# running tasks: 0 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
TokenRing-COL-030-CTLFireability-00: INITIAL false skeleton: preprocessing
TokenRing-COL-030-CTLFireability-07: INITIAL true skeleton: preprocessing
TokenRing-COL-030-CTLFireability-12: INITIAL true skeleton: preprocessing
TokenRing-COL-030-CTLFireability-13: INITIAL false skeleton: preprocessing

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
TokenRing-COL-030-CTLFireability-01: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-02: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-03: DISJ 0 0 0 0 7 0 0 1
TokenRing-COL-030-CTLFireability-04: AG 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-05: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-06: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-08: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-09: INITIAL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-10: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-11: CONJ 0 0 0 0 2 0 0 0
TokenRing-COL-030-CTLFireability-14: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-15: CTL 0 0 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 61 secs. Pages in use: 1
# running tasks: 0 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
TokenRing-COL-030-CTLFireability-00: INITIAL false skeleton: preprocessing
TokenRing-COL-030-CTLFireability-07: INITIAL true skeleton: preprocessing
TokenRing-COL-030-CTLFireability-12: INITIAL true skeleton: preprocessing
TokenRing-COL-030-CTLFireability-13: INITIAL false skeleton: preprocessing

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
TokenRing-COL-030-CTLFireability-01: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-02: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-03: DISJ 0 0 0 0 7 0 0 1
TokenRing-COL-030-CTLFireability-04: AG 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-05: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-06: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-08: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-09: INITIAL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-10: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-11: CONJ 0 0 0 0 2 0 0 0
TokenRing-COL-030-CTLFireability-14: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-15: CTL 0 0 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 66 secs. Pages in use: 1
# running tasks: 0 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
TokenRing-COL-030-CTLFireability-00: INITIAL false skeleton: preprocessing
TokenRing-COL-030-CTLFireability-07: INITIAL true skeleton: preprocessing
TokenRing-COL-030-CTLFireability-12: INITIAL true skeleton: preprocessing
TokenRing-COL-030-CTLFireability-13: INITIAL false skeleton: preprocessing

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
TokenRing-COL-030-CTLFireability-01: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-02: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-03: DISJ 0 0 0 0 7 0 0 1
TokenRing-COL-030-CTLFireability-04: AG 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-05: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-06: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-08: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-09: INITIAL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-10: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-11: CONJ 0 0 0 0 2 0 0 0
TokenRing-COL-030-CTLFireability-14: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-15: CTL 0 0 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 71 secs. Pages in use: 1
# running tasks: 0 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
TokenRing-COL-030-CTLFireability-00: INITIAL false skeleton: preprocessing
TokenRing-COL-030-CTLFireability-07: INITIAL true skeleton: preprocessing
TokenRing-COL-030-CTLFireability-12: INITIAL true skeleton: preprocessing
TokenRing-COL-030-CTLFireability-13: INITIAL false skeleton: preprocessing

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
TokenRing-COL-030-CTLFireability-01: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-02: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-03: DISJ 0 0 0 0 7 0 0 1
TokenRing-COL-030-CTLFireability-04: AG 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-05: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-06: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-08: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-09: INITIAL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-10: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-11: CONJ 0 0 0 0 2 0 0 0
TokenRing-COL-030-CTLFireability-14: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-15: CTL 0 0 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 76 secs. Pages in use: 1
# running tasks: 0 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
TokenRing-COL-030-CTLFireability-00: INITIAL false skeleton: preprocessing
TokenRing-COL-030-CTLFireability-07: INITIAL true skeleton: preprocessing
TokenRing-COL-030-CTLFireability-12: INITIAL true skeleton: preprocessing
TokenRing-COL-030-CTLFireability-13: INITIAL false skeleton: preprocessing

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
TokenRing-COL-030-CTLFireability-01: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-02: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-03: DISJ 0 0 0 0 7 0 0 1
TokenRing-COL-030-CTLFireability-04: AG 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-05: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-06: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-08: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-09: INITIAL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-10: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-11: CONJ 0 0 0 0 2 0 0 0
TokenRing-COL-030-CTLFireability-14: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-15: CTL 0 0 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 81 secs. Pages in use: 1
# running tasks: 0 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
TokenRing-COL-030-CTLFireability-00: INITIAL false skeleton: preprocessing
TokenRing-COL-030-CTLFireability-07: INITIAL true skeleton: preprocessing
TokenRing-COL-030-CTLFireability-12: INITIAL true skeleton: preprocessing
TokenRing-COL-030-CTLFireability-13: INITIAL false skeleton: preprocessing

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
TokenRing-COL-030-CTLFireability-01: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-02: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-03: DISJ 0 0 0 0 7 0 0 1
TokenRing-COL-030-CTLFireability-04: AG 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-05: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-06: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-08: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-09: INITIAL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-10: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-11: CONJ 0 0 0 0 2 0 0 0
TokenRing-COL-030-CTLFireability-14: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-15: CTL 0 0 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 86 secs. Pages in use: 1
# running tasks: 0 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
TokenRing-COL-030-CTLFireability-00: INITIAL false skeleton: preprocessing
TokenRing-COL-030-CTLFireability-07: INITIAL true skeleton: preprocessing
TokenRing-COL-030-CTLFireability-12: INITIAL true skeleton: preprocessing
TokenRing-COL-030-CTLFireability-13: INITIAL false skeleton: preprocessing

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
TokenRing-COL-030-CTLFireability-01: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-02: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-03: DISJ 0 0 0 0 7 0 0 1
TokenRing-COL-030-CTLFireability-04: AG 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-05: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-06: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-08: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-09: INITIAL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-10: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-11: CONJ 0 0 0 0 2 0 0 0
TokenRing-COL-030-CTLFireability-14: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-15: CTL 0 0 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 91 secs. Pages in use: 1
# running tasks: 0 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
TokenRing-COL-030-CTLFireability-00: INITIAL false skeleton: preprocessing
TokenRing-COL-030-CTLFireability-07: INITIAL true skeleton: preprocessing
TokenRing-COL-030-CTLFireability-12: INITIAL true skeleton: preprocessing
TokenRing-COL-030-CTLFireability-13: INITIAL false skeleton: preprocessing

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
TokenRing-COL-030-CTLFireability-01: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-02: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-03: DISJ 0 0 0 0 7 0 0 1
TokenRing-COL-030-CTLFireability-04: AG 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-05: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-06: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-08: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-09: INITIAL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-10: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-11: CONJ 0 0 0 0 2 0 0 0
TokenRing-COL-030-CTLFireability-14: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-15: CTL 0 0 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 96 secs. Pages in use: 1
# running tasks: 0 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
TokenRing-COL-030-CTLFireability-00: INITIAL false skeleton: preprocessing
TokenRing-COL-030-CTLFireability-07: INITIAL true skeleton: preprocessing
TokenRing-COL-030-CTLFireability-12: INITIAL true skeleton: preprocessing
TokenRing-COL-030-CTLFireability-13: INITIAL false skeleton: preprocessing

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
TokenRing-COL-030-CTLFireability-01: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-02: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-03: DISJ 0 0 0 0 7 0 0 1
TokenRing-COL-030-CTLFireability-04: AG 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-05: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-06: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-08: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-09: INITIAL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-10: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-11: CONJ 0 0 0 0 2 0 0 0
TokenRing-COL-030-CTLFireability-14: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-15: CTL 0 0 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 101 secs. Pages in use: 1
# running tasks: 0 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
TokenRing-COL-030-CTLFireability-00: INITIAL false skeleton: preprocessing
TokenRing-COL-030-CTLFireability-07: INITIAL true skeleton: preprocessing
TokenRing-COL-030-CTLFireability-12: INITIAL true skeleton: preprocessing
TokenRing-COL-030-CTLFireability-13: INITIAL false skeleton: preprocessing

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
TokenRing-COL-030-CTLFireability-01: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-02: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-03: DISJ 0 0 0 0 7 0 0 1
TokenRing-COL-030-CTLFireability-04: AG 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-05: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-06: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-08: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-09: INITIAL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-10: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-11: CONJ 0 0 0 0 2 0 0 0
TokenRing-COL-030-CTLFireability-14: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-15: CTL 0 0 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 106 secs. Pages in use: 1
# running tasks: 0 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
TokenRing-COL-030-CTLFireability-00: INITIAL false skeleton: preprocessing
TokenRing-COL-030-CTLFireability-07: INITIAL true skeleton: preprocessing
TokenRing-COL-030-CTLFireability-12: INITIAL true skeleton: preprocessing
TokenRing-COL-030-CTLFireability-13: INITIAL false skeleton: preprocessing

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
TokenRing-COL-030-CTLFireability-01: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-02: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-03: DISJ 0 0 0 0 7 0 0 1
TokenRing-COL-030-CTLFireability-04: AG 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-05: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-06: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-08: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-09: INITIAL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-10: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-11: CONJ 0 0 0 0 2 0 0 0
TokenRing-COL-030-CTLFireability-14: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-15: CTL 0 0 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 111 secs. Pages in use: 1
# running tasks: 0 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
TokenRing-COL-030-CTLFireability-00: INITIAL false skeleton: preprocessing
TokenRing-COL-030-CTLFireability-07: INITIAL true skeleton: preprocessing
TokenRing-COL-030-CTLFireability-12: INITIAL true skeleton: preprocessing
TokenRing-COL-030-CTLFireability-13: INITIAL false skeleton: preprocessing

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
TokenRing-COL-030-CTLFireability-01: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-02: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-03: DISJ 0 0 0 0 7 0 0 1
TokenRing-COL-030-CTLFireability-04: AG 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-05: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-06: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-08: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-09: INITIAL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-10: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-11: CONJ 0 0 0 0 2 0 0 0
TokenRing-COL-030-CTLFireability-14: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-15: CTL 0 0 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 116 secs. Pages in use: 1
# running tasks: 0 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
TokenRing-COL-030-CTLFireability-00: INITIAL false skeleton: preprocessing
TokenRing-COL-030-CTLFireability-07: INITIAL true skeleton: preprocessing
TokenRing-COL-030-CTLFireability-12: INITIAL true skeleton: preprocessing
TokenRing-COL-030-CTLFireability-13: INITIAL false skeleton: preprocessing

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
TokenRing-COL-030-CTLFireability-01: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-02: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-03: DISJ 0 0 0 0 7 0 0 1
TokenRing-COL-030-CTLFireability-04: AG 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-05: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-06: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-08: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-09: INITIAL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-10: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-11: CONJ 0 0 0 0 2 0 0 0
TokenRing-COL-030-CTLFireability-14: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-15: CTL 0 0 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 121 secs. Pages in use: 1
# running tasks: 0 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
TokenRing-COL-030-CTLFireability-00: INITIAL false skeleton: preprocessing
TokenRing-COL-030-CTLFireability-07: INITIAL true skeleton: preprocessing
TokenRing-COL-030-CTLFireability-12: INITIAL true skeleton: preprocessing
TokenRing-COL-030-CTLFireability-13: INITIAL false skeleton: preprocessing

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
TokenRing-COL-030-CTLFireability-01: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-02: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-03: DISJ 0 0 0 0 7 0 0 1
TokenRing-COL-030-CTLFireability-04: AG 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-05: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-06: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-08: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-09: INITIAL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-10: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-11: CONJ 0 0 0 0 2 0 0 0
TokenRing-COL-030-CTLFireability-14: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-15: CTL 0 0 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 126 secs. Pages in use: 1
# running tasks: 0 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
TokenRing-COL-030-CTLFireability-00: INITIAL false skeleton: preprocessing
TokenRing-COL-030-CTLFireability-07: INITIAL true skeleton: preprocessing
TokenRing-COL-030-CTLFireability-12: INITIAL true skeleton: preprocessing
TokenRing-COL-030-CTLFireability-13: INITIAL false skeleton: preprocessing

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
TokenRing-COL-030-CTLFireability-01: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-02: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-03: DISJ 0 0 0 0 7 0 0 1
TokenRing-COL-030-CTLFireability-04: AG 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-05: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-06: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-08: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-09: INITIAL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-10: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-11: CONJ 0 0 0 0 2 0 0 0
TokenRing-COL-030-CTLFireability-14: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-15: CTL 0 0 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 131 secs. Pages in use: 1
# running tasks: 0 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
TokenRing-COL-030-CTLFireability-00: INITIAL false skeleton: preprocessing
TokenRing-COL-030-CTLFireability-07: INITIAL true skeleton: preprocessing
TokenRing-COL-030-CTLFireability-12: INITIAL true skeleton: preprocessing
TokenRing-COL-030-CTLFireability-13: INITIAL false skeleton: preprocessing

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
TokenRing-COL-030-CTLFireability-01: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-02: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-03: DISJ 0 0 0 0 7 0 0 1
TokenRing-COL-030-CTLFireability-04: AG 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-05: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-06: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-08: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-09: INITIAL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-10: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-11: CONJ 0 0 0 0 2 0 0 0
TokenRing-COL-030-CTLFireability-14: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-15: CTL 0 0 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 136 secs. Pages in use: 1
# running tasks: 0 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
TokenRing-COL-030-CTLFireability-00: INITIAL false skeleton: preprocessing
TokenRing-COL-030-CTLFireability-07: INITIAL true skeleton: preprocessing
TokenRing-COL-030-CTLFireability-12: INITIAL true skeleton: preprocessing
TokenRing-COL-030-CTLFireability-13: INITIAL false skeleton: preprocessing

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
TokenRing-COL-030-CTLFireability-01: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-02: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-03: DISJ 0 0 0 0 7 0 0 1
TokenRing-COL-030-CTLFireability-04: AG 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-05: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-06: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-08: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-09: INITIAL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-10: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-11: CONJ 0 0 0 0 2 0 0 0
TokenRing-COL-030-CTLFireability-14: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-15: CTL 0 0 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 141 secs. Pages in use: 1
# running tasks: 0 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
TokenRing-COL-030-CTLFireability-00: INITIAL false skeleton: preprocessing
TokenRing-COL-030-CTLFireability-07: INITIAL true skeleton: preprocessing
TokenRing-COL-030-CTLFireability-12: INITIAL true skeleton: preprocessing
TokenRing-COL-030-CTLFireability-13: INITIAL false skeleton: preprocessing

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
TokenRing-COL-030-CTLFireability-01: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-02: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-03: DISJ 0 0 0 0 7 0 0 1
TokenRing-COL-030-CTLFireability-04: AG 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-05: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-06: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-08: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-09: INITIAL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-10: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-11: CONJ 0 0 0 0 2 0 0 0
TokenRing-COL-030-CTLFireability-14: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-15: CTL 0 0 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 146 secs. Pages in use: 1
# running tasks: 0 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
TokenRing-COL-030-CTLFireability-00: INITIAL false skeleton: preprocessing
TokenRing-COL-030-CTLFireability-07: INITIAL true skeleton: preprocessing
TokenRing-COL-030-CTLFireability-12: INITIAL true skeleton: preprocessing
TokenRing-COL-030-CTLFireability-13: INITIAL false skeleton: preprocessing

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
TokenRing-COL-030-CTLFireability-01: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-02: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-03: DISJ 0 0 0 0 7 0 0 1
TokenRing-COL-030-CTLFireability-04: AG 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-05: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-06: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-08: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-09: INITIAL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-10: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-11: CONJ 0 0 0 0 2 0 0 0
TokenRing-COL-030-CTLFireability-14: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-15: CTL 0 0 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 151 secs. Pages in use: 1
# running tasks: 0 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
TokenRing-COL-030-CTLFireability-00: INITIAL false skeleton: preprocessing
TokenRing-COL-030-CTLFireability-07: INITIAL true skeleton: preprocessing
TokenRing-COL-030-CTLFireability-12: INITIAL true skeleton: preprocessing
TokenRing-COL-030-CTLFireability-13: INITIAL false skeleton: preprocessing

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
TokenRing-COL-030-CTLFireability-01: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-02: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-03: DISJ 0 0 0 0 7 0 0 1
TokenRing-COL-030-CTLFireability-04: AG 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-05: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-06: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-08: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-09: INITIAL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-10: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-11: CONJ 0 0 0 0 2 0 0 0
TokenRing-COL-030-CTLFireability-14: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-15: CTL 0 0 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 156 secs. Pages in use: 1
# running tasks: 0 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
TokenRing-COL-030-CTLFireability-00: INITIAL false skeleton: preprocessing
TokenRing-COL-030-CTLFireability-07: INITIAL true skeleton: preprocessing
TokenRing-COL-030-CTLFireability-12: INITIAL true skeleton: preprocessing
TokenRing-COL-030-CTLFireability-13: INITIAL false skeleton: preprocessing

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
TokenRing-COL-030-CTLFireability-01: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-02: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-03: DISJ 0 0 0 0 7 0 0 1
TokenRing-COL-030-CTLFireability-04: AG 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-05: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-06: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-08: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-09: INITIAL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-10: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-11: CONJ 0 0 0 0 2 0 0 0
TokenRing-COL-030-CTLFireability-14: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-15: CTL 0 0 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 161 secs. Pages in use: 1
# running tasks: 0 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
TokenRing-COL-030-CTLFireability-00: INITIAL false skeleton: preprocessing
TokenRing-COL-030-CTLFireability-07: INITIAL true skeleton: preprocessing
TokenRing-COL-030-CTLFireability-12: INITIAL true skeleton: preprocessing
TokenRing-COL-030-CTLFireability-13: INITIAL false skeleton: preprocessing

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
TokenRing-COL-030-CTLFireability-01: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-02: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-03: DISJ 0 0 0 0 7 0 0 1
TokenRing-COL-030-CTLFireability-04: AG 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-05: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-06: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-08: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-09: INITIAL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-10: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-11: CONJ 0 0 0 0 2 0 0 0
TokenRing-COL-030-CTLFireability-14: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-15: CTL 0 0 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 166 secs. Pages in use: 1
# running tasks: 0 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
TokenRing-COL-030-CTLFireability-00: INITIAL false skeleton: preprocessing
TokenRing-COL-030-CTLFireability-07: INITIAL true skeleton: preprocessing
TokenRing-COL-030-CTLFireability-12: INITIAL true skeleton: preprocessing
TokenRing-COL-030-CTLFireability-13: INITIAL false skeleton: preprocessing

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
TokenRing-COL-030-CTLFireability-01: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-02: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-03: DISJ 0 0 0 0 7 0 0 1
TokenRing-COL-030-CTLFireability-04: AG 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-05: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-06: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-08: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-09: INITIAL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-10: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-11: CONJ 0 0 0 0 2 0 0 0
TokenRing-COL-030-CTLFireability-14: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-15: CTL 0 0 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 171 secs. Pages in use: 1
# running tasks: 0 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
TokenRing-COL-030-CTLFireability-00: INITIAL false skeleton: preprocessing
TokenRing-COL-030-CTLFireability-07: INITIAL true skeleton: preprocessing
TokenRing-COL-030-CTLFireability-12: INITIAL true skeleton: preprocessing
TokenRing-COL-030-CTLFireability-13: INITIAL false skeleton: preprocessing

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
TokenRing-COL-030-CTLFireability-01: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-02: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-03: DISJ 0 0 0 0 7 0 0 1
TokenRing-COL-030-CTLFireability-04: AG 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-05: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-06: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-08: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-09: INITIAL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-10: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-11: CONJ 0 0 0 0 2 0 0 0
TokenRing-COL-030-CTLFireability-14: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-15: CTL 0 0 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 176 secs. Pages in use: 1
# running tasks: 0 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
TokenRing-COL-030-CTLFireability-00: INITIAL false skeleton: preprocessing
TokenRing-COL-030-CTLFireability-07: INITIAL true skeleton: preprocessing
TokenRing-COL-030-CTLFireability-12: INITIAL true skeleton: preprocessing
TokenRing-COL-030-CTLFireability-13: INITIAL false skeleton: preprocessing

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
TokenRing-COL-030-CTLFireability-01: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-02: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-03: DISJ 0 0 0 0 7 0 0 1
TokenRing-COL-030-CTLFireability-04: AG 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-05: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-06: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-08: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-09: INITIAL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-10: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-11: CONJ 0 0 0 0 2 0 0 0
TokenRing-COL-030-CTLFireability-14: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-15: CTL 0 0 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 181 secs. Pages in use: 1
# running tasks: 0 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
TokenRing-COL-030-CTLFireability-00: INITIAL false skeleton: preprocessing
TokenRing-COL-030-CTLFireability-07: INITIAL true skeleton: preprocessing
TokenRing-COL-030-CTLFireability-12: INITIAL true skeleton: preprocessing
TokenRing-COL-030-CTLFireability-13: INITIAL false skeleton: preprocessing

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
TokenRing-COL-030-CTLFireability-01: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-02: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-03: DISJ 0 0 0 0 7 0 0 1
TokenRing-COL-030-CTLFireability-04: AG 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-05: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-06: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-08: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-09: INITIAL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-10: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-11: CONJ 0 0 0 0 2 0 0 0
TokenRing-COL-030-CTLFireability-14: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-15: CTL 0 0 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 186 secs. Pages in use: 1
# running tasks: 0 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
TokenRing-COL-030-CTLFireability-00: INITIAL false skeleton: preprocessing
TokenRing-COL-030-CTLFireability-07: INITIAL true skeleton: preprocessing
TokenRing-COL-030-CTLFireability-12: INITIAL true skeleton: preprocessing
TokenRing-COL-030-CTLFireability-13: INITIAL false skeleton: preprocessing

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
TokenRing-COL-030-CTLFireability-01: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-02: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-03: DISJ 0 0 0 0 7 0 0 1
TokenRing-COL-030-CTLFireability-04: AG 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-05: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-06: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-08: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-09: INITIAL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-10: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-11: CONJ 0 0 0 0 2 0 0 0
TokenRing-COL-030-CTLFireability-14: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-15: CTL 0 0 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 191 secs. Pages in use: 1
# running tasks: 0 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
TokenRing-COL-030-CTLFireability-00: INITIAL false skeleton: preprocessing
TokenRing-COL-030-CTLFireability-07: INITIAL true skeleton: preprocessing
TokenRing-COL-030-CTLFireability-12: INITIAL true skeleton: preprocessing
TokenRing-COL-030-CTLFireability-13: INITIAL false skeleton: preprocessing

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
TokenRing-COL-030-CTLFireability-01: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-02: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-03: DISJ 0 0 0 0 7 0 0 1
TokenRing-COL-030-CTLFireability-04: AG 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-05: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-06: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-08: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-09: INITIAL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-10: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-11: CONJ 0 0 0 0 2 0 0 0
TokenRing-COL-030-CTLFireability-14: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-15: CTL 0 0 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 196 secs. Pages in use: 1
# running tasks: 0 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
TokenRing-COL-030-CTLFireability-00: INITIAL false skeleton: preprocessing
TokenRing-COL-030-CTLFireability-07: INITIAL true skeleton: preprocessing
TokenRing-COL-030-CTLFireability-12: INITIAL true skeleton: preprocessing
TokenRing-COL-030-CTLFireability-13: INITIAL false skeleton: preprocessing

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
TokenRing-COL-030-CTLFireability-01: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-02: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-03: DISJ 0 0 0 0 7 0 0 1
TokenRing-COL-030-CTLFireability-04: AG 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-05: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-06: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-08: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-09: INITIAL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-10: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-11: CONJ 0 0 0 0 2 0 0 0
TokenRing-COL-030-CTLFireability-14: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-15: CTL 0 0 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 201 secs. Pages in use: 1
# running tasks: 0 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
TokenRing-COL-030-CTLFireability-00: INITIAL false skeleton: preprocessing
TokenRing-COL-030-CTLFireability-07: INITIAL true skeleton: preprocessing
TokenRing-COL-030-CTLFireability-12: INITIAL true skeleton: preprocessing
TokenRing-COL-030-CTLFireability-13: INITIAL false skeleton: preprocessing

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
TokenRing-COL-030-CTLFireability-01: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-02: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-03: DISJ 0 0 0 0 7 0 0 1
TokenRing-COL-030-CTLFireability-04: AG 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-05: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-06: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-08: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-09: INITIAL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-10: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-11: CONJ 0 0 0 0 2 0 0 0
TokenRing-COL-030-CTLFireability-14: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-15: CTL 0 0 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 206 secs. Pages in use: 1
# running tasks: 0 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
TokenRing-COL-030-CTLFireability-00: INITIAL false skeleton: preprocessing
TokenRing-COL-030-CTLFireability-07: INITIAL true skeleton: preprocessing
TokenRing-COL-030-CTLFireability-12: INITIAL true skeleton: preprocessing
TokenRing-COL-030-CTLFireability-13: INITIAL false skeleton: preprocessing

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
TokenRing-COL-030-CTLFireability-01: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-02: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-03: DISJ 0 0 0 0 7 0 0 1
TokenRing-COL-030-CTLFireability-04: AG 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-05: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-06: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-08: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-09: INITIAL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-10: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-11: CONJ 0 0 0 0 2 0 0 0
TokenRing-COL-030-CTLFireability-14: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-15: CTL 0 0 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 211 secs. Pages in use: 1
# running tasks: 0 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
TokenRing-COL-030-CTLFireability-00: INITIAL false skeleton: preprocessing
TokenRing-COL-030-CTLFireability-07: INITIAL true skeleton: preprocessing
TokenRing-COL-030-CTLFireability-12: INITIAL true skeleton: preprocessing
TokenRing-COL-030-CTLFireability-13: INITIAL false skeleton: preprocessing

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
TokenRing-COL-030-CTLFireability-01: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-02: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-03: DISJ 0 0 0 0 7 0 0 1
TokenRing-COL-030-CTLFireability-04: AG 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-05: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-06: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-08: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-09: INITIAL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-10: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-11: CONJ 0 0 0 0 2 0 0 0
TokenRing-COL-030-CTLFireability-14: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-15: CTL 0 0 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 216 secs. Pages in use: 1
# running tasks: 0 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
TokenRing-COL-030-CTLFireability-00: INITIAL false skeleton: preprocessing
TokenRing-COL-030-CTLFireability-07: INITIAL true skeleton: preprocessing
TokenRing-COL-030-CTLFireability-12: INITIAL true skeleton: preprocessing
TokenRing-COL-030-CTLFireability-13: INITIAL false skeleton: preprocessing

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
TokenRing-COL-030-CTLFireability-01: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-02: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-03: DISJ 0 0 0 0 7 0 0 1
TokenRing-COL-030-CTLFireability-04: AG 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-05: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-06: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-08: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-09: INITIAL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-10: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-11: CONJ 0 0 0 0 2 0 0 0
TokenRing-COL-030-CTLFireability-14: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-15: CTL 0 0 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 221 secs. Pages in use: 1
# running tasks: 0 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
TokenRing-COL-030-CTLFireability-00: INITIAL false skeleton: preprocessing
TokenRing-COL-030-CTLFireability-07: INITIAL true skeleton: preprocessing
TokenRing-COL-030-CTLFireability-12: INITIAL true skeleton: preprocessing
TokenRing-COL-030-CTLFireability-13: INITIAL false skeleton: preprocessing

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
TokenRing-COL-030-CTLFireability-01: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-02: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-03: DISJ 0 0 0 0 7 0 0 1
TokenRing-COL-030-CTLFireability-04: AG 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-05: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-06: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-08: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-09: INITIAL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-10: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-11: CONJ 0 0 0 0 2 0 0 0
TokenRing-COL-030-CTLFireability-14: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-15: CTL 0 0 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 226 secs. Pages in use: 1
# running tasks: 0 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
TokenRing-COL-030-CTLFireability-00: INITIAL false skeleton: preprocessing
TokenRing-COL-030-CTLFireability-07: INITIAL true skeleton: preprocessing
TokenRing-COL-030-CTLFireability-12: INITIAL true skeleton: preprocessing
TokenRing-COL-030-CTLFireability-13: INITIAL false skeleton: preprocessing

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
TokenRing-COL-030-CTLFireability-01: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-02: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-03: DISJ 0 0 0 0 7 0 0 1
TokenRing-COL-030-CTLFireability-04: AG 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-05: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-06: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-08: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-09: INITIAL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-10: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-11: CONJ 0 0 0 0 2 0 0 0
TokenRing-COL-030-CTLFireability-14: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-15: CTL 0 0 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 231 secs. Pages in use: 1
# running tasks: 0 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
TokenRing-COL-030-CTLFireability-00: INITIAL false skeleton: preprocessing
TokenRing-COL-030-CTLFireability-07: INITIAL true skeleton: preprocessing
TokenRing-COL-030-CTLFireability-12: INITIAL true skeleton: preprocessing
TokenRing-COL-030-CTLFireability-13: INITIAL false skeleton: preprocessing

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
TokenRing-COL-030-CTLFireability-01: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-02: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-03: DISJ 0 0 0 0 7 0 0 1
TokenRing-COL-030-CTLFireability-04: AG 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-05: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-06: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-08: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-09: INITIAL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-10: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-11: CONJ 0 0 0 0 2 0 0 0
TokenRing-COL-030-CTLFireability-14: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-15: CTL 0 0 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 236 secs. Pages in use: 1
# running tasks: 0 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
TokenRing-COL-030-CTLFireability-00: INITIAL false skeleton: preprocessing
TokenRing-COL-030-CTLFireability-07: INITIAL true skeleton: preprocessing
TokenRing-COL-030-CTLFireability-12: INITIAL true skeleton: preprocessing
TokenRing-COL-030-CTLFireability-13: INITIAL false skeleton: preprocessing

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
TokenRing-COL-030-CTLFireability-01: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-02: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-03: DISJ 0 0 0 0 7 0 0 1
TokenRing-COL-030-CTLFireability-04: AG 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-05: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-06: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-08: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-09: INITIAL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-10: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-11: CONJ 0 0 0 0 2 0 0 0
TokenRing-COL-030-CTLFireability-14: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-15: CTL 0 0 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 241 secs. Pages in use: 1
# running tasks: 0 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
TokenRing-COL-030-CTLFireability-00: INITIAL false skeleton: preprocessing
TokenRing-COL-030-CTLFireability-07: INITIAL true skeleton: preprocessing
TokenRing-COL-030-CTLFireability-12: INITIAL true skeleton: preprocessing
TokenRing-COL-030-CTLFireability-13: INITIAL false skeleton: preprocessing

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
TokenRing-COL-030-CTLFireability-01: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-02: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-03: DISJ 0 0 0 0 7 0 0 1
TokenRing-COL-030-CTLFireability-04: AG 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-05: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-06: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-08: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-09: INITIAL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-10: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-11: CONJ 0 0 0 0 2 0 0 0
TokenRing-COL-030-CTLFireability-14: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-15: CTL 0 0 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 246 secs. Pages in use: 1
# running tasks: 0 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
TokenRing-COL-030-CTLFireability-00: INITIAL false skeleton: preprocessing
TokenRing-COL-030-CTLFireability-07: INITIAL true skeleton: preprocessing
TokenRing-COL-030-CTLFireability-12: INITIAL true skeleton: preprocessing
TokenRing-COL-030-CTLFireability-13: INITIAL false skeleton: preprocessing

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
TokenRing-COL-030-CTLFireability-01: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-02: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-03: DISJ 0 0 0 0 7 0 0 1
TokenRing-COL-030-CTLFireability-04: AG 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-05: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-06: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-08: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-09: INITIAL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-10: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-11: CONJ 0 0 0 0 2 0 0 0
TokenRing-COL-030-CTLFireability-14: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-15: CTL 0 0 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 251 secs. Pages in use: 1
# running tasks: 0 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
TokenRing-COL-030-CTLFireability-00: INITIAL false skeleton: preprocessing
TokenRing-COL-030-CTLFireability-07: INITIAL true skeleton: preprocessing
TokenRing-COL-030-CTLFireability-12: INITIAL true skeleton: preprocessing
TokenRing-COL-030-CTLFireability-13: INITIAL false skeleton: preprocessing

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
TokenRing-COL-030-CTLFireability-01: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-02: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-03: DISJ 0 0 0 0 7 0 0 1
TokenRing-COL-030-CTLFireability-04: AG 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-05: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-06: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-08: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-09: INITIAL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-10: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-11: CONJ 0 0 0 0 2 0 0 0
TokenRing-COL-030-CTLFireability-14: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-15: CTL 0 0 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 256 secs. Pages in use: 1
# running tasks: 0 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
TokenRing-COL-030-CTLFireability-00: INITIAL false skeleton: preprocessing
TokenRing-COL-030-CTLFireability-07: INITIAL true skeleton: preprocessing
TokenRing-COL-030-CTLFireability-12: INITIAL true skeleton: preprocessing
TokenRing-COL-030-CTLFireability-13: INITIAL false skeleton: preprocessing

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
TokenRing-COL-030-CTLFireability-01: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-02: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-03: DISJ 0 0 0 0 7 0 0 1
TokenRing-COL-030-CTLFireability-04: AG 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-05: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-06: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-08: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-09: INITIAL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-10: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-11: CONJ 0 0 0 0 2 0 0 0
TokenRing-COL-030-CTLFireability-14: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-15: CTL 0 0 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 261 secs. Pages in use: 1
# running tasks: 0 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
TokenRing-COL-030-CTLFireability-00: INITIAL false skeleton: preprocessing
TokenRing-COL-030-CTLFireability-07: INITIAL true skeleton: preprocessing
TokenRing-COL-030-CTLFireability-12: INITIAL true skeleton: preprocessing
TokenRing-COL-030-CTLFireability-13: INITIAL false skeleton: preprocessing

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
TokenRing-COL-030-CTLFireability-01: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-02: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-03: DISJ 0 0 0 0 7 0 0 1
TokenRing-COL-030-CTLFireability-04: AG 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-05: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-06: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-08: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-09: INITIAL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-10: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-11: CONJ 0 0 0 0 2 0 0 0
TokenRing-COL-030-CTLFireability-14: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-15: CTL 0 0 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 266 secs. Pages in use: 1
# running tasks: 0 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
TokenRing-COL-030-CTLFireability-00: INITIAL false skeleton: preprocessing
TokenRing-COL-030-CTLFireability-07: INITIAL true skeleton: preprocessing
TokenRing-COL-030-CTLFireability-12: INITIAL true skeleton: preprocessing
TokenRing-COL-030-CTLFireability-13: INITIAL false skeleton: preprocessing

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
TokenRing-COL-030-CTLFireability-01: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-02: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-03: DISJ 0 0 0 0 7 0 0 1
TokenRing-COL-030-CTLFireability-04: AG 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-05: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-06: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-08: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-09: INITIAL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-10: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-11: CONJ 0 0 0 0 2 0 0 0
TokenRing-COL-030-CTLFireability-14: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-15: CTL 0 0 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 271 secs. Pages in use: 1
# running tasks: 0 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
TokenRing-COL-030-CTLFireability-00: INITIAL false skeleton: preprocessing
TokenRing-COL-030-CTLFireability-07: INITIAL true skeleton: preprocessing
TokenRing-COL-030-CTLFireability-12: INITIAL true skeleton: preprocessing
TokenRing-COL-030-CTLFireability-13: INITIAL false skeleton: preprocessing

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
TokenRing-COL-030-CTLFireability-01: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-02: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-03: DISJ 0 0 0 0 7 0 0 1
TokenRing-COL-030-CTLFireability-04: AG 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-05: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-06: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-08: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-09: INITIAL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-10: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-11: CONJ 0 0 0 0 2 0 0 0
TokenRing-COL-030-CTLFireability-14: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-15: CTL 0 0 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 276 secs. Pages in use: 1
# running tasks: 0 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
TokenRing-COL-030-CTLFireability-00: INITIAL false skeleton: preprocessing
TokenRing-COL-030-CTLFireability-07: INITIAL true skeleton: preprocessing
TokenRing-COL-030-CTLFireability-12: INITIAL true skeleton: preprocessing
TokenRing-COL-030-CTLFireability-13: INITIAL false skeleton: preprocessing

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
TokenRing-COL-030-CTLFireability-01: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-02: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-03: DISJ 0 0 0 0 7 0 0 1
TokenRing-COL-030-CTLFireability-04: AG 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-05: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-06: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-08: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-09: INITIAL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-10: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-11: CONJ 0 0 0 0 2 0 0 0
TokenRing-COL-030-CTLFireability-14: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-15: CTL 0 0 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 281 secs. Pages in use: 1
# running tasks: 0 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
TokenRing-COL-030-CTLFireability-00: INITIAL false skeleton: preprocessing
TokenRing-COL-030-CTLFireability-07: INITIAL true skeleton: preprocessing
TokenRing-COL-030-CTLFireability-12: INITIAL true skeleton: preprocessing
TokenRing-COL-030-CTLFireability-13: INITIAL false skeleton: preprocessing

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
TokenRing-COL-030-CTLFireability-01: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-02: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-03: DISJ 0 0 0 0 7 0 0 1
TokenRing-COL-030-CTLFireability-04: AG 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-05: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-06: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-08: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-09: INITIAL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-10: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-11: CONJ 0 0 0 0 2 0 0 0
TokenRing-COL-030-CTLFireability-14: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-15: CTL 0 0 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 286 secs. Pages in use: 1
# running tasks: 0 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
TokenRing-COL-030-CTLFireability-00: INITIAL false skeleton: preprocessing
TokenRing-COL-030-CTLFireability-07: INITIAL true skeleton: preprocessing
TokenRing-COL-030-CTLFireability-12: INITIAL true skeleton: preprocessing
TokenRing-COL-030-CTLFireability-13: INITIAL false skeleton: preprocessing

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
TokenRing-COL-030-CTLFireability-01: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-02: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-03: DISJ 0 0 0 0 7 0 0 1
TokenRing-COL-030-CTLFireability-04: AG 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-05: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-06: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-08: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-09: INITIAL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-10: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-11: CONJ 0 0 0 0 2 0 0 0
TokenRing-COL-030-CTLFireability-14: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-15: CTL 0 0 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 291 secs. Pages in use: 1
# running tasks: 0 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
TokenRing-COL-030-CTLFireability-00: INITIAL false skeleton: preprocessing
TokenRing-COL-030-CTLFireability-07: INITIAL true skeleton: preprocessing
TokenRing-COL-030-CTLFireability-12: INITIAL true skeleton: preprocessing
TokenRing-COL-030-CTLFireability-13: INITIAL false skeleton: preprocessing

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
TokenRing-COL-030-CTLFireability-01: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-02: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-03: DISJ 0 0 0 0 7 0 0 1
TokenRing-COL-030-CTLFireability-04: AG 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-05: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-06: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-08: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-09: INITIAL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-10: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-11: CONJ 0 0 0 0 2 0 0 0
TokenRing-COL-030-CTLFireability-14: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-15: CTL 0 0 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 296 secs. Pages in use: 1
# running tasks: 0 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
TokenRing-COL-030-CTLFireability-00: INITIAL false skeleton: preprocessing
TokenRing-COL-030-CTLFireability-07: INITIAL true skeleton: preprocessing
TokenRing-COL-030-CTLFireability-12: INITIAL true skeleton: preprocessing
TokenRing-COL-030-CTLFireability-13: INITIAL false skeleton: preprocessing

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
TokenRing-COL-030-CTLFireability-01: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-02: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-03: DISJ 0 0 0 0 7 0 0 1
TokenRing-COL-030-CTLFireability-04: AG 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-05: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-06: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-08: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-09: INITIAL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-10: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-11: CONJ 0 0 0 0 2 0 0 0
TokenRing-COL-030-CTLFireability-14: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-15: CTL 0 0 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 301 secs. Pages in use: 1
# running tasks: 0 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
TokenRing-COL-030-CTLFireability-00: INITIAL false skeleton: preprocessing
TokenRing-COL-030-CTLFireability-07: INITIAL true skeleton: preprocessing
TokenRing-COL-030-CTLFireability-12: INITIAL true skeleton: preprocessing
TokenRing-COL-030-CTLFireability-13: INITIAL false skeleton: preprocessing

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
TokenRing-COL-030-CTLFireability-01: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-02: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-03: DISJ 0 0 0 0 7 0 0 1
TokenRing-COL-030-CTLFireability-04: AG 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-05: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-06: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-08: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-09: INITIAL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-10: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-11: CONJ 0 0 0 0 2 0 0 0
TokenRing-COL-030-CTLFireability-14: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-15: CTL 0 0 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 306 secs. Pages in use: 1
# running tasks: 0 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
TokenRing-COL-030-CTLFireability-00: INITIAL false skeleton: preprocessing
TokenRing-COL-030-CTLFireability-07: INITIAL true skeleton: preprocessing
TokenRing-COL-030-CTLFireability-12: INITIAL true skeleton: preprocessing
TokenRing-COL-030-CTLFireability-13: INITIAL false skeleton: preprocessing

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
TokenRing-COL-030-CTLFireability-01: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-02: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-03: DISJ 0 0 0 0 7 0 0 1
TokenRing-COL-030-CTLFireability-04: AG 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-05: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-06: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-08: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-09: INITIAL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-10: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-11: CONJ 0 0 0 0 2 0 0 0
TokenRing-COL-030-CTLFireability-14: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-15: CTL 0 0 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 311 secs. Pages in use: 1
# running tasks: 0 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
TokenRing-COL-030-CTLFireability-00: INITIAL false skeleton: preprocessing
TokenRing-COL-030-CTLFireability-07: INITIAL true skeleton: preprocessing
TokenRing-COL-030-CTLFireability-12: INITIAL true skeleton: preprocessing
TokenRing-COL-030-CTLFireability-13: INITIAL false skeleton: preprocessing

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
TokenRing-COL-030-CTLFireability-01: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-02: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-03: DISJ 0 0 0 0 7 0 0 1
TokenRing-COL-030-CTLFireability-04: AG 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-05: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-06: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-08: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-09: INITIAL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-10: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-11: CONJ 0 0 0 0 2 0 0 0
TokenRing-COL-030-CTLFireability-14: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-15: CTL 0 0 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 316 secs. Pages in use: 1
# running tasks: 0 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
TokenRing-COL-030-CTLFireability-00: INITIAL false skeleton: preprocessing
TokenRing-COL-030-CTLFireability-07: INITIAL true skeleton: preprocessing
TokenRing-COL-030-CTLFireability-12: INITIAL true skeleton: preprocessing
TokenRing-COL-030-CTLFireability-13: INITIAL false skeleton: preprocessing

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
TokenRing-COL-030-CTLFireability-01: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-02: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-03: DISJ 0 0 0 0 7 0 0 1
TokenRing-COL-030-CTLFireability-04: AG 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-05: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-06: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-08: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-09: INITIAL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-10: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-11: CONJ 0 0 0 0 2 0 0 0
TokenRing-COL-030-CTLFireability-14: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-15: CTL 0 0 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 321 secs. Pages in use: 1
# running tasks: 0 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
TokenRing-COL-030-CTLFireability-00: INITIAL false skeleton: preprocessing
TokenRing-COL-030-CTLFireability-07: INITIAL true skeleton: preprocessing
TokenRing-COL-030-CTLFireability-12: INITIAL true skeleton: preprocessing
TokenRing-COL-030-CTLFireability-13: INITIAL false skeleton: preprocessing

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
TokenRing-COL-030-CTLFireability-01: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-02: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-03: DISJ 0 0 0 0 7 0 0 1
TokenRing-COL-030-CTLFireability-04: AG 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-05: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-06: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-08: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-09: INITIAL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-10: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-11: CONJ 0 0 0 0 2 0 0 0
TokenRing-COL-030-CTLFireability-14: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-15: CTL 0 0 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 326 secs. Pages in use: 1
# running tasks: 0 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
TokenRing-COL-030-CTLFireability-00: INITIAL false skeleton: preprocessing
TokenRing-COL-030-CTLFireability-07: INITIAL true skeleton: preprocessing
TokenRing-COL-030-CTLFireability-12: INITIAL true skeleton: preprocessing
TokenRing-COL-030-CTLFireability-13: INITIAL false skeleton: preprocessing

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
TokenRing-COL-030-CTLFireability-01: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-02: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-03: DISJ 0 0 0 0 7 0 0 1
TokenRing-COL-030-CTLFireability-04: AG 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-05: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-06: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-08: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-09: INITIAL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-10: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-11: CONJ 0 0 0 0 2 0 0 0
TokenRing-COL-030-CTLFireability-14: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-15: CTL 0 0 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 331 secs. Pages in use: 1
# running tasks: 0 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
TokenRing-COL-030-CTLFireability-00: INITIAL false skeleton: preprocessing
TokenRing-COL-030-CTLFireability-07: INITIAL true skeleton: preprocessing
TokenRing-COL-030-CTLFireability-12: INITIAL true skeleton: preprocessing
TokenRing-COL-030-CTLFireability-13: INITIAL false skeleton: preprocessing

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
TokenRing-COL-030-CTLFireability-01: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-02: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-03: DISJ 0 0 0 0 7 0 0 1
TokenRing-COL-030-CTLFireability-04: AG 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-05: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-06: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-08: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-09: INITIAL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-10: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-11: CONJ 0 0 0 0 2 0 0 0
TokenRing-COL-030-CTLFireability-14: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-15: CTL 0 0 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 336 secs. Pages in use: 1
# running tasks: 0 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
TokenRing-COL-030-CTLFireability-00: INITIAL false skeleton: preprocessing
TokenRing-COL-030-CTLFireability-07: INITIAL true skeleton: preprocessing
TokenRing-COL-030-CTLFireability-12: INITIAL true skeleton: preprocessing
TokenRing-COL-030-CTLFireability-13: INITIAL false skeleton: preprocessing

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
TokenRing-COL-030-CTLFireability-01: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-02: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-03: DISJ 0 0 0 0 7 0 0 1
TokenRing-COL-030-CTLFireability-04: AG 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-05: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-06: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-08: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-09: INITIAL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-10: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-11: CONJ 0 0 0 0 2 0 0 0
TokenRing-COL-030-CTLFireability-14: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-15: CTL 0 0 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 341 secs. Pages in use: 1
# running tasks: 0 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
TokenRing-COL-030-CTLFireability-00: INITIAL false skeleton: preprocessing
TokenRing-COL-030-CTLFireability-07: INITIAL true skeleton: preprocessing
TokenRing-COL-030-CTLFireability-12: INITIAL true skeleton: preprocessing
TokenRing-COL-030-CTLFireability-13: INITIAL false skeleton: preprocessing

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
TokenRing-COL-030-CTLFireability-01: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-02: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-03: DISJ 0 0 0 0 7 0 0 1
TokenRing-COL-030-CTLFireability-04: AG 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-05: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-06: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-08: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-09: INITIAL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-10: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-11: CONJ 0 0 0 0 2 0 0 0
TokenRing-COL-030-CTLFireability-14: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-15: CTL 0 0 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 346 secs. Pages in use: 1
# running tasks: 0 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
TokenRing-COL-030-CTLFireability-00: INITIAL false skeleton: preprocessing
TokenRing-COL-030-CTLFireability-07: INITIAL true skeleton: preprocessing
TokenRing-COL-030-CTLFireability-12: INITIAL true skeleton: preprocessing
TokenRing-COL-030-CTLFireability-13: INITIAL false skeleton: preprocessing

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
TokenRing-COL-030-CTLFireability-01: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-02: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-03: DISJ 0 0 0 0 7 0 0 1
TokenRing-COL-030-CTLFireability-04: AG 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-05: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-06: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-08: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-09: INITIAL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-10: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-11: CONJ 0 0 0 0 2 0 0 0
TokenRing-COL-030-CTLFireability-14: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-15: CTL 0 0 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 351 secs. Pages in use: 1
# running tasks: 0 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
TokenRing-COL-030-CTLFireability-00: INITIAL false skeleton: preprocessing
TokenRing-COL-030-CTLFireability-07: INITIAL true skeleton: preprocessing
TokenRing-COL-030-CTLFireability-12: INITIAL true skeleton: preprocessing
TokenRing-COL-030-CTLFireability-13: INITIAL false skeleton: preprocessing

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
TokenRing-COL-030-CTLFireability-01: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-02: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-03: DISJ 0 0 0 0 7 0 0 1
TokenRing-COL-030-CTLFireability-04: AG 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-05: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-06: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-08: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-09: INITIAL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-10: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-11: CONJ 0 0 0 0 2 0 0 0
TokenRing-COL-030-CTLFireability-14: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-15: CTL 0 0 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 356 secs. Pages in use: 1
# running tasks: 0 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
TokenRing-COL-030-CTLFireability-00: INITIAL false skeleton: preprocessing
TokenRing-COL-030-CTLFireability-07: INITIAL true skeleton: preprocessing
TokenRing-COL-030-CTLFireability-12: INITIAL true skeleton: preprocessing
TokenRing-COL-030-CTLFireability-13: INITIAL false skeleton: preprocessing

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
TokenRing-COL-030-CTLFireability-01: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-02: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-03: DISJ 0 0 0 0 7 0 0 1
TokenRing-COL-030-CTLFireability-04: AG 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-05: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-06: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-08: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-09: INITIAL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-10: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-11: CONJ 0 0 0 0 2 0 0 0
TokenRing-COL-030-CTLFireability-14: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-15: CTL 0 0 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 361 secs. Pages in use: 1
# running tasks: 0 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
TokenRing-COL-030-CTLFireability-00: INITIAL false skeleton: preprocessing
TokenRing-COL-030-CTLFireability-07: INITIAL true skeleton: preprocessing
TokenRing-COL-030-CTLFireability-12: INITIAL true skeleton: preprocessing
TokenRing-COL-030-CTLFireability-13: INITIAL false skeleton: preprocessing

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
TokenRing-COL-030-CTLFireability-01: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-02: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-03: DISJ 0 0 0 0 7 0 0 1
TokenRing-COL-030-CTLFireability-04: AG 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-05: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-06: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-08: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-09: INITIAL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-10: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-11: CONJ 0 0 0 0 2 0 0 0
TokenRing-COL-030-CTLFireability-14: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-15: CTL 0 0 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 366 secs. Pages in use: 1
# running tasks: 0 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
TokenRing-COL-030-CTLFireability-00: INITIAL false skeleton: preprocessing
TokenRing-COL-030-CTLFireability-07: INITIAL true skeleton: preprocessing
TokenRing-COL-030-CTLFireability-12: INITIAL true skeleton: preprocessing
TokenRing-COL-030-CTLFireability-13: INITIAL false skeleton: preprocessing

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
TokenRing-COL-030-CTLFireability-01: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-02: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-03: DISJ 0 0 0 0 7 0 0 1
TokenRing-COL-030-CTLFireability-04: AG 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-05: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-06: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-08: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-09: INITIAL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-10: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-11: CONJ 0 0 0 0 2 0 0 0
TokenRing-COL-030-CTLFireability-14: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-15: CTL 0 0 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 371 secs. Pages in use: 1
# running tasks: 0 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
TokenRing-COL-030-CTLFireability-00: INITIAL false skeleton: preprocessing
TokenRing-COL-030-CTLFireability-07: INITIAL true skeleton: preprocessing
TokenRing-COL-030-CTLFireability-12: INITIAL true skeleton: preprocessing
TokenRing-COL-030-CTLFireability-13: INITIAL false skeleton: preprocessing

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
TokenRing-COL-030-CTLFireability-01: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-02: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-03: DISJ 0 0 0 0 7 0 0 1
TokenRing-COL-030-CTLFireability-04: AG 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-05: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-06: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-08: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-09: INITIAL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-10: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-11: CONJ 0 0 0 0 2 0 0 0
TokenRing-COL-030-CTLFireability-14: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-15: CTL 0 0 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 376 secs. Pages in use: 1
# running tasks: 0 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
TokenRing-COL-030-CTLFireability-00: INITIAL false skeleton: preprocessing
TokenRing-COL-030-CTLFireability-07: INITIAL true skeleton: preprocessing
TokenRing-COL-030-CTLFireability-12: INITIAL true skeleton: preprocessing
TokenRing-COL-030-CTLFireability-13: INITIAL false skeleton: preprocessing

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
TokenRing-COL-030-CTLFireability-01: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-02: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-03: DISJ 0 0 0 0 7 0 0 1
TokenRing-COL-030-CTLFireability-04: AG 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-05: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-06: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-08: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-09: INITIAL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-10: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-11: CONJ 0 0 0 0 2 0 0 0
TokenRing-COL-030-CTLFireability-14: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-15: CTL 0 0 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 381 secs. Pages in use: 1
# running tasks: 0 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
TokenRing-COL-030-CTLFireability-00: INITIAL false skeleton: preprocessing
TokenRing-COL-030-CTLFireability-07: INITIAL true skeleton: preprocessing
TokenRing-COL-030-CTLFireability-12: INITIAL true skeleton: preprocessing
TokenRing-COL-030-CTLFireability-13: INITIAL false skeleton: preprocessing

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
TokenRing-COL-030-CTLFireability-01: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-02: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-03: DISJ 0 0 0 0 7 0 0 1
TokenRing-COL-030-CTLFireability-04: AG 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-05: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-06: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-08: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-09: INITIAL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-10: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-11: CONJ 0 0 0 0 2 0 0 0
TokenRing-COL-030-CTLFireability-14: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-15: CTL 0 0 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 386 secs. Pages in use: 1
# running tasks: 0 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
TokenRing-COL-030-CTLFireability-00: INITIAL false skeleton: preprocessing
TokenRing-COL-030-CTLFireability-07: INITIAL true skeleton: preprocessing
TokenRing-COL-030-CTLFireability-12: INITIAL true skeleton: preprocessing
TokenRing-COL-030-CTLFireability-13: INITIAL false skeleton: preprocessing

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
TokenRing-COL-030-CTLFireability-01: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-02: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-03: DISJ 0 0 0 0 7 0 0 1
TokenRing-COL-030-CTLFireability-04: AG 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-05: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-06: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-08: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-09: INITIAL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-10: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-11: CONJ 0 0 0 0 2 0 0 0
TokenRing-COL-030-CTLFireability-14: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-15: CTL 0 0 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 391 secs. Pages in use: 1
# running tasks: 0 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
TokenRing-COL-030-CTLFireability-00: INITIAL false skeleton: preprocessing
TokenRing-COL-030-CTLFireability-07: INITIAL true skeleton: preprocessing
TokenRing-COL-030-CTLFireability-12: INITIAL true skeleton: preprocessing
TokenRing-COL-030-CTLFireability-13: INITIAL false skeleton: preprocessing

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
TokenRing-COL-030-CTLFireability-01: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-02: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-03: DISJ 0 0 0 0 7 0 0 1
TokenRing-COL-030-CTLFireability-04: AG 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-05: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-06: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-08: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-09: INITIAL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-10: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-11: CONJ 0 0 0 0 2 0 0 0
TokenRing-COL-030-CTLFireability-14: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-15: CTL 0 0 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 396 secs. Pages in use: 1
# running tasks: 0 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
TokenRing-COL-030-CTLFireability-00: INITIAL false skeleton: preprocessing
TokenRing-COL-030-CTLFireability-07: INITIAL true skeleton: preprocessing
TokenRing-COL-030-CTLFireability-12: INITIAL true skeleton: preprocessing
TokenRing-COL-030-CTLFireability-13: INITIAL false skeleton: preprocessing

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
TokenRing-COL-030-CTLFireability-01: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-02: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-03: DISJ 0 0 0 0 7 0 0 1
TokenRing-COL-030-CTLFireability-04: AG 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-05: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-06: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-08: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-09: INITIAL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-10: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-11: CONJ 0 0 0 0 2 0 0 0
TokenRing-COL-030-CTLFireability-14: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-15: CTL 0 0 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 401 secs. Pages in use: 1
# running tasks: 0 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
TokenRing-COL-030-CTLFireability-00: INITIAL false skeleton: preprocessing
TokenRing-COL-030-CTLFireability-07: INITIAL true skeleton: preprocessing
TokenRing-COL-030-CTLFireability-12: INITIAL true skeleton: preprocessing
TokenRing-COL-030-CTLFireability-13: INITIAL false skeleton: preprocessing

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
TokenRing-COL-030-CTLFireability-01: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-02: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-03: DISJ 0 0 0 0 7 0 0 1
TokenRing-COL-030-CTLFireability-04: AG 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-05: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-06: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-08: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-09: INITIAL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-10: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-11: CONJ 0 0 0 0 2 0 0 0
TokenRing-COL-030-CTLFireability-14: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-15: CTL 0 0 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 406 secs. Pages in use: 1
# running tasks: 0 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
TokenRing-COL-030-CTLFireability-00: INITIAL false skeleton: preprocessing
TokenRing-COL-030-CTLFireability-07: INITIAL true skeleton: preprocessing
TokenRing-COL-030-CTLFireability-12: INITIAL true skeleton: preprocessing
TokenRing-COL-030-CTLFireability-13: INITIAL false skeleton: preprocessing

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
TokenRing-COL-030-CTLFireability-01: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-02: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-03: DISJ 0 0 0 0 7 0 0 1
TokenRing-COL-030-CTLFireability-04: AG 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-05: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-06: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-08: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-09: INITIAL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-10: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-11: CONJ 0 0 0 0 2 0 0 0
TokenRing-COL-030-CTLFireability-14: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-15: CTL 0 0 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 411 secs. Pages in use: 1
# running tasks: 0 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
TokenRing-COL-030-CTLFireability-00: INITIAL false skeleton: preprocessing
TokenRing-COL-030-CTLFireability-07: INITIAL true skeleton: preprocessing
TokenRing-COL-030-CTLFireability-12: INITIAL true skeleton: preprocessing
TokenRing-COL-030-CTLFireability-13: INITIAL false skeleton: preprocessing

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
TokenRing-COL-030-CTLFireability-01: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-02: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-03: DISJ 0 0 0 0 7 0 0 1
TokenRing-COL-030-CTLFireability-04: AG 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-05: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-06: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-08: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-09: INITIAL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-10: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-11: CONJ 0 0 0 0 2 0 0 0
TokenRing-COL-030-CTLFireability-14: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-15: CTL 0 0 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 416 secs. Pages in use: 1
# running tasks: 0 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
TokenRing-COL-030-CTLFireability-00: INITIAL false skeleton: preprocessing
TokenRing-COL-030-CTLFireability-07: INITIAL true skeleton: preprocessing
TokenRing-COL-030-CTLFireability-12: INITIAL true skeleton: preprocessing
TokenRing-COL-030-CTLFireability-13: INITIAL false skeleton: preprocessing

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
TokenRing-COL-030-CTLFireability-01: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-02: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-03: DISJ 0 0 0 0 7 0 0 1
TokenRing-COL-030-CTLFireability-04: AG 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-05: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-06: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-08: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-09: INITIAL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-10: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-11: CONJ 0 0 0 0 2 0 0 0
TokenRing-COL-030-CTLFireability-14: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-15: CTL 0 0 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 421 secs. Pages in use: 1
# running tasks: 0 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
TokenRing-COL-030-CTLFireability-00: INITIAL false skeleton: preprocessing
TokenRing-COL-030-CTLFireability-07: INITIAL true skeleton: preprocessing
TokenRing-COL-030-CTLFireability-12: INITIAL true skeleton: preprocessing
TokenRing-COL-030-CTLFireability-13: INITIAL false skeleton: preprocessing

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
TokenRing-COL-030-CTLFireability-01: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-02: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-03: DISJ 0 0 0 0 7 0 0 1
TokenRing-COL-030-CTLFireability-04: AG 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-05: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-06: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-08: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-09: INITIAL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-10: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-11: CONJ 0 0 0 0 2 0 0 0
TokenRing-COL-030-CTLFireability-14: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-15: CTL 0 0 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 426 secs. Pages in use: 1
# running tasks: 0 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
TokenRing-COL-030-CTLFireability-00: INITIAL false skeleton: preprocessing
TokenRing-COL-030-CTLFireability-07: INITIAL true skeleton: preprocessing
TokenRing-COL-030-CTLFireability-12: INITIAL true skeleton: preprocessing
TokenRing-COL-030-CTLFireability-13: INITIAL false skeleton: preprocessing

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
TokenRing-COL-030-CTLFireability-01: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-02: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-03: DISJ 0 0 0 0 7 0 0 1
TokenRing-COL-030-CTLFireability-04: AG 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-05: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-06: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-08: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-09: INITIAL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-10: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-11: CONJ 0 0 0 0 2 0 0 0
TokenRing-COL-030-CTLFireability-14: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-15: CTL 0 0 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 431 secs. Pages in use: 1
# running tasks: 0 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
TokenRing-COL-030-CTLFireability-00: INITIAL false skeleton: preprocessing
TokenRing-COL-030-CTLFireability-07: INITIAL true skeleton: preprocessing
TokenRing-COL-030-CTLFireability-12: INITIAL true skeleton: preprocessing
TokenRing-COL-030-CTLFireability-13: INITIAL false skeleton: preprocessing

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
TokenRing-COL-030-CTLFireability-01: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-02: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-03: DISJ 0 0 0 0 7 0 0 1
TokenRing-COL-030-CTLFireability-04: AG 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-05: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-06: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-08: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-09: INITIAL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-10: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-11: CONJ 0 0 0 0 2 0 0 0
TokenRing-COL-030-CTLFireability-14: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-15: CTL 0 0 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 436 secs. Pages in use: 1
# running tasks: 0 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
TokenRing-COL-030-CTLFireability-00: INITIAL false skeleton: preprocessing
TokenRing-COL-030-CTLFireability-07: INITIAL true skeleton: preprocessing
TokenRing-COL-030-CTLFireability-12: INITIAL true skeleton: preprocessing
TokenRing-COL-030-CTLFireability-13: INITIAL false skeleton: preprocessing

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
TokenRing-COL-030-CTLFireability-01: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-02: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-03: DISJ 0 0 0 0 7 0 0 1
TokenRing-COL-030-CTLFireability-04: AG 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-05: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-06: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-08: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-09: INITIAL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-10: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-11: CONJ 0 0 0 0 2 0 0 0
TokenRing-COL-030-CTLFireability-14: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-15: CTL 0 0 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 441 secs. Pages in use: 1
# running tasks: 0 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
TokenRing-COL-030-CTLFireability-00: INITIAL false skeleton: preprocessing
TokenRing-COL-030-CTLFireability-07: INITIAL true skeleton: preprocessing
TokenRing-COL-030-CTLFireability-12: INITIAL true skeleton: preprocessing
TokenRing-COL-030-CTLFireability-13: INITIAL false skeleton: preprocessing

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
TokenRing-COL-030-CTLFireability-01: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-02: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-03: DISJ 0 0 0 0 7 0 0 1
TokenRing-COL-030-CTLFireability-04: AG 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-05: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-06: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-08: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-09: INITIAL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-10: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-11: CONJ 0 0 0 0 2 0 0 0
TokenRing-COL-030-CTLFireability-14: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-15: CTL 0 0 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 446 secs. Pages in use: 1
# running tasks: 0 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
TokenRing-COL-030-CTLFireability-00: INITIAL false skeleton: preprocessing
TokenRing-COL-030-CTLFireability-07: INITIAL true skeleton: preprocessing
TokenRing-COL-030-CTLFireability-12: INITIAL true skeleton: preprocessing
TokenRing-COL-030-CTLFireability-13: INITIAL false skeleton: preprocessing

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
TokenRing-COL-030-CTLFireability-01: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-02: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-03: DISJ 0 0 0 0 7 0 0 1
TokenRing-COL-030-CTLFireability-04: AG 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-05: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-06: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-08: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-09: INITIAL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-10: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-11: CONJ 0 0 0 0 2 0 0 0
TokenRing-COL-030-CTLFireability-14: CTL 0 0 0 0 1 0 0 0
TokenRing-COL-030-CTLFireability-15: CTL 0 0 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 451 secs. Pages in use: 1
# running tasks: 0 of 4 Visible: 16
/home/mcc/BenchKit/BenchKit_head.sh: line 62: 393 Killed lola --conf=$BIN_DIR/configfiles/ctlfireabilityconf --formula=$DIR/CTLFireability.xml --verdictfile=$DIR/GenericPropertiesVerdict.xml $DIR/model.pnml

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="TokenRing-COL-030"
export BK_EXAMINATION="CTLFireability"
export BK_TOOL="lola"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-4028"
echo " Executing tool lola"
echo " Input is TokenRing-COL-030, examination is CTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r270-smll-162123877100034"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/TokenRing-COL-030.tgz
mv TokenRing-COL-030 execution
cd execution
if [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "UpperBounds" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] || [ "CTLFireability" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property CTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "CTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' CTLFireability.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] ; then
echo "FORMULA_NAME CTLFireability"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;