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Model Checking Contest 2021
11th edition, Paris, France, June 23, 2021
Execution of r232-smll-162106562600366
Last Updated
Jun 28, 2021

About the Execution of LoLA for SimpleLoadBal-PT-05

Execution Summary
Max Memory
Used (MB)		 Time wait (ms) CPU Usage (ms) I/O Wait (ms) Computed Result Execution
Status
166.104 1928.00 7188.00 5.10 FTFFTFFFFFFFTFTF normal

Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/data/fkordon/mcc2021-input.r232-smll-162106562600366.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2021-input.qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
................................................................................................................................................................
=====================================================================
Generated by BenchKit 2-4028
Executing tool lola
Input is SimpleLoadBal-PT-05, examination is ReachabilityCardinality
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r232-smll-162106562600366
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 608K
-rw-r--r-- 1 mcc users 27K May 5 16:58 CTLCardinality.txt
-rw-r--r-- 1 mcc users 152K May 10 09:44 CTLCardinality.xml
-rw-r--r-- 1 mcc users 22K May 5 16:58 CTLFireability.txt
-rw-r--r-- 1 mcc users 100K May 10 09:44 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K May 6 14:48 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.8K May 6 14:48 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 4.5K Apr 26 07:43 LTLCardinality.txt
-rw-r--r-- 1 mcc users 25K Apr 26 07:43 LTLCardinality.xml
-rw-r--r-- 1 mcc users 3.2K Apr 26 07:43 LTLFireability.txt
-rw-r--r-- 1 mcc users 19K Apr 26 07:43 LTLFireability.xml
-rw-r--r-- 1 mcc users 4.4K Mar 27 13:39 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 20K Mar 27 13:39 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 3.6K Mar 25 19:26 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 17K Mar 25 19:26 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.8K Mar 22 08:16 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.9K Mar 22 08:16 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 May 5 16:52 equiv_col
-rw-r--r-- 1 mcc users 3 May 5 16:52 instance
-rw-r--r-- 1 mcc users 6 May 5 16:52 iscolored
-rw-r--r-- 1 mcc users 155K May 5 16:52 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME SimpleLoadBal-PT-05-ReachabilityCardinality-00
FORMULA_NAME SimpleLoadBal-PT-05-ReachabilityCardinality-01
FORMULA_NAME SimpleLoadBal-PT-05-ReachabilityCardinality-02
FORMULA_NAME SimpleLoadBal-PT-05-ReachabilityCardinality-03
FORMULA_NAME SimpleLoadBal-PT-05-ReachabilityCardinality-04
FORMULA_NAME SimpleLoadBal-PT-05-ReachabilityCardinality-05
FORMULA_NAME SimpleLoadBal-PT-05-ReachabilityCardinality-06
FORMULA_NAME SimpleLoadBal-PT-05-ReachabilityCardinality-07
FORMULA_NAME SimpleLoadBal-PT-05-ReachabilityCardinality-08
FORMULA_NAME SimpleLoadBal-PT-05-ReachabilityCardinality-09
FORMULA_NAME SimpleLoadBal-PT-05-ReachabilityCardinality-10
FORMULA_NAME SimpleLoadBal-PT-05-ReachabilityCardinality-11
FORMULA_NAME SimpleLoadBal-PT-05-ReachabilityCardinality-12
FORMULA_NAME SimpleLoadBal-PT-05-ReachabilityCardinality-13
FORMULA_NAME SimpleLoadBal-PT-05-ReachabilityCardinality-14
FORMULA_NAME SimpleLoadBal-PT-05-ReachabilityCardinality-15

=== Now, execution of the tool begins

BK_START 1621172724863

starting LoLA
BK_INPUT SimpleLoadBal-PT-05
BK_EXAMINATION: ReachabilityCardinality
bin directory: /home/mcc/BenchKit/bin
current directory: /home/mcc/execution
ReachabilityCardinality

FORMULA SimpleLoadBal-PT-05-ReachabilityCardinality-02 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA SimpleLoadBal-PT-05-ReachabilityCardinality-00 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA SimpleLoadBal-PT-05-ReachabilityCardinality-12 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA SimpleLoadBal-PT-05-ReachabilityCardinality-13 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA SimpleLoadBal-PT-05-ReachabilityCardinality-14 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA SimpleLoadBal-PT-05-ReachabilityCardinality-06 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA SimpleLoadBal-PT-05-ReachabilityCardinality-05 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA SimpleLoadBal-PT-05-ReachabilityCardinality-11 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA SimpleLoadBal-PT-05-ReachabilityCardinality-10 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA SimpleLoadBal-PT-05-ReachabilityCardinality-07 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA SimpleLoadBal-PT-05-ReachabilityCardinality-03 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA SimpleLoadBal-PT-05-ReachabilityCardinality-08 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA SimpleLoadBal-PT-05-ReachabilityCardinality-09 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA SimpleLoadBal-PT-05-ReachabilityCardinality-15 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA SimpleLoadBal-PT-05-ReachabilityCardinality-01 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA SimpleLoadBal-PT-05-ReachabilityCardinality-04 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

BK_STOP 1621172726791

--------------------
content from stderr:

lola: MEM LIMIT 32
lola: MEM LIMIT 5
lola: NET
lola: input: PNML file (--pnmlnet)
lola: reading net from /home/mcc/execution/model.pnml
lola: reading pnml
lola: PNML file contains place/transition net
lola: finished parsing
lola: closed net file /home/mcc/execution/model.pnml
lola: Reading formula.
lola: Using XML format (--xmlformula)
lola: reading XML formula
lola: reading formula from /home/mcc/execution/ReachabilityCardinality.xml
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Rule S: 0 transitions removed,0 places removed
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: LAUNCH task # 52 (type EXCL) for 6 SimpleLoadBal-PT-05-ReachabilityCardinality-02
lola: time limit : 179 sec
lola: memory limit: 32 pages
lola: LAUNCH task # 48 (type FNDP) for 6 SimpleLoadBal-PT-05-ReachabilityCardinality-02
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 49 (type EQUN) for 6 SimpleLoadBal-PT-05-ReachabilityCardinality-02
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: LAUNCH task # 51 (type SRCH) for 6 SimpleLoadBal-PT-05-ReachabilityCardinality-02
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-49.sara.
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
sara: place or transition ordering is non-deterministic

lola: FINISHED task # 49 (type EQUN) for SimpleLoadBal-PT-05-ReachabilityCardinality-02
lola: result : false
lola: CANCELED task # 48 (type FNDP) for SimpleLoadBal-PT-05-ReachabilityCardinality-02 (obsolete)
lola: CANCELED task # 51 (type SRCH) for SimpleLoadBal-PT-05-ReachabilityCardinality-02 (obsolete)
lola: CANCELED task # 52 (type EXCL) for SimpleLoadBal-PT-05-ReachabilityCardinality-02 (obsolete)
lola: LAUNCH task # 143 (type EXCL) for 0 SimpleLoadBal-PT-05-ReachabilityCardinality-00
lola: time limit : 239 sec
lola: memory limit: 32 pages
lola: LAUNCH task # 85 (type FNDP) for 39 SimpleLoadBal-PT-05-ReachabilityCardinality-13
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 86 (type EQUN) for 39 SimpleLoadBal-PT-05-ReachabilityCardinality-13
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: LAUNCH task # 90 (type SRCH) for 39 SimpleLoadBal-PT-05-ReachabilityCardinality-13
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 48 (type FNDP) for SimpleLoadBal-PT-05-ReachabilityCardinality-02
lola: result : unknown
lola: fired transitions : 2272
lola: tried executions : 2
lola: time used : 0.000000
lola: memory pages used : 0
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-86.sara.
sara: place or transition ordering is non-deterministic
lola: FINISHED task # 143 (type EXCL) for SimpleLoadBal-PT-05-ReachabilityCardinality-00
lola: result : false
lola: markings : 4061
lola: fired transitions : 8661
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 106 (type EXCL) for 36 SimpleLoadBal-PT-05-ReachabilityCardinality-12
lola: time limit : 257 sec
lola: memory limit: 32 pages

lola: FINISHED task # 106 (type EXCL) for SimpleLoadBal-PT-05-ReachabilityCardinality-12
lola: result : false
lola: markings : 3911
lola: fired transitions : 8735
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 136 (type EXCL) for 42 SimpleLoadBal-PT-05-ReachabilityCardinality-14
lola: time limit : 276 sec
lola: memory limit: 32 pages
lola: FINISHED task # 86 (type EQUN) for SimpleLoadBal-PT-05-ReachabilityCardinality-13
lola: result : false
lola: CANCELED task # 85 (type FNDP) for SimpleLoadBal-PT-05-ReachabilityCardinality-13 (obsolete)
lola: CANCELED task # 90 (type SRCH) for SimpleLoadBal-PT-05-ReachabilityCardinality-13 (obsolete)
lola: LAUNCH task # 89 (type FNDP) for 12 SimpleLoadBal-PT-05-ReachabilityCardinality-04
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 95 (type FNDP) for 21 SimpleLoadBal-PT-05-ReachabilityCardinality-07
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 96 (type EQUN) for 21 SimpleLoadBal-PT-05-ReachabilityCardinality-07
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 85 (type FNDP) for SimpleLoadBal-PT-05-ReachabilityCardinality-13
lola: result : unknown
lola: fired transitions : 11735
lola: tried executions : 2
lola: time used : 0.000000
lola: memory pages used : 0
lola: rewrite Frontend/Parser/formula_rewrite.k:711
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-96.sara.
lola: FINISHED task # 136 (type EXCL) for SimpleLoadBal-PT-05-ReachabilityCardinality-14
lola: result : false
lola: markings : 2972
lola: fired transitions : 7076
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 73 (type EXCL) for 18 SimpleLoadBal-PT-05-ReachabilityCardinality-06
lola: time limit : 327 sec
lola: memory limit: 32 pages
sara: place or transition ordering is non-deterministic
lola: FINISHED task # 73 (type EXCL) for SimpleLoadBal-PT-05-ReachabilityCardinality-06
lola: result : false
lola: markings : 2972
lola: fired transitions : 7081
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 83 (type EXCL) for 15 SimpleLoadBal-PT-05-ReachabilityCardinality-05
lola: time limit : 359 sec
lola: memory limit: 32 pages
lola: FINISHED task # 83 (type EXCL) for SimpleLoadBal-PT-05-ReachabilityCardinality-05
lola: result : false
lola: markings : 4077
lola: fired transitions : 8686
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 113 (type EXCL) for 33 SimpleLoadBal-PT-05-ReachabilityCardinality-11
lola: time limit : 399 sec
lola: memory limit: 32 pages
lola: FINISHED task # 113 (type EXCL) for SimpleLoadBal-PT-05-ReachabilityCardinality-11
lola: result : true
lola: markings : 14
lola: fired transitions : 13
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 70 (type EXCL) for 30 SimpleLoadBal-PT-05-ReachabilityCardinality-10
lola: time limit : 449 sec
lola: memory limit: 32 pages
lola: FINISHED task # 70 (type EXCL) for SimpleLoadBal-PT-05-ReachabilityCardinality-10
lola: result : false
lola: markings : 3512
lola: fired transitions : 8054
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 146 (type EXCL) for 9 SimpleLoadBal-PT-05-ReachabilityCardinality-03
lola: time limit : 514 sec
lola: memory limit: 32 pages

lola: FINISHED task # 96 (type EQUN) for SimpleLoadBal-PT-05-ReachabilityCardinality-07
lola: result : false
lola: CANCELED task # 95 (type FNDP) for SimpleLoadBal-PT-05-ReachabilityCardinality-07 (obsolete)
lola: LAUNCH task # 56 (type FNDP) for 3 SimpleLoadBal-PT-05-ReachabilityCardinality-01
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 58 (type EQUN) for 3 SimpleLoadBal-PT-05-ReachabilityCardinality-01
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 95 (type FNDP) for SimpleLoadBal-PT-05-ReachabilityCardinality-07
lola: result : unknown
lola: fired transitions : 14806
lola: tried executions : 2
lola: time used : 0.000000
lola: memory pages used : 0
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-58.sara.
sara: place or transition ordering is non-deterministic
lola: FINISHED task # 146 (type EXCL) for SimpleLoadBal-PT-05-ReachabilityCardinality-03
lola: result : false
lola: markings : 10729
lola: fired transitions : 21539
lola: time used : 1.000000
lola: memory pages used : 1
lola: LAUNCH task # 126 (type EXCL) for 24 SimpleLoadBal-PT-05-ReachabilityCardinality-08
lola: time limit : 719 sec
lola: memory limit: 32 pages
lola: FINISHED task # 126 (type EXCL) for SimpleLoadBal-PT-05-ReachabilityCardinality-08
lola: result : false
lola: markings : 11795
lola: fired transitions : 22623
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 123 (type EXCL) for 27 SimpleLoadBal-PT-05-ReachabilityCardinality-09
lola: time limit : 899 sec
lola: memory limit: 32 pages
lola: FINISHED task # 123 (type EXCL) for SimpleLoadBal-PT-05-ReachabilityCardinality-09
lola: result : false
lola: markings : 13277
lola: fired transitions : 28093
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 141 (type EXCL) for 45 SimpleLoadBal-PT-05-ReachabilityCardinality-15
lola: time limit : 1199 sec
lola: memory limit: 32 pages
lola: FINISHED task # 141 (type EXCL) for SimpleLoadBal-PT-05-ReachabilityCardinality-15
lola: result : false
lola: markings : 9590
lola: fired transitions : 21410
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 61 (type EXCL) for 3 SimpleLoadBal-PT-05-ReachabilityCardinality-01
lola: time limit : 1799 sec
lola: memory limit: 32 pages
lola: FINISHED task # 61 (type EXCL) for SimpleLoadBal-PT-05-ReachabilityCardinality-01
lola: result : false
lola: markings : 6089
lola: fired transitions : 11637
lola: time used : 0.000000
lola: memory pages used : 1
lola: CANCELED task # 56 (type FNDP) for SimpleLoadBal-PT-05-ReachabilityCardinality-01 (obsolete)
lola: CANCELED task # 58 (type EQUN) for SimpleLoadBal-PT-05-ReachabilityCardinality-01 (obsolete)
lola: LAUNCH task # 118 (type EXCL) for 12 SimpleLoadBal-PT-05-ReachabilityCardinality-04
lola: time limit : 3598 sec
lola: memory limit: 32 pages
lola: LAUNCH task # 103 (type EQUN) for 12 SimpleLoadBal-PT-05-ReachabilityCardinality-04
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 117 (type SRCH) for 12 SimpleLoadBal-PT-05-ReachabilityCardinality-04
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: FINISHED task # 58 (type EQUN) for SimpleLoadBal-PT-05-ReachabilityCardinality-01
lola: result : unknown
lola: FINISHED task # 56 (type FNDP) for SimpleLoadBal-PT-05-ReachabilityCardinality-01
lola: result : unknown
lola: fired transitions : 100400
lola: tried executions : 2
lola: time used : 1.000000
lola: memory pages used : 0
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-103.sara.
sara: place or transition ordering is non-deterministic
lola: FINISHED task # 118 (type EXCL) for SimpleLoadBal-PT-05-ReachabilityCardinality-04
lola: result : false
lola: markings : 4228
lola: fired transitions : 9901
lola: time used : 0.000000
lola: memory pages used : 1
lola: CANCELED task # 89 (type FNDP) for SimpleLoadBal-PT-05-ReachabilityCardinality-04 (obsolete)
lola: CANCELED task # 103 (type EQUN) for SimpleLoadBal-PT-05-ReachabilityCardinality-04 (obsolete)
lola: CANCELED task # 117 (type SRCH) for SimpleLoadBal-PT-05-ReachabilityCardinality-04 (obsolete)
lola: Portfolio finished: no open formulas

FINAL RESULTS
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
SimpleLoadBal-PT-05-ReachabilityCardinality-00: EF false tandem / relaxed
SimpleLoadBal-PT-05-ReachabilityCardinality-01: AG true tandem / relaxed
SimpleLoadBal-PT-05-ReachabilityCardinality-02: EF false state equation
SimpleLoadBal-PT-05-ReachabilityCardinality-03: EF false tandem / relaxed
SimpleLoadBal-PT-05-ReachabilityCardinality-04: AG true tandem / relaxed
SimpleLoadBal-PT-05-ReachabilityCardinality-05: EF false tandem / relaxed
SimpleLoadBal-PT-05-ReachabilityCardinality-06: EF false tandem / relaxed
SimpleLoadBal-PT-05-ReachabilityCardinality-07: EF false state equation
SimpleLoadBal-PT-05-ReachabilityCardinality-08: EF false tandem / relaxed
SimpleLoadBal-PT-05-ReachabilityCardinality-09: EF false tandem / relaxed
SimpleLoadBal-PT-05-ReachabilityCardinality-10: EF false tandem / relaxed
SimpleLoadBal-PT-05-ReachabilityCardinality-11: AG false tandem / relaxed
SimpleLoadBal-PT-05-ReachabilityCardinality-12: AG true tandem / relaxed
SimpleLoadBal-PT-05-ReachabilityCardinality-13: EF false state equation
SimpleLoadBal-PT-05-ReachabilityCardinality-14: AG true tandem / relaxed
SimpleLoadBal-PT-05-ReachabilityCardinality-15: EF false tandem / relaxed


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Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="SimpleLoadBal-PT-05"
export BK_EXAMINATION="ReachabilityCardinality"
export BK_TOOL="lola"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-4028"
echo " Executing tool lola"
echo " Input is SimpleLoadBal-PT-05, examination is ReachabilityCardinality"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r232-smll-162106562600366"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/SimpleLoadBal-PT-05.tgz
mv SimpleLoadBal-PT-05 execution
cd execution
if [ "ReachabilityCardinality" = "ReachabilityDeadlock" ] || [ "ReachabilityCardinality" = "UpperBounds" ] || [ "ReachabilityCardinality" = "QuasiLiveness" ] || [ "ReachabilityCardinality" = "StableMarking" ] || [ "ReachabilityCardinality" = "Liveness" ] || [ "ReachabilityCardinality" = "OneSafe" ] || [ "ReachabilityCardinality" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "ReachabilityCardinality" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "ReachabilityCardinality" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "ReachabilityCardinality.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property ReachabilityCardinality.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "ReachabilityCardinality.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' ReachabilityCardinality.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ "ReachabilityCardinality" = "ReachabilityDeadlock" ] || [ "ReachabilityCardinality" = "QuasiLiveness" ] || [ "ReachabilityCardinality" = "StableMarking" ] || [ "ReachabilityCardinality" = "Liveness" ] || [ "ReachabilityCardinality" = "OneSafe" ] ; then
echo "FORMULA_NAME ReachabilityCardinality"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;