Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/data/fkordon/mcc2021-input.r220-tall-162098211700028.qcow2', fmt=qcow2 size=4294967296 backing_file='/data/fkordon/mcc2021-input.qcow2' encryption=off cluster_size=65536 lazy_refcounts=off
Waiting for the VM to be ready (probing ssh)
.............................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................
=====================================================================
Generated by BenchKit 2-4028
Executing tool lola
Input is SharedMemory-COL-000200, examination is StableMarking
Time confinement is 1800 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r220-tall-162098211700028
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 316K
-rw-r--r-- 1 mcc users 12K May 5 16:58 CTLCardinality.txt
-rw-r--r-- 1 mcc users 98K May 10 09:44 CTLCardinality.xml
-rw-r--r-- 1 mcc users 8.2K May 5 16:58 CTLFireability.txt
-rw-r--r-- 1 mcc users 52K May 10 09:44 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K May 6 14:48 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 3.6K Mar 28 16:35 LTLCardinality.txt
-rw-r--r-- 1 mcc users 24K Mar 28 16:35 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.4K Mar 28 16:35 LTLFireability.txt
-rw-r--r-- 1 mcc users 17K Mar 28 16:35 LTLFireability.xml
-rw-r--r-- 1 mcc users 3.4K Mar 27 11:50 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 15K Mar 27 11:50 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 3.2K Mar 25 17:38 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 16K Mar 25 17:37 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.8K Mar 22 08:16 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.8K Mar 22 08:15 UpperBounds.xml
-rw-r--r-- 1 mcc users 5 May 5 16:52 equiv_pt
-rw-r--r-- 1 mcc users 7 May 5 16:52 instance
-rw-r--r-- 1 mcc users 5 May 5 16:52 iscolored
-rw-r--r-- 1 mcc users 20K May 5 16:52 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

FORMULA_NAME StableMarking

=== Now, execution of the tool begins

BK_START 1621023451843

starting LoLA
BK_INPUT SharedMemory-COL-000200
BK_EXAMINATION: StableMarking
bin directory: /home/mcc/BenchKit/bin
current directory: /home/mcc/execution
GlobalProperty: StableMarking

BK_STOP 1621023505183

--------------------
content from stderr:

lola: MEM LIMIT 32
lola: MEM LIMIT 5
lola: NET
lola: input: PNML file (--pnmlnet)
lola: reading net from /home/mcc/execution/model.pnml
lola: reading pnml
lola: PNML file contains High-Level net
lola: finished parsing
lola: closed net file /home/mcc/execution/model.pnml
lola: Places: 40801, Transitions: 80400
lola: @ trans Begin_Ext_Acc
lola: @ trans Begin_Own_Acc
lola: @ trans Req_Ext_Acc
lola: @ trans End_Own_Acc
lola: @ trans End_Ext_Acc
lola: finished unfolding
lola: REM DEA TR: t = t49043
lola: REM DEA TR: t = t64922
lola: REM DEA TR: t = t80198
lola: REM DEA TR: t = t51656
lola: REM DEA TR: t = t62309
lola: REM DEA TR: t = t76982
lola: REM DEA TR: t = t74369
lola: REM DEA TR: t = t57887
lola: REM DEA TR: t = t68540
lola: REM DEA TR: t = t55274
lola: REM DEA TR: t = t46832
lola: REM DEA TR: t = t44219
lola: REM DEA TR: t = t63716
lola: REM DEA TR: t = t50450
lola: REM DEA TR: t = t61103
lola: REM DEA TR: t = t75776
lola: REM DEA TR: t = t73163
lola: REM DEA TR: t = t69947
lola: REM DEA TR: t = t56681
lola: REM DEA TR: t = t67334
lola: REM DEA TR: t = t54068
lola: REM DEA TR: t = t79394
lola: REM DEA TR: t = t45626
lola: REM DEA TR: t = t43013
lola: REM DEA TR: t = t70952
lola: REM DEA TR: t = t49244
lola: REM DEA TR: t = t51857
lola: REM DEA TR: t = t62510
lola: REM DEA TR: t = t74570
lola: REM DEA TR: t = t68741
lola: REM DEA TR: t = t55475
lola: REM DEA TR: t = t66128
lola: REM DEA TR: t = t78188
lola: REM DEA TR: t = t44420
lola: REM DEA TR: t = t59093
lola: REM DEA TR: t = t80399
lola: REM DEA TR: t = t48038
lola: REM DEA TR: t = t63917
lola: REM DEA TR: t = t50651
lola: REM DEA TR: t = t61304
lola: REM DEA TR: t = t75977
lola: REM DEA TR: t = t73364
lola: REM DEA TR: t = t60098
lola: REM DEA TR: t = t56882
lola: REM DEA TR: t = t67535
lola: REM DEA TR: t = t54269
lola: REM DEA TR: t = t79595
lola: REM DEA TR: t = t45827
lola: REM DEA TR: t = t43214
lola: REM DEA TR: t = t49445
lola: REM DEA TR: t = t62711
lola: REM DEA TR: t = t74771
lola: REM DEA TR: t = t72158
lola: REM DEA TR: t = t68942
lola: REM DEA TR: t = t55676
lola: REM DEA TR: t = t66329
lola: REM DEA TR: t = t53063
lola: REM DEA TR: t = t78389
lola: REM DEA TR: t = t44621
lola: REM DEA TR: t = t42008
lola: REM DEA TR: t = t59294
lola: REM DEA TR: t = t48239
lola: REM DEA TR: t = t50852
lola: REM DEA TR: t = t61505
lola: REM DEA TR: t = t73565
lola: REM DEA TR: t = t67736
lola: REM DEA TR: t = t54470
lola: REM DEA TR: t = t65123
lola: REM DEA TR: t = t79796
lola: REM DEA TR: t = t77183
lola: REM DEA TR: t = t43415
lola: REM DEA TR: t = t58088
lola: REM DEA TR: t = t49646
lola: REM DEA TR: t = t47033
lola: REM DEA TR: t = t62912
lola: REM DEA TR: t = t60299
lola: REM DEA TR: t = t74972
lola: REM DEA TR: t = t72359
lola: REM DEA TR: t = t55877
lola: REM DEA TR: t = t66530
lola: REM DEA TR: t = t53264
lola: REM DEA TR: t = t78590
lola: REM DEA TR: t = t44822
lola: REM DEA TR: t = t42209
lola: REM DEA TR: t = t59495
lola: REM DEA TR: t = t48440
lola: REM DEA TR: t = t61706
lola: REM DEA TR: t = t73766
lola: REM DEA TR: t = t71153
lola: REM DEA TR: t = t67937
lola: REM DEA TR: t = t54671
lola: REM DEA TR: t = t65324
lola: REM DEA TR: t = t79997
lola: REM DEA TR: t = t52058
lola: REM DEA TR: t = t77384
lola: REM DEA TR: t = t43616
lola: REM DEA TR: t = t41003
lola: REM DEA TR: t = t58289
lola: REM DEA TR: t = t49847
lola: REM DEA TR: t = t47234
lola: REM DEA TR: t = t60500
lola: REM DEA TR: t = t72560
lola: REM DEA TR: t = t66731
lola: REM DEA TR: t = t53465
lola: REM DEA TR: t = t64118
lola: REM DEA TR: t = t78791
lola: REM DEA TR: t = t40400
lola: REM DEA TR: t = t76178
lola: REM DEA TR: t = t42410
lola: REM DEA TR: t = t59696
lola: REM DEA TR: t = t57083
lola: REM DEA TR: t = t48641
lola: REM DEA TR: t = t46028
lola: REM DEA TR: t = t61907
lola: REM DEA TR: t = t73967
lola: REM DEA TR: t = t71354
lola: REM DEA TR: t = t54872
lola: REM DEA TR: t = t65525
lola: REM DEA TR: t = t52259
lola: REM DEA TR: t = t77585
lola: REM DEA TR: t = t43817
lola: REM DEA TR: t = t41204
lola: REM DEA TR: t = t58490
lola: REM DEA TR: t = t69143
lola: REM DEA TR: t = t47435
lola: REM DEA TR: t = t60701
lola: REM DEA TR: t = t72761
lola: REM DEA TR: t = t70148
lola: REM DEA TR: t = t66932
lola: REM DEA TR: t = t53666
lola: REM DEA TR: t = t64319
lola: REM DEA TR: t = t78992
lola: REM DEA TR: t = t51053
lola: REM DEA TR: t = t40601
lola: REM DEA TR: t = t76379
lola: REM DEA TR: t = t42611
lola: REM DEA TR: t = t59897
lola: REM DEA TR: t = t57284
lola: REM DEA TR: t = t48842
lola: REM DEA TR: t = t46229
lola: REM DEA TR: t = t71555
lola: REM DEA TR: t = t65726
lola: REM DEA TR: t = t52460
lola: REM DEA TR: t = t63113
lola: REM DEA TR: t = t77786
lola: REM DEA TR: t = t75173
lola: REM DEA TR: t = t41405
lola: REM DEA TR: t = t58691
lola: REM DEA TR: t = t69344
lola: REM DEA TR: t = t56078
lola: REM DEA TR: t = t47636
lola: REM DEA TR: t = t45023
lola: REM DEA TR: t = t60902
lola: REM DEA TR: t = t72962
lola: REM DEA TR: t = t70349
lola: REM DEA TR: t = t53867
lola: REM DEA TR: t = t64520
lola: REM DEA TR: t = t51254
lola: REM DEA TR: t = t40802
lola: REM DEA TR: t = t76580
lola: REM DEA TR: t = t42812
lola: REM DEA TR: t = t57485
lola: REM DEA TR: t = t68138
lola: REM DEA TR: t = t46430
lola: REM DEA TR: t = t71756
lola: REM DEA TR: t = t65927
lola: REM DEA TR: t = t52661
lola: REM DEA TR: t = t63314
lola: REM DEA TR: t = t77987
lola: REM DEA TR: t = t50048
lola: REM DEA TR: t = t75374
lola: REM DEA TR: t = t41606
lola: REM DEA TR: t = t58892
lola: REM DEA TR: t = t69545
lola: REM DEA TR: t = t56279
lola: REM DEA TR: t = t47837
lola: REM DEA TR: t = t45224
lola: REM DEA TR: t = t70550
lola: REM DEA TR: t = t64721
lola: REM DEA TR: t = t51455
lola: REM DEA TR: t = t62108
lola: REM DEA TR: t = t76781
lola: REM DEA TR: t = t74168
lola: REM DEA TR: t = t57686
lola: REM DEA TR: t = t68339
lola: REM DEA TR: t = t55073
lola: REM DEA TR: t = t46631
lola: REM DEA TR: t = t44018
lola: REM DEA TR: t = t71957
lola: REM DEA TR: t = t52862
lola: REM DEA TR: t = t63515
lola: REM DEA TR: t = t50249
lola: REM DEA TR: t = t75575
lola: REM DEA TR: t = t41807
lola: REM DEA TR: t = t69746
lola: REM DEA TR: t = t56480
lola: REM DEA TR: t = t67133
lola: REM DEA TR: t = t79193
lola: REM DEA TR: t = t45425
lola: REM DEA TR: t = t70751
lola: STATE EQUATION TRIES TRANSITION t3210
sara: try reading problem file stateEquationProblem-QuasiLiveness-56641.sara.
lola: reporting
lola: not produced: 80200
lola: reporting
lola: not produced: 80200
lola: reporting
lola: not produced: 80200
lola: reporting
lola: not produced: 80200
lola: reporting
lola: not produced: 80200
lola: reporting
lola: not produced: 80200
lola: reporting
lola: not produced: 80200
lola: reporting
lola: not produced: 80200
lola: STATE EQUATION TRIES TRANSITION t61727
/home/mcc/BenchKit/BenchKit_head.sh: line 62: 407 Killed lola --conf=$BIN_DIR/configfiles/globalconf --check=StableMarking $DIR/model.pnml

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="SharedMemory-COL-000200"
export BK_EXAMINATION="StableMarking"
export BK_TOOL="lola"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="1800"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-4028"
echo " Executing tool lola"
echo " Input is SharedMemory-COL-000200, examination is StableMarking"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r220-tall-162098211700028"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/SharedMemory-COL-000200.tgz
mv SharedMemory-COL-000200 execution
cd execution
if [ "StableMarking" = "ReachabilityDeadlock" ] || [ "StableMarking" = "UpperBounds" ] || [ "StableMarking" = "QuasiLiveness" ] || [ "StableMarking" = "StableMarking" ] || [ "StableMarking" = "Liveness" ] || [ "StableMarking" = "OneSafe" ] || [ "StableMarking" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "StableMarking" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "StableMarking" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "StableMarking.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property StableMarking.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "StableMarking.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' StableMarking.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ "StableMarking" = "ReachabilityDeadlock" ] || [ "StableMarking" = "QuasiLiveness" ] || [ "StableMarking" = "StableMarking" ] || [ "StableMarking" = "Liveness" ] || [ "StableMarking" = "OneSafe" ] ; then
echo "FORMULA_NAME StableMarking"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;