Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/data/fkordon/mcc2021-input.r201-smll-162089458400161.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2021-input.qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
.....................................................................................................................................................................................................................................................................................................
=====================================================================
Generated by BenchKit 2-4028
Executing tool lola
Input is SafeBus-COL-80, examination is ReachabilityDeadlock
Time confinement is 1800 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r201-smll-162089458400161
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 376K
-rw-r--r-- 1 mcc users 14K May 5 16:58 CTLCardinality.txt
-rw-r--r-- 1 mcc users 110K May 10 09:44 CTLCardinality.xml
-rw-r--r-- 1 mcc users 8.8K May 5 16:58 CTLFireability.txt
-rw-r--r-- 1 mcc users 63K May 10 09:44 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K May 6 14:48 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 3.4K Mar 28 16:34 LTLCardinality.txt
-rw-r--r-- 1 mcc users 25K Mar 28 16:34 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.0K Mar 28 16:34 LTLFireability.txt
-rw-r--r-- 1 mcc users 15K Mar 28 16:34 LTLFireability.xml
-rw-r--r-- 1 mcc users 3.1K Mar 27 11:13 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 14K Mar 27 11:13 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 3.0K Mar 25 14:30 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 18K Mar 25 14:30 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.6K Mar 22 08:15 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.6K Mar 22 08:15 UpperBounds.xml
-rw-r--r-- 1 mcc users 5 May 5 16:51 equiv_pt
-rw-r--r-- 1 mcc users 3 May 5 16:51 instance
-rw-r--r-- 1 mcc users 5 May 5 16:51 iscolored
-rw-r--r-- 1 mcc users 45K May 5 16:51 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

FORMULA_NAME ReachabilityDeadlock

=== Now, execution of the tool begins

BK_START 1621002377243

starting LoLA
BK_INPUT SafeBus-COL-80
BK_EXAMINATION: ReachabilityDeadlock
bin directory: /home/mcc/BenchKit/bin
current directory: /home/mcc/execution
GlobalProperty: ReachabilityDeadlock

BK_STOP 1621002774461

--------------------
content from stderr:

lola: MEM LIMIT 32
lola: MEM LIMIT 5
lola: NET
lola: input: PNML file (--pnmlnet)
lola: reading net from /home/mcc/execution/model.pnml
lola: reading pnml
lola: PNML file contains High-Level net
lola: finished parsing
lola: closed net file /home/mcc/execution/model.pnml
lola: TR BINDINGS
lola: TR BINDINGS DONE
lola: Places: 13766, Transitions: 550801
lola: @ trans C_free
lola: @ trans C_refuse
lola: @ trans loss_m
lola: @ trans loss_a
lola: @ trans I_ask1
lola: @ trans I_rec1
lola: @ trans I_reemit
lola: @ trans I_emit
lola: @ trans I_refused
lola: @ trans C_provide
lola: @ trans I_ask2
lola: @ trans I_rec2
lola: @ trans I_free
lola: @ trans Gto
lola: REM DEA TR: t = t520585
lola: REM DEA TR: t = t546265
lola: REM DEA TR: t = t550153
lola: REM DEA TR: t = t524473
lola: REM DEA TR: t = t523177
lola: REM DEA TR: t = t548857
lola: REM DEA TR: t = t521881
lola: REM DEA TR: t = t547561
lola: REM DEA TR: t = t520666
lola: REM DEA TR: t = t546346
lola: REM DEA TR: t = t523258
lola: REM DEA TR: t = t548938
lola: REM DEA TR: t = t521962
lola: REM DEA TR: t = t547642
lola: REM DEA TR: t = t520747
lola: REM DEA TR: t = t546427
lola: REM DEA TR: t = t523339
lola: REM DEA TR: t = t549019
lola: REM DEA TR: t = t522043
lola: REM DEA TR: t = t547723
lola: REM DEA TR: t = t520828
lola: REM DEA TR: t = t546508
lola: REM DEA TR: t = t519532
lola: REM DEA TR: t = t545212
lola: REM DEA TR: t = t523420
lola: REM DEA TR: t = t549100
lola: REM DEA TR: t = t522124
lola: REM DEA TR: t = t547804
lola: REM DEA TR: t = t520909
lola: REM DEA TR: t = t546589
lola: REM DEA TR: t = t519613
lola: REM DEA TR: t = t545293
lola: REM DEA TR: t = t549181
lola: REM DEA TR: t = t523501
lola: REM DEA TR: t = t522205
lola: REM DEA TR: t = t547885
lola: REM DEA TR: t = t520990
lola: REM DEA TR: t = t546670
lola: REM DEA TR: t = t519694
lola: REM DEA TR: t = t545374
lola: REM DEA TR: t = t522286
lola: REM DEA TR: t = t547966
lola: REM DEA TR: t = t550234
lola: REM DEA TR: t = t524554
lola: REM DEA TR: t = t521071
lola: REM DEA TR: t = t546751
lola: REM DEA TR: t = t519775
lola: REM DEA TR: t = t545455
lola: REM DEA TR: t = t548047
lola: REM DEA TR: t = t522367
lola: REM DEA TR: t = t550315
lola: REM DEA TR: t = t524635
lola: REM DEA TR: t = t550396
lola: REM DEA TR: t = t524716
lola: REM DEA TR: t = t521152
lola: REM DEA TR: t = t546832
lola: REM DEA TR: t = t519856
lola: REM DEA TR: t = t545536
lola: REM DEA TR: t = t548128
lola: REM DEA TR: t = t522448
lola: REM DEA TR: t = t550477
lola: REM DEA TR: t = t524797
lola: REM DEA TR: t = t546913
lola: REM DEA TR: t = t521233
lola: REM DEA TR: t = t545617
lola: REM DEA TR: t = t519937
lola: REM DEA TR: t = t544321
lola: REM DEA TR: t = t518641
lola: REM DEA TR: t = t546994
lola: REM DEA TR: t = t521314
lola: REM DEA TR: t = t550558
lola: REM DEA TR: t = t524878
lola: REM DEA TR: t = t549262
lola: REM DEA TR: t = t523582
lola: REM DEA TR: t = t545698
lola: REM DEA TR: t = t520018
lola: REM DEA TR: t = t544402
lola: REM DEA TR: t = t518722
lola: REM DEA TR: t = t547075
lola: REM DEA TR: t = t521395
lola: REM DEA TR: t = t545779
lola: REM DEA TR: t = t520099
lola: REM DEA TR: t = t544483
lola: REM DEA TR: t = t518803
lola: REM DEA TR: t = t550639
lola: REM DEA TR: t = t524959
lola: REM DEA TR: t = t549343
lola: REM DEA TR: t = t523663
lola: REM DEA TR: t = t547156
lola: REM DEA TR: t = t521476
lola: REM DEA TR: t = t545860
lola: REM DEA TR: t = t520180
lola: REM DEA TR: t = t544564
lola: REM DEA TR: t = t518884
lola: REM DEA TR: t = t550720
lola: REM DEA TR: t = t525040
lola: REM DEA TR: t = t549424
lola: REM DEA TR: t = t523744
lola: REM DEA TR: t = t545941
lola: REM DEA TR: t = t520261
lola: REM DEA TR: t = t544645
lola: REM DEA TR: t = t518965
lola: REM DEA TR: t = t549505
lola: REM DEA TR: t = t523825
lola: REM DEA TR: t = t548209
lola: REM DEA TR: t = t522529
lola: REM DEA TR: t = t549586
lola: REM DEA TR: t = t523906
lola: REM DEA TR: t = t548290
lola: REM DEA TR: t = t522610
lola: REM DEA TR: t = t520342
lola: REM DEA TR: t = t546022
lola: REM DEA TR: t = t544726
lola: REM DEA TR: t = t519046
lola: REM DEA TR: t = t549667
lola: REM DEA TR: t = t523987
lola: REM DEA TR: t = t548371
lola: REM DEA TR: t = t522691
lola: REM DEA TR: t = t520423
lola: REM DEA TR: t = t546103
lola: REM DEA TR: t = t544807
lola: REM DEA TR: t = t519127
lola: REM DEA TR: t = t520504
lola: REM DEA TR: t = t546184
lola: REM DEA TR: t = t544888
lola: REM DEA TR: t = t519208
lola: REM DEA TR: t = t524068
lola: REM DEA TR: t = t549748
lola: REM DEA TR: t = t548452
lola: REM DEA TR: t = t522772
lola: REM DEA TR: t = t544969
lola: REM DEA TR: t = t519289
lola: REM DEA TR: t = t524149
lola: REM DEA TR: t = t549829
lola: REM DEA TR: t = t548533
lola: REM DEA TR: t = t522853
lola: REM DEA TR: t = t547237
lola: REM DEA TR: t = t521557
lola: REM DEA TR: t = t519370
lola: REM DEA TR: t = t545050
lola: REM DEA TR: t = t524230
lola: REM DEA TR: t = t549910
lola: REM DEA TR: t = t522934
lola: REM DEA TR: t = t548614
lola: REM DEA TR: t = t521638
lola: REM DEA TR: t = t547318
lola: REM DEA TR: t = t524311
lola: REM DEA TR: t = t549991
lola: REM DEA TR: t = t523015
lola: REM DEA TR: t = t548695
lola: REM DEA TR: t = t519451
lola: REM DEA TR: t = t545131
lola: REM DEA TR: t = t521719
lola: REM DEA TR: t = t547399
lola: REM DEA TR: t = t524392
lola: REM DEA TR: t = t550072
lola: REM DEA TR: t = t523096
lola: REM DEA TR: t = t548776
lola: REM DEA TR: t = t521800
lola: REM DEA TR: t = t547480
/home/mcc/BenchKit/BenchKit_head.sh: line 62: 471 Killed lola --conf=$BIN_DIR/configfiles/globalconf --check=deadlockfreedom $DIR/model.pnml

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="SafeBus-COL-80"
export BK_EXAMINATION="ReachabilityDeadlock"
export BK_TOOL="lola"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="1800"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-4028"
echo " Executing tool lola"
echo " Input is SafeBus-COL-80, examination is ReachabilityDeadlock"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r201-smll-162089458400161"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/SafeBus-COL-80.tgz
mv SafeBus-COL-80 execution
cd execution
if [ "ReachabilityDeadlock" = "ReachabilityDeadlock" ] || [ "ReachabilityDeadlock" = "UpperBounds" ] || [ "ReachabilityDeadlock" = "QuasiLiveness" ] || [ "ReachabilityDeadlock" = "StableMarking" ] || [ "ReachabilityDeadlock" = "Liveness" ] || [ "ReachabilityDeadlock" = "OneSafe" ] || [ "ReachabilityDeadlock" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "ReachabilityDeadlock" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "ReachabilityDeadlock" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "ReachabilityDeadlock.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property ReachabilityDeadlock.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "ReachabilityDeadlock.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' ReachabilityDeadlock.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ "ReachabilityDeadlock" = "ReachabilityDeadlock" ] || [ "ReachabilityDeadlock" = "QuasiLiveness" ] || [ "ReachabilityDeadlock" = "StableMarking" ] || [ "ReachabilityDeadlock" = "Liveness" ] || [ "ReachabilityDeadlock" = "OneSafe" ] ; then
echo "FORMULA_NAME ReachabilityDeadlock"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;