Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/data/fkordon/mcc2021-input.r197-smll-162089452200306.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2021-input.qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
.................................................................................................................................................................................................................................................................................................................................................................................................................................
=====================================================================
Generated by BenchKit 2-4028
Executing tool itstools
Input is SatelliteMemory-PT-X00100Y0003, examination is CTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r197-smll-162089452200306
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 316K
-rw-r--r-- 1 mcc users 8.5K May 5 16:58 CTLCardinality.txt
-rw-r--r-- 1 mcc users 83K May 10 09:44 CTLCardinality.xml
-rw-r--r-- 1 mcc users 7.3K May 5 16:58 CTLFireability.txt
-rw-r--r-- 1 mcc users 71K May 10 09:44 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K May 6 14:48 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 7.2K May 6 14:48 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 3.4K Mar 28 16:34 LTLCardinality.txt
-rw-r--r-- 1 mcc users 24K Mar 28 16:34 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.1K Mar 28 16:34 LTLFireability.txt
-rw-r--r-- 1 mcc users 18K Mar 28 16:34 LTLFireability.xml
-rw-r--r-- 1 mcc users 3.4K Mar 27 11:13 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 16K Mar 27 11:13 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 2.9K Mar 25 14:31 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 18K Mar 25 14:31 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.8K Mar 22 08:15 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.8K Mar 22 08:15 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 May 5 16:52 equiv_col
-rw-r--r-- 1 mcc users 12 May 5 16:52 instance
-rw-r--r-- 1 mcc users 6 May 5 16:52 iscolored
-rwxr-xr-x 1 mcc users 5.5K May 5 16:52 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME SatelliteMemory-PT-X00100Y0003-CTLFireability-00
FORMULA_NAME SatelliteMemory-PT-X00100Y0003-CTLFireability-01
FORMULA_NAME SatelliteMemory-PT-X00100Y0003-CTLFireability-02
FORMULA_NAME SatelliteMemory-PT-X00100Y0003-CTLFireability-03
FORMULA_NAME SatelliteMemory-PT-X00100Y0003-CTLFireability-04
FORMULA_NAME SatelliteMemory-PT-X00100Y0003-CTLFireability-05
FORMULA_NAME SatelliteMemory-PT-X00100Y0003-CTLFireability-06
FORMULA_NAME SatelliteMemory-PT-X00100Y0003-CTLFireability-07
FORMULA_NAME SatelliteMemory-PT-X00100Y0003-CTLFireability-08
FORMULA_NAME SatelliteMemory-PT-X00100Y0003-CTLFireability-09
FORMULA_NAME SatelliteMemory-PT-X00100Y0003-CTLFireability-10
FORMULA_NAME SatelliteMemory-PT-X00100Y0003-CTLFireability-11
FORMULA_NAME SatelliteMemory-PT-X00100Y0003-CTLFireability-12
FORMULA_NAME SatelliteMemory-PT-X00100Y0003-CTLFireability-13
FORMULA_NAME SatelliteMemory-PT-X00100Y0003-CTLFireability-14
FORMULA_NAME SatelliteMemory-PT-X00100Y0003-CTLFireability-15

=== Now, execution of the tool begins

BK_START 1621112254212

Running Version 0
[2021-05-15 20:57:37] [INFO ] Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, CTLFireability, -spotpath, /home/mcc/BenchKit/bin//..//ltlfilt, -z3path, /home/mcc/BenchKit/bin//..//z3/bin/z3, -yices2path, /home/mcc/BenchKit/bin//..//yices/bin/yices, -its, -ltsmin, -greatspnpath, /home/mcc/BenchKit/bin//..//greatspn/, -order, META, -manyOrder, -smt, -timeout, 3600]
[2021-05-15 20:57:37] [INFO ] Parsing pnml file : /home/mcc/execution/model.pnml
[2021-05-15 20:57:38] [INFO ] Load time of PNML (sax parser for PT used): 64 ms
[2021-05-15 20:57:38] [INFO ] Transformed 13 places.
[2021-05-15 20:57:38] [INFO ] Transformed 10 transitions.
[2021-05-15 20:57:38] [INFO ] Parsed PT model containing 13 places and 10 transitions in 143 ms.
Parsed 16 properties from file /home/mcc/execution/CTLFireability.xml in 38 ms.
Reduce places removed 1 places and 0 transitions.
Support contains 12 out of 12 places. Attempting structural reductions.
Starting structural reductions, iteration 0 : 12/12 places, 10/10 transitions.
Applied a total of 0 rules in 21 ms. Remains 12 /12 variables (removed 0) and now considering 10/10 (removed 0) transitions.
// Phase 1: matrix 10 rows 12 cols
[2021-05-15 20:57:38] [INFO ] Computed 6 place invariants in 12 ms
[2021-05-15 20:57:38] [INFO ] Dead Transitions using invariants and state equation in 211 ms returned []
// Phase 1: matrix 10 rows 12 cols
[2021-05-15 20:57:38] [INFO ] Computed 6 place invariants in 1 ms
[2021-05-15 20:57:38] [INFO ] Implicit Places using invariants in 41 ms returned []
// Phase 1: matrix 10 rows 12 cols
[2021-05-15 20:57:38] [INFO ] Computed 6 place invariants in 3 ms
[2021-05-15 20:57:38] [INFO ] State equation strengthened by 1 read => feed constraints.
[2021-05-15 20:57:38] [INFO ] Implicit Places using invariants and state equation in 75 ms returned []
Implicit Place search using SMT with State Equation took 120 ms to find 0 implicit places.
// Phase 1: matrix 10 rows 12 cols
[2021-05-15 20:57:38] [INFO ] Computed 6 place invariants in 1 ms
[2021-05-15 20:57:38] [INFO ] Dead Transitions using invariants and state equation in 35 ms returned []
Finished structural reductions, in 1 iterations. Remains : 12/12 places, 10/10 transitions.
[2021-05-15 20:57:39] [INFO ] Flatten gal took : 49 ms
[2021-05-15 20:57:39] [INFO ] Flatten gal took : 17 ms
[2021-05-15 20:57:39] [INFO ] Input system was already deterministic with 10 transitions.
Incomplete random walk after 100000 steps, including 2 resets, run finished after 1492 ms. (steps per millisecond=67 ) properties (out of 73) seen :42
Running SMT prover for 31 properties.
// Phase 1: matrix 10 rows 12 cols
[2021-05-15 20:57:40] [INFO ] Computed 6 place invariants in 3 ms
[2021-05-15 20:57:40] [INFO ] [Real]Absence check using 6 positive place invariants in 3 ms returned sat
[2021-05-15 20:57:40] [INFO ] SMT Verify possible in real domain returnedunsat :1 sat :0 real:30
[2021-05-15 20:57:41] [INFO ] [Nat]Absence check using 6 positive place invariants in 2 ms returned sat
[2021-05-15 20:57:41] [INFO ] SMT Verify possible in nat domain returned unsat :30 sat :1
Successfully simplified 31 atomic propositions for a total of 16 simplifications.
[2021-05-15 20:57:41] [INFO ] Initial state test concluded for 2 properties.
FORMULA SatelliteMemory-PT-X00100Y0003-CTLFireability-09 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA SatelliteMemory-PT-X00100Y0003-CTLFireability-12 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
Applied a total of 0 rules in 11 ms. Remains 12 /12 variables (removed 0) and now considering 10/10 (removed 0) transitions.
[2021-05-15 20:57:41] [INFO ] Initial state reduction rules for CTL removed 1 formulas.
[2021-05-15 20:57:41] [INFO ] Flatten gal took : 4 ms
FORMULA SatelliteMemory-PT-X00100Y0003-CTLFireability-03 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
[2021-05-15 20:57:41] [INFO ] Flatten gal took : 3 ms
[2021-05-15 20:57:41] [INFO ] Input system was already deterministic with 10 transitions.
Graph (trivial) has 2 edges and 12 vertex of which 2 / 12 are part of one of the 1 SCC in 2 ms
Free SCC test removed 1 places
Ensure Unique test removed 1 transitions
Reduce isomorphic transitions removed 1 transitions.
Reduce places removed 1 places and 0 transitions.
Applied a total of 1 rules in 10 ms. Remains 10 /12 variables (removed 2) and now considering 9/10 (removed 1) transitions.
[2021-05-15 20:57:41] [INFO ] Initial state reduction rules for CTL removed 1 formulas.
[2021-05-15 20:57:41] [INFO ] Flatten gal took : 4 ms
FORMULA SatelliteMemory-PT-X00100Y0003-CTLFireability-10 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
[2021-05-15 20:57:41] [INFO ] Flatten gal took : 3 ms
[2021-05-15 20:57:41] [INFO ] Input system was already deterministic with 9 transitions.
Applied a total of 0 rules in 1 ms. Remains 12 /12 variables (removed 0) and now considering 10/10 (removed 0) transitions.
[2021-05-15 20:57:41] [INFO ] Flatten gal took : 3 ms
[2021-05-15 20:57:41] [INFO ] Flatten gal took : 4 ms
[2021-05-15 20:57:41] [INFO ] Input system was already deterministic with 10 transitions.
[2021-05-15 20:57:41] [INFO ] Flatten gal took : 4 ms
[2021-05-15 20:57:41] [INFO ] Flatten gal took : 4 ms
[2021-05-15 20:57:41] [INFO ] Time to serialize gal into /tmp/CTLFireability5697194293276322854.gal : 3 ms
[2021-05-15 20:57:41] [INFO ] Time to serialize properties into /tmp/CTLFireability2814674485053117998.ctl : 4 ms
Invoking ITS tools like this :CommandLine [args=[/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.202104292328/bin/its-ctl-linux64, --gc-threshold, 2000000, --quiet, -i, /tmp/CTLFireability5697194293276322854.gal, -t, CGAL, -ctl, /tmp/CTLFireability2814674485053117998.ctl, --gen-order, FOLLOW], workingDir=/home/mcc/execution]

its-ctl command run as :

/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.202104292328/bin/its-ctl-linux64 --gc-threshold 2000000 --quiet -i /tmp/CTLFireability5697194293276322854.gal -t CGAL -ctl /tmp/CTLFireability2814674485053117998.ctl --gen-order FOLLOW
No direction supplied, using forward translation only.
Parsed 1 CTL formulae.
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
reachable,76358,0.634328,14900,2,10808,5,54113,6,0,73,71415,0


Converting to forward existential form...Done !
original formula: AG(EF((EG(((EF(((((((p12>=94)&&(p4>=6))||((p12>=1)&&(p7>=1)))||(((p2>=1)&&(p4>=1))&&(p6>=1)))||(p5>=1))||(p9>=100))) * (((((((((((p12>=94)&&(p4>=6))||(p3>=100))||(p11>=1))||((p12>=1)&&(p7>=1)))||(((p2>=1)&&(p4>=1))&&(p6>=1)))||(p5>=1))||((p12>=94)&&(p3>=94)))||(p9>=100))||((p1>=1)&&(p6>=1)))||((((p10>=1)&&(p12>=1))&&(p5>=1))&&(p8>=1)))) * ((((p3>=100)||(p11>=1))||((p12>=1)&&(p7>=1)))||(p9>=100)))) * E((((((((((((((((((p12>=94)&&(p4>=6))||(p11>=1))||(p3>=100))||(p5>=1))||((((p10>=1)&&(p12>=1))&&(p5>=1))&&(p8>=1)))||((p12>=94)&&(p4>=6)))||((p12>=1)&&(p7>=1)))||(p3>=100))||(((p2>=1)&&(p4>=1))&&(p6>=1)))||(p5>=1))||((p12>=94)&&(p3>=94)))||((p1>=1)&&(p6>=1)))||(p9>=100))||((((p10>=1)&&(p12>=1))&&(p5>=1))&&(p8>=1)))&&((((((((p12>=94)&&(p4>=6))||(p3>=100))||(((p2>=1)&&(p4>=1))&&(p6>=1)))||(p5>=1))||(p9>=100))||((p1>=1)&&(p6>=1)))||((((p10>=1)&&(p12>=1))&&(p5>=1))&&(p8>=1))))&&(p3>=100)) U !(E((((((((p12>=94)&&(p4>=6))||(p3>=100))||(((p2>=1)&&(p4>=1))&&(p6>=1)))||(p5>=1))||((p12>=94)&&(p3>=94)))||(p9>=100)) U ((((((p12>=1)&&(p7>=1))||(((p2>=1)&&(p4>=1))&&(p6>=1)))||((p12>=94)&&(p3>=94)))||((p1>=1)&&(p6>=1)))||((((p10>=1)&&(p12>=1))&&(p5>=1))&&(p8>=1)))))))))
=> equivalent forward existential formula: [(FwdU(Init,TRUE) * !(E(TRUE U (EG(((E(TRUE U ((((((p12>=94)&&(p4>=6))||((p12>=1)&&(p7>=1)))||(((p2>=1)&&(p4>=1))&&(p6>=1)))||(p5>=1))||(p9>=100))) * (((((((((((p12>=94)&&(p4>=6))||(p3>=100))||(p11>=1))||((p12>=1)&&(p7>=1)))||(((p2>=1)&&(p4>=1))&&(p6>=1)))||(p5>=1))||((p12>=94)&&(p3>=94)))||(p9>=100))||((p1>=1)&&(p6>=1)))||((((p10>=1)&&(p12>=1))&&(p5>=1))&&(p8>=1)))) * ((((p3>=100)||(p11>=1))||((p12>=1)&&(p7>=1)))||(p9>=100)))) * E((((((((((((((((((p12>=94)&&(p4>=6))||(p11>=1))||(p3>=100))||(p5>=1))||((((p10>=1)&&(p12>=1))&&(p5>=1))&&(p8>=1)))||((p12>=94)&&(p4>=6)))||((p12>=1)&&(p7>=1)))||(p3>=100))||(((p2>=1)&&(p4>=1))&&(p6>=1)))||(p5>=1))||((p12>=94)&&(p3>=94)))||((p1>=1)&&(p6>=1)))||(p9>=100))||((((p10>=1)&&(p12>=1))&&(p5>=1))&&(p8>=1)))&&((((((((p12>=94)&&(p4>=6))||(p3>=100))||(((p2>=1)&&(p4>=1))&&(p6>=1)))||(p5>=1))||(p9>=100))||((p1>=1)&&(p6>=1)))||((((p10>=1)&&(p12>=1))&&(p5>=1))&&(p8>=1))))&&(p3>=100)) U !(E((((((((p12>=94)&&(p4>=6))||(p3>=100))||(((p2>=1)&&(p4>=1))&&(p6>=1)))||(p5>=1))||((p12>=94)&&(p3>=94)))||(p9>=100)) U ((((((p12>=1)&&(p7>=1))||(((p2>=1)&&(p4>=1))&&(p6>=1)))||((p12>=94)&&(p3>=94)))||((p1>=1)&&(p6>=1)))||((((p10>=1)&&(p12>=1))&&(p5>=1))&&(p8>=1))))))))))] = FALSE
Reverse transition relation is NOT exact ! Due to transitions t0, t5, t7, Intersection with reachable at each step enabled. (destroyed/reverse/intersect/total) :0/7/3/10
(forward)formula 0,0,1.94317,33160,1,0,33,101074,48,17,1293,150131,36
FORMULA SatelliteMemory-PT-X00100Y0003-CTLFireability-13 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL
Formula is FALSE !

***************************************

Applied a total of 0 rules in 1 ms. Remains 12 /12 variables (removed 0) and now considering 10/10 (removed 0) transitions.
[2021-05-15 20:57:43] [INFO ] Flatten gal took : 2 ms
[2021-05-15 20:57:43] [INFO ] Flatten gal took : 2 ms
[2021-05-15 20:57:43] [INFO ] Input system was already deterministic with 10 transitions.
[2021-05-15 20:57:43] [INFO ] Flatten gal took : 2 ms
[2021-05-15 20:57:43] [INFO ] Flatten gal took : 14 ms
[2021-05-15 20:57:43] [INFO ] Time to serialize gal into /tmp/CTLFireability6456175295905702727.gal : 1 ms
[2021-05-15 20:57:43] [INFO ] Time to serialize properties into /tmp/CTLFireability16762097306740390004.ctl : 1 ms
Invoking ITS tools like this :CommandLine [args=[/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.202104292328/bin/its-ctl-linux64, --gc-threshold, 2000000, --quiet, -i, /tmp/CTLFireability6456175295905702727.gal, -t, CGAL, -ctl, /tmp/CTLFireability16762097306740390004.ctl, --gen-order, FOLLOW], workingDir=/home/mcc/execution]

its-ctl command run as :

/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.202104292328/bin/its-ctl-linux64 --gc-threshold 2000000 --quiet -i /tmp/CTLFireability6456175295905702727.gal -t CGAL -ctl /tmp/CTLFireability16762097306740390004.ctl --gen-order FOLLOW
No direction supplied, using forward translation only.
Parsed 1 CTL formulae.
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
reachable,76358,0.52741,14868,2,10808,5,54113,6,0,73,71415,0


Converting to forward existential form...Done !
original formula: AG(AF(((((p5>=1)||(p9>=100))||((p12>=94)&&(p4>=6)))||((p12>=1)&&(p7>=1)))))
=> equivalent forward existential formula: [FwdG(FwdU(Init,TRUE),!(((((p5>=1)||(p9>=100))||((p12>=94)&&(p4>=6)))||((p12>=1)&&(p7>=1)))))] = FALSE
Hit Full ! (commute/partial/dont) 0/21/10
(forward)formula 0,0,5.81135,105452,1,0,8,419787,20,1,1244,377481,8
FORMULA SatelliteMemory-PT-X00100Y0003-CTLFireability-14 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL
Formula is FALSE !

***************************************

Graph (trivial) has 2 edges and 12 vertex of which 2 / 12 are part of one of the 1 SCC in 1 ms
Free SCC test removed 1 places
Ensure Unique test removed 1 transitions
Reduce isomorphic transitions removed 1 transitions.
Reduce places removed 1 places and 0 transitions.
Applied a total of 1 rules in 2 ms. Remains 10 /12 variables (removed 2) and now considering 9/10 (removed 1) transitions.
[2021-05-15 20:57:49] [INFO ] Flatten gal took : 1 ms
[2021-05-15 20:57:49] [INFO ] Flatten gal took : 1 ms
[2021-05-15 20:57:49] [INFO ] Input system was already deterministic with 9 transitions.
[2021-05-15 20:57:49] [INFO ] Flatten gal took : 1 ms
[2021-05-15 20:57:49] [INFO ] Flatten gal took : 1 ms
[2021-05-15 20:57:49] [INFO ] Time to serialize gal into /tmp/CTLFireability6371368746865407037.gal : 4 ms
[2021-05-15 20:57:49] [INFO ] Time to serialize properties into /tmp/CTLFireability13739078567086124677.ctl : 0 ms
Invoking ITS tools like this :CommandLine [args=[/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.202104292328/bin/its-ctl-linux64, --gc-threshold, 2000000, --quiet, -i, /tmp/CTLFireability6371368746865407037.gal, -t, CGAL, -ctl, /tmp/CTLFireability13739078567086124677.ctl, --gen-order, FOLLOW], workingDir=/home/mcc/execution]

its-ctl command run as :

/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.202104292328/bin/its-ctl-linux64 --gc-threshold 2000000 --quiet -i /tmp/CTLFireability6371368746865407037.gal -t CGAL -ctl /tmp/CTLFireability13739078567086124677.ctl --gen-order FOLLOW
No direction supplied, using forward translation only.
Parsed 1 CTL formulae.
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
reachable,38179,0.414092,14628,2,10508,5,52707,5,0,62,70213,0


Converting to forward existential form...Done !
original formula: AF(((p12>=94)&&(p3>=94)))
=> equivalent forward existential formula: [FwdG(Init,!(((p12>=94)&&(p3>=94))))] = FALSE
Hit Full ! (commute/partial/dont) 2/0/7
(forward)formula 0,0,8.00271,118860,1,0,8,363529,19,2,1180,369475,8
FORMULA SatelliteMemory-PT-X00100Y0003-CTLFireability-15 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL
Formula is FALSE !

***************************************

[2021-05-15 20:57:57] [INFO ] Initial state reduction rules for CTL removed 2 formulas.
[2021-05-15 20:57:57] [INFO ] Flatten gal took : 4 ms
[2021-05-15 20:57:57] [INFO ] Initial state reduction rules for CTL removed 1 formulas.
FORMULA SatelliteMemory-PT-X00100Y0003-CTLFireability-11 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA SatelliteMemory-PT-X00100Y0003-CTLFireability-05 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA SatelliteMemory-PT-X00100Y0003-CTLFireability-00 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
[2021-05-15 20:57:57] [INFO ] Flatten gal took : 3 ms
[2021-05-15 20:57:57] [INFO ] Applying decomposition
[2021-05-15 20:57:57] [INFO ] Flatten gal took : 2 ms
Converted graph to binary with : CommandLine [args=[/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.louvain.binaries_1.0.0.202104292328/bin/convert-linux64, -i, /tmp/graph8605769115706549386.txt, -o, /tmp/graph8605769115706549386.bin, -w, /tmp/graph8605769115706549386.weights], workingDir=null]
Built communities with : CommandLine [args=[/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.louvain.binaries_1.0.0.202104292328/bin/louvain-linux64, /tmp/graph8605769115706549386.bin, -l, -1, -v, -w, /tmp/graph8605769115706549386.weights, -q, 0, -e, 0.001], workingDir=null]
[2021-05-15 20:57:57] [INFO ] Decomposing Gal with order
[2021-05-15 20:57:57] [INFO ] Rewriting arrays to variables to allow decomposition.
[2021-05-15 20:57:57] [INFO ] Removed a total of 1 redundant transitions.
[2021-05-15 20:57:57] [INFO ] Flatten gal took : 69 ms
[2021-05-15 20:57:57] [INFO ] Fuse similar labels procedure discarded/fused a total of 2 labels/synchronizations in 3 ms.
[2021-05-15 20:57:57] [INFO ] Time to serialize gal into /tmp/CTLFireability17012142454576364818.gal : 2 ms
[2021-05-15 20:57:57] [INFO ] Time to serialize properties into /tmp/CTLFireability323276921022495543.ctl : 3 ms
Invoking ITS tools like this :CommandLine [args=[/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.202104292328/bin/its-ctl-linux64, --gc-threshold, 2000000, --quiet, -i, /tmp/CTLFireability17012142454576364818.gal, -t, CGAL, -ctl, /tmp/CTLFireability323276921022495543.ctl], workingDir=/home/mcc/execution]

its-ctl command run as :

/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.202104292328/bin/its-ctl-linux64 --gc-threshold 2000000 --quiet -i /tmp/CTLFireability17012142454576364818.gal -t CGAL -ctl /tmp/CTLFireability323276921022495543.ctl
No direction supplied, using forward translation only.
Parsed 6 CTL formulae.
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
reachable,76358,2.43529,24296,1003,400,15940,1173,57,64092,35,15522,0


Converting to forward existential form...Done !
original formula: EX((!(AF(((u3.p11>=1)||(i0.u2.p3>=100)))) + (!(EF(((u3.p11>=1)||((i0.u1.p1>=1)&&(i0.u4.p6>=1))))) * (((i0.u4.p12>=1)&&(i2.u5.p7>=1)) + EF((((((((i0.u4.p12>=1)&&(i2.u5.p7>=1))||(((i0.u1.p2>=1)&&(i0.u2.p4>=1))&&(i0.u4.p6>=1)))||(u3.p5>=1))||(i2.u0.p9>=100))||((i0.u1.p1>=1)&&(i0.u4.p6>=1)))||((((i2.u0.p10>=1)&&(i0.u4.p12>=1))&&(u3.p5>=1))&&(i2.u5.p8>=1))))))))
=> equivalent forward existential formula: ([FwdG(EY(Init),!(((u3.p11>=1)||(i0.u2.p3>=100))))] != FALSE + ([((EY(Init) * !(E(TRUE U ((u3.p11>=1)||((i0.u1.p1>=1)&&(i0.u4.p6>=1)))))) * ((i0.u4.p12>=1)&&(i2.u5.p7>=1)))] != FALSE + [(FwdU((EY(Init) * !(E(TRUE U ((u3.p11>=1)||((i0.u1.p1>=1)&&(i0.u4.p6>=1)))))),TRUE) * (((((((i0.u4.p12>=1)&&(i2.u5.p7>=1))||(((i0.u1.p2>=1)&&(i0.u2.p4>=1))&&(i0.u4.p6>=1)))||(u3.p5>=1))||(i2.u0.p9>=100))||((i0.u1.p1>=1)&&(i0.u4.p6>=1)))||((((i2.u0.p10>=1)&&(i0.u4.p12>=1))&&(u3.p5>=1))&&(i2.u5.p8>=1))))] != FALSE))
Fast SCC detection found an SCC at level 1
Fast SCC detection found an SCC at level 2
(forward)formula 0,1,12.3157,85072,1,0,69254,23207,160,180275,509,77741,56358
FORMULA SatelliteMemory-PT-X00100Y0003-CTLFireability-01 TRUE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL USE_NUPN
Formula is TRUE !

***************************************

original formula: (AG(AX(EG(TRUE))) + EG(((i0.u2.p3>=100)||(u3.p11>=1))))
=> equivalent forward existential formula: [(EY(FwdU((Init * !(EG(((i0.u2.p3>=100)||(u3.p11>=1))))),TRUE)) * !(EG(TRUE)))] = FALSE
Reverse transition relation is NOT exact ! Due to transitions t7, i0.t0, Intersection with reachable at each step enabled. (destroyed/reverse/intersect/total) :0/7/2/9
(forward)formula 1,1,13.3895,87184,1,0,71500,23590,213,186017,523,78313,59115
FORMULA SatelliteMemory-PT-X00100Y0003-CTLFireability-02 TRUE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL USE_NUPN
Formula is TRUE !

***************************************

original formula: AG(EX(TRUE))
=> equivalent forward existential formula: [(FwdU(Init,TRUE) * !(EX(TRUE)))] = FALSE
(forward)formula 2,1,13.3895,87184,1,0,71500,23590,213,186017,523,78313,59115
FORMULA SatelliteMemory-PT-X00100Y0003-CTLFireability-04 TRUE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL USE_NUPN
Formula is TRUE !

***************************************

original formula: (E(EF((((((i0.u1.p2<1)||(i0.u2.p4<1))||(i0.u4.p6<1))&&((i0.u4.p12<94)||(i0.u2.p3<94))) + AX(((i0.u2.p3<100)&&(u3.p5<1))))) U AG(((((((((i0.u4.p12>=94)&&(i0.u2.p4>=6))||((i0.u4.p12>=94)&&(i0.u2.p3>=94)))||((((i2.u0.p10>=1)&&(i0.u4.p12>=1))&&(u3.p5>=1))&&(i2.u5.p8>=1)))||((i0.u4.p12>=94)&&(i0.u2.p4>=6)))||(u3.p5>=1))||((i0.u1.p1>=1)&&(i0.u4.p6>=1)))||((((i2.u0.p10>=1)&&(i0.u4.p12>=1))&&(u3.p5>=1))&&(i2.u5.p8>=1))))) * AF(EX(EF((((((((((i0.u4.p12>=94)&&(i0.u2.p4>=6))||(((i0.u1.p2>=1)&&(i0.u2.p4>=1))&&(i0.u4.p6>=1)))||((i0.u4.p12>=94)&&(i0.u2.p3>=94)))||(i2.u0.p9>=100))||((((i2.u0.p10>=1)&&(i0.u4.p12>=1))&&(u3.p5>=1))&&(i2.u5.p8>=1)))&&(((u3.p11>=1)||(((i0.u1.p2>=1)&&(i0.u2.p4>=1))&&(i0.u4.p6>=1)))||((((i2.u0.p10>=1)&&(i0.u4.p12>=1))&&(u3.p5>=1))&&(i2.u5.p8>=1))))&&((i0.u4.p12<94)||(i0.u2.p4<6)))&&(i0.u2.p3<100))))))
=> equivalent forward existential formula: ([(Init * !(E(E(TRUE U (((((i0.u1.p2<1)||(i0.u2.p4<1))||(i0.u4.p6<1))&&((i0.u4.p12<94)||(i0.u2.p3<94))) + !(EX(!(((i0.u2.p3<100)&&(u3.p5<1))))))) U !(E(TRUE U !(((((((((i0.u4.p12>=94)&&(i0.u2.p4>=6))||((i0.u4.p12>=94)&&(i0.u2.p3>=94)))||((((i2.u0.p10>=1)&&(i0.u4.p12>=1))&&(u3.p5>=1))&&(i2.u5.p8>=1)))||((i0.u4.p12>=94)&&(i0.u2.p4>=6)))||(u3.p5>=1))||((i0.u1.p1>=1)&&(i0.u4.p6>=1)))||((((i2.u0.p10>=1)&&(i0.u4.p12>=1))&&(u3.p5>=1))&&(i2.u5.p8>=1)))))))))] = FALSE * [FwdG(Init,!(EX(E(TRUE U (((((((((i0.u4.p12>=94)&&(i0.u2.p4>=6))||(((i0.u1.p2>=1)&&(i0.u2.p4>=1))&&(i0.u4.p6>=1)))||((i0.u4.p12>=94)&&(i0.u2.p3>=94)))||(i2.u0.p9>=100))||((((i2.u0.p10>=1)&&(i0.u4.p12>=1))&&(u3.p5>=1))&&(i2.u5.p8>=1)))&&(((u3.p11>=1)||(((i0.u1.p2>=1)&&(i0.u2.p4>=1))&&(i0.u4.p6>=1)))||((((i2.u0.p10>=1)&&(i0.u4.p12>=1))&&(u3.p5>=1))&&(i2.u5.p8>=1))))&&((i0.u4.p12<94)||(i0.u2.p4<6)))&&(i0.u2.p3<100))))))] = FALSE)
(forward)formula 3,0,18.703,109624,1,0,97620,27904,356,199891,532,86935,80174
FORMULA SatelliteMemory-PT-X00100Y0003-CTLFireability-06 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL USE_NUPN
Formula is FALSE !

***************************************

original formula: EG(EX(((i0.u2.p3<100)&&((((((u3.p11>=1)||(i0.u2.p3>=100))||(u3.p5>=1))||(i2.u0.p9>=100))||((i0.u4.p12>=94)&&(i0.u2.p4>=6)))||(((i0.u1.p2>=1)&&(i0.u2.p4>=1))&&(i0.u4.p6>=1))))))
=> equivalent forward existential formula: [FwdG(Init,EX(((i0.u2.p3<100)&&((((((u3.p11>=1)||(i0.u2.p3>=100))||(u3.p5>=1))||(i2.u0.p9>=100))||((i0.u4.p12>=94)&&(i0.u2.p4>=6)))||(((i0.u1.p2>=1)&&(i0.u2.p4>=1))&&(i0.u4.p6>=1))))))] != FALSE
(forward)formula 4,1,21.9854,122560,1,0,104604,32009,390,209527,534,95141,88060
FORMULA SatelliteMemory-PT-X00100Y0003-CTLFireability-07 TRUE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL USE_NUPN
Formula is TRUE !

***************************************

original formula: AG(EX((((((((i0.u4.p12>=94)&&(i0.u2.p4>=6))||(i0.u2.p3>=100))||(((i0.u1.p2>=1)&&(i0.u2.p4>=1))&&(i0.u4.p6>=1)))||(i2.u0.p9>=100)) * EX(((((((i0.u4.p12>=94)&&(i0.u2.p4>=6))||(u3.p11>=1))||(((i0.u1.p2>=1)&&(i0.u2.p4>=1))&&(i0.u4.p6>=1)))||(i2.u0.p9>=100))||((i0.u1.p1>=1)&&(i0.u4.p6>=1))))) * ((i0.u1.p1<1)||(i0.u4.p6<1)))))
=> equivalent forward existential formula: [(FwdU(Init,TRUE) * !(EX((((((((i0.u4.p12>=94)&&(i0.u2.p4>=6))||(i0.u2.p3>=100))||(((i0.u1.p2>=1)&&(i0.u2.p4>=1))&&(i0.u4.p6>=1)))||(i2.u0.p9>=100)) * EX(((((((i0.u4.p12>=94)&&(i0.u2.p4>=6))||(u3.p11>=1))||(((i0.u1.p2>=1)&&(i0.u2.p4>=1))&&(i0.u4.p6>=1)))||(i2.u0.p9>=100))||((i0.u1.p1>=1)&&(i0.u4.p6>=1))))) * ((i0.u1.p1<1)||(i0.u4.p6<1))))))] = FALSE
(forward)formula 5,0,24.0171,125464,1,0,105616,32103,406,214052,534,95329,91030
FORMULA SatelliteMemory-PT-X00100Y0003-CTLFireability-08 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL USE_NUPN
Formula is FALSE !

***************************************


BK_STOP 1621112302668

--------------------
content from stderr:

+ export BINDIR=/home/mcc/BenchKit/bin//../
+ BINDIR=/home/mcc/BenchKit/bin//../
++ pwd
+ export MODEL=/home/mcc/execution
+ MODEL=/home/mcc/execution
+ [[ CTLFireability = StateSpace ]]
+ /home/mcc/BenchKit/bin//..//runeclipse.sh /home/mcc/execution CTLFireability -its -ltsmin -greatspnpath /home/mcc/BenchKit/bin//..//greatspn/ -order META -manyOrder -smt -timeout 3600
+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
++ cut -d . -f 9
++ ls /home/mcc/BenchKit/bin//..//itstools/plugins/fr.lip6.move.gal.application.pnmcc_1.0.0.202104292328.jar
+ VERSION=0
+ echo 'Running Version 0'
+ /home/mcc/BenchKit/bin//..//itstools/its-tools -data /home/mcc/execution/workspace -pnfolder /home/mcc/execution -examination CTLFireability -spotpath /home/mcc/BenchKit/bin//..//ltlfilt -z3path /home/mcc/BenchKit/bin//..//z3/bin/z3 -yices2path /home/mcc/BenchKit/bin//..//yices/bin/yices -its -ltsmin -greatspnpath /home/mcc/BenchKit/bin//..//greatspn/ -order META -manyOrder -smt -timeout 3600 -vmargs -Dosgi.locking=none -Declipse.stateSaveDelayInterval=-1 -Dosgi.configuration.area=/tmp/.eclipse -Xss128m -Xms40m -Xmx16000m

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="SatelliteMemory-PT-X00100Y0003"
export BK_EXAMINATION="CTLFireability"
export BK_TOOL="itstools"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-4028"
echo " Executing tool itstools"
echo " Input is SatelliteMemory-PT-X00100Y0003, examination is CTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r197-smll-162089452200306"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/SatelliteMemory-PT-X00100Y0003.tgz
mv SatelliteMemory-PT-X00100Y0003 execution
cd execution
if [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "UpperBounds" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] || [ "CTLFireability" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property CTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "CTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' CTLFireability.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] ; then
echo "FORMULA_NAME CTLFireability"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;