About the Execution of LoLA for SatelliteMemory-PT-X01500Y0046
| Execution Summary | |||||
| Max Memory Used (MB) |
Time wait (ms) | CPU Usage (ms) | I/O Wait (ms) | Computed Result | Execution Status |
| 10039.063 | 291039.00 | 274740.00 | 682.40 | ???T???????F???F | normal |
Execution Chart
We display below the execution chart for this examination (boot time has been removed).
Trace from the execution
Formatting '/data/fkordon/mcc2021-input.r194-smll-162089449200322.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2021-input.qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
..................
=====================================================================
Generated by BenchKit 2-4028
Executing tool lola
Input is SatelliteMemory-PT-X01500Y0046, examination is CTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r194-smll-162089449200322
=====================================================================
--------------------
preparation of the directory to be used:
/home/mcc/execution
total 416K
-rw-r--r-- 1 mcc users 13K May 5 16:58 CTLCardinality.txt
-rw-r--r-- 1 mcc users 134K May 10 09:44 CTLCardinality.xml
-rw-r--r-- 1 mcc users 11K May 5 16:58 CTLFireability.txt
-rw-r--r-- 1 mcc users 112K May 10 09:44 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K May 6 14:48 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 7.2K May 6 14:48 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 3.4K Mar 28 16:34 LTLCardinality.txt
-rw-r--r-- 1 mcc users 25K Mar 28 16:34 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.1K Mar 28 16:34 LTLFireability.txt
-rw-r--r-- 1 mcc users 16K Mar 28 16:34 LTLFireability.xml
-rw-r--r-- 1 mcc users 3.5K Mar 27 11:13 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 18K Mar 27 11:13 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 2.7K Mar 25 14:31 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 16K Mar 25 14:31 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.8K Mar 22 08:15 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.8K Mar 22 08:15 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 May 5 16:52 equiv_col
-rw-r--r-- 1 mcc users 12 May 5 16:52 instance
-rw-r--r-- 1 mcc users 6 May 5 16:52 iscolored
-rwxr-xr-x 1 mcc users 5.5K May 5 16:52 model.pnml
--------------------
content from stdout:
=== Data for post analysis generated by BenchKit (invocation template)
The expected result is a vector of booleans
BOOL_VECTOR
here is the order used to build the result vector(from text file)
FORMULA_NAME SatelliteMemory-PT-X01500Y0046-CTLFireability-00
FORMULA_NAME SatelliteMemory-PT-X01500Y0046-CTLFireability-01
FORMULA_NAME SatelliteMemory-PT-X01500Y0046-CTLFireability-02
FORMULA_NAME SatelliteMemory-PT-X01500Y0046-CTLFireability-03
FORMULA_NAME SatelliteMemory-PT-X01500Y0046-CTLFireability-04
FORMULA_NAME SatelliteMemory-PT-X01500Y0046-CTLFireability-05
FORMULA_NAME SatelliteMemory-PT-X01500Y0046-CTLFireability-06
FORMULA_NAME SatelliteMemory-PT-X01500Y0046-CTLFireability-07
FORMULA_NAME SatelliteMemory-PT-X01500Y0046-CTLFireability-08
FORMULA_NAME SatelliteMemory-PT-X01500Y0046-CTLFireability-09
FORMULA_NAME SatelliteMemory-PT-X01500Y0046-CTLFireability-10
FORMULA_NAME SatelliteMemory-PT-X01500Y0046-CTLFireability-11
FORMULA_NAME SatelliteMemory-PT-X01500Y0046-CTLFireability-12
FORMULA_NAME SatelliteMemory-PT-X01500Y0046-CTLFireability-13
FORMULA_NAME SatelliteMemory-PT-X01500Y0046-CTLFireability-14
FORMULA_NAME SatelliteMemory-PT-X01500Y0046-CTLFireability-15
=== Now, execution of the tool begins
BK_START 1620994498016
starting LoLA
BK_INPUT SatelliteMemory-PT-X01500Y0046
BK_EXAMINATION: CTLFireability
bin directory: /home/mcc/BenchKit/bin
current directory: /home/mcc/execution
CTLFireability
FORMULA SatelliteMemory-PT-X01500Y0046-CTLFireability-15 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA SatelliteMemory-PT-X01500Y0046-CTLFireability-11 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA SatelliteMemory-PT-X01500Y0046-CTLFireability-03 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
BK_STOP 1620994789055
--------------------
content from stderr:
lola: MEM LIMIT 32
lola: MEM LIMIT 5
lola: NET
lola: input: PNML file (--pnmlnet)
lola: reading net from /home/mcc/execution/model.pnml
lola: reading pnml
lola: PNML file contains place/transition net
lola: finished parsing
lola: closed net file /home/mcc/execution/model.pnml
lola: Reading formula.
lola: Using XML format (--xmlformula)
lola: reading XML formula
lola: reading formula from /home/mcc/execution/CTLFireability.xml
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:96
lola: rewrite Frontend/Parser/formula_rewrite.k:179
lola: rewrite Frontend/Parser/formula_rewrite.k:150
lola: rewrite Frontend/Parser/formula_rewrite.k:120
lola: rewrite Frontend/Parser/formula_rewrite.k:400
lola: rewrite Frontend/Parser/formula_rewrite.k:96
lola: rewrite Frontend/Parser/formula_rewrite.k:120
lola: rewrite Frontend/Parser/formula_rewrite.k:391
lola: rewrite Frontend/Parser/formula_rewrite.k:448
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:553
lola: rewrite Frontend/Parser/formula_rewrite.k:475
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:96
lola: rewrite Frontend/Parser/formula_rewrite.k:120
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:340
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:340
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:340
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:340
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:96
lola: rewrite Frontend/Parser/formula_rewrite.k:179
lola: rewrite Frontend/Parser/formula_rewrite.k:150
lola: rewrite Frontend/Parser/formula_rewrite.k:162
lola: rewrite Frontend/Parser/formula_rewrite.k:150
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:121
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:340
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:340
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:96
lola: rewrite Frontend/Parser/formula_rewrite.k:121
lola: rewrite Frontend/Parser/formula_rewrite.k:388
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:544
lola: rewrite Frontend/Parser/formula_rewrite.k:553
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:96
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:117
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:547
lola: rewrite Frontend/Parser/formula_rewrite.k:400
lola: rewrite Frontend/Parser/formula_rewrite.k:121
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:544
lola: rewrite Frontend/Parser/formula_rewrite.k:397
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:550
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:340
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:448
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:472
lola: rewrite Frontend/Parser/formula_rewrite.k:388
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Rule S: 0 transitions removed,0 places removed
lola: Created skeleton in 0.000000 secs.
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lola: Created skeleton in 0.000000 secs.
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lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: LAUNCH task # 25 (type EXCL) for 24 SatelliteMemory-PT-X01500Y0046-CTLFireability-04
lola: time limit : 138 sec
lola: memory limit: 32 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:703
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: LAUNCH task # 65 (type FNDP) for 36 SatelliteMemory-PT-X01500Y0046-CTLFireability-08
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 66 (type EQUN) for 36 SatelliteMemory-PT-X01500Y0046-CTLFireability-08
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 68 (type SRCH) for 36 SatelliteMemory-PT-X01500Y0046-CTLFireability-08
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: FINISHED task # 68 (type SRCH) for SatelliteMemory-PT-X01500Y0046-CTLFireability-08
lola: result : unknown
lola: time used : 0.000000
lola: memory pages used : 1
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: LAUNCH task # 69 (type FNDP) for 3 SatelliteMemory-PT-X01500Y0046-CTLFireability-01
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: FINISHED task # 69 (type FNDP) for SatelliteMemory-PT-X01500Y0046-CTLFireability-01
lola: result : true
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:726
lola: rewrite Frontend/Parser/formula_rewrite.k:788
sara: try reading problem file /home/mcc/execution/CTLFireability-66.sara.
lola: FINISHED task # 66 (type EQUN) for SatelliteMemory-PT-X01500Y0046-CTLFireability-08
lola: result : false
lola: CANCELED task # 65 (type FNDP) for SatelliteMemory-PT-X01500Y0046-CTLFireability-08 (obsolete)
lola: FINISHED task # 65 (type FNDP) for SatelliteMemory-PT-X01500Y0046-CTLFireability-08
lola: result : unknown
lola: fired transitions : 1259105
lola: tried executions : 3
lola: time used : 1.000000
lola: memory pages used : 0
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
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SatelliteMemory-PT-X01500Y0046-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
SatelliteMemory-PT-X01500Y0046-CTLFireability-08: CONJ 0 1 0 0 5 0 0 1
SatelliteMemory-PT-X01500Y0046-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
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SatelliteMemory-PT-X01500Y0046-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
SatelliteMemory-PT-X01500Y0046-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
SatelliteMemory-PT-X01500Y0046-CTLFireability-13: CTL 0 1 0 0 1 0 0 0
SatelliteMemory-PT-X01500Y0046-CTLFireability-14: EFAG 0 1 0 0 1 0 0 0
SatelliteMemory-PT-X01500Y0046-CTLFireability-15: CTL 0 1 0 0 1 0 0 0
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25 CTL EXCL 5/200 11/32 SatelliteMemory-PT-X01500Y0046-CTLFireability-04 2502797 m, 500559 m/sec, 6568230 t fired, .
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SatelliteMemory-PT-X01500Y0046-CTLFireability-14: EFAG 0 1 0 0 1 0 0 0
SatelliteMemory-PT-X01500Y0046-CTLFireability-15: CTL 0 1 0 0 1 0 0 0
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25 CTL EXCL 10/200 21/32 SatelliteMemory-PT-X01500Y0046-CTLFireability-04 5116044 m, 522649 m/sec, 13429109 t fired, .
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SatelliteMemory-PT-X01500Y0046-CTLFireability-14: EFAG 0 1 0 0 1 0 0 0
SatelliteMemory-PT-X01500Y0046-CTLFireability-15: CTL 0 1 0 0 1 0 0 0
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25 CTL EXCL 15/200 31/32 SatelliteMemory-PT-X01500Y0046-CTLFireability-04 7645245 m, 505840 m/sec, 20067848 t fired, .
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lola: CANCELED task # 25 (type EXCL) for SatelliteMemory-PT-X01500Y0046-CTLFireability-04 (memory limit exceeded)
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SatelliteMemory-PT-X01500Y0046-CTLFireability-08: CONJ 0 1 0 0 5 0 0 1
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SatelliteMemory-PT-X01500Y0046-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
SatelliteMemory-PT-X01500Y0046-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
SatelliteMemory-PT-X01500Y0046-CTLFireability-13: CTL 0 1 0 0 1 0 0 0
SatelliteMemory-PT-X01500Y0046-CTLFireability-14: EFAG 0 1 0 0 1 0 0 0
SatelliteMemory-PT-X01500Y0046-CTLFireability-15: CTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
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lola: LAUNCH task # 62 (type EXCL) for 61 SatelliteMemory-PT-X01500Y0046-CTLFireability-15
lola: time limit : 210 sec
lola: memory limit: 32 pages
lola: FINISHED task # 62 (type EXCL) for SatelliteMemory-PT-X01500Y0046-CTLFireability-15
lola: result : false
lola: markings : 11998
lola: fired transitions : 16500
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 56 (type EXCL) for 55 SatelliteMemory-PT-X01500Y0046-CTLFireability-13
lola: time limit : 223 sec
lola: memory limit: 32 pages
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
SatelliteMemory-PT-X01500Y0046-CTLFireability-15: CTL false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
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SatelliteMemory-PT-X01500Y0046-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
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SatelliteMemory-PT-X01500Y0046-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
SatelliteMemory-PT-X01500Y0046-CTLFireability-13: CTL 0 0 1 0 1 0 0 0
SatelliteMemory-PT-X01500Y0046-CTLFireability-14: EFAG 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
56 CTL EXCL 5/223 5/32 SatelliteMemory-PT-X01500Y0046-CTLFireability-13 1195166 m, 239033 m/sec, 7280090 t fired, .
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TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
56 CTL EXCL 10/223 10/32 SatelliteMemory-PT-X01500Y0046-CTLFireability-13 2447796 m, 250526 m/sec, 14951455 t fired, .
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SatelliteMemory-PT-X01500Y0046-CTLFireability-13: CTL 0 0 1 0 1 0 0 0
SatelliteMemory-PT-X01500Y0046-CTLFireability-14: EFAG 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
56 CTL EXCL 15/223 15/32 SatelliteMemory-PT-X01500Y0046-CTLFireability-13 3674090 m, 245258 m/sec, 22461811 t fired, .
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SatelliteMemory-PT-X01500Y0046-CTLFireability-14: EFAG 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
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SatelliteMemory-PT-X01500Y0046-CTLFireability-14: EFAG 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
56 CTL EXCL 30/223 29/32 SatelliteMemory-PT-X01500Y0046-CTLFireability-13 7087595 m, 233819 m/sec, 43368477 t fired, .
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lola: CANCELED task # 56 (type EXCL) for SatelliteMemory-PT-X01500Y0046-CTLFireability-13 (memory limit exceeded)
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SatelliteMemory-PT-X01500Y0046-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
SatelliteMemory-PT-X01500Y0046-CTLFireability-14: EFAG 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
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lola: LAUNCH task # 53 (type EXCL) for 52 SatelliteMemory-PT-X01500Y0046-CTLFireability-12
lola: time limit : 236 sec
lola: memory limit: 32 pages
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SatelliteMemory-PT-X01500Y0046-CTLFireability-15: CTL false CTL model checker
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SatelliteMemory-PT-X01500Y0046-CTLFireability-14: EFAG 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
53 CTL EXCL 5/236 7/32 SatelliteMemory-PT-X01500Y0046-CTLFireability-12 1519180 m, 303836 m/sec, 5883734 t fired, .
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SatelliteMemory-PT-X01500Y0046-CTLFireability-14: EFAG 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
53 CTL EXCL 10/236 13/32 SatelliteMemory-PT-X01500Y0046-CTLFireability-12 3079090 m, 311982 m/sec, 11928616 t fired, .
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SatelliteMemory-PT-X01500Y0046-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
SatelliteMemory-PT-X01500Y0046-CTLFireability-14: EFAG 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
53 CTL EXCL 15/236 18/32 SatelliteMemory-PT-X01500Y0046-CTLFireability-12 4419214 m, 268024 m/sec, 17122749 t fired, .
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SatelliteMemory-PT-X01500Y0046-CTLFireability-14: EFAG 0 1 0 0 1 0 0 0
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53 CTL EXCL 25/236 30/32 SatelliteMemory-PT-X01500Y0046-CTLFireability-12 7395926 m, 295922 m/sec, 28657541 t fired, .
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lola: CANCELED task # 53 (type EXCL) for SatelliteMemory-PT-X01500Y0046-CTLFireability-12 (memory limit exceeded)
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SatelliteMemory-PT-X01500Y0046-CTLFireability-12: CTL 0 0 0 0 1 0 1 0
SatelliteMemory-PT-X01500Y0046-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
SatelliteMemory-PT-X01500Y0046-CTLFireability-14: EFAG 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
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lola: LAUNCH task # 50 (type EXCL) for 49 SatelliteMemory-PT-X01500Y0046-CTLFireability-11
lola: time limit : 251 sec
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lola: FINISHED task # 50 (type EXCL) for SatelliteMemory-PT-X01500Y0046-CTLFireability-11
lola: result : false
lola: markings : 5633
lola: fired transitions : 11265
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 47 (type EXCL) for 46 SatelliteMemory-PT-X01500Y0046-CTLFireability-10
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TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
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lola: CANCELED task # 47 (type EXCL) for SatelliteMemory-PT-X01500Y0046-CTLFireability-10 (memory limit exceeded)
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lola: LAUNCH task # 44 (type EXCL) for 43 SatelliteMemory-PT-X01500Y0046-CTLFireability-09
lola: time limit : 292 sec
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SatelliteMemory-PT-X01500Y0046-CTLFireability-09: CTL 0 0 1 0 1 0 0 0
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SatelliteMemory-PT-X01500Y0046-CTLFireability-12: CTL 0 0 0 0 1 0 1 0
SatelliteMemory-PT-X01500Y0046-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
SatelliteMemory-PT-X01500Y0046-CTLFireability-14: EFAG 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
44 CTL EXCL 5/292 18/32 SatelliteMemory-PT-X01500Y0046-CTLFireability-09 4409731 m, 881946 m/sec, 7164175 t fired, .
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lola: CANCELED task # 44 (type EXCL) for SatelliteMemory-PT-X01500Y0046-CTLFireability-09 (memory limit exceeded)
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
SatelliteMemory-PT-X01500Y0046-CTLFireability-11: CTL false CTL model checker
SatelliteMemory-PT-X01500Y0046-CTLFireability-15: CTL false CTL model checker
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SatelliteMemory-PT-X01500Y0046-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
SatelliteMemory-PT-X01500Y0046-CTLFireability-14: EFAG 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
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lola: LAUNCH task # 34 (type EXCL) for 33 SatelliteMemory-PT-X01500Y0046-CTLFireability-07
lola: time limit : 317 sec
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FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
SatelliteMemory-PT-X01500Y0046-CTLFireability-11: CTL false CTL model checker
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SatelliteMemory-PT-X01500Y0046-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
SatelliteMemory-PT-X01500Y0046-CTLFireability-14: EFAG 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
34 CTL EXCL 5/317 4/32 SatelliteMemory-PT-X01500Y0046-CTLFireability-07 802840 m, 160568 m/sec, 5061391 t fired, .
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SatelliteMemory-PT-X01500Y0046-CTLFireability-14: EFAG 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
34 CTL EXCL 10/317 7/32 SatelliteMemory-PT-X01500Y0046-CTLFireability-07 1657226 m, 170877 m/sec, 10462227 t fired, .
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SatelliteMemory-PT-X01500Y0046-CTLFireability-12: CTL 0 0 0 0 1 0 1 0
SatelliteMemory-PT-X01500Y0046-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
SatelliteMemory-PT-X01500Y0046-CTLFireability-14: EFAG 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
34 CTL EXCL 15/317 11/32 SatelliteMemory-PT-X01500Y0046-CTLFireability-07 2501503 m, 168855 m/sec, 15796106 t fired, .
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SatelliteMemory-PT-X01500Y0046-CTLFireability-12: CTL 0 0 0 0 1 0 1 0
SatelliteMemory-PT-X01500Y0046-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
SatelliteMemory-PT-X01500Y0046-CTLFireability-14: EFAG 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
34 CTL EXCL 20/317 14/32 SatelliteMemory-PT-X01500Y0046-CTLFireability-07 3269022 m, 153503 m/sec, 20648901 t fired, .
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SatelliteMemory-PT-X01500Y0046-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
SatelliteMemory-PT-X01500Y0046-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
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SatelliteMemory-PT-X01500Y0046-CTLFireability-08: CONJ 0 1 0 0 5 0 0 1
SatelliteMemory-PT-X01500Y0046-CTLFireability-09: CTL 0 0 0 0 1 0 1 0
SatelliteMemory-PT-X01500Y0046-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
SatelliteMemory-PT-X01500Y0046-CTLFireability-12: CTL 0 0 0 0 1 0 1 0
SatelliteMemory-PT-X01500Y0046-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
SatelliteMemory-PT-X01500Y0046-CTLFireability-14: EFAG 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
34 CTL EXCL 25/317 17/32 SatelliteMemory-PT-X01500Y0046-CTLFireability-07 4095738 m, 165343 m/sec, 25874504 t fired, .
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SatelliteMemory-PT-X01500Y0046-CTLFireability-11: CTL false CTL model checker
SatelliteMemory-PT-X01500Y0046-CTLFireability-15: CTL false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
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SatelliteMemory-PT-X01500Y0046-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
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SatelliteMemory-PT-X01500Y0046-CTLFireability-08: CONJ 0 1 0 0 5 0 0 1
SatelliteMemory-PT-X01500Y0046-CTLFireability-09: CTL 0 0 0 0 1 0 1 0
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SatelliteMemory-PT-X01500Y0046-CTLFireability-12: CTL 0 0 0 0 1 0 1 0
SatelliteMemory-PT-X01500Y0046-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
SatelliteMemory-PT-X01500Y0046-CTLFireability-14: EFAG 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
34 CTL EXCL 30/317 20/32 SatelliteMemory-PT-X01500Y0046-CTLFireability-07 4918751 m, 164602 m/sec, 31085708 t fired, .
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SatelliteMemory-PT-X01500Y0046-CTLFireability-12: CTL 0 0 0 0 1 0 1 0
SatelliteMemory-PT-X01500Y0046-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
SatelliteMemory-PT-X01500Y0046-CTLFireability-14: EFAG 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
34 CTL EXCL 35/317 23/32 SatelliteMemory-PT-X01500Y0046-CTLFireability-07 5733593 m, 162968 m/sec, 36243498 t fired, .
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SatelliteMemory-PT-X01500Y0046-CTLFireability-09: CTL 0 0 0 0 1 0 1 0
SatelliteMemory-PT-X01500Y0046-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
SatelliteMemory-PT-X01500Y0046-CTLFireability-12: CTL 0 0 0 0 1 0 1 0
SatelliteMemory-PT-X01500Y0046-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
SatelliteMemory-PT-X01500Y0046-CTLFireability-14: EFAG 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
34 CTL EXCL 40/317 27/32 SatelliteMemory-PT-X01500Y0046-CTLFireability-07 6544658 m, 162213 m/sec, 41378291 t fired, .
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SatelliteMemory-PT-X01500Y0046-CTLFireability-12: CTL 0 0 0 0 1 0 1 0
SatelliteMemory-PT-X01500Y0046-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
SatelliteMemory-PT-X01500Y0046-CTLFireability-14: EFAG 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
34 CTL EXCL 45/317 30/32 SatelliteMemory-PT-X01500Y0046-CTLFireability-07 7346596 m, 160387 m/sec, 46463061 t fired, .
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lola: CANCELED task # 34 (type EXCL) for SatelliteMemory-PT-X01500Y0046-CTLFireability-07 (memory limit exceeded)
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SatelliteMemory-PT-X01500Y0046-CTLFireability-11: CTL false CTL model checker
SatelliteMemory-PT-X01500Y0046-CTLFireability-15: CTL false CTL model checker
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SatelliteMemory-PT-X01500Y0046-CTLFireability-12: CTL 0 0 0 0 1 0 1 0
SatelliteMemory-PT-X01500Y0046-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
SatelliteMemory-PT-X01500Y0046-CTLFireability-14: EFAG 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
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lola: LAUNCH task # 31 (type EXCL) for 30 SatelliteMemory-PT-X01500Y0046-CTLFireability-06
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FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
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SatelliteMemory-PT-X01500Y0046-CTLFireability-08: CONJ 0 1 0 0 5 0 0 1
SatelliteMemory-PT-X01500Y0046-CTLFireability-09: CTL 0 0 0 0 1 0 1 0
SatelliteMemory-PT-X01500Y0046-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
SatelliteMemory-PT-X01500Y0046-CTLFireability-12: CTL 0 0 0 0 1 0 1 0
SatelliteMemory-PT-X01500Y0046-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
SatelliteMemory-PT-X01500Y0046-CTLFireability-14: EFAG 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
31 CTL EXCL 5/344 12/32 SatelliteMemory-PT-X01500Y0046-CTLFireability-06 2835627 m, 567125 m/sec, 7442392 t fired, .
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SatelliteMemory-PT-X01500Y0046-CTLFireability-11: CTL false CTL model checker
SatelliteMemory-PT-X01500Y0046-CTLFireability-15: CTL false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
SatelliteMemory-PT-X01500Y0046-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
SatelliteMemory-PT-X01500Y0046-CTLFireability-01: DISJ 0 3 0 0 5 0 0 3
SatelliteMemory-PT-X01500Y0046-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
SatelliteMemory-PT-X01500Y0046-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
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SatelliteMemory-PT-X01500Y0046-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
SatelliteMemory-PT-X01500Y0046-CTLFireability-08: CONJ 0 1 0 0 5 0 0 1
SatelliteMemory-PT-X01500Y0046-CTLFireability-09: CTL 0 0 0 0 1 0 1 0
SatelliteMemory-PT-X01500Y0046-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
SatelliteMemory-PT-X01500Y0046-CTLFireability-12: CTL 0 0 0 0 1 0 1 0
SatelliteMemory-PT-X01500Y0046-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
SatelliteMemory-PT-X01500Y0046-CTLFireability-14: EFAG 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
31 CTL EXCL 10/344 23/32 SatelliteMemory-PT-X01500Y0046-CTLFireability-06 5567146 m, 546303 m/sec, 14612962 t fired, .
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lola: CANCELED task # 31 (type EXCL) for SatelliteMemory-PT-X01500Y0046-CTLFireability-06 (memory limit exceeded)
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
SatelliteMemory-PT-X01500Y0046-CTLFireability-11: CTL false CTL model checker
SatelliteMemory-PT-X01500Y0046-CTLFireability-15: CTL false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
SatelliteMemory-PT-X01500Y0046-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
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SatelliteMemory-PT-X01500Y0046-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
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SatelliteMemory-PT-X01500Y0046-CTLFireability-08: CONJ 0 1 0 0 5 0 0 1
SatelliteMemory-PT-X01500Y0046-CTLFireability-09: CTL 0 0 0 0 1 0 1 0
SatelliteMemory-PT-X01500Y0046-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
SatelliteMemory-PT-X01500Y0046-CTLFireability-12: CTL 0 0 0 0 1 0 1 0
SatelliteMemory-PT-X01500Y0046-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
SatelliteMemory-PT-X01500Y0046-CTLFireability-14: EFAG 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
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lola: LAUNCH task # 28 (type EXCL) for 27 SatelliteMemory-PT-X01500Y0046-CTLFireability-05
lola: time limit : 381 sec
lola: memory limit: 32 pages
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
SatelliteMemory-PT-X01500Y0046-CTLFireability-11: CTL false CTL model checker
SatelliteMemory-PT-X01500Y0046-CTLFireability-15: CTL false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
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SatelliteMemory-PT-X01500Y0046-CTLFireability-08: CONJ 0 1 0 0 5 0 0 1
SatelliteMemory-PT-X01500Y0046-CTLFireability-09: CTL 0 0 0 0 1 0 1 0
SatelliteMemory-PT-X01500Y0046-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
SatelliteMemory-PT-X01500Y0046-CTLFireability-12: CTL 0 0 0 0 1 0 1 0
SatelliteMemory-PT-X01500Y0046-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
SatelliteMemory-PT-X01500Y0046-CTLFireability-14: EFAG 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
28 CTL EXCL 5/381 19/32 SatelliteMemory-PT-X01500Y0046-CTLFireability-05 4515106 m, 903021 m/sec, 7899665 t fired, .
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lola: CANCELED task # 28 (type EXCL) for SatelliteMemory-PT-X01500Y0046-CTLFireability-05 (memory limit exceeded)
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
SatelliteMemory-PT-X01500Y0046-CTLFireability-11: CTL false CTL model checker
SatelliteMemory-PT-X01500Y0046-CTLFireability-15: CTL false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
SatelliteMemory-PT-X01500Y0046-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
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SatelliteMemory-PT-X01500Y0046-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
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SatelliteMemory-PT-X01500Y0046-CTLFireability-08: CONJ 0 1 0 0 5 0 0 1
SatelliteMemory-PT-X01500Y0046-CTLFireability-09: CTL 0 0 0 0 1 0 1 0
SatelliteMemory-PT-X01500Y0046-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
SatelliteMemory-PT-X01500Y0046-CTLFireability-12: CTL 0 0 0 0 1 0 1 0
SatelliteMemory-PT-X01500Y0046-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
SatelliteMemory-PT-X01500Y0046-CTLFireability-14: EFAG 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
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lola: LAUNCH task # 22 (type EXCL) for 21 SatelliteMemory-PT-X01500Y0046-CTLFireability-03
lola: time limit : 427 sec
lola: memory limit: 32 pages
lola: FINISHED task # 22 (type EXCL) for SatelliteMemory-PT-X01500Y0046-CTLFireability-03
lola: result : true
lola: markings : 5633
lola: fired transitions : 5638
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 19 (type EXCL) for 18 SatelliteMemory-PT-X01500Y0046-CTLFireability-02
lola: time limit : 488 sec
lola: memory limit: 32 pages
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
SatelliteMemory-PT-X01500Y0046-CTLFireability-03: CTL true CTL model checker
SatelliteMemory-PT-X01500Y0046-CTLFireability-11: CTL false CTL model checker
SatelliteMemory-PT-X01500Y0046-CTLFireability-15: CTL false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
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SatelliteMemory-PT-X01500Y0046-CTLFireability-02: CTL 0 0 1 0 1 0 0 0
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SatelliteMemory-PT-X01500Y0046-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
SatelliteMemory-PT-X01500Y0046-CTLFireability-08: CONJ 0 1 0 0 5 0 0 1
SatelliteMemory-PT-X01500Y0046-CTLFireability-09: CTL 0 0 0 0 1 0 1 0
SatelliteMemory-PT-X01500Y0046-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
SatelliteMemory-PT-X01500Y0046-CTLFireability-12: CTL 0 0 0 0 1 0 1 0
SatelliteMemory-PT-X01500Y0046-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
SatelliteMemory-PT-X01500Y0046-CTLFireability-14: EFAG 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
19 CTL EXCL 5/488 4/32 SatelliteMemory-PT-X01500Y0046-CTLFireability-02 948620 m, 189724 m/sec, 5563878 t fired, .
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SatelliteMemory-PT-X01500Y0046-CTLFireability-03: CTL true CTL model checker
SatelliteMemory-PT-X01500Y0046-CTLFireability-11: CTL false CTL model checker
SatelliteMemory-PT-X01500Y0046-CTLFireability-15: CTL false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
SatelliteMemory-PT-X01500Y0046-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
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SatelliteMemory-PT-X01500Y0046-CTLFireability-02: CTL 0 0 1 0 1 0 0 0
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SatelliteMemory-PT-X01500Y0046-CTLFireability-06: CTL 0 0 0 0 1 0 1 0
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SatelliteMemory-PT-X01500Y0046-CTLFireability-08: CONJ 0 1 0 0 5 0 0 1
SatelliteMemory-PT-X01500Y0046-CTLFireability-09: CTL 0 0 0 0 1 0 1 0
SatelliteMemory-PT-X01500Y0046-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
SatelliteMemory-PT-X01500Y0046-CTLFireability-12: CTL 0 0 0 0 1 0 1 0
SatelliteMemory-PT-X01500Y0046-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
SatelliteMemory-PT-X01500Y0046-CTLFireability-14: EFAG 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
19 CTL EXCL 10/488 8/32 SatelliteMemory-PT-X01500Y0046-CTLFireability-02 1944458 m, 199167 m/sec, 11412687 t fired, .
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SatelliteMemory-PT-X01500Y0046-CTLFireability-03: CTL true CTL model checker
SatelliteMemory-PT-X01500Y0046-CTLFireability-11: CTL false CTL model checker
SatelliteMemory-PT-X01500Y0046-CTLFireability-15: CTL false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
SatelliteMemory-PT-X01500Y0046-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
SatelliteMemory-PT-X01500Y0046-CTLFireability-01: DISJ 0 3 0 0 5 0 0 3
SatelliteMemory-PT-X01500Y0046-CTLFireability-02: CTL 0 0 1 0 1 0 0 0
SatelliteMemory-PT-X01500Y0046-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
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SatelliteMemory-PT-X01500Y0046-CTLFireability-08: CONJ 0 1 0 0 5 0 0 1
SatelliteMemory-PT-X01500Y0046-CTLFireability-09: CTL 0 0 0 0 1 0 1 0
SatelliteMemory-PT-X01500Y0046-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
SatelliteMemory-PT-X01500Y0046-CTLFireability-12: CTL 0 0 0 0 1 0 1 0
SatelliteMemory-PT-X01500Y0046-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
SatelliteMemory-PT-X01500Y0046-CTLFireability-14: EFAG 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
19 CTL EXCL 15/488 12/32 SatelliteMemory-PT-X01500Y0046-CTLFireability-02 2926255 m, 196359 m/sec, 17183053 t fired, .
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SatelliteMemory-PT-X01500Y0046-CTLFireability-03: CTL true CTL model checker
SatelliteMemory-PT-X01500Y0046-CTLFireability-11: CTL false CTL model checker
SatelliteMemory-PT-X01500Y0046-CTLFireability-15: CTL false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
SatelliteMemory-PT-X01500Y0046-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
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SatelliteMemory-PT-X01500Y0046-CTLFireability-02: CTL 0 0 1 0 1 0 0 0
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SatelliteMemory-PT-X01500Y0046-CTLFireability-08: CONJ 0 1 0 0 5 0 0 1
SatelliteMemory-PT-X01500Y0046-CTLFireability-09: CTL 0 0 0 0 1 0 1 0
SatelliteMemory-PT-X01500Y0046-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
SatelliteMemory-PT-X01500Y0046-CTLFireability-12: CTL 0 0 0 0 1 0 1 0
SatelliteMemory-PT-X01500Y0046-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
SatelliteMemory-PT-X01500Y0046-CTLFireability-14: EFAG 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
19 CTL EXCL 20/488 16/32 SatelliteMemory-PT-X01500Y0046-CTLFireability-02 3898099 m, 194368 m/sec, 22892575 t fired, .
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SatelliteMemory-PT-X01500Y0046-CTLFireability-03: CTL true CTL model checker
SatelliteMemory-PT-X01500Y0046-CTLFireability-11: CTL false CTL model checker
SatelliteMemory-PT-X01500Y0046-CTLFireability-15: CTL false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
SatelliteMemory-PT-X01500Y0046-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
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SatelliteMemory-PT-X01500Y0046-CTLFireability-02: CTL 0 0 1 0 1 0 0 0
SatelliteMemory-PT-X01500Y0046-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
SatelliteMemory-PT-X01500Y0046-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
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SatelliteMemory-PT-X01500Y0046-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
SatelliteMemory-PT-X01500Y0046-CTLFireability-08: CONJ 0 1 0 0 5 0 0 1
SatelliteMemory-PT-X01500Y0046-CTLFireability-09: CTL 0 0 0 0 1 0 1 0
SatelliteMemory-PT-X01500Y0046-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
SatelliteMemory-PT-X01500Y0046-CTLFireability-12: CTL 0 0 0 0 1 0 1 0
SatelliteMemory-PT-X01500Y0046-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
SatelliteMemory-PT-X01500Y0046-CTLFireability-14: EFAG 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
19 CTL EXCL 25/488 20/32 SatelliteMemory-PT-X01500Y0046-CTLFireability-02 4860953 m, 192570 m/sec, 28551345 t fired, .
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SatelliteMemory-PT-X01500Y0046-CTLFireability-03: CTL true CTL model checker
SatelliteMemory-PT-X01500Y0046-CTLFireability-11: CTL false CTL model checker
SatelliteMemory-PT-X01500Y0046-CTLFireability-15: CTL false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
SatelliteMemory-PT-X01500Y0046-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
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SatelliteMemory-PT-X01500Y0046-CTLFireability-02: CTL 0 0 1 0 1 0 0 0
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SatelliteMemory-PT-X01500Y0046-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
SatelliteMemory-PT-X01500Y0046-CTLFireability-08: CONJ 0 1 0 0 5 0 0 1
SatelliteMemory-PT-X01500Y0046-CTLFireability-09: CTL 0 0 0 0 1 0 1 0
SatelliteMemory-PT-X01500Y0046-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
SatelliteMemory-PT-X01500Y0046-CTLFireability-12: CTL 0 0 0 0 1 0 1 0
SatelliteMemory-PT-X01500Y0046-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
SatelliteMemory-PT-X01500Y0046-CTLFireability-14: EFAG 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
19 CTL EXCL 30/488 24/32 SatelliteMemory-PT-X01500Y0046-CTLFireability-02 5816690 m, 191147 m/sec, 34164742 t fired, .
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SatelliteMemory-PT-X01500Y0046-CTLFireability-03: CTL true CTL model checker
SatelliteMemory-PT-X01500Y0046-CTLFireability-11: CTL false CTL model checker
SatelliteMemory-PT-X01500Y0046-CTLFireability-15: CTL false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
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SatelliteMemory-PT-X01500Y0046-CTLFireability-02: CTL 0 0 1 0 1 0 0 0
SatelliteMemory-PT-X01500Y0046-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
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SatelliteMemory-PT-X01500Y0046-CTLFireability-06: CTL 0 0 0 0 1 0 1 0
SatelliteMemory-PT-X01500Y0046-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
SatelliteMemory-PT-X01500Y0046-CTLFireability-08: CONJ 0 1 0 0 5 0 0 1
SatelliteMemory-PT-X01500Y0046-CTLFireability-09: CTL 0 0 0 0 1 0 1 0
SatelliteMemory-PT-X01500Y0046-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
SatelliteMemory-PT-X01500Y0046-CTLFireability-12: CTL 0 0 0 0 1 0 1 0
SatelliteMemory-PT-X01500Y0046-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
SatelliteMemory-PT-X01500Y0046-CTLFireability-14: EFAG 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
19 CTL EXCL 35/488 28/32 SatelliteMemory-PT-X01500Y0046-CTLFireability-02 6763048 m, 189271 m/sec, 39729961 t fired, .
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SatelliteMemory-PT-X01500Y0046-CTLFireability-03: CTL true CTL model checker
SatelliteMemory-PT-X01500Y0046-CTLFireability-11: CTL false CTL model checker
SatelliteMemory-PT-X01500Y0046-CTLFireability-15: CTL false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
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SatelliteMemory-PT-X01500Y0046-CTLFireability-01: DISJ 0 3 0 0 5 0 0 3
SatelliteMemory-PT-X01500Y0046-CTLFireability-02: CTL 0 0 1 0 1 0 0 0
SatelliteMemory-PT-X01500Y0046-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
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SatelliteMemory-PT-X01500Y0046-CTLFireability-06: CTL 0 0 0 0 1 0 1 0
SatelliteMemory-PT-X01500Y0046-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
SatelliteMemory-PT-X01500Y0046-CTLFireability-08: CONJ 0 1 0 0 5 0 0 1
SatelliteMemory-PT-X01500Y0046-CTLFireability-09: CTL 0 0 0 0 1 0 1 0
SatelliteMemory-PT-X01500Y0046-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
SatelliteMemory-PT-X01500Y0046-CTLFireability-12: CTL 0 0 0 0 1 0 1 0
SatelliteMemory-PT-X01500Y0046-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
SatelliteMemory-PT-X01500Y0046-CTLFireability-14: EFAG 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
19 CTL EXCL 40/488 31/32 SatelliteMemory-PT-X01500Y0046-CTLFireability-02 7705752 m, 188540 m/sec, 45266700 t fired, .
Time elapsed: 220 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
lola: CANCELED task # 19 (type EXCL) for SatelliteMemory-PT-X01500Y0046-CTLFireability-02 (memory limit exceeded)
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
SatelliteMemory-PT-X01500Y0046-CTLFireability-03: CTL true CTL model checker
SatelliteMemory-PT-X01500Y0046-CTLFireability-11: CTL false CTL model checker
SatelliteMemory-PT-X01500Y0046-CTLFireability-15: CTL false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
SatelliteMemory-PT-X01500Y0046-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
SatelliteMemory-PT-X01500Y0046-CTLFireability-01: DISJ 0 3 0 0 5 0 0 3
SatelliteMemory-PT-X01500Y0046-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
SatelliteMemory-PT-X01500Y0046-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
SatelliteMemory-PT-X01500Y0046-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
SatelliteMemory-PT-X01500Y0046-CTLFireability-06: CTL 0 0 0 0 1 0 1 0
SatelliteMemory-PT-X01500Y0046-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
SatelliteMemory-PT-X01500Y0046-CTLFireability-08: CONJ 0 1 0 0 5 0 0 1
SatelliteMemory-PT-X01500Y0046-CTLFireability-09: CTL 0 0 0 0 1 0 1 0
SatelliteMemory-PT-X01500Y0046-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
SatelliteMemory-PT-X01500Y0046-CTLFireability-12: CTL 0 0 0 0 1 0 1 0
SatelliteMemory-PT-X01500Y0046-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
SatelliteMemory-PT-X01500Y0046-CTLFireability-14: EFAG 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
Time elapsed: 225 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
lola: LAUNCH task # 14 (type EXCL) for 3 SatelliteMemory-PT-X01500Y0046-CTLFireability-01
lola: time limit : 562 sec
lola: memory limit: 32 pages
lola: FINISHED task # 14 (type EXCL) for SatelliteMemory-PT-X01500Y0046-CTLFireability-01
lola: result : true
lola: markings : 5
lola: fired transitions : 4
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 10 (type EXCL) for 3 SatelliteMemory-PT-X01500Y0046-CTLFireability-01
lola: time limit : 675 sec
lola: memory limit: 32 pages
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
SatelliteMemory-PT-X01500Y0046-CTLFireability-03: CTL true CTL model checker
SatelliteMemory-PT-X01500Y0046-CTLFireability-11: CTL false CTL model checker
SatelliteMemory-PT-X01500Y0046-CTLFireability-15: CTL false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
SatelliteMemory-PT-X01500Y0046-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
SatelliteMemory-PT-X01500Y0046-CTLFireability-01: DISJ 0 1 1 0 6 0 0 3
SatelliteMemory-PT-X01500Y0046-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
SatelliteMemory-PT-X01500Y0046-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
SatelliteMemory-PT-X01500Y0046-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
SatelliteMemory-PT-X01500Y0046-CTLFireability-06: CTL 0 0 0 0 1 0 1 0
SatelliteMemory-PT-X01500Y0046-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
SatelliteMemory-PT-X01500Y0046-CTLFireability-08: CONJ 0 1 0 0 5 0 0 1
SatelliteMemory-PT-X01500Y0046-CTLFireability-09: CTL 0 0 0 0 1 0 1 0
SatelliteMemory-PT-X01500Y0046-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
SatelliteMemory-PT-X01500Y0046-CTLFireability-12: CTL 0 0 0 0 1 0 1 0
SatelliteMemory-PT-X01500Y0046-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
SatelliteMemory-PT-X01500Y0046-CTLFireability-14: EFAG 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
10 CTL EXCL 5/675 11/32 SatelliteMemory-PT-X01500Y0046-CTLFireability-01 2656874 m, 531374 m/sec, 6972289 t fired, .
Time elapsed: 230 secs. Pages in use: 32
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FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
SatelliteMemory-PT-X01500Y0046-CTLFireability-03: CTL true CTL model checker
SatelliteMemory-PT-X01500Y0046-CTLFireability-11: CTL false CTL model checker
SatelliteMemory-PT-X01500Y0046-CTLFireability-15: CTL false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
SatelliteMemory-PT-X01500Y0046-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
SatelliteMemory-PT-X01500Y0046-CTLFireability-01: DISJ 0 1 1 0 6 0 0 3
SatelliteMemory-PT-X01500Y0046-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
SatelliteMemory-PT-X01500Y0046-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
SatelliteMemory-PT-X01500Y0046-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
SatelliteMemory-PT-X01500Y0046-CTLFireability-06: CTL 0 0 0 0 1 0 1 0
SatelliteMemory-PT-X01500Y0046-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
SatelliteMemory-PT-X01500Y0046-CTLFireability-08: CONJ 0 1 0 0 5 0 0 1
SatelliteMemory-PT-X01500Y0046-CTLFireability-09: CTL 0 0 0 0 1 0 1 0
SatelliteMemory-PT-X01500Y0046-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
SatelliteMemory-PT-X01500Y0046-CTLFireability-12: CTL 0 0 0 0 1 0 1 0
SatelliteMemory-PT-X01500Y0046-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
SatelliteMemory-PT-X01500Y0046-CTLFireability-14: EFAG 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
10 CTL EXCL 10/675 20/32 SatelliteMemory-PT-X01500Y0046-CTLFireability-01 4854010 m, 439427 m/sec, 12740939 t fired, .
Time elapsed: 235 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
SatelliteMemory-PT-X01500Y0046-CTLFireability-03: CTL true CTL model checker
SatelliteMemory-PT-X01500Y0046-CTLFireability-11: CTL false CTL model checker
SatelliteMemory-PT-X01500Y0046-CTLFireability-15: CTL false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
SatelliteMemory-PT-X01500Y0046-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
SatelliteMemory-PT-X01500Y0046-CTLFireability-01: DISJ 0 1 1 0 6 0 0 3
SatelliteMemory-PT-X01500Y0046-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
SatelliteMemory-PT-X01500Y0046-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
SatelliteMemory-PT-X01500Y0046-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
SatelliteMemory-PT-X01500Y0046-CTLFireability-06: CTL 0 0 0 0 1 0 1 0
SatelliteMemory-PT-X01500Y0046-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
SatelliteMemory-PT-X01500Y0046-CTLFireability-08: CONJ 0 1 0 0 5 0 0 1
SatelliteMemory-PT-X01500Y0046-CTLFireability-09: CTL 0 0 0 0 1 0 1 0
SatelliteMemory-PT-X01500Y0046-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
SatelliteMemory-PT-X01500Y0046-CTLFireability-12: CTL 0 0 0 0 1 0 1 0
SatelliteMemory-PT-X01500Y0046-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
SatelliteMemory-PT-X01500Y0046-CTLFireability-14: EFAG 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
10 CTL EXCL 15/675 30/32 SatelliteMemory-PT-X01500Y0046-CTLFireability-01 7342761 m, 497750 m/sec, 19274163 t fired, .
Time elapsed: 240 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
lola: CANCELED task # 10 (type EXCL) for SatelliteMemory-PT-X01500Y0046-CTLFireability-01 (memory limit exceeded)
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
SatelliteMemory-PT-X01500Y0046-CTLFireability-03: CTL true CTL model checker
SatelliteMemory-PT-X01500Y0046-CTLFireability-11: CTL false CTL model checker
SatelliteMemory-PT-X01500Y0046-CTLFireability-15: CTL false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
SatelliteMemory-PT-X01500Y0046-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
SatelliteMemory-PT-X01500Y0046-CTLFireability-01: DISJ 0 1 0 0 6 0 1 3
SatelliteMemory-PT-X01500Y0046-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
SatelliteMemory-PT-X01500Y0046-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
SatelliteMemory-PT-X01500Y0046-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
SatelliteMemory-PT-X01500Y0046-CTLFireability-06: CTL 0 0 0 0 1 0 1 0
SatelliteMemory-PT-X01500Y0046-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
SatelliteMemory-PT-X01500Y0046-CTLFireability-08: CONJ 0 1 0 0 5 0 0 1
SatelliteMemory-PT-X01500Y0046-CTLFireability-09: CTL 0 0 0 0 1 0 1 0
SatelliteMemory-PT-X01500Y0046-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
SatelliteMemory-PT-X01500Y0046-CTLFireability-12: CTL 0 0 0 0 1 0 1 0
SatelliteMemory-PT-X01500Y0046-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
SatelliteMemory-PT-X01500Y0046-CTLFireability-14: EFAG 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
Time elapsed: 245 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
lola: LAUNCH task # 1 (type EXCL) for 0 SatelliteMemory-PT-X01500Y0046-CTLFireability-00
lola: time limit : 838 sec
lola: memory limit: 32 pages
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
SatelliteMemory-PT-X01500Y0046-CTLFireability-03: CTL true CTL model checker
SatelliteMemory-PT-X01500Y0046-CTLFireability-11: CTL false CTL model checker
SatelliteMemory-PT-X01500Y0046-CTLFireability-15: CTL false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
SatelliteMemory-PT-X01500Y0046-CTLFireability-00: CTL 0 0 1 0 1 0 0 0
SatelliteMemory-PT-X01500Y0046-CTLFireability-01: DISJ 0 1 0 0 6 0 1 3
SatelliteMemory-PT-X01500Y0046-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
SatelliteMemory-PT-X01500Y0046-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
SatelliteMemory-PT-X01500Y0046-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
SatelliteMemory-PT-X01500Y0046-CTLFireability-06: CTL 0 0 0 0 1 0 1 0
SatelliteMemory-PT-X01500Y0046-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
SatelliteMemory-PT-X01500Y0046-CTLFireability-08: CONJ 0 1 0 0 5 0 0 1
SatelliteMemory-PT-X01500Y0046-CTLFireability-09: CTL 0 0 0 0 1 0 1 0
SatelliteMemory-PT-X01500Y0046-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
SatelliteMemory-PT-X01500Y0046-CTLFireability-12: CTL 0 0 0 0 1 0 1 0
SatelliteMemory-PT-X01500Y0046-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
SatelliteMemory-PT-X01500Y0046-CTLFireability-14: EFAG 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
1 CTL EXCL 5/838 19/32 SatelliteMemory-PT-X01500Y0046-CTLFireability-00 4626037 m, 925207 m/sec, 7515115 t fired, .
Time elapsed: 250 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
lola: CANCELED task # 1 (type EXCL) for SatelliteMemory-PT-X01500Y0046-CTLFireability-00 (memory limit exceeded)
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
SatelliteMemory-PT-X01500Y0046-CTLFireability-03: CTL true CTL model checker
SatelliteMemory-PT-X01500Y0046-CTLFireability-11: CTL false CTL model checker
SatelliteMemory-PT-X01500Y0046-CTLFireability-15: CTL false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
SatelliteMemory-PT-X01500Y0046-CTLFireability-00: CTL 0 0 0 0 1 0 1 0
SatelliteMemory-PT-X01500Y0046-CTLFireability-01: DISJ 0 1 0 0 6 0 1 3
SatelliteMemory-PT-X01500Y0046-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
SatelliteMemory-PT-X01500Y0046-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
SatelliteMemory-PT-X01500Y0046-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
SatelliteMemory-PT-X01500Y0046-CTLFireability-06: CTL 0 0 0 0 1 0 1 0
SatelliteMemory-PT-X01500Y0046-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
SatelliteMemory-PT-X01500Y0046-CTLFireability-08: CONJ 0 1 0 0 5 0 0 1
SatelliteMemory-PT-X01500Y0046-CTLFireability-09: CTL 0 0 0 0 1 0 1 0
SatelliteMemory-PT-X01500Y0046-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
SatelliteMemory-PT-X01500Y0046-CTLFireability-12: CTL 0 0 0 0 1 0 1 0
SatelliteMemory-PT-X01500Y0046-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
SatelliteMemory-PT-X01500Y0046-CTLFireability-14: EFAG 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
Time elapsed: 255 secs. Pages in use: 32
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lola: LAUNCH task # 73 (type EXCL) for 58 SatelliteMemory-PT-X01500Y0046-CTLFireability-14
lola: time limit : 1115 sec
lola: memory limit: 32 pages
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
SatelliteMemory-PT-X01500Y0046-CTLFireability-03: CTL true CTL model checker
SatelliteMemory-PT-X01500Y0046-CTLFireability-11: CTL false CTL model checker
SatelliteMemory-PT-X01500Y0046-CTLFireability-15: CTL false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
SatelliteMemory-PT-X01500Y0046-CTLFireability-00: CTL 0 0 0 0 1 0 1 0
SatelliteMemory-PT-X01500Y0046-CTLFireability-01: DISJ 0 1 0 0 6 0 1 3
SatelliteMemory-PT-X01500Y0046-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
SatelliteMemory-PT-X01500Y0046-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
SatelliteMemory-PT-X01500Y0046-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
SatelliteMemory-PT-X01500Y0046-CTLFireability-06: CTL 0 0 0 0 1 0 1 0
SatelliteMemory-PT-X01500Y0046-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
SatelliteMemory-PT-X01500Y0046-CTLFireability-08: CONJ 0 1 0 0 5 0 0 1
SatelliteMemory-PT-X01500Y0046-CTLFireability-09: CTL 0 0 0 0 1 0 1 0
SatelliteMemory-PT-X01500Y0046-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
SatelliteMemory-PT-X01500Y0046-CTLFireability-12: CTL 0 0 0 0 1 0 1 0
SatelliteMemory-PT-X01500Y0046-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
SatelliteMemory-PT-X01500Y0046-CTLFireability-14: EFAG 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
73 AGEF EXCL 5/1115 19/32 SatelliteMemory-PT-X01500Y0046-CTLFireability-14 5210187 m, 1042037 m/sec, 8465993 t fired, .
Time elapsed: 260 secs. Pages in use: 32
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lola: CANCELED task # 73 (type EXCL) for SatelliteMemory-PT-X01500Y0046-CTLFireability-14 (memory limit exceeded)
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
SatelliteMemory-PT-X01500Y0046-CTLFireability-03: CTL true CTL model checker
SatelliteMemory-PT-X01500Y0046-CTLFireability-11: CTL false CTL model checker
SatelliteMemory-PT-X01500Y0046-CTLFireability-15: CTL false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
SatelliteMemory-PT-X01500Y0046-CTLFireability-00: CTL 0 0 0 0 1 0 1 0
SatelliteMemory-PT-X01500Y0046-CTLFireability-01: DISJ 0 1 0 0 6 0 1 3
SatelliteMemory-PT-X01500Y0046-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
SatelliteMemory-PT-X01500Y0046-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
SatelliteMemory-PT-X01500Y0046-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
SatelliteMemory-PT-X01500Y0046-CTLFireability-06: CTL 0 0 0 0 1 0 1 0
SatelliteMemory-PT-X01500Y0046-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
SatelliteMemory-PT-X01500Y0046-CTLFireability-08: CONJ 0 1 0 0 5 0 0 1
SatelliteMemory-PT-X01500Y0046-CTLFireability-09: CTL 0 0 0 0 1 0 1 0
SatelliteMemory-PT-X01500Y0046-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
SatelliteMemory-PT-X01500Y0046-CTLFireability-12: CTL 0 0 0 0 1 0 1 0
SatelliteMemory-PT-X01500Y0046-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
SatelliteMemory-PT-X01500Y0046-CTLFireability-14: EFAG 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
Time elapsed: 265 secs. Pages in use: 32
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lola: LAUNCH task # 39 (type EXCL) for 36 SatelliteMemory-PT-X01500Y0046-CTLFireability-08
lola: time limit : 1667 sec
lola: memory limit: 32 pages
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
SatelliteMemory-PT-X01500Y0046-CTLFireability-03: CTL true CTL model checker
SatelliteMemory-PT-X01500Y0046-CTLFireability-11: CTL false CTL model checker
SatelliteMemory-PT-X01500Y0046-CTLFireability-15: CTL false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
SatelliteMemory-PT-X01500Y0046-CTLFireability-00: CTL 0 0 0 0 1 0 1 0
SatelliteMemory-PT-X01500Y0046-CTLFireability-01: DISJ 0 1 0 0 6 0 1 3
SatelliteMemory-PT-X01500Y0046-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
SatelliteMemory-PT-X01500Y0046-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
SatelliteMemory-PT-X01500Y0046-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
SatelliteMemory-PT-X01500Y0046-CTLFireability-06: CTL 0 0 0 0 1 0 1 0
SatelliteMemory-PT-X01500Y0046-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
SatelliteMemory-PT-X01500Y0046-CTLFireability-08: CONJ 0 0 1 0 5 0 0 1
SatelliteMemory-PT-X01500Y0046-CTLFireability-09: CTL 0 0 0 0 1 0 1 0
SatelliteMemory-PT-X01500Y0046-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
SatelliteMemory-PT-X01500Y0046-CTLFireability-12: CTL 0 0 0 0 1 0 1 0
SatelliteMemory-PT-X01500Y0046-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
SatelliteMemory-PT-X01500Y0046-CTLFireability-14: EFAG 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
39 AGEF EXCL 5/1667 18/32 SatelliteMemory-PT-X01500Y0046-CTLFireability-08 4957858 m, 991571 m/sec, 8054825 t fired, .
Time elapsed: 270 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
lola: CANCELED task # 39 (type EXCL) for SatelliteMemory-PT-X01500Y0046-CTLFireability-08 (memory limit exceeded)
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
SatelliteMemory-PT-X01500Y0046-CTLFireability-03: CTL true CTL model checker
SatelliteMemory-PT-X01500Y0046-CTLFireability-11: CTL false CTL model checker
SatelliteMemory-PT-X01500Y0046-CTLFireability-15: CTL false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
SatelliteMemory-PT-X01500Y0046-CTLFireability-00: CTL 0 0 0 0 1 0 1 0
SatelliteMemory-PT-X01500Y0046-CTLFireability-01: DISJ 0 1 0 0 6 0 1 3
SatelliteMemory-PT-X01500Y0046-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
SatelliteMemory-PT-X01500Y0046-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
SatelliteMemory-PT-X01500Y0046-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
SatelliteMemory-PT-X01500Y0046-CTLFireability-06: CTL 0 0 0 0 1 0 1 0
SatelliteMemory-PT-X01500Y0046-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
SatelliteMemory-PT-X01500Y0046-CTLFireability-08: CONJ 0 0 0 0 5 0 1 1
SatelliteMemory-PT-X01500Y0046-CTLFireability-09: CTL 0 0 0 0 1 0 1 0
SatelliteMemory-PT-X01500Y0046-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
SatelliteMemory-PT-X01500Y0046-CTLFireability-12: CTL 0 0 0 0 1 0 1 0
SatelliteMemory-PT-X01500Y0046-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
SatelliteMemory-PT-X01500Y0046-CTLFireability-14: EFAG 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
Time elapsed: 275 secs. Pages in use: 32
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lola: LAUNCH task # 6 (type EXCL) for 3 SatelliteMemory-PT-X01500Y0046-CTLFireability-01
lola: time limit : 3325 sec
lola: memory limit: 32 pages
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
SatelliteMemory-PT-X01500Y0046-CTLFireability-03: CTL true CTL model checker
SatelliteMemory-PT-X01500Y0046-CTLFireability-11: CTL false CTL model checker
SatelliteMemory-PT-X01500Y0046-CTLFireability-15: CTL false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
SatelliteMemory-PT-X01500Y0046-CTLFireability-00: CTL 0 0 0 0 1 0 1 0
SatelliteMemory-PT-X01500Y0046-CTLFireability-01: DISJ 0 0 1 0 6 0 1 3
SatelliteMemory-PT-X01500Y0046-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
SatelliteMemory-PT-X01500Y0046-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
SatelliteMemory-PT-X01500Y0046-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
SatelliteMemory-PT-X01500Y0046-CTLFireability-06: CTL 0 0 0 0 1 0 1 0
SatelliteMemory-PT-X01500Y0046-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
SatelliteMemory-PT-X01500Y0046-CTLFireability-08: CONJ 0 0 0 0 5 0 1 1
SatelliteMemory-PT-X01500Y0046-CTLFireability-09: CTL 0 0 0 0 1 0 1 0
SatelliteMemory-PT-X01500Y0046-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
SatelliteMemory-PT-X01500Y0046-CTLFireability-12: CTL 0 0 0 0 1 0 1 0
SatelliteMemory-PT-X01500Y0046-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
SatelliteMemory-PT-X01500Y0046-CTLFireability-14: EFAG 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
6 CTL EXCL 5/3325 13/32 SatelliteMemory-PT-X01500Y0046-CTLFireability-01 3042242 m, 608448 m/sec, 7984109 t fired, .
Time elapsed: 280 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
SatelliteMemory-PT-X01500Y0046-CTLFireability-03: CTL true CTL model checker
SatelliteMemory-PT-X01500Y0046-CTLFireability-11: CTL false CTL model checker
SatelliteMemory-PT-X01500Y0046-CTLFireability-15: CTL false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
SatelliteMemory-PT-X01500Y0046-CTLFireability-00: CTL 0 0 0 0 1 0 1 0
SatelliteMemory-PT-X01500Y0046-CTLFireability-01: DISJ 0 0 1 0 6 0 1 3
SatelliteMemory-PT-X01500Y0046-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
SatelliteMemory-PT-X01500Y0046-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
SatelliteMemory-PT-X01500Y0046-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
SatelliteMemory-PT-X01500Y0046-CTLFireability-06: CTL 0 0 0 0 1 0 1 0
SatelliteMemory-PT-X01500Y0046-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
SatelliteMemory-PT-X01500Y0046-CTLFireability-08: CONJ 0 0 0 0 5 0 1 1
SatelliteMemory-PT-X01500Y0046-CTLFireability-09: CTL 0 0 0 0 1 0 1 0
SatelliteMemory-PT-X01500Y0046-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
SatelliteMemory-PT-X01500Y0046-CTLFireability-12: CTL 0 0 0 0 1 0 1 0
SatelliteMemory-PT-X01500Y0046-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
SatelliteMemory-PT-X01500Y0046-CTLFireability-14: EFAG 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
6 CTL EXCL 10/3325 25/32 SatelliteMemory-PT-X01500Y0046-CTLFireability-01 6121299 m, 615811 m/sec, 16067962 t fired, .
Time elapsed: 285 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
lola: CANCELED task # 6 (type EXCL) for SatelliteMemory-PT-X01500Y0046-CTLFireability-01 (memory limit exceeded)
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
SatelliteMemory-PT-X01500Y0046-CTLFireability-03: CTL true CTL model checker
SatelliteMemory-PT-X01500Y0046-CTLFireability-11: CTL false CTL model checker
SatelliteMemory-PT-X01500Y0046-CTLFireability-15: CTL false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
SatelliteMemory-PT-X01500Y0046-CTLFireability-00: CTL 0 0 0 0 1 0 1 0
SatelliteMemory-PT-X01500Y0046-CTLFireability-01: DISJ 0 0 0 0 6 0 2 3
SatelliteMemory-PT-X01500Y0046-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
SatelliteMemory-PT-X01500Y0046-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
SatelliteMemory-PT-X01500Y0046-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
SatelliteMemory-PT-X01500Y0046-CTLFireability-06: CTL 0 0 0 0 1 0 1 0
SatelliteMemory-PT-X01500Y0046-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
SatelliteMemory-PT-X01500Y0046-CTLFireability-08: CONJ 0 0 0 0 5 0 1 1
SatelliteMemory-PT-X01500Y0046-CTLFireability-09: CTL 0 0 0 0 1 0 1 0
SatelliteMemory-PT-X01500Y0046-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
SatelliteMemory-PT-X01500Y0046-CTLFireability-12: CTL 0 0 0 0 1 0 1 0
SatelliteMemory-PT-X01500Y0046-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
SatelliteMemory-PT-X01500Y0046-CTLFireability-14: EFAG 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
Time elapsed: 290 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
lola: Portfolio finished: no open tasks 16
FINAL RESULTS
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
SatelliteMemory-PT-X01500Y0046-CTLFireability-00: CTL unknown AGGR
SatelliteMemory-PT-X01500Y0046-CTLFireability-01: DISJ unknown DISJ
SatelliteMemory-PT-X01500Y0046-CTLFireability-02: CTL unknown AGGR
SatelliteMemory-PT-X01500Y0046-CTLFireability-03: CTL true CTL model checker
SatelliteMemory-PT-X01500Y0046-CTLFireability-04: CTL unknown AGGR
SatelliteMemory-PT-X01500Y0046-CTLFireability-05: CTL unknown AGGR
SatelliteMemory-PT-X01500Y0046-CTLFireability-06: CTL unknown AGGR
SatelliteMemory-PT-X01500Y0046-CTLFireability-07: CTL unknown AGGR
SatelliteMemory-PT-X01500Y0046-CTLFireability-08: CONJ unknown CONJ
SatelliteMemory-PT-X01500Y0046-CTLFireability-09: CTL unknown AGGR
SatelliteMemory-PT-X01500Y0046-CTLFireability-10: CTL unknown AGGR
SatelliteMemory-PT-X01500Y0046-CTLFireability-11: CTL false CTL model checker
SatelliteMemory-PT-X01500Y0046-CTLFireability-12: CTL unknown AGGR
SatelliteMemory-PT-X01500Y0046-CTLFireability-13: CTL unknown AGGR
SatelliteMemory-PT-X01500Y0046-CTLFireability-14: EFAG unknown AGGR
SatelliteMemory-PT-X01500Y0046-CTLFireability-15: CTL false CTL model checker
Time elapsed: 290 secs. Pages in use: 32
Sequence of Actions to be Executed by the VM
This is useful if one wants to reexecute the tool in the VM from the submitted image disk.
set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="SatelliteMemory-PT-X01500Y0046"
export BK_EXAMINATION="CTLFireability"
export BK_TOOL="lola"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"
# this is specific to your benchmark or test
export BIN_DIR="$HOME/BenchKit/bin"
# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi
# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-4028"
echo " Executing tool lola"
echo " Input is SatelliteMemory-PT-X01500Y0046, examination is CTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r194-smll-162089449200322"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"
tar xzf /home/mcc/BenchKit/INPUTS/SatelliteMemory-PT-X01500Y0046.tgz
mv SatelliteMemory-PT-X01500Y0046 execution
cd execution
if [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "UpperBounds" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] || [ "CTLFireability" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh
echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property CTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "CTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '
echo "FORMULA_NAME $x"
done
elif [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] ; then
echo "FORMULA_NAME CTLFireability"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;