About the Execution of LoLA for RwMutex-PT-r1000w0010
| Execution Summary | |||||
| Max Memory Used (MB) |
Time wait (ms) | CPU Usage (ms) | I/O Wait (ms) | Computed Result | Execution Status |
| 16219.199 | 1738109.00 | 1868956.00 | 4500.70 | ?????T?FTFFFFF?T | normal |
Execution Chart
We display below the execution chart for this examination (boot time has been removed).
Trace from the execution
Formatting '/data/fkordon/mcc2021-input.r194-smll-162089449000194.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2021-input.qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
.........................................................................................................................................................................................
=====================================================================
Generated by BenchKit 2-4028
Executing tool lola
Input is RwMutex-PT-r1000w0010, examination is CTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r194-smll-162089449000194
=====================================================================
--------------------
preparation of the directory to be used:
/home/mcc/execution
total 2.6M
-rw-r--r-- 1 mcc users 18K May 5 16:58 CTLCardinality.txt
-rw-r--r-- 1 mcc users 161K May 10 09:44 CTLCardinality.xml
-rw-r--r-- 1 mcc users 7.2K May 5 16:58 CTLFireability.txt
-rw-r--r-- 1 mcc users 58K May 10 09:44 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K May 6 14:48 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.5K May 6 14:48 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 3.0K Mar 28 16:34 LTLCardinality.txt
-rw-r--r-- 1 mcc users 20K Mar 28 16:34 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.3K Mar 28 16:34 LTLFireability.txt
-rw-r--r-- 1 mcc users 19K Mar 28 16:34 LTLFireability.xml
-rw-r--r-- 1 mcc users 3.7K Mar 27 11:09 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 18K Mar 27 11:09 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 3.4K Mar 25 14:19 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 23K Mar 25 14:19 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.7K Mar 22 08:15 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.7K Mar 22 08:15 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 May 5 16:51 equiv_col
-rw-r--r-- 1 mcc users 11 May 5 16:51 instance
-rw-r--r-- 1 mcc users 6 May 5 16:51 iscolored
-rw-r--r-- 1 mcc users 2.2M May 5 16:51 model.pnml
--------------------
content from stdout:
=== Data for post analysis generated by BenchKit (invocation template)
The expected result is a vector of booleans
BOOL_VECTOR
here is the order used to build the result vector(from text file)
FORMULA_NAME RwMutex-PT-r1000w0010-CTLFireability-00
FORMULA_NAME RwMutex-PT-r1000w0010-CTLFireability-01
FORMULA_NAME RwMutex-PT-r1000w0010-CTLFireability-02
FORMULA_NAME RwMutex-PT-r1000w0010-CTLFireability-03
FORMULA_NAME RwMutex-PT-r1000w0010-CTLFireability-04
FORMULA_NAME RwMutex-PT-r1000w0010-CTLFireability-05
FORMULA_NAME RwMutex-PT-r1000w0010-CTLFireability-06
FORMULA_NAME RwMutex-PT-r1000w0010-CTLFireability-07
FORMULA_NAME RwMutex-PT-r1000w0010-CTLFireability-08
FORMULA_NAME RwMutex-PT-r1000w0010-CTLFireability-09
FORMULA_NAME RwMutex-PT-r1000w0010-CTLFireability-10
FORMULA_NAME RwMutex-PT-r1000w0010-CTLFireability-11
FORMULA_NAME RwMutex-PT-r1000w0010-CTLFireability-12
FORMULA_NAME RwMutex-PT-r1000w0010-CTLFireability-13
FORMULA_NAME RwMutex-PT-r1000w0010-CTLFireability-14
FORMULA_NAME RwMutex-PT-r1000w0010-CTLFireability-15
=== Now, execution of the tool begins
BK_START 1620949430767
starting LoLA
BK_INPUT RwMutex-PT-r1000w0010
BK_EXAMINATION: CTLFireability
bin directory: /home/mcc/BenchKit/bin
current directory: /home/mcc/execution
CTLFireability
FORMULA RwMutex-PT-r1000w0010-CTLFireability-15 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA RwMutex-PT-r1000w0010-CTLFireability-13 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA RwMutex-PT-r1000w0010-CTLFireability-12 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA RwMutex-PT-r1000w0010-CTLFireability-11 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA RwMutex-PT-r1000w0010-CTLFireability-10 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA RwMutex-PT-r1000w0010-CTLFireability-09 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA RwMutex-PT-r1000w0010-CTLFireability-08 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA RwMutex-PT-r1000w0010-CTLFireability-07 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA RwMutex-PT-r1000w0010-CTLFireability-05 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
BK_STOP 1620951168876
--------------------
content from stderr:
lola: MEM LIMIT 32
lola: MEM LIMIT 5
lola: NET
lola: input: PNML file (--pnmlnet)
lola: reading net from /home/mcc/execution/model.pnml
lola: reading pnml
lola: PNML file contains place/transition net
lola: finished parsing
lola: closed net file /home/mcc/execution/model.pnml
lola: Reading formula.
lola: Using XML format (--xmlformula)
lola: reading XML formula
lola: reading formula from /home/mcc/execution/CTLFireability.xml
lola: rewrite Frontend/Parser/formula_rewrite.k:553
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:553
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:454
lola: rewrite Frontend/Parser/formula_rewrite.k:472
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:445
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:340
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:439
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:550
lola: RELEASE
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:547
lola: rewrite Frontend/Parser/formula_rewrite.k:394
lola: rewrite Frontend/Parser/formula_rewrite.k:547
lola: rewrite Frontend/Parser/formula_rewrite.k:454
lola: rewrite Frontend/Parser/formula_rewrite.k:478
lola: rewrite Frontend/Parser/formula_rewrite.k:391
lola: rewrite Frontend/Parser/formula_rewrite.k:547
lola: rewrite Frontend/Parser/formula_rewrite.k:454
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: RELEASE
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: RELEASE
lola: RELEASE
lola: Rule S: 0 transitions removed,0 places removed
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 1.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: RELEASE
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 1.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 1.000000 secs.
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RwMutex-PT-r1000w0010-CTLFireability-00: CTL 0 0 0 0 1 0 0 0
RwMutex-PT-r1000w0010-CTLFireability-01: CTL 0 0 0 0 1 0 0 0
RwMutex-PT-r1000w0010-CTLFireability-02: CTL 0 0 0 0 1 0 0 0
RwMutex-PT-r1000w0010-CTLFireability-03: EFAG 0 0 0 0 1 0 0 0
RwMutex-PT-r1000w0010-CTLFireability-04: CTL 0 0 0 0 1 0 0 0
RwMutex-PT-r1000w0010-CTLFireability-05: CTL 0 0 0 0 1 0 0 0
RwMutex-PT-r1000w0010-CTLFireability-06: CTL 0 0 0 0 1 0 0 0
RwMutex-PT-r1000w0010-CTLFireability-07: CTL 0 0 0 0 1 0 0 0
RwMutex-PT-r1000w0010-CTLFireability-08: CTL 0 0 0 0 1 0 0 0
RwMutex-PT-r1000w0010-CTLFireability-09: CTL 0 0 0 0 1 0 0 0
RwMutex-PT-r1000w0010-CTLFireability-10: CTL 0 0 0 0 1 0 0 0
RwMutex-PT-r1000w0010-CTLFireability-11: CONJ 0 0 0 0 4 0 0 0
RwMutex-PT-r1000w0010-CTLFireability-12: CTL 0 0 0 0 1 0 0 0
RwMutex-PT-r1000w0010-CTLFireability-13: CTL 0 0 0 0 1 0 0 0
RwMutex-PT-r1000w0010-CTLFireability-14: EFAG 0 0 0 0 1 0 0 0
RwMutex-PT-r1000w0010-CTLFireability-15: CTL 0 0 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
Time elapsed: 166 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 16
lola: rewrite Frontend/Parser/formula_rewrite.k:726
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: LAUNCH task # 60 (type EXCL) for 9 RwMutex-PT-r1000w0010-CTLFireability-03
lola: time limit : 180 sec
lola: memory limit: 32 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:726
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:811
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RwMutex-PT-r1000w0010-CTLFireability-00: CTL 0 0 0 0 1 0 0 0
RwMutex-PT-r1000w0010-CTLFireability-01: CTL 0 0 0 0 1 0 0 0
RwMutex-PT-r1000w0010-CTLFireability-02: CTL 0 0 0 0 1 0 0 0
RwMutex-PT-r1000w0010-CTLFireability-03: EFAG 0 0 1 0 1 0 0 0
RwMutex-PT-r1000w0010-CTLFireability-04: CTL 1 0 0 0 1 0 0 0
RwMutex-PT-r1000w0010-CTLFireability-05: CTL 0 0 0 0 1 0 0 0
RwMutex-PT-r1000w0010-CTLFireability-06: CTL 0 0 0 0 1 0 0 0
RwMutex-PT-r1000w0010-CTLFireability-07: CTL 0 0 0 0 1 0 0 0
RwMutex-PT-r1000w0010-CTLFireability-08: CTL 0 0 0 0 1 0 0 0
RwMutex-PT-r1000w0010-CTLFireability-09: CTL 0 0 0 0 1 0 0 0
RwMutex-PT-r1000w0010-CTLFireability-10: CTL 0 0 0 0 1 0 0 0
RwMutex-PT-r1000w0010-CTLFireability-11: CONJ 0 2 0 0 4 0 0 0
RwMutex-PT-r1000w0010-CTLFireability-12: CTL 0 0 0 0 1 0 0 0
RwMutex-PT-r1000w0010-CTLFireability-13: CTL 0 0 0 0 1 0 0 0
RwMutex-PT-r1000w0010-CTLFireability-14: EFAG 0 1 0 0 1 0 0 0
RwMutex-PT-r1000w0010-CTLFireability-15: CTL 0 0 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
60 AGEF EXCL 5/180 1/32 RwMutex-PT-r1000w0010-CTLFireability-03 32786 m, 6557 m/sec, 60709 t fired, .
Time elapsed: 171 secs. Pages in use: 1
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RwMutex-PT-r1000w0010-CTLFireability-00: CTL 0 0 0 0 1 0 0 0
RwMutex-PT-r1000w0010-CTLFireability-01: CTL 0 0 0 0 1 0 0 0
RwMutex-PT-r1000w0010-CTLFireability-02: CTL 0 0 0 0 1 0 0 0
RwMutex-PT-r1000w0010-CTLFireability-03: EFAG 0 0 1 0 1 0 0 0
RwMutex-PT-r1000w0010-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
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60 AGEF EXCL 10/180 1/32 RwMutex-PT-r1000w0010-CTLFireability-03 65279 m, 6498 m/sec, 127450 t fired, .
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60 AGEF EXCL 15/180 1/32 RwMutex-PT-r1000w0010-CTLFireability-03 100836 m, 7111 m/sec, 202347 t fired, .
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60 AGEF EXCL 20/180 2/32 RwMutex-PT-r1000w0010-CTLFireability-03 122052 m, 4243 m/sec, 247189 t fired, .
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60 AGEF EXCL 25/180 4/32 RwMutex-PT-r1000w0010-CTLFireability-03 331741 m, 41937 m/sec, 701723 t fired, .
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60 AGEF EXCL 30/180 6/32 RwMutex-PT-r1000w0010-CTLFireability-03 567450 m, 47141 m/sec, 1218378 t fired, .
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60 AGEF EXCL 35/180 8/32 RwMutex-PT-r1000w0010-CTLFireability-03 801473 m, 46804 m/sec, 1733721 t fired, .
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60 AGEF EXCL 40/180 11/32 RwMutex-PT-r1000w0010-CTLFireability-03 1034262 m, 46557 m/sec, 2256764 t fired, .
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60 AGEF EXCL 45/180 13/32 RwMutex-PT-r1000w0010-CTLFireability-03 1265755 m, 46298 m/sec, 2777798 t fired, .
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60 AGEF EXCL 50/180 15/32 RwMutex-PT-r1000w0010-CTLFireability-03 1497072 m, 46263 m/sec, 3297207 t fired, .
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60 AGEF EXCL 55/180 17/32 RwMutex-PT-r1000w0010-CTLFireability-03 1727010 m, 45987 m/sec, 3821515 t fired, .
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RwMutex-PT-r1000w0010-CTLFireability-07: CTL false CTL model checker
RwMutex-PT-r1000w0010-CTLFireability-08: CTL true CTL model checker
RwMutex-PT-r1000w0010-CTLFireability-09: CTL false CTL model checker
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RwMutex-PT-r1000w0010-CTLFireability-11: CONJ false CTL model checker
RwMutex-PT-r1000w0010-CTLFireability-12: CTL false CTL model checker
RwMutex-PT-r1000w0010-CTLFireability-13: CTL false CTL model checker
RwMutex-PT-r1000w0010-CTLFireability-15: CTL true CTL model checker
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RwMutex-PT-r1000w0010-CTLFireability-14: EFAG 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
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RwMutex-PT-r1000w0010-CTLFireability-07: CTL false CTL model checker
RwMutex-PT-r1000w0010-CTLFireability-08: CTL true CTL model checker
RwMutex-PT-r1000w0010-CTLFireability-09: CTL false CTL model checker
RwMutex-PT-r1000w0010-CTLFireability-10: CTL false CTL model checker
RwMutex-PT-r1000w0010-CTLFireability-11: CONJ false CTL model checker
RwMutex-PT-r1000w0010-CTLFireability-12: CTL false CTL model checker
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RwMutex-PT-r1000w0010-CTLFireability-07: CTL false CTL model checker
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RwMutex-PT-r1000w0010-CTLFireability-09: CTL false CTL model checker
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RwMutex-PT-r1000w0010-CTLFireability-12: CTL false CTL model checker
RwMutex-PT-r1000w0010-CTLFireability-13: CTL false CTL model checker
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RwMutex-PT-r1000w0010-CTLFireability-12: CTL false CTL model checker
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RwMutex-PT-r1000w0010-CTLFireability-07: CTL false CTL model checker
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RwMutex-PT-r1000w0010-CTLFireability-07: CTL false CTL model checker
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RwMutex-PT-r1000w0010-CTLFireability-09: CTL false CTL model checker
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RwMutex-PT-r1000w0010-CTLFireability-07: CTL false CTL model checker
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RwMutex-PT-r1000w0010-CTLFireability-09: CTL false CTL model checker
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RwMutex-PT-r1000w0010-CTLFireability-12: CTL false CTL model checker
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lola: CANCELED task # 19 (type EXCL) for RwMutex-PT-r1000w0010-CTLFireability-06 (local timeout)
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
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RwMutex-PT-r1000w0010-CTLFireability-09: CTL false CTL model checker
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RwMutex-PT-r1000w0010-CTLFireability-11: CONJ false CTL model checker
RwMutex-PT-r1000w0010-CTLFireability-12: CTL false CTL model checker
RwMutex-PT-r1000w0010-CTLFireability-13: CTL false CTL model checker
RwMutex-PT-r1000w0010-CTLFireability-15: CTL true CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
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RwMutex-PT-r1000w0010-CTLFireability-03: EFAG 0 0 0 0 1 0 1 0
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RwMutex-PT-r1000w0010-CTLFireability-06: CTL 0 0 0 0 1 1 0 0
RwMutex-PT-r1000w0010-CTLFireability-14: EFAG 0 1 0 0 1 0 0 0
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lola: LAUNCH task # 16 (type EXCL) for 15 RwMutex-PT-r1000w0010-CTLFireability-05
lola: time limit : 474 sec
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lola: LAUNCH task # 19 (type EXCL) for 18 RwMutex-PT-r1000w0010-CTLFireability-06
lola: time limit : 2844 sec
lola: memory limit: 5 pages
lola: FINISHED task # 16 (type EXCL) for RwMutex-PT-r1000w0010-CTLFireability-05
lola: result : true
lola: markings : 2
lola: fired transitions : 1
lola: time used : 0.000000
lola: memory pages used : 1
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RwMutex-PT-r1000w0010-CTLFireability-05: CTL true CTL model checker
RwMutex-PT-r1000w0010-CTLFireability-07: CTL false CTL model checker
RwMutex-PT-r1000w0010-CTLFireability-08: CTL true CTL model checker
RwMutex-PT-r1000w0010-CTLFireability-09: CTL false CTL model checker
RwMutex-PT-r1000w0010-CTLFireability-10: CTL false CTL model checker
RwMutex-PT-r1000w0010-CTLFireability-11: CONJ false CTL model checker
RwMutex-PT-r1000w0010-CTLFireability-12: CTL false CTL model checker
RwMutex-PT-r1000w0010-CTLFireability-13: CTL false CTL model checker
RwMutex-PT-r1000w0010-CTLFireability-15: CTL true CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
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RwMutex-PT-r1000w0010-CTLFireability-14: EFAG 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
19 CTL EXCL 5/474 1/5 RwMutex-PT-r1000w0010-CTLFireability-06 3 m, -17323 m/sec, 3 t fired, .
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RwMutex-PT-r1000w0010-CTLFireability-05: CTL true CTL model checker
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RwMutex-PT-r1000w0010-CTLFireability-08: CTL true CTL model checker
RwMutex-PT-r1000w0010-CTLFireability-09: CTL false CTL model checker
RwMutex-PT-r1000w0010-CTLFireability-10: CTL false CTL model checker
RwMutex-PT-r1000w0010-CTLFireability-11: CONJ false CTL model checker
RwMutex-PT-r1000w0010-CTLFireability-12: CTL false CTL model checker
RwMutex-PT-r1000w0010-CTLFireability-13: CTL false CTL model checker
RwMutex-PT-r1000w0010-CTLFireability-15: CTL true CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
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RwMutex-PT-r1000w0010-CTLFireability-05: CTL true CTL model checker
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RwMutex-PT-r1000w0010-CTLFireability-08: CTL true CTL model checker
RwMutex-PT-r1000w0010-CTLFireability-09: CTL false CTL model checker
RwMutex-PT-r1000w0010-CTLFireability-10: CTL false CTL model checker
RwMutex-PT-r1000w0010-CTLFireability-11: CONJ false CTL model checker
RwMutex-PT-r1000w0010-CTLFireability-12: CTL false CTL model checker
RwMutex-PT-r1000w0010-CTLFireability-13: CTL false CTL model checker
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PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
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RwMutex-PT-r1000w0010-CTLFireability-05: CTL true CTL model checker
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RwMutex-PT-r1000w0010-CTLFireability-08: CTL true CTL model checker
RwMutex-PT-r1000w0010-CTLFireability-09: CTL false CTL model checker
RwMutex-PT-r1000w0010-CTLFireability-10: CTL false CTL model checker
RwMutex-PT-r1000w0010-CTLFireability-11: CONJ false CTL model checker
RwMutex-PT-r1000w0010-CTLFireability-12: CTL false CTL model checker
RwMutex-PT-r1000w0010-CTLFireability-13: CTL false CTL model checker
RwMutex-PT-r1000w0010-CTLFireability-15: CTL true CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
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TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
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RwMutex-PT-r1000w0010-CTLFireability-05: CTL true CTL model checker
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RwMutex-PT-r1000w0010-CTLFireability-08: CTL true CTL model checker
RwMutex-PT-r1000w0010-CTLFireability-09: CTL false CTL model checker
RwMutex-PT-r1000w0010-CTLFireability-10: CTL false CTL model checker
RwMutex-PT-r1000w0010-CTLFireability-11: CONJ false CTL model checker
RwMutex-PT-r1000w0010-CTLFireability-12: CTL false CTL model checker
RwMutex-PT-r1000w0010-CTLFireability-13: CTL false CTL model checker
RwMutex-PT-r1000w0010-CTLFireability-15: CTL true CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
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RwMutex-PT-r1000w0010-CTLFireability-05: CTL true CTL model checker
RwMutex-PT-r1000w0010-CTLFireability-07: CTL false CTL model checker
RwMutex-PT-r1000w0010-CTLFireability-08: CTL true CTL model checker
RwMutex-PT-r1000w0010-CTLFireability-09: CTL false CTL model checker
RwMutex-PT-r1000w0010-CTLFireability-10: CTL false CTL model checker
RwMutex-PT-r1000w0010-CTLFireability-11: CONJ false CTL model checker
RwMutex-PT-r1000w0010-CTLFireability-12: CTL false CTL model checker
RwMutex-PT-r1000w0010-CTLFireability-13: CTL false CTL model checker
RwMutex-PT-r1000w0010-CTLFireability-15: CTL true CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
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RwMutex-PT-r1000w0010-CTLFireability-08: CTL true CTL model checker
RwMutex-PT-r1000w0010-CTLFireability-09: CTL false CTL model checker
RwMutex-PT-r1000w0010-CTLFireability-10: CTL false CTL model checker
RwMutex-PT-r1000w0010-CTLFireability-11: CONJ false CTL model checker
RwMutex-PT-r1000w0010-CTLFireability-12: CTL false CTL model checker
RwMutex-PT-r1000w0010-CTLFireability-13: CTL false CTL model checker
RwMutex-PT-r1000w0010-CTLFireability-15: CTL true CTL model checker
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RwMutex-PT-r1000w0010-CTLFireability-05: CTL true CTL model checker
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RwMutex-PT-r1000w0010-CTLFireability-08: CTL true CTL model checker
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RwMutex-PT-r1000w0010-CTLFireability-12: CTL false CTL model checker
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RwMutex-PT-r1000w0010-CTLFireability-05: CTL true CTL model checker
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19 CTL EXCL 465/474 1/5 RwMutex-PT-r1000w0010-CTLFireability-06 87939 m, 2194 m/sec, 651736 t fired, .
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RwMutex-PT-r1000w0010-CTLFireability-05: CTL true CTL model checker
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RwMutex-PT-r1000w0010-CTLFireability-08: CTL true CTL model checker
RwMutex-PT-r1000w0010-CTLFireability-09: CTL false CTL model checker
RwMutex-PT-r1000w0010-CTLFireability-10: CTL false CTL model checker
RwMutex-PT-r1000w0010-CTLFireability-11: CONJ false CTL model checker
RwMutex-PT-r1000w0010-CTLFireability-12: CTL false CTL model checker
RwMutex-PT-r1000w0010-CTLFireability-13: CTL false CTL model checker
RwMutex-PT-r1000w0010-CTLFireability-15: CTL true CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
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RwMutex-PT-r1000w0010-CTLFireability-14: EFAG 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
19 CTL EXCL 470/474 2/5 RwMutex-PT-r1000w0010-CTLFireability-06 98943 m, 2200 m/sec, 732594 t fired, .
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FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
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RwMutex-PT-r1000w0010-CTLFireability-08: CTL true CTL model checker
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RwMutex-PT-r1000w0010-CTLFireability-05: CTL true CTL model checker
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RwMutex-PT-r1000w0010-CTLFireability-08: CTL true CTL model checker
RwMutex-PT-r1000w0010-CTLFireability-09: CTL false CTL model checker
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RwMutex-PT-r1000w0010-CTLFireability-11: CONJ false CTL model checker
RwMutex-PT-r1000w0010-CTLFireability-12: CTL false CTL model checker
RwMutex-PT-r1000w0010-CTLFireability-13: CTL false CTL model checker
RwMutex-PT-r1000w0010-CTLFireability-15: CTL true CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
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TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
7 CTL EXCL 5/473 2/32 RwMutex-PT-r1000w0010-CTLFireability-02 126760 m, 25352 m/sec, 127273 t fired, .
19 CTL EXCL 5/2369 1/5 RwMutex-PT-r1000w0010-CTLFireability-06 3 m, -19788 m/sec, 3 t fired, .
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RwMutex-PT-r1000w0010-CTLFireability-15: CTL true CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
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TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
7 CTL EXCL 10/473 3/32 RwMutex-PT-r1000w0010-CTLFireability-02 287442 m, 32136 m/sec, 290513 t fired, .
19 CTL EXCL 10/394 1/5 RwMutex-PT-r1000w0010-CTLFireability-06 5 m, 0 m/sec, 5 t fired, .
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RwMutex-PT-r1000w0010-CTLFireability-08: CTL true CTL model checker
RwMutex-PT-r1000w0010-CTLFireability-09: CTL false CTL model checker
RwMutex-PT-r1000w0010-CTLFireability-10: CTL false CTL model checker
RwMutex-PT-r1000w0010-CTLFireability-11: CONJ false CTL model checker
RwMutex-PT-r1000w0010-CTLFireability-12: CTL false CTL model checker
RwMutex-PT-r1000w0010-CTLFireability-13: CTL false CTL model checker
RwMutex-PT-r1000w0010-CTLFireability-15: CTL true CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
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TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
7 CTL EXCL 15/473 7/32 RwMutex-PT-r1000w0010-CTLFireability-02 811409 m, 104793 m/sec, 826328 t fired, .
19 CTL EXCL 15/394 1/5 RwMutex-PT-r1000w0010-CTLFireability-06 7 m, 0 m/sec, 7 t fired, .
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RwMutex-PT-r1000w0010-CTLFireability-05: CTL true CTL model checker
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RwMutex-PT-r1000w0010-CTLFireability-08: CTL true CTL model checker
RwMutex-PT-r1000w0010-CTLFireability-09: CTL false CTL model checker
RwMutex-PT-r1000w0010-CTLFireability-10: CTL false CTL model checker
RwMutex-PT-r1000w0010-CTLFireability-11: CONJ false CTL model checker
RwMutex-PT-r1000w0010-CTLFireability-12: CTL false CTL model checker
RwMutex-PT-r1000w0010-CTLFireability-13: CTL false CTL model checker
RwMutex-PT-r1000w0010-CTLFireability-15: CTL true CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
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RwMutex-PT-r1000w0010-CTLFireability-14: EFAG 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
7 CTL EXCL 20/473 11/32 RwMutex-PT-r1000w0010-CTLFireability-02 1331614 m, 104041 m/sec, 1360328 t fired, .
19 CTL EXCL 20/394 1/5 RwMutex-PT-r1000w0010-CTLFireability-06 9 m, 0 m/sec, 9 t fired, .
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RwMutex-PT-r1000w0010-CTLFireability-05: CTL true CTL model checker
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RwMutex-PT-r1000w0010-CTLFireability-08: CTL true CTL model checker
RwMutex-PT-r1000w0010-CTLFireability-09: CTL false CTL model checker
RwMutex-PT-r1000w0010-CTLFireability-10: CTL false CTL model checker
RwMutex-PT-r1000w0010-CTLFireability-11: CONJ false CTL model checker
RwMutex-PT-r1000w0010-CTLFireability-12: CTL false CTL model checker
RwMutex-PT-r1000w0010-CTLFireability-13: CTL false CTL model checker
RwMutex-PT-r1000w0010-CTLFireability-15: CTL true CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
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RwMutex-PT-r1000w0010-CTLFireability-14: EFAG 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
7 CTL EXCL 25/473 15/32 RwMutex-PT-r1000w0010-CTLFireability-02 1821373 m, 97951 m/sec, 1864164 t fired, .
19 CTL EXCL 25/394 1/5 RwMutex-PT-r1000w0010-CTLFireability-06 11 m, 0 m/sec, 11 t fired, .
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RwMutex-PT-r1000w0010-CTLFireability-08: CTL true CTL model checker
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RwMutex-PT-r1000w0010-CTLFireability-11: CONJ false CTL model checker
RwMutex-PT-r1000w0010-CTLFireability-12: CTL false CTL model checker
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RwMutex-PT-r1000w0010-CTLFireability-15: CTL true CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
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TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
7 CTL EXCL 30/473 20/32 RwMutex-PT-r1000w0010-CTLFireability-02 2337171 m, 103159 m/sec, 2393058 t fired, .
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RwMutex-PT-r1000w0010-CTLFireability-11: CONJ false CTL model checker
RwMutex-PT-r1000w0010-CTLFireability-12: CTL false CTL model checker
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RwMutex-PT-r1000w0010-CTLFireability-15: CTL true CTL model checker
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TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
7 CTL EXCL 35/473 24/32 RwMutex-PT-r1000w0010-CTLFireability-02 2808524 m, 94270 m/sec, 2876369 t fired, .
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RwMutex-PT-r1000w0010-CTLFireability-11: CONJ false CTL model checker
RwMutex-PT-r1000w0010-CTLFireability-12: CTL false CTL model checker
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RwMutex-PT-r1000w0010-CTLFireability-15: CTL true CTL model checker
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TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
7 CTL EXCL 40/473 28/32 RwMutex-PT-r1000w0010-CTLFireability-02 3322548 m, 102804 m/sec, 3405010 t fired, .
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RwMutex-PT-r1000w0010-CTLFireability-12: CTL false CTL model checker
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TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
7 CTL EXCL 45/473 32/32 RwMutex-PT-r1000w0010-CTLFireability-02 3837692 m, 103028 m/sec, 3935038 t fired, .
19 CTL EXCL 45/394 1/5 RwMutex-PT-r1000w0010-CTLFireability-06 20 m, 0 m/sec, 20 t fired, .
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RwMutex-PT-r1000w0010-CTLFireability-05: CTL true CTL model checker
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RwMutex-PT-r1000w0010-CTLFireability-08: CTL true CTL model checker
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RwMutex-PT-r1000w0010-CTLFireability-11: CONJ false CTL model checker
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RwMutex-PT-r1000w0010-CTLFireability-15: CTL true CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
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TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
19 CTL EXCL 50/394 1/5 RwMutex-PT-r1000w0010-CTLFireability-06 22 m, 0 m/sec, 22 t fired, .
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RwMutex-PT-r1000w0010-CTLFireability-05: CTL true CTL model checker
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RwMutex-PT-r1000w0010-CTLFireability-08: CTL true CTL model checker
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RwMutex-PT-r1000w0010-CTLFireability-10: CTL false CTL model checker
RwMutex-PT-r1000w0010-CTLFireability-11: CONJ false CTL model checker
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19 CTL EXCL 460/473 1/5 RwMutex-PT-r1000w0010-CTLFireability-06 77062 m, 2181 m/sec, 568114 t fired, .
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19 CTL EXCL 465/473 1/5 RwMutex-PT-r1000w0010-CTLFireability-06 87956 m, 2178 m/sec, 651899 t fired, .
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19 CTL EXCL 470/473 2/5 RwMutex-PT-r1000w0010-CTLFireability-06 98876 m, 2184 m/sec, 732108 t fired, .
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4 CTL EXCL 5/473 2/32 RwMutex-PT-r1000w0010-CTLFireability-01 163610 m, 32722 m/sec, 922539 t fired, .
19 CTL EXCL 5/1894 1/5 RwMutex-PT-r1000w0010-CTLFireability-06 3 m, -19774 m/sec, 3 t fired, .
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4 CTL EXCL 10/473 4/32 RwMutex-PT-r1000w0010-CTLFireability-01 316265 m, 30531 m/sec, 1842661 t fired, .
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4 CTL EXCL 15/473 6/32 RwMutex-PT-r1000w0010-CTLFireability-01 460271 m, 28801 m/sec, 2767420 t fired, .
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4 CTL EXCL 20/473 7/32 RwMutex-PT-r1000w0010-CTLFireability-01 607838 m, 29513 m/sec, 3662932 t fired, .
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4 CTL EXCL 25/473 9/32 RwMutex-PT-r1000w0010-CTLFireability-01 753956 m, 29223 m/sec, 4625990 t fired, .
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4 CTL EXCL 30/473 10/32 RwMutex-PT-r1000w0010-CTLFireability-01 895703 m, 28349 m/sec, 5535572 t fired, .
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/home/mcc/BenchKit/BenchKit_head.sh: line 62: 426 Killed lola --conf=$BIN_DIR/configfiles/ctlfireabilityconf --formula=$DIR/CTLFireability.xml --verdictfile=$DIR/GenericPropertiesVerdict.xml $DIR/model.pnml
Sequence of Actions to be Executed by the VM
This is useful if one wants to reexecute the tool in the VM from the submitted image disk.
set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="RwMutex-PT-r1000w0010"
export BK_EXAMINATION="CTLFireability"
export BK_TOOL="lola"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"
# this is specific to your benchmark or test
export BIN_DIR="$HOME/BenchKit/bin"
# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi
# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-4028"
echo " Executing tool lola"
echo " Input is RwMutex-PT-r1000w0010, examination is CTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r194-smll-162089449000194"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"
tar xzf /home/mcc/BenchKit/INPUTS/RwMutex-PT-r1000w0010.tgz
mv RwMutex-PT-r1000w0010 execution
cd execution
if [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "UpperBounds" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] || [ "CTLFireability" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh
echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property CTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "CTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '
echo "FORMULA_NAME $x"
done
elif [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] ; then
echo "FORMULA_NAME CTLFireability"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;