Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/data/fkordon/mcc2021-input.r144-tall-162089134800301.qcow2', fmt=qcow2 size=4294967296 backing_file='/data/fkordon/mcc2021-input.qcow2' encryption=off cluster_size=65536 lazy_refcounts=off
Waiting for the VM to be ready (probing ssh)
........................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................
=====================================================================
Generated by BenchKit 2-4028
Executing tool lola
Input is PermAdmissibility-COL-10, examination is ReachabilityDeadlock
Time confinement is 1800 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r144-tall-162089134800301
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 392K
-rw-r--r-- 1 mcc users 12K May 5 16:58 CTLCardinality.txt
-rw-r--r-- 1 mcc users 115K May 10 09:43 CTLCardinality.xml
-rw-r--r-- 1 mcc users 12K May 5 16:58 CTLFireability.txt
-rw-r--r-- 1 mcc users 87K May 10 09:43 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K May 6 14:48 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 3.2K Mar 28 16:24 LTLCardinality.txt
-rw-r--r-- 1 mcc users 23K Mar 28 16:24 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.2K Mar 28 16:24 LTLFireability.txt
-rw-r--r-- 1 mcc users 16K Mar 28 16:24 LTLFireability.xml
-rw-r--r-- 1 mcc users 4.4K Mar 27 06:59 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 24K Mar 27 06:59 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 2.6K Mar 25 08:17 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 12K Mar 25 08:17 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.7K Mar 22 09:15 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.8K Mar 22 09:15 UpperBounds.xml
-rw-r--r-- 1 mcc users 5 May 5 16:51 equiv_pt
-rw-r--r-- 1 mcc users 3 May 5 16:51 instance
-rw-r--r-- 1 mcc users 5 May 5 16:51 iscolored
-rw-r--r-- 1 mcc users 37K May 5 16:51 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

FORMULA_NAME ReachabilityDeadlock

=== Now, execution of the tool begins

BK_START 1620945539772

starting LoLA
BK_INPUT PermAdmissibility-COL-10
BK_EXAMINATION: ReachabilityDeadlock
bin directory: /home/mcc/BenchKit/bin
current directory: /home/mcc/execution
GlobalProperty: ReachabilityDeadlock

FORMULA ReachabilityDeadlock TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

BK_STOP 1620945540164

--------------------
content from stderr:

lola: MEM LIMIT 32
lola: MEM LIMIT 5
lola: NET
lola: input: PNML file (--pnmlnet)
lola: reading net from /home/mcc/execution/model.pnml
lola: reading pnml
lola: PNML file contains High-Level net
lola: finished parsing
lola: closed net file /home/mcc/execution/model.pnml
lola: TR BINDINGS
lola: TR BINDINGS DONE
lola: Places: 208, Transitions: 1024
lola: @ trans switch9
lola: @ trans switch3
lola: @ trans switch4
lola: @ trans display4
lola: @ trans display3
lola: @ trans switch7
lola: @ trans switch8
lola: @ trans switch11
lola: @ trans switch10
lola: @ trans switch2
lola: @ trans switch1
lola: @ trans switch5
lola: @ trans switch12
lola: @ trans display2
lola: @ trans display1
lola: @ trans switch6
lola: REM DEA TR: t = t962
lola: REM DEA TR: t = t970
lola: REM DEA TR: t = t978
lola: REM DEA TR: t = t986
lola: REM DEA TR: t = t994
lola: REM DEA TR: t = t1002
lola: REM DEA TR: t = t1010
lola: REM DEA TR: t = t1018
lola: REM DEA TR: t = t720
lola: REM DEA TR: t = t721
lola: REM DEA TR: t = t722
lola: REM DEA TR: t = t723
lola: REM DEA TR: t = t724
lola: REM DEA TR: t = t725
lola: REM DEA TR: t = t726
lola: REM DEA TR: t = t727
lola: REM DEA TR: t = t963
lola: REM DEA TR: t = t971
lola: REM DEA TR: t = t979
lola: REM DEA TR: t = t987
lola: REM DEA TR: t = t995
lola: REM DEA TR: t = t1003
lola: REM DEA TR: t = t1011
lola: REM DEA TR: t = t1019
lola: REM DEA TR: t = t728
lola: REM DEA TR: t = t729
lola: REM DEA TR: t = t730
lola: REM DEA TR: t = t731
lola: REM DEA TR: t = t732
lola: REM DEA TR: t = t733
lola: REM DEA TR: t = t734
lola: REM DEA TR: t = t735
lola: REM DEA TR: t = t966
lola: REM DEA TR: t = t974
lola: REM DEA TR: t = t982
lola: REM DEA TR: t = t990
lola: REM DEA TR: t = t998
lola: REM DEA TR: t = t1006
lola: REM DEA TR: t = t1014
lola: REM DEA TR: t = t1022
lola: REM DEA TR: t = t752
lola: REM DEA TR: t = t753
lola: REM DEA TR: t = t754
lola: REM DEA TR: t = t755
lola: REM DEA TR: t = t756
lola: REM DEA TR: t = t757
lola: REM DEA TR: t = t758
lola: REM DEA TR: t = t759
lola: REM DEA TR: t = t967
lola: REM DEA TR: t = t975
lola: REM DEA TR: t = t983
lola: REM DEA TR: t = t991
lola: REM DEA TR: t = t999
lola: REM DEA TR: t = t1007
lola: REM DEA TR: t = t1015
lola: REM DEA TR: t = t1023
lola: REM DEA TR: t = t760
lola: REM DEA TR: t = t761
lola: REM DEA TR: t = t762
lola: REM DEA TR: t = t763
lola: REM DEA TR: t = t764
lola: REM DEA TR: t = t765
lola: REM DEA TR: t = t766
lola: REM DEA TR: t = t767
lola: REM DEA TR: t = t336
lola: REM DEA TR: t = t337
lola: REM DEA TR: t = t338
lola: REM DEA TR: t = t339
lola: REM DEA TR: t = t340
lola: REM DEA TR: t = t341
lola: REM DEA TR: t = t342
lola: REM DEA TR: t = t343
lola: REM DEA TR: t = t386
lola: REM DEA TR: t = t394
lola: REM DEA TR: t = t402
lola: REM DEA TR: t = t410
lola: REM DEA TR: t = t418
lola: REM DEA TR: t = t426
lola: REM DEA TR: t = t434
lola: REM DEA TR: t = t442
lola: REM DEA TR: t = t344
lola: REM DEA TR: t = t345
lola: REM DEA TR: t = t346
lola: REM DEA TR: t = t347
lola: REM DEA TR: t = t348
lola: REM DEA TR: t = t349
lola: REM DEA TR: t = t350
lola: REM DEA TR: t = t351
lola: REM DEA TR: t = t387
lola: REM DEA TR: t = t395
lola: REM DEA TR: t = t403
lola: REM DEA TR: t = t411
lola: REM DEA TR: t = t419
lola: REM DEA TR: t = t427
lola: REM DEA TR: t = t435
lola: REM DEA TR: t = t443
lola: REM DEA TR: t = t368
lola: REM DEA TR: t = t369
lola: REM DEA TR: t = t370
lola: REM DEA TR: t = t371
lola: REM DEA TR: t = t372
lola: REM DEA TR: t = t373
lola: REM DEA TR: t = t374
lola: REM DEA TR: t = t375
lola: REM DEA TR: t = t390
lola: REM DEA TR: t = t398
lola: REM DEA TR: t = t406
lola: REM DEA TR: t = t414
lola: REM DEA TR: t = t422
lola: REM DEA TR: t = t430
lola: REM DEA TR: t = t438
lola: REM DEA TR: t = t446
lola: REM DEA TR: t = t376
lola: REM DEA TR: t = t377
lola: REM DEA TR: t = t378
lola: REM DEA TR: t = t379
lola: REM DEA TR: t = t380
lola: REM DEA TR: t = t381
lola: REM DEA TR: t = t382
lola: REM DEA TR: t = t383
lola: REM DEA TR: t = t391
lola: REM DEA TR: t = t399
lola: REM DEA TR: t = t407
lola: REM DEA TR: t = t415
lola: REM DEA TR: t = t423
lola: REM DEA TR: t = t431
lola: REM DEA TR: t = t439
lola: REM DEA TR: t = t447
lola: REM DEA TR: t = t64
lola: REM DEA TR: t = t65
lola: REM DEA TR: t = t66
lola: REM DEA TR: t = t67
lola: REM DEA TR: t = t68
lola: REM DEA TR: t = t69
lola: REM DEA TR: t = t70
lola: REM DEA TR: t = t71
lola: REM DEA TR: t = t128
lola: REM DEA TR: t = t129
lola: REM DEA TR: t = t130
lola: REM DEA TR: t = t131
lola: REM DEA TR: t = t132
lola: REM DEA TR: t = t133
lola: REM DEA TR: t = t134
lola: REM DEA TR: t = t135
lola: REM DEA TR: t = t72
lola: REM DEA TR: t = t73
lola: REM DEA TR: t = t74
lola: REM DEA TR: t = t75
lola: REM DEA TR: t = t76
lola: REM DEA TR: t = t77
lola: REM DEA TR: t = t78
lola: REM DEA TR: t = t79
lola: REM DEA TR: t = t136
lola: REM DEA TR: t = t137
lola: REM DEA TR: t = t138
lola: REM DEA TR: t = t139
lola: REM DEA TR: t = t140
lola: REM DEA TR: t = t141
lola: REM DEA TR: t = t142
lola: REM DEA TR: t = t143
lola: REM DEA TR: t = t80
lola: REM DEA TR: t = t81
lola: REM DEA TR: t = t82
lola: REM DEA TR: t = t83
lola: REM DEA TR: t = t84
lola: REM DEA TR: t = t85
lola: REM DEA TR: t = t86
lola: REM DEA TR: t = t87
lola: REM DEA TR: t = t144
lola: REM DEA TR: t = t145
lola: REM DEA TR: t = t146
lola: REM DEA TR: t = t147
lola: REM DEA TR: t = t148
lola: REM DEA TR: t = t149
lola: REM DEA TR: t = t150
lola: REM DEA TR: t = t151
lola: REM DEA TR: t = t88
lola: REM DEA TR: t = t89
lola: REM DEA TR: t = t90
lola: REM DEA TR: t = t91
lola: REM DEA TR: t = t92
lola: REM DEA TR: t = t93
lola: REM DEA TR: t = t94
lola: REM DEA TR: t = t95
lola: REM DEA TR: t = t152
lola: REM DEA TR: t = t153
lola: REM DEA TR: t = t154
lola: REM DEA TR: t = t155
lola: REM DEA TR: t = t156
lola: REM DEA TR: t = t157
lola: REM DEA TR: t = t158
lola: REM DEA TR: t = t159
lola: REM DEA TR: t = t96
lola: REM DEA TR: t = t97
lola: REM DEA TR: t = t98
lola: REM DEA TR: t = t99
lola: REM DEA TR: t = t100
lola: REM DEA TR: t = t101
lola: REM DEA TR: t = t102
lola: REM DEA TR: t = t103
lola: REM DEA TR: t = t160
lola: REM DEA TR: t = t161
lola: REM DEA TR: t = t162
lola: REM DEA TR: t = t163
lola: REM DEA TR: t = t164
lola: REM DEA TR: t = t165
lola: REM DEA TR: t = t166
lola: REM DEA TR: t = t167
lola: REM DEA TR: t = t104
lola: REM DEA TR: t = t105
lola: REM DEA TR: t = t106
lola: REM DEA TR: t = t107
lola: REM DEA TR: t = t108
lola: REM DEA TR: t = t109
lola: REM DEA TR: t = t110
lola: REM DEA TR: t = t111
lola: REM DEA TR: t = t168
lola: REM DEA TR: t = t169
lola: REM DEA TR: t = t170
lola: REM DEA TR: t = t171
lola: REM DEA TR: t = t172
lola: REM DEA TR: t = t173
lola: REM DEA TR: t = t174
lola: REM DEA TR: t = t175
lola: REM DEA TR: t = t112
lola: REM DEA TR: t = t120
lola: REM DEA TR: t = t176
lola: REM DEA TR: t = t184
lola: REM DEA TR: t = t113
lola: REM DEA TR: t = t121
lola: REM DEA TR: t = t177
lola: REM DEA TR: t = t185
lola: REM DEA TR: t = t116
lola: REM DEA TR: t = t124
lola: REM DEA TR: t = t180
lola: REM DEA TR: t = t188
lola: REM DEA TR: t = t117
lola: REM DEA TR: t = t125
lola: REM DEA TR: t = t181
lola: REM DEA TR: t = t189
lola: REM DEA TR: t = t118
lola: REM DEA TR: t = t126
lola: REM DEA TR: t = t182
lola: REM DEA TR: t = t190
lola: REM DEA TR: t = t119
lola: REM DEA TR: t = t127
lola: REM DEA TR: t = t183
lola: REM DEA TR: t = t191
lola: REM DEA TR: t = t960
lola: REM DEA TR: t = t961
lola: REM DEA TR: t = t964
lola: REM DEA TR: t = t965
lola: REM DEA TR: t = t704
lola: REM DEA TR: t = t712
lola: REM DEA TR: t = t736
lola: REM DEA TR: t = t744
lola: REM DEA TR: t = t968
lola: REM DEA TR: t = t969
lola: REM DEA TR: t = t972
lola: REM DEA TR: t = t973
lola: REM DEA TR: t = t705
lola: REM DEA TR: t = t713
lola: REM DEA TR: t = t737
lola: REM DEA TR: t = t745
lola: REM DEA TR: t = t992
lola: REM DEA TR: t = t993
lola: REM DEA TR: t = t996
lola: REM DEA TR: t = t997
lola: REM DEA TR: t = t708
lola: REM DEA TR: t = t716
lola: REM DEA TR: t = t740
lola: REM DEA TR: t = t748
lola: REM DEA TR: t = t1000
lola: REM DEA TR: t = t1001
lola: REM DEA TR: t = t1004
lola: REM DEA TR: t = t1005
lola: REM DEA TR: t = t709
lola: REM DEA TR: t = t717
lola: REM DEA TR: t = t741
lola: REM DEA TR: t = t749
lola: REM DEA TR: t = t320
lola: REM DEA TR: t = t328
lola: REM DEA TR: t = t352
lola: REM DEA TR: t = t360
lola: REM DEA TR: t = t384
lola: REM DEA TR: t = t385
lola: REM DEA TR: t = t388
lola: REM DEA TR: t = t389
lola: REM DEA TR: t = t321
lola: REM DEA TR: t = t329
lola: REM DEA TR: t = t353
lola: REM DEA TR: t = t361
lola: REM DEA TR: t = t392
lola: REM DEA TR: t = t393
lola: REM DEA TR: t = t396
lola: REM DEA TR: t = t397
lola: REM DEA TR: t = t324
lola: REM DEA TR: t = t332
lola: REM DEA TR: t = t356
lola: REM DEA TR: t = t364
lola: REM DEA TR: t = t416
lola: REM DEA TR: t = t417
lola: REM DEA TR: t = t420
lola: REM DEA TR: t = t421
lola: REM DEA TR: t = t325
lola: REM DEA TR: t = t333
lola: REM DEA TR: t = t357
lola: REM DEA TR: t = t365
lola: REM DEA TR: t = t424
lola: REM DEA TR: t = t425
lola: REM DEA TR: t = t428
lola: REM DEA TR: t = t429
lola: A deadlock is reachable.

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="PermAdmissibility-COL-10"
export BK_EXAMINATION="ReachabilityDeadlock"
export BK_TOOL="lola"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="1800"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-4028"
echo " Executing tool lola"
echo " Input is PermAdmissibility-COL-10, examination is ReachabilityDeadlock"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r144-tall-162089134800301"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/PermAdmissibility-COL-10.tgz
mv PermAdmissibility-COL-10 execution
cd execution
if [ "ReachabilityDeadlock" = "ReachabilityDeadlock" ] || [ "ReachabilityDeadlock" = "UpperBounds" ] || [ "ReachabilityDeadlock" = "QuasiLiveness" ] || [ "ReachabilityDeadlock" = "StableMarking" ] || [ "ReachabilityDeadlock" = "Liveness" ] || [ "ReachabilityDeadlock" = "OneSafe" ] || [ "ReachabilityDeadlock" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "ReachabilityDeadlock" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "ReachabilityDeadlock" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "ReachabilityDeadlock.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property ReachabilityDeadlock.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "ReachabilityDeadlock.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' ReachabilityDeadlock.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ "ReachabilityDeadlock" = "ReachabilityDeadlock" ] || [ "ReachabilityDeadlock" = "QuasiLiveness" ] || [ "ReachabilityDeadlock" = "StableMarking" ] || [ "ReachabilityDeadlock" = "Liveness" ] || [ "ReachabilityDeadlock" = "OneSafe" ] ; then
echo "FORMULA_NAME ReachabilityDeadlock"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;