MCC'2021- Execution of r144-tall-162089134700234

About the Execution of LoLA for ParamProductionCell-PT-1

Execution Summary
Max Memory Used (MB)	Time wait (ms)	CPU Usage (ms)	I/O Wait (ms)	Computed Result	Execution Status
78.924	40.00	60.00	0.00	F	normal

Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/data/fkordon/mcc2021-input.r144-tall
Waiting for the VM to be ready (probing
...........................................
=====================
Generated by BenchKit 2-4028
Executing tool lola
Input is ParamProductionCell-PT-1,
Time confinement is 1800 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r144-tall-16208913470
===========================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 592K
-rw-r--r-- 1 mcc users 23K May 5
-rw-r--r-- 1 mcc users 146K May 10
-rw-r--r-- 1 mcc users 17K May 5
-rw-r--r-- 1 mcc users 92K May 10
-rw-r--r-- 1 mcc users 4.2K May 6
-rw-r--r-- 1 mcc users 4.1K Mar 28
-rw-r--r-- 1 mcc users 25K Mar 28
-rw-r--r-- 1 mcc users 2.5K Mar 28
-rw-r--r-- 1 mcc users 16K Mar 28
-rw-r--r-- 1 mcc users 4.4K Mar 27
-rw-r--r-- 1 mcc users 20K Mar 27
-rw-r--r-- 1 mcc users 3.3K Mar 25
-rw-r--r-- 1 mcc users 16K Mar 25
-rw-r--r-- 1 mcc users 1.9K Mar 22
-rw-r--r-- 1 mcc users 3.9K Mar 22
-rw-r--r-- 1 mcc users 6 May 5
-rw-r--r-- 1 mcc users 2 May 5
-rw-r--r-- 1 mcc users 6 May 5
-rw-r--r-- 1 mcc users 174K May 5

--------------------
content from stdout:

=== Data for post analysis generated

The expected result is a vector of booleans
BOOL_VECTOR

FORMULA_NAME Liveness

=== Now, execution of the tool begins

BK_START 1620945174902

starting LoLA
BK_INPUT ParamProductionCell-PT-1
BK_EXAMINATION: Liveness
bin directory: /home/mcc/BenchKit/bin
current directory: /home/mcc/execution
GlobalProperty: Liveness

FORMULA Liveness FALSE TECHNIQUES

BK_STOP 1620945174942

--------------------
content from stderr:

lola: MEM LIMIT 32
lola: MEM LIMIT 5
lola: NET
lola: input: PNML file (--pnmlnet)
lola: reading net from /home/mcc/executio
lola: reading pnml
lola: PNML file contains place/transition
lola: finished parsing
lola: closed net file /home/mcc/execution
lola: LAUNCH SYMM
lola: ..... CU_lower_Pstart: true
lola: ..... A1L_rot2_Pstop: false
lola: INDIVIDUAL RESULTS
lola: DB_deliver_Pstart:
lola: A1L_rot3_Pstart:
lola: forge_Pstop:
lola: A2U_ret_Cstop:
lola: A1L_rot2_Pstop:
lola: A2L_grasp:
lola: A1U_rot3_Pstart:
lola: press_lock_input_area:
lola: A1L_ext_csc:
lola: CU_lift_Pstop:
lola: A1U_c1:
lola: A1U_c2:
lola: A1U_c3:
lola: A1L_ret_Pstop:
lola: CL_lift_Cstop:
lola: CL_lift_Pstart:
lola: CU_lower_csc:
lola: A2L_rot3_Pstop:
lola: A2L_c1:
lola: A2L_c2:
lola: A2L_c3:
lola: TL_lower_Cstop:
lola: CU_lift_Pstart:
lola: TU_rot_Pstart:
lola: TU_rot_Cstop:
lola: arm2_lock_input_area:
lola: A1L_rot1_Pstop:
lola: TL_rot_csc:
lola: CL_trans_Pstop:
lola: DB_trans_Pstop:
lola: A1U_rot3_Pstop:
lola: CU_trans_Pstop:
lola: A2U_ungrasp:
lola: arm1_lock_swivel_1:
lola: arm1_lock_swivel_2:
lola: A1L_rot3_Cstop:
lola: A2L_rot2_Pstop:
lola: TU_lift_Cstop:
lola: CL_lift_csc:
lola: A2L_rot3_Pstart:
lola: CL_trans_csc:
lola: A2L_ext_Pstop:
lola: A1L_rot1_csc:
lola: A2U_rot2_csc:
lola: A2U_rot3_Pstart:
lola: forge_csc:
lola: A1U_rot2_Pstop:
lola: CU_lower_Pstart:
lola: forge_Cstop:
lola: A1L_rot2_Cstop:
lola: A2L_rot1_Pstop:
lola: CU_lift_Cstop:
lola: A1L_ret_Cstop:
lola: A2U_rot3_Pstop:
lola: A2L_rot3_Cstop:
lola: A1U_rot1_Pstop:
lola: A1U_ret_Pstop:
lola: A1L_rot1_Cstop:
lola: FB_trans_Pstart:
lola: CL_trans_Cstop:
lola: DB_trans_Cstop:
lola: A1U_rot3_Cstop:
lola: PL_lower_csc:
lola: A2U_rot2_Pstop:
lola: CU_trans_Cstop:
lola: A2L_rot2_Cstop:
lola: A1L_rot2_Pstart:
lola: A1L_grasp:
lola: A2L_ext_Cstop:
lola: A1U_rot2_Pstart:
lola: A2L_rot2_csc:
lola: PL_lower_Pstop:
lola: press_lock_output_area:
lola: A1U_rot2_Cstop:
lola: A1U_rot2_csc:
lola: A2U_rot1_Pstop:
lola: crane_lock_input_area:
lola: A2U_ret_csc:
lola: PU_lower_Pstop:
lola: A1U_ungrasp:
lola: A2L_rot1_Cstop:
lola: CU_trans_csc:
lola: A2U_ext_Pstop:
lola: FB_trans_Pstop:
lola: FB_deliver_Pstop:
lola: A2U_rot3_Cstop:
lola: TL_lower_Pstart:
lola: A2U_c1:
lola: A2U_c2:
lola: A2U_c3:
lola: TU_lift_Pstart:
lola: A1U_rot1_Cstop:
lola: crane_lock_output_area:
lola: A1U_ret_Cstop:
lola: arm1_lock_output_area:
lola: A2L_rot2_Pstart:
lola: DB_deliver_csc:
lola: A2U_rot2_Cstop:
lola: A2U_ext_csc:
lola: A2U_rot2_Pstart:
lola: A1L_ret_Pstart:
lola: DB_deliver_Pstop:
lola: PU_lower_csc:
lola: PL_lower_Cstop:
lola: deposit_belt_lock_input_area:
lola: A1L_rot2_csc:
lola: A2U_rot3_csc:
lola: A2U_rot1_Cstop:
lola: PU_lower_Cstop:
lola: CL_lower_Pstop:
lola: A2U_ext_Cstop:
lola: FB_trans_Cstop:
lola: FB_deliver_Cstop:
lola: CU_lower_Pstop:
lola: A1L_ext_Pstop:
lola: CL_grasp:
lola: TL_lower_csc:
lola: A2L_ret_Pstart:
lola: arm1_lock_input_area:
lola: A1U_ret_csc:
lola: A2L_ret_Pstop:
lola: TU_lift_csc:
lola: A1L_rot1_Pstart:
lola: CL_trans_Pstart:
lola: A1U_rot1_Pstart:
lola: A1U_ret_Pstart:
lola: DB_deliver_Cstop:
lola: TL_rot_Pstop:
lola: A2L_ret_csc:
lola: A1L_c1:
lola: A1L_c2:
lola: A1L_c3:
lola: DB_trans_csc:
lola: A2L_rot3_csc:
lola: PL_lower_Pstart:
lola: A1U_ext_csc:
lola: A1L_ext_Pstart:
lola: FB_deliver_csc:
lola: CL_lower_Cstop:
lola: A1U_rot3_csc:
lola: CU_lower_Cstop:
lola: A2U_ret_Pstart:
lola: A2L_rot1_Pstart:
lola: A1L_ext_Cstop:
lola: A2U_rot1_Pstart:
lola: TU_rot_csc:
lola: A2L_ret_Cstop:
lola: A2L_ext_csc:
lola: table_lock_input_area:
lola: A2U_rot1_csc:
lola: forge_Pstart:
lola: arm2_lock_swivel_1:
lola: arm2_lock_swivel_2:
lola: A1U_ext_Pstop:
lola: feed_belt_lock_output_area:
lola: A2L_ext_Pstart:
lola: A2U_ret_Pstop:
lola: CL_lower_csc:
lola: CU_ungrasp:
lola: FB_trans_csc:
lola: TL_rot_Cstop:
lola: deposit_belt_lock_output_area:
lola: CU_trans_Pstart:
lola: CL_lift_Pstop:
lola: A1U_ext_Pstart:
lola: TL_lower_Pstop:
lola: A1L_rot3_csc:
lola: TU_rot_Pstop:
lola: DB_trans_Pstart:
lola: A1L_ret_csc:
lola: feed_belt_lock_input_area:
lola: PU_lower_Pstart:
lola: CL_lower_Pstart:
lola: A1L_rot3_Pstop:
lola: TU_lift_Pstop:
lola: A2L_rot1_csc:
lola: arm2_lock_output_area:
lola: CU_lift_csc:
lola: FB_deliver_Pstart:
lola: A1U_ext_Cstop:
lola: A1U_rot1_csc:
lola: A2U_ext_Pstart:
lola: table_lock_output_area_TL_rot_Pstart:
lola: The net is not live
lola: ..... PU_lower_Pstart: true
lola: Example for violating transition:
-162089134700234.qcow2', fmt=qcow2 size=4294967296 backing_file='/data/fkordon/mcc2021-input.qcow2' encryption=off cluster_size=65536 lazy_refcounts=off ssh) .............................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................. ================================================ examination is Liveness 0234 ========================== 16:58 CTLCardinality.txt 09:43 CTLCardinality.xml 16:58 CTLFireability.txt 09:43 CTLFireability.xml 14:48 GenericPropertiesDefinition.xml 16:23 LTLCardinality.txt 16:23 LTLCardinality.xml 16:23 LTLFireability.txt 16:23 LTLFireability.xml 06:34 ReachabilityCardinality.txt 06:34 ReachabilityCardinality.xml 07:55 ReachabilityFireability.txt 07:55 ReachabilityFireability.xml 09:15 UpperBounds.txt 09:15 UpperBounds.xml 16:51 equiv_col 16:51 instance 16:51 iscolored 16:51 model.pnml by BenchKit (invocation template) COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT n/model.pnml net /model.pnml void (by not produced) void (by not produced) void (by not produced) void (by not produced) false (by universal search) void (by not produced) void (by not produced) void (by not produced) void (by not produced) void (by not produced) void (by not produced) void (by not produced) void (by not produced) void (by not produced) void (by not produced) void (by not produced) void (by not produced) void (by not produced) void (by not produced) void (by not produced) void (by not produced) void (by not produced) void (by not produced) void (by not produced) void (by not produced) void (by not produced) void (by not produced) void (by not produced) void (by not produced) void (by not produced) void (by not produced) void (by not produced) void (by not produced) void (by not produced) void (by not produced) void (by not produced) void (by not produced) void (by not produced) void (by not produced) void (by not produced) void (by not produced) void (by not produced) void (by not produced) void (by not produced) void (by not produced) void (by not produced) void (by not produced) true (by goal oriented search) void (by not produced) void (by not produced) void (by not produced) void (by not produced) void (by not produced) void (by not produced) void (by not produced) void (by not produced) void (by not produced) void (by not produced) void (by not produced) void (by not produced) void (by not produced) void (by not produced) void (by not produced) void (by not produced) void (by not produced) void (by not produced) void (by not produced) void (by not produced) void (by not produced) void (by not produced) void (by not produced) void (by not produced) void (by not produced) void (by not produced) void (by not produced) void (by not produced) void (by not produced) void (by not produced) void (by not produced) void (by not produced) void (by not produced) void (by not produced) void (by not produced) void (by not produced) void (by not produced) void (by not produced) void (by not produced) void (by not produced) void (by not produced) void (by not produced) void (by not produced) void (by not produced) void (by not produced) void (by not produced) void (by not produced) void (by not produced) void (by not produced) void (by not produced) void (by not produced) void (by not produced) void (by not produced) void (by not produced) void (by not produced) void (by not produced) void (by not produced) void (by not produced) void (by not produced) void (by not produced) void (by not produced) void (by not produced) void (by not produced) void (by not produced) void (by not produced) void (by not produced) void (by not produced) void (by not produced) void (by not produced) void (by not produced) void (by not produced) void (by not produced) void (by not produced) void (by not produced) void (by not produced) void (by not produced) void (by not produced) void (by not produced) void (by not produced) void (by not produced) void (by not produced) void (by not produced) void (by not produced) void (by not produced) void (by not produced) void (by not produced) void (by not produced) void (by not produced) void (by not produced) void (by not produced) void (by not produced) void (by not produced) void (by not produced) void (by not produced) void (by not produced) void (by not produced) void (by not produced) void (by not produced) void (by not produced) void (by not produced) void (by not produced) void (by not produced) void (by not produced) void (by not produced) void (by not produced) void (by not produced) void (by not produced) void (by not produced) void (by not produced) void (by not produced) void (by not produced) void (by not produced) void (by not produced) void (by not produced) void (by not produced) void (by not produced) void (by not produced) void (by not produced) void (by not produced) void (by not produced) void (by not produced) void (by not produced) void (by not produced) void (by not produced) void (by not produced) void (by not produced) void (by not produced) void (by not produced) void (by not produced) void (by not produced) void (by not produced) void (by not produced) void (by not produced) void (by not produced) void (by not produced) A1L_rot2_Pstop

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="ParamProductionCell-PT-1"
export BK_EXAMINATION="Liveness"
export BK_TOOL="lola"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="1800"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-4028"
echo " Executing tool lola"
echo " Input is ParamProductionCell-PT-1, examination is Liveness"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r144-tall-162089134700234"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/ParamProductionCell-PT-1.tgz
mv ParamProductionCell-PT-1 execution
cd execution
if [ "Liveness" = "ReachabilityDeadlock" ] || [ "Liveness" = "UpperBounds" ] || [ "Liveness" = "QuasiLiveness" ] || [ "Liveness" = "StableMarking" ] || [ "Liveness" = "Liveness" ] || [ "Liveness" = "OneSafe" ] || [ "Liveness" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "Liveness" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "Liveness" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "Liveness.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property Liveness.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "Liveness.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' Liveness.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ "Liveness" = "ReachabilityDeadlock" ] || [ "Liveness" = "QuasiLiveness" ] || [ "Liveness" = "StableMarking" ] || [ "Liveness" = "Liveness" ] || [ "Liveness" = "OneSafe" ] ; then
echo "FORMULA_NAME Liveness"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;