About the Execution of ITS-Tools for PermAdmissibility-COL-05
| Execution Summary | |||||
| Max Memory Used (MB) |
Time wait (ms) | CPU Usage (ms) | I/O Wait (ms) | Computed Result | Execution Status |
| 945.443 | 70855.00 | 79494.00 | 4546.90 | TFFTTT?F??F????T | normal |
Execution Chart
We display below the execution chart for this examination (boot time has been removed).
Trace from the execution
Formatting '/data/fkordon/mcc2021-input.r140-tall-162089127900477.qcow2', fmt=qcow2 size=4294967296 backing_file='/data/fkordon/mcc2021-input.qcow2' encryption=off cluster_size=65536 lazy_refcounts=off
Waiting for the VM to be ready (probing ssh)
........................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................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=====================================================================
Generated by BenchKit 2-4028
Executing tool itstools
Input is PermAdmissibility-COL-05, examination is LTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r140-tall-162089127900477
=====================================================================
--------------------
preparation of the directory to be used:
/home/mcc/execution
total 396K
-rw-r--r-- 1 mcc users 12K May 5 16:58 CTLCardinality.txt
-rw-r--r-- 1 mcc users 105K May 10 09:43 CTLCardinality.xml
-rw-r--r-- 1 mcc users 11K May 5 16:58 CTLFireability.txt
-rw-r--r-- 1 mcc users 78K May 10 09:43 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K May 6 14:48 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.3K May 6 14:48 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 3.5K Mar 28 16:24 LTLCardinality.txt
-rw-r--r-- 1 mcc users 27K Mar 28 16:24 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.2K Mar 28 16:24 LTLFireability.txt
-rw-r--r-- 1 mcc users 16K Mar 28 16:24 LTLFireability.xml
-rw-r--r-- 1 mcc users 3.1K Mar 27 06:58 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 14K Mar 27 06:58 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 2.8K Mar 25 08:17 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 14K Mar 25 08:17 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.7K Mar 22 09:15 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.8K Mar 22 09:15 UpperBounds.xml
-rw-r--r-- 1 mcc users 5 May 5 16:51 equiv_pt
-rw-r--r-- 1 mcc users 3 May 5 16:51 instance
-rw-r--r-- 1 mcc users 5 May 5 16:51 iscolored
-rw-r--r-- 1 mcc users 54K May 5 16:51 model.pnml
--------------------
content from stdout:
=== Data for post analysis generated by BenchKit (invocation template)
The expected result is a vector of booleans
BOOL_VECTOR
here is the order used to build the result vector(from text file)
FORMULA_NAME PermAdmissibility-COL-05-00
FORMULA_NAME PermAdmissibility-COL-05-01
FORMULA_NAME PermAdmissibility-COL-05-02
FORMULA_NAME PermAdmissibility-COL-05-03
FORMULA_NAME PermAdmissibility-COL-05-04
FORMULA_NAME PermAdmissibility-COL-05-05
FORMULA_NAME PermAdmissibility-COL-05-06
FORMULA_NAME PermAdmissibility-COL-05-07
FORMULA_NAME PermAdmissibility-COL-05-08
FORMULA_NAME PermAdmissibility-COL-05-09
FORMULA_NAME PermAdmissibility-COL-05-10
FORMULA_NAME PermAdmissibility-COL-05-11
FORMULA_NAME PermAdmissibility-COL-05-12
FORMULA_NAME PermAdmissibility-COL-05-13
FORMULA_NAME PermAdmissibility-COL-05-14
FORMULA_NAME PermAdmissibility-COL-05-15
=== Now, execution of the tool begins
BK_START 1620988841258
Running Version 0
[2021-05-14 10:40:42] [INFO ] Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, LTLFireability, -spotpath, /home/mcc/BenchKit/bin//..//ltlfilt, -z3path, /home/mcc/BenchKit/bin//..//z3/bin/z3, -yices2path, /home/mcc/BenchKit/bin//..//yices/bin/yices, -its, -ltsmin, -greatspnpath, /home/mcc/BenchKit/bin//..//greatspn/, -order, META, -manyOrder, -smt, -timeout, 3600]
[2021-05-14 10:40:42] [INFO ] Parsing pnml file : /home/mcc/execution/model.pnml
[2021-05-14 10:40:42] [INFO ] Detected file is not PT type :http://www.pnml.org/version-2009/grammar/symmetricnet
log4j:WARN No appenders could be found for logger (org.apache.axiom.locator.DefaultOMMetaFactoryLocator).
log4j:WARN Please initialize the log4j system properly.
[2021-05-14 10:40:43] [WARNING] Using fallBack plugin, rng conformance not checked
[2021-05-14 10:40:43] [INFO ] Load time of PNML (colored model parsed with PNMLFW) : 577 ms
[2021-05-14 10:40:43] [INFO ] Imported 40 HL places and 16 HL transitions for a total of 208 PT places and 1024.0 transition bindings in 18 ms.
Parsed 16 properties from file /home/mcc/execution/LTLFireability.xml in 9 ms.
Working with output stream class java.io.PrintStream
[2021-05-14 10:40:43] [INFO ] Built PT skeleton of HLPN with 40 places and 16 transitions in 3 ms.
[2021-05-14 10:40:43] [INFO ] Skeletonized HLPN properties in 0 ms.
Successfully produced net in file /tmp/petri1000_18204271727716997865.dot
Finished random walk after 0 steps, including 0 resets, run visited all 0 properties in 1 ms. (steps per millisecond=0 )
[2021-05-14 10:40:43] [INFO ] Flatten gal took : 20 ms
[2021-05-14 10:40:43] [INFO ] Flatten gal took : 5 ms
[2021-05-14 10:40:43] [INFO ] Unfolded HLPN to a Petri net with 208 places and 1024 transitions in 13 ms.
[2021-05-14 10:40:43] [INFO ] Unfolded HLPN properties in 1 ms.
Successfully produced net in file /tmp/petri1001_6562995162842131587.dot
[2021-05-14 10:40:43] [INFO ] Initial state test concluded for 3 properties.
Deduced a syphon composed of 40 places in 4 ms
Reduce places removed 40 places and 432 transitions.
FORMULA PermAdmissibility-COL-05-03 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
Support contains 101 out of 168 places. Attempting structural reductions.
Starting structural reductions, iteration 0 : 168/168 places, 592/592 transitions.
Reduce places removed 64 places and 0 transitions.
Iterating post reduction 0 with 64 rules applied. Total rules applied 64 place count 104 transition count 592
Applied a total of 64 rules in 17 ms. Remains 104 /168 variables (removed 64) and now considering 592/592 (removed 0) transitions.
// Phase 1: matrix 592 rows 104 cols
[2021-05-14 10:40:43] [INFO ] Computed 16 place invariants in 34 ms
[2021-05-14 10:40:43] [INFO ] Implicit Places using invariants in 147 ms returned []
// Phase 1: matrix 592 rows 104 cols
[2021-05-14 10:40:43] [INFO ] Computed 16 place invariants in 9 ms
[2021-05-14 10:40:44] [INFO ] Implicit Places using invariants and state equation in 159 ms returned []
Implicit Place search using SMT with State Equation took 331 ms to find 0 implicit places.
// Phase 1: matrix 592 rows 104 cols
[2021-05-14 10:40:44] [INFO ] Computed 16 place invariants in 8 ms
[2021-05-14 10:40:44] [INFO ] Dead Transitions using invariants and state equation in 260 ms returned []
Finished structural reductions, in 1 iterations. Remains : 104/168 places, 592/592 transitions.
[2021-05-14 10:40:44] [INFO ] Initial state reduction rules for LTL removed 2 formulas.
[2021-05-14 10:40:44] [INFO ] Flatten gal took : 86 ms
FORMULA PermAdmissibility-COL-05-15 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA PermAdmissibility-COL-05-10 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
[2021-05-14 10:40:44] [INFO ] Flatten gal took : 70 ms
[2021-05-14 10:40:44] [INFO ] Input system was already deterministic with 592 transitions.
Finished random walk after 146 steps, including 1 resets, run visited all 16 properties in 6 ms. (steps per millisecond=24 )
Running Spot : CommandLine [args=[/home/mcc/BenchKit/bin//..//ltl2tgba, --hoaf=tv, -f, !(F(G((p0||F(p1)))))], workingDir=/home/mcc/execution]
Support contains 14 out of 104 places. Attempting structural reductions.
Starting structural reductions, iteration 0 : 104/104 places, 592/592 transitions.
Discarding 28 places :
Symmetric choice reduction at 0 with 28 rule applications. Total rules 28 place count 76 transition count 340
Iterating global reduction 0 with 28 rules applied. Total rules applied 56 place count 76 transition count 340
Discarding 28 places :
Symmetric choice reduction at 0 with 28 rule applications. Total rules 84 place count 48 transition count 88
Iterating global reduction 0 with 28 rules applied. Total rules applied 112 place count 48 transition count 88
Discarding 6 places :
Symmetric choice reduction at 0 with 6 rule applications. Total rules 118 place count 42 transition count 58
Iterating global reduction 0 with 6 rules applied. Total rules applied 124 place count 42 transition count 58
Applied a total of 124 rules in 34 ms. Remains 42 /104 variables (removed 62) and now considering 58/592 (removed 534) transitions.
// Phase 1: matrix 58 rows 42 cols
[2021-05-14 10:40:44] [INFO ] Computed 16 place invariants in 1 ms
[2021-05-14 10:40:44] [INFO ] Implicit Places using invariants in 34 ms returned [4, 5, 6, 7, 20, 21, 34, 35, 37, 38]
Discarding 10 places :
Implicit Place search using SMT only with invariants took 35 ms to find 10 implicit places.
[2021-05-14 10:40:44] [INFO ] Redundant transitions in 1 ms returned []
// Phase 1: matrix 58 rows 32 cols
[2021-05-14 10:40:44] [INFO ] Computed 6 place invariants in 1 ms
[2021-05-14 10:40:44] [INFO ] Dead Transitions using invariants and state equation in 30 ms returned []
Starting structural reductions, iteration 1 : 32/104 places, 58/592 transitions.
Drop transitions removed 9 transitions
Trivial Post-agglo rules discarded 9 transitions
Performed 9 trivial Post agglomeration. Transition count delta: 9
Iterating post reduction 0 with 9 rules applied. Total rules applied 9 place count 32 transition count 49
Reduce places removed 9 places and 0 transitions.
Iterating post reduction 1 with 9 rules applied. Total rules applied 18 place count 23 transition count 49
Performed 1 Post agglomeration using F-continuation condition.Transition count delta: 1
Deduced a syphon composed of 1 places in 0 ms
Reduce places removed 1 places and 0 transitions.
Iterating global reduction 2 with 2 rules applied. Total rules applied 20 place count 22 transition count 48
Applied a total of 20 rules in 6 ms. Remains 22 /32 variables (removed 10) and now considering 48/58 (removed 10) transitions.
// Phase 1: matrix 48 rows 22 cols
[2021-05-14 10:40:44] [INFO ] Computed 6 place invariants in 0 ms
[2021-05-14 10:40:45] [INFO ] Implicit Places using invariants in 21 ms returned []
// Phase 1: matrix 48 rows 22 cols
[2021-05-14 10:40:45] [INFO ] Computed 6 place invariants in 1 ms
[2021-05-14 10:40:45] [INFO ] Implicit Places using invariants and state equation in 21 ms returned []
Implicit Place search using SMT with State Equation took 43 ms to find 0 implicit places.
Finished structural reductions, in 2 iterations. Remains : 22/104 places, 48/592 transitions.
Stuttering acceptance computed with spot in 164 ms :[(AND (NOT p0) (NOT p1)), (AND (NOT p0) (NOT p1))]
Running random walk in product with property : PermAdmissibility-COL-05-00 automaton TGBA [mat=[[{ cond=true, acceptance={} source=0 dest: 0}, { cond=(AND (NOT p0) (NOT p1)), acceptance={} source=0 dest: 1}], [{ cond=(AND (NOT p0) (NOT p1)), acceptance={0} source=1 dest: 1}, { cond=(AND p0 (NOT p1)), acceptance={} source=1 dest: 1}]], initial=0, aps=[p0:(AND (OR (LT s4 1) (LT s9 1) (LT s11 1)) (OR (LT s4 1) (LT s8 1) (LT s11 1)) (OR (LT s4 1) (LT s8 1) (LT s10 1)) (OR (LT s4 1) (LT s9 1) (LT s10 1))), p1:(AND (OR (LT s14 1) (LT s16 1) (LT s18 1)) (OR (LT s12 1) (LT s16 1) (LT s18 1)) (OR (LT s14 1) (LT s16 1) (LT s20 1)) (OR (LT s13 1) (LT s16 1) (LT s20 1)) (OR (LT s13 1) (LT s16 1) (LT s18 1)) (OR (LT s15 1) (LT s16 1) (LT s17 1)) (OR (LT s12 1) (LT s16 1) (LT s20 1)) (OR (LT s15 1) (LT s16 1) (LT s19 1)) (OR (LT s14 1) (LT s16 1) (LT s19 1)) (OR (LT s12 1) (LT s16 1) (LT s17 1)) (OR (LT s12 1) (LT s16 1) (LT s19 1)) (OR (LT s13 1) (LT s16 1) (LT s19 1)) (OR (LT s13 1) (LT s16 1) (LT s17 1)) (OR (LT s15 1) (LT s16 1) (LT s18 1)) (OR (LT s14 1) (LT s16 1) (LT s17 1)) (OR (LT s15 1) (LT s16 1) (LT s20 1)))], nbAcceptance=1, properties=[trans-labels, explicit-labels, trans-acc, no-univ-branch, stutter-invariant], stateDesc=[null, null][true, true]]
Product exploration explored 100000 steps with 4439 reset in 418 ms.
Product exploration explored 100000 steps with 4452 reset in 381 ms.
Complete graph has no SCC; deadlocks are unavoidable. place count 22 transition count 48
Detected that all paths lead to deadlock. Applying this knowledge to assert that all AP eventually converge : F ( (Ga|G!a) & (Gb|G!b)...)
Knowledge obtained : [(F (G p0)), (F (G p1)), p0, p1]
Property proved to be true thanks to knowledge :(F (G p0))
FORMULA PermAdmissibility-COL-05-00 TRUE TECHNIQUES STRUCTURAL INITIAL_STATE
Treatment of property PermAdmissibility-COL-05-00 finished in 1225 ms.
Running Spot : CommandLine [args=[/home/mcc/BenchKit/bin//..//ltl2tgba, --hoaf=tv, -f, !(X((G(p0)&&F(p1))))], workingDir=/home/mcc/execution]
Support contains 22 out of 104 places. Attempting structural reductions.
Starting structural reductions, iteration 0 : 104/104 places, 592/592 transitions.
Discarding 14 places :
Symmetric choice reduction at 0 with 14 rule applications. Total rules 14 place count 90 transition count 466
Iterating global reduction 0 with 14 rules applied. Total rules applied 28 place count 90 transition count 466
Applied a total of 28 rules in 28 ms. Remains 90 /104 variables (removed 14) and now considering 466/592 (removed 126) transitions.
// Phase 1: matrix 466 rows 90 cols
[2021-05-14 10:40:46] [INFO ] Computed 16 place invariants in 4 ms
[2021-05-14 10:40:46] [INFO ] Implicit Places using invariants in 82 ms returned [76, 78]
Discarding 2 places :
Implicit Place search using SMT only with invariants took 84 ms to find 2 implicit places.
// Phase 1: matrix 466 rows 88 cols
[2021-05-14 10:40:46] [INFO ] Computed 14 place invariants in 5 ms
[2021-05-14 10:40:46] [INFO ] Dead Transitions using invariants and state equation in 163 ms returned []
Starting structural reductions, iteration 1 : 88/104 places, 466/592 transitions.
Applied a total of 0 rules in 4 ms. Remains 88 /88 variables (removed 0) and now considering 466/466 (removed 0) transitions.
// Phase 1: matrix 466 rows 88 cols
[2021-05-14 10:40:46] [INFO ] Computed 14 place invariants in 9 ms
[2021-05-14 10:40:46] [INFO ] Dead Transitions using invariants and state equation in 166 ms returned []
Finished structural reductions, in 2 iterations. Remains : 88/104 places, 466/592 transitions.
Stuttering acceptance computed with spot in 93 ms :[(NOT p0), (OR (NOT p0) (NOT p1)), true, (OR (NOT p1) (NOT p0))]
Running random walk in product with property : PermAdmissibility-COL-05-01 automaton TGBA [mat=[[{ cond=p0, acceptance={} source=0 dest: 0}, { cond=(NOT p0), acceptance={} source=0 dest: 2}], [{ cond=true, acceptance={} source=1 dest: 3}], [{ cond=true, acceptance={0} source=2 dest: 2}], [{ cond=(AND p0 p1), acceptance={0} source=3 dest: 0}, { cond=(NOT p0), acceptance={0} source=3 dest: 2}, { cond=(AND p0 (NOT p1)), acceptance={0} source=3 dest: 3}]], initial=1, aps=[p0:(AND (OR (LT s70 1) (LT s80 1) (LT s85 1)) (OR (LT s69 1) (LT s83 1) (LT s85 1)) (OR (LT s73 1) (LT s81 1) (LT s85 1)) (OR (LT s74 1) (LT s79 1) (LT s85 1)) (OR (LT s71 1) (LT s78 1) (LT s85 1)) (OR (LT s72 1) (LT s84 1) (LT s85 1)) (OR (LT s75 1) (LT s77 1) (LT s85 1)) (OR (LT s69 1) (LT s84 1) (LT s85 1)) (OR (LT s70 1) (LT s81 1) (LT s85 1)) (OR (LT s73 1) (LT s83 1) (LT s85 1)) (OR (LT s71 1) (LT s79 1) (LT s85 1)) (OR (LT s73 1) (LT s82 1) (LT s85 1)) (OR (LT s70 1) (LT s82 1) (LT s85 1)) (OR (LT s74 1) (LT s80 1) (LT s85 1)) (OR (LT s74 1) (LT s81 1) (LT s85 1)) (OR (LT s75 1) (LT s78 1) (LT s85 1)) (OR (LT s72 1) (LT s77 1) (LT s85 1)) (OR (LT s68 1) (LT s79 1) (LT s85 1)) (OR (LT s73 1) (LT s84 1) (LT s85 1)) (OR (LT s70 1) (LT s83 1) (LT s85 1)) (OR (LT s71 1) (LT s80 1) (LT s85 1)) (OR (LT s72 1) (LT s78 1) (LT s85 1)) (OR (LT s71 1) (LT s81 1) (LT s85 1)) (OR (LT s75 1) (LT s79 1) (LT s85 1)) (OR (LT s68 1) (LT s80 1) (LT s85 1)) (OR (LT s70 1) (LT s84 1) (LT s85 1)) (OR (LT s74 1) (LT s82 1) (LT s85 1)) (OR (LT s69 1) (LT s78 1) (LT s85 1)) (OR (LT s71 1) (LT s82 1) (LT s85 1)) (OR (LT s72 1) (LT s79 1) (LT s85 1)) (OR (LT s68 1) (LT s81 1) (LT s85 1)) (OR (LT s75 1) (LT s81 1) (LT s85 1)) (OR (LT s73 1) (LT s77 1) (LT s85 1)) (OR (LT s75 1) (LT s80 1) (LT s85 1)) (OR (LT s72 1) (LT s80 1) (LT s85 1)) (OR (LT s69 1) (LT s77 1) (LT s85 1)) (OR (LT s69 1) (LT s79 1) (LT s85 1)) (OR (LT s74 1) (LT s83 1) (LT s85 1)) (OR (LT s68 1) (LT s82 1) (LT s85 1)) (OR (LT s71 1) (LT s83 1) (LT s85 1)) (OR (LT s75 1) (LT s82 1) (LT s85 1)) (OR (LT s70 1) (LT s77 1) (LT s85 1)) (OR (LT s74 1) (LT s84 1) (LT s85 1)) (OR (LT s72 1) (LT s81 1) (LT s85 1)) (OR (LT s73 1) (LT s78 1) (LT s85 1)) (OR (LT s69 1) (LT s80 1) (LT s85 1)) (OR (LT s75 1) (LT s83 1) (LT s85 1)) (OR (LT s73 1) (LT s79 1) (LT s85 1)) (OR (LT s68 1) (LT s83 1) (LT s85 1)) (OR (LT s68 1) (LT s78 1) (LT s85 1)) (OR (LT s70 1) (LT s78 1) (LT s85 1)) (OR (LT s69 1) (LT s81 1) (LT s85 1)) (OR (LT s71 1) (LT s84 1) (LT s85 1)) (OR (LT s68 1) (LT s84 1) (LT s85 1)) (OR (LT s72 1) (LT s82 1) (LT s85 1)) (OR (LT s72 1) (LT s83 1) (LT s85 1)) (OR (LT s73 1) (LT s80 1) (LT s85 1)) (OR (LT s68 1) (LT s77 1) (LT s85 1)) (OR (LT s74 1) (LT s77 1) (LT s85 1)) (OR (LT s70 1) (LT s79 1) (LT s85 1)) (OR (LT s75 1) (LT s84 1) (LT s85 1)) (OR (LT s74 1) (LT s78 1) (LT s85 1)) (OR (LT s69 1) (LT s82 1) (LT s85 1)) (OR (LT s71 1) (LT s77 1) (LT s85 1))), p1:(AND (OR (LT s41 1) (LT s44 1) (LT s46 1)) (OR (LT s41 1) (LT s45 1) (LT s46 1)) (OR (LT s41 1) (LT s45 1) (LT s47 1)) (OR (LT s41 1) (LT s44 1) (LT s47 1)))], nbAcceptance=1, properties=[trans-labels, explicit-labels, trans-acc, complete, deterministic, no-univ-branch, unambiguous, semi-deterministic, very-weak, weak, inherently-weak], stateDesc=[null, null, null, null][false, false, false, false]]
Entered a terminal (fully accepting) state of product in 59 steps with 0 reset in 1 ms.
FORMULA PermAdmissibility-COL-05-01 FALSE TECHNIQUES STUTTER_TEST
Treatment of property PermAdmissibility-COL-05-01 finished in 556 ms.
Running Spot : CommandLine [args=[/home/mcc/BenchKit/bin//..//ltl2tgba, --hoaf=tv, -f, !(X(X(((G(p1)&&X(F((X(p3)||p2))))||p0))))], workingDir=/home/mcc/execution]
Support contains 39 out of 104 places. Attempting structural reductions.
Starting structural reductions, iteration 0 : 104/104 places, 592/592 transitions.
Discarding 28 places :
Symmetric choice reduction at 0 with 28 rule applications. Total rules 28 place count 76 transition count 340
Iterating global reduction 0 with 28 rules applied. Total rules applied 56 place count 76 transition count 340
Applied a total of 56 rules in 5 ms. Remains 76 /104 variables (removed 28) and now considering 340/592 (removed 252) transitions.
// Phase 1: matrix 340 rows 76 cols
[2021-05-14 10:40:46] [INFO ] Computed 16 place invariants in 3 ms
[2021-05-14 10:40:46] [INFO ] Implicit Places using invariants in 44 ms returned [68, 69, 71, 72]
Discarding 4 places :
Implicit Place search using SMT only with invariants took 45 ms to find 4 implicit places.
// Phase 1: matrix 340 rows 72 cols
[2021-05-14 10:40:46] [INFO ] Computed 12 place invariants in 3 ms
[2021-05-14 10:40:46] [INFO ] Dead Transitions using invariants and state equation in 126 ms returned []
Starting structural reductions, iteration 1 : 72/104 places, 340/592 transitions.
Applied a total of 0 rules in 3 ms. Remains 72 /72 variables (removed 0) and now considering 340/340 (removed 0) transitions.
// Phase 1: matrix 340 rows 72 cols
[2021-05-14 10:40:46] [INFO ] Computed 12 place invariants in 2 ms
[2021-05-14 10:40:46] [INFO ] Dead Transitions using invariants and state equation in 120 ms returned []
Finished structural reductions, in 2 iterations. Remains : 72/104 places, 340/592 transitions.
Stuttering acceptance computed with spot in 197 ms :[(NOT p1), (OR (AND (NOT p0) (NOT p2) (NOT p3)) (AND (NOT p0) (NOT p1))), (OR (NOT p1) (AND (NOT p2) (NOT p3))), (OR (NOT p1) (AND (NOT p2) (NOT p3))), (OR (AND (NOT p0) (NOT p2) (NOT p3)) (AND (NOT p0) (NOT p1))), (OR (AND (NOT p0) (NOT p2) (NOT p3)) (AND (NOT p0) (NOT p1))), true]
Running random walk in product with property : PermAdmissibility-COL-05-02 automaton TGBA [mat=[[{ cond=p1, acceptance={} source=0 dest: 0}, { cond=(NOT p1), acceptance={} source=0 dest: 6}], [{ cond=(AND (NOT p0) p1), acceptance={} source=1 dest: 2}, { cond=(AND (NOT p0) (NOT p1)), acceptance={} source=1 dest: 6}], [{ cond=(AND p1 p2), acceptance={} source=2 dest: 0}, { cond=(AND p1 (NOT p2)), acceptance={} source=2 dest: 3}, { cond=(NOT p1), acceptance={} source=2 dest: 6}], [{ cond=(OR (AND p1 p2) (AND p1 p3)), acceptance={0} source=3 dest: 0}, { cond=(AND p1 (NOT p2) (NOT p3)), acceptance={0} source=3 dest: 3}, { cond=(NOT p1), acceptance={0} source=3 dest: 6}], [{ cond=true, acceptance={} source=4 dest: 1}], [{ cond=true, acceptance={} source=5 dest: 4}], [{ cond=true, acceptance={0} source=6 dest: 6}]], initial=5, aps=[p1:(AND (OR (LT s0 1) (LT s15 1) (LT s28 1)) (OR (LT s0 1) (LT s15 1) (LT s32 1)) (OR (LT s0 1) (LT s15 1) (LT s30 1)) (OR (LT s0 1) (LT s16 1) (LT s32 1)) (OR (LT s0 1) (LT s16 1) (LT s34 1)) (OR (LT s0 1) (LT s19 1) (LT s31 1)) (OR (LT s0 1) (LT s19 1) (LT s29 1)) (OR (LT s0 1) (LT s16 1) (LT s28 1)) (OR (LT s0 1) (LT s19 1) (LT s35 1)) (OR (LT s0 1) (LT s16 1) (LT s30 1)) (OR (LT s0 1) (LT s19 1) (LT s33 1)) (OR (LT s0 1) (LT s15 1) (LT s34 1)) (OR (LT s0 1) (LT s13 1) (LT s34 1)) (OR (LT s0 1) (LT s18 1) (LT s35 1)) (OR (LT s0 1) (LT s13 1) (LT s32 1)) (OR (LT s0 1) (LT s13 1) (LT s30 1)) (OR (LT s0 1) (LT s18 1) (LT s31 1)) (OR (LT s0 1) (LT s13 1) (LT s28 1)) (OR (LT s0 1) (LT s18 1) (LT s33 1)) (OR (LT s0 1) (LT s12 1) (LT s28 1)) (OR (LT s0 1) (LT s17 1) (LT s29 1)) (OR (LT s0 1) (LT s12 1) (LT s30 1)) (OR (LT s0 1) (LT s12 1) (LT s32 1)) (OR (LT s0 1) (LT s14 1) (LT s34 1)) (OR (LT s0 1) (LT s12 1) (LT s34 1)) (OR (LT s0 1) (LT s14 1) (LT s30 1)) (OR (LT s0 1) (LT s14 1) (LT s32 1)) (OR (LT s0 1) (LT s17 1) (LT s35 1)) (OR (LT s0 1) (LT s17 1) (LT s33 1)) (OR (LT s0 1) (LT s14 1) (LT s28 1)) (OR (LT s0 1) (LT s17 1) (LT s31 1)) (OR (LT s0 1) (LT s18 1) (LT s29 1)) (OR (LT s0 1) (LT s15 1) (LT s31 1)) (OR (LT s0 1) (LT s15 1) (LT s29 1)) (OR (LT s0 1) (LT s16 1) (LT s33 1)) (OR (LT s0 1) (LT s16 1) (LT s35 1)) (OR (LT s0 1) (LT s19 1) (LT s28 1)) (OR (LT s0 1) (LT s19 1) (LT s32 1)) (OR (LT s0 1) (LT s19 1) (LT s30 1)) (OR (LT s0 1) (LT s16 1) (LT s29 1)) (OR (LT s0 1) (LT s16 1) (LT s31 1)) (OR (LT s0 1) (LT s19 1) (LT s34 1)) (OR (LT s0 1) (LT s15 1) (LT s35 1)) (OR (LT s0 1) (LT s15 1) (LT s33 1)) (OR (LT s0 1) (LT s13 1) (LT s33 1)) (OR (LT s0 1) (LT s18 1) (LT s34 1)) (OR (LT s0 1) (LT s13 1) (LT s31 1)) (OR (LT s0 1) (LT s13 1) (LT s29 1)) (OR (LT s0 1) (LT s18 1) (LT s30 1)) (OR (LT s0 1) (LT s18 1) (LT s32 1)) (OR (LT s0 1) (LT s12 1) (LT s29 1)) (OR (LT s0 1) (LT s17 1) (LT s30 1)) (OR (LT s0 1) (LT s12 1) (LT s31 1)) (OR (LT s0 1) (LT s17 1) (LT s28 1)) (OR (LT s0 1) (LT s12 1) (LT s33 1)) (OR (LT s0 1) (LT s14 1) (LT s35 1)) (OR (LT s0 1) (LT s12 1) (LT s35 1)) (OR (LT s0 1) (LT s14 1) (LT s31 1)) (OR (LT s0 1) (LT s14 1) (LT s33 1)) (OR (LT s0 1) (LT s17 1) (LT s34 1)) (OR (LT s0 1) (LT s14 1) (LT s29 1)) (OR (LT s0 1) (LT s17 1) (LT s32 1)) (OR (LT s0 1) (LT s18 1) (LT s28 1)) (OR (LT s0 1) (LT s13 1) (LT s35 1))), p0:(OR (AND (GEQ s37 1) (GEQ s38 1) (GEQ s43 1)) (AND (GEQ s36 1) (GEQ s38 1) (GEQ s42 1)) (AND (GEQ s37 1) (GEQ s38 1) (GEQ s42 1)) (AND (GEQ s36 1) (GEQ s38 1) (GEQ s43 1))), p2:(OR (AND (GEQ s37 1) (GEQ s38 1) (GEQ s43 1)) (AND (GEQ s36 1) (GEQ s38 1) (GEQ s42 1)) (AND (GEQ s37 1) (GEQ s38 1) (GEQ s42 1)) (AND (GEQ s36 1) (GEQ s38 1) (GEQ s43 1))), p3:(AND (OR (LT s2 1) (LT s4 1) (LT s21 1)) (OR (LT s2 1) (LT s9 1) (LT s24 1)) (OR (LT s2 1) (LT s9 1) (LT s22 1)) (OR (LT s2 1) (LT s4 1) (LT s25 1)) (OR (LT s2 1) (LT s4 1) (LT s23 1)) (OR (LT s2 1) (LT s9 1) (LT s26 1)) (OR (LT s2 1) (LT s5 1) (LT s25 1)) (OR (LT s2 1) (LT s5 1) (LT s27 1)) (OR (LT s2 1) (LT s8 1) (LT s20 1)) (OR (LT s2 1) (LT s10 1) (LT s20 1)) (OR (LT s2 1) (LT s10 1) (LT s22 1)) (OR (LT s2 1) (LT s6 1) (LT s27 1)) (OR (LT s2 1) (LT s10 1) (LT s24 1)) (OR (LT s2 1) (LT s6 1) (LT s25 1)) (OR (LT s2 1) (LT s10 1) (LT s26 1)) (OR (LT s2 1) (LT s7 1) (LT s20 1)) (OR (LT s2 1) (LT s11 1) (LT s26 1)) (OR (LT s2 1) (LT s7 1) (LT s22 1)) (OR (LT s2 1) (LT s11 1) (LT s24 1)) (OR (LT s2 1) (LT s11 1) (LT s22 1)) (OR (LT s2 1) (LT s11 1) (LT s20 1)) (OR (LT s2 1) (LT s7 1) (LT s24 1)) (OR (LT s2 1) (LT s7 1) (LT s26 1)) (OR (LT s2 1) (LT s6 1) (LT s23 1)) (OR (LT s2 1) (LT s6 1) (LT s21 1)) (OR (LT s2 1) (LT s8 1) (LT s26 1)) (OR (LT s2 1) (LT s8 1) (LT s22 1)) (OR (LT s2 1) (LT s5 1) (LT s21 1)) (OR (LT s2 1) (LT s8 1) (LT s24 1)) (OR (LT s2 1) (LT s5 1) (LT s23 1)) (OR (LT s2 1) (LT s4 1) (LT s27 1)) (OR (LT s2 1) (LT s9 1) (LT s20 1)) (OR (LT s2 1) (LT s9 1) (LT s23 1)) (OR (LT s2 1) (LT s4 1) (LT s20 1)) (OR (LT s2 1) (LT s9 1) (LT s21 1)) (OR (LT s2 1) (LT s9 1) (LT s27 1)) (OR (LT s2 1) (LT s4 1) (LT s24 1)) (OR (LT s2 1) (LT s9 1) (LT s25 1)) (OR (LT s2 1) (LT s4 1) (LT s22 1)) (OR (LT s2 1) (LT s5 1) (LT s26 1)) (OR (LT s2 1) (LT s8 1) (LT s21 1)) (OR (LT s2 1) (LT s10 1) (LT s21 1)) (OR (LT s2 1) (LT s10 1) (LT s23 1)) (OR (LT s2 1) (LT s6 1) (LT s26 1)) (OR (LT s2 1) (LT s10 1) (LT s25 1)) (OR (LT s2 1) (LT s11 1) (LT s27 1)) (OR (LT s2 1) (LT s6 1) (LT s24 1)) (OR (LT s2 1) (LT s10 1) (LT s27 1)) (OR (LT s2 1) (LT s11 1) (LT s25 1)) (OR (LT s2 1) (LT s11 1) (LT s23 1)) (OR (LT s2 1) (LT s7 1) (LT s21 1)) (OR (LT s2 1) (LT s11 1) (LT s21 1)) (OR (LT s2 1) (LT s7 1) (LT s27 1)) (OR (LT s2 1) (LT s7 1) (LT s23 1)) (OR (LT s2 1) (LT s7 1) (LT s25 1)) (OR (LT s2 1) (LT s6 1) (LT s22 1)) (OR (LT s2 1) (LT s6 1) (LT s20 1)) (OR (LT s2 1) (LT s8 1) (LT s27 1)) (OR (LT s2 1) (LT s5 1) (LT s20 1)) (OR (LT s2 1) (LT s5 1) (LT s22 1)) (OR (LT s2 1) (LT s8 1) (LT s23 1)) (OR (LT s2 1) (LT s5 1) (LT s24 1)) (OR (LT s2 1) (LT s8 1) (LT s25 1)) (OR (LT s2 1) (LT s4 1) (LT s26 1)))], nbAcceptance=1, properties=[trans-labels, explicit-labels, trans-acc, deterministic, no-univ-branch, unambiguous, semi-deterministic, very-weak, weak, inherently-weak], stateDesc=[null, null, null, null, null, null, null][false, false, false, false, false, false, false]]
Entered a terminal (fully accepting) state of product in 32 steps with 1 reset in 1 ms.
FORMULA PermAdmissibility-COL-05-02 FALSE TECHNIQUES STUTTER_TEST
Treatment of property PermAdmissibility-COL-05-02 finished in 526 ms.
Running Spot : CommandLine [args=[/home/mcc/BenchKit/bin//..//ltl2tgba, --hoaf=tv, -f, !(F(!p0))], workingDir=/home/mcc/execution]
Support contains 9 out of 104 places. Attempting structural reductions.
Starting structural reductions, iteration 0 : 104/104 places, 592/592 transitions.
Discarding 28 places :
Symmetric choice reduction at 0 with 28 rule applications. Total rules 28 place count 76 transition count 340
Iterating global reduction 0 with 28 rules applied. Total rules applied 56 place count 76 transition count 340
Discarding 28 places :
Symmetric choice reduction at 0 with 28 rule applications. Total rules 84 place count 48 transition count 88
Iterating global reduction 0 with 28 rules applied. Total rules applied 112 place count 48 transition count 88
Discarding 6 places :
Symmetric choice reduction at 0 with 6 rule applications. Total rules 118 place count 42 transition count 58
Iterating global reduction 0 with 6 rules applied. Total rules applied 124 place count 42 transition count 58
Applied a total of 124 rules in 15 ms. Remains 42 /104 variables (removed 62) and now considering 58/592 (removed 534) transitions.
// Phase 1: matrix 58 rows 42 cols
[2021-05-14 10:40:47] [INFO ] Computed 16 place invariants in 0 ms
[2021-05-14 10:40:47] [INFO ] Implicit Places using invariants in 34 ms returned [4, 5, 6, 7, 20, 21, 34, 35, 37, 38]
Discarding 10 places :
Implicit Place search using SMT only with invariants took 35 ms to find 10 implicit places.
[2021-05-14 10:40:47] [INFO ] Redundant transitions in 0 ms returned []
// Phase 1: matrix 58 rows 32 cols
[2021-05-14 10:40:47] [INFO ] Computed 6 place invariants in 0 ms
[2021-05-14 10:40:47] [INFO ] Dead Transitions using invariants and state equation in 30 ms returned []
Starting structural reductions, iteration 1 : 32/104 places, 58/592 transitions.
Drop transitions removed 9 transitions
Trivial Post-agglo rules discarded 9 transitions
Performed 9 trivial Post agglomeration. Transition count delta: 9
Iterating post reduction 0 with 9 rules applied. Total rules applied 9 place count 32 transition count 49
Reduce places removed 9 places and 0 transitions.
Iterating post reduction 1 with 9 rules applied. Total rules applied 18 place count 23 transition count 49
Performed 1 Post agglomeration using F-continuation condition.Transition count delta: 1
Deduced a syphon composed of 1 places in 0 ms
Reduce places removed 1 places and 0 transitions.
Iterating global reduction 2 with 2 rules applied. Total rules applied 20 place count 22 transition count 48
Applied a total of 20 rules in 3 ms. Remains 22 /32 variables (removed 10) and now considering 48/58 (removed 10) transitions.
// Phase 1: matrix 48 rows 22 cols
[2021-05-14 10:40:47] [INFO ] Computed 6 place invariants in 0 ms
[2021-05-14 10:40:47] [INFO ] Implicit Places using invariants in 16 ms returned []
// Phase 1: matrix 48 rows 22 cols
[2021-05-14 10:40:47] [INFO ] Computed 6 place invariants in 0 ms
[2021-05-14 10:40:47] [INFO ] Implicit Places using invariants and state equation in 37 ms returned []
Implicit Place search using SMT with State Equation took 57 ms to find 0 implicit places.
Finished structural reductions, in 2 iterations. Remains : 22/104 places, 48/592 transitions.
Stuttering acceptance computed with spot in 88 ms :[p0]
Running random walk in product with property : PermAdmissibility-COL-05-04 automaton TGBA [mat=[[{ cond=p0, acceptance={0} source=0 dest: 0}]], initial=0, aps=[p0:(AND (OR (LT s14 1) (LT s16 1) (LT s18 1)) (OR (LT s12 1) (LT s16 1) (LT s18 1)) (OR (LT s14 1) (LT s16 1) (LT s20 1)) (OR (LT s13 1) (LT s16 1) (LT s20 1)) (OR (LT s13 1) (LT s16 1) (LT s18 1)) (OR (LT s15 1) (LT s16 1) (LT s17 1)) (OR (LT s12 1) (LT s16 1) (LT s20 1)) (OR (LT s15 1) (LT s16 1) (LT s19 1)) (OR (LT s14 1) (LT s16 1) (LT s19 1)) (OR (LT s12 1) (LT s16 1) (LT s17 1)) (OR (LT s12 1) (LT s16 1) (LT s19 1)) (OR (LT s13 1) (LT s16 1) (LT s19 1)) (OR (LT s13 1) (LT s16 1) (LT s17 1)) (OR (LT s15 1) (LT s16 1) (LT s18 1)) (OR (LT s14 1) (LT s16 1) (LT s17 1)) (OR (LT s15 1) (LT s16 1) (LT s20 1)))], nbAcceptance=1, properties=[trans-labels, explicit-labels, trans-acc, colored, deterministic, no-univ-branch, unambiguous, semi-deterministic, stutter-invariant, very-weak, weak, inherently-weak], stateDesc=[null][true]]
Product exploration explored 100000 steps with 11392 reset in 358 ms.
Product exploration explored 100000 steps with 11457 reset in 440 ms.
Complete graph has no SCC; deadlocks are unavoidable. place count 22 transition count 48
Detected that all paths lead to deadlock. Applying this knowledge to assert that all AP eventually converge : F ( (Ga|G!a) & (Gb|G!b)...)
Knowledge obtained : [(F (G p0)), p0]
Stuttering acceptance computed with spot in 19 ms :[p0]
Product exploration explored 100000 steps with 11424 reset in 284 ms.
Product exploration explored 100000 steps with 11385 reset in 269 ms.
[2021-05-14 10:40:48] [INFO ] Flatten gal took : 3 ms
[2021-05-14 10:40:48] [INFO ] Flatten gal took : 3 ms
[2021-05-14 10:40:48] [INFO ] Time to serialize gal into /tmp/LTL288645591918974669.gal : 1 ms
[2021-05-14 10:40:48] [INFO ] Time to serialize properties into /tmp/LTL5481960251243542608.ltl : 1 ms
Invoking ITS tools like this :CommandLine [args=[/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.202104292328/bin/its-ltl-linux64, --gc-threshold, 2000000, -i, /tmp/LTL288645591918974669.gal, -t, CGAL, -LTL, /tmp/LTL5481960251243542608.ltl, -c, -stutter-deadlock, --gen-order, FOLLOW], workingDir=/home/mcc/execution]
its-ltl command run as :
/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.202104292328/bin/its-ltl-linux64 --gc-threshold 2000000 -i /tmp/LTL288645591918974669.gal -t CGAL -LTL /tmp/LTL5481960251243542608.ltl -c -stutter-deadlock --gen-order FOLLOW
Read 1 LTL properties
Checking formula 0 : !((F("((((((((((((((((((aux7_6>=1)&&(c9_0>=1))&&(aux5_1>=1))||(((aux7_2>=1)&&(c9_0>=1))&&(aux5_1>=1)))||(((aux7_6>=1)&&(c9_0>=1))&&(aux5_5>=1)))||(((aux7_3>=1)&&(c9_0>=1))&&(aux5_5>=1)))||(((aux7_3>=1)&&(c9_0>=1))&&(aux5_1>=1)))||(((aux7_7>=1)&&(c9_0>=1))&&(aux5_0>=1)))||(((aux7_2>=1)&&(c9_0>=1))&&(aux5_5>=1)))||(((aux7_7>=1)&&(c9_0>=1))&&(aux5_4>=1)))||(((aux7_6>=1)&&(c9_0>=1))&&(aux5_4>=1)))||(((aux7_2>=1)&&(c9_0>=1))&&(aux5_0>=1)))||(((aux7_2>=1)&&(c9_0>=1))&&(aux5_4>=1)))||(((aux7_3>=1)&&(c9_0>=1))&&(aux5_4>=1)))||(((aux7_3>=1)&&(c9_0>=1))&&(aux5_0>=1)))||(((aux7_7>=1)&&(c9_0>=1))&&(aux5_1>=1)))||(((aux7_6>=1)&&(c9_0>=1))&&(aux5_0>=1)))||(((aux7_7>=1)&&(c9_0>=1))&&(aux5_5>=1)))")))
Formula 0 simplified : !F"((((((((((((((((((aux7_6>=1)&&(c9_0>=1))&&(aux5_1>=1))||(((aux7_2>=1)&&(c9_0>=1))&&(aux5_1>=1)))||(((aux7_6>=1)&&(c9_0>=1))&&(aux5_5>=1)))||(((aux7_3>=1)&&(c9_0>=1))&&(aux5_5>=1)))||(((aux7_3>=1)&&(c9_0>=1))&&(aux5_1>=1)))||(((aux7_7>=1)&&(c9_0>=1))&&(aux5_0>=1)))||(((aux7_2>=1)&&(c9_0>=1))&&(aux5_5>=1)))||(((aux7_7>=1)&&(c9_0>=1))&&(aux5_4>=1)))||(((aux7_6>=1)&&(c9_0>=1))&&(aux5_4>=1)))||(((aux7_2>=1)&&(c9_0>=1))&&(aux5_0>=1)))||(((aux7_2>=1)&&(c9_0>=1))&&(aux5_4>=1)))||(((aux7_3>=1)&&(c9_0>=1))&&(aux5_4>=1)))||(((aux7_3>=1)&&(c9_0>=1))&&(aux5_0>=1)))||(((aux7_7>=1)&&(c9_0>=1))&&(aux5_1>=1)))||(((aux7_6>=1)&&(c9_0>=1))&&(aux5_0>=1)))||(((aux7_7>=1)&&(c9_0>=1))&&(aux5_5>=1)))"
Reverse transition relation is NOT exact ! Due to transitions t264, t265, t266, t267, t268, t269, t270, t271, t272, t273, t274, t275, t276, t277, t278, t279, t280, t281, t282, t283, t284, t285, t286, t287, t304.t320.t288.t192.t128.t64.t0.t336.t528.t464.t400, t305.t320.t288.t192.t128.t64.t0.t336.t528.t464.t400, t306.t320.t288.t192.t128.t64.t0.t336.t528.t464.t400, t307.t320.t288.t192.t128.t64.t0.t336.t528.t464.t400, t308.t320.t288.t192.t128.t64.t0.t336.t528.t464.t400, t309.t320.t288.t192.t128.t64.t0.t336.t528.t464.t400, t310.t320.t288.t192.t128.t64.t0.t336.t528.t464.t400, t311.t320.t288.t192.t128.t64.t0.t336.t528.t464.t400, t312.t320.t288.t192.t128.t64.t0.t336.t528.t464.t400, t313.t320.t288.t192.t128.t64.t0.t336.t528.t464.t400, t314.t320.t288.t192.t128.t64.t0.t336.t528.t464.t400, t315.t320.t288.t192.t128.t64.t0.t336.t528.t464.t400, t316.t320.t288.t192.t128.t64.t0.t336.t528.t464.t400, t317.t320.t288.t192.t128.t64.t0.t336.t528.t464.t400, t318.t320.t288.t192.t128.t64.t0.t336.t528.t464.t400, t319.t320.t288.t192.t128.t64.t0.t336.t528.t464.t400, Intersection with reachable at each step enabled. (destroyed/reverse/intersect/total) :0/8/40/48
Computing Next relation with stutter on 1 deadlock states
1 unique states visited
0 strongly connected components in search stack
0 transitions explored
1 items max in DFS search stack
214 ticks for the emptiness check
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
STATS,0,2.16643,81008,1,0,222,456977,122,100,1254,390506,263
no accepting run found
Formula 0 is TRUE no accepting run found.
FORMULA PermAdmissibility-COL-05-04 TRUE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL
ITS tools runner thread asked to quit. Dying gracefully.
Treatment of property PermAdmissibility-COL-05-04 finished in 4224 ms.
Running Spot : CommandLine [args=[/home/mcc/BenchKit/bin//..//ltl2tgba, --hoaf=tv, -f, !(G(F((G(p0)||(X(p0)&&p1)))))], workingDir=/home/mcc/execution]
Support contains 26 out of 104 places. Attempting structural reductions.
Starting structural reductions, iteration 0 : 104/104 places, 592/592 transitions.
Discarding 14 places :
Symmetric choice reduction at 0 with 14 rule applications. Total rules 14 place count 90 transition count 466
Iterating global reduction 0 with 14 rules applied. Total rules applied 28 place count 90 transition count 466
Applied a total of 28 rules in 5 ms. Remains 90 /104 variables (removed 14) and now considering 466/592 (removed 126) transitions.
// Phase 1: matrix 466 rows 90 cols
[2021-05-14 10:40:51] [INFO ] Computed 16 place invariants in 3 ms
[2021-05-14 10:40:51] [INFO ] Implicit Places using invariants in 65 ms returned [76, 78]
Discarding 2 places :
Implicit Place search using SMT only with invariants took 67 ms to find 2 implicit places.
// Phase 1: matrix 466 rows 88 cols
[2021-05-14 10:40:51] [INFO ] Computed 14 place invariants in 2 ms
[2021-05-14 10:40:51] [INFO ] Dead Transitions using invariants and state equation in 180 ms returned []
Starting structural reductions, iteration 1 : 88/104 places, 466/592 transitions.
Applied a total of 0 rules in 2 ms. Remains 88 /88 variables (removed 0) and now considering 466/466 (removed 0) transitions.
// Phase 1: matrix 466 rows 88 cols
[2021-05-14 10:40:51] [INFO ] Computed 14 place invariants in 2 ms
[2021-05-14 10:40:51] [INFO ] Dead Transitions using invariants and state equation in 149 ms returned []
Finished structural reductions, in 2 iterations. Remains : 88/104 places, 466/592 transitions.
Stuttering acceptance computed with spot in 99 ms :[(NOT p0), (NOT p0), (NOT p0)]
Running random walk in product with property : PermAdmissibility-COL-05-05 automaton TGBA [mat=[[{ cond=true, acceptance={} source=0 dest: 0}, { cond=(AND (NOT p1) (NOT p0)), acceptance={} source=0 dest: 1}, { cond=(AND p1 (NOT p0)), acceptance={} source=0 dest: 2}], [{ cond=(AND (NOT p1) (NOT p0)), acceptance={0} source=1 dest: 1}, { cond=(AND (NOT p1) p0), acceptance={} source=1 dest: 1}, { cond=(AND p1 (NOT p0)), acceptance={0} source=1 dest: 2}, { cond=(AND p1 p0), acceptance={} source=1 dest: 2}], [{ cond=(AND (NOT p1) (NOT p0)), acceptance={0} source=2 dest: 1}, { cond=(AND p1 (NOT p0)), acceptance={0} source=2 dest: 2}]], initial=0, aps=[p1:(AND (OR (LT s70 1) (LT s80 1) (LT s85 1)) (OR (LT s69 1) (LT s83 1) (LT s85 1)) (OR (LT s73 1) (LT s81 1) (LT s85 1)) (OR (LT s74 1) (LT s79 1) (LT s85 1)) (OR (LT s71 1) (LT s78 1) (LT s85 1)) (OR (LT s72 1) (LT s84 1) (LT s85 1)) (OR (LT s75 1) (LT s77 1) (LT s85 1)) (OR (LT s69 1) (LT s84 1) (LT s85 1)) (OR (LT s70 1) (LT s81 1) (LT s85 1)) (OR (LT s73 1) (LT s83 1) (LT s85 1)) (OR (LT s71 1) (LT s79 1) (LT s85 1)) (OR (LT s73 1) (LT s82 1) (LT s85 1)) (OR (LT s70 1) (LT s82 1) (LT s85 1)) (OR (LT s74 1) (LT s80 1) (LT s85 1)) (OR (LT s74 1) (LT s81 1) (LT s85 1)) (OR (LT s75 1) (LT s78 1) (LT s85 1)) (OR (LT s72 1) (LT s77 1) (LT s85 1)) (OR (LT s68 1) (LT s79 1) (LT s85 1)) (OR (LT s73 1) (LT s84 1) (LT s85 1)) (OR (LT s70 1) (LT s83 1) (LT s85 1)) (OR (LT s71 1) (LT s80 1) (LT s85 1)) (OR (LT s72 1) (LT s78 1) (LT s85 1)) (OR (LT s71 1) (LT s81 1) (LT s85 1)) (OR (LT s75 1) (LT s79 1) (LT s85 1)) (OR (LT s68 1) (LT s80 1) (LT s85 1)) (OR (LT s70 1) (LT s84 1) (LT s85 1)) (OR (LT s74 1) (LT s82 1) (LT s85 1)) (OR (LT s69 1) (LT s78 1) (LT s85 1)) (OR (LT s71 1) (LT s82 1) (LT s85 1)) (OR (LT s72 1) (LT s79 1) (LT s85 1)) (OR (LT s68 1) (LT s81 1) (LT s85 1)) (OR (LT s75 1) (LT s81 1) (LT s85 1)) (OR (LT s73 1) (LT s77 1) (LT s85 1)) (OR (LT s75 1) (LT s80 1) (LT s85 1)) (OR (LT s72 1) (LT s80 1) (LT s85 1)) (OR (LT s69 1) (LT s77 1) (LT s85 1)) (OR (LT s69 1) (LT s79 1) (LT s85 1)) (OR (LT s74 1) (LT s83 1) (LT s85 1)) (OR (LT s68 1) (LT s82 1) (LT s85 1)) (OR (LT s71 1) (LT s83 1) (LT s85 1)) (OR (LT s75 1) (LT s82 1) (LT s85 1)) (OR (LT s70 1) (LT s77 1) (LT s85 1)) (OR (LT s74 1) (LT s84 1) (LT s85 1)) (OR (LT s72 1) (LT s81 1) (LT s85 1)) (OR (LT s73 1) (LT s78 1) (LT s85 1)) (OR (LT s69 1) (LT s80 1) (LT s85 1)) (OR (LT s75 1) (LT s83 1) (LT s85 1)) (OR (LT s73 1) (LT s79 1) (LT s85 1)) (OR (LT s68 1) (LT s83 1) (LT s85 1)) (OR (LT s68 1) (LT s78 1) (LT s85 1)) (OR (LT s70 1) (LT s78 1) (LT s85 1)) (OR (LT s69 1) (LT s81 1) (LT s85 1)) (OR (LT s71 1) (LT s84 1) (LT s85 1)) (OR (LT s68 1) (LT s84 1) (LT s85 1)) (OR (LT s72 1) (LT s82 1) (LT s85 1)) (OR (LT s72 1) (LT s83 1) (LT s85 1)) (OR (LT s73 1) (LT s80 1) (LT s85 1)) (OR (LT s68 1) (LT s77 1) (LT s85 1)) (OR (LT s74 1) (LT s77 1) (LT s85 1)) (OR (LT s70 1) (LT s79 1) (LT s85 1)) (OR (LT s75 1) (LT s84 1) (LT s85 1)) (OR (LT s74 1) (LT s78 1) (LT s85 1)) (OR (LT s69 1) (LT s82 1) (LT s85 1)) (OR (LT s71 1) (LT s77 1) (LT s85 1))), p0:(AND (OR (LT s51 1) (LT s54 1) (LT s65 1)) (OR (LT s48 1) (LT s52 1) (LT s65 1)) (OR (LT s48 1) (LT s53 1) (LT s65 1)) (OR (LT s51 1) (LT s55 1) (LT s65 1)) (OR (LT s50 1) (LT s52 1) (LT s65 1)) (OR (LT s49 1) (LT s52 1) (LT s65 1)) (OR (LT s50 1) (LT s53 1) (LT s65 1)) (OR (LT s48 1) (LT s54 1) (LT s65 1)) (OR (LT s51 1) (LT s52 1) (LT s65 1)) (OR (LT s49 1) (LT s53 1) (LT s65 1)) (OR (LT s51 1) (LT s53 1) (LT s65 1)) (OR (LT s50 1) (LT s54 1) (LT s65 1)) (OR (LT s48 1) (LT s55 1) (LT s65 1)) (OR (LT s49 1) (LT s54 1) (LT s65 1)) (OR (LT s50 1) (LT s55 1) (LT s65 1)) (OR (LT s49 1) (LT s55 1) (LT s65 1)))], nbAcceptance=1, properties=[trans-labels, explicit-labels, trans-acc, no-univ-branch], stateDesc=[null, null, null][false, false, false]]
Product exploration explored 100000 steps with 4458 reset in 1057 ms.
Product exploration explored 100000 steps with 4486 reset in 1136 ms.
Complete graph has no SCC; deadlocks are unavoidable. place count 88 transition count 466
Detected that all paths lead to deadlock. Applying this knowledge to assert that all AP eventually converge : F ( (Ga|G!a) & (Gb|G!b)...)
Knowledge obtained : [(F (G p1)), (F (G p0)), p1, p0]
Property proved to be true thanks to knowledge :(F (G p0))
FORMULA PermAdmissibility-COL-05-05 TRUE TECHNIQUES STRUCTURAL INITIAL_STATE
Treatment of property PermAdmissibility-COL-05-05 finished in 2899 ms.
Running Spot : CommandLine [args=[/home/mcc/BenchKit/bin//..//ltl2tgba, --hoaf=tv, -f, !(X(F(!p0)))], workingDir=/home/mcc/execution]
Support contains 17 out of 104 places. Attempting structural reductions.
Starting structural reductions, iteration 0 : 104/104 places, 592/592 transitions.
Discarding 14 places :
Symmetric choice reduction at 0 with 14 rule applications. Total rules 14 place count 90 transition count 466
Iterating global reduction 0 with 14 rules applied. Total rules applied 28 place count 90 transition count 466
Applied a total of 28 rules in 7 ms. Remains 90 /104 variables (removed 14) and now considering 466/592 (removed 126) transitions.
// Phase 1: matrix 466 rows 90 cols
[2021-05-14 10:40:54] [INFO ] Computed 16 place invariants in 4 ms
[2021-05-14 10:40:54] [INFO ] Implicit Places using invariants in 66 ms returned [76, 78]
Discarding 2 places :
Implicit Place search using SMT only with invariants took 67 ms to find 2 implicit places.
// Phase 1: matrix 466 rows 88 cols
[2021-05-14 10:40:54] [INFO ] Computed 14 place invariants in 2 ms
[2021-05-14 10:40:54] [INFO ] Dead Transitions using invariants and state equation in 159 ms returned []
Starting structural reductions, iteration 1 : 88/104 places, 466/592 transitions.
Applied a total of 0 rules in 2 ms. Remains 88 /88 variables (removed 0) and now considering 466/466 (removed 0) transitions.
// Phase 1: matrix 466 rows 88 cols
[2021-05-14 10:40:54] [INFO ] Computed 14 place invariants in 2 ms
[2021-05-14 10:40:54] [INFO ] Dead Transitions using invariants and state equation in 141 ms returned []
Finished structural reductions, in 2 iterations. Remains : 88/104 places, 466/592 transitions.
Stuttering acceptance computed with spot in 46 ms :[p0, p0]
Running random walk in product with property : PermAdmissibility-COL-05-06 automaton TGBA [mat=[[{ cond=true, acceptance={} source=0 dest: 1}], [{ cond=p0, acceptance={0} source=1 dest: 1}]], initial=0, aps=[p0:(AND (OR (LT s70 1) (LT s80 1) (LT s85 1)) (OR (LT s69 1) (LT s83 1) (LT s85 1)) (OR (LT s73 1) (LT s81 1) (LT s85 1)) (OR (LT s74 1) (LT s79 1) (LT s85 1)) (OR (LT s71 1) (LT s78 1) (LT s85 1)) (OR (LT s72 1) (LT s84 1) (LT s85 1)) (OR (LT s75 1) (LT s77 1) (LT s85 1)) (OR (LT s69 1) (LT s84 1) (LT s85 1)) (OR (LT s70 1) (LT s81 1) (LT s85 1)) (OR (LT s73 1) (LT s83 1) (LT s85 1)) (OR (LT s71 1) (LT s79 1) (LT s85 1)) (OR (LT s73 1) (LT s82 1) (LT s85 1)) (OR (LT s70 1) (LT s82 1) (LT s85 1)) (OR (LT s74 1) (LT s80 1) (LT s85 1)) (OR (LT s74 1) (LT s81 1) (LT s85 1)) (OR (LT s75 1) (LT s78 1) (LT s85 1)) (OR (LT s72 1) (LT s77 1) (LT s85 1)) (OR (LT s68 1) (LT s79 1) (LT s85 1)) (OR (LT s73 1) (LT s84 1) (LT s85 1)) (OR (LT s70 1) (LT s83 1) (LT s85 1)) (OR (LT s71 1) (LT s80 1) (LT s85 1)) (OR (LT s72 1) (LT s78 1) (LT s85 1)) (OR (LT s71 1) (LT s81 1) (LT s85 1)) (OR (LT s75 1) (LT s79 1) (LT s85 1)) (OR (LT s68 1) (LT s80 1) (LT s85 1)) (OR (LT s70 1) (LT s84 1) (LT s85 1)) (OR (LT s74 1) (LT s82 1) (LT s85 1)) (OR (LT s69 1) (LT s78 1) (LT s85 1)) (OR (LT s71 1) (LT s82 1) (LT s85 1)) (OR (LT s72 1) (LT s79 1) (LT s85 1)) (OR (LT s68 1) (LT s81 1) (LT s85 1)) (OR (LT s75 1) (LT s81 1) (LT s85 1)) (OR (LT s73 1) (LT s77 1) (LT s85 1)) (OR (LT s75 1) (LT s80 1) (LT s85 1)) (OR (LT s72 1) (LT s80 1) (LT s85 1)) (OR (LT s69 1) (LT s77 1) (LT s85 1)) (OR (LT s69 1) (LT s79 1) (LT s85 1)) (OR (LT s74 1) (LT s83 1) (LT s85 1)) (OR (LT s68 1) (LT s82 1) (LT s85 1)) (OR (LT s71 1) (LT s83 1) (LT s85 1)) (OR (LT s75 1) (LT s82 1) (LT s85 1)) (OR (LT s70 1) (LT s77 1) (LT s85 1)) (OR (LT s74 1) (LT s84 1) (LT s85 1)) (OR (LT s72 1) (LT s81 1) (LT s85 1)) (OR (LT s73 1) (LT s78 1) (LT s85 1)) (OR (LT s69 1) (LT s80 1) (LT s85 1)) (OR (LT s75 1) (LT s83 1) (LT s85 1)) (OR (LT s73 1) (LT s79 1) (LT s85 1)) (OR (LT s68 1) (LT s83 1) (LT s85 1)) (OR (LT s68 1) (LT s78 1) (LT s85 1)) (OR (LT s70 1) (LT s78 1) (LT s85 1)) (OR (LT s69 1) (LT s81 1) (LT s85 1)) (OR (LT s71 1) (LT s84 1) (LT s85 1)) (OR (LT s68 1) (LT s84 1) (LT s85 1)) (OR (LT s72 1) (LT s82 1) (LT s85 1)) (OR (LT s72 1) (LT s83 1) (LT s85 1)) (OR (LT s73 1) (LT s80 1) (LT s85 1)) (OR (LT s68 1) (LT s77 1) (LT s85 1)) (OR (LT s74 1) (LT s77 1) (LT s85 1)) (OR (LT s70 1) (LT s79 1) (LT s85 1)) (OR (LT s75 1) (LT s84 1) (LT s85 1)) (OR (LT s74 1) (LT s78 1) (LT s85 1)) (OR (LT s69 1) (LT s82 1) (LT s85 1)) (OR (LT s71 1) (LT s77 1) (LT s85 1)))], nbAcceptance=1, properties=[trans-labels, explicit-labels, trans-acc, deterministic, no-univ-branch, unambiguous, semi-deterministic, very-weak, weak, inherently-weak], stateDesc=[null, null][false, false]]
Product exploration explored 100000 steps with 2070 reset in 842 ms.
Product exploration explored 100000 steps with 2062 reset in 889 ms.
Complete graph has no SCC; deadlocks are unavoidable. place count 88 transition count 466
Detected that all paths lead to deadlock. Applying this knowledge to assert that all AP eventually converge : F ( (Ga|G!a) & (Gb|G!b)...)
Knowledge obtained : [(F (G p0)), p0]
Stuttering acceptance computed with spot in 46 ms :[p0, p0]
Product exploration explored 100000 steps with 2082 reset in 827 ms.
Product exploration explored 100000 steps with 2062 reset in 880 ms.
Applying partial POR strategy [false, true]
Stuttering acceptance computed with spot in 42 ms :[p0, p0]
Support contains 17 out of 88 places. Attempting structural reductions.
Property had overlarge support with respect to TGBA, discarding it for now.
Starting structural reductions, iteration 0 : 88/88 places, 466/466 transitions.
Performed 1 Post agglomeration using F-continuation condition.Transition count delta: 0
Iterating post reduction 0 with 1 rules applied. Total rules applied 1 place count 88 transition count 466
Performed 1 Post agglomeration using F-continuation condition.Transition count delta: 0
Deduced a syphon composed of 2 places in 0 ms
Iterating global reduction 1 with 1 rules applied. Total rules applied 2 place count 88 transition count 466
Discarding 1 places :
Symmetric choice reduction at 1 with 1 rule applications. Total rules 3 place count 87 transition count 465
Deduced a syphon composed of 1 places in 0 ms
Iterating global reduction 1 with 1 rules applied. Total rules applied 4 place count 87 transition count 465
Deduced a syphon composed of 1 places in 0 ms
Applied a total of 4 rules in 25 ms. Remains 87 /88 variables (removed 1) and now considering 465/466 (removed 1) transitions.
[2021-05-14 10:40:58] [INFO ] Redundant transitions in 27 ms returned []
// Phase 1: matrix 465 rows 87 cols
[2021-05-14 10:40:58] [INFO ] Computed 14 place invariants in 2 ms
[2021-05-14 10:40:58] [INFO ] Dead Transitions using invariants and state equation in 164 ms returned []
Finished structural reductions, in 1 iterations. Remains : 87/88 places, 465/466 transitions.
Product exploration explored 100000 steps with 3000 reset in 963 ms.
Product exploration explored 100000 steps with 2993 reset in 778 ms.
[2021-05-14 10:41:00] [INFO ] Flatten gal took : 33 ms
[2021-05-14 10:41:00] [INFO ] Flatten gal took : 33 ms
[2021-05-14 10:41:00] [INFO ] Time to serialize gal into /tmp/LTL15940508571692785235.gal : 5 ms
[2021-05-14 10:41:00] [INFO ] Time to serialize properties into /tmp/LTL11694337311735648202.ltl : 2 ms
Invoking ITS tools like this :CommandLine [args=[/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.202104292328/bin/its-ltl-linux64, --gc-threshold, 2000000, -i, /tmp/LTL15940508571692785235.gal, -t, CGAL, -LTL, /tmp/LTL11694337311735648202.ltl, -c, -stutter-deadlock, --gen-order, FOLLOW], workingDir=/home/mcc/execution]
its-ltl command run as :
/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.202104292328/bin/its-ltl-linux64 --gc-threshold 2000000 -i /tmp/LTL15940508571692785235.gal -t CGAL -LTL /tmp/LTL11694337311735648202.ltl -c -stutter-deadlock --gen-order FOLLOW
Read 1 LTL properties
Checking formula 0 : !((X(F("((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((aux16_2>=1)&&(aux14_3>=1))&&(c20_0>=1))||(((aux16_1>=1)&&(aux14_6>=1))&&(c20_0>=1)))||(((aux16_5>=1)&&(aux14_4>=1))&&(c20_0>=1)))||(((aux16_6>=1)&&(aux14_2>=1))&&(c20_0>=1)))||(((aux16_3>=1)&&(aux14_1>=1))&&(c20_0>=1)))||(((aux16_4>=1)&&(aux14_7>=1))&&(c20_0>=1)))||(((aux16_7>=1)&&(aux14_0>=1))&&(c20_0>=1)))||(((aux16_1>=1)&&(aux14_7>=1))&&(c20_0>=1)))||(((aux16_2>=1)&&(aux14_4>=1))&&(c20_0>=1)))||(((aux16_5>=1)&&(aux14_6>=1))&&(c20_0>=1)))||(((aux16_3>=1)&&(aux14_2>=1))&&(c20_0>=1)))||(((aux16_5>=1)&&(aux14_5>=1))&&(c20_0>=1)))||(((aux16_2>=1)&&(aux14_5>=1))&&(c20_0>=1)))||(((aux16_6>=1)&&(aux14_3>=1))&&(c20_0>=1)))||(((aux16_6>=1)&&(aux14_4>=1))&&(c20_0>=1)))||(((aux16_7>=1)&&(aux14_1>=1))&&(c20_0>=1)))||(((aux16_4>=1)&&(aux14_0>=1))&&(c20_0>=1)))||(((aux16_0>=1)&&(aux14_2>=1))&&(c20_0>=1)))||(((aux16_5>=1)&&(aux14_7>=1))&&(c20_0>=1)))||(((aux16_2>=1)&&(aux14_6>=1))&&(c20_0>=1)))||(((aux16_3>=1)&&(aux14_3>=1))&&(c20_0>=1)))||(((aux16_4>=1)&&(aux14_1>=1))&&(c20_0>=1)))||(((aux16_3>=1)&&(aux14_4>=1))&&(c20_0>=1)))||(((aux16_7>=1)&&(aux14_2>=1))&&(c20_0>=1)))||(((aux16_0>=1)&&(aux14_3>=1))&&(c20_0>=1)))||(((aux16_2>=1)&&(aux14_7>=1))&&(c20_0>=1)))||(((aux16_6>=1)&&(aux14_5>=1))&&(c20_0>=1)))||(((aux16_1>=1)&&(aux14_1>=1))&&(c20_0>=1)))||(((aux16_3>=1)&&(aux14_5>=1))&&(c20_0>=1)))||(((aux16_4>=1)&&(aux14_2>=1))&&(c20_0>=1)))||(((aux16_0>=1)&&(aux14_4>=1))&&(c20_0>=1)))||(((aux16_7>=1)&&(aux14_4>=1))&&(c20_0>=1)))||(((aux16_5>=1)&&(aux14_0>=1))&&(c20_0>=1)))||(((aux16_7>=1)&&(aux14_3>=1))&&(c20_0>=1)))||(((aux16_4>=1)&&(aux14_3>=1))&&(c20_0>=1)))||(((aux16_1>=1)&&(aux14_0>=1))&&(c20_0>=1)))||(((aux16_1>=1)&&(aux14_2>=1))&&(c20_0>=1)))||(((aux16_6>=1)&&(aux14_6>=1))&&(c20_0>=1)))||(((aux16_0>=1)&&(aux14_5>=1))&&(c20_0>=1)))||(((aux16_3>=1)&&(aux14_6>=1))&&(c20_0>=1)))||(((aux16_7>=1)&&(aux14_5>=1))&&(c20_0>=1)))||(((aux16_2>=1)&&(aux14_0>=1))&&(c20_0>=1)))||(((aux16_6>=1)&&(aux14_7>=1))&&(c20_0>=1)))||(((aux16_4>=1)&&(aux14_4>=1))&&(c20_0>=1)))||(((aux16_5>=1)&&(aux14_1>=1))&&(c20_0>=1)))||(((aux16_1>=1)&&(aux14_3>=1))&&(c20_0>=1)))||(((aux16_7>=1)&&(aux14_6>=1))&&(c20_0>=1)))||(((aux16_5>=1)&&(aux14_2>=1))&&(c20_0>=1)))||(((aux16_0>=1)&&(aux14_6>=1))&&(c20_0>=1)))||(((aux16_0>=1)&&(aux14_1>=1))&&(c20_0>=1)))||(((aux16_2>=1)&&(aux14_1>=1))&&(c20_0>=1)))||(((aux16_1>=1)&&(aux14_4>=1))&&(c20_0>=1)))||(((aux16_3>=1)&&(aux14_7>=1))&&(c20_0>=1)))||(((aux16_0>=1)&&(aux14_7>=1))&&(c20_0>=1)))||(((aux16_4>=1)&&(aux14_5>=1))&&(c20_0>=1)))||(((aux16_4>=1)&&(aux14_6>=1))&&(c20_0>=1)))||(((aux16_5>=1)&&(aux14_3>=1))&&(c20_0>=1)))||(((aux16_0>=1)&&(aux14_0>=1))&&(c20_0>=1)))||(((aux16_6>=1)&&(aux14_0>=1))&&(c20_0>=1)))||(((aux16_2>=1)&&(aux14_2>=1))&&(c20_0>=1)))||(((aux16_7>=1)&&(aux14_7>=1))&&(c20_0>=1)))||(((aux16_6>=1)&&(aux14_1>=1))&&(c20_0>=1)))||(((aux16_1>=1)&&(aux14_5>=1))&&(c20_0>=1)))||(((aux16_3>=1)&&(aux14_0>=1))&&(c20_0>=1)))"))))
Formula 0 simplified : !XF"((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((aux16_2>=1)&&(aux14_3>=1))&&(c20_0>=1))||(((aux16_1>=1)&&(aux14_6>=1))&&(c20_0>=1)))||(((aux16_5>=1)&&(aux14_4>=1))&&(c20_0>=1)))||(((aux16_6>=1)&&(aux14_2>=1))&&(c20_0>=1)))||(((aux16_3>=1)&&(aux14_1>=1))&&(c20_0>=1)))||(((aux16_4>=1)&&(aux14_7>=1))&&(c20_0>=1)))||(((aux16_7>=1)&&(aux14_0>=1))&&(c20_0>=1)))||(((aux16_1>=1)&&(aux14_7>=1))&&(c20_0>=1)))||(((aux16_2>=1)&&(aux14_4>=1))&&(c20_0>=1)))||(((aux16_5>=1)&&(aux14_6>=1))&&(c20_0>=1)))||(((aux16_3>=1)&&(aux14_2>=1))&&(c20_0>=1)))||(((aux16_5>=1)&&(aux14_5>=1))&&(c20_0>=1)))||(((aux16_2>=1)&&(aux14_5>=1))&&(c20_0>=1)))||(((aux16_6>=1)&&(aux14_3>=1))&&(c20_0>=1)))||(((aux16_6>=1)&&(aux14_4>=1))&&(c20_0>=1)))||(((aux16_7>=1)&&(aux14_1>=1))&&(c20_0>=1)))||(((aux16_4>=1)&&(aux14_0>=1))&&(c20_0>=1)))||(((aux16_0>=1)&&(aux14_2>=1))&&(c20_0>=1)))||(((aux16_5>=1)&&(aux14_7>=1))&&(c20_0>=1)))||(((aux16_2>=1)&&(aux14_6>=1))&&(c20_0>=1)))||(((aux16_3>=1)&&(aux14_3>=1))&&(c20_0>=1)))||(((aux16_4>=1)&&(aux14_1>=1))&&(c20_0>=1)))||(((aux16_3>=1)&&(aux14_4>=1))&&(c20_0>=1)))||(((aux16_7>=1)&&(aux14_2>=1))&&(c20_0>=1)))||(((aux16_0>=1)&&(aux14_3>=1))&&(c20_0>=1)))||(((aux16_2>=1)&&(aux14_7>=1))&&(c20_0>=1)))||(((aux16_6>=1)&&(aux14_5>=1))&&(c20_0>=1)))||(((aux16_1>=1)&&(aux14_1>=1))&&(c20_0>=1)))||(((aux16_3>=1)&&(aux14_5>=1))&&(c20_0>=1)))||(((aux16_4>=1)&&(aux14_2>=1))&&(c20_0>=1)))||(((aux16_0>=1)&&(aux14_4>=1))&&(c20_0>=1)))||(((aux16_7>=1)&&(aux14_4>=1))&&(c20_0>=1)))||(((aux16_5>=1)&&(aux14_0>=1))&&(c20_0>=1)))||(((aux16_7>=1)&&(aux14_3>=1))&&(c20_0>=1)))||(((aux16_4>=1)&&(aux14_3>=1))&&(c20_0>=1)))||(((aux16_1>=1)&&(aux14_0>=1))&&(c20_0>=1)))||(((aux16_1>=1)&&(aux14_2>=1))&&(c20_0>=1)))||(((aux16_6>=1)&&(aux14_6>=1))&&(c20_0>=1)))||(((aux16_0>=1)&&(aux14_5>=1))&&(c20_0>=1)))||(((aux16_3>=1)&&(aux14_6>=1))&&(c20_0>=1)))||(((aux16_7>=1)&&(aux14_5>=1))&&(c20_0>=1)))||(((aux16_2>=1)&&(aux14_0>=1))&&(c20_0>=1)))||(((aux16_6>=1)&&(aux14_7>=1))&&(c20_0>=1)))||(((aux16_4>=1)&&(aux14_4>=1))&&(c20_0>=1)))||(((aux16_5>=1)&&(aux14_1>=1))&&(c20_0>=1)))||(((aux16_1>=1)&&(aux14_3>=1))&&(c20_0>=1)))||(((aux16_7>=1)&&(aux14_6>=1))&&(c20_0>=1)))||(((aux16_5>=1)&&(aux14_2>=1))&&(c20_0>=1)))||(((aux16_0>=1)&&(aux14_6>=1))&&(c20_0>=1)))||(((aux16_0>=1)&&(aux14_1>=1))&&(c20_0>=1)))||(((aux16_2>=1)&&(aux14_1>=1))&&(c20_0>=1)))||(((aux16_1>=1)&&(aux14_4>=1))&&(c20_0>=1)))||(((aux16_3>=1)&&(aux14_7>=1))&&(c20_0>=1)))||(((aux16_0>=1)&&(aux14_7>=1))&&(c20_0>=1)))||(((aux16_4>=1)&&(aux14_5>=1))&&(c20_0>=1)))||(((aux16_4>=1)&&(aux14_6>=1))&&(c20_0>=1)))||(((aux16_5>=1)&&(aux14_3>=1))&&(c20_0>=1)))||(((aux16_0>=1)&&(aux14_0>=1))&&(c20_0>=1)))||(((aux16_6>=1)&&(aux14_0>=1))&&(c20_0>=1)))||(((aux16_2>=1)&&(aux14_2>=1))&&(c20_0>=1)))||(((aux16_7>=1)&&(aux14_7>=1))&&(c20_0>=1)))||(((aux16_6>=1)&&(aux14_1>=1))&&(c20_0>=1)))||(((aux16_1>=1)&&(aux14_5>=1))&&(c20_0>=1)))||(((aux16_3>=1)&&(aux14_0>=1))&&(c20_0>=1)))"
Detected timeout of ITS tools.
[2021-05-14 10:41:15] [INFO ] Flatten gal took : 29 ms
[2021-05-14 10:41:15] [INFO ] Applying decomposition
[2021-05-14 10:41:15] [INFO ] Flatten gal took : 27 ms
Converted graph to binary with : CommandLine [args=[/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.louvain.binaries_1.0.0.202104292328/bin/convert-linux64, -i, /tmp/graph4169104147713299595.txt, -o, /tmp/graph4169104147713299595.bin, -w, /tmp/graph4169104147713299595.weights], workingDir=null]
Built communities with : CommandLine [args=[/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.louvain.binaries_1.0.0.202104292328/bin/louvain-linux64, /tmp/graph4169104147713299595.bin, -l, -1, -v, -w, /tmp/graph4169104147713299595.weights, -q, 0, -e, 0.001], workingDir=null]
[2021-05-14 10:41:15] [INFO ] Decomposing Gal with order
[2021-05-14 10:41:15] [INFO ] Rewriting arrays to variables to allow decomposition.
[2021-05-14 10:41:15] [INFO ] Removed a total of 499 redundant transitions.
[2021-05-14 10:41:15] [INFO ] Flatten gal took : 99 ms
[2021-05-14 10:41:15] [INFO ] Fuse similar labels procedure discarded/fused a total of 86 labels/synchronizations in 8 ms.
[2021-05-14 10:41:15] [INFO ] Time to serialize gal into /tmp/LTL3514140237094497073.gal : 5 ms
[2021-05-14 10:41:15] [INFO ] Time to serialize properties into /tmp/LTL1712943983233851070.ltl : 1 ms
Invoking ITS tools like this :CommandLine [args=[/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.202104292328/bin/its-ltl-linux64, --gc-threshold, 2000000, -i, /tmp/LTL3514140237094497073.gal, -t, CGAL, -LTL, /tmp/LTL1712943983233851070.ltl, -c, -stutter-deadlock], workingDir=/home/mcc/execution]
its-ltl command run as :
/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.202104292328/bin/its-ltl-linux64 --gc-threshold 2000000 -i /tmp/LTL3514140237094497073.gal -t CGAL -LTL /tmp/LTL1712943983233851070.ltl -c -stutter-deadlock
Read 1 LTL properties
Checking formula 0 : !((X(F("((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((u0.aux16_2>=1)&&(u1.aux14_3>=1))&&(u4.c20_0>=1))||(((u0.aux16_1>=1)&&(u1.aux14_6>=1))&&(u4.c20_0>=1)))||(((u0.aux16_5>=1)&&(u1.aux14_4>=1))&&(u4.c20_0>=1)))||(((u0.aux16_6>=1)&&(u1.aux14_2>=1))&&(u4.c20_0>=1)))||(((u0.aux16_3>=1)&&(u1.aux14_1>=1))&&(u4.c20_0>=1)))||(((u0.aux16_4>=1)&&(u1.aux14_7>=1))&&(u4.c20_0>=1)))||(((u0.aux16_7>=1)&&(u1.aux14_0>=1))&&(u4.c20_0>=1)))||(((u0.aux16_1>=1)&&(u1.aux14_7>=1))&&(u4.c20_0>=1)))||(((u0.aux16_2>=1)&&(u1.aux14_4>=1))&&(u4.c20_0>=1)))||(((u0.aux16_5>=1)&&(u1.aux14_6>=1))&&(u4.c20_0>=1)))||(((u0.aux16_3>=1)&&(u1.aux14_2>=1))&&(u4.c20_0>=1)))||(((u0.aux16_5>=1)&&(u1.aux14_5>=1))&&(u4.c20_0>=1)))||(((u0.aux16_2>=1)&&(u1.aux14_5>=1))&&(u4.c20_0>=1)))||(((u0.aux16_6>=1)&&(u1.aux14_3>=1))&&(u4.c20_0>=1)))||(((u0.aux16_6>=1)&&(u1.aux14_4>=1))&&(u4.c20_0>=1)))||(((u0.aux16_7>=1)&&(u1.aux14_1>=1))&&(u4.c20_0>=1)))||(((u0.aux16_4>=1)&&(u1.aux14_0>=1))&&(u4.c20_0>=1)))||(((u0.aux16_0>=1)&&(u1.aux14_2>=1))&&(u4.c20_0>=1)))||(((u0.aux16_5>=1)&&(u1.aux14_7>=1))&&(u4.c20_0>=1)))||(((u0.aux16_2>=1)&&(u1.aux14_6>=1))&&(u4.c20_0>=1)))||(((u0.aux16_3>=1)&&(u1.aux14_3>=1))&&(u4.c20_0>=1)))||(((u0.aux16_4>=1)&&(u1.aux14_1>=1))&&(u4.c20_0>=1)))||(((u0.aux16_3>=1)&&(u1.aux14_4>=1))&&(u4.c20_0>=1)))||(((u0.aux16_7>=1)&&(u1.aux14_2>=1))&&(u4.c20_0>=1)))||(((u0.aux16_0>=1)&&(u1.aux14_3>=1))&&(u4.c20_0>=1)))||(((u0.aux16_2>=1)&&(u1.aux14_7>=1))&&(u4.c20_0>=1)))||(((u0.aux16_6>=1)&&(u1.aux14_5>=1))&&(u4.c20_0>=1)))||(((u0.aux16_1>=1)&&(u1.aux14_1>=1))&&(u4.c20_0>=1)))||(((u0.aux16_3>=1)&&(u1.aux14_5>=1))&&(u4.c20_0>=1)))||(((u0.aux16_4>=1)&&(u1.aux14_2>=1))&&(u4.c20_0>=1)))||(((u0.aux16_0>=1)&&(u1.aux14_4>=1))&&(u4.c20_0>=1)))||(((u0.aux16_7>=1)&&(u1.aux14_4>=1))&&(u4.c20_0>=1)))||(((u0.aux16_5>=1)&&(u1.aux14_0>=1))&&(u4.c20_0>=1)))||(((u0.aux16_7>=1)&&(u1.aux14_3>=1))&&(u4.c20_0>=1)))||(((u0.aux16_4>=1)&&(u1.aux14_3>=1))&&(u4.c20_0>=1)))||(((u0.aux16_1>=1)&&(u1.aux14_0>=1))&&(u4.c20_0>=1)))||(((u0.aux16_1>=1)&&(u1.aux14_2>=1))&&(u4.c20_0>=1)))||(((u0.aux16_6>=1)&&(u1.aux14_6>=1))&&(u4.c20_0>=1)))||(((u0.aux16_0>=1)&&(u1.aux14_5>=1))&&(u4.c20_0>=1)))||(((u0.aux16_3>=1)&&(u1.aux14_6>=1))&&(u4.c20_0>=1)))||(((u0.aux16_7>=1)&&(u1.aux14_5>=1))&&(u4.c20_0>=1)))||(((u0.aux16_2>=1)&&(u1.aux14_0>=1))&&(u4.c20_0>=1)))||(((u0.aux16_6>=1)&&(u1.aux14_7>=1))&&(u4.c20_0>=1)))||(((u0.aux16_4>=1)&&(u1.aux14_4>=1))&&(u4.c20_0>=1)))||(((u0.aux16_5>=1)&&(u1.aux14_1>=1))&&(u4.c20_0>=1)))||(((u0.aux16_1>=1)&&(u1.aux14_3>=1))&&(u4.c20_0>=1)))||(((u0.aux16_7>=1)&&(u1.aux14_6>=1))&&(u4.c20_0>=1)))||(((u0.aux16_5>=1)&&(u1.aux14_2>=1))&&(u4.c20_0>=1)))||(((u0.aux16_0>=1)&&(u1.aux14_6>=1))&&(u4.c20_0>=1)))||(((u0.aux16_0>=1)&&(u1.aux14_1>=1))&&(u4.c20_0>=1)))||(((u0.aux16_2>=1)&&(u1.aux14_1>=1))&&(u4.c20_0>=1)))||(((u0.aux16_1>=1)&&(u1.aux14_4>=1))&&(u4.c20_0>=1)))||(((u0.aux16_3>=1)&&(u1.aux14_7>=1))&&(u4.c20_0>=1)))||(((u0.aux16_0>=1)&&(u1.aux14_7>=1))&&(u4.c20_0>=1)))||(((u0.aux16_4>=1)&&(u1.aux14_5>=1))&&(u4.c20_0>=1)))||(((u0.aux16_4>=1)&&(u1.aux14_6>=1))&&(u4.c20_0>=1)))||(((u0.aux16_5>=1)&&(u1.aux14_3>=1))&&(u4.c20_0>=1)))||(((u0.aux16_0>=1)&&(u1.aux14_0>=1))&&(u4.c20_0>=1)))||(((u0.aux16_6>=1)&&(u1.aux14_0>=1))&&(u4.c20_0>=1)))||(((u0.aux16_2>=1)&&(u1.aux14_2>=1))&&(u4.c20_0>=1)))||(((u0.aux16_7>=1)&&(u1.aux14_7>=1))&&(u4.c20_0>=1)))||(((u0.aux16_6>=1)&&(u1.aux14_1>=1))&&(u4.c20_0>=1)))||(((u0.aux16_1>=1)&&(u1.aux14_5>=1))&&(u4.c20_0>=1)))||(((u0.aux16_3>=1)&&(u1.aux14_0>=1))&&(u4.c20_0>=1)))"))))
Formula 0 simplified : !XF"((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((u0.aux16_2>=1)&&(u1.aux14_3>=1))&&(u4.c20_0>=1))||(((u0.aux16_1>=1)&&(u1.aux14_6>=1))&&(u4.c20_0>=1)))||(((u0.aux16_5>=1)&&(u1.aux14_4>=1))&&(u4.c20_0>=1)))||(((u0.aux16_6>=1)&&(u1.aux14_2>=1))&&(u4.c20_0>=1)))||(((u0.aux16_3>=1)&&(u1.aux14_1>=1))&&(u4.c20_0>=1)))||(((u0.aux16_4>=1)&&(u1.aux14_7>=1))&&(u4.c20_0>=1)))||(((u0.aux16_7>=1)&&(u1.aux14_0>=1))&&(u4.c20_0>=1)))||(((u0.aux16_1>=1)&&(u1.aux14_7>=1))&&(u4.c20_0>=1)))||(((u0.aux16_2>=1)&&(u1.aux14_4>=1))&&(u4.c20_0>=1)))||(((u0.aux16_5>=1)&&(u1.aux14_6>=1))&&(u4.c20_0>=1)))||(((u0.aux16_3>=1)&&(u1.aux14_2>=1))&&(u4.c20_0>=1)))||(((u0.aux16_5>=1)&&(u1.aux14_5>=1))&&(u4.c20_0>=1)))||(((u0.aux16_2>=1)&&(u1.aux14_5>=1))&&(u4.c20_0>=1)))||(((u0.aux16_6>=1)&&(u1.aux14_3>=1))&&(u4.c20_0>=1)))||(((u0.aux16_6>=1)&&(u1.aux14_4>=1))&&(u4.c20_0>=1)))||(((u0.aux16_7>=1)&&(u1.aux14_1>=1))&&(u4.c20_0>=1)))||(((u0.aux16_4>=1)&&(u1.aux14_0>=1))&&(u4.c20_0>=1)))||(((u0.aux16_0>=1)&&(u1.aux14_2>=1))&&(u4.c20_0>=1)))||(((u0.aux16_5>=1)&&(u1.aux14_7>=1))&&(u4.c20_0>=1)))||(((u0.aux16_2>=1)&&(u1.aux14_6>=1))&&(u4.c20_0>=1)))||(((u0.aux16_3>=1)&&(u1.aux14_3>=1))&&(u4.c20_0>=1)))||(((u0.aux16_4>=1)&&(u1.aux14_1>=1))&&(u4.c20_0>=1)))||(((u0.aux16_3>=1)&&(u1.aux14_4>=1))&&(u4.c20_0>=1)))||(((u0.aux16_7>=1)&&(u1.aux14_2>=1))&&(u4.c20_0>=1)))||(((u0.aux16_0>=1)&&(u1.aux14_3>=1))&&(u4.c20_0>=1)))||(((u0.aux16_2>=1)&&(u1.aux14_7>=1))&&(u4.c20_0>=1)))||(((u0.aux16_6>=1)&&(u1.aux14_5>=1))&&(u4.c20_0>=1)))||(((u0.aux16_1>=1)&&(u1.aux14_1>=1))&&(u4.c20_0>=1)))||(((u0.aux16_3>=1)&&(u1.aux14_5>=1))&&(u4.c20_0>=1)))||(((u0.aux16_4>=1)&&(u1.aux14_2>=1))&&(u4.c20_0>=1)))||(((u0.aux16_0>=1)&&(u1.aux14_4>=1))&&(u4.c20_0>=1)))||(((u0.aux16_7>=1)&&(u1.aux14_4>=1))&&(u4.c20_0>=1)))||(((u0.aux16_5>=1)&&(u1.aux14_0>=1))&&(u4.c20_0>=1)))||(((u0.aux16_7>=1)&&(u1.aux14_3>=1))&&(u4.c20_0>=1)))||(((u0.aux16_4>=1)&&(u1.aux14_3>=1))&&(u4.c20_0>=1)))||(((u0.aux16_1>=1)&&(u1.aux14_0>=1))&&(u4.c20_0>=1)))||(((u0.aux16_1>=1)&&(u1.aux14_2>=1))&&(u4.c20_0>=1)))||(((u0.aux16_6>=1)&&(u1.aux14_6>=1))&&(u4.c20_0>=1)))||(((u0.aux16_0>=1)&&(u1.aux14_5>=1))&&(u4.c20_0>=1)))||(((u0.aux16_3>=1)&&(u1.aux14_6>=1))&&(u4.c20_0>=1)))||(((u0.aux16_7>=1)&&(u1.aux14_5>=1))&&(u4.c20_0>=1)))||(((u0.aux16_2>=1)&&(u1.aux14_0>=1))&&(u4.c20_0>=1)))||(((u0.aux16_6>=1)&&(u1.aux14_7>=1))&&(u4.c20_0>=1)))||(((u0.aux16_4>=1)&&(u1.aux14_4>=1))&&(u4.c20_0>=1)))||(((u0.aux16_5>=1)&&(u1.aux14_1>=1))&&(u4.c20_0>=1)))||(((u0.aux16_1>=1)&&(u1.aux14_3>=1))&&(u4.c20_0>=1)))||(((u0.aux16_7>=1)&&(u1.aux14_6>=1))&&(u4.c20_0>=1)))||(((u0.aux16_5>=1)&&(u1.aux14_2>=1))&&(u4.c20_0>=1)))||(((u0.aux16_0>=1)&&(u1.aux14_6>=1))&&(u4.c20_0>=1)))||(((u0.aux16_0>=1)&&(u1.aux14_1>=1))&&(u4.c20_0>=1)))||(((u0.aux16_2>=1)&&(u1.aux14_1>=1))&&(u4.c20_0>=1)))||(((u0.aux16_1>=1)&&(u1.aux14_4>=1))&&(u4.c20_0>=1)))||(((u0.aux16_3>=1)&&(u1.aux14_7>=1))&&(u4.c20_0>=1)))||(((u0.aux16_0>=1)&&(u1.aux14_7>=1))&&(u4.c20_0>=1)))||(((u0.aux16_4>=1)&&(u1.aux14_5>=1))&&(u4.c20_0>=1)))||(((u0.aux16_4>=1)&&(u1.aux14_6>=1))&&(u4.c20_0>=1)))||(((u0.aux16_5>=1)&&(u1.aux14_3>=1))&&(u4.c20_0>=1)))||(((u0.aux16_0>=1)&&(u1.aux14_0>=1))&&(u4.c20_0>=1)))||(((u0.aux16_6>=1)&&(u1.aux14_0>=1))&&(u4.c20_0>=1)))||(((u0.aux16_2>=1)&&(u1.aux14_2>=1))&&(u4.c20_0>=1)))||(((u0.aux16_7>=1)&&(u1.aux14_7>=1))&&(u4.c20_0>=1)))||(((u0.aux16_6>=1)&&(u1.aux14_1>=1))&&(u4.c20_0>=1)))||(((u0.aux16_1>=1)&&(u1.aux14_5>=1))&&(u4.c20_0>=1)))||(((u0.aux16_3>=1)&&(u1.aux14_0>=1))&&(u4.c20_0>=1)))"
Detected timeout of ITS tools.
Built C files in :
/tmp/ltsmin12965001189498012360
[2021-05-14 10:41:30] [INFO ] Built C files in 13ms conformant to PINS (ltsmin variant)in folder :/tmp/ltsmin12965001189498012360
Running compilation step : CommandLine [args=[gcc, -c, -I/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.ltsmin.binaries_1.0.0.202104292328/bin/include/, -I., -std=c99, -fPIC, -O2, model.c], workingDir=/tmp/ltsmin12965001189498012360]
WARNING : LTS min runner thread failed on error :java.lang.RuntimeException: Compilation or link of executable timed out.java.util.concurrent.TimeoutException: Subprocess running CommandLine [args=[gcc, -c, -I/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.ltsmin.binaries_1.0.0.202104292328/bin/include/, -I., -std=c99, -fPIC, -O2, model.c], workingDir=/tmp/ltsmin12965001189498012360] killed by timeout after 1 SECONDS
java.lang.RuntimeException: Compilation or link of executable timed out.java.util.concurrent.TimeoutException: Subprocess running CommandLine [args=[gcc, -c, -I/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.ltsmin.binaries_1.0.0.202104292328/bin/include/, -I., -std=c99, -fPIC, -O2, model.c], workingDir=/tmp/ltsmin12965001189498012360] killed by timeout after 1 SECONDS
at fr.lip6.move.gal.application.LTSminRunner$1.run(LTSminRunner.java:79)
at java.base/java.lang.Thread.run(Thread.java:834)
Treatment of property PermAdmissibility-COL-05-06 finished in 37712 ms.
Running Spot : CommandLine [args=[/home/mcc/BenchKit/bin//..//ltl2tgba, --hoaf=tv, -f, !(X((p0&&F((p1&&X(p2))))))], workingDir=/home/mcc/execution]
Support contains 52 out of 104 places. Attempting structural reductions.
Starting structural reductions, iteration 0 : 104/104 places, 592/592 transitions.
Applied a total of 0 rules in 1 ms. Remains 104 /104 variables (removed 0) and now considering 592/592 (removed 0) transitions.
// Phase 1: matrix 592 rows 104 cols
[2021-05-14 10:41:32] [INFO ] Computed 16 place invariants in 17 ms
[2021-05-14 10:41:32] [INFO ] Implicit Places using invariants in 287 ms returned []
// Phase 1: matrix 592 rows 104 cols
[2021-05-14 10:41:32] [INFO ] Computed 16 place invariants in 12 ms
[2021-05-14 10:41:32] [INFO ] Implicit Places using invariants and state equation in 281 ms returned []
Implicit Place search using SMT with State Equation took 570 ms to find 0 implicit places.
// Phase 1: matrix 592 rows 104 cols
[2021-05-14 10:41:32] [INFO ] Computed 16 place invariants in 3 ms
[2021-05-14 10:41:32] [INFO ] Dead Transitions using invariants and state equation in 221 ms returned []
Finished structural reductions, in 1 iterations. Remains : 104/104 places, 592/592 transitions.
Stuttering acceptance computed with spot in 128 ms :[(NOT p2), (OR (NOT p2) (NOT p1)), (OR (NOT p1) (NOT p0) (NOT p2)), (OR (NOT p1) (NOT p2) (NOT p0)), true]
Running random walk in product with property : PermAdmissibility-COL-05-07 automaton TGBA [mat=[[{ cond=(AND p1 (NOT p2)), acceptance={0} source=0 dest: 0}, { cond=(AND (NOT p1) (NOT p2)), acceptance={0} source=0 dest: 1}], [{ cond=p1, acceptance={0} source=1 dest: 0}, { cond=(NOT p1), acceptance={0} source=1 dest: 1}], [{ cond=(AND p0 p1), acceptance={} source=2 dest: 0}, { cond=(AND p0 (NOT p1)), acceptance={} source=2 dest: 1}, { cond=(NOT p0), acceptance={} source=2 dest: 4}], [{ cond=true, acceptance={} source=3 dest: 2}], [{ cond=true, acceptance={0} source=4 dest: 4}]], initial=3, aps=[p1:(OR (AND (GEQ s69 1) (GEQ s99 1) (GEQ s103 1)) (AND (GEQ s74 1) (GEQ s95 1) (GEQ s103 1)) (AND (GEQ s70 1) (GEQ s96 1) (GEQ s103 1)) (AND (GEQ s71 1) (GEQ s94 1) (GEQ s103 1)) (AND (GEQ s73 1) (GEQ s97 1) (GEQ s103 1)) (AND (GEQ s68 1) (GEQ s93 1) (GEQ s103 1)) (AND (GEQ s72 1) (GEQ s100 1) (GEQ s103 1)) (AND (GEQ s75 1) (GEQ s93 1) (GEQ s103 1)) (AND (GEQ s74 1) (GEQ s96 1) (GEQ s103 1)) (AND (GEQ s73 1) (GEQ s99 1) (GEQ s103 1)) (AND (GEQ s70 1) (GEQ s97 1) (GEQ s103 1)) (AND (GEQ s68 1) (GEQ s94 1) (GEQ s103 1)) (AND (GEQ s70 1) (GEQ s98 1) (GEQ s103 1)) (AND (GEQ s73 1) (GEQ s98 1) (GEQ s103 1)) (AND (GEQ s69 1) (GEQ s100 1) (GEQ s103 1)) (AND (GEQ s71 1) (GEQ s95 1) (GEQ s103 1)) (AND (GEQ s72 1) (GEQ s93 1) (GEQ s103 1)) (AND (GEQ s73 1) (GEQ s100 1) (GEQ s103 1)) (AND (GEQ s74 1) (GEQ s97 1) (GEQ s103 1)) (AND (GEQ s70 1) (GEQ s99 1) (GEQ s103 1)) (AND (GEQ s68 1) (GEQ s95 1) (GEQ s103 1)) (AND (GEQ s75 1) (GEQ s94 1) (GEQ s103 1)) (AND (GEQ s71 1) (GEQ s96 1) (GEQ s103 1)) (AND (GEQ s71 1) (GEQ s97 1) (GEQ s103 1)) (AND (GEQ s69 1) (GEQ s93 1) (GEQ s103 1)) (AND (GEQ s70 1) (GEQ s100 1) (GEQ s103 1)) (AND (GEQ s68 1) (GEQ s96 1) (GEQ s103 1)) (AND (GEQ s72 1) (GEQ s94 1) (GEQ s103 1)) (AND (GEQ s75 1) (GEQ s95 1) (GEQ s103 1)) (AND (GEQ s74 1) (GEQ s98 1) (GEQ s103 1)) (AND (GEQ s68 1) (GEQ s97 1) (GEQ s103 1)) (AND (GEQ s69 1) (GEQ s94 1) (GEQ s103 1)) (AND (GEQ s75 1) (GEQ s97 1) (GEQ s103 1)) (AND (GEQ s72 1) (GEQ s95 1) (GEQ s103 1)) (AND (GEQ s72 1) (GEQ s96 1) (GEQ s103 1)) (AND (GEQ s74 1) (GEQ s99 1) (GEQ s103 1)) (AND (GEQ s75 1) (GEQ s96 1) (GEQ s103 1)) (AND (GEQ s71 1) (GEQ s98 1) (GEQ s103 1)) (AND (GEQ s69 1) (GEQ s95 1) (GEQ s103 1)) (AND (GEQ s73 1) (GEQ s93 1) (GEQ s103 1)) (AND (GEQ s75 1) (GEQ s98 1) (GEQ s103 1)) (AND (GEQ s72 1) (GEQ s97 1) (GEQ s103 1)) (AND (GEQ s68 1) (GEQ s98 1) (GEQ s103 1)) (AND (GEQ s69 1) (GEQ s96 1) (GEQ s103 1)) (AND (GEQ s70 1) (GEQ s93 1) (GEQ s103 1)) (AND (GEQ s71 1) (GEQ s99 1) (GEQ s103 1)) (AND (GEQ s74 1) (GEQ s100 1) (GEQ s103 1)) (AND (GEQ s73 1) (GEQ s94 1) (GEQ s103 1)) (AND (GEQ s73 1) (GEQ s95 1) (GEQ s103 1)) (AND (GEQ s72 1) (GEQ s98 1) (GEQ s103 1)) (AND (GEQ s70 1) (GEQ s94 1) (GEQ s103 1)) (AND (GEQ s68 1) (GEQ s99 1) (GEQ s103 1)) (AND (GEQ s75 1) (GEQ s99 1) (GEQ s103 1)) (AND (GEQ s68 1) (GEQ s100 1) (GEQ s103 1)) (AND (GEQ s71 1) (GEQ s100 1) (GEQ s103 1)) (AND (GEQ s69 1) (GEQ s97 1) (GEQ s103 1)) (AND (GEQ s70 1) (GEQ s95 1) (GEQ s103 1)) (AND (GEQ s72 1) (GEQ s99 1) (GEQ s103 1)) (AND (GEQ s75 1) (GEQ s100 1) (GEQ s103 1)) (AND (GEQ s74 1) (GEQ s93 1) (GEQ s103 1)) (AND (GEQ s74 1) (GEQ s94 1) (GEQ s103 1)) (AND (GEQ s71 1) (GEQ s93 1) (GEQ s103 1)) (AND (GEQ s73 1) (GEQ s96 1) (GEQ s103 1)) (AND (GEQ s69 1) (GEQ s98 1) (GEQ s103 1))), p2:(AND (OR (AND (GEQ s51 1) (GEQ s54 1) (GEQ s65 1)) (AND (GEQ s48 1) (GEQ s52 1) (GEQ s65 1)) (AND (GEQ s48 1) (GEQ s53 1) (GEQ s65 1)) (AND (GEQ s51 1) (GEQ s55 1) (GEQ s65 1)) (AND (GEQ s50 1) (GEQ s52 1) (GEQ s65 1)) (AND (GEQ s49 1) (GEQ s52 1) (GEQ s65 1)) (AND (GEQ s50 1) (GEQ s53 1) (GEQ s65 1)) (AND (GEQ s48 1) (GEQ s54 1) (GEQ s65 1)) (AND (GEQ s51 1) (GEQ s52 1) (GEQ s65 1)) (AND (GEQ s49 1) (GEQ s53 1) (GEQ s65 1)) (AND (GEQ s51 1) (GEQ s53 1) (GEQ s65 1)) (AND (GEQ s50 1) (GEQ s54 1) (GEQ s65 1)) (AND (GEQ s48 1) (GEQ s55 1) (GEQ s65 1)) (AND (GEQ s49 1) (GEQ s54 1) (GEQ s65 1)) (AND (GEQ s50 1) (GEQ s55 1) (GEQ s65 1)) (AND (GEQ s49 1) (GEQ s55 1) (GEQ s65 1))) (OR (AND (GEQ s77 1) (GEQ s91 1) (GEQ s102 1)) (AND (GEQ s80 1) (GEQ s92 1) (GEQ s102 1)) (AND (GEQ s82 1) (GEQ s86 1) (GEQ s102 1)) (AND (GEQ s78 1) (GEQ s88 1) (GEQ s102 1)) (AND (GEQ s82 1) (GEQ s87 1) (GEQ s102 1)) (AND (GEQ s81 1) (GEQ s89 1) (GEQ s102 1)) (AND (GEQ s79 1) (GEQ s86 1) (GEQ s102 1)) (AND (GEQ s77 1) (GEQ s92 1) (GEQ s102 1)) (AND (GEQ s78 1) (GEQ s89 1) (GEQ s102 1)) (AND (GEQ s82 1) (GEQ s88 1) (GEQ s102 1)) (AND (GEQ s78 1) (GEQ s90 1) (GEQ s102 1)) (AND (GEQ s76 1) (GEQ s86 1) (GEQ s102 1)) (AND (GEQ s81 1) (GEQ s90 1) (GEQ s102 1)) (AND (GEQ s83 1) (GEQ s85 1) (GEQ s102 1)) (AND (GEQ s79 1) (GEQ s87 1) (GEQ s102 1)) (AND (GEQ s83 1) (GEQ s86 1) (GEQ s102 1)) (AND (GEQ s82 1) (GEQ s89 1) (GEQ s102 1)) (AND (GEQ s81 1) (GEQ s92 1) (GEQ s102 1)) (AND (GEQ s80 1) (GEQ s85 1) (GEQ s102 1)) (AND (GEQ s76 1) (GEQ s87 1) (GEQ s102 1)) (AND (GEQ s78 1) (GEQ s91 1) (GEQ s102 1)) (AND (GEQ s81 1) (GEQ s91 1) (GEQ s102 1)) (AND (GEQ s79 1) (GEQ s88 1) (GEQ s102 1)) (AND (GEQ s79 1) (GEQ s89 1) (GEQ s102 1)) (AND (GEQ s82 1) (GEQ s90 1) (GEQ s102 1)) (AND (GEQ s77 1) (GEQ s85 1) (GEQ s102 1)) (AND (GEQ s78 1) (GEQ s92 1) (GEQ s102 1)) (AND (GEQ s76 1) (GEQ s88 1) (GEQ s102 1)) (AND (GEQ s80 1) (GEQ s86 1) (GEQ s102 1)) (AND (GEQ s83 1) (GEQ s87 1) (GEQ s102 1)) (AND (GEQ s77 1) (GEQ s86 1) (GEQ s102 1)) (AND (GEQ s79 1) (GEQ s90 1) (GEQ s102 1)) (AND (GEQ s76 1) (GEQ s89 1) (GEQ s102 1)) (AND (GEQ s80 1) (GEQ s87 1) (GEQ s102 1)) (AND (GEQ s81 1) (GEQ s85 1) (GEQ s102 1)) (AND (GEQ s83 1) (GEQ s88 1) (GEQ s102 1)) (AND (GEQ s77 1) (GEQ s87 1) (GEQ s102 1)) (AND (GEQ s82 1) (GEQ s91 1) (GEQ s102 1)) (AND (GEQ s83 1) (GEQ s90 1) (GEQ s102 1)) (AND (GEQ s80 1) (GEQ s88 1) (GEQ s102 1)) (AND (GEQ s76 1) (GEQ s90 1) (GEQ s102 1)) (AND (GEQ s78 1) (GEQ s85 1) (GEQ s102 1)) (AND (GEQ s82 1) (GEQ s92 1) (GEQ s102 1)) (AND (GEQ s80 1) (GEQ s89 1) (GEQ s102 1)) (AND (GEQ s83 1) (GEQ s89 1) (GEQ s102 1)) (AND (GEQ s79 1) (GEQ s91 1) (GEQ s102 1)) (AND (GEQ s77 1) (GEQ s88 1) (GEQ s102 1)) (AND (GEQ s81 1) (GEQ s86 1) (GEQ s102 1)) (AND (GEQ s83 1) (GEQ s91 1) (GEQ s102 1)) (AND (GEQ s76 1) (GEQ s91 1) (GEQ s102 1)) (AND (GEQ s80 1) (GEQ s90 1) (GEQ s102 1)) (AND (GEQ s78 1) (GEQ s86 1) (GEQ s102 1)) (AND (GEQ s76 1) (GEQ s92 1) (GEQ s102 1)) (AND (GEQ s79 1) (GEQ s92 1) (GEQ s102 1)) (AND (GEQ s81 1) (GEQ s87 1) (GEQ s102 1)) (AND (GEQ s77 1) (GEQ s89 1) (GEQ s102 1)) (AND (GEQ s81 1) (GEQ s88 1) (GEQ s102 1)) (AND (GEQ s76 1) (GEQ s85 1) (GEQ s102 1)) (AND (GEQ s80 1) (GEQ s91 1) (GEQ s102 1)) (AND (GEQ s78 1) (GEQ s87 1) (GEQ s102 1)) (AND (GEQ s83 1) (GEQ s92 1) (GEQ s102 1)) (AND (GEQ s82 1) (GEQ s85 1) (GEQ s102 1)) (AND (GEQ s77 1) (GEQ s90 1) (GEQ s102 1)) (AND (GEQ s79 1) (GEQ s85 1) (GEQ s102 1)))), p0:(OR (AND (GEQ s59 1) (GEQ s64 1) (GEQ s66 1)) (AND (GEQ s56 1) (GEQ s62 1) (GEQ s66 1)) (AND (GEQ s58 1) (GEQ s61 1) (GEQ s66 1)) (AND (GEQ s57 1) (GEQ s64 1) (GEQ s66 1)) (AND (GEQ s59 1) (GEQ s63 1) (GEQ s66 1)) (AND (GEQ s56 1) (GEQ s61 1) (GEQ s66 1)) (AND (GEQ s59 1) (GEQ s62 1) (GEQ s66 1)) (AND (GEQ s56 1) (GEQ s64 1) (GEQ s66 1)) (AND (GEQ s58 1) (GEQ s64 1) (GEQ s66 1)) (AND (GEQ s57 1) (GEQ s63 1) (GEQ s66 1)) (AND (GEQ s58 1) (GEQ s63 1) (GEQ s66 1)) (AND (GEQ s57 1) (GEQ s61 1) (GEQ s66 1)) (AND (GEQ s58 1) (GEQ s62 1) (GEQ s66 1)) (AND (GEQ s56 1) (GEQ s63 1) (GEQ s66 1)) (AND (GEQ s57 1) (GEQ s62 1) (GEQ s66 1)) (AND (GEQ s59 1) (GEQ s61 1) (GEQ s66 1)))], nbAcceptance=1, properties=[trans-labels, explicit-labels, trans-acc, deterministic, no-univ-branch, unambiguous, semi-deterministic, weak, inherently-weak], stateDesc=[null, null, null, null, null][false, false, false, false, false]]
Entered a terminal (fully accepting) state of product in 1 steps with 0 reset in 0 ms.
FORMULA PermAdmissibility-COL-05-07 FALSE TECHNIQUES STUTTER_TEST
Treatment of property PermAdmissibility-COL-05-07 finished in 959 ms.
Running Spot : CommandLine [args=[/home/mcc/BenchKit/bin//..//ltl2tgba, --hoaf=tv, -f, !((X(F((p0&&F(!p1)))) U (G(!p2)&&X(!p1))))], workingDir=/home/mcc/execution]
Support contains 27 out of 104 places. Attempting structural reductions.
Starting structural reductions, iteration 0 : 104/104 places, 592/592 transitions.
Discarding 14 places :
Symmetric choice reduction at 0 with 14 rule applications. Total rules 14 place count 90 transition count 466
Iterating global reduction 0 with 14 rules applied. Total rules applied 28 place count 90 transition count 466
Applied a total of 28 rules in 9 ms. Remains 90 /104 variables (removed 14) and now considering 466/592 (removed 126) transitions.
// Phase 1: matrix 466 rows 90 cols
[2021-05-14 10:41:32] [INFO ] Computed 16 place invariants in 4 ms
[2021-05-14 10:41:33] [INFO ] Implicit Places using invariants in 73 ms returned [76, 78]
Discarding 2 places :
Implicit Place search using SMT only with invariants took 74 ms to find 2 implicit places.
// Phase 1: matrix 466 rows 88 cols
[2021-05-14 10:41:33] [INFO ] Computed 14 place invariants in 5 ms
[2021-05-14 10:41:33] [INFO ] Dead Transitions using invariants and state equation in 193 ms returned []
Starting structural reductions, iteration 1 : 88/104 places, 466/592 transitions.
Applied a total of 0 rules in 3 ms. Remains 88 /88 variables (removed 0) and now considering 466/466 (removed 0) transitions.
// Phase 1: matrix 466 rows 88 cols
[2021-05-14 10:41:33] [INFO ] Computed 14 place invariants in 2 ms
[2021-05-14 10:41:33] [INFO ] Dead Transitions using invariants and state equation in 177 ms returned []
Finished structural reductions, in 2 iterations. Remains : 88/104 places, 466/592 transitions.
Stuttering acceptance computed with spot in 5666 ms :[(OR p1 p2), (OR (NOT p0) p1), p2, (OR (AND p1 (NOT p2)) (AND p0 p1)), p1, p1]
Running random walk in product with property : PermAdmissibility-COL-05-08 automaton TGBA [mat=[[{ cond=p2, acceptance={0} source=0 dest: 0}, { cond=p2, acceptance={} source=0 dest: 1}, { cond=(NOT p2), acceptance={} source=0 dest: 2}, { cond=(NOT p2), acceptance={} source=0 dest: 3}, { cond=(NOT p2), acceptance={0} source=0 dest: 4}], [{ cond=(NOT p0), acceptance={0} source=1 dest: 1}, { cond=(AND p0 p1), acceptance={} source=1 dest: 5}], [{ cond=p2, acceptance={0} source=2 dest: 0}, { cond=p2, acceptance={} source=2 dest: 1}, { cond=(NOT p2), acceptance={} source=2 dest: 2}], [{ cond=(AND (NOT p2) (NOT p0) p1), acceptance={} source=3 dest: 1}, { cond=(AND p0 p1), acceptance={} source=3 dest: 5}], [{ cond=(AND p2 p1), acceptance={0} source=4 dest: 0}, { cond=(AND p2 p1), acceptance={} source=4 dest: 1}, { cond=(AND (NOT p2) p1), acceptance={} source=4 dest: 2}, { cond=(AND (NOT p2) p1), acceptance={} source=4 dest: 3}, { cond=(AND (NOT p2) p1), acceptance={0} source=4 dest: 4}], [{ cond=p1, acceptance={0} source=5 dest: 5}]], initial=0, aps=[p2:(AND (OR (LT s58 1) (LT s60 1) (LT s62 1)) (OR (LT s56 1) (LT s60 1) (LT s62 1)) (OR (LT s58 1) (LT s60 1) (LT s64 1)) (OR (LT s57 1) (LT s60 1) (LT s64 1)) (OR (LT s57 1) (LT s60 1) (LT s62 1)) (OR (LT s59 1) (LT s60 1) (LT s61 1)) (OR (LT s56 1) (LT s60 1) (LT s64 1)) (OR (LT s59 1) (LT s60 1) (LT s63 1)) (OR (LT s58 1) (LT s60 1) (LT s63 1)) (OR (LT s56 1) (LT s60 1) (LT s61 1)) (OR (LT s56 1) (LT s60 1) (LT s63 1)) (OR (LT s57 1) (LT s60 1) (LT s63 1)) (OR (LT s57 1) (LT s60 1) (LT s61 1)) (OR (LT s59 1) (LT s60 1) (LT s62 1)) (OR (LT s58 1) (LT s60 1) (LT s61 1)) (OR (LT s59 1) (LT s60 1) (LT s64 1))), p0:(OR (AND (GEQ s69 1) (GEQ s83 1) (GEQ s87 1)) (AND (GEQ s74 1) (GEQ s79 1) (GEQ s87 1)) (AND (GEQ s70 1) (GEQ s80 1) (GEQ s87 1)) (AND (GEQ s71 1) (GEQ s78 1) (GEQ s87 1)) (AND (GEQ s73 1) (GEQ s81 1) (GEQ s87 1)) (AND (GEQ s68 1) (GEQ s77 1) (GEQ s87 1)) (AND (GEQ s72 1) (GEQ s84 1) (GEQ s87 1)) (AND (GEQ s75 1) (GEQ s77 1) (GEQ s87 1)) (AND (GEQ s74 1) (GEQ s80 1) (GEQ s87 1)) (AND (GEQ s73 1) (GEQ s83 1) (GEQ s87 1)) (AND (GEQ s70 1) (GEQ s81 1) (GEQ s87 1)) (AND (GEQ s68 1) (GEQ s78 1) (GEQ s87 1)) (AND (GEQ s70 1) (GEQ s82 1) (GEQ s87 1)) (AND (GEQ s73 1) (GEQ s82 1) (GEQ s87 1)) (AND (GEQ s69 1) (GEQ s84 1) (GEQ s87 1)) (AND (GEQ s71 1) (GEQ s79 1) (GEQ s87 1)) (AND (GEQ s72 1) (GEQ s77 1) (GEQ s87 1)) (AND (GEQ s73 1) (GEQ s84 1) (GEQ s87 1)) (AND (GEQ s74 1) (GEQ s81 1) (GEQ s87 1)) (AND (GEQ s70 1) (GEQ s83 1) (GEQ s87 1)) (AND (GEQ s68 1) (GEQ s79 1) (GEQ s87 1)) (AND (GEQ s75 1) (GEQ s78 1) (GEQ s87 1)) (AND (GEQ s71 1) (GEQ s80 1) (GEQ s87 1)) (AND (GEQ s71 1) (GEQ s81 1) (GEQ s87 1)) (AND (GEQ s69 1) (GEQ s77 1) (GEQ s87 1)) (AND (GEQ s70 1) (GEQ s84 1) (GEQ s87 1)) (AND (GEQ s68 1) (GEQ s80 1) (GEQ s87 1)) (AND (GEQ s72 1) (GEQ s78 1) (GEQ s87 1)) (AND (GEQ s75 1) (GEQ s79 1) (GEQ s87 1)) (AND (GEQ s74 1) (GEQ s82 1) (GEQ s87 1)) (AND (GEQ s68 1) (GEQ s81 1) (GEQ s87 1)) (AND (GEQ s69 1) (GEQ s78 1) (GEQ s87 1)) (AND (GEQ s75 1) (GEQ s81 1) (GEQ s87 1)) (AND (GEQ s72 1) (GEQ s79 1) (GEQ s87 1)) (AND (GEQ s72 1) (GEQ s80 1) (GEQ s87 1)) (AND (GEQ s74 1) (GEQ s83 1) (GEQ s87 1)) (AND (GEQ s75 1) (GEQ s80 1) (GEQ s87 1)) (AND (GEQ s71 1) (GEQ s82 1) (GEQ s87 1)) (AND (GEQ s69 1) (GEQ s79 1) (GEQ s87 1)) (AND (GEQ s73 1) (GEQ s77 1) (GEQ s87 1)) (AND (GEQ s75 1) (GEQ s82 1) (GEQ s87 1)) (AND (GEQ s72 1) (GEQ s81 1) (GEQ s87 1)) (AND (GEQ s68 1) (GEQ s82 1) (GEQ s87 1)) (AND (GEQ s69 1) (GEQ s80 1) (GEQ s87 1)) (AND (GEQ s70 1) (GEQ s77 1) (GEQ s87 1)) (AND (GEQ s71 1) (GEQ s83 1) (GEQ s87 1)) (AND (GEQ s74 1) (GEQ s84 1) (GEQ s87 1)) (AND (GEQ s73 1) (GEQ s78 1) (GEQ s87 1)) (AND (GEQ s73 1) (GEQ s79 1) (GEQ s87 1)) (AND (GEQ s72 1) (GEQ s82 1) (GEQ s87 1)) (AND (GEQ s70 1) (GEQ s78 1) (GEQ s87 1)) (AND (GEQ s68 1) (GEQ s83 1) (GEQ s87 1)) (AND (GEQ s75 1) (GEQ s83 1) (GEQ s87 1)) (AND (GEQ s68 1) (GEQ s84 1) (GEQ s87 1)) (AND (GEQ s71 1) (GEQ s84 1) (GEQ s87 1)) (AND (GEQ s69 1) (GEQ s81 1) (GEQ s87 1)) (AND (GEQ s70 1) (GEQ s79 1) (GEQ s87 1)) (AND (GEQ s72 1) (GEQ s83 1) (GEQ s87 1)) (AND (GEQ s75 1) (GEQ s84 1) (GEQ s87 1)) (AND (GEQ s74 1) (GEQ s77 1) (GEQ s87 1)) (AND (GEQ s74 1) (GEQ s78 1) (GEQ s87 1)) (AND (GEQ s71 1) (GEQ s77 1) (GEQ s87 1)) (AND (GEQ s73 1) (GEQ s80 1) (GEQ s87 1)) (AND (GEQ s69 1) (GEQ s82 1) (GEQ s87 1))), p1:(AND (OR (LT s70 1) (LT s80 1) (LT s85 1)) (OR (LT s69 1) (LT s83 1) (LT s85 1)) (OR (LT s73 1) (LT s81 1) (LT s85 1)) (OR (LT s74 1) (LT s79 1) (LT s85 1)) (OR (LT s71 1) (LT s78 1) (LT s85 1)) (OR (LT s72 1) (LT s84 1) (LT s85 1)) (OR (LT s75 1) (LT s77 1) (LT s85 1)) (OR (LT s69 1) (LT s84 1) (LT s85 1)) (OR (LT s70 1) (LT s81 1) (LT s85 1)) (OR (LT s73 1) (LT s83 1) (LT s85 1)) (OR (LT s71 1) (LT s79 1) (LT s85 1)) (OR (LT s73 1) (LT s82 1) (LT s85 1)) (OR (LT s70 1) (LT s82 1) (LT s85 1)) (OR (LT s74 1) (LT s80 1) (LT s85 1)) (OR (LT s74 1) (LT s81 1) (LT s85 1)) (OR (LT s75 1) (LT s78 1) (LT s85 1)) (OR (LT s72 1) (LT s77 1) (LT s85 1)) (OR (LT s68 1) (LT s79 1) (LT s85 1)) (OR (LT s73 1) (LT s84 1) (LT s85 1)) (OR (LT s70 1) (LT s83 1) (LT s85 1)) (OR (LT s71 1) (LT s80 1) (LT s85 1)) (OR (LT s72 1) (LT s78 1) (LT s85 1)) (OR (LT s71 1) (LT s81 1) (LT s85 1)) (OR (LT s75 1) (LT s79 1) (LT s85 1)) (OR (LT s68 1) (LT s80 1) (LT s85 1)) (OR (LT s70 1) (LT s84 1) (LT s85 1)) (OR (LT s74 1) (LT s82 1) (LT s85 1)) (OR (LT s69 1) (LT s78 1) (LT s85 1)) (OR (LT s71 1) (LT s82 1) (LT s85 1)) (OR (LT s72 1) (LT s79 1) (LT s85 1)) (OR (LT s68 1) (LT s81 1) (LT s85 1)) (OR (LT s75 1) (LT s81 1) (LT s85 1)) (OR (LT s73 1) (LT s77 1) (LT s85 1)) (OR (LT s75 1) (LT s80 1) (LT s85 1)) (OR (LT s72 1) (LT s80 1) (LT s85 1)) (OR (LT s69 1) (LT s77 1) (LT s85 1)) (OR (LT s69 1) (LT s79 1) (LT s85 1)) (OR (LT s74 1) (LT s83 1) (LT s85 1)) (OR (LT s68 1) (LT s82 1) (LT s85 1)) (OR (LT s71 1) (LT s83 1) (LT s85 1)) (OR (LT s75 1) (LT s82 1) (LT s85 1)) (OR (LT s70 1) (LT s77 1) (LT s85 1)) (OR (LT s74 1) (LT s84 1) (LT s85 1)) (OR (LT s72 1) (LT s81 1) (LT s85 1)) (OR (LT s73 1) (LT s78 1) (LT s85 1)) (OR (LT s69 1) (LT s80 1) (LT s85 1)) (OR (LT s75 1) (LT s83 1) (LT s85 1)) (OR (LT s73 1) (LT s79 1) (LT s85 1)) (OR (LT s68 1) (LT s83 1) (LT s85 1)) (OR (LT s68 1) (LT s78 1) (LT s85 1)) (OR (LT s70 1) (LT s78 1) (LT s85 1)) (OR (LT s69 1) (LT s81 1) (LT s85 1)) (OR (LT s71 1) (LT s84 1) (LT s85 1)) (OR (LT s68 1) (LT s84 1) (LT s85 1)) (OR (LT s72 1) (LT s82 1) (LT s85 1)) (OR (LT s72 1) (LT s83 1) (LT s85 1)) (OR (LT s73 1) (LT s80 1) (LT s85 1)) (OR (LT s68 1) (LT s77 1) (LT s85 1)) (OR (LT s74 1) (LT s77 1) (LT s85 1)) (OR (LT s70 1) (LT s79 1) (LT s85 1)) (OR (LT s75 1) (LT s84 1) (LT s85 1)) (OR (LT s74 1) (LT s78 1) (LT s85 1)) (OR (LT s69 1) (LT s82 1) (LT s85 1)) (OR (LT s71 1) (LT s77 1) (LT s85 1)))], nbAcceptance=1, properties=[trans-labels, explicit-labels, trans-acc, no-univ-branch], stateDesc=[null, null, null, null, null, null][false, false, false, false, false, false]]
Product exploration explored 100000 steps with 2074 reset in 1068 ms.
Product exploration explored 100000 steps with 2066 reset in 1088 ms.
Complete graph has no SCC; deadlocks are unavoidable. place count 88 transition count 466
Detected that all paths lead to deadlock. Applying this knowledge to assert that all AP eventually converge : F ( (Ga|G!a) & (Gb|G!b)...)
Knowledge obtained : [(F (G p2)), (F (G (NOT p0))), (F (G p1)), p2, (NOT p0), p1]
Adopting property with smaller alphabet thanks to knowledge :(F (G p2))
Stuttering acceptance computed with spot in 43 ms :[p2, p2]
Support contains 9 out of 88 places. Attempting structural reductions.
Property had overlarge support with respect to TGBA, discarding it for now.
Starting structural reductions, iteration 0 : 88/88 places, 466/466 transitions.
Discarding 14 places :
Symmetric choice reduction at 0 with 14 rule applications. Total rules 14 place count 74 transition count 340
Iterating global reduction 0 with 14 rules applied. Total rules applied 28 place count 74 transition count 340
Discarding 28 places :
Symmetric choice reduction at 0 with 28 rule applications. Total rules 56 place count 46 transition count 88
Iterating global reduction 0 with 28 rules applied. Total rules applied 84 place count 46 transition count 88
Discarding 6 places :
Symmetric choice reduction at 0 with 6 rule applications. Total rules 90 place count 40 transition count 58
Iterating global reduction 0 with 6 rules applied. Total rules applied 96 place count 40 transition count 58
Applied a total of 96 rules in 3 ms. Remains 40 /88 variables (removed 48) and now considering 58/466 (removed 408) transitions.
// Phase 1: matrix 58 rows 40 cols
[2021-05-14 10:41:41] [INFO ] Computed 14 place invariants in 0 ms
[2021-05-14 10:41:41] [INFO ] Implicit Places using invariants in 37 ms returned [4, 5, 6, 7, 20, 21, 34, 36]
Discarding 8 places :
Implicit Place search using SMT only with invariants took 38 ms to find 8 implicit places.
// Phase 1: matrix 58 rows 32 cols
[2021-05-14 10:41:41] [INFO ] Computed 6 place invariants in 0 ms
[2021-05-14 10:41:41] [INFO ] Dead Transitions using invariants and state equation in 26 ms returned []
Starting structural reductions, iteration 1 : 32/88 places, 58/466 transitions.
Applied a total of 0 rules in 1 ms. Remains 32 /32 variables (removed 0) and now considering 58/58 (removed 0) transitions.
// Phase 1: matrix 58 rows 32 cols
[2021-05-14 10:41:41] [INFO ] Computed 6 place invariants in 1 ms
[2021-05-14 10:41:41] [INFO ] Dead Transitions using invariants and state equation in 31 ms returned []
Finished structural reductions, in 2 iterations. Remains : 32/88 places, 58/466 transitions.
Stuttering acceptance computed with spot in 46 ms :[p2, p2]
Product exploration explored 100000 steps with 11234 reset in 248 ms.
Product exploration explored 100000 steps with 11201 reset in 268 ms.
Applying partial POR strategy [true, true]
Stuttering acceptance computed with spot in 45 ms :[p2, p2]
Support contains 9 out of 32 places. Attempting structural reductions.
Property had overlarge support with respect to TGBA, discarding it for now.
Starting structural reductions, iteration 0 : 32/32 places, 58/58 transitions.
Performed 7 Post agglomeration using F-continuation condition.Transition count delta: 0
Iterating post reduction 0 with 7 rules applied. Total rules applied 7 place count 32 transition count 58
Performed 2 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 1 with 2 Pre rules applied. Total rules applied 7 place count 32 transition count 58
Deduced a syphon composed of 9 places in 0 ms
Iterating global reduction 1 with 2 rules applied. Total rules applied 9 place count 32 transition count 58
Discarding 8 places :
Symmetric choice reduction at 1 with 8 rule applications. Total rules 17 place count 24 transition count 50
Deduced a syphon composed of 1 places in 0 ms
Iterating global reduction 1 with 8 rules applied. Total rules applied 25 place count 24 transition count 50
Performed 1 Post agglomeration using F-continuation condition.Transition count delta: 0
Deduced a syphon composed of 2 places in 0 ms
Iterating global reduction 1 with 1 rules applied. Total rules applied 26 place count 24 transition count 50
Discarding 1 places :
Symmetric choice reduction at 1 with 1 rule applications. Total rules 27 place count 23 transition count 49
Deduced a syphon composed of 1 places in 0 ms
Iterating global reduction 1 with 1 rules applied. Total rules applied 28 place count 23 transition count 49
Deduced a syphon composed of 1 places in 0 ms
Applied a total of 28 rules in 5 ms. Remains 23 /32 variables (removed 9) and now considering 49/58 (removed 9) transitions.
[2021-05-14 10:41:42] [INFO ] Redundant transitions in 0 ms returned []
// Phase 1: matrix 49 rows 23 cols
[2021-05-14 10:41:42] [INFO ] Computed 6 place invariants in 0 ms
[2021-05-14 10:41:42] [INFO ] Dead Transitions using invariants and state equation in 45 ms returned []
Finished structural reductions, in 1 iterations. Remains : 23/32 places, 49/58 transitions.
Product exploration explored 100000 steps with 11251 reset in 314 ms.
Product exploration explored 100000 steps with 11292 reset in 295 ms.
Starting structural reductions, iteration 0 : 88/88 places, 466/466 transitions.
Applied a total of 0 rules in 2 ms. Remains 88 /88 variables (removed 0) and now considering 466/466 (removed 0) transitions.
// Phase 1: matrix 466 rows 88 cols
[2021-05-14 10:41:43] [INFO ] Computed 14 place invariants in 1 ms
[2021-05-14 10:41:43] [INFO ] Implicit Places using invariants in 68 ms returned []
// Phase 1: matrix 466 rows 88 cols
[2021-05-14 10:41:43] [INFO ] Computed 14 place invariants in 1 ms
[2021-05-14 10:41:43] [INFO ] Implicit Places using invariants and state equation in 207 ms returned []
Implicit Place search using SMT with State Equation took 277 ms to find 0 implicit places.
// Phase 1: matrix 466 rows 88 cols
[2021-05-14 10:41:43] [INFO ] Computed 14 place invariants in 2 ms
[2021-05-14 10:41:43] [INFO ] Dead Transitions using invariants and state equation in 144 ms returned []
Finished structural reductions, in 1 iterations. Remains : 88/88 places, 466/466 transitions.
Application raised an uncaught exception null
java.lang.UnsupportedOperationException
at fr.lip6.move.gal.application.MccTranslator.toGal(MccTranslator.java:879)
at fr.lip6.move.gal.application.MccTranslator.toGal(MccTranslator.java:835)
at fr.lip6.move.gal.application.MccTranslator.toGal(MccTranslator.java:825)
at fr.lip6.move.gal.application.MccTranslator.lambda$3(MccTranslator.java:862)
at fr.lip6.move.gal.structural.expr.NaryOp.forEachChild(NaryOp.java:153)
at fr.lip6.move.gal.application.MccTranslator.toGal(MccTranslator.java:862)
at fr.lip6.move.gal.application.MccTranslator.toGal(MccTranslator.java:760)
at fr.lip6.move.gal.application.MccTranslator.rebuildSpecification(MccTranslator.java:729)
at fr.lip6.move.gal.application.GlobalPropertySolver.verifyWithSDD(GlobalPropertySolver.java:585)
at fr.lip6.move.gal.application.LTLPropertySolver.runStutteringLTLTest(LTLPropertySolver.java:269)
at fr.lip6.move.gal.application.LTLPropertySolver.runStructuralLTLCheck(LTLPropertySolver.java:60)
at fr.lip6.move.gal.application.Application.startNoEx(Application.java:470)
at fr.lip6.move.gal.application.Application.start(Application.java:140)
at fr.lip6.move.gal.itscl.application.Application.start(Application.java:43)
at org.eclipse.equinox.internal.app.EclipseAppHandle.run(EclipseAppHandle.java:203)
at org.eclipse.core.runtime.internal.adaptor.EclipseAppLauncher.runApplication(EclipseAppLauncher.java:134)
at org.eclipse.core.runtime.internal.adaptor.EclipseAppLauncher.start(EclipseAppLauncher.java:104)
at org.eclipse.core.runtime.adaptor.EclipseStarter.run(EclipseStarter.java:401)
at org.eclipse.core.runtime.adaptor.EclipseStarter.run(EclipseStarter.java:255)
at java.base/jdk.internal.reflect.NativeMethodAccessorImpl.invoke0(Native Method)
at java.base/jdk.internal.reflect.NativeMethodAccessorImpl.invoke(NativeMethodAccessorImpl.java:62)
at java.base/jdk.internal.reflect.DelegatingMethodAccessorImpl.invoke(DelegatingMethodAccessorImpl.java:43)
at java.base/java.lang.reflect.Method.invoke(Method.java:566)
at org.eclipse.equinox.launcher.Main.invokeFramework(Main.java:653)
at org.eclipse.equinox.launcher.Main.basicRun(Main.java:590)
at org.eclipse.equinox.launcher.Main.run(Main.java:1461)
at org.eclipse.equinox.launcher.Main.main(Main.java:1434)
BK_STOP 1620988912113
--------------------
content from stderr:
+ export BINDIR=/home/mcc/BenchKit/bin//../
+ BINDIR=/home/mcc/BenchKit/bin//../
++ pwd
+ export MODEL=/home/mcc/execution
+ MODEL=/home/mcc/execution
+ [[ LTLFireability = StateSpace ]]
+ /home/mcc/BenchKit/bin//..//runeclipse.sh /home/mcc/execution LTLFireability -its -ltsmin -greatspnpath /home/mcc/BenchKit/bin//..//greatspn/ -order META -manyOrder -smt -timeout 3600
+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
++ cut -d . -f 9
++ ls /home/mcc/BenchKit/bin//..//itstools/plugins/fr.lip6.move.gal.application.pnmcc_1.0.0.202104292328.jar
+ VERSION=0
+ echo 'Running Version 0'
+ /home/mcc/BenchKit/bin//..//itstools/its-tools -data /home/mcc/execution/workspace -pnfolder /home/mcc/execution -examination LTLFireability -spotpath /home/mcc/BenchKit/bin//..//ltlfilt -z3path /home/mcc/BenchKit/bin//..//z3/bin/z3 -yices2path /home/mcc/BenchKit/bin//..//yices/bin/yices -its -ltsmin -greatspnpath /home/mcc/BenchKit/bin//..//greatspn/ -order META -manyOrder -smt -timeout 3600 -vmargs -Dosgi.locking=none -Declipse.stateSaveDelayInterval=-1 -Dosgi.configuration.area=/tmp/.eclipse -Xss128m -Xms40m -Xmx16000m
Sequence of Actions to be Executed by the VM
This is useful if one wants to reexecute the tool in the VM from the submitted image disk.
set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="PermAdmissibility-COL-05"
export BK_EXAMINATION="LTLFireability"
export BK_TOOL="itstools"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"
# this is specific to your benchmark or test
export BIN_DIR="$HOME/BenchKit/bin"
# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi
# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-4028"
echo " Executing tool itstools"
echo " Input is PermAdmissibility-COL-05, examination is LTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r140-tall-162089127900477"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"
tar xzf /home/mcc/BenchKit/INPUTS/PermAdmissibility-COL-05.tgz
mv PermAdmissibility-COL-05 execution
cd execution
if [ "LTLFireability" = "ReachabilityDeadlock" ] || [ "LTLFireability" = "UpperBounds" ] || [ "LTLFireability" = "QuasiLiveness" ] || [ "LTLFireability" = "StableMarking" ] || [ "LTLFireability" = "Liveness" ] || [ "LTLFireability" = "OneSafe" ] || [ "LTLFireability" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh
echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "LTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "LTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "LTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property LTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "LTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '
echo "FORMULA_NAME $x"
done
elif [ "LTLFireability" = "ReachabilityDeadlock" ] || [ "LTLFireability" = "QuasiLiveness" ] || [ "LTLFireability" = "StableMarking" ] || [ "LTLFireability" = "Liveness" ] || [ "LTLFireability" = "OneSafe" ] ; then
echo "FORMULA_NAME LTLFireability"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;