Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/data/fkordon/mcc2021-input.r140-tall-162089127700353.qcow2', fmt=qcow2 size=4294967296 backing_file='/data/fkordon/mcc2021-input.qcow2' encryption=off cluster_size=65536 lazy_refcounts=off
Waiting for the VM to be ready (probing ssh)
...........................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................
=====================================================================
Generated by BenchKit 2-4028
Executing tool itstools
Input is PaceMaker-PT-none, examination is CTLCardinality
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r140-tall-162089127700353
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 528K
-rw-r--r-- 1 mcc users 17K May 5 16:58 CTLCardinality.txt
-rw-r--r-- 1 mcc users 127K May 10 09:43 CTLCardinality.xml
-rw-r--r-- 1 mcc users 14K May 5 16:58 CTLFireability.txt
-rw-r--r-- 1 mcc users 72K May 10 09:43 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K May 6 14:48 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 5.8K May 6 14:48 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 3.3K Mar 28 16:23 LTLCardinality.txt
-rw-r--r-- 1 mcc users 23K Mar 28 16:23 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.8K Mar 28 16:23 LTLFireability.txt
-rw-r--r-- 1 mcc users 17K Mar 28 16:23 LTLFireability.xml
-rw-r--r-- 1 mcc users 4.0K Mar 27 06:34 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 20K Mar 27 06:34 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 2.9K Mar 25 07:55 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 13K Mar 25 07:55 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.7K Mar 22 09:15 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.7K Mar 22 09:15 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 May 5 16:51 equiv_col
-rw-r--r-- 1 mcc users 5 May 5 16:51 instance
-rw-r--r-- 1 mcc users 6 May 5 16:51 iscolored
-rw-r--r-- 1 mcc users 158K May 5 16:51 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME PaceMaker-PT-none-CTLCardinality-00
FORMULA_NAME PaceMaker-PT-none-CTLCardinality-01
FORMULA_NAME PaceMaker-PT-none-CTLCardinality-02
FORMULA_NAME PaceMaker-PT-none-CTLCardinality-03
FORMULA_NAME PaceMaker-PT-none-CTLCardinality-04
FORMULA_NAME PaceMaker-PT-none-CTLCardinality-05
FORMULA_NAME PaceMaker-PT-none-CTLCardinality-06
FORMULA_NAME PaceMaker-PT-none-CTLCardinality-07
FORMULA_NAME PaceMaker-PT-none-CTLCardinality-08
FORMULA_NAME PaceMaker-PT-none-CTLCardinality-09
FORMULA_NAME PaceMaker-PT-none-CTLCardinality-10
FORMULA_NAME PaceMaker-PT-none-CTLCardinality-11
FORMULA_NAME PaceMaker-PT-none-CTLCardinality-12
FORMULA_NAME PaceMaker-PT-none-CTLCardinality-13
FORMULA_NAME PaceMaker-PT-none-CTLCardinality-14
FORMULA_NAME PaceMaker-PT-none-CTLCardinality-15

=== Now, execution of the tool begins

BK_START 1620976616147

Running Version 0
[2021-05-14 07:16:58] [INFO ] Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, CTLCardinality, -spotpath, /home/mcc/BenchKit/bin//..//ltlfilt, -z3path, /home/mcc/BenchKit/bin//..//z3/bin/z3, -yices2path, /home/mcc/BenchKit/bin//..//yices/bin/yices, -its, -ltsmin, -greatspnpath, /home/mcc/BenchKit/bin//..//greatspn/, -order, META, -manyOrder, -smt, -timeout, 3600]
[2021-05-14 07:16:58] [INFO ] Parsing pnml file : /home/mcc/execution/model.pnml
[2021-05-14 07:16:58] [INFO ] Load time of PNML (sax parser for PT used): 60 ms
[2021-05-14 07:16:58] [INFO ] Transformed 70 places.
[2021-05-14 07:16:58] [INFO ] Transformed 164 transitions.
[2021-05-14 07:16:58] [INFO ] Parsed PT model containing 70 places and 164 transitions in 101 ms.
Parsed 16 properties from file /home/mcc/execution/CTLCardinality.xml in 14 ms.
Support contains 70 out of 70 places. Attempting structural reductions.
Starting structural reductions, iteration 0 : 70/70 places, 164/164 transitions.
Applied a total of 0 rules in 9 ms. Remains 70 /70 variables (removed 0) and now considering 164/164 (removed 0) transitions.
[2021-05-14 07:16:58] [INFO ] Flow matrix only has 158 transitions (discarded 6 similar events)
Normalized transition count is 93 out of 158 initially.
// Phase 1: matrix 93 rows 70 cols
[2021-05-14 07:16:58] [INFO ] Computed 35 place invariants in 6 ms
[2021-05-14 07:16:58] [INFO ] Dead Transitions using invariants and state equation in 179 ms returned []
[2021-05-14 07:16:58] [INFO ] Flow matrix only has 158 transitions (discarded 6 similar events)
Normalized transition count is 93 out of 158 initially.
// Phase 1: matrix 93 rows 70 cols
[2021-05-14 07:16:58] [INFO ] Computed 35 place invariants in 2 ms
[2021-05-14 07:16:58] [INFO ] Implicit Places using invariants in 33 ms returned []
[2021-05-14 07:16:58] [INFO ] Flow matrix only has 158 transitions (discarded 6 similar events)
Normalized transition count is 93 out of 158 initially.
// Phase 1: matrix 93 rows 70 cols
[2021-05-14 07:16:58] [INFO ] Computed 35 place invariants in 8 ms
[2021-05-14 07:16:58] [INFO ] State equation strengthened by 58 read => feed constraints.
[2021-05-14 07:16:58] [INFO ] Implicit Places using invariants and state equation in 89 ms returned []
Implicit Place search using SMT with State Equation took 124 ms to find 0 implicit places.
[2021-05-14 07:16:58] [INFO ] Flow matrix only has 158 transitions (discarded 6 similar events)
Normalized transition count is 93 out of 158 initially.
// Phase 1: matrix 93 rows 70 cols
[2021-05-14 07:16:58] [INFO ] Computed 35 place invariants in 2 ms
[2021-05-14 07:16:58] [INFO ] Dead Transitions using invariants and state equation in 103 ms returned []
Finished structural reductions, in 1 iterations. Remains : 70/70 places, 164/164 transitions.
[2021-05-14 07:16:59] [INFO ] Flatten gal took : 40 ms
[2021-05-14 07:16:59] [INFO ] Flatten gal took : 17 ms
[2021-05-14 07:16:59] [INFO ] Input system was already deterministic with 164 transitions.
Incomplete random walk after 100000 steps, including 2 resets, run finished after 2559 ms. (steps per millisecond=39 ) properties (out of 91) seen :25
Running SMT prover for 66 properties.
[2021-05-14 07:17:02] [INFO ] Flow matrix only has 158 transitions (discarded 6 similar events)
Normalized transition count is 93 out of 158 initially.
// Phase 1: matrix 93 rows 70 cols
[2021-05-14 07:17:02] [INFO ] Computed 35 place invariants in 2 ms
[2021-05-14 07:17:02] [INFO ] [Real]Absence check using 35 positive place invariants in 5 ms returned sat
[2021-05-14 07:17:02] [INFO ] SMT Verify possible in real domain returnedunsat :0 sat :0 real:66
[2021-05-14 07:17:03] [INFO ] [Nat]Absence check using 35 positive place invariants in 5 ms returned sat
[2021-05-14 07:17:03] [INFO ] [Nat]Adding state equation constraints to refine reachable states.
[2021-05-14 07:18:42] [INFO ] [Nat]Absence check using state equation in 99614 ms returned unsat :15 sat :40
[2021-05-14 07:18:42] [INFO ] State equation strengthened by 58 read => feed constraints.
[2021-05-14 07:18:42] [WARNING] SMT solver failed with error :SMT solver raised an error when submitting script.... while checking expressions.
Successfully simplified 15 atomic propositions for a total of 16 simplifications.
Performed 3 Post agglomeration using F-continuation condition.Transition count delta: 3
Deduced a syphon composed of 3 places in 0 ms
Reduce places removed 6 places and 0 transitions.
Iterating global reduction 0 with 9 rules applied. Total rules applied 9 place count 64 transition count 161
Applied a total of 9 rules in 34 ms. Remains 64 /70 variables (removed 6) and now considering 161/164 (removed 3) transitions.
[2021-05-14 07:18:43] [INFO ] Flatten gal took : 10 ms
[2021-05-14 07:18:43] [INFO ] Flatten gal took : 11 ms
[2021-05-14 07:18:43] [INFO ] Input system was already deterministic with 161 transitions.
[2021-05-14 07:18:43] [INFO ] Flatten gal took : 10 ms
[2021-05-14 07:18:43] [INFO ] Flatten gal took : 10 ms
[2021-05-14 07:18:43] [INFO ] Time to serialize gal into /tmp/CTLCardinality11667399575996414086.gal : 6 ms
[2021-05-14 07:18:43] [INFO ] Time to serialize properties into /tmp/CTLCardinality14921912932877497574.ctl : 0 ms
Invoking ITS tools like this :CommandLine [args=[/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.202104292328/bin/its-ctl-linux64, --gc-threshold, 2000000, --quiet, -i, /tmp/CTLCardinality11667399575996414086.gal, -t, CGAL, -ctl, /tmp/CTLCardinality14921912932877497574.ctl, --gen-order, FOLLOW], workingDir=/home/mcc/execution]

its-ctl command run as :

/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.202104292328/bin/its-ctl-linux64 --gc-threshold 2000000 --quiet -i /tmp/CTLCardinality11667399575996414086.gal -t CGAL -ctl /tmp/CTLCardinality14921912932877497574.ctl --gen-order FOLLOW
No direction supplied, using forward translation only.
Parsed 1 CTL formulae.
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
reachable,4.60456e+16,1.01644,33748,2,1979,5,131224,6,0,1044,148606,0


Converting to forward existential form...Done !
original formula: EF((AG(((((A_VRP+SIG_AgetOut)+A_SIG_State)+A_AVI)<=((((A_AVI+SIG_IncrClk)+A_AVJOut)+A_SIG_Vget)+SANodeEctopic))) * (((A_SIG_State+A_SIG_Clk0)+A_A_dV)<24)))
=> equivalent forward existential formula: [((FwdU(Init,TRUE) * (((A_SIG_State+A_SIG_Clk0)+A_A_dV)<24)) * !(E(TRUE U !(((((A_VRP+SIG_AgetOut)+A_SIG_State)+A_AVI)<=((((A_AVI+SIG_IncrClk)+A_AVJOut)+A_SIG_Vget)+SANodeEctopic))))))] != FALSE
Reverse transition relation is NOT exact ! Due to transitions t7, t21, t24, t90, t91, t92, t93, t94, t95, t96, t97, t98, t99, t102, t103, t106, t107, t108, t110, t112, t115, t116, t117, t118, t119, t120, t121, t122, t125, t126, t127, t128, t131, t135, t136, t137, t145, t148, t149, t154, t155, t159, Intersection with reachable at each step enabled. (destroyed/reverse/intersect/total) :0/119/42/161
Detected timeout of ITS tools.
[2021-05-14 07:19:13] [INFO ] Flatten gal took : 9 ms
[2021-05-14 07:19:13] [INFO ] Applying decomposition
[2021-05-14 07:19:13] [INFO ] Flatten gal took : 9 ms
Converted graph to binary with : CommandLine [args=[/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.louvain.binaries_1.0.0.202104292328/bin/convert-linux64, -i, /tmp/graph13287843194850831396.txt, -o, /tmp/graph13287843194850831396.bin, -w, /tmp/graph13287843194850831396.weights], workingDir=null]
Built communities with : CommandLine [args=[/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.louvain.binaries_1.0.0.202104292328/bin/louvain-linux64, /tmp/graph13287843194850831396.bin, -l, -1, -v, -w, /tmp/graph13287843194850831396.weights, -q, 0, -e, 0.001], workingDir=null]
[2021-05-14 07:19:13] [INFO ] Decomposing Gal with order
[2021-05-14 07:19:13] [INFO ] Rewriting arrays to variables to allow decomposition.
[2021-05-14 07:19:13] [INFO ] Removed a total of 108 redundant transitions.
[2021-05-14 07:19:13] [INFO ] Flatten gal took : 111 ms
[2021-05-14 07:19:13] [INFO ] Fuse similar labels procedure discarded/fused a total of 21 labels/synchronizations in 20 ms.
[2021-05-14 07:19:13] [INFO ] Time to serialize gal into /tmp/CTLCardinality6088689632080751829.gal : 4 ms
[2021-05-14 07:19:13] [INFO ] Time to serialize properties into /tmp/CTLCardinality8878079012897485520.ctl : 11 ms
Invoking ITS tools like this :CommandLine [args=[/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.202104292328/bin/its-ctl-linux64, --gc-threshold, 2000000, --quiet, -i, /tmp/CTLCardinality6088689632080751829.gal, -t, CGAL, -ctl, /tmp/CTLCardinality8878079012897485520.ctl, --gen-order, FOLLOW], workingDir=/home/mcc/execution]

its-ctl command run as :

/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.202104292328/bin/its-ctl-linux64 --gc-threshold 2000000 --quiet -i /tmp/CTLCardinality6088689632080751829.gal -t CGAL -ctl /tmp/CTLCardinality8878079012897485520.ctl --gen-order FOLLOW
No direction supplied, using forward translation only.
Parsed 1 CTL formulae.
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
reachable,4.60456e+16,0.343756,14288,2,988,5,44953,6,0,1058,53028,0


Converting to forward existential form...Done !
original formula: EF((AG(((((gu9.A_VRP+gu9.SIG_AgetOut)+gu18.A_SIG_State)+gu9.A_AVI)<=((((gu9.A_AVI+gu9.SIG_IncrClk)+gu9.A_AVJOut)+gu9.A_SIG_Vget)+gu9.SANodeEctopic))) * (((gu18.A_SIG_State+gu18.A_SIG_Clk0)+gu18.A_A_dV)<24)))
=> equivalent forward existential formula: [((FwdU(Init,TRUE) * (((gu18.A_SIG_State+gu18.A_SIG_Clk0)+gu18.A_A_dV)<24)) * !(E(TRUE U !(((((gu9.A_VRP+gu9.SIG_AgetOut)+gu18.A_SIG_State)+gu9.A_AVI)<=((((gu9.A_AVI+gu9.SIG_IncrClk)+gu9.A_AVJOut)+gu9.A_SIG_Vget)+gu9.SANodeEctopic))))))] != FALSE
Reverse transition relation is NOT exact ! Due to transitions gu15.t21, gu15.t24, gi1.gu1.t7, t90, t91, t92, t93, t94, t95, t96, t97, t98, t99, t102, t103, t106, t107, t108, t110, t112, t115, t116, t117, t118, t119, t120, t121, t122, t125, t126, t127, t128, t131, t135, t136, t137, t145, t148, t149, t155, t158, Intersection with reachable at each step enabled. (destroyed/reverse/intersect/total) :0/111/41/152
(forward)formula 0,0,3.3197,96660,1,0,359,481045,327,173,10466,504045,358
FORMULA PaceMaker-PT-none-CTLCardinality-03 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL USE_NUPN
Formula is FALSE !

***************************************

Performed 4 Post agglomeration using F-continuation condition.Transition count delta: 4
Deduced a syphon composed of 4 places in 0 ms
Reduce places removed 8 places and 0 transitions.
Iterating global reduction 0 with 12 rules applied. Total rules applied 12 place count 62 transition count 160
Applied a total of 12 rules in 54 ms. Remains 62 /70 variables (removed 8) and now considering 160/164 (removed 4) transitions.
[2021-05-14 07:19:17] [INFO ] Flatten gal took : 8 ms
[2021-05-14 07:19:17] [INFO ] Flatten gal took : 9 ms
[2021-05-14 07:19:17] [INFO ] Input system was already deterministic with 160 transitions.
[2021-05-14 07:19:17] [INFO ] Flatten gal took : 8 ms
[2021-05-14 07:19:17] [INFO ] Flatten gal took : 8 ms
[2021-05-14 07:19:17] [INFO ] Time to serialize gal into /tmp/CTLCardinality3154292557290295103.gal : 2 ms
[2021-05-14 07:19:17] [INFO ] Time to serialize properties into /tmp/CTLCardinality2037621896174203009.ctl : 1 ms
Invoking ITS tools like this :CommandLine [args=[/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.202104292328/bin/its-ctl-linux64, --gc-threshold, 2000000, --quiet, -i, /tmp/CTLCardinality3154292557290295103.gal, -t, CGAL, -ctl, /tmp/CTLCardinality2037621896174203009.ctl, --gen-order, FOLLOW], workingDir=/home/mcc/execution]

its-ctl command run as :

/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.202104292328/bin/its-ctl-linux64 --gc-threshold 2000000 --quiet -i /tmp/CTLCardinality3154292557290295103.gal -t CGAL -ctl /tmp/CTLCardinality2037621896174203009.ctl --gen-order FOLLOW
No direction supplied, using forward translation only.
Parsed 1 CTL formulae.
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
reachable,2.30228e+16,0.410291,17796,2,1058,5,59726,6,0,1035,73127,0


Converting to forward existential form...Done !
original formula: AG(!(AG(AF((Ventricle>15)))))
=> equivalent forward existential formula: [(FwdU(Init,TRUE) * !(E(TRUE U !(!(EG(!((Ventricle>15))))))))] = FALSE
Reverse transition relation is NOT exact ! Due to transitions t6, t19, t22, t88, t89, t90, t91, t92, t93, t94, t95, t96, t97, t100, t101, t104, t105, t106, t108, t110, t113, t114, t115, t116, t117, t118, t119, t120, t123, t124, t125, t126, t129, t133, t134, t135, t143, t146, t147, t154, t155, t158, Intersection with reachable at each step enabled. (destroyed/reverse/intersect/total) :0/118/42/160
(forward)formula 0,0,1.04377,32196,1,0,345,211541,346,162,5542,131827,325
FORMULA PaceMaker-PT-none-CTLCardinality-06 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL
Formula is FALSE !

***************************************

Performed 3 Post agglomeration using F-continuation condition.Transition count delta: 3
Deduced a syphon composed of 3 places in 0 ms
Reduce places removed 6 places and 0 transitions.
Iterating global reduction 0 with 9 rules applied. Total rules applied 9 place count 64 transition count 161
Applied a total of 9 rules in 10 ms. Remains 64 /70 variables (removed 6) and now considering 161/164 (removed 3) transitions.
[2021-05-14 07:19:18] [INFO ] Flatten gal took : 8 ms
[2021-05-14 07:19:18] [INFO ] Flatten gal took : 8 ms
[2021-05-14 07:19:18] [INFO ] Input system was already deterministic with 161 transitions.
[2021-05-14 07:19:18] [INFO ] Flatten gal took : 8 ms
[2021-05-14 07:19:18] [INFO ] Flatten gal took : 8 ms
[2021-05-14 07:19:18] [INFO ] Time to serialize gal into /tmp/CTLCardinality2441731693513999353.gal : 1 ms
[2021-05-14 07:19:18] [INFO ] Time to serialize properties into /tmp/CTLCardinality1175980058823814237.ctl : 0 ms
Invoking ITS tools like this :CommandLine [args=[/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.202104292328/bin/its-ctl-linux64, --gc-threshold, 2000000, --quiet, -i, /tmp/CTLCardinality2441731693513999353.gal, -t, CGAL, -ctl, /tmp/CTLCardinality1175980058823814237.ctl, --gen-order, FOLLOW], workingDir=/home/mcc/execution]

its-ctl command run as :

/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.202104292328/bin/its-ctl-linux64 --gc-threshold 2000000 --quiet -i /tmp/CTLCardinality2441731693513999353.gal -t CGAL -ctl /tmp/CTLCardinality1175980058823814237.ctl --gen-order FOLLOW
No direction supplied, using forward translation only.
Parsed 1 CTL formulae.
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
reachable,4.60324e+16,0.492116,19848,2,1072,5,66210,6,0,1044,86648,0


Converting to forward existential form...Done !
original formula: AG(A((((((((((A_VtrNoiseGenerator+VRG)+AVI)+SANodeEctopic)+SIG_NextVtrBeat)+A_SIG_Vbeat)+A_AtrNoiseGenerator)+SIG_IncrClk)+A_SIG_VPOut)<=((((((URI+VRP)+SIG_State)+A_AVJOut)+SANode)+A_dV)+SIG_VP)) U (((((((A_VRGEctopic+SIG_AS)+A_SIG_Vget)+SIG_VS)+URI)+SIG_VP)+SIG_Vget)>=33)))
=> equivalent forward existential formula: ([(FwdU(FwdU(Init,TRUE),!((((((((A_VRGEctopic+SIG_AS)+A_SIG_Vget)+SIG_VS)+URI)+SIG_VP)+SIG_Vget)>=33))) * (!((((((((((A_VtrNoiseGenerator+VRG)+AVI)+SANodeEctopic)+SIG_NextVtrBeat)+A_SIG_Vbeat)+A_AtrNoiseGenerator)+SIG_IncrClk)+A_SIG_VPOut)<=((((((URI+VRP)+SIG_State)+A_AVJOut)+SANode)+A_dV)+SIG_VP))) * !((((((((A_VRGEctopic+SIG_AS)+A_SIG_Vget)+SIG_VS)+URI)+SIG_VP)+SIG_Vget)>=33))))] = FALSE * [FwdG(FwdU(Init,TRUE),!((((((((A_VRGEctopic+SIG_AS)+A_SIG_Vget)+SIG_VS)+URI)+SIG_VP)+SIG_Vget)>=33)))] = FALSE)
(forward)formula 0,1,0.796766,21024,1,0,6,106009,23,1,4803,86648,5
FORMULA PaceMaker-PT-none-CTLCardinality-08 TRUE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL
Formula is TRUE !

***************************************

Performed 4 Post agglomeration using F-continuation condition.Transition count delta: 4
Deduced a syphon composed of 4 places in 0 ms
Reduce places removed 8 places and 0 transitions.
Iterating global reduction 0 with 12 rules applied. Total rules applied 12 place count 62 transition count 160
Applied a total of 12 rules in 8 ms. Remains 62 /70 variables (removed 8) and now considering 160/164 (removed 4) transitions.
[2021-05-14 07:19:19] [INFO ] Flatten gal took : 8 ms
[2021-05-14 07:19:19] [INFO ] Flatten gal took : 8 ms
[2021-05-14 07:19:19] [INFO ] Input system was already deterministic with 160 transitions.
[2021-05-14 07:19:19] [INFO ] Flatten gal took : 7 ms
[2021-05-14 07:19:19] [INFO ] Flatten gal took : 7 ms
[2021-05-14 07:19:19] [INFO ] Time to serialize gal into /tmp/CTLCardinality5437680772757183773.gal : 1 ms
[2021-05-14 07:19:19] [INFO ] Time to serialize properties into /tmp/CTLCardinality6072249002578726157.ctl : 0 ms
Invoking ITS tools like this :CommandLine [args=[/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.202104292328/bin/its-ctl-linux64, --gc-threshold, 2000000, --quiet, -i, /tmp/CTLCardinality5437680772757183773.gal, -t, CGAL, -ctl, /tmp/CTLCardinality6072249002578726157.ctl, --gen-order, FOLLOW], workingDir=/home/mcc/execution]

its-ctl command run as :

/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.202104292328/bin/its-ctl-linux64 --gc-threshold 2000000 --quiet -i /tmp/CTLCardinality5437680772757183773.gal -t CGAL -ctl /tmp/CTLCardinality6072249002578726157.ctl --gen-order FOLLOW
No direction supplied, using forward translation only.
Parsed 1 CTL formulae.
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
reachable,2.30228e+16,0.403851,17796,2,1058,5,59726,6,0,1035,73127,0


Converting to forward existential form...Done !
original formula: !(AG(((((((((((A_VRG+A_VRGEctopic)+SIG_AP)+A_SIG_Aget)+A_SIG_Clk1)+LRI)+A_AVJ)+A_A_dV)+A_AVI)>7)||(SIG_Aget<=(((((((SIG_VP+A_VRG)+A_RVConductor)+SIG_Vget)+A_Ventricle)+LRI)+A_SANode)+SIG_Clk1)))))
=> equivalent forward existential formula: [(FwdU(Init,TRUE) * !(((((((((((A_VRG+A_VRGEctopic)+SIG_AP)+A_SIG_Aget)+A_SIG_Clk1)+LRI)+A_AVJ)+A_A_dV)+A_AVI)>7)||(SIG_Aget<=(((((((SIG_VP+A_VRG)+A_RVConductor)+SIG_Vget)+A_Ventricle)+LRI)+A_SANode)+SIG_Clk1)))))] != FALSE
(forward)formula 0,0,1.81228,42548,1,0,5,59726,9,0,14620,73127,0
FORMULA PaceMaker-PT-none-CTLCardinality-12 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL
Formula is FALSE !

***************************************

Performed 4 Post agglomeration using F-continuation condition.Transition count delta: 4
Deduced a syphon composed of 4 places in 1 ms
Reduce places removed 8 places and 0 transitions.
Iterating global reduction 0 with 12 rules applied. Total rules applied 12 place count 62 transition count 160
Applied a total of 12 rules in 9 ms. Remains 62 /70 variables (removed 8) and now considering 160/164 (removed 4) transitions.
[2021-05-14 07:19:20] [INFO ] Flatten gal took : 7 ms
[2021-05-14 07:19:21] [INFO ] Flatten gal took : 7 ms
[2021-05-14 07:19:21] [INFO ] Input system was already deterministic with 160 transitions.
[2021-05-14 07:19:21] [INFO ] Flatten gal took : 7 ms
[2021-05-14 07:19:21] [INFO ] Flatten gal took : 7 ms
[2021-05-14 07:19:21] [INFO ] Time to serialize gal into /tmp/CTLCardinality1862587690346799306.gal : 1 ms
[2021-05-14 07:19:21] [INFO ] Time to serialize properties into /tmp/CTLCardinality2764613392413609453.ctl : 0 ms
Invoking ITS tools like this :CommandLine [args=[/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.202104292328/bin/its-ctl-linux64, --gc-threshold, 2000000, --quiet, -i, /tmp/CTLCardinality1862587690346799306.gal, -t, CGAL, -ctl, /tmp/CTLCardinality2764613392413609453.ctl, --gen-order, FOLLOW], workingDir=/home/mcc/execution]

its-ctl command run as :

/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.202104292328/bin/its-ctl-linux64 --gc-threshold 2000000 --quiet -i /tmp/CTLCardinality1862587690346799306.gal -t CGAL -ctl /tmp/CTLCardinality2764613392413609453.ctl --gen-order FOLLOW
No direction supplied, using forward translation only.
Parsed 1 CTL formulae.
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
reachable,2.30228e+16,0.426361,17752,2,1058,5,59726,6,0,1035,73127,0


Converting to forward existential form...Done !
original formula: AG(EF(((((SIG_Clk0+SIG_VS)+SIG_NextVtrBeat)+RAConductor)>=19)))
=> equivalent forward existential formula: [(FwdU(Init,TRUE) * !(E(TRUE U ((((SIG_Clk0+SIG_VS)+SIG_NextVtrBeat)+RAConductor)>=19))))] = FALSE
Reverse transition relation is NOT exact ! Due to transitions t6, t19, t22, t88, t89, t90, t91, t92, t93, t94, t95, t96, t97, t100, t101, t104, t105, t106, t108, t110, t113, t114, t115, t116, t117, t118, t119, t120, t123, t124, t125, t126, t129, t133, t134, t135, t143, t146, t147, t154, t155, t158, Intersection with reachable at each step enabled. (destroyed/reverse/intersect/total) :0/118/42/160
(forward)formula 0,1,2.04933,62224,1,0,348,363856,341,163,5589,281755,329
FORMULA PaceMaker-PT-none-CTLCardinality-13 TRUE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL
Formula is TRUE !

***************************************

ITS tools runner thread asked to quit. Dying gracefully.
Applied a total of 0 rules in 4 ms. Remains 70 /70 variables (removed 0) and now considering 164/164 (removed 0) transitions.
[2021-05-14 07:19:23] [INFO ] Flatten gal took : 7 ms
[2021-05-14 07:19:23] [INFO ] Flatten gal took : 8 ms
[2021-05-14 07:19:23] [INFO ] Input system was already deterministic with 164 transitions.
[2021-05-14 07:19:23] [INFO ] Flatten gal took : 7 ms
[2021-05-14 07:19:23] [INFO ] Flatten gal took : 16 ms
[2021-05-14 07:19:23] [INFO ] Time to serialize gal into /tmp/CTLCardinality10765642051807180978.gal : 16 ms
[2021-05-14 07:19:23] [INFO ] Time to serialize properties into /tmp/CTLCardinality7316186756898953619.ctl : 3 ms
Invoking ITS tools like this :CommandLine [args=[/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.202104292328/bin/its-ctl-linux64, --gc-threshold, 2000000, --quiet, -i, /tmp/CTLCardinality10765642051807180978.gal, -t, CGAL, -ctl, /tmp/CTLCardinality7316186756898953619.ctl, --gen-order, FOLLOW], workingDir=/home/mcc/execution]

its-ctl command run as :

/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.202104292328/bin/its-ctl-linux64 --gc-threshold 2000000 --quiet -i /tmp/CTLCardinality10765642051807180978.gal -t CGAL -ctl /tmp/CTLCardinality7316186756898953619.ctl --gen-order FOLLOW
No direction supplied, using forward translation only.
Parsed 1 CTL formulae.
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
reachable,3.68026e+17,0.496471,21248,2,1248,5,78057,6,0,1071,89663,0


Converting to forward existential form...Done !
original formula: !(EG(A((A((((((A_LRI+A_SIG_VS)+VRGEctopic)+A_SIG_AP)+RVConductor)<=((((((((Ventricle+A_AVI)+A_SANodeEctopic)+Atrium)+A_SIG_VP)+SIG_AP)+VRGEctopic)+LRI)+SIG_Clk1)) U ((((((((SIG_Aget+SIG_AP)+VRGEctopic)+A_SIG_APOut)+SIG_VP)+A_AVJ)+A_dV)+A_SIG_Vget)>=11)) + (((((((SIG_AS+SIG_Clk0)+A_SIG_Clk1)+A_AtrNoiseGenerator)+A_dV)>9)||((((((((SIG_AP+A_SIG_NextVtrBeat)+A_AVI)+URIState)+A_SIG_AgetOut)+A_RVConductor)+A_PVARP)+A_AVJ)<=((((((SIG_VgetOut+A_VRP)+A_SIG_Aget)+LRI)+A_SANode)+VtrNoiseGenerator)+A_RVConductor))) * EG(((((((((A_URI+A_SIG_VgetOut)+URIState)+A_LRI)+A_VRGEctopic)+A_SIG_AgetOut)+VRP)+SIG_APOut)>=29)))) U AF((((((A_SIG_AP+A_SIG_Vget)+Atrium)<=(((((((((LRI+VRG)+A_VRGEctopic)+SANodeEctopic)+SIG_VP)+SIG_Aget)+AVJOut)+VtrNoiseGenerator)+A_SIG_APOut)+SIG_APOut))||((A_AVI+VtrNoiseGenerator)<=39)) * EF(((((SIG_Clk1+SIG_NextVtrBeat)+A_AtrNoiseGenerator)+SIG_AP)>=49)))))))
=> equivalent forward existential formula: [FwdG(Init,!((E(!(!(EG(!((((((A_SIG_AP+A_SIG_Vget)+Atrium)<=(((((((((LRI+VRG)+A_VRGEctopic)+SANodeEctopic)+SIG_VP)+SIG_Aget)+AVJOut)+VtrNoiseGenerator)+A_SIG_APOut)+SIG_APOut))||((A_AVI+VtrNoiseGenerator)<=39)) * E(TRUE U ((((SIG_Clk1+SIG_NextVtrBeat)+A_AtrNoiseGenerator)+SIG_AP)>=49))))))) U (!((!((E(!(((((((((SIG_Aget+SIG_AP)+VRGEctopic)+A_SIG_APOut)+SIG_VP)+A_AVJ)+A_dV)+A_SIG_Vget)>=11)) U (!((((((A_LRI+A_SIG_VS)+VRGEctopic)+A_SIG_AP)+RVConductor)<=((((((((Ventricle+A_AVI)+A_SANodeEctopic)+Atrium)+A_SIG_VP)+SIG_AP)+VRGEctopic)+LRI)+SIG_Clk1))) * !(((((((((SIG_Aget+SIG_AP)+VRGEctopic)+A_SIG_APOut)+SIG_VP)+A_AVJ)+A_dV)+A_SIG_Vget)>=11)))) + EG(!(((((((((SIG_Aget+SIG_AP)+VRGEctopic)+A_SIG_APOut)+SIG_VP)+A_AVJ)+A_dV)+A_SIG_Vget)>=11))))) + (((((((SIG_AS+SIG_Clk0)+A_SIG_Clk1)+A_AtrNoiseGenerator)+A_dV)>9)||((((((((SIG_AP+A_SIG_NextVtrBeat)+A_AVI)+URIState)+A_SIG_AgetOut)+A_RVConductor)+A_PVARP)+A_AVJ)<=((((((SIG_VgetOut+A_VRP)+A_SIG_Aget)+LRI)+A_SANode)+VtrNoiseGenerator)+A_RVConductor))) * EG(((((((((A_URI+A_SIG_VgetOut)+URIState)+A_LRI)+A_VRGEctopic)+A_SIG_AgetOut)+VRP)+SIG_APOut)>=29))))) * !(!(EG(!((((((A_SIG_AP+A_SIG_Vget)+Atrium)<=(((((((((LRI+VRG)+A_VRGEctopic)+SANodeEctopic)+SIG_VP)+SIG_Aget)+AVJOut)+VtrNoiseGenerator)+A_SIG_APOut)+SIG_APOut))||((A_AVI+VtrNoiseGenerator)<=39)) * E(TRUE U ((((SIG_Clk1+SIG_NextVtrBeat)+A_AtrNoiseGenerator)+SIG_AP)>=49))))))))) + EG(!(!(EG(!((((((A_SIG_AP+A_SIG_Vget)+Atrium)<=(((((((((LRI+VRG)+A_VRGEctopic)+SANodeEctopic)+SIG_VP)+SIG_Aget)+AVJOut)+VtrNoiseGenerator)+A_SIG_APOut)+SIG_APOut))||((A_AVI+VtrNoiseGenerator)<=39)) * E(TRUE U ((((SIG_Clk1+SIG_NextVtrBeat)+A_AtrNoiseGenerator)+SIG_AP)>=49)))))))))))] = FALSE
Reverse transition relation is NOT exact ! Due to transitions t1, t8, t11, t25, t28, t94, t95, t96, t97, t98, t99, t100, t101, t102, t103, t106, t107, t110, t111, t112, t114, t116, t119, t120, t121, t122, t123, t124, t125, t126, t129, t130, t131, t132, t135, t139, t140, t141, t150, t151, t152, t155, t156, t162, t163, Intersection with reachable at each step enabled. (destroyed/reverse/intersect/total) :0/119/45/164
(forward)formula 0,0,6.01389,126528,1,0,359,441027,365,169,31415,354614,343
FORMULA PaceMaker-PT-none-CTLCardinality-15 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL
Formula is FALSE !

***************************************

ITS tools runner thread asked to quit. Dying gracefully.
[2021-05-14 07:19:29] [INFO ] Flatten gal took : 9 ms
[2021-05-14 07:19:29] [INFO ] Flatten gal took : 7 ms
[2021-05-14 07:19:29] [INFO ] Applying decomposition
[2021-05-14 07:19:29] [INFO ] Flatten gal took : 7 ms
Converted graph to binary with : CommandLine [args=[/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.louvain.binaries_1.0.0.202104292328/bin/convert-linux64, -i, /tmp/graph12072940821790170568.txt, -o, /tmp/graph12072940821790170568.bin, -w, /tmp/graph12072940821790170568.weights], workingDir=null]
Built communities with : CommandLine [args=[/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.louvain.binaries_1.0.0.202104292328/bin/louvain-linux64, /tmp/graph12072940821790170568.bin, -l, -1, -v, -w, /tmp/graph12072940821790170568.weights, -q, 0, -e, 0.001], workingDir=null]
[2021-05-14 07:19:29] [INFO ] Decomposing Gal with order
[2021-05-14 07:19:29] [INFO ] Rewriting arrays to variables to allow decomposition.
[2021-05-14 07:19:29] [INFO ] Removed a total of 61 redundant transitions.
[2021-05-14 07:19:29] [INFO ] Flatten gal took : 70 ms
[2021-05-14 07:19:29] [INFO ] Fuse similar labels procedure discarded/fused a total of 16 labels/synchronizations in 15 ms.
[2021-05-14 07:19:29] [INFO ] Time to serialize gal into /tmp/CTLCardinality17102101752437309478.gal : 5 ms
[2021-05-14 07:19:29] [INFO ] Time to serialize properties into /tmp/CTLCardinality10702150007073640562.ctl : 2 ms
Invoking ITS tools like this :CommandLine [args=[/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.202104292328/bin/its-ctl-linux64, --gc-threshold, 2000000, --quiet, -i, /tmp/CTLCardinality17102101752437309478.gal, -t, CGAL, -ctl, /tmp/CTLCardinality10702150007073640562.ctl, --gen-order, FOLLOW], workingDir=/home/mcc/execution]

its-ctl command run as :

/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.202104292328/bin/its-ctl-linux64 --gc-threshold 2000000 --quiet -i /tmp/CTLCardinality17102101752437309478.gal -t CGAL -ctl /tmp/CTLCardinality10702150007073640562.ctl --gen-order FOLLOW
No direction supplied, using forward translation only.
Parsed 10 CTL formulae.
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
reachable,3.68026e+17,21.4725,473528,2,13067,5,2.10853e+06,6,0,1077,2.48588e+06,0


Converting to forward existential form...Done !
original formula: (!(AF(EG(AG((gi2.gu1.SIG_Vbeat<=((gu0.A_SIG_APOut+gi2.gu4.A_SANode)+gi1.gu3.SIG_VgetOut)))))) + !(EG(TRUE)))
=> equivalent forward existential formula: [FwdG((Init * !(!(!(EG(!(EG(!(E(TRUE U !((gi2.gu1.SIG_Vbeat<=((gu0.A_SIG_APOut+gi2.gu4.A_SANode)+gi1.gu3.SIG_VgetOut)))))))))))),TRUE)] = FALSE
Reverse transition relation is NOT exact ! Due to transitions t1, t8, t11, t25, t28, t94, t95, t96, t98, t99, t101, t102, t104, t106, t108, t110, t111, t112, t114, t116, t119, t120, t121, t122, t123, t124, t125, t126, t129, t130, t131, t132, t135, t139, t140, t141, t150, t151, t152, t155, t156, t162, t163, Intersection with reachable at each step enabled. (destroyed/reverse/intersect/total) :0/115/43/158
(forward)formula 0,0,47.8158,845148,1,0,345,4.57197e+06,346,163,5643,4.39677e+06,329
FORMULA PaceMaker-PT-none-CTLCardinality-00 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL USE_NUPN
Formula is FALSE !

***************************************

original formula: EF((((AF(!(E((gu0.URI<=((((((((gu0.A_SIG_VS+gi2.gu1.A_AVJ)+gi2.gu1.A_LRI)+gi2.gu4.A_SANode)+gi1.gu3.SIG_AP)+gu0.VRP)+gu0.A_SIG_APOut)+gi1.gu3.VRG)+gi2.gu1.SIG_IncrClk)) U ((((((gu0.URI+gi2.gu1.A_SIG_AS)+gi1.gu2.A_Atrium)+gu0.SIG_AS)+gi1.gu3.SIG_APOut)+gu0.AVI)>=25)))) * !(EX(TRUE))) * (((((gi1.gu3.Atrium+gi1.gu3.A_AVJOut)+gi2.gu1.A_RAConductor)+gi2.gu4.A_SIG_AP)+gi1.gu3.SIG_VgetOut)>14)) * !(AX(EG(((((((gi2.gu1.A_SIG_VPOut+gi2.gu1.SIG_IncrClk)+gi1.gu3.A_SIG_VP)+gi2.gu1.A_dV)+gi2.gu4.A_SIG_AP)>=32)&&((((gu0.SIG_NextVtrBeat+gi2.gu1.AVJOut)+gi2.gu1.A_LRI)+gu0.SIG_VS)>=38)))))))
=> equivalent forward existential formula: [(EY((FwdU(Init,TRUE) * ((!(EG(!(!(E((gu0.URI<=((((((((gu0.A_SIG_VS+gi2.gu1.A_AVJ)+gi2.gu1.A_LRI)+gi2.gu4.A_SANode)+gi1.gu3.SIG_AP)+gu0.VRP)+gu0.A_SIG_APOut)+gi1.gu3.VRG)+gi2.gu1.SIG_IncrClk)) U ((((((gu0.URI+gi2.gu1.A_SIG_AS)+gi1.gu2.A_Atrium)+gu0.SIG_AS)+gi1.gu3.SIG_APOut)+gu0.AVI)>=25)))))) * !(EX(TRUE))) * (((((gi1.gu3.Atrium+gi1.gu3.A_AVJOut)+gi2.gu1.A_RAConductor)+gi2.gu4.A_SIG_AP)+gi1.gu3.SIG_VgetOut)>14)))) * !(EG(((((((gi2.gu1.A_SIG_VPOut+gi2.gu1.SIG_IncrClk)+gi1.gu3.A_SIG_VP)+gi2.gu1.A_dV)+gi2.gu4.A_SIG_AP)>=32)&&((((gu0.SIG_NextVtrBeat+gi2.gu1.AVJOut)+gi2.gu1.A_LRI)+gu0.SIG_VS)>=38)))))] != FALSE
(forward)formula 1,0,48.1424,859932,1,0,345,4.57197e+06,347,163,5734,4.397e+06,330
FORMULA PaceMaker-PT-none-CTLCardinality-01 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL USE_NUPN
Formula is FALSE !
Detected timeout of ITS tools.
[2021-05-14 07:40:28] [INFO ] Flatten gal took : 77 ms
[2021-05-14 07:40:28] [INFO ] Time to serialize gal into /tmp/CTLCardinality11420392420895628764.gal : 30 ms
[2021-05-14 07:40:28] [INFO ] Time to serialize properties into /tmp/CTLCardinality12329021673299465292.ctl : 15 ms
Invoking ITS tools like this :CommandLine [args=[/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.202104292328/bin/its-ctl-linux64, --gc-threshold, 2000000, --quiet, -i, /tmp/CTLCardinality11420392420895628764.gal, -t, CGAL, -ctl, /tmp/CTLCardinality12329021673299465292.ctl, --gen-order, FOLLOW], workingDir=/home/mcc/execution]

its-ctl command run as :

/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.202104292328/bin/its-ctl-linux64 --gc-threshold 2000000 --quiet -i /tmp/CTLCardinality11420392420895628764.gal -t CGAL -ctl /tmp/CTLCardinality12329021673299465292.ctl --gen-order FOLLOW
No direction supplied, using forward translation only.
Parsed 8 CTL formulae.
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
reachable,3.68026e+17,0.543808,20972,2,1248,5,78057,6,0,1071,89663,0


Converting to forward existential form...Done !
original formula: (!(AF(AX((((((A_SANodeEctopic+SIG_Clk0)+SIG_APOut)+A_VRP)<=(((((((((SANode+A_SIG_VP)+VRG)+URI)+SIG_AgetOut)+SIG_Clk1)+A_AVI)+SIG_Aget)+SIG_VgetOut)+Atrium))&&(A_URI<=(((((((A_SIG_AP+SIG_Vget)+A_SIG_NextVtrBeat)+A_SIG_VPOut)+A_AVJOut)+A_Ventricle)+VRGEctopic)+RAConductor)))))) * ((!(EF(((((((A_AVJOut+AVJOut)+A_SIG_VgetOut)+VtrNoiseGenerator)+A_AtrNoiseGenerator)+SANodeEctopic)<=(((((((((A_dV+Ventricle)+URIState)+A_VRG)+A_Ventricle)+SIG_AS)+SIG_Vget)+A_SIG_AS)+URI)+A_AVJ)))) + !(E(AG(((VtrNoiseGenerator<=AVJ)||(((((((A_dV+SIG_VS)+A_PVARP)+A_SIG_AgetOut)+SIG_VgetOut)+VtrNoiseGenerator)+AVI)<=45))) U AG((((((((((((A_dV+A_RVConductor)+A_VRP)+A_AVJ)+SIG_State)+A_Atrium)+VRGEctopic)+AVJ)+A_SIG_Vbeat)+SIG_IncrClk)>=5)&&(A_SIG_VS<=(((SIG_Clk1+SIG_NextVtrBeat)+A_VRP)+A_Ventricle))))))) + !(AG(((((((RVConductor+AtrNoiseGenerator)+A_SIG_Vget)+AVJ)+A_SIG_Vbeat)>(((Atrium+A_SIG_IncrClk)+SIG_AgetOut)+A_A_dV)) + EF(((((((((A_RVConductor+A_SIG_VgetOut)+A_PVARP)+A_SIG_NextVtrBeat)+AVI)+A_AVJ)+A_SANode)+SIG_AgetOut)<=(A_URI+RVConductor))))))))
=> equivalent forward existential formula: ([(Init * !(EG(!(!(EX(!((((((A_SANodeEctopic+SIG_Clk0)+SIG_APOut)+A_VRP)<=(((((((((SANode+A_SIG_VP)+VRG)+URI)+SIG_AgetOut)+SIG_Clk1)+A_AVI)+SIG_Aget)+SIG_VgetOut)+Atrium))&&(A_URI<=(((((((A_SIG_AP+SIG_Vget)+A_SIG_NextVtrBeat)+A_SIG_VPOut)+A_AVJOut)+A_Ventricle)+VRGEctopic)+RAConductor))))))))))] = FALSE * [(FwdU(((Init * !(!(!(E(TRUE U !(((((((RVConductor+AtrNoiseGenerator)+A_SIG_Vget)+AVJ)+A_SIG_Vbeat)>(((Atrium+A_SIG_IncrClk)+SIG_AgetOut)+A_A_dV)) + E(TRUE U ((((((((A_RVConductor+A_SIG_VgetOut)+A_PVARP)+A_SIG_NextVtrBeat)+AVI)+A_AVJ)+A_SANode)+SIG_AgetOut)<=(A_URI+RVConductor)))))))))) * !(!(E(TRUE U ((((((A_AVJOut+AVJOut)+A_SIG_VgetOut)+VtrNoiseGenerator)+A_AtrNoiseGenerator)+SANodeEctopic)<=(((((((((A_dV+Ventricle)+URIState)+A_VRG)+A_Ventricle)+SIG_AS)+SIG_Vget)+A_SIG_AS)+URI)+A_AVJ)))))),!(E(TRUE U !(((VtrNoiseGenerator<=AVJ)||(((((((A_dV+SIG_VS)+A_PVARP)+A_SIG_AgetOut)+SIG_VgetOut)+VtrNoiseGenerator)+AVI)<=45)))))) * !(E(TRUE U !((((((((((((A_dV+A_RVConductor)+A_VRP)+A_AVJ)+SIG_State)+A_Atrium)+VRGEctopic)+AVJ)+A_SIG_Vbeat)+SIG_IncrClk)>=5)&&(A_SIG_VS<=(((SIG_Clk1+SIG_NextVtrBeat)+A_VRP)+A_Ventricle)))))))] = FALSE)
Reverse transition relation is NOT exact ! Due to transitions t1, t8, t11, t25, t28, t94, t95, t96, t97, t98, t99, t100, t101, t102, t103, t106, t107, t110, t111, t112, t114, t116, t119, t120, t121, t122, t123, t124, t125, t126, t129, t130, t131, t132, t135, t139, t140, t141, t150, t151, t152, t155, t156, t162, t163, Intersection with reachable at each step enabled. (destroyed/reverse/intersect/total) :0/119/45/164
Using saturation style SCC detection
Fast SCC detection found a local SCC at level 0
(forward)formula 0,1,267.591,3388012,1,0,398,8.1904e+06,10,192,2136,1.59705e+07,1
FORMULA PaceMaker-PT-none-CTLCardinality-02 TRUE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL
Formula is TRUE !
Detected timeout of ITS tools.
[2021-05-14 08:01:18] [INFO ] Flatten gal took : 46 ms
[2021-05-14 08:01:19] [INFO ] Input system was already deterministic with 164 transitions.
[2021-05-14 08:01:19] [INFO ] Transformed 70 places.
[2021-05-14 08:01:19] [INFO ] Transformed 164 transitions.
Running greatSPN : CommandLine [args=[/home/mcc/BenchKit/bin//..//greatspn//bin/pinvar, /home/mcc/execution/gspn], workingDir=/home/mcc/execution]
Run of greatSPN captured in /home/mcc/execution/outPut.txt
Running greatSPN : CommandLine [args=[/home/mcc/BenchKit/bin//..//greatspn//bin/RGMEDD2, /home/mcc/execution/gspn, -META, -varord-only], workingDir=/home/mcc/execution]
Run of greatSPN captured in /home/mcc/execution/outPut.txt
Using order generated by GreatSPN with heuristic : META
[2021-05-14 08:01:19] [INFO ] Time to serialize gal into /tmp/CTLCardinality6407195962923289964.gal : 6 ms
[2021-05-14 08:01:19] [INFO ] Time to serialize properties into /tmp/CTLCardinality10116402557534542229.ctl : 3 ms
Invoking ITS tools like this :CommandLine [args=[/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.202104292328/bin/its-ctl-linux64, --gc-threshold, 2000000, --quiet, -i, /tmp/CTLCardinality6407195962923289964.gal, -t, CGAL, -ctl, /tmp/CTLCardinality10116402557534542229.ctl, --load-order, /home/mcc/execution/model.ord, --gen-order, FOLLOW], workingDir=/home/mcc/execution]

its-ctl command run as :

/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.202104292328/bin/its-ctl-linux64 --gc-threshold 2000000 --quiet -i /tmp/CTLCardinality6407195962923289964.gal -t CGAL -ctl /tmp/CTLCardinality10116402557534542229.ctl --load-order /home/mcc/execution/model.ord --gen-order FOLLOW
Successfully loaded order from file /home/mcc/execution/model.ord
No direction supplied, using forward translation only.
Parsed 7 CTL formulae.
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
reachable,3.68026e+17,0.759622,26996,2,1746,5,127300,6,0,1071,108851,0


Converting to forward existential form...Done !
original formula: (AF(AG(((((((((((((A_VRGEctopic+A_SIG_Aget)+AVJOut)+A_SIG_IncrClk)+URI)+A_SIG_AgetOut)+VRGEctopic)+AVJ)+SANode)+A_SIG_State)<=(((((((((A_SIG_Vget+SANode)+A_AtrNoiseGenerator)+A_VRG)+AVJOut)+URI)+RAConductor)+A_PVARP)+VRGEctopic)+PVARP))&&((((A_URI+A_VtrNoiseGenerator)+A_SIG_AS)+A_SIG_Vget)<=(VtrNoiseGenerator+A_SIG_Vget)))&&((((((A_SIG_VS+SIG_State)+SIG_Clk0)+SIG_VgetOut)+A_VRG)+SIG_VP)<=(((SIG_VgetOut+SIG_VPOut)+URIState)+A_SIG_APOut))))) + (EF((((((((VRGEctopic+SIG_AS)+VRG)+URIState)+A_RAConductor)+A_URI)<=RAConductor)&&((((((((((A_SIG_Vbeat+A_LRI)+AVJOut)+A_VRGEctopic)+A_SIG_VS)+A_SIG_APOut)+A_VRG)+VRP)+A_PVARP)+SIG_VPOut)<=RVConductor))) * ((E((EF(((((((((((A_VtrNoiseGenerator+A_AVI)+A_AVJ)+A_SIG_APOut)+A_URI)+A_SIG_State)+VtrNoiseGenerator)+SIG_AS)+A_AtrNoiseGenerator)+SIG_State)<=((Ventricle+SIG_AgetOut)+A_URIState))) * (AX((A_SIG_APOut<=((((URIState+A_Ventricle)+A_SIG_Vget)+SIG_Clk1)+URI))) + (((((((((A_VRP+SIG_Aget)+SIG_AgetOut)+A_AtrNoiseGenerator)+A_VRGEctopic)+A_SIG_Aget)+SIG_VS)+A_LRI)+A_SIG_VP)<=39))) U (((((((A_URI+SIG_VS)+AtrNoiseGenerator)+SIG_VgetOut)+A_SIG_VPOut)+AVJOut)+SIG_APOut)<=40)) + AF((((((A_SIG_APOut+A_SIG_VPOut)+A_SIG_IncrClk)+A_RVConductor)+AVJOut)<44))) + !(AF(((((((((((PVARP+SIG_AgetOut)+A_SIG_IncrClk)+RAConductor)+A_SIG_Clk1)+A_URIState)+A_SIG_VS)+A_Ventricle)+A_SIG_AP)+AVJ)<=(((((((((SIG_NextVtrBeat+A_SIG_Clk0)+A_Atrium)+A_SIG_Aget)+A_SIG_AS)+A_VtrNoiseGenerator)+LRI)+SIG_Clk0)+A_SIG_AP)+A_SIG_State)))))))
=> equivalent forward existential formula: ([((Init * !(!(EG(!(!(E(TRUE U !(((((((((((((A_VRGEctopic+A_SIG_Aget)+AVJOut)+A_SIG_IncrClk)+URI)+A_SIG_AgetOut)+VRGEctopic)+AVJ)+SANode)+A_SIG_State)<=(((((((((A_SIG_Vget+SANode)+A_AtrNoiseGenerator)+A_VRG)+AVJOut)+URI)+RAConductor)+A_PVARP)+VRGEctopic)+PVARP))&&((((A_URI+A_VtrNoiseGenerator)+A_SIG_AS)+A_SIG_Vget)<=(VtrNoiseGenerator+A_SIG_Vget)))&&((((((A_SIG_VS+SIG_State)+SIG_Clk0)+SIG_VgetOut)+A_VRG)+SIG_VP)<=(((SIG_VgetOut+SIG_VPOut)+URIState)+A_SIG_APOut))))))))))) * !(E(TRUE U (((((((VRGEctopic+SIG_AS)+VRG)+URIState)+A_RAConductor)+A_URI)<=RAConductor)&&((((((((((A_SIG_Vbeat+A_LRI)+AVJOut)+A_VRGEctopic)+A_SIG_VS)+A_SIG_APOut)+A_VRG)+VRP)+A_PVARP)+SIG_VPOut)<=RVConductor)))))] = FALSE * [FwdG((((Init * !(!(EG(!(!(E(TRUE U !(((((((((((((A_VRGEctopic+A_SIG_Aget)+AVJOut)+A_SIG_IncrClk)+URI)+A_SIG_AgetOut)+VRGEctopic)+AVJ)+SANode)+A_SIG_State)<=(((((((((A_SIG_Vget+SANode)+A_AtrNoiseGenerator)+A_VRG)+AVJOut)+URI)+RAConductor)+A_PVARP)+VRGEctopic)+PVARP))&&((((A_URI+A_VtrNoiseGenerator)+A_SIG_AS)+A_SIG_Vget)<=(VtrNoiseGenerator+A_SIG_Vget)))&&((((((A_SIG_VS+SIG_State)+SIG_Clk0)+SIG_VgetOut)+A_VRG)+SIG_VP)<=(((SIG_VgetOut+SIG_VPOut)+URIState)+A_SIG_APOut))))))))))) * !(!(!(EG(!(((((((((((PVARP+SIG_AgetOut)+A_SIG_IncrClk)+RAConductor)+A_SIG_Clk1)+A_URIState)+A_SIG_VS)+A_Ventricle)+A_SIG_AP)+AVJ)<=(((((((((SIG_NextVtrBeat+A_SIG_Clk0)+A_Atrium)+A_SIG_Aget)+A_SIG_AS)+A_VtrNoiseGenerator)+LRI)+SIG_Clk0)+A_SIG_AP)+A_SIG_State)))))))) * !(E((E(TRUE U ((((((((((A_VtrNoiseGenerator+A_AVI)+A_AVJ)+A_SIG_APOut)+A_URI)+A_SIG_State)+VtrNoiseGenerator)+SIG_AS)+A_AtrNoiseGenerator)+SIG_State)<=((Ventricle+SIG_AgetOut)+A_URIState))) * (!(EX(!((A_SIG_APOut<=((((URIState+A_Ventricle)+A_SIG_Vget)+SIG_Clk1)+URI))))) + (((((((((A_VRP+SIG_Aget)+SIG_AgetOut)+A_AtrNoiseGenerator)+A_VRGEctopic)+A_SIG_Aget)+SIG_VS)+A_LRI)+A_SIG_VP)<=39))) U (((((((A_URI+SIG_VS)+AtrNoiseGenerator)+SIG_VgetOut)+A_SIG_VPOut)+AVJOut)+SIG_APOut)<=40)))),!((((((A_SIG_APOut+A_SIG_VPOut)+A_SIG_IncrClk)+A_RVConductor)+AVJOut)<44)))] = FALSE)
Reverse transition relation is NOT exact ! Due to transitions t1, t8, t11, t25, t28, t94, t95, t96, t97, t98, t99, t100, t101, t102, t103, t106, t107, t110, t111, t112, t114, t116, t119, t120, t121, t122, t123, t124, t125, t126, t129, t130, t131, t132, t135, t139, t140, t141, t150, t151, t152, t155, t156, t162, t163, Intersection with reachable at each step enabled. (destroyed/reverse/intersect/total) :0/119/45/164

BK_TIME_CONFINEMENT_REACHED

--------------------
content from stderr:

+ export BINDIR=/home/mcc/BenchKit/bin//../
+ BINDIR=/home/mcc/BenchKit/bin//../
++ pwd
+ export MODEL=/home/mcc/execution
+ MODEL=/home/mcc/execution
+ [[ CTLCardinality = StateSpace ]]
+ /home/mcc/BenchKit/bin//..//runeclipse.sh /home/mcc/execution CTLCardinality -its -ltsmin -greatspnpath /home/mcc/BenchKit/bin//..//greatspn/ -order META -manyOrder -smt -timeout 3600
+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
++ cut -d . -f 9
++ ls /home/mcc/BenchKit/bin//..//itstools/plugins/fr.lip6.move.gal.application.pnmcc_1.0.0.202104292328.jar
+ VERSION=0
+ echo 'Running Version 0'
+ /home/mcc/BenchKit/bin//..//itstools/its-tools -data /home/mcc/execution/workspace -pnfolder /home/mcc/execution -examination CTLCardinality -spotpath /home/mcc/BenchKit/bin//..//ltlfilt -z3path /home/mcc/BenchKit/bin//..//z3/bin/z3 -yices2path /home/mcc/BenchKit/bin//..//yices/bin/yices -its -ltsmin -greatspnpath /home/mcc/BenchKit/bin//..//greatspn/ -order META -manyOrder -smt -timeout 3600 -vmargs -Dosgi.locking=none -Declipse.stateSaveDelayInterval=-1 -Dosgi.configuration.area=/tmp/.eclipse -Xss128m -Xms40m -Xmx16000m

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="PaceMaker-PT-none"
export BK_EXAMINATION="CTLCardinality"
export BK_TOOL="itstools"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-4028"
echo " Executing tool itstools"
echo " Input is PaceMaker-PT-none, examination is CTLCardinality"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r140-tall-162089127700353"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/PaceMaker-PT-none.tgz
mv PaceMaker-PT-none execution
cd execution
if [ "CTLCardinality" = "ReachabilityDeadlock" ] || [ "CTLCardinality" = "UpperBounds" ] || [ "CTLCardinality" = "QuasiLiveness" ] || [ "CTLCardinality" = "StableMarking" ] || [ "CTLCardinality" = "Liveness" ] || [ "CTLCardinality" = "OneSafe" ] || [ "CTLCardinality" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLCardinality" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLCardinality" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLCardinality.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property CTLCardinality.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "CTLCardinality.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' CTLCardinality.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ "CTLCardinality" = "ReachabilityDeadlock" ] || [ "CTLCardinality" = "QuasiLiveness" ] || [ "CTLCardinality" = "StableMarking" ] || [ "CTLCardinality" = "Liveness" ] || [ "CTLCardinality" = "OneSafe" ] ; then
echo "FORMULA_NAME CTLCardinality"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;