About the Execution of ITS-Tools for GlobalResAllocation-PT-03
Execution Summary | |||||
Max Memory Used (MB) |
Time wait (ms) | CPU Usage (ms) | I/O Wait (ms) | Computed Result | Execution Status |
657.743 | 17078.00 | 23447.00 | 307.60 | F | normal |
Execution Chart
We display below the execution chart for this examination (boot time has been removed).
Trace from the execution
Formatting '/data/fkordon/mcc2021-input.r128-tall-162075419200036.qcow2', fmt=qcow2 size=4294967296 backing_file='/data/fkordon/mcc2021-input.qcow2' encryption=off cluster_size=65536 lazy_refcounts=off
Waiting for the VM to be ready (probing ssh)
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=====================================================================
Generated by BenchKit 2-4028
Executing tool itstools
Input is GlobalResAllocation-PT-03, examination is ReachabilityDeadlock
Time confinement is 1800 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r128-tall-162075419200036
=====================================================================
--------------------
preparation of the directory to be used:
/home/mcc/execution
total 25M
-rw-r--r-- 1 mcc users 50K May 5 16:58 CTLCardinality.txt
-rw-r--r-- 1 mcc users 242K May 10 09:43 CTLCardinality.xml
-rw-r--r-- 1 mcc users 2.9M May 5 16:58 CTLFireability.txt
-rw-r--r-- 1 mcc users 12M May 10 09:43 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K May 6 14:48 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 8.5K Mar 28 16:13 LTLCardinality.txt
-rw-r--r-- 1 mcc users 36K Mar 28 16:13 LTLCardinality.xml
-rw-r--r-- 1 mcc users 217K Mar 28 16:13 LTLFireability.txt
-rw-r--r-- 1 mcc users 735K Mar 28 16:13 LTLFireability.xml
-rw-r--r-- 1 mcc users 9.5K Mar 23 11:25 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 33K Mar 23 11:25 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 617K Mar 22 20:41 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 2.0M Mar 22 20:41 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 2.5K Mar 22 09:15 UpperBounds.txt
-rw-r--r-- 1 mcc users 5.3K Mar 22 09:15 UpperBounds.xml
-rw-r--r-- 1 mcc users 5 May 5 16:51 equiv_col
-rw-r--r-- 1 mcc users 3 May 5 16:51 instance
-rw-r--r-- 1 mcc users 6 May 5 16:51 iscolored
-rw-r--r-- 1 mcc users 5.7M May 5 16:51 model.pnml
--------------------
content from stdout:
=== Data for post analysis generated by BenchKit (invocation template)
The expected result is a vector of booleans
BOOL_VECTOR
FORMULA_NAME ReachabilityDeadlock
=== Now, execution of the tool begins
BK_START 1620854812273
Running Version 0
[2021-05-12 21:26:53] [INFO ] Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, ReachabilityDeadlock, -spotpath, /home/mcc/BenchKit/bin//..//ltlfilt, -z3path, /home/mcc/BenchKit/bin//..//z3/bin/z3, -yices2path, /home/mcc/BenchKit/bin//..//yices/bin/yices, -its, -ltsmin, -greatspnpath, /home/mcc/BenchKit/bin//..//greatspn/, -order, META, -manyOrder, -smt, -timeout, 1800]
[2021-05-12 21:26:53] [INFO ] Parsing pnml file : /home/mcc/execution/model.pnml
[2021-05-12 21:26:54] [INFO ] Load time of PNML (sax parser for PT used): 330 ms
[2021-05-12 21:26:54] [INFO ] Transformed 33 places.
[2021-05-12 21:26:54] [INFO ] Transformed 4791 transitions.
[2021-05-12 21:26:54] [INFO ] Parsed PT model containing 33 places and 4791 transitions in 404 ms.
Parsed 1 properties from file /home/mcc/execution/ReachabilityDeadlock.xml in 4 ms.
Working with output stream class java.io.PrintStream
Ensure Unique test removed 4080 transitions
Reduce redundant transitions removed 4080 transitions.
Built sparse matrix representations for Structural reductions in 5 ms.24285KB memory used
Starting structural reductions, iteration 0 : 33/33 places, 711/711 transitions.
Reduce isomorphic (modulo) transitions removed 0 transitions.
Iterating post reduction 0 with 36 rules applied. Total rules applied 36 place count 33 transition count 693
Applied a total of 36 rules in 85 ms. Remains 33 /33 variables (removed 0) and now considering 693/711 (removed 18) transitions.
// Phase 1: matrix 693 rows 33 cols
[2021-05-12 21:26:54] [INFO ] Computed 12 place invariants in 34 ms
[2021-05-12 21:26:54] [INFO ] Dead Transitions using invariants and state equation in 390 ms returned [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 32, 33, 34, 35, 36, 37, 38, 39, 40, 41, 42, 43, 44, 45, 46, 47, 48, 49, 50, 51, 52, 53, 54, 55, 56, 57, 58, 59, 60, 61, 62, 63, 64, 65, 66, 67, 68, 69, 70, 74, 75, 76, 77, 78, 79, 80, 81, 82, 83, 84, 85, 86, 87, 88, 89, 90, 91, 92, 93, 94, 95, 96, 97, 98, 99, 100, 101, 102, 103, 104, 105, 106, 107, 108, 109, 110, 111, 112, 113, 114, 115, 116, 117, 118, 119, 120, 121, 123, 126, 127, 128, 129, 130, 131, 132, 133, 134, 135, 136, 137, 139, 141, 142, 144, 145, 146, 147, 148, 149, 150, 151, 152, 153, 154, 155, 162, 163, 164, 165, 166, 167, 168, 169, 170, 171, 172, 173, 174, 175, 176, 177, 178, 179, 180, 181, 182, 183, 184, 185, 186, 187, 188, 189, 190, 191, 192, 193, 194, 195, 196, 197, 198, 199, 200, 201, 202, 203, 204, 205, 206, 207, 208, 209, 210, 211, 212, 213, 214, 215, 216, 217, 218, 219, 220, 221, 222, 223, 224, 226, 227, 228, 229, 230, 231, 232, 233, 234, 235, 236, 237, 240, 241, 242, 243, 244, 245, 246, 247, 248, 249, 250, 251, 252, 253, 254, 255, 256, 257, 261, 262, 263, 264, 265, 266, 272, 273, 274, 276, 277, 278, 279, 280, 281, 282, 283, 284, 285, 286, 287, 291, 292, 293, 294, 295, 296, 300, 301, 303, 306, 307, 308, 312, 314, 315, 320, 321, 323, 324, 325, 326, 327, 328, 329, 330, 331, 332, 333, 334, 335, 336, 337, 338, 339, 340, 341, 342, 343, 344, 345, 346, 347, 348, 349, 350, 351, 352, 353, 354, 355, 356, 357, 358, 359, 360, 361, 362, 363, 364, 365, 366, 367, 368, 369, 370, 371, 372, 373, 374, 375, 376, 377, 378, 379, 380, 381, 382, 383, 384, 385, 386, 387, 388, 389, 390, 391, 392, 393, 394, 395, 396, 397, 398, 399, 400, 401, 405, 406, 407, 411, 412, 413, 414, 415, 416, 417, 418, 419, 420, 421, 422, 423, 424, 425, 426, 427, 428, 429, 430, 431, 432, 433, 434, 439, 441, 442, 443, 444, 445, 452, 453, 454, 458, 460, 461, 465, 466, 467, 468, 469, 470, 471, 472, 473, 474, 475, 476, 477, 478, 479, 486, 487, 488, 489, 490, 491, 494, 495, 497, 504, 506, 507, 508, 509, 510, 528, 529, 534, 537, 538, 539, 540, 541, 542, 543, 544, 545, 546, 547, 548, 549, 550, 551, 552, 553, 554, 557, 558, 563, 570, 571, 575, 590, 591, 592, 605, 607, 608]
Found 459 dead transitions using SMT.
Drop transitions removed 459 transitions
Dead transitions reduction (with SMT) triggered by suspicious arc values removed 459 transitions :[608, 607, 605, 592, 591, 590, 575, 571, 570, 563, 558, 557, 554, 553, 552, 551, 550, 549, 548, 547, 546, 545, 544, 543, 542, 541, 540, 539, 538, 537, 534, 529, 528, 510, 509, 508, 507, 506, 504, 497, 495, 494, 491, 490, 489, 488, 487, 486, 479, 478, 477, 476, 475, 474, 473, 472, 471, 470, 469, 468, 467, 466, 465, 461, 460, 458, 454, 453, 452, 445, 444, 443, 442, 441, 439, 434, 433, 432, 431, 430, 429, 428, 427, 426, 425, 424, 423, 422, 421, 420, 419, 418, 417, 416, 415, 414, 413, 412, 411, 407, 406, 405, 401, 400, 399, 398, 397, 396, 395, 394, 393, 392, 391, 390, 389, 388, 387, 386, 385, 384, 383, 382, 381, 380, 379, 378, 377, 376, 375, 374, 373, 372, 371, 370, 369, 368, 367, 366, 365, 364, 363, 362, 361, 360, 359, 358, 357, 356, 355, 354, 353, 352, 351, 350, 349, 348, 347, 346, 345, 344, 343, 342, 341, 340, 339, 338, 337, 336, 335, 334, 333, 332, 331, 330, 329, 328, 327, 326, 325, 324, 323, 321, 320, 315, 314, 312, 308, 307, 306, 303, 301, 300, 296, 295, 294, 293, 292, 291, 287, 286, 285, 284, 283, 282, 281, 280, 279, 278, 277, 276, 274, 273, 272, 266, 265, 264, 263, 262, 261, 257, 256, 255, 254, 253, 252, 251, 250, 249, 248, 247, 246, 245, 244, 243, 242, 241, 240, 237, 236, 235, 234, 233, 232, 231, 230, 229, 228, 227, 226, 224, 223, 222, 221, 220, 219, 218, 217, 216, 215, 214, 213, 212, 211, 210, 209, 208, 207, 206, 205, 204, 203, 202, 201, 200, 199, 198, 197, 196, 195, 194, 193, 192, 191, 190, 189, 188, 187, 186, 185, 184, 183, 182, 181, 180, 179, 178, 177, 176, 175, 174, 173, 172, 171, 170, 169, 168, 167, 166, 165, 164, 163, 162, 155, 154, 153, 152, 151, 150, 149, 148, 147, 146, 145, 144, 142, 141, 139, 137, 136, 135, 134, 133, 132, 131, 130, 129, 128, 127, 126, 123, 121, 120, 119, 118, 117, 116, 115, 114, 113, 112, 111, 110, 109, 108, 107, 106, 105, 104, 103, 102, 101, 100, 99, 98, 97, 96, 95, 94, 93, 92, 91, 90, 89, 88, 87, 86, 85, 84, 83, 82, 81, 80, 79, 78, 77, 76, 75, 74, 70, 69, 68, 67, 66, 65, 64, 63, 62, 61, 60, 59, 58, 57, 56, 55, 54, 53, 52, 51, 50, 49, 48, 47, 46, 45, 44, 43, 42, 41, 40, 39, 38, 37, 36, 35, 34, 33, 32, 31, 30, 29, 28, 27, 26, 25, 24, 23, 22, 21, 20, 19, 18, 17, 16, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0]
Starting structural reductions, iteration 1 : 33/33 places, 234/711 transitions.
Applied a total of 0 rules in 10 ms. Remains 33 /33 variables (removed 0) and now considering 234/234 (removed 0) transitions.
Finished structural reductions, in 2 iterations. Remains : 33/33 places, 234/711 transitions.
Random walk for 1250000 steps, including 0 resets, run took 6427 ms (no deadlock found). (steps per millisecond=194 )
Random directed walk for 1250000 steps, including 0 resets, run took 7216 ms (no deadlock found). (steps per millisecond=173 )
// Phase 1: matrix 234 rows 33 cols
[2021-05-12 21:27:08] [INFO ] Computed 12 place invariants in 18 ms
[2021-05-12 21:27:08] [INFO ] [Real]Absence check using 7 positive place invariants in 2 ms returned sat
[2021-05-12 21:27:08] [INFO ] [Real]Absence check using 7 positive and 5 generalized place invariants in 1 ms returned unsat
FORMULA ReachabilityDeadlock FALSE TECHNIQUES TOPOLOGICAL SAT_SMT STRUCTURAL_REDUCTION
BK_STOP 1620854829351
--------------------
content from stderr:
+ export BINDIR=/home/mcc/BenchKit/bin//../
+ BINDIR=/home/mcc/BenchKit/bin//../
++ pwd
+ export MODEL=/home/mcc/execution
+ MODEL=/home/mcc/execution
+ [[ ReachabilityDeadlock = StateSpace ]]
+ /home/mcc/BenchKit/bin//..//runeclipse.sh /home/mcc/execution ReachabilityDeadlock -its -ltsmin -greatspnpath /home/mcc/BenchKit/bin//..//greatspn/ -order META -manyOrder -smt -timeout 1800
+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
++ cut -d . -f 9
++ ls /home/mcc/BenchKit/bin//..//itstools/plugins/fr.lip6.move.gal.application.pnmcc_1.0.0.202104292328.jar
+ VERSION=0
+ echo 'Running Version 0'
+ /home/mcc/BenchKit/bin//..//itstools/its-tools -data /home/mcc/execution/workspace -pnfolder /home/mcc/execution -examination ReachabilityDeadlock -spotpath /home/mcc/BenchKit/bin//..//ltlfilt -z3path /home/mcc/BenchKit/bin//..//z3/bin/z3 -yices2path /home/mcc/BenchKit/bin//..//yices/bin/yices -its -ltsmin -greatspnpath /home/mcc/BenchKit/bin//..//greatspn/ -order META -manyOrder -smt -timeout 1800 -vmargs -Dosgi.locking=none -Declipse.stateSaveDelayInterval=-1 -Dosgi.configuration.area=/tmp/.eclipse -Xss128m -Xms40m -Xmx16000m
Sequence of Actions to be Executed by the VM
This is useful if one wants to reexecute the tool in the VM from the submitted image disk.
set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="GlobalResAllocation-PT-03"
export BK_EXAMINATION="ReachabilityDeadlock"
export BK_TOOL="itstools"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="1800"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"
# this is specific to your benchmark or test
export BIN_DIR="$HOME/BenchKit/bin"
# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi
# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-4028"
echo " Executing tool itstools"
echo " Input is GlobalResAllocation-PT-03, examination is ReachabilityDeadlock"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r128-tall-162075419200036"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"
tar xzf /home/mcc/BenchKit/INPUTS/GlobalResAllocation-PT-03.tgz
mv GlobalResAllocation-PT-03 execution
cd execution
if [ "ReachabilityDeadlock" = "ReachabilityDeadlock" ] || [ "ReachabilityDeadlock" = "UpperBounds" ] || [ "ReachabilityDeadlock" = "QuasiLiveness" ] || [ "ReachabilityDeadlock" = "StableMarking" ] || [ "ReachabilityDeadlock" = "Liveness" ] || [ "ReachabilityDeadlock" = "OneSafe" ] || [ "ReachabilityDeadlock" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh
echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "ReachabilityDeadlock" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "ReachabilityDeadlock" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "ReachabilityDeadlock.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property ReachabilityDeadlock.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "ReachabilityDeadlock.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '
echo "FORMULA_NAME $x"
done
elif [ "ReachabilityDeadlock" = "ReachabilityDeadlock" ] || [ "ReachabilityDeadlock" = "QuasiLiveness" ] || [ "ReachabilityDeadlock" = "StableMarking" ] || [ "ReachabilityDeadlock" = "Liveness" ] || [ "ReachabilityDeadlock" = "OneSafe" ] ; then
echo "FORMULA_NAME ReachabilityDeadlock"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;