Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/data/fkordon/mcc2021-input.r121-tall-162075407300654.qcow2', fmt=qcow2 size=4294967296 backing_file='/data/fkordon/mcc2021-input.qcow2' encryption=off cluster_size=65536 lazy_refcounts=off
Waiting for the VM to be ready (probing ssh)
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=====================================================================
Generated by BenchKit 2-4028
Executing tool itstools
Input is LamportFastMutEx-PT-3, examination is ReachabilityCardinality
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r121-tall-162075407300654
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 820K
-rw-r--r-- 1 mcc users 44K May 5 16:58 CTLCardinality.txt
-rw-r--r-- 1 mcc users 247K May 10 09:43 CTLCardinality.xml
-rw-r--r-- 1 mcc users 40K May 5 16:58 CTLFireability.txt
-rw-r--r-- 1 mcc users 205K May 10 09:43 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K May 6 14:48 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.6K May 6 14:48 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 7.4K Apr 26 07:42 LTLCardinality.txt
-rw-r--r-- 1 mcc users 38K Apr 26 07:42 LTLCardinality.xml
-rw-r--r-- 1 mcc users 5.9K Apr 26 07:42 LTLFireability.txt
-rw-r--r-- 1 mcc users 29K Apr 26 07:42 LTLFireability.xml
-rw-r--r-- 1 mcc users 5.2K Mar 27 06:03 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 23K Mar 27 06:03 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 6.9K Mar 25 07:11 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 32K Mar 25 07:11 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 2.2K Mar 22 09:15 UpperBounds.txt
-rw-r--r-- 1 mcc users 5.0K Mar 22 09:15 UpperBounds.xml
-rw-r--r-- 1 mcc users 5 May 5 16:51 equiv_col
-rw-r--r-- 1 mcc users 2 May 5 16:51 instance
-rw-r--r-- 1 mcc users 6 May 5 16:51 iscolored
-rw-r--r-- 1 mcc users 77K May 5 16:51 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME LamportFastMutEx-PT-3-ReachabilityCardinality-00
FORMULA_NAME LamportFastMutEx-PT-3-ReachabilityCardinality-01
FORMULA_NAME LamportFastMutEx-PT-3-ReachabilityCardinality-02
FORMULA_NAME LamportFastMutEx-PT-3-ReachabilityCardinality-03
FORMULA_NAME LamportFastMutEx-PT-3-ReachabilityCardinality-04
FORMULA_NAME LamportFastMutEx-PT-3-ReachabilityCardinality-05
FORMULA_NAME LamportFastMutEx-PT-3-ReachabilityCardinality-06
FORMULA_NAME LamportFastMutEx-PT-3-ReachabilityCardinality-07
FORMULA_NAME LamportFastMutEx-PT-3-ReachabilityCardinality-08
FORMULA_NAME LamportFastMutEx-PT-3-ReachabilityCardinality-09
FORMULA_NAME LamportFastMutEx-PT-3-ReachabilityCardinality-10
FORMULA_NAME LamportFastMutEx-PT-3-ReachabilityCardinality-11
FORMULA_NAME LamportFastMutEx-PT-3-ReachabilityCardinality-12
FORMULA_NAME LamportFastMutEx-PT-3-ReachabilityCardinality-13
FORMULA_NAME LamportFastMutEx-PT-3-ReachabilityCardinality-14
FORMULA_NAME LamportFastMutEx-PT-3-ReachabilityCardinality-15

=== Now, execution of the tool begins

BK_START 1620881463748

Running Version 0
[2021-05-13 04:51:05] [INFO ] Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, ReachabilityCardinality, -spotpath, /home/mcc/BenchKit/bin//..//ltlfilt, -z3path, /home/mcc/BenchKit/bin//..//z3/bin/z3, -yices2path, /home/mcc/BenchKit/bin//..//yices/bin/yices, -its, -ltsmin, -greatspnpath, /home/mcc/BenchKit/bin//..//greatspn/, -order, META, -manyOrder, -smt, -timeout, 3600]
[2021-05-13 04:51:05] [INFO ] Parsing pnml file : /home/mcc/execution/model.pnml
[2021-05-13 04:51:05] [INFO ] Load time of PNML (sax parser for PT used): 48 ms
[2021-05-13 04:51:05] [INFO ] Transformed 100 places.
[2021-05-13 04:51:05] [INFO ] Transformed 156 transitions.
[2021-05-13 04:51:05] [INFO ] Found NUPN structural information;
[2021-05-13 04:51:05] [INFO ] Completing missing partition info from NUPN : creating a component with [P_start_1_0, P_start_1_1, P_start_1_2, P_start_1_3, P_b_0_false, P_b_0_true, P_b_1_false, P_b_1_true, P_b_2_false, P_b_2_true, P_b_3_false, P_b_3_true, P_setx_3_0, P_setx_3_1, P_setx_3_2, P_setx_3_3, P_setbi_5_0, P_setbi_5_1, P_setbi_5_2, P_setbi_5_3, P_ify0_4_0, P_ify0_4_1, P_ify0_4_2, P_ify0_4_3, P_sety_9_0, P_sety_9_1, P_sety_9_2, P_sety_9_3, P_ifxi_10_0, P_ifxi_10_1, P_ifxi_10_2, P_ifxi_10_3, P_setbi_11_0, P_setbi_11_1, P_setbi_11_2, P_setbi_11_3, P_fordo_12_0, P_fordo_12_1, P_fordo_12_2, P_fordo_12_3, P_wait_0_0, P_wait_0_1, P_wait_0_2, P_wait_0_3, P_wait_1_0, P_wait_1_1, P_wait_1_2, P_wait_1_3, P_wait_2_0, P_wait_2_1, P_wait_2_2, P_wait_2_3, P_wait_3_0, P_wait_3_1, P_wait_3_2, P_wait_3_3, P_await_13_0, P_await_13_1, P_await_13_2, P_await_13_3, P_done_0_0, P_done_0_1, P_done_0_2, P_done_0_3, P_done_1_0, P_done_1_1, P_done_1_2, P_done_1_3, P_done_2_0, P_done_2_1, P_done_2_2, P_done_2_3, P_done_3_0, P_done_3_1, P_done_3_2, P_done_3_3, P_ifyi_15_0, P_ifyi_15_1, P_ifyi_15_2, P_ifyi_15_3, P_awaity_0, P_awaity_1, P_awaity_2, P_awaity_3, P_CS_21_0, P_CS_21_1, P_CS_21_2, P_CS_21_3, P_setbi_24_0, P_setbi_24_1, P_setbi_24_2, P_setbi_24_3]
[2021-05-13 04:51:05] [INFO ] Parsed PT model containing 100 places and 156 transitions in 90 ms.
Parsed 16 properties from file /home/mcc/execution/ReachabilityCardinality.xml in 9 ms.
Working with output stream class java.io.PrintStream
Deduced a syphon composed of 29 places in 1 ms
Reduce places removed 29 places and 42 transitions.
FORMULA LamportFastMutEx-PT-3-ReachabilityCardinality-04 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA LamportFastMutEx-PT-3-ReachabilityCardinality-07 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA LamportFastMutEx-PT-3-ReachabilityCardinality-08 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA LamportFastMutEx-PT-3-ReachabilityCardinality-09 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA LamportFastMutEx-PT-3-ReachabilityCardinality-10 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA LamportFastMutEx-PT-3-ReachabilityCardinality-11 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA LamportFastMutEx-PT-3-ReachabilityCardinality-13 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA LamportFastMutEx-PT-3-ReachabilityCardinality-14 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA LamportFastMutEx-PT-3-ReachabilityCardinality-15 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
Incomplete random walk after 10000 steps, including 2 resets, run finished after 64 ms. (steps per millisecond=156 ) properties (out of 7) seen :2
FORMULA LamportFastMutEx-PT-3-ReachabilityCardinality-05 FALSE TECHNIQUES TOPOLOGICAL RANDOM_WALK
FORMULA LamportFastMutEx-PT-3-ReachabilityCardinality-03 TRUE TECHNIQUES TOPOLOGICAL RANDOM_WALK
Incomplete Best-First random walk after 10000 steps, including 2 resets, run finished after 22 ms. (steps per millisecond=454 ) properties (out of 5) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 25 ms. (steps per millisecond=400 ) properties (out of 5) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 18 ms. (steps per millisecond=555 ) properties (out of 5) seen :0
Incomplete Best-First random walk after 10000 steps, including 2 resets, run finished after 21 ms. (steps per millisecond=476 ) properties (out of 5) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 19 ms. (steps per millisecond=526 ) properties (out of 5) seen :0
Running SMT prover for 5 properties.
[2021-05-13 04:51:05] [INFO ] Flow matrix only has 96 transitions (discarded 18 similar events)
// Phase 1: matrix 96 rows 71 cols
[2021-05-13 04:51:05] [INFO ] Computed 17 place invariants in 12 ms
[2021-05-13 04:51:05] [INFO ] [Real]Absence check using 17 positive place invariants in 6 ms returned sat
[2021-05-13 04:51:05] [INFO ] [Real]Adding state equation constraints to refine reachable states.
[2021-05-13 04:51:05] [INFO ] [Real]Absence check using state equation in 37 ms returned sat
[2021-05-13 04:51:05] [INFO ] State equation strengthened by 33 read => feed constraints.
[2021-05-13 04:51:05] [INFO ] [Real]Added 33 Read/Feed constraints in 7 ms returned sat
[2021-05-13 04:51:05] [INFO ] Solution in real domain found non-integer solution.
[2021-05-13 04:51:05] [INFO ] [Nat]Absence check using 17 positive place invariants in 5 ms returned sat
[2021-05-13 04:51:05] [INFO ] [Nat]Adding state equation constraints to refine reachable states.
[2021-05-13 04:51:05] [INFO ] [Nat]Absence check using state equation in 27 ms returned sat
[2021-05-13 04:51:05] [INFO ] [Nat]Added 33 Read/Feed constraints in 5 ms returned sat
[2021-05-13 04:51:06] [INFO ] Deduced a trap composed of 22 places in 74 ms of which 2 ms to minimize.
[2021-05-13 04:51:06] [INFO ] Deduced a trap composed of 22 places in 37 ms of which 1 ms to minimize.
[2021-05-13 04:51:06] [INFO ] Deduced a trap composed of 18 places in 22 ms of which 0 ms to minimize.
[2021-05-13 04:51:06] [INFO ] Trap strengthening (SAT) tested/added 4/3 trap constraints in 169 ms
[2021-05-13 04:51:06] [INFO ] Computed and/alt/rep : 93/306/87 causal constraints (skipped 6 transitions) in 8 ms.
[2021-05-13 04:51:06] [INFO ] Added : 74 causal constraints over 15 iterations in 136 ms. Result :sat
Attempting to minimize the solution found.
Minimization took 2 ms.
[2021-05-13 04:51:06] [INFO ] [Real]Absence check using 17 positive place invariants in 4 ms returned sat
[2021-05-13 04:51:06] [INFO ] [Real]Adding state equation constraints to refine reachable states.
[2021-05-13 04:51:06] [INFO ] [Real]Absence check using state equation in 20 ms returned sat
[2021-05-13 04:51:06] [INFO ] [Real]Added 33 Read/Feed constraints in 3 ms returned sat
[2021-05-13 04:51:06] [INFO ] Solution in real domain found non-integer solution.
[2021-05-13 04:51:06] [INFO ] [Nat]Absence check using 17 positive place invariants in 4 ms returned sat
[2021-05-13 04:51:06] [INFO ] [Nat]Adding state equation constraints to refine reachable states.
[2021-05-13 04:51:06] [INFO ] [Nat]Absence check using state equation in 21 ms returned sat
[2021-05-13 04:51:06] [INFO ] [Nat]Added 33 Read/Feed constraints in 4 ms returned sat
[2021-05-13 04:51:06] [INFO ] Deduced a trap composed of 18 places in 20 ms of which 0 ms to minimize.
[2021-05-13 04:51:06] [INFO ] Deduced a trap composed of 12 places in 17 ms of which 0 ms to minimize.
[2021-05-13 04:51:06] [INFO ] Deduced a trap composed of 15 places in 16 ms of which 0 ms to minimize.
[2021-05-13 04:51:06] [INFO ] Deduced a trap composed of 17 places in 15 ms of which 1 ms to minimize.
[2021-05-13 04:51:06] [INFO ] Deduced a trap composed of 14 places in 17 ms of which 0 ms to minimize.
[2021-05-13 04:51:06] [INFO ] Deduced a trap composed of 5 places in 11 ms of which 0 ms to minimize.
[2021-05-13 04:51:06] [INFO ] Trap strengthening procedure managed to obtain unsat after adding 6 trap constraints in 119 ms
[2021-05-13 04:51:06] [INFO ] [Real]Absence check using 17 positive place invariants in 3 ms returned sat
[2021-05-13 04:51:06] [INFO ] [Real]Adding state equation constraints to refine reachable states.
[2021-05-13 04:51:06] [INFO ] [Real]Absence check using state equation in 19 ms returned sat
[2021-05-13 04:51:06] [INFO ] [Real]Added 33 Read/Feed constraints in 3 ms returned sat
[2021-05-13 04:51:06] [INFO ] Solution in real domain found non-integer solution.
[2021-05-13 04:51:06] [INFO ] [Nat]Absence check using 17 positive place invariants in 4 ms returned sat
[2021-05-13 04:51:06] [INFO ] [Nat]Adding state equation constraints to refine reachable states.
[2021-05-13 04:51:06] [INFO ] [Nat]Absence check using state equation in 18 ms returned sat
[2021-05-13 04:51:06] [INFO ] [Nat]Added 33 Read/Feed constraints in 2 ms returned sat
[2021-05-13 04:51:06] [INFO ] Deduced a trap composed of 18 places in 18 ms of which 0 ms to minimize.
[2021-05-13 04:51:06] [INFO ] Deduced a trap composed of 12 places in 14 ms of which 0 ms to minimize.
[2021-05-13 04:51:06] [INFO ] Deduced a trap composed of 15 places in 15 ms of which 0 ms to minimize.
[2021-05-13 04:51:06] [INFO ] Deduced a trap composed of 17 places in 14 ms of which 1 ms to minimize.
[2021-05-13 04:51:06] [INFO ] Deduced a trap composed of 14 places in 13 ms of which 1 ms to minimize.
[2021-05-13 04:51:06] [INFO ] Deduced a trap composed of 5 places in 12 ms of which 0 ms to minimize.
[2021-05-13 04:51:06] [INFO ] Trap strengthening procedure managed to obtain unsat after adding 6 trap constraints in 109 ms
[2021-05-13 04:51:06] [INFO ] [Real]Absence check using 17 positive place invariants in 3 ms returned sat
[2021-05-13 04:51:06] [INFO ] [Real]Adding state equation constraints to refine reachable states.
[2021-05-13 04:51:06] [INFO ] [Real]Absence check using state equation in 18 ms returned sat
[2021-05-13 04:51:06] [INFO ] Solution in real domain found non-integer solution.
FORMULA LamportFastMutEx-PT-3-ReachabilityCardinality-12 TRUE TECHNIQUES STRUCTURAL_REDUCTION TOPOLOGICAL SAT_SMT
FORMULA LamportFastMutEx-PT-3-ReachabilityCardinality-06 TRUE TECHNIQUES STRUCTURAL_REDUCTION TOPOLOGICAL SAT_SMT
FORMULA LamportFastMutEx-PT-3-ReachabilityCardinality-02 FALSE TECHNIQUES STRUCTURAL_REDUCTION TOPOLOGICAL SAT_SMT
FORMULA LamportFastMutEx-PT-3-ReachabilityCardinality-01 TRUE TECHNIQUES STRUCTURAL_REDUCTION TOPOLOGICAL SAT_SMT
Fused 5 Parikh solutions to 1 different solutions.
Incomplete Parikh walk after 17300 steps, including 565 resets, run finished after 66 ms. (steps per millisecond=262 ) properties (out of 1) seen :0 could not realise parikh vector
Support contains 3 out of 71 places. Attempting structural reductions.
Starting structural reductions, iteration 0 : 71/71 places, 114/114 transitions.
Performed 3 Post agglomeration using F-continuation condition.Transition count delta: 3
Deduced a syphon composed of 3 places in 0 ms
Reduce places removed 3 places and 0 transitions.
Iterating global reduction 0 with 6 rules applied. Total rules applied 6 place count 68 transition count 111
Free-agglomeration rule (complex) applied 3 times.
Iterating global reduction 0 with 3 rules applied. Total rules applied 9 place count 68 transition count 108
Reduce places removed 3 places and 0 transitions.
Iterating post reduction 0 with 3 rules applied. Total rules applied 12 place count 65 transition count 108
Applied a total of 12 rules in 21 ms. Remains 65 /71 variables (removed 6) and now considering 108/114 (removed 6) transitions.
Finished structural reductions, in 1 iterations. Remains : 65/71 places, 108/114 transitions.
[2021-05-13 04:51:07] [INFO ] Flatten gal took : 39 ms
[2021-05-13 04:51:07] [INFO ] Flatten gal took : 15 ms
[2021-05-13 04:51:07] [INFO ] Time to serialize gal into /tmp/ReachabilityCardinality17369879393522166006.gal : 8 ms
[2021-05-13 04:51:07] [INFO ] Time to serialize properties into /tmp/ReachabilityCardinality11374632264013601361.prop : 0 ms
Invoking ITS tools like this :CommandLine [args=[/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.202104292328/bin/its-reach-linux64, --gc-threshold, 2000000, --quiet, -i, /tmp/ReachabilityCardinality17369879393522166006.gal, -t, CGAL, -reachable-file, /tmp/ReachabilityCardinality11374632264013601361.prop, --nowitness, --gen-order, FOLLOW], workingDir=/home/mcc/execution]

its-reach command run as :

/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.202104292328/bin/its-reach-linux64 --gc-threshold 2000000 --quiet -i /tmp/ReachabilityCardinality17369879393522166006.gal -t CGAL -reachable-file /tmp/ReachabilityCardinality11374632264013601361.prop --nowitness --gen-order FOLLOW
Loading property file /tmp/ReachabilityCardinality11374632264013601361.prop.
SDD proceeding with computation,1 properties remain. new max is 4
SDD size :1 after 2
SDD proceeding with computation,1 properties remain. new max is 8
SDD size :2 after 8
SDD proceeding with computation,1 properties remain. new max is 16
SDD size :8 after 12
SDD proceeding with computation,1 properties remain. new max is 32
SDD size :12 after 18
SDD proceeding with computation,1 properties remain. new max is 64
SDD size :18 after 53
SDD proceeding with computation,1 properties remain. new max is 128
SDD size :53 after 141
SDD proceeding with computation,1 properties remain. new max is 256
SDD size :141 after 261
SDD proceeding with computation,1 properties remain. new max is 512
SDD size :872 after 1664
SDD proceeding with computation,1 properties remain. new max is 1024
SDD size :1664 after 4801
SDD proceeding with computation,1 properties remain. new max is 2048
SDD size :8906 after 14298
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
petri\_inst\_inst,15512,0.195857,10552,2,2035,17,19033,7,0,371,28217,0
Total reachable state count : 15512

Verifying 1 reachability properties.
Reachability property LamportFastMutEx-PT-3-ReachabilityCardinality-00 does not hold.
FORMULA LamportFastMutEx-PT-3-ReachabilityCardinality-00 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING
No reachable states exhibit your property : LamportFastMutEx-PT-3-ReachabilityCardinality-00

Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
LamportFastMutEx-PT-3-ReachabilityCardinality-00,0,0.196897,10552,1,0,17,19033,7,0,376,28217,0
All properties solved without resorting to model-checking.

BK_STOP 1620881468219

--------------------
content from stderr:

+ export BINDIR=/home/mcc/BenchKit/bin//../
+ BINDIR=/home/mcc/BenchKit/bin//../
++ pwd
+ export MODEL=/home/mcc/execution
+ MODEL=/home/mcc/execution
+ [[ ReachabilityCardinality = StateSpace ]]
+ /home/mcc/BenchKit/bin//..//runeclipse.sh /home/mcc/execution ReachabilityCardinality -its -ltsmin -greatspnpath /home/mcc/BenchKit/bin//..//greatspn/ -order META -manyOrder -smt -timeout 3600
+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
++ cut -d . -f 9
++ ls /home/mcc/BenchKit/bin//..//itstools/plugins/fr.lip6.move.gal.application.pnmcc_1.0.0.202104292328.jar
+ VERSION=0
+ echo 'Running Version 0'
+ /home/mcc/BenchKit/bin//..//itstools/its-tools -data /home/mcc/execution/workspace -pnfolder /home/mcc/execution -examination ReachabilityCardinality -spotpath /home/mcc/BenchKit/bin//..//ltlfilt -z3path /home/mcc/BenchKit/bin//..//z3/bin/z3 -yices2path /home/mcc/BenchKit/bin//..//yices/bin/yices -its -ltsmin -greatspnpath /home/mcc/BenchKit/bin//..//greatspn/ -order META -manyOrder -smt -timeout 3600 -vmargs -Dosgi.locking=none -Declipse.stateSaveDelayInterval=-1 -Dosgi.configuration.area=/tmp/.eclipse -Xss128m -Xms40m -Xmx16000m

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="LamportFastMutEx-PT-3"
export BK_EXAMINATION="ReachabilityCardinality"
export BK_TOOL="itstools"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-4028"
echo " Executing tool itstools"
echo " Input is LamportFastMutEx-PT-3, examination is ReachabilityCardinality"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r121-tall-162075407300654"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/LamportFastMutEx-PT-3.tgz
mv LamportFastMutEx-PT-3 execution
cd execution
if [ "ReachabilityCardinality" = "ReachabilityDeadlock" ] || [ "ReachabilityCardinality" = "UpperBounds" ] || [ "ReachabilityCardinality" = "QuasiLiveness" ] || [ "ReachabilityCardinality" = "StableMarking" ] || [ "ReachabilityCardinality" = "Liveness" ] || [ "ReachabilityCardinality" = "OneSafe" ] || [ "ReachabilityCardinality" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "ReachabilityCardinality" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "ReachabilityCardinality" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "ReachabilityCardinality.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property ReachabilityCardinality.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "ReachabilityCardinality.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' ReachabilityCardinality.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ "ReachabilityCardinality" = "ReachabilityDeadlock" ] || [ "ReachabilityCardinality" = "QuasiLiveness" ] || [ "ReachabilityCardinality" = "StableMarking" ] || [ "ReachabilityCardinality" = "Liveness" ] || [ "ReachabilityCardinality" = "OneSafe" ] ; then
echo "FORMULA_NAME ReachabilityCardinality"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;