About the Execution of LoLA for GlobalResAllocation-PT-05
Execution Summary | |||||
Max Memory Used (MB) |
Time wait (ms) | CPU Usage (ms) | I/O Wait (ms) | Computed Result | Execution Status |
16246.432 | 1894412.00 | 6851764.00 | 4257.60 | ????F??T?F???T?? | normal |
Execution Chart
We display below the execution chart for this examination (boot time has been removed).
Trace from the execution
Formatting '/data/fkordon/mcc2021-input.r118-tall-162075402500065.qcow2', fmt=qcow2 size=4294967296 backing_file='/data/fkordon/mcc2021-input.qcow2' encryption=off cluster_size=65536 lazy_refcounts=off
Waiting for the VM to be ready (probing ssh)
...............................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................
=====================================================================
Generated by BenchKit 2-4028
Executing tool lola
Input is GlobalResAllocation-PT-05, examination is CTLCardinality
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r118-tall-162075402500065
=====================================================================
--------------------
preparation of the directory to be used:
/home/mcc/execution
total 408M
-rw-r--r-- 1 mcc users 91K May 5 16:58 CTLCardinality.txt
-rw-r--r-- 1 mcc users 399K May 10 09:43 CTLCardinality.xml
-rw-r--r-- 1 mcc users 61M May 5 16:58 CTLFireability.txt
-rw-r--r-- 1 mcc users 253M May 10 09:43 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K May 6 14:48 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.3K May 6 14:48 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 17K Mar 28 16:13 LTLCardinality.txt
-rw-r--r-- 1 mcc users 63K Mar 28 16:13 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.7M Mar 28 16:13 LTLFireability.txt
-rw-r--r-- 1 mcc users 8.7M Mar 28 16:13 LTLFireability.xml
-rw-r--r-- 1 mcc users 9.2K Mar 23 11:26 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 33K Mar 23 11:26 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 3.3M Mar 22 20:59 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 10M Mar 22 20:59 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 5.3K Mar 22 09:15 UpperBounds.txt
-rw-r--r-- 1 mcc users 11K Mar 22 09:15 UpperBounds.xml
-rw-r--r-- 1 mcc users 5 May 5 16:51 equiv_col
-rw-r--r-- 1 mcc users 3 May 5 16:51 instance
-rw-r--r-- 1 mcc users 6 May 5 16:51 iscolored
-rw-r--r-- 1 mcc users 70M May 5 16:51 model.pnml
--------------------
content from stdout:
=== Data for post analysis generated by BenchKit (invocation template)
The expected result is a vector of booleans
BOOL_VECTOR
here is the order used to build the result vector(from text file)
FORMULA_NAME GlobalResAllocation-PT-05-CTLCardinality-00
FORMULA_NAME GlobalResAllocation-PT-05-CTLCardinality-01
FORMULA_NAME GlobalResAllocation-PT-05-CTLCardinality-02
FORMULA_NAME GlobalResAllocation-PT-05-CTLCardinality-03
FORMULA_NAME GlobalResAllocation-PT-05-CTLCardinality-04
FORMULA_NAME GlobalResAllocation-PT-05-CTLCardinality-05
FORMULA_NAME GlobalResAllocation-PT-05-CTLCardinality-06
FORMULA_NAME GlobalResAllocation-PT-05-CTLCardinality-07
FORMULA_NAME GlobalResAllocation-PT-05-CTLCardinality-08
FORMULA_NAME GlobalResAllocation-PT-05-CTLCardinality-09
FORMULA_NAME GlobalResAllocation-PT-05-CTLCardinality-10
FORMULA_NAME GlobalResAllocation-PT-05-CTLCardinality-11
FORMULA_NAME GlobalResAllocation-PT-05-CTLCardinality-12
FORMULA_NAME GlobalResAllocation-PT-05-CTLCardinality-13
FORMULA_NAME GlobalResAllocation-PT-05-CTLCardinality-14
FORMULA_NAME GlobalResAllocation-PT-05-CTLCardinality-15
=== Now, execution of the tool begins
BK_START 1620773707695
starting LoLA
BK_INPUT GlobalResAllocation-PT-05
BK_EXAMINATION: CTLCardinality
bin directory: /home/mcc/BenchKit/bin
current directory: /home/mcc/execution
FORMULA GlobalResAllocation-PT-05-CTLCardinality-04 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA GlobalResAllocation-PT-05-CTLCardinality-07 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA GlobalResAllocation-PT-05-CTLCardinality-09 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA GlobalResAllocation-PT-05-CTLCardinality-13 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
BK_STOP 1620775602107
--------------------
content from stderr:
lola: MEM LIMIT 32
lola: MEM LIMIT 5
lola: NET
lola: input: PNML file (--pnmlnet)
lola: reading net from /home/mcc/execution/model.pnml
lola: reading pnml
lola: PNML file contains place/transition net
lola: finished parsing
lola: closed net file /home/mcc/execution/model.pnml
lola: Reading formula.
lola: Using XML format (--xmlformula)
lola: reading XML formula
lola: reading formula from /home/mcc/execution/CTLCardinality.xml
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:98
lola: rewrite Frontend/Parser/formula_rewrite.k:114
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:340
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:340
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:98
lola: rewrite Frontend/Parser/formula_rewrite.k:159
lola: rewrite Frontend/Parser/formula_rewrite.k:150
lola: rewrite Frontend/Parser/formula_rewrite.k:114
lola: rewrite Frontend/Parser/formula_rewrite.k:388
lola: rewrite Frontend/Parser/formula_rewrite.k:475
lola: rewrite Frontend/Parser/formula_rewrite.k:478
lola: rewrite Frontend/Parser/formula_rewrite.k:98
lola: rewrite Frontend/Parser/formula_rewrite.k:165
lola: rewrite Frontend/Parser/formula_rewrite.k:147
lola: rewrite Frontend/Parser/formula_rewrite.k:278
lola: rewrite Frontend/Parser/formula_rewrite.k:116
lola: rewrite Frontend/Parser/formula_rewrite.k:132
lola: rewrite Frontend/Parser/formula_rewrite.k:179
lola: rewrite Frontend/Parser/formula_rewrite.k:147
lola: rewrite Frontend/Parser/formula_rewrite.k:138
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:96
lola: rewrite Frontend/Parser/formula_rewrite.k:98
lola: rewrite Frontend/Parser/formula_rewrite.k:165
lola: rewrite Frontend/Parser/formula_rewrite.k:147
lola: rewrite Frontend/Parser/formula_rewrite.k:168
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:451
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:388
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:547
lola: rewrite Frontend/Parser/formula_rewrite.k:472
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:544
lola: rewrite Frontend/Parser/formula_rewrite.k:457
lola: rewrite Frontend/Parser/formula_rewrite.k:544
lola: rewrite Frontend/Parser/formula_rewrite.k:397
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:400
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:340
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: Created skeleton in 4.000000 secs.
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
GlobalResAllocation-PT-05-CTLCardinality-00: CTL 0 0 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-01: CTL 0 0 0 0 0 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-02: CTL 0 0 0 0 0 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-03: EF 0 0 0 0 0 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-04: INITIAL 0 0 0 0 0 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-05: CTL 0 0 0 0 0 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-06: CTL 0 0 0 0 0 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-07: CTL 0 0 0 0 0 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-08: CTL 0 0 0 0 0 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-09: CTL 0 0 0 0 0 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-10: CTL 0 0 0 0 0 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-11: CTL 0 0 0 0 0 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-12: CTL 0 0 0 0 0 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-13: CONJ 0 0 0 0 0 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-14: CTL 0 0 0 0 0 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-15: CTL 0 0 0 0 0 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
Time elapsed: 113 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 16
lola: Created skeleton in 3.000000 secs.
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
GlobalResAllocation-PT-05-CTLCardinality-00: CTL 0 0 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-01: CTL 0 0 0 0 0 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-02: CTL 0 0 0 0 0 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-03: EF 0 0 0 0 0 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-04: INITIAL 0 0 0 0 0 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-05: CTL 0 0 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-06: CTL 0 0 0 0 0 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-07: CTL 0 0 0 0 0 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-08: CTL 0 0 0 0 0 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-09: CTL 0 0 0 0 0 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-10: CTL 0 0 0 0 0 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-11: CTL 0 0 0 0 0 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-12: CTL 0 0 0 0 0 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-13: CONJ 0 0 0 0 0 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-14: CTL 0 0 0 0 0 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-15: CTL 0 0 0 0 0 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
Time elapsed: 118 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 16
lola: Created skeleton in 4.000000 secs.
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
GlobalResAllocation-PT-05-CTLCardinality-00: CTL 0 0 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-01: CTL 0 0 0 0 0 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-02: CTL 0 0 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-03: EF 0 0 0 0 0 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-04: INITIAL 0 0 0 0 0 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-05: CTL 0 0 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-06: CTL 0 0 0 0 0 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-07: CTL 0 0 0 0 0 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-08: CTL 0 0 0 0 0 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-09: CTL 0 0 0 0 0 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-10: CTL 0 0 0 0 0 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-11: CTL 0 0 0 0 0 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-12: CTL 0 0 0 0 0 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-13: CONJ 0 0 0 0 0 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-14: CTL 0 0 0 0 0 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-15: CTL 0 0 0 0 0 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
Time elapsed: 123 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 16
lola: Created skeleton in 4.000000 secs.
lola: Rule S: 0 transitions removed,0 places removed
lola: Created skeleton in 4.000000 secs.
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
GlobalResAllocation-PT-05-CTLCardinality-00: CTL 0 0 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-01: CTL 0 0 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-02: CTL 0 0 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-03: EF 0 0 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-04: INITIAL 0 0 0 0 0 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-05: CTL 0 0 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-06: CTL 0 0 0 0 0 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-07: CTL 0 0 0 0 0 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-08: CTL 0 0 0 0 0 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-09: CTL 0 0 0 0 0 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-10: CTL 0 0 0 0 0 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-11: CTL 0 0 0 0 0 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-12: CTL 0 0 0 0 0 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-13: CONJ 0 0 0 0 0 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-14: CTL 0 0 0 0 0 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-15: CTL 0 0 0 0 0 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
Time elapsed: 128 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 16
lola: Created skeleton in 5.000000 secs.
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
GlobalResAllocation-PT-05-CTLCardinality-00: CTL 0 0 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-01: CTL 0 0 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-02: CTL 0 0 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-03: EF 0 0 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-04: INITIAL 0 0 0 0 0 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-05: CTL 0 0 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-06: CTL 0 0 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-07: CTL 0 0 0 0 0 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-08: CTL 0 0 0 0 0 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-09: CTL 0 0 0 0 0 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-10: CTL 0 0 0 0 0 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-11: CTL 0 0 0 0 0 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-12: CTL 0 0 0 0 0 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-13: CONJ 0 0 0 0 0 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-14: CTL 0 0 0 0 0 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-15: CTL 0 0 0 0 0 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
Time elapsed: 133 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 16
lola: Created skeleton in 3.000000 secs.
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
GlobalResAllocation-PT-05-CTLCardinality-00: CTL 0 0 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-01: CTL 0 0 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-02: CTL 0 0 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-03: EF 0 0 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-04: INITIAL 0 0 0 0 0 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-05: CTL 0 0 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-06: CTL 0 0 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-07: CTL 0 0 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-08: CTL 0 0 0 0 0 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-09: CTL 0 0 0 0 0 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-10: CTL 0 0 0 0 0 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-11: CTL 0 0 0 0 0 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-12: CTL 0 0 0 0 0 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-13: CONJ 0 0 0 0 0 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-14: CTL 0 0 0 0 0 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-15: CTL 0 0 0 0 0 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
Time elapsed: 138 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 16
lola: Created skeleton in 4.000000 secs.
lola: LAUNCH INITIAL
lola: LAUNCH task # 13 (type CNST) for 12 GlobalResAllocation-PT-05-CTLCardinality-04
lola: time limit : 0 sec
lola: memory limit: 0 pages
lola: FINISHED task # 13 (type CNST) for GlobalResAllocation-PT-05-CTLCardinality-04
lola: result : false
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
GlobalResAllocation-PT-05-CTLCardinality-04: INITIAL false preprocessing
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
GlobalResAllocation-PT-05-CTLCardinality-00: CTL 0 0 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-01: CTL 0 0 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-02: CTL 0 0 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-03: EF 0 0 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-05: CTL 0 0 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-06: CTL 0 0 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-07: CTL 0 0 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-08: CTL 0 0 0 0 0 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-09: CTL 0 0 0 0 0 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-10: CTL 0 0 0 0 0 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-11: CTL 0 0 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-12: CTL 0 0 0 0 0 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-13: CONJ 0 0 0 0 0 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-14: CTL 0 0 0 0 0 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-15: CTL 0 0 0 0 0 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
Time elapsed: 143 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 16
lola: Created skeleton in 7.000000 secs.
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
GlobalResAllocation-PT-05-CTLCardinality-04: INITIAL false preprocessing
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
GlobalResAllocation-PT-05-CTLCardinality-00: CTL 0 0 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-01: CTL 0 0 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-02: CTL 0 0 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-03: EF 0 0 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-05: CTL 0 0 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-06: CTL 0 0 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-07: CTL 0 0 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-08: CTL 0 0 0 0 0 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-09: CTL 0 0 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-10: CTL 0 0 0 0 0 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-11: CTL 0 0 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-12: CTL 0 0 0 0 0 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-13: CONJ 0 0 0 0 0 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-14: CTL 0 0 0 0 0 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-15: CTL 0 0 0 0 0 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
Time elapsed: 148 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 16
lola: Created skeleton in 4.000000 secs.
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
GlobalResAllocation-PT-05-CTLCardinality-04: INITIAL false preprocessing
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
GlobalResAllocation-PT-05-CTLCardinality-00: CTL 0 0 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-01: CTL 0 0 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-02: CTL 0 0 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-03: EF 0 0 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-05: CTL 0 0 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-06: CTL 0 0 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-07: CTL 0 0 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-08: CTL 0 0 0 0 0 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-09: CTL 0 0 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-10: CTL 0 0 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-11: CTL 0 0 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-12: CTL 0 0 0 0 0 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-13: CONJ 0 0 0 0 0 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-14: CTL 0 0 0 0 0 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-15: CTL 0 0 0 0 0 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
Time elapsed: 153 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 16
lola: Created skeleton in 3.000000 secs.
lola: Created skeleton in 4.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: LAUNCH task # 22 (type EXCL) for 21 GlobalResAllocation-PT-05-CTLCardinality-07
lola: time limit : 143 sec
lola: memory limit: 32 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: FINISHED task # 22 (type EXCL) for GlobalResAllocation-PT-05-CTLCardinality-07
lola: result : true
lola: markings : 13
lola: fired transitions : 14
lola: time used : 1.000000
lola: memory pages used : 1
lola: LAUNCH task # 28 (type EXCL) for 27 GlobalResAllocation-PT-05-CTLCardinality-09
lola: time limit : 149 sec
lola: memory limit: 32 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:812
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
GlobalResAllocation-PT-05-CTLCardinality-04: INITIAL false preprocessing
GlobalResAllocation-PT-05-CTLCardinality-07: CTL true CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
GlobalResAllocation-PT-05-CTLCardinality-00: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-01: CTL 0 0 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-02: CTL 0 0 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-03: EF 0 0 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-06: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-08: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-09: CTL 0 0 1 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-10: CTL 0 0 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-11: CTL 0 0 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-12: CTL 0 0 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-13: CONJ 0 0 0 0 0 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-14: CTL 0 1 0 0 0 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-15: CTL 0 1 0 0 0 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
28 CTL EXCL 0/149 1/32 GlobalResAllocation-PT-05-CTLCardinality-09 44 m, 8 m/sec, 85 t fired, .
Time elapsed: 158 secs. Pages in use: 1
# running tasks: 1 of 4 Visible: 16
lola: FINISHED task # 28 (type EXCL) for GlobalResAllocation-PT-05-CTLCardinality-09
lola: result : false
lola: markings : 44
lola: fired transitions : 85
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 58 (type EXCL) for 57 GlobalResAllocation-PT-05-CTLCardinality-15
lola: time limit : 156 sec
lola: memory limit: 32 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:714
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: LAUNCH task # 60 (type FNDP) for 39 GlobalResAllocation-PT-05-CTLCardinality-13
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 61 (type EQUN) for 39 GlobalResAllocation-PT-05-CTLCardinality-13
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 63 (type SRCH) for 39 GlobalResAllocation-PT-05-CTLCardinality-13
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: FINISHED task # 60 (type FNDP) for GlobalResAllocation-PT-05-CTLCardinality-13
lola: result : true
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
lola: CANCELED task # 61 (type EQUN) for GlobalResAllocation-PT-05-CTLCardinality-13 (obsolete)
lola: CANCELED task # 63 (type SRCH) for GlobalResAllocation-PT-05-CTLCardinality-13 (obsolete)
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: LAUNCH task # 64 (type FNDP) for 9 GlobalResAllocation-PT-05-CTLCardinality-03
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 65 (type EQUN) for 9 GlobalResAllocation-PT-05-CTLCardinality-03
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 67 (type SRCH) for 9 GlobalResAllocation-PT-05-CTLCardinality-03
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: FINISHED task # 67 (type SRCH) for GlobalResAllocation-PT-05-CTLCardinality-03
lola: result : unknown
lola: time used : 0.000000
lola: memory pages used : 1
sara: try reading problem file /home/mcc/execution/CTLCardinality-65.sara.
sara: try reading problem file /home/mcc/execution/CTLCardinality-61.sara.
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
GlobalResAllocation-PT-05-CTLCardinality-04: INITIAL false preprocessing
GlobalResAllocation-PT-05-CTLCardinality-07: CTL true CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-09: CTL false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
GlobalResAllocation-PT-05-CTLCardinality-00: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-01: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-02: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-03: EF 0 1 2 0 2 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-06: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-08: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-10: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-11: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-12: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-13: CONJ 0 1 0 0 1 0 0 5
GlobalResAllocation-PT-05-CTLCardinality-14: CTL 0 1 0 0 0 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-15: CTL 0 0 1 0 0 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
58 CTL EXCL 5/215 1/32 GlobalResAllocation-PT-05-CTLCardinality-15 952 m, 190 m/sec, 2091 t fired, .
64 EF FNDP 4/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 11223 t fired, 1 attempts, .
65 EF STEQ 4/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 sara is running.
Time elapsed: 163 secs. Pages in use: 2
# running tasks: 3 of 4 Visible: 16
sara: place or transition ordering is non-deterministic
sara: place or transition ordering is non-deterministic
lola: Created skeleton in 5.000000 secs.
lola: FINISHED task # 61 (type EQUN) for GlobalResAllocation-PT-05-CTLCardinality-13
lola: result : true
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
GlobalResAllocation-PT-05-CTLCardinality-04: INITIAL false preprocessing
GlobalResAllocation-PT-05-CTLCardinality-07: CTL true CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-09: CTL false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
GlobalResAllocation-PT-05-CTLCardinality-00: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-01: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-02: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-03: EF 0 1 2 0 2 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-06: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-08: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-10: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-11: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-12: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-13: CONJ 0 1 0 0 3 0 0 4
GlobalResAllocation-PT-05-CTLCardinality-14: CTL 0 1 0 0 0 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-15: CTL 0 0 1 0 0 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
58 CTL EXCL 10/229 1/32 GlobalResAllocation-PT-05-CTLCardinality-15 2470 m, 303 m/sec, 5148 t fired, .
64 EF FNDP 9/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 25991 t fired, 1 attempts, .
65 EF STEQ 9/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 sara is running.
Time elapsed: 168 secs. Pages in use: 2
# running tasks: 3 of 4 Visible: 16
lola: Created skeleton in 5.000000 secs.
lola: Created skeleton in 4.000000 secs.
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
GlobalResAllocation-PT-05-CTLCardinality-04: INITIAL false preprocessing
GlobalResAllocation-PT-05-CTLCardinality-07: CTL true CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-09: CTL false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
GlobalResAllocation-PT-05-CTLCardinality-00: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-01: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-02: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-03: EF 0 1 2 0 2 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-06: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-08: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-10: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-11: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-12: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-13: CONJ 0 1 0 0 4 0 0 4
GlobalResAllocation-PT-05-CTLCardinality-14: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-15: CTL 0 0 1 0 0 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
58 CTL EXCL 15/245 1/32 GlobalResAllocation-PT-05-CTLCardinality-15 4409 m, 387 m/sec, 9155 t fired, .
64 EF FNDP 14/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 42409 t fired, 1 attempts, .
65 EF STEQ 14/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 sara is running.
Time elapsed: 173 secs. Pages in use: 2
# running tasks: 3 of 4 Visible: 16
lola: Created skeleton in 3.000000 secs.
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
GlobalResAllocation-PT-05-CTLCardinality-04: INITIAL false preprocessing
GlobalResAllocation-PT-05-CTLCardinality-07: CTL true CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-09: CTL false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
GlobalResAllocation-PT-05-CTLCardinality-00: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-01: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-02: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-03: EF 0 1 2 0 2 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-06: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-08: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-10: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-11: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-12: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-13: CONJ 0 1 0 0 5 0 0 4
GlobalResAllocation-PT-05-CTLCardinality-14: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-15: CTL 0 0 1 0 0 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
58 CTL EXCL 20/245 1/32 GlobalResAllocation-PT-05-CTLCardinality-15 6114 m, 341 m/sec, 12406 t fired, .
64 EF FNDP 19/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 58616 t fired, 1 attempts, .
65 EF STEQ 19/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 sara is running.
Time elapsed: 178 secs. Pages in use: 2
# running tasks: 3 of 4 Visible: 16
lola: Created skeleton in 4.000000 secs.
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
GlobalResAllocation-PT-05-CTLCardinality-04: INITIAL false preprocessing
GlobalResAllocation-PT-05-CTLCardinality-07: CTL true CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-09: CTL false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
GlobalResAllocation-PT-05-CTLCardinality-00: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-01: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-02: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-03: EF 0 1 2 0 2 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-06: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-08: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-10: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-11: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-12: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-13: CONJ 0 1 0 0 6 0 0 4
GlobalResAllocation-PT-05-CTLCardinality-14: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-15: CTL 0 0 1 0 0 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
58 CTL EXCL 25/245 1/32 GlobalResAllocation-PT-05-CTLCardinality-15 8369 m, 451 m/sec, 17012 t fired, .
64 EF FNDP 24/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 74937 t fired, 1 attempts, .
65 EF STEQ 24/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 sara is running.
Time elapsed: 183 secs. Pages in use: 2
# running tasks: 3 of 4 Visible: 16
lola: Created skeleton in 4.000000 secs.
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
GlobalResAllocation-PT-05-CTLCardinality-04: INITIAL false preprocessing
GlobalResAllocation-PT-05-CTLCardinality-07: CTL true CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-09: CTL false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
GlobalResAllocation-PT-05-CTLCardinality-00: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-01: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-02: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-03: EF 0 1 2 0 2 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-06: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-08: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-10: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-11: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-12: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-13: CONJ 0 1 0 0 6 0 0 4
GlobalResAllocation-PT-05-CTLCardinality-14: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-15: CTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
58 CTL EXCL 30/264 1/32 GlobalResAllocation-PT-05-CTLCardinality-15 10237 m, 373 m/sec, 21049 t fired, .
64 EF FNDP 29/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 91587 t fired, 1 attempts, .
65 EF STEQ 29/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 sara is running.
Time elapsed: 188 secs. Pages in use: 2
# running tasks: 3 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
GlobalResAllocation-PT-05-CTLCardinality-04: INITIAL false preprocessing
GlobalResAllocation-PT-05-CTLCardinality-07: CTL true CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-09: CTL false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
GlobalResAllocation-PT-05-CTLCardinality-00: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-01: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-02: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-03: EF 0 1 2 0 2 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-06: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-08: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-10: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-11: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-12: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-13: CONJ 0 1 0 0 6 0 0 4
GlobalResAllocation-PT-05-CTLCardinality-14: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-15: CTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
58 CTL EXCL 35/264 1/32 GlobalResAllocation-PT-05-CTLCardinality-15 12440 m, 440 m/sec, 25986 t fired, .
64 EF FNDP 34/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 108172 t fired, 1 attempts, .
65 EF STEQ 34/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 sara is running.
Time elapsed: 193 secs. Pages in use: 2
# running tasks: 3 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
GlobalResAllocation-PT-05-CTLCardinality-04: INITIAL false preprocessing
GlobalResAllocation-PT-05-CTLCardinality-07: CTL true CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-09: CTL false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
GlobalResAllocation-PT-05-CTLCardinality-00: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-01: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-02: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-03: EF 0 1 2 0 2 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-06: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-08: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-10: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-11: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-12: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-13: CONJ 0 1 0 0 6 0 0 4
GlobalResAllocation-PT-05-CTLCardinality-14: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-15: CTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
58 CTL EXCL 40/264 1/32 GlobalResAllocation-PT-05-CTLCardinality-15 14590 m, 430 m/sec, 30786 t fired, .
64 EF FNDP 39/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 124599 t fired, 1 attempts, .
65 EF STEQ 39/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 sara is running.
Time elapsed: 198 secs. Pages in use: 2
# running tasks: 3 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
GlobalResAllocation-PT-05-CTLCardinality-04: INITIAL false preprocessing
GlobalResAllocation-PT-05-CTLCardinality-07: CTL true CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-09: CTL false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
GlobalResAllocation-PT-05-CTLCardinality-00: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-01: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-02: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-03: EF 0 1 2 0 2 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-06: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-08: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-10: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-11: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-12: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-13: CONJ 0 1 0 0 6 0 0 4
GlobalResAllocation-PT-05-CTLCardinality-14: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-15: CTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
58 CTL EXCL 45/264 1/32 GlobalResAllocation-PT-05-CTLCardinality-15 16783 m, 438 m/sec, 35805 t fired, .
64 EF FNDP 44/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 141057 t fired, 1 attempts, .
65 EF STEQ 44/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 sara is running.
Time elapsed: 203 secs. Pages in use: 2
# running tasks: 3 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
GlobalResAllocation-PT-05-CTLCardinality-04: INITIAL false preprocessing
GlobalResAllocation-PT-05-CTLCardinality-07: CTL true CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-09: CTL false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
GlobalResAllocation-PT-05-CTLCardinality-00: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-01: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-02: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-03: EF 0 1 2 0 2 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-06: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-08: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-10: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-11: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-12: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-13: CONJ 0 1 0 0 6 0 0 4
GlobalResAllocation-PT-05-CTLCardinality-14: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-15: CTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
58 CTL EXCL 50/264 1/32 GlobalResAllocation-PT-05-CTLCardinality-15 18898 m, 423 m/sec, 40829 t fired, .
64 EF FNDP 49/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 157629 t fired, 1 attempts, .
65 EF STEQ 49/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 sara is running.
Time elapsed: 208 secs. Pages in use: 2
# running tasks: 3 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
GlobalResAllocation-PT-05-CTLCardinality-04: INITIAL false preprocessing
GlobalResAllocation-PT-05-CTLCardinality-07: CTL true CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-09: CTL false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
GlobalResAllocation-PT-05-CTLCardinality-00: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-01: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-02: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-03: EF 0 1 2 0 2 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-06: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-08: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-10: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-11: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-12: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-13: CONJ 0 1 0 0 6 0 0 4
GlobalResAllocation-PT-05-CTLCardinality-14: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-15: CTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
58 CTL EXCL 55/264 1/32 GlobalResAllocation-PT-05-CTLCardinality-15 20690 m, 358 m/sec, 44438 t fired, .
64 EF FNDP 54/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 174077 t fired, 1 attempts, .
65 EF STEQ 54/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 sara is running.
Time elapsed: 213 secs. Pages in use: 2
# running tasks: 3 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
GlobalResAllocation-PT-05-CTLCardinality-04: INITIAL false preprocessing
GlobalResAllocation-PT-05-CTLCardinality-07: CTL true CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-09: CTL false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
GlobalResAllocation-PT-05-CTLCardinality-00: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-01: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-02: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-03: EF 0 1 2 0 2 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-06: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-08: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-10: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-11: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-12: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-13: CONJ 0 1 0 0 6 0 0 4
GlobalResAllocation-PT-05-CTLCardinality-14: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-15: CTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
58 CTL EXCL 60/264 1/32 GlobalResAllocation-PT-05-CTLCardinality-15 23126 m, 487 m/sec, 49798 t fired, .
64 EF FNDP 59/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 190494 t fired, 1 attempts, .
65 EF STEQ 59/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 sara is running.
Time elapsed: 218 secs. Pages in use: 2
# running tasks: 3 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
GlobalResAllocation-PT-05-CTLCardinality-04: INITIAL false preprocessing
GlobalResAllocation-PT-05-CTLCardinality-07: CTL true CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-09: CTL false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
GlobalResAllocation-PT-05-CTLCardinality-00: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-01: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-02: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-03: EF 0 1 2 0 2 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-06: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-08: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-10: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-11: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-12: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-13: CONJ 0 1 0 0 6 0 0 4
GlobalResAllocation-PT-05-CTLCardinality-14: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-15: CTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
58 CTL EXCL 65/264 1/32 GlobalResAllocation-PT-05-CTLCardinality-15 25665 m, 507 m/sec, 55469 t fired, .
64 EF FNDP 64/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 206921 t fired, 1 attempts, .
65 EF STEQ 64/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 sara is running.
Time elapsed: 223 secs. Pages in use: 2
# running tasks: 3 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
GlobalResAllocation-PT-05-CTLCardinality-04: INITIAL false preprocessing
GlobalResAllocation-PT-05-CTLCardinality-07: CTL true CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-09: CTL false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
GlobalResAllocation-PT-05-CTLCardinality-00: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-01: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-02: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-03: EF 0 1 2 0 2 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-06: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-08: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-10: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-11: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-12: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-13: CONJ 0 1 0 0 6 0 0 4
GlobalResAllocation-PT-05-CTLCardinality-14: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-15: CTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
58 CTL EXCL 70/264 1/32 GlobalResAllocation-PT-05-CTLCardinality-15 27911 m, 449 m/sec, 60514 t fired, .
64 EF FNDP 69/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 223379 t fired, 1 attempts, .
65 EF STEQ 69/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 sara is running.
Time elapsed: 228 secs. Pages in use: 2
# running tasks: 3 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
GlobalResAllocation-PT-05-CTLCardinality-04: INITIAL false preprocessing
GlobalResAllocation-PT-05-CTLCardinality-07: CTL true CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-09: CTL false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
GlobalResAllocation-PT-05-CTLCardinality-00: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-01: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-02: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-03: EF 0 1 2 0 2 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-06: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-08: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-10: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-11: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-12: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-13: CONJ 0 1 0 0 6 0 0 4
GlobalResAllocation-PT-05-CTLCardinality-14: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-15: CTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
58 CTL EXCL 75/264 1/32 GlobalResAllocation-PT-05-CTLCardinality-15 30509 m, 519 m/sec, 66388 t fired, .
64 EF FNDP 74/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 239607 t fired, 1 attempts, .
65 EF STEQ 74/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 sara is running.
Time elapsed: 233 secs. Pages in use: 2
# running tasks: 3 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
GlobalResAllocation-PT-05-CTLCardinality-04: INITIAL false preprocessing
GlobalResAllocation-PT-05-CTLCardinality-07: CTL true CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-09: CTL false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
GlobalResAllocation-PT-05-CTLCardinality-00: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-01: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-02: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-03: EF 0 1 2 0 2 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-06: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-08: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-10: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-11: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-12: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-13: CONJ 0 1 0 0 6 0 0 4
GlobalResAllocation-PT-05-CTLCardinality-14: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-15: CTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
58 CTL EXCL 80/264 1/32 GlobalResAllocation-PT-05-CTLCardinality-15 32720 m, 442 m/sec, 71282 t fired, .
64 EF FNDP 79/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 256050 t fired, 1 attempts, .
65 EF STEQ 79/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 sara is running.
Time elapsed: 238 secs. Pages in use: 2
# running tasks: 3 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
GlobalResAllocation-PT-05-CTLCardinality-04: INITIAL false preprocessing
GlobalResAllocation-PT-05-CTLCardinality-07: CTL true CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-09: CTL false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
GlobalResAllocation-PT-05-CTLCardinality-00: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-01: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-02: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-03: EF 0 1 2 0 2 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-06: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-08: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-10: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-11: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-12: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-13: CONJ 0 1 0 0 6 0 0 4
GlobalResAllocation-PT-05-CTLCardinality-14: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-15: CTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
58 CTL EXCL 85/264 1/32 GlobalResAllocation-PT-05-CTLCardinality-15 35814 m, 618 m/sec, 77844 t fired, .
64 EF FNDP 84/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 272565 t fired, 1 attempts, .
65 EF STEQ 84/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 sara is running.
Time elapsed: 243 secs. Pages in use: 2
# running tasks: 3 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
GlobalResAllocation-PT-05-CTLCardinality-04: INITIAL false preprocessing
GlobalResAllocation-PT-05-CTLCardinality-07: CTL true CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-09: CTL false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
GlobalResAllocation-PT-05-CTLCardinality-00: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-01: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-02: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-03: EF 0 1 2 0 2 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-06: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-08: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-10: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-11: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-12: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-13: CONJ 0 1 0 0 6 0 0 4
GlobalResAllocation-PT-05-CTLCardinality-14: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-15: CTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
58 CTL EXCL 90/264 1/32 GlobalResAllocation-PT-05-CTLCardinality-15 38969 m, 631 m/sec, 84404 t fired, .
64 EF FNDP 89/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 288897 t fired, 1 attempts, .
65 EF STEQ 89/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 sara is running.
Time elapsed: 248 secs. Pages in use: 2
# running tasks: 3 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
GlobalResAllocation-PT-05-CTLCardinality-04: INITIAL false preprocessing
GlobalResAllocation-PT-05-CTLCardinality-07: CTL true CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-09: CTL false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
GlobalResAllocation-PT-05-CTLCardinality-00: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-01: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-02: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-03: EF 0 1 2 0 2 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-06: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-08: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-10: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-11: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-12: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-13: CONJ 0 1 0 0 6 0 0 4
GlobalResAllocation-PT-05-CTLCardinality-14: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-15: CTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
58 CTL EXCL 95/264 1/32 GlobalResAllocation-PT-05-CTLCardinality-15 41721 m, 550 m/sec, 90443 t fired, .
64 EF FNDP 94/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 305442 t fired, 1 attempts, .
65 EF STEQ 94/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 sara is running.
Time elapsed: 253 secs. Pages in use: 2
# running tasks: 3 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
GlobalResAllocation-PT-05-CTLCardinality-04: INITIAL false preprocessing
GlobalResAllocation-PT-05-CTLCardinality-07: CTL true CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-09: CTL false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
GlobalResAllocation-PT-05-CTLCardinality-00: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-01: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-02: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-03: EF 0 1 2 0 2 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-06: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-08: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-10: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-11: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-12: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-13: CONJ 0 1 0 0 6 0 0 4
GlobalResAllocation-PT-05-CTLCardinality-14: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-15: CTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
58 CTL EXCL 100/264 1/32 GlobalResAllocation-PT-05-CTLCardinality-15 44193 m, 494 m/sec, 96115 t fired, .
64 EF FNDP 99/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 321857 t fired, 1 attempts, .
65 EF STEQ 99/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 sara is running.
Time elapsed: 258 secs. Pages in use: 2
# running tasks: 3 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
GlobalResAllocation-PT-05-CTLCardinality-04: INITIAL false preprocessing
GlobalResAllocation-PT-05-CTLCardinality-07: CTL true CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-09: CTL false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
GlobalResAllocation-PT-05-CTLCardinality-00: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-01: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-02: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-03: EF 0 1 2 0 2 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-06: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-08: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-10: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-11: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-12: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-13: CONJ 0 1 0 0 6 0 0 4
GlobalResAllocation-PT-05-CTLCardinality-14: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-15: CTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
58 CTL EXCL 105/264 1/32 GlobalResAllocation-PT-05-CTLCardinality-15 46723 m, 506 m/sec, 101754 t fired, .
64 EF FNDP 104/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 338247 t fired, 1 attempts, .
65 EF STEQ 104/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 sara is running.
Time elapsed: 263 secs. Pages in use: 2
# running tasks: 3 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
GlobalResAllocation-PT-05-CTLCardinality-04: INITIAL false preprocessing
GlobalResAllocation-PT-05-CTLCardinality-07: CTL true CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-09: CTL false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
GlobalResAllocation-PT-05-CTLCardinality-00: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-01: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-02: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-03: EF 0 1 2 0 2 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-06: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-08: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-10: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-11: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-12: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-13: CONJ 0 1 0 0 6 0 0 4
GlobalResAllocation-PT-05-CTLCardinality-14: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-15: CTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
58 CTL EXCL 110/264 1/32 GlobalResAllocation-PT-05-CTLCardinality-15 48656 m, 386 m/sec, 106190 t fired, .
64 EF FNDP 109/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 354586 t fired, 1 attempts, .
65 EF STEQ 109/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 sara is running.
Time elapsed: 268 secs. Pages in use: 2
# running tasks: 3 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
GlobalResAllocation-PT-05-CTLCardinality-04: INITIAL false preprocessing
GlobalResAllocation-PT-05-CTLCardinality-07: CTL true CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-09: CTL false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
GlobalResAllocation-PT-05-CTLCardinality-00: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-01: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-02: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-03: EF 0 1 2 0 2 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-06: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-08: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-10: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-11: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-12: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-13: CONJ 0 1 0 0 6 0 0 4
GlobalResAllocation-PT-05-CTLCardinality-14: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-15: CTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
58 CTL EXCL 115/264 1/32 GlobalResAllocation-PT-05-CTLCardinality-15 51132 m, 495 m/sec, 111678 t fired, .
64 EF FNDP 114/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 370936 t fired, 1 attempts, .
65 EF STEQ 114/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 sara is running.
Time elapsed: 273 secs. Pages in use: 2
# running tasks: 3 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
GlobalResAllocation-PT-05-CTLCardinality-04: INITIAL false preprocessing
GlobalResAllocation-PT-05-CTLCardinality-07: CTL true CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-09: CTL false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
GlobalResAllocation-PT-05-CTLCardinality-00: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-01: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-02: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-03: EF 0 1 2 0 2 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-06: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-08: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-10: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-11: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-12: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-13: CONJ 0 1 0 0 6 0 0 4
GlobalResAllocation-PT-05-CTLCardinality-14: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-15: CTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
58 CTL EXCL 120/264 1/32 GlobalResAllocation-PT-05-CTLCardinality-15 53797 m, 533 m/sec, 117302 t fired, .
64 EF FNDP 119/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 387162 t fired, 1 attempts, .
65 EF STEQ 119/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 sara is running.
Time elapsed: 278 secs. Pages in use: 2
# running tasks: 3 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
GlobalResAllocation-PT-05-CTLCardinality-04: INITIAL false preprocessing
GlobalResAllocation-PT-05-CTLCardinality-07: CTL true CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-09: CTL false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
GlobalResAllocation-PT-05-CTLCardinality-00: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-01: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-02: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-03: EF 0 1 2 0 2 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-06: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-08: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-10: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-11: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-12: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-13: CONJ 0 1 0 0 6 0 0 4
GlobalResAllocation-PT-05-CTLCardinality-14: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-15: CTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
58 CTL EXCL 125/264 1/32 GlobalResAllocation-PT-05-CTLCardinality-15 56459 m, 532 m/sec, 123118 t fired, .
64 EF FNDP 124/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 403529 t fired, 1 attempts, .
65 EF STEQ 124/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 sara is running.
Time elapsed: 283 secs. Pages in use: 2
# running tasks: 3 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
GlobalResAllocation-PT-05-CTLCardinality-04: INITIAL false preprocessing
GlobalResAllocation-PT-05-CTLCardinality-07: CTL true CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-09: CTL false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
GlobalResAllocation-PT-05-CTLCardinality-00: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-01: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-02: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-03: EF 0 1 2 0 2 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-06: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-08: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-10: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-11: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-12: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-13: CONJ 0 1 0 0 6 0 0 4
GlobalResAllocation-PT-05-CTLCardinality-14: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-15: CTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
58 CTL EXCL 130/264 1/32 GlobalResAllocation-PT-05-CTLCardinality-15 59413 m, 590 m/sec, 129765 t fired, .
64 EF FNDP 129/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 419874 t fired, 1 attempts, .
65 EF STEQ 129/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 sara is running.
Time elapsed: 288 secs. Pages in use: 2
# running tasks: 3 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
GlobalResAllocation-PT-05-CTLCardinality-04: INITIAL false preprocessing
GlobalResAllocation-PT-05-CTLCardinality-07: CTL true CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-09: CTL false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
GlobalResAllocation-PT-05-CTLCardinality-00: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-01: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-02: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-03: EF 0 1 2 0 2 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-06: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-08: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-10: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-11: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-12: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-13: CONJ 0 1 0 0 6 0 0 4
GlobalResAllocation-PT-05-CTLCardinality-14: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-15: CTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
58 CTL EXCL 135/264 1/32 GlobalResAllocation-PT-05-CTLCardinality-15 61879 m, 493 m/sec, 135241 t fired, .
64 EF FNDP 134/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 436231 t fired, 1 attempts, .
65 EF STEQ 134/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 sara is running.
Time elapsed: 293 secs. Pages in use: 2
# running tasks: 3 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
GlobalResAllocation-PT-05-CTLCardinality-04: INITIAL false preprocessing
GlobalResAllocation-PT-05-CTLCardinality-07: CTL true CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-09: CTL false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
GlobalResAllocation-PT-05-CTLCardinality-00: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-01: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-02: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-03: EF 0 1 2 0 2 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-06: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-08: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-10: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-11: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-12: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-13: CONJ 0 1 0 0 6 0 0 4
GlobalResAllocation-PT-05-CTLCardinality-14: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-15: CTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
58 CTL EXCL 140/264 1/32 GlobalResAllocation-PT-05-CTLCardinality-15 65029 m, 630 m/sec, 142421 t fired, .
64 EF FNDP 139/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 452450 t fired, 1 attempts, .
65 EF STEQ 139/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 sara is running.
Time elapsed: 298 secs. Pages in use: 2
# running tasks: 3 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
GlobalResAllocation-PT-05-CTLCardinality-04: INITIAL false preprocessing
GlobalResAllocation-PT-05-CTLCardinality-07: CTL true CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-09: CTL false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
GlobalResAllocation-PT-05-CTLCardinality-00: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-01: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-02: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-03: EF 0 1 2 0 2 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-06: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-08: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-10: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-11: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-12: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-13: CONJ 0 1 0 0 6 0 0 4
GlobalResAllocation-PT-05-CTLCardinality-14: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-15: CTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
58 CTL EXCL 145/264 1/32 GlobalResAllocation-PT-05-CTLCardinality-15 68229 m, 640 m/sec, 149589 t fired, .
64 EF FNDP 144/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 468683 t fired, 1 attempts, .
65 EF STEQ 144/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 sara is running.
Time elapsed: 303 secs. Pages in use: 2
# running tasks: 3 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
GlobalResAllocation-PT-05-CTLCardinality-04: INITIAL false preprocessing
GlobalResAllocation-PT-05-CTLCardinality-07: CTL true CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-09: CTL false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
GlobalResAllocation-PT-05-CTLCardinality-00: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-01: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-02: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-03: EF 0 1 2 0 2 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-06: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-08: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-10: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-11: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-12: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-13: CONJ 0 1 0 0 6 0 0 4
GlobalResAllocation-PT-05-CTLCardinality-14: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-15: CTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
58 CTL EXCL 150/264 1/32 GlobalResAllocation-PT-05-CTLCardinality-15 70985 m, 551 m/sec, 156521 t fired, .
64 EF FNDP 149/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 484943 t fired, 1 attempts, .
65 EF STEQ 149/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 sara is running.
Time elapsed: 308 secs. Pages in use: 2
# running tasks: 3 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
GlobalResAllocation-PT-05-CTLCardinality-04: INITIAL false preprocessing
GlobalResAllocation-PT-05-CTLCardinality-07: CTL true CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-09: CTL false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
GlobalResAllocation-PT-05-CTLCardinality-00: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-01: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-02: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-03: EF 0 1 2 0 2 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-06: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-08: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-10: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-11: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-12: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-13: CONJ 0 1 0 0 6 0 0 4
GlobalResAllocation-PT-05-CTLCardinality-14: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-15: CTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
58 CTL EXCL 155/264 1/32 GlobalResAllocation-PT-05-CTLCardinality-15 73443 m, 491 m/sec, 161716 t fired, .
64 EF FNDP 154/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 501249 t fired, 1 attempts, .
65 EF STEQ 154/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 sara is running.
Time elapsed: 313 secs. Pages in use: 2
# running tasks: 3 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
GlobalResAllocation-PT-05-CTLCardinality-04: INITIAL false preprocessing
GlobalResAllocation-PT-05-CTLCardinality-07: CTL true CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-09: CTL false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
GlobalResAllocation-PT-05-CTLCardinality-00: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-01: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-02: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-03: EF 0 1 2 0 2 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-06: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-08: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-10: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-11: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-12: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-13: CONJ 0 1 0 0 6 0 0 4
GlobalResAllocation-PT-05-CTLCardinality-14: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-15: CTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
58 CTL EXCL 160/264 1/32 GlobalResAllocation-PT-05-CTLCardinality-15 76385 m, 588 m/sec, 168076 t fired, .
64 EF FNDP 159/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 517600 t fired, 1 attempts, .
65 EF STEQ 159/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 sara is running.
Time elapsed: 318 secs. Pages in use: 2
# running tasks: 3 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
GlobalResAllocation-PT-05-CTLCardinality-04: INITIAL false preprocessing
GlobalResAllocation-PT-05-CTLCardinality-07: CTL true CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-09: CTL false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
GlobalResAllocation-PT-05-CTLCardinality-00: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-01: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-02: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-03: EF 0 1 2 0 2 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-06: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-08: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-10: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-11: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-12: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-13: CONJ 0 1 0 0 6 0 0 4
GlobalResAllocation-PT-05-CTLCardinality-14: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-15: CTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
58 CTL EXCL 165/264 1/32 GlobalResAllocation-PT-05-CTLCardinality-15 79124 m, 547 m/sec, 174726 t fired, .
64 EF FNDP 164/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 533890 t fired, 1 attempts, .
65 EF STEQ 164/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 sara is running.
Time elapsed: 323 secs. Pages in use: 2
# running tasks: 3 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
GlobalResAllocation-PT-05-CTLCardinality-04: INITIAL false preprocessing
GlobalResAllocation-PT-05-CTLCardinality-07: CTL true CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-09: CTL false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
GlobalResAllocation-PT-05-CTLCardinality-00: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-01: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-02: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-03: EF 0 1 2 0 2 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-06: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-08: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-10: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-11: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-12: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-13: CONJ 0 1 0 0 6 0 0 4
GlobalResAllocation-PT-05-CTLCardinality-14: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-15: CTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
58 CTL EXCL 170/264 1/32 GlobalResAllocation-PT-05-CTLCardinality-15 81435 m, 462 m/sec, 180101 t fired, .
64 EF FNDP 169/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 550070 t fired, 1 attempts, .
65 EF STEQ 169/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 sara is running.
Time elapsed: 328 secs. Pages in use: 2
# running tasks: 3 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
GlobalResAllocation-PT-05-CTLCardinality-04: INITIAL false preprocessing
GlobalResAllocation-PT-05-CTLCardinality-07: CTL true CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-09: CTL false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
GlobalResAllocation-PT-05-CTLCardinality-00: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-01: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-02: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-03: EF 0 1 2 0 2 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-06: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-08: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-10: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-11: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-12: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-13: CONJ 0 1 0 0 6 0 0 4
GlobalResAllocation-PT-05-CTLCardinality-14: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-15: CTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
58 CTL EXCL 175/264 1/32 GlobalResAllocation-PT-05-CTLCardinality-15 84692 m, 651 m/sec, 188016 t fired, .
64 EF FNDP 174/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 566259 t fired, 1 attempts, .
65 EF STEQ 174/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 sara is running.
Time elapsed: 333 secs. Pages in use: 2
# running tasks: 3 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
GlobalResAllocation-PT-05-CTLCardinality-04: INITIAL false preprocessing
GlobalResAllocation-PT-05-CTLCardinality-07: CTL true CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-09: CTL false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
GlobalResAllocation-PT-05-CTLCardinality-00: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-01: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-02: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-03: EF 0 1 2 0 2 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-06: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-08: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-10: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-11: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-12: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-13: CONJ 0 1 0 0 6 0 0 4
GlobalResAllocation-PT-05-CTLCardinality-14: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-15: CTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
58 CTL EXCL 180/264 1/32 GlobalResAllocation-PT-05-CTLCardinality-15 88184 m, 698 m/sec, 196051 t fired, .
64 EF FNDP 179/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 582422 t fired, 1 attempts, .
65 EF STEQ 179/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 sara is running.
Time elapsed: 338 secs. Pages in use: 2
# running tasks: 3 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
GlobalResAllocation-PT-05-CTLCardinality-04: INITIAL false preprocessing
GlobalResAllocation-PT-05-CTLCardinality-07: CTL true CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-09: CTL false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
GlobalResAllocation-PT-05-CTLCardinality-00: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-01: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-02: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-03: EF 0 1 2 0 2 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-06: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-08: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-10: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-11: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-12: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-13: CONJ 0 1 0 0 6 0 0 4
GlobalResAllocation-PT-05-CTLCardinality-14: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-15: CTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
58 CTL EXCL 185/264 1/32 GlobalResAllocation-PT-05-CTLCardinality-15 89973 m, 357 m/sec, 199866 t fired, .
64 EF FNDP 184/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 598642 t fired, 1 attempts, .
65 EF STEQ 184/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 sara is running.
Time elapsed: 343 secs. Pages in use: 2
# running tasks: 3 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
GlobalResAllocation-PT-05-CTLCardinality-04: INITIAL false preprocessing
GlobalResAllocation-PT-05-CTLCardinality-07: CTL true CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-09: CTL false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
GlobalResAllocation-PT-05-CTLCardinality-00: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-01: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-02: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-03: EF 0 1 2 0 2 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-06: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-08: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-10: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-11: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-12: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-13: CONJ 0 1 0 0 6 0 0 4
GlobalResAllocation-PT-05-CTLCardinality-14: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-15: CTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
58 CTL EXCL 190/264 1/32 GlobalResAllocation-PT-05-CTLCardinality-15 92537 m, 512 m/sec, 205283 t fired, .
64 EF FNDP 189/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 614915 t fired, 1 attempts, .
65 EF STEQ 189/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 sara is running.
Time elapsed: 348 secs. Pages in use: 2
# running tasks: 3 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
GlobalResAllocation-PT-05-CTLCardinality-04: INITIAL false preprocessing
GlobalResAllocation-PT-05-CTLCardinality-07: CTL true CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-09: CTL false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
GlobalResAllocation-PT-05-CTLCardinality-00: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-01: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-02: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-03: EF 0 1 2 0 2 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-06: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-08: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-10: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-11: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-12: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-13: CONJ 0 1 0 0 6 0 0 4
GlobalResAllocation-PT-05-CTLCardinality-14: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-15: CTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
58 CTL EXCL 195/264 1/32 GlobalResAllocation-PT-05-CTLCardinality-15 95972 m, 687 m/sec, 212776 t fired, .
64 EF FNDP 194/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 631179 t fired, 1 attempts, .
65 EF STEQ 194/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 sara is running.
Time elapsed: 353 secs. Pages in use: 2
# running tasks: 3 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
GlobalResAllocation-PT-05-CTLCardinality-04: INITIAL false preprocessing
GlobalResAllocation-PT-05-CTLCardinality-07: CTL true CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-09: CTL false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
GlobalResAllocation-PT-05-CTLCardinality-00: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-01: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-02: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-03: EF 0 1 2 0 2 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-06: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-08: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-10: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-11: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-12: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-13: CONJ 0 1 0 0 6 0 0 4
GlobalResAllocation-PT-05-CTLCardinality-14: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-15: CTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
58 CTL EXCL 200/264 1/32 GlobalResAllocation-PT-05-CTLCardinality-15 99120 m, 629 m/sec, 219817 t fired, .
64 EF FNDP 199/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 647403 t fired, 1 attempts, .
65 EF STEQ 199/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 sara is running.
Time elapsed: 358 secs. Pages in use: 2
# running tasks: 3 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
GlobalResAllocation-PT-05-CTLCardinality-04: INITIAL false preprocessing
GlobalResAllocation-PT-05-CTLCardinality-07: CTL true CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-09: CTL false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
GlobalResAllocation-PT-05-CTLCardinality-00: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-01: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-02: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-03: EF 0 1 2 0 2 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-06: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-08: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-10: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-11: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-12: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-13: CONJ 0 1 0 0 6 0 0 4
GlobalResAllocation-PT-05-CTLCardinality-14: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-15: CTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
58 CTL EXCL 205/264 1/32 GlobalResAllocation-PT-05-CTLCardinality-15 101583 m, 492 m/sec, 225254 t fired, .
64 EF FNDP 204/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 663631 t fired, 1 attempts, .
65 EF STEQ 204/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 sara is running.
Time elapsed: 363 secs. Pages in use: 2
# running tasks: 3 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
GlobalResAllocation-PT-05-CTLCardinality-04: INITIAL false preprocessing
GlobalResAllocation-PT-05-CTLCardinality-07: CTL true CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-09: CTL false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
GlobalResAllocation-PT-05-CTLCardinality-00: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-01: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-02: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-03: EF 0 1 2 0 2 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-06: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-08: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-10: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-11: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-12: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-13: CONJ 0 1 0 0 6 0 0 4
GlobalResAllocation-PT-05-CTLCardinality-14: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-15: CTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
58 CTL EXCL 210/264 1/32 GlobalResAllocation-PT-05-CTLCardinality-15 104789 m, 641 m/sec, 232836 t fired, .
64 EF FNDP 209/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 679902 t fired, 1 attempts, .
65 EF STEQ 209/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 sara is running.
Time elapsed: 368 secs. Pages in use: 2
# running tasks: 3 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
GlobalResAllocation-PT-05-CTLCardinality-04: INITIAL false preprocessing
GlobalResAllocation-PT-05-CTLCardinality-07: CTL true CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-09: CTL false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
GlobalResAllocation-PT-05-CTLCardinality-00: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-01: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-02: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-03: EF 0 1 2 0 2 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-06: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-08: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-10: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-11: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-12: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-13: CONJ 0 1 0 0 6 0 0 4
GlobalResAllocation-PT-05-CTLCardinality-14: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-15: CTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
58 CTL EXCL 215/264 1/32 GlobalResAllocation-PT-05-CTLCardinality-15 108204 m, 683 m/sec, 240742 t fired, .
64 EF FNDP 214/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 696017 t fired, 1 attempts, .
65 EF STEQ 214/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 sara is running.
Time elapsed: 373 secs. Pages in use: 2
# running tasks: 3 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
GlobalResAllocation-PT-05-CTLCardinality-04: INITIAL false preprocessing
GlobalResAllocation-PT-05-CTLCardinality-07: CTL true CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-09: CTL false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
GlobalResAllocation-PT-05-CTLCardinality-00: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-01: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-02: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-03: EF 0 1 2 0 2 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-06: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-08: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-10: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-11: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-12: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-13: CONJ 0 1 0 0 6 0 0 4
GlobalResAllocation-PT-05-CTLCardinality-14: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-15: CTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
58 CTL EXCL 220/264 1/32 GlobalResAllocation-PT-05-CTLCardinality-15 111368 m, 632 m/sec, 247868 t fired, .
64 EF FNDP 219/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 712179 t fired, 1 attempts, .
65 EF STEQ 219/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 sara is running.
Time elapsed: 378 secs. Pages in use: 2
# running tasks: 3 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
GlobalResAllocation-PT-05-CTLCardinality-04: INITIAL false preprocessing
GlobalResAllocation-PT-05-CTLCardinality-07: CTL true CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-09: CTL false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
GlobalResAllocation-PT-05-CTLCardinality-00: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-01: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-02: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-03: EF 0 1 2 0 2 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-06: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-08: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-10: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-11: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-12: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-13: CONJ 0 1 0 0 6 0 0 4
GlobalResAllocation-PT-05-CTLCardinality-14: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-15: CTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
58 CTL EXCL 225/264 1/32 GlobalResAllocation-PT-05-CTLCardinality-15 114671 m, 660 m/sec, 255087 t fired, .
64 EF FNDP 224/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 728374 t fired, 1 attempts, .
65 EF STEQ 224/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 sara is running.
Time elapsed: 383 secs. Pages in use: 2
# running tasks: 3 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
GlobalResAllocation-PT-05-CTLCardinality-04: INITIAL false preprocessing
GlobalResAllocation-PT-05-CTLCardinality-07: CTL true CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-09: CTL false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
GlobalResAllocation-PT-05-CTLCardinality-00: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-01: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-02: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-03: EF 0 1 2 0 2 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-06: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-08: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-10: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-11: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-12: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-13: CONJ 0 1 0 0 6 0 0 4
GlobalResAllocation-PT-05-CTLCardinality-14: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-15: CTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
58 CTL EXCL 230/264 1/32 GlobalResAllocation-PT-05-CTLCardinality-15 118275 m, 720 m/sec, 263159 t fired, .
64 EF FNDP 229/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 744354 t fired, 1 attempts, .
65 EF STEQ 229/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 sara is running.
Time elapsed: 388 secs. Pages in use: 2
# running tasks: 3 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
GlobalResAllocation-PT-05-CTLCardinality-04: INITIAL false preprocessing
GlobalResAllocation-PT-05-CTLCardinality-07: CTL true CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-09: CTL false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
GlobalResAllocation-PT-05-CTLCardinality-00: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-01: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-02: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-03: EF 0 1 2 0 2 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-06: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-08: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-10: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-11: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-12: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-13: CONJ 0 1 0 0 6 0 0 4
GlobalResAllocation-PT-05-CTLCardinality-14: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-15: CTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
58 CTL EXCL 235/264 1/32 GlobalResAllocation-PT-05-CTLCardinality-15 121024 m, 549 m/sec, 269394 t fired, .
64 EF FNDP 234/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 760520 t fired, 1 attempts, .
65 EF STEQ 234/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 sara is running.
Time elapsed: 393 secs. Pages in use: 2
# running tasks: 3 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
GlobalResAllocation-PT-05-CTLCardinality-04: INITIAL false preprocessing
GlobalResAllocation-PT-05-CTLCardinality-07: CTL true CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-09: CTL false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
GlobalResAllocation-PT-05-CTLCardinality-00: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-01: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-02: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-03: EF 0 1 2 0 2 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-06: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-08: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-10: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-11: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-12: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-13: CONJ 0 1 0 0 6 0 0 4
GlobalResAllocation-PT-05-CTLCardinality-14: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-15: CTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
58 CTL EXCL 240/264 1/32 GlobalResAllocation-PT-05-CTLCardinality-15 124260 m, 647 m/sec, 277705 t fired, .
64 EF FNDP 239/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 776550 t fired, 1 attempts, .
65 EF STEQ 239/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 sara is running.
Time elapsed: 398 secs. Pages in use: 2
# running tasks: 3 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
GlobalResAllocation-PT-05-CTLCardinality-04: INITIAL false preprocessing
GlobalResAllocation-PT-05-CTLCardinality-07: CTL true CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-09: CTL false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
GlobalResAllocation-PT-05-CTLCardinality-00: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-01: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-02: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-03: EF 0 1 2 0 2 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-06: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-08: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-10: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-11: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-12: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-13: CONJ 0 1 0 0 6 0 0 4
GlobalResAllocation-PT-05-CTLCardinality-14: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-15: CTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
58 CTL EXCL 245/264 1/32 GlobalResAllocation-PT-05-CTLCardinality-15 127322 m, 612 m/sec, 284904 t fired, .
64 EF FNDP 244/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 792665 t fired, 1 attempts, .
65 EF STEQ 244/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 sara is running.
Time elapsed: 403 secs. Pages in use: 2
# running tasks: 3 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
GlobalResAllocation-PT-05-CTLCardinality-04: INITIAL false preprocessing
GlobalResAllocation-PT-05-CTLCardinality-07: CTL true CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-09: CTL false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
GlobalResAllocation-PT-05-CTLCardinality-00: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-01: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-02: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-03: EF 0 1 2 0 2 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-06: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-08: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-10: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-11: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-12: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-13: CONJ 0 1 0 0 6 0 0 4
GlobalResAllocation-PT-05-CTLCardinality-14: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-15: CTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
58 CTL EXCL 250/264 1/32 GlobalResAllocation-PT-05-CTLCardinality-15 130311 m, 597 m/sec, 291129 t fired, .
64 EF FNDP 249/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 808846 t fired, 1 attempts, .
65 EF STEQ 249/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 sara is running.
Time elapsed: 408 secs. Pages in use: 2
# running tasks: 3 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
GlobalResAllocation-PT-05-CTLCardinality-04: INITIAL false preprocessing
GlobalResAllocation-PT-05-CTLCardinality-07: CTL true CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-09: CTL false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
GlobalResAllocation-PT-05-CTLCardinality-00: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-01: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-02: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-03: EF 0 1 2 0 2 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-06: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-08: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-10: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-11: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-12: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-13: CONJ 0 1 0 0 6 0 0 4
GlobalResAllocation-PT-05-CTLCardinality-14: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-15: CTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
58 CTL EXCL 255/264 1/32 GlobalResAllocation-PT-05-CTLCardinality-15 133193 m, 576 m/sec, 297724 t fired, .
64 EF FNDP 254/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 825076 t fired, 1 attempts, .
65 EF STEQ 254/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 sara is running.
Time elapsed: 413 secs. Pages in use: 2
# running tasks: 3 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
GlobalResAllocation-PT-05-CTLCardinality-04: INITIAL false preprocessing
GlobalResAllocation-PT-05-CTLCardinality-07: CTL true CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-09: CTL false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
GlobalResAllocation-PT-05-CTLCardinality-00: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-01: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-02: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-03: EF 0 1 2 0 2 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-06: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-08: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-10: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-11: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-12: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-13: CONJ 0 1 0 0 6 0 0 4
GlobalResAllocation-PT-05-CTLCardinality-14: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-15: CTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
58 CTL EXCL 260/264 1/32 GlobalResAllocation-PT-05-CTLCardinality-15 136944 m, 750 m/sec, 306338 t fired, .
64 EF FNDP 259/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 841228 t fired, 1 attempts, .
65 EF STEQ 259/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 sara is running.
Time elapsed: 418 secs. Pages in use: 2
# running tasks: 3 of 4 Visible: 16
lola: CANCELED task # 58 (type EXCL) for GlobalResAllocation-PT-05-CTLCardinality-15 (local timeout)
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
GlobalResAllocation-PT-05-CTLCardinality-04: INITIAL false preprocessing
GlobalResAllocation-PT-05-CTLCardinality-07: CTL true CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-09: CTL false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
GlobalResAllocation-PT-05-CTLCardinality-00: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-01: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-02: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-03: EF 0 1 2 0 2 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-06: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-08: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-10: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-11: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-12: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-13: CONJ 0 1 0 0 6 0 0 4
GlobalResAllocation-PT-05-CTLCardinality-14: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-15: CTL 0 0 0 0 1 1 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
64 EF FNDP 264/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 857477 t fired, 1 attempts, .
65 EF STEQ 264/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 sara is running.
Time elapsed: 423 secs. Pages in use: 2
# running tasks: 3 of 4 Visible: 16
lola: LAUNCH task # 55 (type EXCL) for 54 GlobalResAllocation-PT-05-CTLCardinality-14
lola: time limit : 264 sec
lola: memory limit: 32 pages
lola: LAUNCH task # 58 (type EXCL) for 57 GlobalResAllocation-PT-05-CTLCardinality-15
lola: time limit : 3177 sec
lola: memory limit: 5 pages
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
GlobalResAllocation-PT-05-CTLCardinality-04: INITIAL false preprocessing
GlobalResAllocation-PT-05-CTLCardinality-07: CTL true CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-09: CTL false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
GlobalResAllocation-PT-05-CTLCardinality-00: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-01: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-02: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-03: EF 0 1 2 0 2 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-06: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-08: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-10: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-11: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-12: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-13: CONJ 0 1 0 0 6 0 0 4
GlobalResAllocation-PT-05-CTLCardinality-14: CTL 0 0 1 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-15: CTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
55 CTL EXCL 5/264 1/32 GlobalResAllocation-PT-05-CTLCardinality-14 68595 m, 13719 m/sec, 150634 t fired, .
58 CTL EXCL 5/3177 1/5 GlobalResAllocation-PT-05-CTLCardinality-15 1044 m, -27180 m/sec, 2271 t fired, .
64 EF FNDP 269/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 870343 t fired, 1 attempts, .
65 EF STEQ 269/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 sara is running.
Time elapsed: 428 secs. Pages in use: 4
# running tasks: 4 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
GlobalResAllocation-PT-05-CTLCardinality-04: INITIAL false preprocessing
GlobalResAllocation-PT-05-CTLCardinality-07: CTL true CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-09: CTL false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
GlobalResAllocation-PT-05-CTLCardinality-00: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-01: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-02: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-03: EF 0 1 2 0 2 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-06: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-08: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-10: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-11: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-12: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-13: CONJ 0 1 0 0 6 0 0 4
GlobalResAllocation-PT-05-CTLCardinality-14: CTL 0 0 1 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-15: CTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
55 CTL EXCL 10/264 1/32 GlobalResAllocation-PT-05-CTLCardinality-14 134152 m, 13111 m/sec, 299724 t fired, .
58 CTL EXCL 10/244 1/5 GlobalResAllocation-PT-05-CTLCardinality-15 2279 m, 247 m/sec, 4829 t fired, .
64 EF FNDP 274/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 883205 t fired, 1 attempts, .
65 EF STEQ 274/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 sara is running.
Time elapsed: 433 secs. Pages in use: 4
# running tasks: 4 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
GlobalResAllocation-PT-05-CTLCardinality-04: INITIAL false preprocessing
GlobalResAllocation-PT-05-CTLCardinality-07: CTL true CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-09: CTL false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
GlobalResAllocation-PT-05-CTLCardinality-00: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-01: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-02: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-03: EF 0 1 2 0 2 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-06: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-08: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-10: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-11: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-12: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-13: CONJ 0 1 0 0 6 0 0 4
GlobalResAllocation-PT-05-CTLCardinality-14: CTL 0 0 1 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-15: CTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
55 CTL EXCL 15/264 1/32 GlobalResAllocation-PT-05-CTLCardinality-14 207971 m, 14763 m/sec, 469762 t fired, .
58 CTL EXCL 15/244 1/5 GlobalResAllocation-PT-05-CTLCardinality-15 3713 m, 286 m/sec, 7674 t fired, .
64 EF FNDP 279/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 894719 t fired, 1 attempts, .
65 EF STEQ 279/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 sara is running.
Time elapsed: 438 secs. Pages in use: 4
# running tasks: 4 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
GlobalResAllocation-PT-05-CTLCardinality-04: INITIAL false preprocessing
GlobalResAllocation-PT-05-CTLCardinality-07: CTL true CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-09: CTL false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
GlobalResAllocation-PT-05-CTLCardinality-00: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-01: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-02: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-03: EF 0 1 2 0 2 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-06: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-08: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-10: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-11: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-12: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-13: CONJ 0 1 0 0 6 0 0 4
GlobalResAllocation-PT-05-CTLCardinality-14: CTL 0 0 1 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-15: CTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
55 CTL EXCL 20/264 2/32 GlobalResAllocation-PT-05-CTLCardinality-14 281006 m, 14607 m/sec, 640288 t fired, .
58 CTL EXCL 20/244 1/5 GlobalResAllocation-PT-05-CTLCardinality-15 4954 m, 248 m/sec, 10231 t fired, .
64 EF FNDP 284/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 906504 t fired, 1 attempts, .
65 EF STEQ 284/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 sara is running.
Time elapsed: 443 secs. Pages in use: 5
# running tasks: 4 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
GlobalResAllocation-PT-05-CTLCardinality-04: INITIAL false preprocessing
GlobalResAllocation-PT-05-CTLCardinality-07: CTL true CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-09: CTL false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
GlobalResAllocation-PT-05-CTLCardinality-00: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-01: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-02: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-03: EF 0 1 2 0 2 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-06: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-08: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-10: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-11: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-12: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-13: CONJ 0 1 0 0 6 0 0 4
GlobalResAllocation-PT-05-CTLCardinality-14: CTL 0 0 1 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-15: CTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
55 CTL EXCL 25/264 2/32 GlobalResAllocation-PT-05-CTLCardinality-14 354987 m, 14796 m/sec, 813761 t fired, .
58 CTL EXCL 25/244 1/5 GlobalResAllocation-PT-05-CTLCardinality-15 6572 m, 323 m/sec, 13331 t fired, .
64 EF FNDP 289/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 919869 t fired, 1 attempts, .
65 EF STEQ 289/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 sara is running.
Time elapsed: 448 secs. Pages in use: 5
# running tasks: 4 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
GlobalResAllocation-PT-05-CTLCardinality-04: INITIAL false preprocessing
GlobalResAllocation-PT-05-CTLCardinality-07: CTL true CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-09: CTL false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
GlobalResAllocation-PT-05-CTLCardinality-00: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-01: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-02: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-03: EF 0 1 2 0 2 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-06: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-08: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-10: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-11: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-12: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-13: CONJ 0 1 0 0 6 0 0 4
GlobalResAllocation-PT-05-CTLCardinality-14: CTL 0 0 1 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-15: CTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
55 CTL EXCL 30/264 2/32 GlobalResAllocation-PT-05-CTLCardinality-14 425497 m, 14102 m/sec, 981744 t fired, .
58 CTL EXCL 30/244 1/5 GlobalResAllocation-PT-05-CTLCardinality-15 8375 m, 360 m/sec, 17022 t fired, .
64 EF FNDP 294/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 932786 t fired, 1 attempts, .
65 EF STEQ 294/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 sara is running.
Time elapsed: 453 secs. Pages in use: 5
# running tasks: 4 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
GlobalResAllocation-PT-05-CTLCardinality-04: INITIAL false preprocessing
GlobalResAllocation-PT-05-CTLCardinality-07: CTL true CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-09: CTL false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
GlobalResAllocation-PT-05-CTLCardinality-00: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-01: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-02: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-03: EF 0 1 2 0 2 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-06: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-08: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-10: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-11: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-12: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-13: CONJ 0 1 0 0 6 0 0 4
GlobalResAllocation-PT-05-CTLCardinality-14: CTL 0 0 1 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-15: CTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
55 CTL EXCL 35/264 3/32 GlobalResAllocation-PT-05-CTLCardinality-14 499162 m, 14733 m/sec, 1160031 t fired, .
58 CTL EXCL 35/244 1/5 GlobalResAllocation-PT-05-CTLCardinality-15 9968 m, 318 m/sec, 20447 t fired, .
64 EF FNDP 299/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 945357 t fired, 1 attempts, .
65 EF STEQ 299/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 sara is running.
Time elapsed: 458 secs. Pages in use: 6
# running tasks: 4 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
GlobalResAllocation-PT-05-CTLCardinality-04: INITIAL false preprocessing
GlobalResAllocation-PT-05-CTLCardinality-07: CTL true CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-09: CTL false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
GlobalResAllocation-PT-05-CTLCardinality-00: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-01: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-02: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-03: EF 0 1 2 0 2 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-06: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-08: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-10: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-11: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-12: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-13: CONJ 0 1 0 0 6 0 0 4
GlobalResAllocation-PT-05-CTLCardinality-14: CTL 0 0 1 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-15: CTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
55 CTL EXCL 40/264 3/32 GlobalResAllocation-PT-05-CTLCardinality-14 574578 m, 15083 m/sec, 1349802 t fired, .
58 CTL EXCL 40/244 1/5 GlobalResAllocation-PT-05-CTLCardinality-15 11805 m, 367 m/sec, 24545 t fired, .
64 EF FNDP 304/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 958800 t fired, 1 attempts, .
65 EF STEQ 304/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 sara is running.
Time elapsed: 463 secs. Pages in use: 6
# running tasks: 4 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
GlobalResAllocation-PT-05-CTLCardinality-04: INITIAL false preprocessing
GlobalResAllocation-PT-05-CTLCardinality-07: CTL true CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-09: CTL false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
GlobalResAllocation-PT-05-CTLCardinality-00: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-01: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-02: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-03: EF 0 1 2 0 2 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-06: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-08: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-10: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-11: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-12: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-13: CONJ 0 1 0 0 6 0 0 4
GlobalResAllocation-PT-05-CTLCardinality-14: CTL 0 0 1 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-15: CTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
55 CTL EXCL 45/264 3/32 GlobalResAllocation-PT-05-CTLCardinality-14 646453 m, 14375 m/sec, 1528946 t fired, .
58 CTL EXCL 45/244 1/5 GlobalResAllocation-PT-05-CTLCardinality-15 13631 m, 365 m/sec, 28638 t fired, .
64 EF FNDP 309/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 973009 t fired, 1 attempts, .
65 EF STEQ 309/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 sara is running.
Time elapsed: 468 secs. Pages in use: 6
# running tasks: 4 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
GlobalResAllocation-PT-05-CTLCardinality-04: INITIAL false preprocessing
GlobalResAllocation-PT-05-CTLCardinality-07: CTL true CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-09: CTL false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
GlobalResAllocation-PT-05-CTLCardinality-00: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-01: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-02: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-03: EF 0 1 2 0 2 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-06: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-08: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-10: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-11: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-12: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-13: CONJ 0 1 0 0 6 0 0 4
GlobalResAllocation-PT-05-CTLCardinality-14: CTL 0 0 1 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-15: CTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
55 CTL EXCL 50/264 4/32 GlobalResAllocation-PT-05-CTLCardinality-14 716832 m, 14075 m/sec, 1705557 t fired, .
58 CTL EXCL 50/244 1/5 GlobalResAllocation-PT-05-CTLCardinality-15 15149 m, 303 m/sec, 32220 t fired, .
64 EF FNDP 314/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 988049 t fired, 1 attempts, .
65 EF STEQ 314/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 sara is running.
Time elapsed: 473 secs. Pages in use: 7
# running tasks: 4 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
GlobalResAllocation-PT-05-CTLCardinality-04: INITIAL false preprocessing
GlobalResAllocation-PT-05-CTLCardinality-07: CTL true CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-09: CTL false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
GlobalResAllocation-PT-05-CTLCardinality-00: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-01: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-02: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-03: EF 0 1 2 0 2 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-06: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-08: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-10: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-11: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-12: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-13: CONJ 0 1 0 0 6 0 0 4
GlobalResAllocation-PT-05-CTLCardinality-14: CTL 0 0 1 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-15: CTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
55 CTL EXCL 55/264 4/32 GlobalResAllocation-PT-05-CTLCardinality-14 798719 m, 16377 m/sec, 1916205 t fired, .
58 CTL EXCL 55/244 1/5 GlobalResAllocation-PT-05-CTLCardinality-15 16763 m, 322 m/sec, 35764 t fired, .
64 EF FNDP 319/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 1000711 t fired, 2 attempts, .
65 EF STEQ 319/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 sara is running.
Time elapsed: 478 secs. Pages in use: 7
# running tasks: 4 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
GlobalResAllocation-PT-05-CTLCardinality-04: INITIAL false preprocessing
GlobalResAllocation-PT-05-CTLCardinality-07: CTL true CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-09: CTL false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
GlobalResAllocation-PT-05-CTLCardinality-00: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-01: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-02: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-03: EF 0 1 2 0 2 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-06: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-08: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-10: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-11: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-12: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-13: CONJ 0 1 0 0 6 0 0 4
GlobalResAllocation-PT-05-CTLCardinality-14: CTL 0 0 1 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-15: CTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
55 CTL EXCL 60/264 4/32 GlobalResAllocation-PT-05-CTLCardinality-14 869893 m, 14234 m/sec, 2099602 t fired, .
58 CTL EXCL 60/244 1/5 GlobalResAllocation-PT-05-CTLCardinality-15 18513 m, 350 m/sec, 39899 t fired, .
64 EF FNDP 324/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 1014159 t fired, 2 attempts, .
65 EF STEQ 324/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 sara is running.
Time elapsed: 483 secs. Pages in use: 7
# running tasks: 4 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
GlobalResAllocation-PT-05-CTLCardinality-04: INITIAL false preprocessing
GlobalResAllocation-PT-05-CTLCardinality-07: CTL true CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-09: CTL false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
GlobalResAllocation-PT-05-CTLCardinality-00: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-01: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-02: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-03: EF 0 1 2 0 2 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-06: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-08: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-10: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-11: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-12: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-13: CONJ 0 1 0 0 6 0 0 4
GlobalResAllocation-PT-05-CTLCardinality-14: CTL 0 0 1 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-15: CTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
55 CTL EXCL 65/264 5/32 GlobalResAllocation-PT-05-CTLCardinality-14 944581 m, 14937 m/sec, 2299524 t fired, .
58 CTL EXCL 65/244 1/5 GlobalResAllocation-PT-05-CTLCardinality-15 20043 m, 306 m/sec, 43005 t fired, .
64 EF FNDP 329/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 1026886 t fired, 2 attempts, .
65 EF STEQ 329/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 sara is running.
Time elapsed: 488 secs. Pages in use: 8
# running tasks: 4 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
GlobalResAllocation-PT-05-CTLCardinality-04: INITIAL false preprocessing
GlobalResAllocation-PT-05-CTLCardinality-07: CTL true CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-09: CTL false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
GlobalResAllocation-PT-05-CTLCardinality-00: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-01: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-02: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-03: EF 0 1 2 0 2 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-06: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-08: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-10: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-11: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-12: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-13: CONJ 0 1 0 0 6 0 0 4
GlobalResAllocation-PT-05-CTLCardinality-14: CTL 0 0 1 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-15: CTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
55 CTL EXCL 70/264 5/32 GlobalResAllocation-PT-05-CTLCardinality-14 1024446 m, 15973 m/sec, 2509037 t fired, .
58 CTL EXCL 70/244 1/5 GlobalResAllocation-PT-05-CTLCardinality-15 21641 m, 319 m/sec, 46680 t fired, .
64 EF FNDP 334/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 1039446 t fired, 2 attempts, .
65 EF STEQ 334/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 sara is running.
Time elapsed: 493 secs. Pages in use: 8
# running tasks: 4 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
GlobalResAllocation-PT-05-CTLCardinality-04: INITIAL false preprocessing
GlobalResAllocation-PT-05-CTLCardinality-07: CTL true CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-09: CTL false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
GlobalResAllocation-PT-05-CTLCardinality-00: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-01: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-02: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-03: EF 0 1 2 0 2 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-06: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-08: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-10: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-11: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-12: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-13: CONJ 0 1 0 0 6 0 0 4
GlobalResAllocation-PT-05-CTLCardinality-14: CTL 0 0 1 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-15: CTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
55 CTL EXCL 75/264 5/32 GlobalResAllocation-PT-05-CTLCardinality-14 1105864 m, 16283 m/sec, 2729708 t fired, .
58 CTL EXCL 75/244 1/5 GlobalResAllocation-PT-05-CTLCardinality-15 23611 m, 394 m/sec, 50776 t fired, .
64 EF FNDP 339/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 1052343 t fired, 2 attempts, .
65 EF STEQ 339/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 sara is running.
Time elapsed: 498 secs. Pages in use: 8
# running tasks: 4 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
GlobalResAllocation-PT-05-CTLCardinality-04: INITIAL false preprocessing
GlobalResAllocation-PT-05-CTLCardinality-07: CTL true CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-09: CTL false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
GlobalResAllocation-PT-05-CTLCardinality-00: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-01: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-02: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-03: EF 0 1 2 0 2 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-06: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-08: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-10: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-11: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-12: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-13: CONJ 0 1 0 0 6 0 0 4
GlobalResAllocation-PT-05-CTLCardinality-14: CTL 0 0 1 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-15: CTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
55 CTL EXCL 80/264 6/32 GlobalResAllocation-PT-05-CTLCardinality-14 1187669 m, 16361 m/sec, 2955845 t fired, .
58 CTL EXCL 80/244 1/5 GlobalResAllocation-PT-05-CTLCardinality-15 25381 m, 354 m/sec, 54763 t fired, .
64 EF FNDP 344/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 1065020 t fired, 2 attempts, .
65 EF STEQ 344/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 sara is running.
Time elapsed: 503 secs. Pages in use: 9
# running tasks: 4 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
GlobalResAllocation-PT-05-CTLCardinality-04: INITIAL false preprocessing
GlobalResAllocation-PT-05-CTLCardinality-07: CTL true CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-09: CTL false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
GlobalResAllocation-PT-05-CTLCardinality-00: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-01: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-02: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-03: EF 0 1 2 0 2 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-06: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-08: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-10: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-11: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-12: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-13: CONJ 0 1 0 0 6 0 0 4
GlobalResAllocation-PT-05-CTLCardinality-14: CTL 0 0 1 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-15: CTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
55 CTL EXCL 85/264 6/32 GlobalResAllocation-PT-05-CTLCardinality-14 1269813 m, 16428 m/sec, 3184380 t fired, .
58 CTL EXCL 85/244 1/5 GlobalResAllocation-PT-05-CTLCardinality-15 27311 m, 386 m/sec, 59125 t fired, .
64 EF FNDP 349/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 1078549 t fired, 2 attempts, .
65 EF STEQ 349/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 sara is running.
Time elapsed: 508 secs. Pages in use: 9
# running tasks: 4 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
GlobalResAllocation-PT-05-CTLCardinality-04: INITIAL false preprocessing
GlobalResAllocation-PT-05-CTLCardinality-07: CTL true CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-09: CTL false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
GlobalResAllocation-PT-05-CTLCardinality-00: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-01: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-02: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-03: EF 0 1 2 0 2 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-06: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-08: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-10: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-11: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-12: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-13: CONJ 0 1 0 0 6 0 0 4
GlobalResAllocation-PT-05-CTLCardinality-14: CTL 0 0 1 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-15: CTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
55 CTL EXCL 90/264 6/32 GlobalResAllocation-PT-05-CTLCardinality-14 1341647 m, 14366 m/sec, 3381899 t fired, .
58 CTL EXCL 90/244 1/5 GlobalResAllocation-PT-05-CTLCardinality-15 29114 m, 360 m/sec, 63296 t fired, .
64 EF FNDP 354/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 1092483 t fired, 2 attempts, .
65 EF STEQ 354/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 sara is running.
Time elapsed: 513 secs. Pages in use: 9
# running tasks: 4 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
GlobalResAllocation-PT-05-CTLCardinality-04: INITIAL false preprocessing
GlobalResAllocation-PT-05-CTLCardinality-07: CTL true CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-09: CTL false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
GlobalResAllocation-PT-05-CTLCardinality-00: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-01: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-02: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-03: EF 0 1 2 0 2 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-06: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-08: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-10: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-11: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-12: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-13: CONJ 0 1 0 0 6 0 0 4
GlobalResAllocation-PT-05-CTLCardinality-14: CTL 0 0 1 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-15: CTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
55 CTL EXCL 95/264 7/32 GlobalResAllocation-PT-05-CTLCardinality-14 1416637 m, 14998 m/sec, 3595771 t fired, .
58 CTL EXCL 95/244 1/5 GlobalResAllocation-PT-05-CTLCardinality-15 31165 m, 410 m/sec, 67764 t fired, .
64 EF FNDP 359/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 1105379 t fired, 2 attempts, .
65 EF STEQ 359/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 sara is running.
Time elapsed: 518 secs. Pages in use: 10
# running tasks: 4 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
GlobalResAllocation-PT-05-CTLCardinality-04: INITIAL false preprocessing
GlobalResAllocation-PT-05-CTLCardinality-07: CTL true CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-09: CTL false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
GlobalResAllocation-PT-05-CTLCardinality-00: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-01: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-02: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-03: EF 0 1 2 0 2 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-06: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-08: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-10: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-11: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-12: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-13: CONJ 0 1 0 0 6 0 0 4
GlobalResAllocation-PT-05-CTLCardinality-14: CTL 0 0 1 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-15: CTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
55 CTL EXCL 100/264 7/32 GlobalResAllocation-PT-05-CTLCardinality-14 1496462 m, 15965 m/sec, 3819513 t fired, .
58 CTL EXCL 100/244 1/5 GlobalResAllocation-PT-05-CTLCardinality-15 32879 m, 342 m/sec, 71569 t fired, .
64 EF FNDP 364/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 1117730 t fired, 2 attempts, .
65 EF STEQ 364/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 sara is running.
Time elapsed: 523 secs. Pages in use: 10
# running tasks: 4 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
GlobalResAllocation-PT-05-CTLCardinality-04: INITIAL false preprocessing
GlobalResAllocation-PT-05-CTLCardinality-07: CTL true CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-09: CTL false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
GlobalResAllocation-PT-05-CTLCardinality-00: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-01: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-02: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-03: EF 0 1 2 0 2 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-06: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-08: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-10: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-11: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-12: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-13: CONJ 0 1 0 0 6 0 0 4
GlobalResAllocation-PT-05-CTLCardinality-14: CTL 0 0 1 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-15: CTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
55 CTL EXCL 105/264 7/32 GlobalResAllocation-PT-05-CTLCardinality-14 1571382 m, 14984 m/sec, 4030919 t fired, .
58 CTL EXCL 105/244 1/5 GlobalResAllocation-PT-05-CTLCardinality-15 35076 m, 439 m/sec, 76162 t fired, .
64 EF FNDP 369/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 1131320 t fired, 2 attempts, .
65 EF STEQ 369/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 sara is running.
Time elapsed: 528 secs. Pages in use: 10
# running tasks: 4 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
GlobalResAllocation-PT-05-CTLCardinality-04: INITIAL false preprocessing
GlobalResAllocation-PT-05-CTLCardinality-07: CTL true CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-09: CTL false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
GlobalResAllocation-PT-05-CTLCardinality-00: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-01: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-02: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-03: EF 0 1 2 0 2 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-06: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-08: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-10: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-11: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-12: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-13: CONJ 0 1 0 0 6 0 0 4
GlobalResAllocation-PT-05-CTLCardinality-14: CTL 0 0 1 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-15: CTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
55 CTL EXCL 110/264 8/32 GlobalResAllocation-PT-05-CTLCardinality-14 1650488 m, 15821 m/sec, 4258507 t fired, .
58 CTL EXCL 110/244 1/5 GlobalResAllocation-PT-05-CTLCardinality-15 37667 m, 518 m/sec, 81644 t fired, .
64 EF FNDP 374/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 1144179 t fired, 2 attempts, .
65 EF STEQ 374/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 sara is running.
Time elapsed: 533 secs. Pages in use: 11
# running tasks: 4 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
GlobalResAllocation-PT-05-CTLCardinality-04: INITIAL false preprocessing
GlobalResAllocation-PT-05-CTLCardinality-07: CTL true CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-09: CTL false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
GlobalResAllocation-PT-05-CTLCardinality-00: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-01: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-02: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-03: EF 0 1 2 0 2 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-06: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-08: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-10: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-11: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-12: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-13: CONJ 0 1 0 0 6 0 0 4
GlobalResAllocation-PT-05-CTLCardinality-14: CTL 0 0 1 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-15: CTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
55 CTL EXCL 115/264 8/32 GlobalResAllocation-PT-05-CTLCardinality-14 1731882 m, 16278 m/sec, 4494730 t fired, .
58 CTL EXCL 115/244 1/5 GlobalResAllocation-PT-05-CTLCardinality-15 39983 m, 463 m/sec, 86718 t fired, .
64 EF FNDP 379/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 1156695 t fired, 2 attempts, .
65 EF STEQ 379/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 sara is running.
Time elapsed: 538 secs. Pages in use: 11
# running tasks: 4 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
GlobalResAllocation-PT-05-CTLCardinality-04: INITIAL false preprocessing
GlobalResAllocation-PT-05-CTLCardinality-07: CTL true CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-09: CTL false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
GlobalResAllocation-PT-05-CTLCardinality-00: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-01: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-02: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-03: EF 0 1 2 0 2 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-06: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-08: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-10: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-11: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-12: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-13: CONJ 0 1 0 0 6 0 0 4
GlobalResAllocation-PT-05-CTLCardinality-14: CTL 0 0 1 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-15: CTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
55 CTL EXCL 120/264 8/32 GlobalResAllocation-PT-05-CTLCardinality-14 1810135 m, 15650 m/sec, 4722732 t fired, .
58 CTL EXCL 120/244 1/5 GlobalResAllocation-PT-05-CTLCardinality-15 42135 m, 430 m/sec, 91454 t fired, .
64 EF FNDP 384/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 1170035 t fired, 2 attempts, .
65 EF STEQ 384/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 sara is running.
Time elapsed: 543 secs. Pages in use: 11
# running tasks: 4 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
GlobalResAllocation-PT-05-CTLCardinality-04: INITIAL false preprocessing
GlobalResAllocation-PT-05-CTLCardinality-07: CTL true CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-09: CTL false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
GlobalResAllocation-PT-05-CTLCardinality-00: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-01: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-02: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-03: EF 0 1 2 0 2 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-06: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-08: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-10: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-11: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-12: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-13: CONJ 0 1 0 0 6 0 0 4
GlobalResAllocation-PT-05-CTLCardinality-14: CTL 0 0 1 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-15: CTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
55 CTL EXCL 125/264 9/32 GlobalResAllocation-PT-05-CTLCardinality-14 1888587 m, 15690 m/sec, 4952651 t fired, .
58 CTL EXCL 125/244 1/5 GlobalResAllocation-PT-05-CTLCardinality-15 44074 m, 387 m/sec, 95872 t fired, .
64 EF FNDP 389/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 1182545 t fired, 2 attempts, .
65 EF STEQ 389/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 sara is running.
Time elapsed: 548 secs. Pages in use: 12
# running tasks: 4 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
GlobalResAllocation-PT-05-CTLCardinality-04: INITIAL false preprocessing
GlobalResAllocation-PT-05-CTLCardinality-07: CTL true CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-09: CTL false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
GlobalResAllocation-PT-05-CTLCardinality-00: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-01: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-02: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-03: EF 0 1 2 0 2 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-06: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-08: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-10: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-11: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-12: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-13: CONJ 0 1 0 0 6 0 0 4
GlobalResAllocation-PT-05-CTLCardinality-14: CTL 0 0 1 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-15: CTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
55 CTL EXCL 130/264 9/32 GlobalResAllocation-PT-05-CTLCardinality-14 1967325 m, 15747 m/sec, 5184442 t fired, .
58 CTL EXCL 130/244 1/5 GlobalResAllocation-PT-05-CTLCardinality-15 46403 m, 465 m/sec, 101113 t fired, .
64 EF FNDP 394/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 1195396 t fired, 2 attempts, .
65 EF STEQ 394/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 sara is running.
Time elapsed: 553 secs. Pages in use: 12
# running tasks: 4 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
GlobalResAllocation-PT-05-CTLCardinality-04: INITIAL false preprocessing
GlobalResAllocation-PT-05-CTLCardinality-07: CTL true CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-09: CTL false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
GlobalResAllocation-PT-05-CTLCardinality-00: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-01: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-02: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-03: EF 0 1 2 0 2 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-06: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-08: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-10: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-11: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-12: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-13: CONJ 0 1 0 0 6 0 0 4
GlobalResAllocation-PT-05-CTLCardinality-14: CTL 0 0 1 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-15: CTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
55 CTL EXCL 135/264 10/32 GlobalResAllocation-PT-05-CTLCardinality-14 2041068 m, 14748 m/sec, 5410900 t fired, .
58 CTL EXCL 135/244 1/5 GlobalResAllocation-PT-05-CTLCardinality-15 47783 m, 276 m/sec, 104158 t fired, .
64 EF FNDP 399/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 1208843 t fired, 2 attempts, .
65 EF STEQ 399/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 sara is running.
Time elapsed: 558 secs. Pages in use: 13
# running tasks: 4 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
GlobalResAllocation-PT-05-CTLCardinality-04: INITIAL false preprocessing
GlobalResAllocation-PT-05-CTLCardinality-07: CTL true CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-09: CTL false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
GlobalResAllocation-PT-05-CTLCardinality-00: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-01: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-02: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-03: EF 0 1 2 0 2 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-06: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-08: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-10: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-11: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-12: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-13: CONJ 0 1 0 0 6 0 0 4
GlobalResAllocation-PT-05-CTLCardinality-14: CTL 0 0 1 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-15: CTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
55 CTL EXCL 140/264 10/32 GlobalResAllocation-PT-05-CTLCardinality-14 2111629 m, 14112 m/sec, 5621644 t fired, .
58 CTL EXCL 140/244 1/5 GlobalResAllocation-PT-05-CTLCardinality-15 49632 m, 369 m/sec, 108297 t fired, .
64 EF FNDP 404/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 1220960 t fired, 2 attempts, .
65 EF STEQ 404/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 sara is running.
Time elapsed: 563 secs. Pages in use: 13
# running tasks: 4 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
GlobalResAllocation-PT-05-CTLCardinality-04: INITIAL false preprocessing
GlobalResAllocation-PT-05-CTLCardinality-07: CTL true CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-09: CTL false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
GlobalResAllocation-PT-05-CTLCardinality-00: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-01: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-02: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-03: EF 0 1 2 0 2 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-06: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-08: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-10: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-11: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-12: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-13: CONJ 0 1 0 0 6 0 0 4
GlobalResAllocation-PT-05-CTLCardinality-14: CTL 0 0 1 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-15: CTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
55 CTL EXCL 145/264 10/32 GlobalResAllocation-PT-05-CTLCardinality-14 2194621 m, 16598 m/sec, 5872069 t fired, .
58 CTL EXCL 145/244 1/5 GlobalResAllocation-PT-05-CTLCardinality-15 51448 m, 363 m/sec, 112455 t fired, .
64 EF FNDP 409/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 1232740 t fired, 2 attempts, .
65 EF STEQ 409/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 sara is running.
Time elapsed: 568 secs. Pages in use: 13
# running tasks: 4 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
GlobalResAllocation-PT-05-CTLCardinality-04: INITIAL false preprocessing
GlobalResAllocation-PT-05-CTLCardinality-07: CTL true CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-09: CTL false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
GlobalResAllocation-PT-05-CTLCardinality-00: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-01: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-02: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-03: EF 0 1 2 0 2 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-06: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-08: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-10: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-11: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-12: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-13: CONJ 0 1 0 0 6 0 0 4
GlobalResAllocation-PT-05-CTLCardinality-14: CTL 0 0 1 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-15: CTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
55 CTL EXCL 150/264 11/32 GlobalResAllocation-PT-05-CTLCardinality-14 2268121 m, 14700 m/sec, 6099038 t fired, .
58 CTL EXCL 150/244 1/5 GlobalResAllocation-PT-05-CTLCardinality-15 53146 m, 339 m/sec, 115823 t fired, .
64 EF FNDP 414/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 1246099 t fired, 2 attempts, .
65 EF STEQ 414/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 sara is running.
Time elapsed: 573 secs. Pages in use: 14
# running tasks: 4 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
GlobalResAllocation-PT-05-CTLCardinality-04: INITIAL false preprocessing
GlobalResAllocation-PT-05-CTLCardinality-07: CTL true CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-09: CTL false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
GlobalResAllocation-PT-05-CTLCardinality-00: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-01: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-02: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-03: EF 0 1 2 0 2 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-06: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-08: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-10: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-11: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-12: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-13: CONJ 0 1 0 0 6 0 0 4
GlobalResAllocation-PT-05-CTLCardinality-14: CTL 0 0 1 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-15: CTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
55 CTL EXCL 155/264 11/32 GlobalResAllocation-PT-05-CTLCardinality-14 2336481 m, 13672 m/sec, 6310616 t fired, .
58 CTL EXCL 155/244 1/5 GlobalResAllocation-PT-05-CTLCardinality-15 55508 m, 472 m/sec, 120986 t fired, .
64 EF FNDP 419/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 1257976 t fired, 2 attempts, .
65 EF STEQ 419/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 sara is running.
Time elapsed: 578 secs. Pages in use: 14
# running tasks: 4 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
GlobalResAllocation-PT-05-CTLCardinality-04: INITIAL false preprocessing
GlobalResAllocation-PT-05-CTLCardinality-07: CTL true CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-09: CTL false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
GlobalResAllocation-PT-05-CTLCardinality-00: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-01: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-02: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-03: EF 0 1 2 0 2 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-06: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-08: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-10: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-11: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-12: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-13: CONJ 0 1 0 0 6 0 0 4
GlobalResAllocation-PT-05-CTLCardinality-14: CTL 0 0 1 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-15: CTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
55 CTL EXCL 160/264 11/32 GlobalResAllocation-PT-05-CTLCardinality-14 2412754 m, 15254 m/sec, 6548063 t fired, .
58 CTL EXCL 160/244 1/5 GlobalResAllocation-PT-05-CTLCardinality-15 57486 m, 395 m/sec, 125634 t fired, .
64 EF FNDP 424/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 1270130 t fired, 2 attempts, .
65 EF STEQ 424/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 sara is running.
Time elapsed: 583 secs. Pages in use: 14
# running tasks: 4 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
GlobalResAllocation-PT-05-CTLCardinality-04: INITIAL false preprocessing
GlobalResAllocation-PT-05-CTLCardinality-07: CTL true CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-09: CTL false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
GlobalResAllocation-PT-05-CTLCardinality-00: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-01: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-02: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-03: EF 0 1 2 0 2 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-06: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-08: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-10: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-11: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-12: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-13: CONJ 0 1 0 0 6 0 0 4
GlobalResAllocation-PT-05-CTLCardinality-14: CTL 0 0 1 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-15: CTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
55 CTL EXCL 165/264 11/32 GlobalResAllocation-PT-05-CTLCardinality-14 2492307 m, 15910 m/sec, 6797076 t fired, .
58 CTL EXCL 165/244 1/5 GlobalResAllocation-PT-05-CTLCardinality-15 59778 m, 458 m/sec, 130736 t fired, .
64 EF FNDP 429/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 1282161 t fired, 2 attempts, .
65 EF STEQ 429/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 sara is running.
Time elapsed: 588 secs. Pages in use: 14
# running tasks: 4 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
GlobalResAllocation-PT-05-CTLCardinality-04: INITIAL false preprocessing
GlobalResAllocation-PT-05-CTLCardinality-07: CTL true CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-09: CTL false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
GlobalResAllocation-PT-05-CTLCardinality-00: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-01: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-02: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-03: EF 0 1 2 0 2 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-06: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-08: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-10: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-11: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-12: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-13: CONJ 0 1 0 0 6 0 0 4
GlobalResAllocation-PT-05-CTLCardinality-14: CTL 0 0 1 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-15: CTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
55 CTL EXCL 170/264 12/32 GlobalResAllocation-PT-05-CTLCardinality-14 2565115 m, 14561 m/sec, 7027644 t fired, .
58 CTL EXCL 170/244 1/5 GlobalResAllocation-PT-05-CTLCardinality-15 61516 m, 347 m/sec, 134338 t fired, .
64 EF FNDP 434/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 1295216 t fired, 2 attempts, .
65 EF STEQ 434/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 sara is running.
Time elapsed: 593 secs. Pages in use: 15
# running tasks: 4 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
GlobalResAllocation-PT-05-CTLCardinality-04: INITIAL false preprocessing
GlobalResAllocation-PT-05-CTLCardinality-07: CTL true CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-09: CTL false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
GlobalResAllocation-PT-05-CTLCardinality-00: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-01: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-02: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-03: EF 0 1 2 0 2 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-06: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-08: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-10: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-11: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-12: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-13: CONJ 0 1 0 0 6 0 0 4
GlobalResAllocation-PT-05-CTLCardinality-14: CTL 0 0 1 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-15: CTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
55 CTL EXCL 175/264 12/32 GlobalResAllocation-PT-05-CTLCardinality-14 2653675 m, 17712 m/sec, 7306398 t fired, .
58 CTL EXCL 175/244 1/5 GlobalResAllocation-PT-05-CTLCardinality-15 63530 m, 402 m/sec, 138828 t fired, .
64 EF FNDP 439/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 1308751 t fired, 2 attempts, .
65 EF STEQ 439/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 sara is running.
Time elapsed: 598 secs. Pages in use: 15
# running tasks: 4 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
GlobalResAllocation-PT-05-CTLCardinality-04: INITIAL false preprocessing
GlobalResAllocation-PT-05-CTLCardinality-07: CTL true CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-09: CTL false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
GlobalResAllocation-PT-05-CTLCardinality-00: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-01: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-02: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-03: EF 0 1 2 0 2 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-06: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-08: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-10: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-11: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-12: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-13: CONJ 0 1 0 0 6 0 0 4
GlobalResAllocation-PT-05-CTLCardinality-14: CTL 0 0 1 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-15: CTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
55 CTL EXCL 180/264 13/32 GlobalResAllocation-PT-05-CTLCardinality-14 2731468 m, 15558 m/sec, 7555420 t fired, .
58 CTL EXCL 180/244 1/5 GlobalResAllocation-PT-05-CTLCardinality-15 65972 m, 488 m/sec, 144665 t fired, .
64 EF FNDP 444/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 1320833 t fired, 2 attempts, .
65 EF STEQ 444/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 sara is running.
Time elapsed: 603 secs. Pages in use: 16
# running tasks: 4 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
GlobalResAllocation-PT-05-CTLCardinality-04: INITIAL false preprocessing
GlobalResAllocation-PT-05-CTLCardinality-07: CTL true CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-09: CTL false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
GlobalResAllocation-PT-05-CTLCardinality-00: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-01: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-02: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-03: EF 0 1 2 0 2 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-06: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-08: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-10: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-11: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-12: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-13: CONJ 0 1 0 0 6 0 0 4
GlobalResAllocation-PT-05-CTLCardinality-14: CTL 0 0 1 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-15: CTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
55 CTL EXCL 185/264 13/32 GlobalResAllocation-PT-05-CTLCardinality-14 2809189 m, 15544 m/sec, 7792985 t fired, .
58 CTL EXCL 185/244 1/5 GlobalResAllocation-PT-05-CTLCardinality-15 68300 m, 465 m/sec, 149780 t fired, .
64 EF FNDP 449/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 1333835 t fired, 2 attempts, .
65 EF STEQ 449/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 sara is running.
Time elapsed: 608 secs. Pages in use: 16
# running tasks: 4 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
GlobalResAllocation-PT-05-CTLCardinality-04: INITIAL false preprocessing
GlobalResAllocation-PT-05-CTLCardinality-07: CTL true CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-09: CTL false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
GlobalResAllocation-PT-05-CTLCardinality-00: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-01: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-02: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-03: EF 0 1 2 0 2 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-06: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-08: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-10: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-11: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-12: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-13: CONJ 0 1 0 0 6 0 0 4
GlobalResAllocation-PT-05-CTLCardinality-14: CTL 0 0 1 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-15: CTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
55 CTL EXCL 190/264 13/32 GlobalResAllocation-PT-05-CTLCardinality-14 2886646 m, 15491 m/sec, 8036183 t fired, .
58 CTL EXCL 190/244 1/5 GlobalResAllocation-PT-05-CTLCardinality-15 70366 m, 413 m/sec, 154999 t fired, .
64 EF FNDP 454/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 1346787 t fired, 2 attempts, .
65 EF STEQ 454/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 sara is running.
Time elapsed: 613 secs. Pages in use: 16
# running tasks: 4 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
GlobalResAllocation-PT-05-CTLCardinality-04: INITIAL false preprocessing
GlobalResAllocation-PT-05-CTLCardinality-07: CTL true CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-09: CTL false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
GlobalResAllocation-PT-05-CTLCardinality-00: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-01: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-02: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-03: EF 0 1 2 0 2 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-06: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-08: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-10: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-11: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-12: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-13: CONJ 0 1 0 0 6 0 0 4
GlobalResAllocation-PT-05-CTLCardinality-14: CTL 0 0 1 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-15: CTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
55 CTL EXCL 195/264 14/32 GlobalResAllocation-PT-05-CTLCardinality-14 2963679 m, 15406 m/sec, 8293537 t fired, .
58 CTL EXCL 195/244 1/5 GlobalResAllocation-PT-05-CTLCardinality-15 72559 m, 438 m/sec, 159981 t fired, .
64 EF FNDP 459/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 1358280 t fired, 2 attempts, .
65 EF STEQ 459/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 sara is running.
Time elapsed: 618 secs. Pages in use: 17
# running tasks: 4 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
GlobalResAllocation-PT-05-CTLCardinality-04: INITIAL false preprocessing
GlobalResAllocation-PT-05-CTLCardinality-07: CTL true CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-09: CTL false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
GlobalResAllocation-PT-05-CTLCardinality-00: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-01: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-02: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-03: EF 0 1 2 0 2 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-06: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-08: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-10: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-11: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-12: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-13: CONJ 0 1 0 0 6 0 0 4
GlobalResAllocation-PT-05-CTLCardinality-14: CTL 0 0 1 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-15: CTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
55 CTL EXCL 200/264 14/32 GlobalResAllocation-PT-05-CTLCardinality-14 3046014 m, 16467 m/sec, 8552736 t fired, .
58 CTL EXCL 200/244 1/5 GlobalResAllocation-PT-05-CTLCardinality-15 74453 m, 378 m/sec, 163942 t fired, .
64 EF FNDP 464/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 1370990 t fired, 2 attempts, .
65 EF STEQ 464/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 sara is running.
Time elapsed: 623 secs. Pages in use: 17
# running tasks: 4 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
GlobalResAllocation-PT-05-CTLCardinality-04: INITIAL false preprocessing
GlobalResAllocation-PT-05-CTLCardinality-07: CTL true CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-09: CTL false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
GlobalResAllocation-PT-05-CTLCardinality-00: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-01: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-02: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-03: EF 0 1 2 0 2 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-06: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-08: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-10: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-11: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-12: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-13: CONJ 0 1 0 0 6 0 0 4
GlobalResAllocation-PT-05-CTLCardinality-14: CTL 0 0 1 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-15: CTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
55 CTL EXCL 205/264 14/32 GlobalResAllocation-PT-05-CTLCardinality-14 3121589 m, 15115 m/sec, 8791004 t fired, .
58 CTL EXCL 205/244 1/5 GlobalResAllocation-PT-05-CTLCardinality-15 76529 m, 415 m/sec, 168476 t fired, .
64 EF FNDP 469/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 1383548 t fired, 2 attempts, .
65 EF STEQ 469/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 sara is running.
Time elapsed: 628 secs. Pages in use: 17
# running tasks: 4 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
GlobalResAllocation-PT-05-CTLCardinality-04: INITIAL false preprocessing
GlobalResAllocation-PT-05-CTLCardinality-07: CTL true CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-09: CTL false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
GlobalResAllocation-PT-05-CTLCardinality-00: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-01: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-02: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-03: EF 0 1 2 0 2 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-06: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-08: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-10: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-11: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-12: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-13: CONJ 0 1 0 0 6 0 0 4
GlobalResAllocation-PT-05-CTLCardinality-14: CTL 0 0 1 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-15: CTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
55 CTL EXCL 210/264 15/32 GlobalResAllocation-PT-05-CTLCardinality-14 3203206 m, 16323 m/sec, 9056906 t fired, .
58 CTL EXCL 210/244 1/5 GlobalResAllocation-PT-05-CTLCardinality-15 78883 m, 470 m/sec, 174264 t fired, .
64 EF FNDP 474/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 1395988 t fired, 2 attempts, .
65 EF STEQ 474/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 sara is running.
Time elapsed: 633 secs. Pages in use: 18
# running tasks: 4 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
GlobalResAllocation-PT-05-CTLCardinality-04: INITIAL false preprocessing
GlobalResAllocation-PT-05-CTLCardinality-07: CTL true CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-09: CTL false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
GlobalResAllocation-PT-05-CTLCardinality-00: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-01: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-02: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-03: EF 0 1 2 0 2 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-06: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-08: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-10: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-11: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-12: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-13: CONJ 0 1 0 0 6 0 0 4
GlobalResAllocation-PT-05-CTLCardinality-14: CTL 0 0 1 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-15: CTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
55 CTL EXCL 215/264 15/32 GlobalResAllocation-PT-05-CTLCardinality-14 3276523 m, 14663 m/sec, 9288790 t fired, .
58 CTL EXCL 215/244 1/5 GlobalResAllocation-PT-05-CTLCardinality-15 80841 m, 391 m/sec, 178757 t fired, .
64 EF FNDP 479/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 1407725 t fired, 2 attempts, .
65 EF STEQ 479/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 sara is running.
Time elapsed: 638 secs. Pages in use: 18
# running tasks: 4 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
GlobalResAllocation-PT-05-CTLCardinality-04: INITIAL false preprocessing
GlobalResAllocation-PT-05-CTLCardinality-07: CTL true CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-09: CTL false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
GlobalResAllocation-PT-05-CTLCardinality-00: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-01: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-02: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-03: EF 0 1 2 0 2 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-06: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-08: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-10: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-11: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-12: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-13: CONJ 0 1 0 0 6 0 0 4
GlobalResAllocation-PT-05-CTLCardinality-14: CTL 0 0 1 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-15: CTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
55 CTL EXCL 220/264 15/32 GlobalResAllocation-PT-05-CTLCardinality-14 3347507 m, 14196 m/sec, 9519933 t fired, .
58 CTL EXCL 220/244 1/5 GlobalResAllocation-PT-05-CTLCardinality-15 83388 m, 509 m/sec, 184786 t fired, .
64 EF FNDP 484/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 1420094 t fired, 2 attempts, .
65 EF STEQ 484/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 sara is running.
Time elapsed: 643 secs. Pages in use: 18
# running tasks: 4 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
GlobalResAllocation-PT-05-CTLCardinality-04: INITIAL false preprocessing
GlobalResAllocation-PT-05-CTLCardinality-07: CTL true CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-09: CTL false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
GlobalResAllocation-PT-05-CTLCardinality-00: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-01: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-02: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-03: EF 0 1 2 0 2 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-06: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-08: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-10: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-11: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-12: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-13: CONJ 0 1 0 0 6 0 0 4
GlobalResAllocation-PT-05-CTLCardinality-14: CTL 0 0 1 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-15: CTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
55 CTL EXCL 225/264 16/32 GlobalResAllocation-PT-05-CTLCardinality-14 3418430 m, 14184 m/sec, 9751691 t fired, .
58 CTL EXCL 225/244 1/5 GlobalResAllocation-PT-05-CTLCardinality-15 85696 m, 461 m/sec, 190409 t fired, .
64 EF FNDP 489/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 1431799 t fired, 2 attempts, .
65 EF STEQ 489/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 sara is running.
Time elapsed: 648 secs. Pages in use: 19
# running tasks: 4 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
GlobalResAllocation-PT-05-CTLCardinality-04: INITIAL false preprocessing
GlobalResAllocation-PT-05-CTLCardinality-07: CTL true CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-09: CTL false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
GlobalResAllocation-PT-05-CTLCardinality-00: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-01: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-02: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-03: EF 0 1 2 0 2 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-06: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-08: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-10: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-11: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-12: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-13: CONJ 0 1 0 0 6 0 0 4
GlobalResAllocation-PT-05-CTLCardinality-14: CTL 0 0 1 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-15: CTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
55 CTL EXCL 230/264 16/32 GlobalResAllocation-PT-05-CTLCardinality-14 3498650 m, 16044 m/sec, 10014271 t fired, .
58 CTL EXCL 230/244 1/5 GlobalResAllocation-PT-05-CTLCardinality-15 88690 m, 598 m/sec, 197304 t fired, .
64 EF FNDP 494/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 1443985 t fired, 2 attempts, .
65 EF STEQ 494/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 sara is running.
Time elapsed: 653 secs. Pages in use: 19
# running tasks: 4 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
GlobalResAllocation-PT-05-CTLCardinality-04: INITIAL false preprocessing
GlobalResAllocation-PT-05-CTLCardinality-07: CTL true CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-09: CTL false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
GlobalResAllocation-PT-05-CTLCardinality-00: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-01: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-02: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-03: EF 0 1 2 0 2 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-06: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-08: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-10: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-11: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-12: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-13: CONJ 0 1 0 0 6 0 0 4
GlobalResAllocation-PT-05-CTLCardinality-14: CTL 0 0 1 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-15: CTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
55 CTL EXCL 235/264 16/32 GlobalResAllocation-PT-05-CTLCardinality-14 3588823 m, 18034 m/sec, 10308043 t fired, .
58 CTL EXCL 235/244 1/5 GlobalResAllocation-PT-05-CTLCardinality-15 89965 m, 255 m/sec, 199852 t fired, .
64 EF FNDP 499/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 1456304 t fired, 2 attempts, .
65 EF STEQ 499/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 sara is running.
Time elapsed: 658 secs. Pages in use: 19
# running tasks: 4 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
GlobalResAllocation-PT-05-CTLCardinality-04: INITIAL false preprocessing
GlobalResAllocation-PT-05-CTLCardinality-07: CTL true CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-09: CTL false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
GlobalResAllocation-PT-05-CTLCardinality-00: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-01: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-02: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-03: EF 0 1 2 0 2 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-06: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-08: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-10: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-11: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-12: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-13: CONJ 0 1 0 0 6 0 0 4
GlobalResAllocation-PT-05-CTLCardinality-14: CTL 0 0 1 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-15: CTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
55 CTL EXCL 240/264 17/32 GlobalResAllocation-PT-05-CTLCardinality-14 3671919 m, 16619 m/sec, 10582913 t fired, .
58 CTL EXCL 240/244 1/5 GlobalResAllocation-PT-05-CTLCardinality-15 91793 m, 365 m/sec, 203588 t fired, .
64 EF FNDP 504/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 1467689 t fired, 2 attempts, .
65 EF STEQ 504/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 sara is running.
Time elapsed: 663 secs. Pages in use: 20
# running tasks: 4 of 4 Visible: 16
lola: CANCELED task # 58 (type EXCL) for GlobalResAllocation-PT-05-CTLCardinality-15 (local timeout)
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
GlobalResAllocation-PT-05-CTLCardinality-04: INITIAL false preprocessing
GlobalResAllocation-PT-05-CTLCardinality-07: CTL true CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-09: CTL false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
GlobalResAllocation-PT-05-CTLCardinality-00: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-01: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-02: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-03: EF 0 1 2 0 2 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-06: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-08: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-10: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-11: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-12: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-13: CONJ 0 1 0 0 6 0 0 4
GlobalResAllocation-PT-05-CTLCardinality-14: CTL 0 0 1 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-15: CTL 0 0 0 0 1 1 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
55 CTL EXCL 245/264 17/32 GlobalResAllocation-PT-05-CTLCardinality-14 3749709 m, 15558 m/sec, 10834033 t fired, .
64 EF FNDP 509/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 1480979 t fired, 2 attempts, .
65 EF STEQ 509/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 sara is running.
Time elapsed: 668 secs. Pages in use: 20
# running tasks: 4 of 4 Visible: 16
lola: LAUNCH task # 58 (type EXCL) for 57 GlobalResAllocation-PT-05-CTLCardinality-15
lola: time limit : 2932 sec
lola: memory limit: 5 pages
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
GlobalResAllocation-PT-05-CTLCardinality-04: INITIAL false preprocessing
GlobalResAllocation-PT-05-CTLCardinality-07: CTL true CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-09: CTL false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
GlobalResAllocation-PT-05-CTLCardinality-00: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-01: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-02: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-03: EF 0 1 2 0 2 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-06: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-08: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-10: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-11: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-12: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-13: CONJ 0 1 0 0 6 0 0 4
GlobalResAllocation-PT-05-CTLCardinality-14: CTL 0 0 1 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-15: CTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
55 CTL EXCL 250/264 17/32 GlobalResAllocation-PT-05-CTLCardinality-14 3817713 m, 13600 m/sec, 11060541 t fired, .
58 CTL EXCL 5/2932 1/5 GlobalResAllocation-PT-05-CTLCardinality-15 737 m, -18211 m/sec, 1646 t fired, .
64 EF FNDP 514/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 1490916 t fired, 2 attempts, .
65 EF STEQ 514/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 sara is running.
Time elapsed: 673 secs. Pages in use: 22
# running tasks: 4 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
GlobalResAllocation-PT-05-CTLCardinality-04: INITIAL false preprocessing
GlobalResAllocation-PT-05-CTLCardinality-07: CTL true CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-09: CTL false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
GlobalResAllocation-PT-05-CTLCardinality-00: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-01: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-02: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-03: EF 0 1 2 0 2 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-06: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-08: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-10: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-11: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-12: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-13: CONJ 0 1 0 0 6 0 0 4
GlobalResAllocation-PT-05-CTLCardinality-14: CTL 0 0 1 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-15: CTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
55 CTL EXCL 255/264 18/32 GlobalResAllocation-PT-05-CTLCardinality-14 3877998 m, 12057 m/sec, 11257988 t fired, .
58 CTL EXCL 10/225 1/5 GlobalResAllocation-PT-05-CTLCardinality-15 1758 m, 204 m/sec, 3820 t fired, .
64 EF FNDP 519/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 1501709 t fired, 2 attempts, .
65 EF STEQ 519/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 sara is running.
Time elapsed: 678 secs. Pages in use: 23
# running tasks: 4 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
GlobalResAllocation-PT-05-CTLCardinality-04: INITIAL false preprocessing
GlobalResAllocation-PT-05-CTLCardinality-07: CTL true CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-09: CTL false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
GlobalResAllocation-PT-05-CTLCardinality-00: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-01: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-02: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-03: EF 0 1 2 0 2 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-06: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-08: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-10: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-11: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-12: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-13: CONJ 0 1 0 0 6 0 0 4
GlobalResAllocation-PT-05-CTLCardinality-14: CTL 0 0 1 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-15: CTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
55 CTL EXCL 260/264 18/32 GlobalResAllocation-PT-05-CTLCardinality-14 3946412 m, 13682 m/sec, 11489040 t fired, .
58 CTL EXCL 15/225 1/5 GlobalResAllocation-PT-05-CTLCardinality-15 2854 m, 219 m/sec, 5908 t fired, .
64 EF FNDP 524/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 1512518 t fired, 2 attempts, .
65 EF STEQ 524/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 sara is running.
Time elapsed: 683 secs. Pages in use: 23
# running tasks: 4 of 4 Visible: 16
lola: CANCELED task # 55 (type EXCL) for GlobalResAllocation-PT-05-CTLCardinality-14 (local timeout)
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
GlobalResAllocation-PT-05-CTLCardinality-04: INITIAL false preprocessing
GlobalResAllocation-PT-05-CTLCardinality-07: CTL true CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-09: CTL false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
GlobalResAllocation-PT-05-CTLCardinality-00: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-01: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-02: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-03: EF 0 1 2 0 2 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-06: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-08: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-10: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-11: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-12: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-13: CONJ 0 1 0 0 6 0 0 4
GlobalResAllocation-PT-05-CTLCardinality-14: CTL 0 0 0 0 1 1 0 0
GlobalResAllocation-PT-05-CTLCardinality-15: CTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
58 CTL EXCL 20/225 1/5 GlobalResAllocation-PT-05-CTLCardinality-15 3985 m, 226 m/sec, 8259 t fired, .
64 EF FNDP 529/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 1522431 t fired, 2 attempts, .
65 EF STEQ 529/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 sara is running.
Time elapsed: 688 secs. Pages in use: 23
# running tasks: 4 of 4 Visible: 16
lola: LAUNCH task # 55 (type EXCL) for 54 GlobalResAllocation-PT-05-CTLCardinality-14
lola: time limit : 2912 sec
lola: memory limit: 5 pages
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
GlobalResAllocation-PT-05-CTLCardinality-04: INITIAL false preprocessing
GlobalResAllocation-PT-05-CTLCardinality-07: CTL true CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-09: CTL false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
GlobalResAllocation-PT-05-CTLCardinality-00: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-01: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-02: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-03: EF 0 1 2 0 2 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-06: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-08: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-10: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-11: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-12: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-13: CONJ 0 1 0 0 6 0 0 4
GlobalResAllocation-PT-05-CTLCardinality-14: CTL 0 0 1 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-15: CTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
55 CTL EXCL 4/2912 1/5 GlobalResAllocation-PT-05-CTLCardinality-14 54655 m, -778351 m/sec, 119185 t fired, .
58 CTL EXCL 25/244 1/5 GlobalResAllocation-PT-05-CTLCardinality-15 5073 m, 217 m/sec, 10438 t fired, .
64 EF FNDP 534/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 1532870 t fired, 2 attempts, .
65 EF STEQ 534/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 sara is running.
Time elapsed: 693 secs. Pages in use: 24
# running tasks: 4 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
GlobalResAllocation-PT-05-CTLCardinality-04: INITIAL false preprocessing
GlobalResAllocation-PT-05-CTLCardinality-07: CTL true CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-09: CTL false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
GlobalResAllocation-PT-05-CTLCardinality-00: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-01: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-02: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-03: EF 0 1 2 0 2 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-06: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-08: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-10: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-11: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-12: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-13: CONJ 0 1 0 0 6 0 0 4
GlobalResAllocation-PT-05-CTLCardinality-14: CTL 0 0 1 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-15: CTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
55 CTL EXCL 9/2912 1/5 GlobalResAllocation-PT-05-CTLCardinality-14 118227 m, 12714 m/sec, 263062 t fired, .
58 CTL EXCL 30/225 1/5 GlobalResAllocation-PT-05-CTLCardinality-15 6245 m, 234 m/sec, 12698 t fired, .
64 EF FNDP 539/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 1543410 t fired, 2 attempts, .
65 EF STEQ 539/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 sara is running.
Time elapsed: 698 secs. Pages in use: 24
# running tasks: 4 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
GlobalResAllocation-PT-05-CTLCardinality-04: INITIAL false preprocessing
GlobalResAllocation-PT-05-CTLCardinality-07: CTL true CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-09: CTL false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
GlobalResAllocation-PT-05-CTLCardinality-00: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-01: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-02: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-03: EF 0 1 2 0 2 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-06: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-08: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-10: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-11: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-12: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-13: CONJ 0 1 0 0 6 0 0 4
GlobalResAllocation-PT-05-CTLCardinality-14: CTL 0 0 1 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-15: CTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
55 CTL EXCL 14/2912 1/5 GlobalResAllocation-PT-05-CTLCardinality-14 184224 m, 13199 m/sec, 414745 t fired, .
58 CTL EXCL 35/225 1/5 GlobalResAllocation-PT-05-CTLCardinality-15 7698 m, 290 m/sec, 15639 t fired, .
64 EF FNDP 544/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 1552645 t fired, 2 attempts, .
65 EF STEQ 544/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 sara is running.
Time elapsed: 703 secs. Pages in use: 24
# running tasks: 4 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
GlobalResAllocation-PT-05-CTLCardinality-04: INITIAL false preprocessing
GlobalResAllocation-PT-05-CTLCardinality-07: CTL true CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-09: CTL false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
GlobalResAllocation-PT-05-CTLCardinality-00: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-01: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-02: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-03: EF 0 1 2 0 2 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-06: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-08: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-10: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-11: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-12: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-13: CONJ 0 1 0 0 6 0 0 4
GlobalResAllocation-PT-05-CTLCardinality-14: CTL 0 0 1 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-15: CTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
55 CTL EXCL 19/2912 2/5 GlobalResAllocation-PT-05-CTLCardinality-14 248308 m, 12816 m/sec, 564612 t fired, .
58 CTL EXCL 40/225 1/5 GlobalResAllocation-PT-05-CTLCardinality-15 8788 m, 218 m/sec, 17849 t fired, .
64 EF FNDP 549/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 1562736 t fired, 2 attempts, .
65 EF STEQ 549/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 sara is running.
Time elapsed: 708 secs. Pages in use: 25
# running tasks: 4 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
GlobalResAllocation-PT-05-CTLCardinality-04: INITIAL false preprocessing
GlobalResAllocation-PT-05-CTLCardinality-07: CTL true CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-09: CTL false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
GlobalResAllocation-PT-05-CTLCardinality-00: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-01: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-02: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-03: EF 0 1 2 0 2 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-06: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-08: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-10: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-11: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-12: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-13: CONJ 0 1 0 0 6 0 0 4
GlobalResAllocation-PT-05-CTLCardinality-14: CTL 0 0 1 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-15: CTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
55 CTL EXCL 24/2912 2/5 GlobalResAllocation-PT-05-CTLCardinality-14 313120 m, 12962 m/sec, 716341 t fired, .
58 CTL EXCL 45/225 1/5 GlobalResAllocation-PT-05-CTLCardinality-15 9914 m, 225 m/sec, 20310 t fired, .
64 EF FNDP 554/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 1573485 t fired, 2 attempts, .
65 EF STEQ 554/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 sara is running.
Time elapsed: 713 secs. Pages in use: 25
# running tasks: 4 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
GlobalResAllocation-PT-05-CTLCardinality-04: INITIAL false preprocessing
GlobalResAllocation-PT-05-CTLCardinality-07: CTL true CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-09: CTL false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
GlobalResAllocation-PT-05-CTLCardinality-00: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-01: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-02: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-03: EF 0 1 2 0 2 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-06: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-08: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-10: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-11: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-12: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-13: CONJ 0 1 0 0 6 0 0 4
GlobalResAllocation-PT-05-CTLCardinality-14: CTL 0 0 1 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-15: CTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
55 CTL EXCL 29/2912 2/5 GlobalResAllocation-PT-05-CTLCardinality-14 369645 m, 11305 m/sec, 848821 t fired, .
58 CTL EXCL 50/225 1/5 GlobalResAllocation-PT-05-CTLCardinality-15 11284 m, 274 m/sec, 23337 t fired, .
64 EF FNDP 559/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 1584570 t fired, 2 attempts, .
65 EF STEQ 559/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 sara is running.
Time elapsed: 718 secs. Pages in use: 25
# running tasks: 4 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
GlobalResAllocation-PT-05-CTLCardinality-04: INITIAL false preprocessing
GlobalResAllocation-PT-05-CTLCardinality-07: CTL true CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-09: CTL false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
GlobalResAllocation-PT-05-CTLCardinality-00: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-01: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-02: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-03: EF 0 1 2 0 2 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-06: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-08: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-10: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-11: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-12: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-13: CONJ 0 1 0 0 6 0 0 4
GlobalResAllocation-PT-05-CTLCardinality-14: CTL 0 0 1 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-15: CTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
55 CTL EXCL 34/2912 2/5 GlobalResAllocation-PT-05-CTLCardinality-14 431731 m, 12417 m/sec, 997096 t fired, .
58 CTL EXCL 55/225 1/5 GlobalResAllocation-PT-05-CTLCardinality-15 13072 m, 357 m/sec, 27372 t fired, .
64 EF FNDP 564/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 1595538 t fired, 2 attempts, .
65 EF STEQ 564/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 sara is running.
Time elapsed: 723 secs. Pages in use: 25
# running tasks: 4 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
GlobalResAllocation-PT-05-CTLCardinality-04: INITIAL false preprocessing
GlobalResAllocation-PT-05-CTLCardinality-07: CTL true CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-09: CTL false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
GlobalResAllocation-PT-05-CTLCardinality-00: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-01: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-02: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-03: EF 0 1 2 0 2 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-06: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-08: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-10: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-11: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-12: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-13: CONJ 0 1 0 0 6 0 0 4
GlobalResAllocation-PT-05-CTLCardinality-14: CTL 0 0 1 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-15: CTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
55 CTL EXCL 39/2912 3/5 GlobalResAllocation-PT-05-CTLCardinality-14 486536 m, 10961 m/sec, 1129971 t fired, .
58 CTL EXCL 60/225 1/5 GlobalResAllocation-PT-05-CTLCardinality-15 14481 m, 281 m/sec, 30516 t fired, .
64 EF FNDP 569/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 1606229 t fired, 2 attempts, .
65 EF STEQ 569/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 sara is running.
Time elapsed: 728 secs. Pages in use: 26
# running tasks: 4 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
GlobalResAllocation-PT-05-CTLCardinality-04: INITIAL false preprocessing
GlobalResAllocation-PT-05-CTLCardinality-07: CTL true CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-09: CTL false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
GlobalResAllocation-PT-05-CTLCardinality-00: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-01: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-02: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-03: EF 0 1 2 0 2 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-06: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-08: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-10: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-11: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-12: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-13: CONJ 0 1 0 0 6 0 0 4
GlobalResAllocation-PT-05-CTLCardinality-14: CTL 0 0 1 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-15: CTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
55 CTL EXCL 44/2912 3/5 GlobalResAllocation-PT-05-CTLCardinality-14 551661 m, 13025 m/sec, 1291745 t fired, .
58 CTL EXCL 65/225 1/5 GlobalResAllocation-PT-05-CTLCardinality-15 15707 m, 245 m/sec, 33402 t fired, .
64 EF FNDP 574/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 1616381 t fired, 2 attempts, .
65 EF STEQ 574/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 sara is running.
Time elapsed: 733 secs. Pages in use: 26
# running tasks: 4 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
GlobalResAllocation-PT-05-CTLCardinality-04: INITIAL false preprocessing
GlobalResAllocation-PT-05-CTLCardinality-07: CTL true CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-09: CTL false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
GlobalResAllocation-PT-05-CTLCardinality-00: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-01: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-02: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-03: EF 0 1 2 0 2 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-06: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-08: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-10: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-11: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-12: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-13: CONJ 0 1 0 0 6 0 0 4
GlobalResAllocation-PT-05-CTLCardinality-14: CTL 0 0 1 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-15: CTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
55 CTL EXCL 49/2912 3/5 GlobalResAllocation-PT-05-CTLCardinality-14 608464 m, 11360 m/sec, 1435337 t fired, .
58 CTL EXCL 70/225 1/5 GlobalResAllocation-PT-05-CTLCardinality-15 17068 m, 272 m/sec, 36536 t fired, .
64 EF FNDP 579/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 1627015 t fired, 2 attempts, .
65 EF STEQ 579/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 sara is running.
Time elapsed: 738 secs. Pages in use: 26
# running tasks: 4 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
GlobalResAllocation-PT-05-CTLCardinality-04: INITIAL false preprocessing
GlobalResAllocation-PT-05-CTLCardinality-07: CTL true CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-09: CTL false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
GlobalResAllocation-PT-05-CTLCardinality-00: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-01: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-02: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-03: EF 0 1 2 0 2 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-06: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-08: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-10: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-11: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-12: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-13: CONJ 0 1 0 0 6 0 0 4
GlobalResAllocation-PT-05-CTLCardinality-14: CTL 0 0 1 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-15: CTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
55 CTL EXCL 54/2912 3/5 GlobalResAllocation-PT-05-CTLCardinality-14 675955 m, 13498 m/sec, 1603398 t fired, .
58 CTL EXCL 75/225 1/5 GlobalResAllocation-PT-05-CTLCardinality-15 18658 m, 318 m/sec, 40232 t fired, .
64 EF FNDP 584/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 1636850 t fired, 2 attempts, .
65 EF STEQ 584/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 sara is running.
Time elapsed: 743 secs. Pages in use: 26
# running tasks: 4 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
GlobalResAllocation-PT-05-CTLCardinality-04: INITIAL false preprocessing
GlobalResAllocation-PT-05-CTLCardinality-07: CTL true CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-09: CTL false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
GlobalResAllocation-PT-05-CTLCardinality-00: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-01: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-02: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-03: EF 0 1 2 0 2 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-06: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-08: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-10: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-11: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-12: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-13: CONJ 0 1 0 0 6 0 0 4
GlobalResAllocation-PT-05-CTLCardinality-14: CTL 0 0 1 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-15: CTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
55 CTL EXCL 59/2912 4/5 GlobalResAllocation-PT-05-CTLCardinality-14 746582 m, 14125 m/sec, 1780524 t fired, .
58 CTL EXCL 80/225 1/5 GlobalResAllocation-PT-05-CTLCardinality-15 19992 m, 266 m/sec, 42911 t fired, .
64 EF FNDP 589/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 1646559 t fired, 2 attempts, .
65 EF STEQ 589/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 sara is running.
Time elapsed: 748 secs. Pages in use: 27
# running tasks: 4 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
GlobalResAllocation-PT-05-CTLCardinality-04: INITIAL false preprocessing
GlobalResAllocation-PT-05-CTLCardinality-07: CTL true CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-09: CTL false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
GlobalResAllocation-PT-05-CTLCardinality-00: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-01: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-02: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-03: EF 0 1 2 0 2 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-06: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-08: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-10: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-11: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-12: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-13: CONJ 0 1 0 0 6 0 0 4
GlobalResAllocation-PT-05-CTLCardinality-14: CTL 0 0 1 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-15: CTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
55 CTL EXCL 64/2912 4/5 GlobalResAllocation-PT-05-CTLCardinality-14 804288 m, 11541 m/sec, 1931049 t fired, .
58 CTL EXCL 85/225 1/5 GlobalResAllocation-PT-05-CTLCardinality-15 21334 m, 268 m/sec, 46021 t fired, .
64 EF FNDP 594/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 1657311 t fired, 2 attempts, .
65 EF STEQ 594/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 sara is running.
Time elapsed: 753 secs. Pages in use: 27
# running tasks: 4 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
GlobalResAllocation-PT-05-CTLCardinality-04: INITIAL false preprocessing
GlobalResAllocation-PT-05-CTLCardinality-07: CTL true CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-09: CTL false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
GlobalResAllocation-PT-05-CTLCardinality-00: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-01: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-02: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-03: EF 0 1 2 0 2 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-06: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-08: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-10: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-11: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-12: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-13: CONJ 0 1 0 0 6 0 0 4
GlobalResAllocation-PT-05-CTLCardinality-14: CTL 0 0 1 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-15: CTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
55 CTL EXCL 69/2912 4/5 GlobalResAllocation-PT-05-CTLCardinality-14 869687 m, 13079 m/sec, 2099062 t fired, .
58 CTL EXCL 90/225 1/5 GlobalResAllocation-PT-05-CTLCardinality-15 22846 m, 302 m/sec, 49190 t fired, .
64 EF FNDP 599/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 1667557 t fired, 2 attempts, .
65 EF STEQ 599/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 sara is running.
Time elapsed: 758 secs. Pages in use: 27
# running tasks: 4 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
GlobalResAllocation-PT-05-CTLCardinality-04: INITIAL false preprocessing
GlobalResAllocation-PT-05-CTLCardinality-07: CTL true CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-09: CTL false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
GlobalResAllocation-PT-05-CTLCardinality-00: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-01: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-02: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-03: EF 0 1 2 0 2 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-06: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-08: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-10: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-11: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-12: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-13: CONJ 0 1 0 0 6 0 0 4
GlobalResAllocation-PT-05-CTLCardinality-14: CTL 0 0 1 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-15: CTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
55 CTL EXCL 74/2912 5/5 GlobalResAllocation-PT-05-CTLCardinality-14 928084 m, 11679 m/sec, 2256301 t fired, .
58 CTL EXCL 95/225 1/5 GlobalResAllocation-PT-05-CTLCardinality-15 24390 m, 308 m/sec, 52522 t fired, .
64 EF FNDP 604/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 1678526 t fired, 2 attempts, .
65 EF STEQ 604/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 sara is running.
Time elapsed: 763 secs. Pages in use: 28
# running tasks: 4 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
GlobalResAllocation-PT-05-CTLCardinality-04: INITIAL false preprocessing
GlobalResAllocation-PT-05-CTLCardinality-07: CTL true CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-09: CTL false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
GlobalResAllocation-PT-05-CTLCardinality-00: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-01: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-02: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-03: EF 0 1 2 0 2 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-06: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-08: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-10: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-11: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-12: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-13: CONJ 0 1 0 0 6 0 0 4
GlobalResAllocation-PT-05-CTLCardinality-14: CTL 0 0 1 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-15: CTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
55 CTL EXCL 79/2912 5/5 GlobalResAllocation-PT-05-CTLCardinality-14 991798 m, 12742 m/sec, 2423410 t fired, .
58 CTL EXCL 100/225 1/5 GlobalResAllocation-PT-05-CTLCardinality-15 26236 m, 369 m/sec, 56827 t fired, .
64 EF FNDP 609/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 1688715 t fired, 2 attempts, .
65 EF STEQ 609/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 sara is running.
Time elapsed: 768 secs. Pages in use: 28
# running tasks: 4 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
GlobalResAllocation-PT-05-CTLCardinality-04: INITIAL false preprocessing
GlobalResAllocation-PT-05-CTLCardinality-07: CTL true CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-09: CTL false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
GlobalResAllocation-PT-05-CTLCardinality-00: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-01: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-02: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-03: EF 0 1 2 0 2 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-06: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-08: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-10: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-11: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-12: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-13: CONJ 0 1 0 0 6 0 0 4
GlobalResAllocation-PT-05-CTLCardinality-14: CTL 0 0 1 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-15: CTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
55 CTL EXCL 84/2912 5/5 GlobalResAllocation-PT-05-CTLCardinality-14 1060158 m, 13672 m/sec, 2604566 t fired, .
58 CTL EXCL 105/225 1/5 GlobalResAllocation-PT-05-CTLCardinality-15 27854 m, 323 m/sec, 60354 t fired, .
64 EF FNDP 614/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 1698513 t fired, 2 attempts, .
65 EF STEQ 614/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 sara is running.
Time elapsed: 773 secs. Pages in use: 28
# running tasks: 4 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
GlobalResAllocation-PT-05-CTLCardinality-04: INITIAL false preprocessing
GlobalResAllocation-PT-05-CTLCardinality-07: CTL true CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-09: CTL false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
GlobalResAllocation-PT-05-CTLCardinality-00: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-01: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-02: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-03: EF 0 1 2 0 2 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-06: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-08: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-10: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-11: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-12: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-13: CONJ 0 1 0 0 6 0 0 4
GlobalResAllocation-PT-05-CTLCardinality-14: CTL 0 0 1 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-15: CTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
55 CTL EXCL 89/2912 5/5 GlobalResAllocation-PT-05-CTLCardinality-14 1126635 m, 13295 m/sec, 2788135 t fired, .
58 CTL EXCL 110/225 1/5 GlobalResAllocation-PT-05-CTLCardinality-15 29444 m, 318 m/sec, 64132 t fired, .
64 EF FNDP 619/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 1709042 t fired, 2 attempts, .
65 EF STEQ 619/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 sara is running.
Time elapsed: 778 secs. Pages in use: 28
# running tasks: 4 of 4 Visible: 16
lola: CANCELED task # 55 (type EXCL) for GlobalResAllocation-PT-05-CTLCardinality-14 (memory limit exceeded)
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
GlobalResAllocation-PT-05-CTLCardinality-04: INITIAL false preprocessing
GlobalResAllocation-PT-05-CTLCardinality-07: CTL true CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-09: CTL false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
GlobalResAllocation-PT-05-CTLCardinality-00: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-01: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-02: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-03: EF 0 1 2 0 2 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-06: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-08: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-10: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-11: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-12: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-13: CONJ 0 1 0 0 6 0 0 4
GlobalResAllocation-PT-05-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0
GlobalResAllocation-PT-05-CTLCardinality-15: CTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
58 CTL EXCL 115/225 1/5 GlobalResAllocation-PT-05-CTLCardinality-15 31336 m, 378 m/sec, 68143 t fired, .
64 EF FNDP 624/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 1721407 t fired, 2 attempts, .
65 EF STEQ 624/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 sara is running.
Time elapsed: 783 secs. Pages in use: 28
# running tasks: 4 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
GlobalResAllocation-PT-05-CTLCardinality-04: INITIAL false preprocessing
GlobalResAllocation-PT-05-CTLCardinality-07: CTL true CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-09: CTL false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
GlobalResAllocation-PT-05-CTLCardinality-00: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-01: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-02: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-03: EF 0 1 2 0 2 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-06: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-08: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-10: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-11: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-12: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-13: CONJ 0 1 0 0 6 0 0 4
GlobalResAllocation-PT-05-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0
GlobalResAllocation-PT-05-CTLCardinality-15: CTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
58 CTL EXCL 120/244 1/5 GlobalResAllocation-PT-05-CTLCardinality-15 33185 m, 369 m/sec, 72247 t fired, .
64 EF FNDP 629/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 1732825 t fired, 2 attempts, .
65 EF STEQ 629/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 sara is running.
Time elapsed: 788 secs. Pages in use: 28
# running tasks: 3 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
GlobalResAllocation-PT-05-CTLCardinality-04: INITIAL false preprocessing
GlobalResAllocation-PT-05-CTLCardinality-07: CTL true CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-09: CTL false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
GlobalResAllocation-PT-05-CTLCardinality-00: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-01: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-02: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-03: EF 0 1 2 0 2 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-06: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-08: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-10: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-11: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-12: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-13: CONJ 0 1 0 0 6 0 0 4
GlobalResAllocation-PT-05-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0
GlobalResAllocation-PT-05-CTLCardinality-15: CTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
58 CTL EXCL 125/244 1/5 GlobalResAllocation-PT-05-CTLCardinality-15 35324 m, 427 m/sec, 76724 t fired, .
64 EF FNDP 634/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 1745497 t fired, 2 attempts, .
65 EF STEQ 634/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 sara is running.
Time elapsed: 793 secs. Pages in use: 28
# running tasks: 3 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
GlobalResAllocation-PT-05-CTLCardinality-04: INITIAL false preprocessing
GlobalResAllocation-PT-05-CTLCardinality-07: CTL true CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-09: CTL false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
GlobalResAllocation-PT-05-CTLCardinality-00: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-01: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-02: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-03: EF 0 1 2 0 2 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-06: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-08: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-10: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-11: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-12: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-13: CONJ 0 1 0 0 6 0 0 4
GlobalResAllocation-PT-05-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0
GlobalResAllocation-PT-05-CTLCardinality-15: CTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
58 CTL EXCL 130/244 1/5 GlobalResAllocation-PT-05-CTLCardinality-15 37875 m, 510 m/sec, 82092 t fired, .
64 EF FNDP 639/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 1757379 t fired, 2 attempts, .
65 EF STEQ 639/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 sara is running.
Time elapsed: 798 secs. Pages in use: 28
# running tasks: 3 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
GlobalResAllocation-PT-05-CTLCardinality-04: INITIAL false preprocessing
GlobalResAllocation-PT-05-CTLCardinality-07: CTL true CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-09: CTL false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
GlobalResAllocation-PT-05-CTLCardinality-00: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-01: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-02: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-03: EF 0 1 2 0 2 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-06: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-08: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-10: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-11: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-12: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-13: CONJ 0 1 0 0 6 0 0 4
GlobalResAllocation-PT-05-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0
GlobalResAllocation-PT-05-CTLCardinality-15: CTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
58 CTL EXCL 135/244 1/5 GlobalResAllocation-PT-05-CTLCardinality-15 39988 m, 422 m/sec, 86729 t fired, .
64 EF FNDP 644/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 1770004 t fired, 2 attempts, .
65 EF STEQ 644/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 sara is running.
Time elapsed: 803 secs. Pages in use: 28
# running tasks: 3 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
GlobalResAllocation-PT-05-CTLCardinality-04: INITIAL false preprocessing
GlobalResAllocation-PT-05-CTLCardinality-07: CTL true CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-09: CTL false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
GlobalResAllocation-PT-05-CTLCardinality-00: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-01: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-02: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-03: EF 0 1 2 0 2 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-06: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-08: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-10: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-11: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-12: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-13: CONJ 0 1 0 0 6 0 0 4
GlobalResAllocation-PT-05-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0
GlobalResAllocation-PT-05-CTLCardinality-15: CTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
58 CTL EXCL 140/244 1/5 GlobalResAllocation-PT-05-CTLCardinality-15 42133 m, 429 m/sec, 91452 t fired, .
64 EF FNDP 649/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 1781082 t fired, 2 attempts, .
65 EF STEQ 649/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 sara is running.
Time elapsed: 808 secs. Pages in use: 28
# running tasks: 3 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
GlobalResAllocation-PT-05-CTLCardinality-04: INITIAL false preprocessing
GlobalResAllocation-PT-05-CTLCardinality-07: CTL true CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-09: CTL false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
GlobalResAllocation-PT-05-CTLCardinality-00: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-01: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-02: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-03: EF 0 1 2 0 2 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-06: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-08: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-10: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-11: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-12: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-13: CONJ 0 1 0 0 6 0 0 4
GlobalResAllocation-PT-05-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0
GlobalResAllocation-PT-05-CTLCardinality-15: CTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
58 CTL EXCL 145/244 1/5 GlobalResAllocation-PT-05-CTLCardinality-15 44062 m, 385 m/sec, 95845 t fired, .
64 EF FNDP 654/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 1793407 t fired, 2 attempts, .
65 EF STEQ 654/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 sara is running.
Time elapsed: 813 secs. Pages in use: 28
# running tasks: 3 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
GlobalResAllocation-PT-05-CTLCardinality-04: INITIAL false preprocessing
GlobalResAllocation-PT-05-CTLCardinality-07: CTL true CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-09: CTL false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
GlobalResAllocation-PT-05-CTLCardinality-00: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-01: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-02: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-03: EF 0 1 2 0 2 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-06: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-08: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-10: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-11: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-12: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-13: CONJ 0 1 0 0 6 0 0 4
GlobalResAllocation-PT-05-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0
GlobalResAllocation-PT-05-CTLCardinality-15: CTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
58 CTL EXCL 150/244 1/5 GlobalResAllocation-PT-05-CTLCardinality-15 45921 m, 371 m/sec, 99891 t fired, .
64 EF FNDP 659/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 1806133 t fired, 2 attempts, .
65 EF STEQ 659/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 sara is running.
Time elapsed: 818 secs. Pages in use: 28
# running tasks: 3 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
GlobalResAllocation-PT-05-CTLCardinality-04: INITIAL false preprocessing
GlobalResAllocation-PT-05-CTLCardinality-07: CTL true CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-09: CTL false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
GlobalResAllocation-PT-05-CTLCardinality-00: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-01: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-02: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-03: EF 0 1 2 0 2 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-06: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-08: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-10: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-11: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-12: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-13: CONJ 0 1 0 0 6 0 0 4
GlobalResAllocation-PT-05-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0
GlobalResAllocation-PT-05-CTLCardinality-15: CTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
58 CTL EXCL 155/244 1/5 GlobalResAllocation-PT-05-CTLCardinality-15 47392 m, 294 m/sec, 103119 t fired, .
64 EF FNDP 664/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 1817797 t fired, 2 attempts, .
65 EF STEQ 664/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 sara is running.
Time elapsed: 823 secs. Pages in use: 28
# running tasks: 3 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
GlobalResAllocation-PT-05-CTLCardinality-04: INITIAL false preprocessing
GlobalResAllocation-PT-05-CTLCardinality-07: CTL true CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-09: CTL false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
GlobalResAllocation-PT-05-CTLCardinality-00: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-01: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-02: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-03: EF 0 1 2 0 2 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-06: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-08: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-10: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-11: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-12: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-13: CONJ 0 1 0 0 6 0 0 4
GlobalResAllocation-PT-05-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0
GlobalResAllocation-PT-05-CTLCardinality-15: CTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
58 CTL EXCL 160/244 1/5 GlobalResAllocation-PT-05-CTLCardinality-15 49363 m, 394 m/sec, 107639 t fired, .
64 EF FNDP 669/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 1828674 t fired, 2 attempts, .
65 EF STEQ 669/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 sara is running.
Time elapsed: 828 secs. Pages in use: 28
# running tasks: 3 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
GlobalResAllocation-PT-05-CTLCardinality-04: INITIAL false preprocessing
GlobalResAllocation-PT-05-CTLCardinality-07: CTL true CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-09: CTL false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
GlobalResAllocation-PT-05-CTLCardinality-00: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-01: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-02: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-03: EF 0 1 2 0 2 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-06: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-08: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-10: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-11: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-12: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-13: CONJ 0 1 0 0 6 0 0 4
GlobalResAllocation-PT-05-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0
GlobalResAllocation-PT-05-CTLCardinality-15: CTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
58 CTL EXCL 165/244 1/5 GlobalResAllocation-PT-05-CTLCardinality-15 51395 m, 406 m/sec, 112341 t fired, .
64 EF FNDP 674/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 1843181 t fired, 2 attempts, .
65 EF STEQ 674/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 sara is running.
Time elapsed: 833 secs. Pages in use: 28
# running tasks: 3 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
GlobalResAllocation-PT-05-CTLCardinality-04: INITIAL false preprocessing
GlobalResAllocation-PT-05-CTLCardinality-07: CTL true CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-09: CTL false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
GlobalResAllocation-PT-05-CTLCardinality-00: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-01: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-02: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-03: EF 0 1 2 0 2 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-06: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-08: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-10: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-11: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-12: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-13: CONJ 0 1 0 0 6 0 0 4
GlobalResAllocation-PT-05-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0
GlobalResAllocation-PT-05-CTLCardinality-15: CTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
58 CTL EXCL 170/244 1/5 GlobalResAllocation-PT-05-CTLCardinality-15 53283 m, 377 m/sec, 116179 t fired, .
64 EF FNDP 679/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 1855529 t fired, 2 attempts, .
65 EF STEQ 679/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 sara is running.
Time elapsed: 838 secs. Pages in use: 28
# running tasks: 3 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
GlobalResAllocation-PT-05-CTLCardinality-04: INITIAL false preprocessing
GlobalResAllocation-PT-05-CTLCardinality-07: CTL true CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-09: CTL false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
GlobalResAllocation-PT-05-CTLCardinality-00: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-01: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-02: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-03: EF 0 1 2 0 2 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-06: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-08: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-10: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-11: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-12: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-13: CONJ 0 1 0 0 6 0 0 4
GlobalResAllocation-PT-05-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0
GlobalResAllocation-PT-05-CTLCardinality-15: CTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
58 CTL EXCL 175/244 1/5 GlobalResAllocation-PT-05-CTLCardinality-15 55639 m, 471 m/sec, 121266 t fired, .
64 EF FNDP 684/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 1868223 t fired, 2 attempts, .
65 EF STEQ 684/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 sara is running.
Time elapsed: 843 secs. Pages in use: 28
# running tasks: 3 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
GlobalResAllocation-PT-05-CTLCardinality-04: INITIAL false preprocessing
GlobalResAllocation-PT-05-CTLCardinality-07: CTL true CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-09: CTL false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
GlobalResAllocation-PT-05-CTLCardinality-00: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-01: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-02: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-03: EF 0 1 2 0 2 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-06: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-08: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-10: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-11: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-12: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-13: CONJ 0 1 0 0 6 0 0 4
GlobalResAllocation-PT-05-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0
GlobalResAllocation-PT-05-CTLCardinality-15: CTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
58 CTL EXCL 180/244 1/5 GlobalResAllocation-PT-05-CTLCardinality-15 57648 m, 401 m/sec, 126030 t fired, .
64 EF FNDP 689/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 1881711 t fired, 2 attempts, .
65 EF STEQ 689/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 sara is running.
Time elapsed: 848 secs. Pages in use: 28
# running tasks: 3 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
GlobalResAllocation-PT-05-CTLCardinality-04: INITIAL false preprocessing
GlobalResAllocation-PT-05-CTLCardinality-07: CTL true CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-09: CTL false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
GlobalResAllocation-PT-05-CTLCardinality-00: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-01: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-02: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-03: EF 0 1 2 0 2 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-06: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-08: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-10: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-11: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-12: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-13: CONJ 0 1 0 0 6 0 0 4
GlobalResAllocation-PT-05-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0
GlobalResAllocation-PT-05-CTLCardinality-15: CTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
58 CTL EXCL 185/244 1/5 GlobalResAllocation-PT-05-CTLCardinality-15 59734 m, 417 m/sec, 130596 t fired, .
64 EF FNDP 694/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 1894796 t fired, 2 attempts, .
65 EF STEQ 694/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 sara is running.
Time elapsed: 853 secs. Pages in use: 28
# running tasks: 3 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
GlobalResAllocation-PT-05-CTLCardinality-04: INITIAL false preprocessing
GlobalResAllocation-PT-05-CTLCardinality-07: CTL true CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-09: CTL false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
GlobalResAllocation-PT-05-CTLCardinality-00: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-01: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-02: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-03: EF 0 1 2 0 2 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-06: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-08: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-10: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-11: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-12: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-13: CONJ 0 1 0 0 6 0 0 4
GlobalResAllocation-PT-05-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0
GlobalResAllocation-PT-05-CTLCardinality-15: CTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
58 CTL EXCL 190/244 1/5 GlobalResAllocation-PT-05-CTLCardinality-15 61588 m, 370 m/sec, 134498 t fired, .
64 EF FNDP 699/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 1906645 t fired, 2 attempts, .
65 EF STEQ 699/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 sara is running.
Time elapsed: 858 secs. Pages in use: 28
# running tasks: 3 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
GlobalResAllocation-PT-05-CTLCardinality-04: INITIAL false preprocessing
GlobalResAllocation-PT-05-CTLCardinality-07: CTL true CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-09: CTL false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
GlobalResAllocation-PT-05-CTLCardinality-00: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-01: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-02: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-03: EF 0 1 2 0 2 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-06: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-08: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-10: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-11: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-12: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-13: CONJ 0 1 0 0 6 0 0 4
GlobalResAllocation-PT-05-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0
GlobalResAllocation-PT-05-CTLCardinality-15: CTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
58 CTL EXCL 195/244 1/5 GlobalResAllocation-PT-05-CTLCardinality-15 63901 m, 462 m/sec, 139729 t fired, .
64 EF FNDP 704/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 1918898 t fired, 2 attempts, .
65 EF STEQ 704/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 sara is running.
Time elapsed: 863 secs. Pages in use: 28
# running tasks: 3 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
GlobalResAllocation-PT-05-CTLCardinality-04: INITIAL false preprocessing
GlobalResAllocation-PT-05-CTLCardinality-07: CTL true CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-09: CTL false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
GlobalResAllocation-PT-05-CTLCardinality-00: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-01: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-02: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-03: EF 0 1 2 0 2 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-06: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-08: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-10: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-11: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-12: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-13: CONJ 0 1 0 0 6 0 0 4
GlobalResAllocation-PT-05-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0
GlobalResAllocation-PT-05-CTLCardinality-15: CTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
58 CTL EXCL 200/244 1/5 GlobalResAllocation-PT-05-CTLCardinality-15 66752 m, 570 m/sec, 146313 t fired, .
64 EF FNDP 709/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 1931273 t fired, 2 attempts, .
65 EF STEQ 709/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 sara is running.
Time elapsed: 868 secs. Pages in use: 28
# running tasks: 3 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
GlobalResAllocation-PT-05-CTLCardinality-04: INITIAL false preprocessing
GlobalResAllocation-PT-05-CTLCardinality-07: CTL true CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-09: CTL false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
GlobalResAllocation-PT-05-CTLCardinality-00: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-01: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-02: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-03: EF 0 1 2 0 2 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-06: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-08: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-10: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-11: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-12: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-13: CONJ 0 1 0 0 6 0 0 4
GlobalResAllocation-PT-05-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0
GlobalResAllocation-PT-05-CTLCardinality-15: CTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
58 CTL EXCL 205/244 1/5 GlobalResAllocation-PT-05-CTLCardinality-15 68702 m, 390 m/sec, 150847 t fired, .
64 EF FNDP 714/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 1941856 t fired, 2 attempts, .
65 EF STEQ 714/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 sara is running.
Time elapsed: 873 secs. Pages in use: 28
# running tasks: 3 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
GlobalResAllocation-PT-05-CTLCardinality-04: INITIAL false preprocessing
GlobalResAllocation-PT-05-CTLCardinality-07: CTL true CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-09: CTL false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
GlobalResAllocation-PT-05-CTLCardinality-00: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-01: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-02: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-03: EF 0 1 2 0 2 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-06: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-08: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-10: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-11: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-12: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-13: CONJ 0 1 0 0 6 0 0 4
GlobalResAllocation-PT-05-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0
GlobalResAllocation-PT-05-CTLCardinality-15: CTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
58 CTL EXCL 210/244 1/5 GlobalResAllocation-PT-05-CTLCardinality-15 70872 m, 434 m/sec, 156219 t fired, .
64 EF FNDP 719/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 1953199 t fired, 2 attempts, .
65 EF STEQ 719/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 sara is running.
Time elapsed: 878 secs. Pages in use: 28
# running tasks: 3 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
GlobalResAllocation-PT-05-CTLCardinality-04: INITIAL false preprocessing
GlobalResAllocation-PT-05-CTLCardinality-07: CTL true CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-09: CTL false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
GlobalResAllocation-PT-05-CTLCardinality-00: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-01: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-02: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-03: EF 0 1 2 0 2 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-06: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-08: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-10: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-11: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-12: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-13: CONJ 0 1 0 0 6 0 0 4
GlobalResAllocation-PT-05-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0
GlobalResAllocation-PT-05-CTLCardinality-15: CTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
58 CTL EXCL 215/244 1/5 GlobalResAllocation-PT-05-CTLCardinality-15 72815 m, 388 m/sec, 160474 t fired, .
64 EF FNDP 724/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 1966241 t fired, 2 attempts, .
65 EF STEQ 724/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 sara is running.
Time elapsed: 883 secs. Pages in use: 28
# running tasks: 3 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
GlobalResAllocation-PT-05-CTLCardinality-04: INITIAL false preprocessing
GlobalResAllocation-PT-05-CTLCardinality-07: CTL true CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-09: CTL false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
GlobalResAllocation-PT-05-CTLCardinality-00: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-01: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-02: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-03: EF 0 1 2 0 2 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-06: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-08: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-10: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-11: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-12: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-13: CONJ 0 1 0 0 6 0 0 4
GlobalResAllocation-PT-05-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0
GlobalResAllocation-PT-05-CTLCardinality-15: CTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
58 CTL EXCL 220/244 1/5 GlobalResAllocation-PT-05-CTLCardinality-15 75279 m, 492 m/sec, 165777 t fired, .
64 EF FNDP 729/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 1977780 t fired, 2 attempts, .
65 EF STEQ 729/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 sara is running.
Time elapsed: 888 secs. Pages in use: 28
# running tasks: 3 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
GlobalResAllocation-PT-05-CTLCardinality-04: INITIAL false preprocessing
GlobalResAllocation-PT-05-CTLCardinality-07: CTL true CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-09: CTL false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
GlobalResAllocation-PT-05-CTLCardinality-00: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-01: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-02: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-03: EF 0 1 2 0 2 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-06: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-08: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-10: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-11: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-12: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-13: CONJ 0 1 0 0 6 0 0 4
GlobalResAllocation-PT-05-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0
GlobalResAllocation-PT-05-CTLCardinality-15: CTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
58 CTL EXCL 225/244 1/5 GlobalResAllocation-PT-05-CTLCardinality-15 76833 m, 310 m/sec, 169171 t fired, .
64 EF FNDP 734/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 1989988 t fired, 2 attempts, .
65 EF STEQ 734/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 sara is running.
Time elapsed: 893 secs. Pages in use: 28
# running tasks: 3 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
GlobalResAllocation-PT-05-CTLCardinality-04: INITIAL false preprocessing
GlobalResAllocation-PT-05-CTLCardinality-07: CTL true CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-09: CTL false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
GlobalResAllocation-PT-05-CTLCardinality-00: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-01: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-02: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-03: EF 0 1 2 0 2 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-06: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-08: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-10: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-11: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-12: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-13: CONJ 0 1 0 0 6 0 0 4
GlobalResAllocation-PT-05-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0
GlobalResAllocation-PT-05-CTLCardinality-15: CTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
58 CTL EXCL 230/244 1/5 GlobalResAllocation-PT-05-CTLCardinality-15 79204 m, 474 m/sec, 174890 t fired, .
64 EF FNDP 739/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 2001479 t fired, 3 attempts, .
65 EF STEQ 739/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 sara is running.
Time elapsed: 898 secs. Pages in use: 28
# running tasks: 3 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
GlobalResAllocation-PT-05-CTLCardinality-04: INITIAL false preprocessing
GlobalResAllocation-PT-05-CTLCardinality-07: CTL true CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-09: CTL false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
GlobalResAllocation-PT-05-CTLCardinality-00: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-01: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-02: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-03: EF 0 1 2 0 2 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-06: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-08: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-10: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-11: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-12: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-13: CONJ 0 1 0 0 6 0 0 4
GlobalResAllocation-PT-05-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0
GlobalResAllocation-PT-05-CTLCardinality-15: CTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
58 CTL EXCL 235/244 1/5 GlobalResAllocation-PT-05-CTLCardinality-15 80940 m, 347 m/sec, 178995 t fired, .
64 EF FNDP 744/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 2014784 t fired, 3 attempts, .
65 EF STEQ 744/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 sara is running.
Time elapsed: 903 secs. Pages in use: 28
# running tasks: 3 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
GlobalResAllocation-PT-05-CTLCardinality-04: INITIAL false preprocessing
GlobalResAllocation-PT-05-CTLCardinality-07: CTL true CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-09: CTL false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
GlobalResAllocation-PT-05-CTLCardinality-00: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-01: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-02: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-03: EF 0 1 2 0 2 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-06: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-08: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-10: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-11: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-12: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-13: CONJ 0 1 0 0 6 0 0 4
GlobalResAllocation-PT-05-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0
GlobalResAllocation-PT-05-CTLCardinality-15: CTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
58 CTL EXCL 240/244 1/5 GlobalResAllocation-PT-05-CTLCardinality-15 83066 m, 425 m/sec, 184015 t fired, .
64 EF FNDP 749/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 2027244 t fired, 3 attempts, .
65 EF STEQ 749/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 sara is running.
Time elapsed: 908 secs. Pages in use: 28
# running tasks: 3 of 4 Visible: 16
lola: CANCELED task # 58 (type EXCL) for GlobalResAllocation-PT-05-CTLCardinality-15 (local timeout)
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
GlobalResAllocation-PT-05-CTLCardinality-04: INITIAL false preprocessing
GlobalResAllocation-PT-05-CTLCardinality-07: CTL true CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-09: CTL false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
GlobalResAllocation-PT-05-CTLCardinality-00: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-01: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-02: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-03: EF 0 1 2 0 2 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-06: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-08: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-10: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-11: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-12: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-13: CONJ 0 1 0 0 6 0 0 4
GlobalResAllocation-PT-05-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0
GlobalResAllocation-PT-05-CTLCardinality-15: CTL 0 0 0 0 1 1 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
64 EF FNDP 754/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 2039346 t fired, 3 attempts, .
65 EF STEQ 754/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 sara is running.
Time elapsed: 913 secs. Pages in use: 28
# running tasks: 3 of 4 Visible: 16
lola: LAUNCH task # 42 (type EXCL) for 39 GlobalResAllocation-PT-05-CTLCardinality-13
lola: time limit : 244 sec
lola: memory limit: 32 pages
lola: LAUNCH task # 58 (type EXCL) for 57 GlobalResAllocation-PT-05-CTLCardinality-15
lola: time limit : 2687 sec
lola: memory limit: 5 pages
lola: FINISHED task # 42 (type EXCL) for GlobalResAllocation-PT-05-CTLCardinality-13
lola: result : true
lola: markings : 8
lola: fired transitions : 14
lola: time used : 1.000000
lola: memory pages used : 1
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
GlobalResAllocation-PT-05-CTLCardinality-04: INITIAL false preprocessing
GlobalResAllocation-PT-05-CTLCardinality-07: CTL true CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-09: CTL false CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-13: CONJ true CONJ
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
GlobalResAllocation-PT-05-CTLCardinality-00: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-01: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-02: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-03: EF 0 1 2 0 2 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-06: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-08: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-10: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-11: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-12: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0
GlobalResAllocation-PT-05-CTLCardinality-15: CTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
58 CTL EXCL 4/244 1/5 GlobalResAllocation-PT-05-CTLCardinality-15 738 m, -16465 m/sec, 1647 t fired, .
64 EF FNDP 759/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 2049707 t fired, 3 attempts, .
65 EF STEQ 759/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 sara is running.
Time elapsed: 918 secs. Pages in use: 28
# running tasks: 3 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
GlobalResAllocation-PT-05-CTLCardinality-04: INITIAL false preprocessing
GlobalResAllocation-PT-05-CTLCardinality-07: CTL true CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-09: CTL false CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-13: CONJ true CONJ
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
GlobalResAllocation-PT-05-CTLCardinality-00: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-01: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-02: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-03: EF 0 1 2 0 2 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-06: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-08: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-10: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-11: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-12: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0
GlobalResAllocation-PT-05-CTLCardinality-15: CTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
58 CTL EXCL 9/244 1/5 GlobalResAllocation-PT-05-CTLCardinality-15 1854 m, 223 m/sec, 4016 t fired, .
64 EF FNDP 764/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 2060064 t fired, 3 attempts, .
65 EF STEQ 764/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 sara is running.
Time elapsed: 923 secs. Pages in use: 28
# running tasks: 3 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
GlobalResAllocation-PT-05-CTLCardinality-04: INITIAL false preprocessing
GlobalResAllocation-PT-05-CTLCardinality-07: CTL true CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-09: CTL false CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-13: CONJ true CONJ
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
GlobalResAllocation-PT-05-CTLCardinality-00: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-01: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-02: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-03: EF 0 1 2 0 2 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-06: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-08: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-10: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-11: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-12: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0
GlobalResAllocation-PT-05-CTLCardinality-15: CTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
58 CTL EXCL 14/244 1/5 GlobalResAllocation-PT-05-CTLCardinality-15 3000 m, 229 m/sec, 6174 t fired, .
64 EF FNDP 769/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 2069892 t fired, 3 attempts, .
65 EF STEQ 769/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 sara is running.
Time elapsed: 928 secs. Pages in use: 28
# running tasks: 3 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
GlobalResAllocation-PT-05-CTLCardinality-04: INITIAL false preprocessing
GlobalResAllocation-PT-05-CTLCardinality-07: CTL true CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-09: CTL false CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-13: CONJ true CONJ
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
GlobalResAllocation-PT-05-CTLCardinality-00: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-01: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-02: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-03: EF 0 1 2 0 2 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-06: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-08: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-10: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-11: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-12: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0
GlobalResAllocation-PT-05-CTLCardinality-15: CTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
58 CTL EXCL 19/244 1/5 GlobalResAllocation-PT-05-CTLCardinality-15 4237 m, 247 m/sec, 8723 t fired, .
64 EF FNDP 774/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 2079623 t fired, 3 attempts, .
65 EF STEQ 774/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 sara is running.
Time elapsed: 933 secs. Pages in use: 28
# running tasks: 3 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
GlobalResAllocation-PT-05-CTLCardinality-04: INITIAL false preprocessing
GlobalResAllocation-PT-05-CTLCardinality-07: CTL true CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-09: CTL false CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-13: CONJ true CONJ
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
GlobalResAllocation-PT-05-CTLCardinality-00: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-01: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-02: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-03: EF 0 1 2 0 2 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-06: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-08: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-10: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-11: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-12: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0
GlobalResAllocation-PT-05-CTLCardinality-15: CTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
58 CTL EXCL 24/244 1/5 GlobalResAllocation-PT-05-CTLCardinality-15 5288 m, 210 m/sec, 10827 t fired, .
64 EF FNDP 779/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 2089190 t fired, 3 attempts, .
65 EF STEQ 779/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 sara is running.
Time elapsed: 938 secs. Pages in use: 28
# running tasks: 3 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
GlobalResAllocation-PT-05-CTLCardinality-04: INITIAL false preprocessing
GlobalResAllocation-PT-05-CTLCardinality-07: CTL true CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-09: CTL false CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-13: CONJ true CONJ
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
GlobalResAllocation-PT-05-CTLCardinality-00: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-01: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-02: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-03: EF 0 1 2 0 2 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-06: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-08: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-10: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-11: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-12: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0
GlobalResAllocation-PT-05-CTLCardinality-15: CTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
58 CTL EXCL 29/244 1/5 GlobalResAllocation-PT-05-CTLCardinality-15 6329 m, 208 m/sec, 12919 t fired, .
64 EF FNDP 784/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 2099244 t fired, 3 attempts, .
65 EF STEQ 784/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 sara is running.
Time elapsed: 943 secs. Pages in use: 28
# running tasks: 3 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
GlobalResAllocation-PT-05-CTLCardinality-04: INITIAL false preprocessing
GlobalResAllocation-PT-05-CTLCardinality-07: CTL true CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-09: CTL false CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-13: CONJ true CONJ
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
GlobalResAllocation-PT-05-CTLCardinality-00: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-01: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-02: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-03: EF 0 1 2 0 2 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-06: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-08: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-10: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-11: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-12: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0
GlobalResAllocation-PT-05-CTLCardinality-15: CTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
58 CTL EXCL 34/244 1/5 GlobalResAllocation-PT-05-CTLCardinality-15 7927 m, 319 m/sec, 16099 t fired, .
64 EF FNDP 789/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 2109118 t fired, 3 attempts, .
65 EF STEQ 789/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 sara is running.
Time elapsed: 948 secs. Pages in use: 28
# running tasks: 3 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
GlobalResAllocation-PT-05-CTLCardinality-04: INITIAL false preprocessing
GlobalResAllocation-PT-05-CTLCardinality-07: CTL true CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-09: CTL false CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-13: CONJ true CONJ
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
GlobalResAllocation-PT-05-CTLCardinality-00: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-01: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-02: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-03: EF 0 1 2 0 2 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-06: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-08: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-10: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-11: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-12: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0
GlobalResAllocation-PT-05-CTLCardinality-15: CTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
58 CTL EXCL 39/244 1/5 GlobalResAllocation-PT-05-CTLCardinality-15 9279 m, 270 m/sec, 18886 t fired, .
64 EF FNDP 794/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 2118565 t fired, 3 attempts, .
65 EF STEQ 794/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 sara is running.
Time elapsed: 953 secs. Pages in use: 28
# running tasks: 3 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
GlobalResAllocation-PT-05-CTLCardinality-04: INITIAL false preprocessing
GlobalResAllocation-PT-05-CTLCardinality-07: CTL true CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-09: CTL false CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-13: CONJ true CONJ
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
GlobalResAllocation-PT-05-CTLCardinality-00: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-01: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-02: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-03: EF 0 1 2 0 2 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-06: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-08: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-10: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-11: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-12: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0
GlobalResAllocation-PT-05-CTLCardinality-15: CTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
58 CTL EXCL 44/244 1/5 GlobalResAllocation-PT-05-CTLCardinality-15 10622 m, 268 m/sec, 21847 t fired, .
64 EF FNDP 799/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 2126961 t fired, 3 attempts, .
65 EF STEQ 799/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 sara is running.
Time elapsed: 958 secs. Pages in use: 28
# running tasks: 3 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
GlobalResAllocation-PT-05-CTLCardinality-04: INITIAL false preprocessing
GlobalResAllocation-PT-05-CTLCardinality-07: CTL true CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-09: CTL false CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-13: CONJ true CONJ
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
GlobalResAllocation-PT-05-CTLCardinality-00: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-01: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-02: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-03: EF 0 1 2 0 2 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-06: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-08: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-10: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-11: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-12: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0
GlobalResAllocation-PT-05-CTLCardinality-15: CTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
58 CTL EXCL 49/244 1/5 GlobalResAllocation-PT-05-CTLCardinality-15 12031 m, 281 m/sec, 25130 t fired, .
64 EF FNDP 804/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 2137580 t fired, 3 attempts, .
65 EF STEQ 804/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 sara is running.
Time elapsed: 963 secs. Pages in use: 28
# running tasks: 3 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
GlobalResAllocation-PT-05-CTLCardinality-04: INITIAL false preprocessing
GlobalResAllocation-PT-05-CTLCardinality-07: CTL true CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-09: CTL false CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-13: CONJ true CONJ
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
GlobalResAllocation-PT-05-CTLCardinality-00: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-01: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-02: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-03: EF 0 1 2 0 2 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-06: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-08: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-10: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-11: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-12: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0
GlobalResAllocation-PT-05-CTLCardinality-15: CTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
58 CTL EXCL 54/244 1/5 GlobalResAllocation-PT-05-CTLCardinality-15 13344 m, 262 m/sec, 27982 t fired, .
64 EF FNDP 809/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 2146421 t fired, 3 attempts, .
65 EF STEQ 809/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 sara is running.
Time elapsed: 968 secs. Pages in use: 28
# running tasks: 3 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
GlobalResAllocation-PT-05-CTLCardinality-04: INITIAL false preprocessing
GlobalResAllocation-PT-05-CTLCardinality-07: CTL true CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-09: CTL false CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-13: CONJ true CONJ
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
GlobalResAllocation-PT-05-CTLCardinality-00: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-01: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-02: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-03: EF 0 1 2 0 2 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-06: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-08: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-10: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-11: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-12: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0
GlobalResAllocation-PT-05-CTLCardinality-15: CTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
58 CTL EXCL 59/244 1/5 GlobalResAllocation-PT-05-CTLCardinality-15 14644 m, 260 m/sec, 30916 t fired, .
64 EF FNDP 814/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 2156782 t fired, 3 attempts, .
65 EF STEQ 814/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 sara is running.
Time elapsed: 973 secs. Pages in use: 28
# running tasks: 3 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
GlobalResAllocation-PT-05-CTLCardinality-04: INITIAL false preprocessing
GlobalResAllocation-PT-05-CTLCardinality-07: CTL true CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-09: CTL false CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-13: CONJ true CONJ
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
GlobalResAllocation-PT-05-CTLCardinality-00: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-01: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-02: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-03: EF 0 1 2 0 2 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-06: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-08: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-10: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-11: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-12: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0
GlobalResAllocation-PT-05-CTLCardinality-15: CTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
58 CTL EXCL 64/244 1/5 GlobalResAllocation-PT-05-CTLCardinality-15 16233 m, 317 m/sec, 34548 t fired, .
64 EF FNDP 819/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 2167620 t fired, 3 attempts, .
65 EF STEQ 819/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 sara is running.
Time elapsed: 978 secs. Pages in use: 28
# running tasks: 3 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
GlobalResAllocation-PT-05-CTLCardinality-04: INITIAL false preprocessing
GlobalResAllocation-PT-05-CTLCardinality-07: CTL true CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-09: CTL false CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-13: CONJ true CONJ
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
GlobalResAllocation-PT-05-CTLCardinality-00: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-01: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-02: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-03: EF 0 1 2 0 2 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-06: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-08: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-10: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-11: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-12: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0
GlobalResAllocation-PT-05-CTLCardinality-15: CTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
58 CTL EXCL 69/244 1/5 GlobalResAllocation-PT-05-CTLCardinality-15 17452 m, 243 m/sec, 37567 t fired, .
64 EF FNDP 824/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 2177684 t fired, 3 attempts, .
65 EF STEQ 824/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 sara is running.
Time elapsed: 983 secs. Pages in use: 28
# running tasks: 3 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
GlobalResAllocation-PT-05-CTLCardinality-04: INITIAL false preprocessing
GlobalResAllocation-PT-05-CTLCardinality-07: CTL true CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-09: CTL false CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-13: CONJ true CONJ
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
GlobalResAllocation-PT-05-CTLCardinality-00: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-01: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-02: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-03: EF 0 1 2 0 2 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-06: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-08: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-10: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-11: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-12: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0
GlobalResAllocation-PT-05-CTLCardinality-15: CTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
58 CTL EXCL 74/244 1/5 GlobalResAllocation-PT-05-CTLCardinality-15 19084 m, 326 m/sec, 41185 t fired, .
64 EF FNDP 829/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 2186653 t fired, 3 attempts, .
65 EF STEQ 829/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 sara is running.
Time elapsed: 988 secs. Pages in use: 28
# running tasks: 3 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
GlobalResAllocation-PT-05-CTLCardinality-04: INITIAL false preprocessing
GlobalResAllocation-PT-05-CTLCardinality-07: CTL true CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-09: CTL false CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-13: CONJ true CONJ
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
GlobalResAllocation-PT-05-CTLCardinality-00: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-01: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-02: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-03: EF 0 1 2 0 2 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-06: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-08: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-10: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-11: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-12: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0
GlobalResAllocation-PT-05-CTLCardinality-15: CTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
58 CTL EXCL 79/244 1/5 GlobalResAllocation-PT-05-CTLCardinality-15 20172 m, 217 m/sec, 43244 t fired, .
64 EF FNDP 834/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 2197237 t fired, 3 attempts, .
65 EF STEQ 834/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 sara is running.
Time elapsed: 993 secs. Pages in use: 28
# running tasks: 3 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
GlobalResAllocation-PT-05-CTLCardinality-04: INITIAL false preprocessing
GlobalResAllocation-PT-05-CTLCardinality-07: CTL true CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-09: CTL false CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-13: CONJ true CONJ
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
GlobalResAllocation-PT-05-CTLCardinality-00: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-01: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-02: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-03: EF 0 1 2 0 2 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-06: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-08: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-10: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-11: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-12: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0
GlobalResAllocation-PT-05-CTLCardinality-15: CTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
58 CTL EXCL 84/244 1/5 GlobalResAllocation-PT-05-CTLCardinality-15 21465 m, 258 m/sec, 46327 t fired, .
64 EF FNDP 839/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 2206749 t fired, 3 attempts, .
65 EF STEQ 839/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 sara is running.
Time elapsed: 998 secs. Pages in use: 28
# running tasks: 3 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
GlobalResAllocation-PT-05-CTLCardinality-04: INITIAL false preprocessing
GlobalResAllocation-PT-05-CTLCardinality-07: CTL true CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-09: CTL false CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-13: CONJ true CONJ
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
GlobalResAllocation-PT-05-CTLCardinality-00: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-01: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-02: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-03: EF 0 1 2 0 2 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-06: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-08: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-10: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-11: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-12: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0
GlobalResAllocation-PT-05-CTLCardinality-15: CTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
58 CTL EXCL 89/244 1/5 GlobalResAllocation-PT-05-CTLCardinality-15 23093 m, 325 m/sec, 49731 t fired, .
64 EF FNDP 844/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 2216122 t fired, 3 attempts, .
65 EF STEQ 844/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 sara is running.
Time elapsed: 1003 secs. Pages in use: 28
# running tasks: 3 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
GlobalResAllocation-PT-05-CTLCardinality-04: INITIAL false preprocessing
GlobalResAllocation-PT-05-CTLCardinality-07: CTL true CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-09: CTL false CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-13: CONJ true CONJ
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
GlobalResAllocation-PT-05-CTLCardinality-00: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-01: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-02: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-03: EF 0 1 2 0 2 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-06: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-08: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-10: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-11: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-12: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0
GlobalResAllocation-PT-05-CTLCardinality-15: CTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
58 CTL EXCL 94/244 1/5 GlobalResAllocation-PT-05-CTLCardinality-15 24508 m, 283 m/sec, 52768 t fired, .
64 EF FNDP 849/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 2226371 t fired, 3 attempts, .
65 EF STEQ 849/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 sara is running.
Time elapsed: 1008 secs. Pages in use: 28
# running tasks: 3 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
GlobalResAllocation-PT-05-CTLCardinality-04: INITIAL false preprocessing
GlobalResAllocation-PT-05-CTLCardinality-07: CTL true CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-09: CTL false CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-13: CONJ true CONJ
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
GlobalResAllocation-PT-05-CTLCardinality-00: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-01: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-02: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-03: EF 0 1 2 0 2 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-06: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-08: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-10: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-11: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-12: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0
GlobalResAllocation-PT-05-CTLCardinality-15: CTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
58 CTL EXCL 99/244 1/5 GlobalResAllocation-PT-05-CTLCardinality-15 26205 m, 339 m/sec, 56771 t fired, .
64 EF FNDP 854/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 2236089 t fired, 3 attempts, .
65 EF STEQ 854/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 sara is running.
Time elapsed: 1013 secs. Pages in use: 28
# running tasks: 3 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
GlobalResAllocation-PT-05-CTLCardinality-04: INITIAL false preprocessing
GlobalResAllocation-PT-05-CTLCardinality-07: CTL true CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-09: CTL false CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-13: CONJ true CONJ
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
GlobalResAllocation-PT-05-CTLCardinality-00: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-01: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-02: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-03: EF 0 1 2 0 2 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-06: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-08: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-10: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-11: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-12: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0
GlobalResAllocation-PT-05-CTLCardinality-15: CTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
58 CTL EXCL 104/244 1/5 GlobalResAllocation-PT-05-CTLCardinality-15 27764 m, 311 m/sec, 60171 t fired, .
64 EF FNDP 859/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 2246744 t fired, 3 attempts, .
65 EF STEQ 859/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 sara is running.
Time elapsed: 1018 secs. Pages in use: 28
# running tasks: 3 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
GlobalResAllocation-PT-05-CTLCardinality-04: INITIAL false preprocessing
GlobalResAllocation-PT-05-CTLCardinality-07: CTL true CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-09: CTL false CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-13: CONJ true CONJ
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
GlobalResAllocation-PT-05-CTLCardinality-00: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-01: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-02: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-03: EF 0 1 2 0 2 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-06: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-08: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-10: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-11: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-12: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0
GlobalResAllocation-PT-05-CTLCardinality-15: CTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
58 CTL EXCL 109/244 1/5 GlobalResAllocation-PT-05-CTLCardinality-15 29252 m, 297 m/sec, 63674 t fired, .
64 EF FNDP 864/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 2257061 t fired, 3 attempts, .
65 EF STEQ 864/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 sara is running.
Time elapsed: 1023 secs. Pages in use: 28
# running tasks: 3 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
GlobalResAllocation-PT-05-CTLCardinality-04: INITIAL false preprocessing
GlobalResAllocation-PT-05-CTLCardinality-07: CTL true CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-09: CTL false CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-13: CONJ true CONJ
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
GlobalResAllocation-PT-05-CTLCardinality-00: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-01: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-02: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-03: EF 0 1 2 0 2 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-06: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-08: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-10: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-11: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-12: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0
GlobalResAllocation-PT-05-CTLCardinality-15: CTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
58 CTL EXCL 114/244 1/5 GlobalResAllocation-PT-05-CTLCardinality-15 30864 m, 322 m/sec, 67203 t fired, .
64 EF FNDP 869/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 2267116 t fired, 3 attempts, .
65 EF STEQ 869/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 sara is running.
Time elapsed: 1028 secs. Pages in use: 28
# running tasks: 3 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
GlobalResAllocation-PT-05-CTLCardinality-04: INITIAL false preprocessing
GlobalResAllocation-PT-05-CTLCardinality-07: CTL true CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-09: CTL false CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-13: CONJ true CONJ
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
GlobalResAllocation-PT-05-CTLCardinality-00: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-01: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-02: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-03: EF 0 1 2 0 2 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-06: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-08: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-10: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-11: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-12: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0
GlobalResAllocation-PT-05-CTLCardinality-15: CTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
58 CTL EXCL 119/244 1/5 GlobalResAllocation-PT-05-CTLCardinality-15 32380 m, 303 m/sec, 70520 t fired, .
64 EF FNDP 874/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 2276922 t fired, 3 attempts, .
65 EF STEQ 874/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 sara is running.
Time elapsed: 1033 secs. Pages in use: 28
# running tasks: 3 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
GlobalResAllocation-PT-05-CTLCardinality-04: INITIAL false preprocessing
GlobalResAllocation-PT-05-CTLCardinality-07: CTL true CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-09: CTL false CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-13: CONJ true CONJ
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
GlobalResAllocation-PT-05-CTLCardinality-00: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-01: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-02: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-03: EF 0 1 2 0 2 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-06: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-08: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-10: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-11: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-12: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0
GlobalResAllocation-PT-05-CTLCardinality-15: CTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
58 CTL EXCL 124/244 1/5 GlobalResAllocation-PT-05-CTLCardinality-15 34061 m, 336 m/sec, 74142 t fired, .
64 EF FNDP 879/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 2287174 t fired, 3 attempts, .
65 EF STEQ 879/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 sara is running.
Time elapsed: 1038 secs. Pages in use: 28
# running tasks: 3 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
GlobalResAllocation-PT-05-CTLCardinality-04: INITIAL false preprocessing
GlobalResAllocation-PT-05-CTLCardinality-07: CTL true CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-09: CTL false CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-13: CONJ true CONJ
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
GlobalResAllocation-PT-05-CTLCardinality-00: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-01: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-02: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-03: EF 0 1 2 0 2 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-06: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-08: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-10: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-11: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-12: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0
GlobalResAllocation-PT-05-CTLCardinality-15: CTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
58 CTL EXCL 129/244 1/5 GlobalResAllocation-PT-05-CTLCardinality-15 35940 m, 375 m/sec, 78127 t fired, .
64 EF FNDP 884/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 2297364 t fired, 3 attempts, .
65 EF STEQ 884/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 sara is running.
Time elapsed: 1043 secs. Pages in use: 28
# running tasks: 3 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
GlobalResAllocation-PT-05-CTLCardinality-04: INITIAL false preprocessing
GlobalResAllocation-PT-05-CTLCardinality-07: CTL true CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-09: CTL false CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-13: CONJ true CONJ
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
GlobalResAllocation-PT-05-CTLCardinality-00: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-01: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-02: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-03: EF 0 1 2 0 2 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-06: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-08: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-10: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-11: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-12: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0
GlobalResAllocation-PT-05-CTLCardinality-15: CTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
58 CTL EXCL 134/244 1/5 GlobalResAllocation-PT-05-CTLCardinality-15 38155 m, 443 m/sec, 82607 t fired, .
64 EF FNDP 889/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 2306609 t fired, 3 attempts, .
65 EF STEQ 889/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 sara is running.
Time elapsed: 1048 secs. Pages in use: 28
# running tasks: 3 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
GlobalResAllocation-PT-05-CTLCardinality-04: INITIAL false preprocessing
GlobalResAllocation-PT-05-CTLCardinality-07: CTL true CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-09: CTL false CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-13: CONJ true CONJ
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
GlobalResAllocation-PT-05-CTLCardinality-00: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-01: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-02: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-03: EF 0 1 2 0 2 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-06: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-08: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-10: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-11: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-12: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0
GlobalResAllocation-PT-05-CTLCardinality-15: CTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
58 CTL EXCL 139/244 1/5 GlobalResAllocation-PT-05-CTLCardinality-15 40189 m, 406 m/sec, 87186 t fired, .
64 EF FNDP 894/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 2315897 t fired, 3 attempts, .
65 EF STEQ 894/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 sara is running.
Time elapsed: 1053 secs. Pages in use: 28
# running tasks: 3 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
GlobalResAllocation-PT-05-CTLCardinality-04: INITIAL false preprocessing
GlobalResAllocation-PT-05-CTLCardinality-07: CTL true CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-09: CTL false CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-13: CONJ true CONJ
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
GlobalResAllocation-PT-05-CTLCardinality-00: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-01: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-02: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-03: EF 0 1 2 0 2 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-06: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-08: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-10: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-11: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-12: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0
GlobalResAllocation-PT-05-CTLCardinality-15: CTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
58 CTL EXCL 144/244 1/5 GlobalResAllocation-PT-05-CTLCardinality-15 42083 m, 378 m/sec, 91320 t fired, .
64 EF FNDP 899/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 2326087 t fired, 3 attempts, .
65 EF STEQ 899/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 sara is running.
Time elapsed: 1058 secs. Pages in use: 28
# running tasks: 3 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
GlobalResAllocation-PT-05-CTLCardinality-04: INITIAL false preprocessing
GlobalResAllocation-PT-05-CTLCardinality-07: CTL true CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-09: CTL false CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-13: CONJ true CONJ
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
GlobalResAllocation-PT-05-CTLCardinality-00: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-01: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-02: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-03: EF 0 1 2 0 2 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-06: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-08: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-10: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-11: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-12: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0
GlobalResAllocation-PT-05-CTLCardinality-15: CTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
58 CTL EXCL 149/244 1/5 GlobalResAllocation-PT-05-CTLCardinality-15 43670 m, 317 m/sec, 94890 t fired, .
64 EF FNDP 904/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 2335985 t fired, 3 attempts, .
65 EF STEQ 904/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 sara is running.
Time elapsed: 1063 secs. Pages in use: 28
# running tasks: 3 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
GlobalResAllocation-PT-05-CTLCardinality-04: INITIAL false preprocessing
GlobalResAllocation-PT-05-CTLCardinality-07: CTL true CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-09: CTL false CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-13: CONJ true CONJ
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
GlobalResAllocation-PT-05-CTLCardinality-00: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-01: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-02: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-03: EF 0 1 2 0 2 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-06: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-08: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-10: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-11: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-12: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0
GlobalResAllocation-PT-05-CTLCardinality-15: CTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
58 CTL EXCL 154/244 1/5 GlobalResAllocation-PT-05-CTLCardinality-15 45505 m, 367 m/sec, 98958 t fired, .
64 EF FNDP 909/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 2345338 t fired, 3 attempts, .
65 EF STEQ 909/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 sara is running.
Time elapsed: 1068 secs. Pages in use: 28
# running tasks: 3 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
GlobalResAllocation-PT-05-CTLCardinality-04: INITIAL false preprocessing
GlobalResAllocation-PT-05-CTLCardinality-07: CTL true CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-09: CTL false CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-13: CONJ true CONJ
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
GlobalResAllocation-PT-05-CTLCardinality-00: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-01: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-02: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-03: EF 0 1 2 0 2 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-06: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-08: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-10: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-11: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-12: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0
GlobalResAllocation-PT-05-CTLCardinality-15: CTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
58 CTL EXCL 159/244 1/5 GlobalResAllocation-PT-05-CTLCardinality-15 46777 m, 254 m/sec, 101882 t fired, .
64 EF FNDP 914/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 2355134 t fired, 3 attempts, .
65 EF STEQ 914/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 sara is running.
Time elapsed: 1073 secs. Pages in use: 28
# running tasks: 3 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
GlobalResAllocation-PT-05-CTLCardinality-04: INITIAL false preprocessing
GlobalResAllocation-PT-05-CTLCardinality-07: CTL true CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-09: CTL false CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-13: CONJ true CONJ
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
GlobalResAllocation-PT-05-CTLCardinality-00: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-01: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-02: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-03: EF 0 1 2 0 2 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-06: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-08: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-10: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-11: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-12: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0
GlobalResAllocation-PT-05-CTLCardinality-15: CTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
58 CTL EXCL 164/244 1/5 GlobalResAllocation-PT-05-CTLCardinality-15 48152 m, 275 m/sec, 105062 t fired, .
64 EF FNDP 919/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 2364939 t fired, 3 attempts, .
65 EF STEQ 919/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 sara is running.
Time elapsed: 1078 secs. Pages in use: 28
# running tasks: 3 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
GlobalResAllocation-PT-05-CTLCardinality-04: INITIAL false preprocessing
GlobalResAllocation-PT-05-CTLCardinality-07: CTL true CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-09: CTL false CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-13: CONJ true CONJ
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
GlobalResAllocation-PT-05-CTLCardinality-00: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-01: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-02: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-03: EF 0 1 2 0 2 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-06: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-08: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-10: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-11: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-12: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0
GlobalResAllocation-PT-05-CTLCardinality-15: CTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
58 CTL EXCL 169/244 1/5 GlobalResAllocation-PT-05-CTLCardinality-15 49597 m, 289 m/sec, 108229 t fired, .
64 EF FNDP 924/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 2375292 t fired, 3 attempts, .
65 EF STEQ 924/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 sara is running.
Time elapsed: 1083 secs. Pages in use: 28
# running tasks: 3 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
GlobalResAllocation-PT-05-CTLCardinality-04: INITIAL false preprocessing
GlobalResAllocation-PT-05-CTLCardinality-07: CTL true CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-09: CTL false CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-13: CONJ true CONJ
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
GlobalResAllocation-PT-05-CTLCardinality-00: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-01: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-02: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-03: EF 0 1 2 0 2 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-06: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-08: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-10: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-11: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-12: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0
GlobalResAllocation-PT-05-CTLCardinality-15: CTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
58 CTL EXCL 174/244 1/5 GlobalResAllocation-PT-05-CTLCardinality-15 51189 m, 318 m/sec, 111850 t fired, .
64 EF FNDP 929/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 2385779 t fired, 3 attempts, .
65 EF STEQ 929/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 sara is running.
Time elapsed: 1088 secs. Pages in use: 28
# running tasks: 3 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
GlobalResAllocation-PT-05-CTLCardinality-04: INITIAL false preprocessing
GlobalResAllocation-PT-05-CTLCardinality-07: CTL true CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-09: CTL false CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-13: CONJ true CONJ
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
GlobalResAllocation-PT-05-CTLCardinality-00: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-01: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-02: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-03: EF 0 1 2 0 2 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-06: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-08: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-10: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-11: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-12: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0
GlobalResAllocation-PT-05-CTLCardinality-15: CTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
58 CTL EXCL 179/244 1/5 GlobalResAllocation-PT-05-CTLCardinality-15 52962 m, 354 m/sec, 115396 t fired, .
64 EF FNDP 934/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 2395501 t fired, 3 attempts, .
65 EF STEQ 934/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 sara is running.
Time elapsed: 1093 secs. Pages in use: 28
# running tasks: 3 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
GlobalResAllocation-PT-05-CTLCardinality-04: INITIAL false preprocessing
GlobalResAllocation-PT-05-CTLCardinality-07: CTL true CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-09: CTL false CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-13: CONJ true CONJ
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
GlobalResAllocation-PT-05-CTLCardinality-00: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-01: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-02: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-03: EF 0 1 2 0 2 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-06: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-08: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-10: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-11: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-12: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0
GlobalResAllocation-PT-05-CTLCardinality-15: CTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
58 CTL EXCL 184/244 1/5 GlobalResAllocation-PT-05-CTLCardinality-15 54974 m, 402 m/sec, 119963 t fired, .
64 EF FNDP 939/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 2404983 t fired, 3 attempts, .
65 EF STEQ 939/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 sara is running.
Time elapsed: 1098 secs. Pages in use: 28
# running tasks: 3 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
GlobalResAllocation-PT-05-CTLCardinality-04: INITIAL false preprocessing
GlobalResAllocation-PT-05-CTLCardinality-07: CTL true CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-09: CTL false CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-13: CONJ true CONJ
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
GlobalResAllocation-PT-05-CTLCardinality-00: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-01: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-02: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-03: EF 0 1 2 0 2 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-06: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-08: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-10: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-11: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-12: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0
GlobalResAllocation-PT-05-CTLCardinality-15: CTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
58 CTL EXCL 189/244 1/5 GlobalResAllocation-PT-05-CTLCardinality-15 56810 m, 367 m/sec, 123839 t fired, .
64 EF FNDP 944/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 2415051 t fired, 3 attempts, .
65 EF STEQ 944/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 sara is running.
Time elapsed: 1103 secs. Pages in use: 28
# running tasks: 3 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
GlobalResAllocation-PT-05-CTLCardinality-04: INITIAL false preprocessing
GlobalResAllocation-PT-05-CTLCardinality-07: CTL true CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-09: CTL false CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-13: CONJ true CONJ
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
GlobalResAllocation-PT-05-CTLCardinality-00: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-01: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-02: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-03: EF 0 1 2 0 2 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-06: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-08: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-10: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-11: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-12: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0
GlobalResAllocation-PT-05-CTLCardinality-15: CTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
58 CTL EXCL 194/244 1/5 GlobalResAllocation-PT-05-CTLCardinality-15 58762 m, 390 m/sec, 128308 t fired, .
64 EF FNDP 949/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 2425921 t fired, 3 attempts, .
65 EF STEQ 949/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 sara is running.
Time elapsed: 1108 secs. Pages in use: 28
# running tasks: 3 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
GlobalResAllocation-PT-05-CTLCardinality-04: INITIAL false preprocessing
GlobalResAllocation-PT-05-CTLCardinality-07: CTL true CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-09: CTL false CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-13: CONJ true CONJ
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
GlobalResAllocation-PT-05-CTLCardinality-00: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-01: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-02: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-03: EF 0 1 2 0 2 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-06: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-08: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-10: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-11: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-12: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0
GlobalResAllocation-PT-05-CTLCardinality-15: CTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
58 CTL EXCL 199/244 1/5 GlobalResAllocation-PT-05-CTLCardinality-15 60209 m, 289 m/sec, 131532 t fired, .
64 EF FNDP 954/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 2435766 t fired, 3 attempts, .
65 EF STEQ 954/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 sara is running.
Time elapsed: 1113 secs. Pages in use: 28
# running tasks: 3 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
GlobalResAllocation-PT-05-CTLCardinality-04: INITIAL false preprocessing
GlobalResAllocation-PT-05-CTLCardinality-07: CTL true CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-09: CTL false CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-13: CONJ true CONJ
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
GlobalResAllocation-PT-05-CTLCardinality-00: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-01: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-02: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-03: EF 0 1 2 0 2 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-06: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-08: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-10: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-11: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-12: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0
GlobalResAllocation-PT-05-CTLCardinality-15: CTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
58 CTL EXCL 204/244 1/5 GlobalResAllocation-PT-05-CTLCardinality-15 62094 m, 377 m/sec, 135694 t fired, .
64 EF FNDP 959/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 2445353 t fired, 3 attempts, .
65 EF STEQ 959/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 sara is running.
Time elapsed: 1118 secs. Pages in use: 28
# running tasks: 3 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
GlobalResAllocation-PT-05-CTLCardinality-04: INITIAL false preprocessing
GlobalResAllocation-PT-05-CTLCardinality-07: CTL true CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-09: CTL false CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-13: CONJ true CONJ
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
GlobalResAllocation-PT-05-CTLCardinality-00: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-01: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-02: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-03: EF 0 1 2 0 2 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-06: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-08: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-10: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-11: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-12: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0
GlobalResAllocation-PT-05-CTLCardinality-15: CTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
58 CTL EXCL 209/244 1/5 GlobalResAllocation-PT-05-CTLCardinality-15 64061 m, 393 m/sec, 140126 t fired, .
64 EF FNDP 964/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 2455689 t fired, 3 attempts, .
65 EF STEQ 964/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 sara is running.
Time elapsed: 1123 secs. Pages in use: 28
# running tasks: 3 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
GlobalResAllocation-PT-05-CTLCardinality-04: INITIAL false preprocessing
GlobalResAllocation-PT-05-CTLCardinality-07: CTL true CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-09: CTL false CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-13: CONJ true CONJ
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
GlobalResAllocation-PT-05-CTLCardinality-00: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-01: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-02: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-03: EF 0 1 2 0 2 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-06: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-08: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-10: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-11: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-12: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0
GlobalResAllocation-PT-05-CTLCardinality-15: CTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
58 CTL EXCL 214/244 1/5 GlobalResAllocation-PT-05-CTLCardinality-15 66133 m, 414 m/sec, 145128 t fired, .
64 EF FNDP 969/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 2466101 t fired, 3 attempts, .
65 EF STEQ 969/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 sara is running.
Time elapsed: 1128 secs. Pages in use: 28
# running tasks: 3 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
GlobalResAllocation-PT-05-CTLCardinality-04: INITIAL false preprocessing
GlobalResAllocation-PT-05-CTLCardinality-07: CTL true CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-09: CTL false CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-13: CONJ true CONJ
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
GlobalResAllocation-PT-05-CTLCardinality-00: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-01: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-02: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-03: EF 0 1 2 0 2 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-06: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-08: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-10: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-11: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-12: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0
GlobalResAllocation-PT-05-CTLCardinality-15: CTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
58 CTL EXCL 219/244 1/5 GlobalResAllocation-PT-05-CTLCardinality-15 68261 m, 425 m/sec, 149684 t fired, .
64 EF FNDP 974/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 2474990 t fired, 3 attempts, .
65 EF STEQ 974/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 sara is running.
Time elapsed: 1133 secs. Pages in use: 28
# running tasks: 3 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
GlobalResAllocation-PT-05-CTLCardinality-04: INITIAL false preprocessing
GlobalResAllocation-PT-05-CTLCardinality-07: CTL true CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-09: CTL false CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-13: CONJ true CONJ
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
GlobalResAllocation-PT-05-CTLCardinality-00: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-01: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-02: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-03: EF 0 1 2 0 2 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-06: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-08: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-10: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-11: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-12: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0
GlobalResAllocation-PT-05-CTLCardinality-15: CTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
58 CTL EXCL 224/244 1/5 GlobalResAllocation-PT-05-CTLCardinality-15 70071 m, 362 m/sec, 154309 t fired, .
64 EF FNDP 979/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 2484358 t fired, 3 attempts, .
65 EF STEQ 979/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 sara is running.
Time elapsed: 1138 secs. Pages in use: 28
# running tasks: 3 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
GlobalResAllocation-PT-05-CTLCardinality-04: INITIAL false preprocessing
GlobalResAllocation-PT-05-CTLCardinality-07: CTL true CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-09: CTL false CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-13: CONJ true CONJ
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
GlobalResAllocation-PT-05-CTLCardinality-00: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-01: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-02: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-03: EF 0 1 2 0 2 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-06: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-08: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-10: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-11: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-12: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0
GlobalResAllocation-PT-05-CTLCardinality-15: CTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
58 CTL EXCL 229/244 1/5 GlobalResAllocation-PT-05-CTLCardinality-15 71953 m, 376 m/sec, 158634 t fired, .
64 EF FNDP 984/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 2493657 t fired, 3 attempts, .
65 EF STEQ 984/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 sara is running.
Time elapsed: 1143 secs. Pages in use: 28
# running tasks: 3 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
GlobalResAllocation-PT-05-CTLCardinality-04: INITIAL false preprocessing
GlobalResAllocation-PT-05-CTLCardinality-07: CTL true CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-09: CTL false CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-13: CONJ true CONJ
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
GlobalResAllocation-PT-05-CTLCardinality-00: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-01: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-02: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-03: EF 0 1 2 0 2 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-06: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-08: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-10: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-11: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-12: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0
GlobalResAllocation-PT-05-CTLCardinality-15: CTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
58 CTL EXCL 234/244 1/5 GlobalResAllocation-PT-05-CTLCardinality-15 73285 m, 266 m/sec, 161370 t fired, .
64 EF FNDP 989/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 2502525 t fired, 3 attempts, .
65 EF STEQ 989/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 sara is running.
Time elapsed: 1148 secs. Pages in use: 28
# running tasks: 3 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
GlobalResAllocation-PT-05-CTLCardinality-04: INITIAL false preprocessing
GlobalResAllocation-PT-05-CTLCardinality-07: CTL true CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-09: CTL false CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-13: CONJ true CONJ
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
GlobalResAllocation-PT-05-CTLCardinality-00: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-01: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-02: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-03: EF 0 1 2 0 2 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-06: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-08: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-10: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-11: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-12: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0
GlobalResAllocation-PT-05-CTLCardinality-15: CTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
58 CTL EXCL 239/244 1/5 GlobalResAllocation-PT-05-CTLCardinality-15 75259 m, 394 m/sec, 165732 t fired, .
64 EF FNDP 994/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 2511585 t fired, 3 attempts, .
65 EF STEQ 994/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 sara is running.
Time elapsed: 1153 secs. Pages in use: 28
# running tasks: 3 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
GlobalResAllocation-PT-05-CTLCardinality-04: INITIAL false preprocessing
GlobalResAllocation-PT-05-CTLCardinality-07: CTL true CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-09: CTL false CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-13: CONJ true CONJ
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
GlobalResAllocation-PT-05-CTLCardinality-00: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-01: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-02: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-03: EF 0 1 2 0 2 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-06: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-08: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-10: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-11: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-12: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0
GlobalResAllocation-PT-05-CTLCardinality-15: CTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
58 CTL EXCL 244/244 1/5 GlobalResAllocation-PT-05-CTLCardinality-15 76698 m, 287 m/sec, 168839 t fired, .
64 EF FNDP 999/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 2521085 t fired, 3 attempts, .
65 EF STEQ 999/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 sara is running.
Time elapsed: 1158 secs. Pages in use: 28
# running tasks: 3 of 4 Visible: 16
lola: CANCELED task # 58 (type EXCL) for GlobalResAllocation-PT-05-CTLCardinality-15 (local timeout)
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
GlobalResAllocation-PT-05-CTLCardinality-04: INITIAL false preprocessing
GlobalResAllocation-PT-05-CTLCardinality-07: CTL true CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-09: CTL false CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-13: CONJ true CONJ
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
GlobalResAllocation-PT-05-CTLCardinality-00: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-01: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-02: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-03: EF 0 1 2 0 2 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-06: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-08: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-10: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-11: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-12: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0
GlobalResAllocation-PT-05-CTLCardinality-15: CTL 0 0 0 0 1 1 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
64 EF FNDP 1004/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 2531894 t fired, 3 attempts, .
65 EF STEQ 1004/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 sara is running.
Time elapsed: 1163 secs. Pages in use: 28
# running tasks: 3 of 4 Visible: 16
lola: LAUNCH task # 37 (type EXCL) for 36 GlobalResAllocation-PT-05-CTLCardinality-12
lola: time limit : 243 sec
lola: memory limit: 32 pages
lola: LAUNCH task # 58 (type EXCL) for 57 GlobalResAllocation-PT-05-CTLCardinality-15
lola: time limit : 2437 sec
lola: memory limit: 5 pages
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
GlobalResAllocation-PT-05-CTLCardinality-04: INITIAL false preprocessing
GlobalResAllocation-PT-05-CTLCardinality-07: CTL true CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-09: CTL false CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-13: CONJ true CONJ
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
GlobalResAllocation-PT-05-CTLCardinality-00: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-01: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-02: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-03: EF 0 1 2 0 2 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-06: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-08: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-10: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-11: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-12: CTL 0 0 1 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0
GlobalResAllocation-PT-05-CTLCardinality-15: CTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
37 CTL EXCL 5/243 1/32 GlobalResAllocation-PT-05-CTLCardinality-12 114309 m, 22861 m/sec, 197450 t fired, .
58 CTL EXCL 4/2437 1/5 GlobalResAllocation-PT-05-CTLCardinality-15 523 m, -15235 m/sec, 1114 t fired, .
64 EF FNDP 1009/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 2539836 t fired, 3 attempts, .
65 EF STEQ 1009/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 sara is running.
Time elapsed: 1168 secs. Pages in use: 30
# running tasks: 4 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
GlobalResAllocation-PT-05-CTLCardinality-04: INITIAL false preprocessing
GlobalResAllocation-PT-05-CTLCardinality-07: CTL true CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-09: CTL false CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-13: CONJ true CONJ
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
GlobalResAllocation-PT-05-CTLCardinality-00: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-01: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-02: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-03: EF 0 1 2 0 2 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-06: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-08: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-10: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-11: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-12: CTL 0 0 1 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0
GlobalResAllocation-PT-05-CTLCardinality-15: CTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
37 CTL EXCL 10/243 2/32 GlobalResAllocation-PT-05-CTLCardinality-12 235319 m, 24202 m/sec, 418892 t fired, .
58 CTL EXCL 9/221 1/5 GlobalResAllocation-PT-05-CTLCardinality-15 1349 m, 165 m/sec, 2890 t fired, .
64 EF FNDP 1014/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 2547190 t fired, 3 attempts, .
65 EF STEQ 1014/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 sara is running.
Time elapsed: 1173 secs. Pages in use: 31
# running tasks: 4 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
GlobalResAllocation-PT-05-CTLCardinality-04: INITIAL false preprocessing
GlobalResAllocation-PT-05-CTLCardinality-07: CTL true CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-09: CTL false CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-13: CONJ true CONJ
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
GlobalResAllocation-PT-05-CTLCardinality-00: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-01: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-02: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-03: EF 0 1 2 0 2 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-06: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-08: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-10: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-11: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-12: CTL 0 0 1 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0
GlobalResAllocation-PT-05-CTLCardinality-15: CTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
37 CTL EXCL 15/243 2/32 GlobalResAllocation-PT-05-CTLCardinality-12 353343 m, 23604 m/sec, 635504 t fired, .
58 CTL EXCL 14/221 1/5 GlobalResAllocation-PT-05-CTLCardinality-15 2075 m, 145 m/sec, 4429 t fired, .
64 EF FNDP 1019/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 2554816 t fired, 3 attempts, .
65 EF STEQ 1019/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 sara is running.
Time elapsed: 1178 secs. Pages in use: 32
# running tasks: 4 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
GlobalResAllocation-PT-05-CTLCardinality-04: INITIAL false preprocessing
GlobalResAllocation-PT-05-CTLCardinality-07: CTL true CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-09: CTL false CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-13: CONJ true CONJ
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
GlobalResAllocation-PT-05-CTLCardinality-00: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-01: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-02: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-03: EF 0 1 2 0 2 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-06: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-08: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-10: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-11: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-12: CTL 0 0 1 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0
GlobalResAllocation-PT-05-CTLCardinality-15: CTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
37 CTL EXCL 20/243 3/32 GlobalResAllocation-PT-05-CTLCardinality-12 476450 m, 24621 m/sec, 863819 t fired, .
58 CTL EXCL 19/221 1/5 GlobalResAllocation-PT-05-CTLCardinality-15 2941 m, 173 m/sec, 6053 t fired, .
64 EF FNDP 1024/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 2562358 t fired, 3 attempts, .
65 EF STEQ 1024/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 sara is running.
Time elapsed: 1183 secs. Pages in use: 33
# running tasks: 4 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
GlobalResAllocation-PT-05-CTLCardinality-04: INITIAL false preprocessing
GlobalResAllocation-PT-05-CTLCardinality-07: CTL true CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-09: CTL false CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-13: CONJ true CONJ
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
GlobalResAllocation-PT-05-CTLCardinality-00: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-01: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-02: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-03: EF 0 1 2 0 2 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-06: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-08: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-10: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-11: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-12: CTL 0 0 1 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0
GlobalResAllocation-PT-05-CTLCardinality-15: CTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
37 CTL EXCL 25/243 3/32 GlobalResAllocation-PT-05-CTLCardinality-12 599449 m, 24599 m/sec, 1103345 t fired, .
58 CTL EXCL 24/221 1/5 GlobalResAllocation-PT-05-CTLCardinality-15 3862 m, 184 m/sec, 8025 t fired, .
64 EF FNDP 1029/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 2569766 t fired, 3 attempts, .
65 EF STEQ 1029/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 sara is running.
Time elapsed: 1188 secs. Pages in use: 33
# running tasks: 4 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
GlobalResAllocation-PT-05-CTLCardinality-04: INITIAL false preprocessing
GlobalResAllocation-PT-05-CTLCardinality-07: CTL true CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-09: CTL false CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-13: CONJ true CONJ
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
GlobalResAllocation-PT-05-CTLCardinality-00: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-01: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-02: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-03: EF 0 1 2 0 2 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-06: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-08: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-10: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-11: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-12: CTL 0 0 1 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0
GlobalResAllocation-PT-05-CTLCardinality-15: CTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
37 CTL EXCL 30/243 4/32 GlobalResAllocation-PT-05-CTLCardinality-12 718947 m, 23899 m/sec, 1341872 t fired, .
58 CTL EXCL 29/221 1/5 GlobalResAllocation-PT-05-CTLCardinality-15 4892 m, 206 m/sec, 10115 t fired, .
64 EF FNDP 1034/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 2577265 t fired, 3 attempts, .
65 EF STEQ 1034/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 sara is running.
Time elapsed: 1193 secs. Pages in use: 34
# running tasks: 4 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
GlobalResAllocation-PT-05-CTLCardinality-04: INITIAL false preprocessing
GlobalResAllocation-PT-05-CTLCardinality-07: CTL true CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-09: CTL false CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-13: CONJ true CONJ
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
GlobalResAllocation-PT-05-CTLCardinality-00: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-01: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-02: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-03: EF 0 1 2 0 2 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-06: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-08: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-10: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-11: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-12: CTL 0 0 1 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0
GlobalResAllocation-PT-05-CTLCardinality-15: CTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
37 CTL EXCL 35/243 4/32 GlobalResAllocation-PT-05-CTLCardinality-12 842658 m, 24742 m/sec, 1594539 t fired, .
58 CTL EXCL 34/221 1/5 GlobalResAllocation-PT-05-CTLCardinality-15 5851 m, 191 m/sec, 11796 t fired, .
64 EF FNDP 1039/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 2584701 t fired, 3 attempts, .
65 EF STEQ 1039/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 sara is running.
Time elapsed: 1198 secs. Pages in use: 34
# running tasks: 4 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
GlobalResAllocation-PT-05-CTLCardinality-04: INITIAL false preprocessing
GlobalResAllocation-PT-05-CTLCardinality-07: CTL true CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-09: CTL false CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-13: CONJ true CONJ
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
GlobalResAllocation-PT-05-CTLCardinality-00: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-01: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-02: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-03: EF 0 1 2 0 2 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-06: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-08: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-10: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-11: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-12: CTL 0 0 1 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0
GlobalResAllocation-PT-05-CTLCardinality-15: CTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
37 CTL EXCL 40/243 5/32 GlobalResAllocation-PT-05-CTLCardinality-12 965342 m, 24536 m/sec, 1851784 t fired, .
58 CTL EXCL 39/221 1/5 GlobalResAllocation-PT-05-CTLCardinality-15 6618 m, 153 m/sec, 13407 t fired, .
64 EF FNDP 1044/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 2592138 t fired, 3 attempts, .
65 EF STEQ 1044/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 sara is running.
Time elapsed: 1203 secs. Pages in use: 35
# running tasks: 4 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
GlobalResAllocation-PT-05-CTLCardinality-04: INITIAL false preprocessing
GlobalResAllocation-PT-05-CTLCardinality-07: CTL true CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-09: CTL false CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-13: CONJ true CONJ
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
GlobalResAllocation-PT-05-CTLCardinality-00: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-01: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-02: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-03: EF 0 1 2 0 2 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-06: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-08: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-10: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-11: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-12: CTL 0 0 1 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0
GlobalResAllocation-PT-05-CTLCardinality-15: CTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
37 CTL EXCL 45/243 5/32 GlobalResAllocation-PT-05-CTLCardinality-12 1085879 m, 24107 m/sec, 2106289 t fired, .
58 CTL EXCL 44/221 1/5 GlobalResAllocation-PT-05-CTLCardinality-15 7784 m, 233 m/sec, 15823 t fired, .
64 EF FNDP 1049/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 2599918 t fired, 3 attempts, .
65 EF STEQ 1049/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 sara is running.
Time elapsed: 1208 secs. Pages in use: 35
# running tasks: 4 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
GlobalResAllocation-PT-05-CTLCardinality-04: INITIAL false preprocessing
GlobalResAllocation-PT-05-CTLCardinality-07: CTL true CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-09: CTL false CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-13: CONJ true CONJ
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
GlobalResAllocation-PT-05-CTLCardinality-00: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-01: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-02: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-03: EF 0 1 2 0 2 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-06: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-08: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-10: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-11: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-12: CTL 0 0 1 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0
GlobalResAllocation-PT-05-CTLCardinality-15: CTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
37 CTL EXCL 50/243 6/32 GlobalResAllocation-PT-05-CTLCardinality-12 1204096 m, 23643 m/sec, 2367856 t fired, .
58 CTL EXCL 49/221 1/5 GlobalResAllocation-PT-05-CTLCardinality-15 8702 m, 183 m/sec, 17658 t fired, .
64 EF FNDP 1054/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 2607319 t fired, 3 attempts, .
65 EF STEQ 1054/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 sara is running.
Time elapsed: 1213 secs. Pages in use: 36
# running tasks: 4 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
GlobalResAllocation-PT-05-CTLCardinality-04: INITIAL false preprocessing
GlobalResAllocation-PT-05-CTLCardinality-07: CTL true CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-09: CTL false CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-13: CONJ true CONJ
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
GlobalResAllocation-PT-05-CTLCardinality-00: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-01: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-02: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-03: EF 0 1 2 0 2 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-06: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-08: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-10: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-11: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-12: CTL 0 0 1 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0
GlobalResAllocation-PT-05-CTLCardinality-15: CTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
37 CTL EXCL 55/243 6/32 GlobalResAllocation-PT-05-CTLCardinality-12 1322088 m, 23598 m/sec, 2631674 t fired, .
58 CTL EXCL 54/221 1/5 GlobalResAllocation-PT-05-CTLCardinality-15 9659 m, 191 m/sec, 19749 t fired, .
64 EF FNDP 1059/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 2615146 t fired, 3 attempts, .
65 EF STEQ 1059/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 sara is running.
Time elapsed: 1218 secs. Pages in use: 36
# running tasks: 4 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
GlobalResAllocation-PT-05-CTLCardinality-04: INITIAL false preprocessing
GlobalResAllocation-PT-05-CTLCardinality-07: CTL true CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-09: CTL false CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-13: CONJ true CONJ
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
GlobalResAllocation-PT-05-CTLCardinality-00: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-01: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-02: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-03: EF 0 1 2 0 2 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-06: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-08: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-10: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-11: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-12: CTL 0 0 1 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0
GlobalResAllocation-PT-05-CTLCardinality-15: CTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
37 CTL EXCL 60/243 7/32 GlobalResAllocation-PT-05-CTLCardinality-12 1444525 m, 24487 m/sec, 2904190 t fired, .
58 CTL EXCL 59/221 1/5 GlobalResAllocation-PT-05-CTLCardinality-15 10552 m, 178 m/sec, 21684 t fired, .
64 EF FNDP 1064/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 2622870 t fired, 3 attempts, .
65 EF STEQ 1064/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 sara is running.
Time elapsed: 1223 secs. Pages in use: 37
# running tasks: 4 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
GlobalResAllocation-PT-05-CTLCardinality-04: INITIAL false preprocessing
GlobalResAllocation-PT-05-CTLCardinality-07: CTL true CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-09: CTL false CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-13: CONJ true CONJ
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
GlobalResAllocation-PT-05-CTLCardinality-00: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-01: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-02: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-03: EF 0 1 2 0 2 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-06: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-08: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-10: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-11: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-12: CTL 0 0 1 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0
GlobalResAllocation-PT-05-CTLCardinality-15: CTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
37 CTL EXCL 65/243 7/32 GlobalResAllocation-PT-05-CTLCardinality-12 1566428 m, 24380 m/sec, 3178188 t fired, .
58 CTL EXCL 64/221 1/5 GlobalResAllocation-PT-05-CTLCardinality-15 11766 m, 242 m/sec, 24449 t fired, .
64 EF FNDP 1069/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 2630261 t fired, 3 attempts, .
65 EF STEQ 1069/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 sara is running.
Time elapsed: 1228 secs. Pages in use: 37
# running tasks: 4 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
GlobalResAllocation-PT-05-CTLCardinality-04: INITIAL false preprocessing
GlobalResAllocation-PT-05-CTLCardinality-07: CTL true CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-09: CTL false CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-13: CONJ true CONJ
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
GlobalResAllocation-PT-05-CTLCardinality-00: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-01: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-02: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-03: EF 0 1 2 0 2 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-06: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-08: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-10: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-11: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-12: CTL 0 0 1 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0
GlobalResAllocation-PT-05-CTLCardinality-15: CTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
37 CTL EXCL 70/243 8/32 GlobalResAllocation-PT-05-CTLCardinality-12 1685574 m, 23829 m/sec, 3454831 t fired, .
58 CTL EXCL 69/221 1/5 GlobalResAllocation-PT-05-CTLCardinality-15 12913 m, 229 m/sec, 27025 t fired, .
64 EF FNDP 1074/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 2637701 t fired, 3 attempts, .
65 EF STEQ 1074/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 sara is running.
Time elapsed: 1233 secs. Pages in use: 38
# running tasks: 4 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
GlobalResAllocation-PT-05-CTLCardinality-04: INITIAL false preprocessing
GlobalResAllocation-PT-05-CTLCardinality-07: CTL true CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-09: CTL false CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-13: CONJ true CONJ
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
GlobalResAllocation-PT-05-CTLCardinality-00: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-01: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-02: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-03: EF 0 1 2 0 2 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-06: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-08: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-10: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-11: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-12: CTL 0 0 1 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0
GlobalResAllocation-PT-05-CTLCardinality-15: CTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
37 CTL EXCL 75/243 8/32 GlobalResAllocation-PT-05-CTLCardinality-12 1803396 m, 23564 m/sec, 3727970 t fired, .
58 CTL EXCL 74/221 1/5 GlobalResAllocation-PT-05-CTLCardinality-15 13932 m, 203 m/sec, 29352 t fired, .
64 EF FNDP 1079/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 2645147 t fired, 3 attempts, .
65 EF STEQ 1079/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 sara is running.
Time elapsed: 1238 secs. Pages in use: 38
# running tasks: 4 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
GlobalResAllocation-PT-05-CTLCardinality-04: INITIAL false preprocessing
GlobalResAllocation-PT-05-CTLCardinality-07: CTL true CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-09: CTL false CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-13: CONJ true CONJ
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
GlobalResAllocation-PT-05-CTLCardinality-00: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-01: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-02: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-03: EF 0 1 2 0 2 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-06: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-08: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-10: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-11: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-12: CTL 0 0 1 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0
GlobalResAllocation-PT-05-CTLCardinality-15: CTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
37 CTL EXCL 80/243 9/32 GlobalResAllocation-PT-05-CTLCardinality-12 1920734 m, 23467 m/sec, 4006064 t fired, .
58 CTL EXCL 79/221 1/5 GlobalResAllocation-PT-05-CTLCardinality-15 14899 m, 193 m/sec, 31528 t fired, .
64 EF FNDP 1084/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 2652550 t fired, 3 attempts, .
65 EF STEQ 1084/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 sara is running.
Time elapsed: 1243 secs. Pages in use: 39
# running tasks: 4 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
GlobalResAllocation-PT-05-CTLCardinality-04: INITIAL false preprocessing
GlobalResAllocation-PT-05-CTLCardinality-07: CTL true CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-09: CTL false CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-13: CONJ true CONJ
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
GlobalResAllocation-PT-05-CTLCardinality-00: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-01: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-02: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-03: EF 0 1 2 0 2 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-06: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-08: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-10: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-11: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-12: CTL 0 0 1 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0
GlobalResAllocation-PT-05-CTLCardinality-15: CTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
37 CTL EXCL 85/243 9/32 GlobalResAllocation-PT-05-CTLCardinality-12 2039107 m, 23674 m/sec, 4288727 t fired, .
58 CTL EXCL 84/221 1/5 GlobalResAllocation-PT-05-CTLCardinality-15 15880 m, 196 m/sec, 33756 t fired, .
64 EF FNDP 1089/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 2659914 t fired, 3 attempts, .
65 EF STEQ 1089/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 sara is running.
Time elapsed: 1248 secs. Pages in use: 39
# running tasks: 4 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
GlobalResAllocation-PT-05-CTLCardinality-04: INITIAL false preprocessing
GlobalResAllocation-PT-05-CTLCardinality-07: CTL true CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-09: CTL false CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-13: CONJ true CONJ
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
GlobalResAllocation-PT-05-CTLCardinality-00: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-01: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-02: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-03: EF 0 1 2 0 2 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-06: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-08: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-10: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-11: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-12: CTL 0 0 1 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0
GlobalResAllocation-PT-05-CTLCardinality-15: CTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
37 CTL EXCL 90/243 10/32 GlobalResAllocation-PT-05-CTLCardinality-12 2155819 m, 23342 m/sec, 4574368 t fired, .
58 CTL EXCL 89/221 1/5 GlobalResAllocation-PT-05-CTLCardinality-15 16855 m, 195 m/sec, 35982 t fired, .
64 EF FNDP 1094/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 2667330 t fired, 3 attempts, .
65 EF STEQ 1094/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 sara is running.
Time elapsed: 1253 secs. Pages in use: 40
# running tasks: 4 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
GlobalResAllocation-PT-05-CTLCardinality-04: INITIAL false preprocessing
GlobalResAllocation-PT-05-CTLCardinality-07: CTL true CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-09: CTL false CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-13: CONJ true CONJ
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
GlobalResAllocation-PT-05-CTLCardinality-00: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-01: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-02: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-03: EF 0 1 2 0 2 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-06: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-08: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-10: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-11: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-12: CTL 0 0 1 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0
GlobalResAllocation-PT-05-CTLCardinality-15: CTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
37 CTL EXCL 95/243 11/32 GlobalResAllocation-PT-05-CTLCardinality-12 2274485 m, 23733 m/sec, 4866940 t fired, .
58 CTL EXCL 94/221 1/5 GlobalResAllocation-PT-05-CTLCardinality-15 18111 m, 251 m/sec, 39034 t fired, .
64 EF FNDP 1099/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 2675016 t fired, 3 attempts, .
65 EF STEQ 1099/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 sara is running.
Time elapsed: 1258 secs. Pages in use: 41
# running tasks: 4 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
GlobalResAllocation-PT-05-CTLCardinality-04: INITIAL false preprocessing
GlobalResAllocation-PT-05-CTLCardinality-07: CTL true CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-09: CTL false CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-13: CONJ true CONJ
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
GlobalResAllocation-PT-05-CTLCardinality-00: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-01: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-02: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-03: EF 0 1 2 0 2 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-06: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-08: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-10: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-11: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-12: CTL 0 0 1 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0
GlobalResAllocation-PT-05-CTLCardinality-15: CTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
37 CTL EXCL 101/243 11/32 GlobalResAllocation-PT-05-CTLCardinality-12 2391903 m, 23483 m/sec, 5149320 t fired, .
58 CTL EXCL 100/221 1/5 GlobalResAllocation-PT-05-CTLCardinality-15 19084 m, 194 m/sec, 41185 t fired, .
64 EF FNDP 1105/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 2682538 t fired, 3 attempts, .
65 EF STEQ 1105/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 sara is running.
Time elapsed: 1264 secs. Pages in use: 41
# running tasks: 4 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
GlobalResAllocation-PT-05-CTLCardinality-04: INITIAL false preprocessing
GlobalResAllocation-PT-05-CTLCardinality-07: CTL true CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-09: CTL false CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-13: CONJ true CONJ
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
GlobalResAllocation-PT-05-CTLCardinality-00: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-01: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-02: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-03: EF 0 1 2 0 2 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-06: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-08: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-10: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-11: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-12: CTL 0 0 1 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0
GlobalResAllocation-PT-05-CTLCardinality-15: CTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
37 CTL EXCL 106/243 12/32 GlobalResAllocation-PT-05-CTLCardinality-12 2510998 m, 23819 m/sec, 5444182 t fired, .
58 CTL EXCL 105/221 1/5 GlobalResAllocation-PT-05-CTLCardinality-15 20022 m, 187 m/sec, 42966 t fired, .
64 EF FNDP 1110/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 2689912 t fired, 3 attempts, .
65 EF STEQ 1110/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 sara is running.
Time elapsed: 1269 secs. Pages in use: 42
# running tasks: 4 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
GlobalResAllocation-PT-05-CTLCardinality-04: INITIAL false preprocessing
GlobalResAllocation-PT-05-CTLCardinality-07: CTL true CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-09: CTL false CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-13: CONJ true CONJ
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
GlobalResAllocation-PT-05-CTLCardinality-00: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-01: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-02: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-03: EF 0 1 2 0 2 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-06: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-08: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-10: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-11: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-12: CTL 0 0 1 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0
GlobalResAllocation-PT-05-CTLCardinality-15: CTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
37 CTL EXCL 111/243 12/32 GlobalResAllocation-PT-05-CTLCardinality-12 2631207 m, 24041 m/sec, 5728051 t fired, .
58 CTL EXCL 110/221 1/5 GlobalResAllocation-PT-05-CTLCardinality-15 20890 m, 173 m/sec, 44869 t fired, .
64 EF FNDP 1115/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 2697257 t fired, 3 attempts, .
65 EF STEQ 1115/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 sara is running.
Time elapsed: 1274 secs. Pages in use: 42
# running tasks: 4 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
GlobalResAllocation-PT-05-CTLCardinality-04: INITIAL false preprocessing
GlobalResAllocation-PT-05-CTLCardinality-07: CTL true CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-09: CTL false CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-13: CONJ true CONJ
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
GlobalResAllocation-PT-05-CTLCardinality-00: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-01: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-02: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-03: EF 0 1 2 0 2 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-06: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-08: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-10: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-11: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-12: CTL 0 0 1 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0
GlobalResAllocation-PT-05-CTLCardinality-15: CTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
37 CTL EXCL 116/243 13/32 GlobalResAllocation-PT-05-CTLCardinality-12 2748997 m, 23558 m/sec, 6017906 t fired, .
58 CTL EXCL 115/221 1/5 GlobalResAllocation-PT-05-CTLCardinality-15 22033 m, 228 m/sec, 47462 t fired, .
64 EF FNDP 1120/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 2704827 t fired, 3 attempts, .
65 EF STEQ 1120/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 sara is running.
Time elapsed: 1279 secs. Pages in use: 43
# running tasks: 4 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
GlobalResAllocation-PT-05-CTLCardinality-04: INITIAL false preprocessing
GlobalResAllocation-PT-05-CTLCardinality-07: CTL true CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-09: CTL false CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-13: CONJ true CONJ
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
GlobalResAllocation-PT-05-CTLCardinality-00: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-01: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-02: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-03: EF 0 1 2 0 2 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-06: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-08: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-10: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-11: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-12: CTL 0 0 1 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0
GlobalResAllocation-PT-05-CTLCardinality-15: CTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
37 CTL EXCL 121/243 13/32 GlobalResAllocation-PT-05-CTLCardinality-12 2866396 m, 23479 m/sec, 6320863 t fired, .
58 CTL EXCL 120/221 1/5 GlobalResAllocation-PT-05-CTLCardinality-15 23336 m, 260 m/sec, 50239 t fired, .
64 EF FNDP 1125/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 2712247 t fired, 3 attempts, .
65 EF STEQ 1125/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 sara is running.
Time elapsed: 1284 secs. Pages in use: 43
# running tasks: 4 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
GlobalResAllocation-PT-05-CTLCardinality-04: INITIAL false preprocessing
GlobalResAllocation-PT-05-CTLCardinality-07: CTL true CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-09: CTL false CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-13: CONJ true CONJ
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
GlobalResAllocation-PT-05-CTLCardinality-00: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-01: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-02: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-03: EF 0 1 2 0 2 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-06: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-08: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-10: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-11: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-12: CTL 0 0 1 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0
GlobalResAllocation-PT-05-CTLCardinality-15: CTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
37 CTL EXCL 126/243 14/32 GlobalResAllocation-PT-05-CTLCardinality-12 2986369 m, 23994 m/sec, 6624142 t fired, .
58 CTL EXCL 125/221 1/5 GlobalResAllocation-PT-05-CTLCardinality-15 24354 m, 203 m/sec, 52429 t fired, .
64 EF FNDP 1130/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 2719700 t fired, 3 attempts, .
65 EF STEQ 1130/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 sara is running.
Time elapsed: 1289 secs. Pages in use: 44
# running tasks: 4 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
GlobalResAllocation-PT-05-CTLCardinality-04: INITIAL false preprocessing
GlobalResAllocation-PT-05-CTLCardinality-07: CTL true CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-09: CTL false CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-13: CONJ true CONJ
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
GlobalResAllocation-PT-05-CTLCardinality-00: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-01: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-02: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-03: EF 0 1 2 0 2 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-06: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-08: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-10: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-11: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-12: CTL 0 0 1 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0
GlobalResAllocation-PT-05-CTLCardinality-15: CTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
37 CTL EXCL 131/243 14/32 GlobalResAllocation-PT-05-CTLCardinality-12 3105050 m, 23736 m/sec, 6931452 t fired, .
58 CTL EXCL 130/221 1/5 GlobalResAllocation-PT-05-CTLCardinality-15 25789 m, 287 m/sec, 55785 t fired, .
64 EF FNDP 1135/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 2727374 t fired, 3 attempts, .
65 EF STEQ 1135/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 sara is running.
Time elapsed: 1294 secs. Pages in use: 44
# running tasks: 4 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
GlobalResAllocation-PT-05-CTLCardinality-04: INITIAL false preprocessing
GlobalResAllocation-PT-05-CTLCardinality-07: CTL true CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-09: CTL false CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-13: CONJ true CONJ
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
GlobalResAllocation-PT-05-CTLCardinality-00: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-01: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-02: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-03: EF 0 1 2 0 2 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-06: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-08: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-10: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-11: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-12: CTL 0 0 1 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0
GlobalResAllocation-PT-05-CTLCardinality-15: CTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
37 CTL EXCL 136/243 15/32 GlobalResAllocation-PT-05-CTLCardinality-12 3224405 m, 23871 m/sec, 7242174 t fired, .
58 CTL EXCL 135/221 1/5 GlobalResAllocation-PT-05-CTLCardinality-15 27004 m, 243 m/sec, 58400 t fired, .
64 EF FNDP 1140/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 2734832 t fired, 3 attempts, .
65 EF STEQ 1140/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 sara is running.
Time elapsed: 1299 secs. Pages in use: 45
# running tasks: 4 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
GlobalResAllocation-PT-05-CTLCardinality-04: INITIAL false preprocessing
GlobalResAllocation-PT-05-CTLCardinality-07: CTL true CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-09: CTL false CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-13: CONJ true CONJ
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
GlobalResAllocation-PT-05-CTLCardinality-00: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-01: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-02: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-03: EF 0 1 2 0 2 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-06: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-08: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-10: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-11: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-12: CTL 0 0 1 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0
GlobalResAllocation-PT-05-CTLCardinality-15: CTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
37 CTL EXCL 141/243 15/32 GlobalResAllocation-PT-05-CTLCardinality-12 3343765 m, 23872 m/sec, 7554489 t fired, .
58 CTL EXCL 140/221 1/5 GlobalResAllocation-PT-05-CTLCardinality-15 28027 m, 204 m/sec, 60757 t fired, .
64 EF FNDP 1145/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 2742127 t fired, 3 attempts, .
65 EF STEQ 1145/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 sara is running.
Time elapsed: 1304 secs. Pages in use: 45
# running tasks: 4 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
GlobalResAllocation-PT-05-CTLCardinality-04: INITIAL false preprocessing
GlobalResAllocation-PT-05-CTLCardinality-07: CTL true CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-09: CTL false CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-13: CONJ true CONJ
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
GlobalResAllocation-PT-05-CTLCardinality-00: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-01: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-02: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-03: EF 0 1 2 0 2 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-06: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-08: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-10: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-11: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-12: CTL 0 0 1 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0
GlobalResAllocation-PT-05-CTLCardinality-15: CTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
37 CTL EXCL 146/243 16/32 GlobalResAllocation-PT-05-CTLCardinality-12 3460897 m, 23426 m/sec, 7860627 t fired, .
58 CTL EXCL 145/221 1/5 GlobalResAllocation-PT-05-CTLCardinality-15 29260 m, 246 m/sec, 63689 t fired, .
64 EF FNDP 1150/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 2749434 t fired, 3 attempts, .
65 EF STEQ 1150/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 sara is running.
Time elapsed: 1309 secs. Pages in use: 46
# running tasks: 4 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
GlobalResAllocation-PT-05-CTLCardinality-04: INITIAL false preprocessing
GlobalResAllocation-PT-05-CTLCardinality-07: CTL true CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-09: CTL false CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-13: CONJ true CONJ
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
GlobalResAllocation-PT-05-CTLCardinality-00: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-01: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-02: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-03: EF 0 1 2 0 2 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-06: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-08: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-10: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-11: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-12: CTL 0 0 1 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0
GlobalResAllocation-PT-05-CTLCardinality-15: CTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
37 CTL EXCL 151/243 16/32 GlobalResAllocation-PT-05-CTLCardinality-12 3577116 m, 23243 m/sec, 8167807 t fired, .
58 CTL EXCL 150/221 1/5 GlobalResAllocation-PT-05-CTLCardinality-15 30569 m, 261 m/sec, 66525 t fired, .
64 EF FNDP 1155/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 2756742 t fired, 3 attempts, .
65 EF STEQ 1155/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 sara is running.
Time elapsed: 1314 secs. Pages in use: 46
# running tasks: 4 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
GlobalResAllocation-PT-05-CTLCardinality-04: INITIAL false preprocessing
GlobalResAllocation-PT-05-CTLCardinality-07: CTL true CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-09: CTL false CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-13: CONJ true CONJ
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
GlobalResAllocation-PT-05-CTLCardinality-00: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-01: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-02: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-03: EF 0 1 2 0 2 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-06: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-08: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-10: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-11: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-12: CTL 0 0 1 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0
GlobalResAllocation-PT-05-CTLCardinality-15: CTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
37 CTL EXCL 156/243 17/32 GlobalResAllocation-PT-05-CTLCardinality-12 3692680 m, 23112 m/sec, 8473308 t fired, .
58 CTL EXCL 155/221 1/5 GlobalResAllocation-PT-05-CTLCardinality-15 31544 m, 195 m/sec, 68569 t fired, .
64 EF FNDP 1160/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 2764170 t fired, 3 attempts, .
65 EF STEQ 1160/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 sara is running.
Time elapsed: 1319 secs. Pages in use: 47
# running tasks: 4 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
GlobalResAllocation-PT-05-CTLCardinality-04: INITIAL false preprocessing
GlobalResAllocation-PT-05-CTLCardinality-07: CTL true CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-09: CTL false CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-13: CONJ true CONJ
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
GlobalResAllocation-PT-05-CTLCardinality-00: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-01: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-02: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-03: EF 0 1 2 0 2 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-06: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-08: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-10: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-11: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-12: CTL 0 0 1 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0
GlobalResAllocation-PT-05-CTLCardinality-15: CTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
37 CTL EXCL 161/243 17/32 GlobalResAllocation-PT-05-CTLCardinality-12 3809837 m, 23431 m/sec, 8788018 t fired, .
58 CTL EXCL 160/221 1/5 GlobalResAllocation-PT-05-CTLCardinality-15 32717 m, 234 m/sec, 71275 t fired, .
64 EF FNDP 1165/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 2771451 t fired, 3 attempts, .
65 EF STEQ 1165/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 sara is running.
Time elapsed: 1324 secs. Pages in use: 47
# running tasks: 4 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
GlobalResAllocation-PT-05-CTLCardinality-04: INITIAL false preprocessing
GlobalResAllocation-PT-05-CTLCardinality-07: CTL true CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-09: CTL false CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-13: CONJ true CONJ
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
GlobalResAllocation-PT-05-CTLCardinality-00: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-01: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-02: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-03: EF 0 1 2 0 2 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-06: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-08: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-10: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-11: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-12: CTL 0 0 1 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0
GlobalResAllocation-PT-05-CTLCardinality-15: CTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
37 CTL EXCL 166/243 18/32 GlobalResAllocation-PT-05-CTLCardinality-12 3922385 m, 22509 m/sec, 9091912 t fired, .
58 CTL EXCL 165/221 1/5 GlobalResAllocation-PT-05-CTLCardinality-15 34180 m, 292 m/sec, 74372 t fired, .
64 EF FNDP 1170/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 2779203 t fired, 3 attempts, .
65 EF STEQ 1170/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 sara is running.
Time elapsed: 1329 secs. Pages in use: 48
# running tasks: 4 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
GlobalResAllocation-PT-05-CTLCardinality-04: INITIAL false preprocessing
GlobalResAllocation-PT-05-CTLCardinality-07: CTL true CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-09: CTL false CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-13: CONJ true CONJ
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
GlobalResAllocation-PT-05-CTLCardinality-00: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-01: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-02: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-03: EF 0 1 2 0 2 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-06: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-08: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-10: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-11: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-12: CTL 0 0 1 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0
GlobalResAllocation-PT-05-CTLCardinality-15: CTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
37 CTL EXCL 171/243 18/32 GlobalResAllocation-PT-05-CTLCardinality-12 4038672 m, 23257 m/sec, 9408347 t fired, .
58 CTL EXCL 170/221 1/5 GlobalResAllocation-PT-05-CTLCardinality-15 35646 m, 293 m/sec, 77432 t fired, .
64 EF FNDP 1175/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 2786521 t fired, 3 attempts, .
65 EF STEQ 1175/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 sara is running.
Time elapsed: 1334 secs. Pages in use: 48
# running tasks: 4 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
GlobalResAllocation-PT-05-CTLCardinality-04: INITIAL false preprocessing
GlobalResAllocation-PT-05-CTLCardinality-07: CTL true CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-09: CTL false CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-13: CONJ true CONJ
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
GlobalResAllocation-PT-05-CTLCardinality-00: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-01: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-02: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-03: EF 0 1 2 0 2 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-06: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-08: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-10: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-11: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-12: CTL 0 0 1 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0
GlobalResAllocation-PT-05-CTLCardinality-15: CTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
37 CTL EXCL 176/243 19/32 GlobalResAllocation-PT-05-CTLCardinality-12 4152605 m, 22786 m/sec, 9714873 t fired, .
58 CTL EXCL 175/221 1/5 GlobalResAllocation-PT-05-CTLCardinality-15 37188 m, 308 m/sec, 80751 t fired, .
64 EF FNDP 1180/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 2794137 t fired, 3 attempts, .
65 EF STEQ 1180/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 sara is running.
Time elapsed: 1339 secs. Pages in use: 49
# running tasks: 4 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
GlobalResAllocation-PT-05-CTLCardinality-04: INITIAL false preprocessing
GlobalResAllocation-PT-05-CTLCardinality-07: CTL true CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-09: CTL false CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-13: CONJ true CONJ
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
GlobalResAllocation-PT-05-CTLCardinality-00: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-01: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-02: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-03: EF 0 1 2 0 2 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-06: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-08: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-10: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-11: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-12: CTL 0 0 1 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0
GlobalResAllocation-PT-05-CTLCardinality-15: CTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
37 CTL EXCL 181/243 19/32 GlobalResAllocation-PT-05-CTLCardinality-12 4268293 m, 23137 m/sec, 10024870 t fired, .
58 CTL EXCL 180/221 1/5 GlobalResAllocation-PT-05-CTLCardinality-15 38671 m, 296 m/sec, 83638 t fired, .
64 EF FNDP 1185/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 2801360 t fired, 3 attempts, .
65 EF STEQ 1185/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 sara is running.
Time elapsed: 1344 secs. Pages in use: 49
# running tasks: 4 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
GlobalResAllocation-PT-05-CTLCardinality-04: INITIAL false preprocessing
GlobalResAllocation-PT-05-CTLCardinality-07: CTL true CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-09: CTL false CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-13: CONJ true CONJ
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
GlobalResAllocation-PT-05-CTLCardinality-00: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-01: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-02: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-03: EF 0 1 2 0 2 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-06: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-08: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-10: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-11: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-12: CTL 0 0 1 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0
GlobalResAllocation-PT-05-CTLCardinality-15: CTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
37 CTL EXCL 186/243 20/32 GlobalResAllocation-PT-05-CTLCardinality-12 4386654 m, 23672 m/sec, 10338872 t fired, .
58 CTL EXCL 185/221 1/5 GlobalResAllocation-PT-05-CTLCardinality-15 40054 m, 276 m/sec, 86894 t fired, .
64 EF FNDP 1190/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 2808807 t fired, 3 attempts, .
65 EF STEQ 1190/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 sara is running.
Time elapsed: 1349 secs. Pages in use: 50
# running tasks: 4 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
GlobalResAllocation-PT-05-CTLCardinality-04: INITIAL false preprocessing
GlobalResAllocation-PT-05-CTLCardinality-07: CTL true CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-09: CTL false CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-13: CONJ true CONJ
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
GlobalResAllocation-PT-05-CTLCardinality-00: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-01: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-02: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-03: EF 0 1 2 0 2 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-06: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-08: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-10: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-11: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-12: CTL 0 0 1 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0
GlobalResAllocation-PT-05-CTLCardinality-15: CTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
37 CTL EXCL 191/243 20/32 GlobalResAllocation-PT-05-CTLCardinality-12 4503739 m, 23417 m/sec, 10653822 t fired, .
58 CTL EXCL 190/221 1/5 GlobalResAllocation-PT-05-CTLCardinality-15 41443 m, 277 m/sec, 89772 t fired, .
64 EF FNDP 1195/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 2816407 t fired, 3 attempts, .
65 EF STEQ 1195/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 sara is running.
Time elapsed: 1354 secs. Pages in use: 50
# running tasks: 4 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
GlobalResAllocation-PT-05-CTLCardinality-04: INITIAL false preprocessing
GlobalResAllocation-PT-05-CTLCardinality-07: CTL true CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-09: CTL false CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-13: CONJ true CONJ
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
GlobalResAllocation-PT-05-CTLCardinality-00: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-01: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-02: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-03: EF 0 1 2 0 2 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-06: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-08: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-10: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-11: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-12: CTL 0 0 1 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0
GlobalResAllocation-PT-05-CTLCardinality-15: CTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
37 CTL EXCL 196/243 21/32 GlobalResAllocation-PT-05-CTLCardinality-12 4614944 m, 22241 m/sec, 10966097 t fired, .
58 CTL EXCL 195/221 1/5 GlobalResAllocation-PT-05-CTLCardinality-15 42820 m, 275 m/sec, 92963 t fired, .
64 EF FNDP 1200/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 2823917 t fired, 3 attempts, .
65 EF STEQ 1200/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 sara is running.
Time elapsed: 1359 secs. Pages in use: 51
# running tasks: 4 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
GlobalResAllocation-PT-05-CTLCardinality-04: INITIAL false preprocessing
GlobalResAllocation-PT-05-CTLCardinality-07: CTL true CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-09: CTL false CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-13: CONJ true CONJ
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
GlobalResAllocation-PT-05-CTLCardinality-00: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-01: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-02: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-03: EF 0 1 2 0 2 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-06: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-08: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-10: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-11: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-12: CTL 0 0 1 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0
GlobalResAllocation-PT-05-CTLCardinality-15: CTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
37 CTL EXCL 201/243 21/32 GlobalResAllocation-PT-05-CTLCardinality-12 4732876 m, 23586 m/sec, 11290746 t fired, .
58 CTL EXCL 200/221 1/5 GlobalResAllocation-PT-05-CTLCardinality-15 43942 m, 224 m/sec, 95585 t fired, .
64 EF FNDP 1205/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 2831502 t fired, 3 attempts, .
65 EF STEQ 1205/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 sara is running.
Time elapsed: 1364 secs. Pages in use: 51
# running tasks: 4 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
GlobalResAllocation-PT-05-CTLCardinality-04: INITIAL false preprocessing
GlobalResAllocation-PT-05-CTLCardinality-07: CTL true CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-09: CTL false CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-13: CONJ true CONJ
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
GlobalResAllocation-PT-05-CTLCardinality-00: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-01: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-02: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-03: EF 0 1 2 0 2 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-06: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-08: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-10: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-11: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-12: CTL 0 0 1 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0
GlobalResAllocation-PT-05-CTLCardinality-15: CTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
37 CTL EXCL 206/243 22/32 GlobalResAllocation-PT-05-CTLCardinality-12 4847346 m, 22894 m/sec, 11608116 t fired, .
58 CTL EXCL 205/221 1/5 GlobalResAllocation-PT-05-CTLCardinality-15 45197 m, 251 m/sec, 98170 t fired, .
64 EF FNDP 1210/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 2839089 t fired, 3 attempts, .
65 EF STEQ 1210/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 sara is running.
Time elapsed: 1369 secs. Pages in use: 52
# running tasks: 4 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
GlobalResAllocation-PT-05-CTLCardinality-04: INITIAL false preprocessing
GlobalResAllocation-PT-05-CTLCardinality-07: CTL true CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-09: CTL false CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-13: CONJ true CONJ
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
GlobalResAllocation-PT-05-CTLCardinality-00: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-01: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-02: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-03: EF 0 1 2 0 2 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-06: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-08: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-10: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-11: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-12: CTL 0 0 1 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0
GlobalResAllocation-PT-05-CTLCardinality-15: CTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
37 CTL EXCL 211/243 22/32 GlobalResAllocation-PT-05-CTLCardinality-12 4961907 m, 22912 m/sec, 11927675 t fired, .
58 CTL EXCL 210/221 1/5 GlobalResAllocation-PT-05-CTLCardinality-15 46582 m, 277 m/sec, 101441 t fired, .
64 EF FNDP 1215/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 2846438 t fired, 3 attempts, .
65 EF STEQ 1215/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 sara is running.
Time elapsed: 1374 secs. Pages in use: 52
# running tasks: 4 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
GlobalResAllocation-PT-05-CTLCardinality-04: INITIAL false preprocessing
GlobalResAllocation-PT-05-CTLCardinality-07: CTL true CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-09: CTL false CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-13: CONJ true CONJ
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
GlobalResAllocation-PT-05-CTLCardinality-00: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-01: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-02: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-03: EF 0 1 2 0 2 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-06: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-08: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-10: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-11: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-12: CTL 0 0 1 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0
GlobalResAllocation-PT-05-CTLCardinality-15: CTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
37 CTL EXCL 216/243 23/32 GlobalResAllocation-PT-05-CTLCardinality-12 5077116 m, 23041 m/sec, 12243169 t fired, .
58 CTL EXCL 215/221 1/5 GlobalResAllocation-PT-05-CTLCardinality-15 47148 m, 113 m/sec, 102640 t fired, .
64 EF FNDP 1220/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 2854020 t fired, 3 attempts, .
65 EF STEQ 1220/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 sara is running.
Time elapsed: 1379 secs. Pages in use: 53
# running tasks: 4 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
GlobalResAllocation-PT-05-CTLCardinality-04: INITIAL false preprocessing
GlobalResAllocation-PT-05-CTLCardinality-07: CTL true CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-09: CTL false CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-13: CONJ true CONJ
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
GlobalResAllocation-PT-05-CTLCardinality-00: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-01: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-02: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-03: EF 0 1 2 0 2 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-06: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-08: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-10: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-11: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-12: CTL 0 0 1 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0
GlobalResAllocation-PT-05-CTLCardinality-15: CTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
37 CTL EXCL 221/243 23/32 GlobalResAllocation-PT-05-CTLCardinality-12 5193112 m, 23199 m/sec, 12549350 t fired, .
58 CTL EXCL 220/221 1/5 GlobalResAllocation-PT-05-CTLCardinality-15 48253 m, 221 m/sec, 105324 t fired, .
64 EF FNDP 1225/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 2861154 t fired, 3 attempts, .
65 EF STEQ 1225/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 sara is running.
Time elapsed: 1384 secs. Pages in use: 53
# running tasks: 4 of 4 Visible: 16
lola: CANCELED task # 58 (type EXCL) for GlobalResAllocation-PT-05-CTLCardinality-15 (local timeout)
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
GlobalResAllocation-PT-05-CTLCardinality-04: INITIAL false preprocessing
GlobalResAllocation-PT-05-CTLCardinality-07: CTL true CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-09: CTL false CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-13: CONJ true CONJ
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
GlobalResAllocation-PT-05-CTLCardinality-00: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-01: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-02: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-03: EF 0 1 2 0 2 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-06: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-08: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-10: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-11: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-12: CTL 0 0 1 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0
GlobalResAllocation-PT-05-CTLCardinality-15: CTL 0 0 0 0 1 1 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
37 CTL EXCL 226/243 24/32 GlobalResAllocation-PT-05-CTLCardinality-12 5308398 m, 23057 m/sec, 12860063 t fired, .
64 EF FNDP 1230/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 2868353 t fired, 3 attempts, .
65 EF STEQ 1230/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 sara is running.
Time elapsed: 1389 secs. Pages in use: 54
# running tasks: 4 of 4 Visible: 16
lola: LAUNCH task # 58 (type EXCL) for 57 GlobalResAllocation-PT-05-CTLCardinality-15
lola: time limit : 2211 sec
lola: memory limit: 5 pages
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
GlobalResAllocation-PT-05-CTLCardinality-04: INITIAL false preprocessing
GlobalResAllocation-PT-05-CTLCardinality-07: CTL true CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-09: CTL false CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-13: CONJ true CONJ
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
GlobalResAllocation-PT-05-CTLCardinality-00: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-01: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-02: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-03: EF 0 1 2 0 2 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-06: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-08: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-10: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-11: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-12: CTL 0 0 1 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0
GlobalResAllocation-PT-05-CTLCardinality-15: CTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
37 CTL EXCL 231/243 24/32 GlobalResAllocation-PT-05-CTLCardinality-12 5404136 m, 19147 m/sec, 13121951 t fired, .
58 CTL EXCL 5/2211 1/5 GlobalResAllocation-PT-05-CTLCardinality-15 437 m, -9563 m/sec, 916 t fired, .
64 EF FNDP 1235/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 2874530 t fired, 3 attempts, .
65 EF STEQ 1235/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 sara is running.
Time elapsed: 1394 secs. Pages in use: 56
# running tasks: 4 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
GlobalResAllocation-PT-05-CTLCardinality-04: INITIAL false preprocessing
GlobalResAllocation-PT-05-CTLCardinality-07: CTL true CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-09: CTL false CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-13: CONJ true CONJ
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
GlobalResAllocation-PT-05-CTLCardinality-00: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-01: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-02: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-03: EF 0 1 2 0 2 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-06: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-08: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-10: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-11: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-12: CTL 0 0 1 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0
GlobalResAllocation-PT-05-CTLCardinality-15: CTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
37 CTL EXCL 236/243 25/32 GlobalResAllocation-PT-05-CTLCardinality-12 5506941 m, 20561 m/sec, 13399186 t fired, .
58 CTL EXCL 10/201 1/5 GlobalResAllocation-PT-05-CTLCardinality-15 1115 m, 135 m/sec, 2389 t fired, .
64 EF FNDP 1240/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 2880877 t fired, 3 attempts, .
65 EF STEQ 1240/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 sara is running.
Time elapsed: 1399 secs. Pages in use: 57
# running tasks: 4 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
GlobalResAllocation-PT-05-CTLCardinality-04: INITIAL false preprocessing
GlobalResAllocation-PT-05-CTLCardinality-07: CTL true CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-09: CTL false CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-13: CONJ true CONJ
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
GlobalResAllocation-PT-05-CTLCardinality-00: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-01: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-02: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-03: EF 0 1 2 0 2 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-06: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-08: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-10: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-11: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-12: CTL 0 0 1 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0
GlobalResAllocation-PT-05-CTLCardinality-15: CTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
37 CTL EXCL 241/243 25/32 GlobalResAllocation-PT-05-CTLCardinality-12 5605756 m, 19763 m/sec, 13678128 t fired, .
58 CTL EXCL 15/201 1/5 GlobalResAllocation-PT-05-CTLCardinality-15 1791 m, 135 m/sec, 3894 t fired, .
64 EF FNDP 1245/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 2887756 t fired, 3 attempts, .
65 EF STEQ 1245/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 sara is running.
Time elapsed: 1404 secs. Pages in use: 57
# running tasks: 4 of 4 Visible: 16
lola: CANCELED task # 37 (type EXCL) for GlobalResAllocation-PT-05-CTLCardinality-12 (local timeout)
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
GlobalResAllocation-PT-05-CTLCardinality-04: INITIAL false preprocessing
GlobalResAllocation-PT-05-CTLCardinality-07: CTL true CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-09: CTL false CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-13: CONJ true CONJ
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
GlobalResAllocation-PT-05-CTLCardinality-00: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-01: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-02: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-03: EF 0 1 2 0 2 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-06: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-08: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-10: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-11: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-12: CTL 0 0 0 0 1 1 0 0
GlobalResAllocation-PT-05-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0
GlobalResAllocation-PT-05-CTLCardinality-15: CTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
58 CTL EXCL 20/201 1/5 GlobalResAllocation-PT-05-CTLCardinality-15 2617 m, 165 m/sec, 5461 t fired, .
64 EF FNDP 1250/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 2894282 t fired, 3 attempts, .
65 EF STEQ 1250/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 sara is running.
Time elapsed: 1409 secs. Pages in use: 58
# running tasks: 4 of 4 Visible: 16
lola: LAUNCH task # 37 (type EXCL) for 36 GlobalResAllocation-PT-05-CTLCardinality-12
lola: time limit : 2191 sec
lola: memory limit: 5 pages
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
GlobalResAllocation-PT-05-CTLCardinality-04: INITIAL false preprocessing
GlobalResAllocation-PT-05-CTLCardinality-07: CTL true CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-09: CTL false CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-13: CONJ true CONJ
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
GlobalResAllocation-PT-05-CTLCardinality-00: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-01: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-02: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-03: EF 0 1 2 0 2 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-06: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-08: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-10: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-11: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-12: CTL 0 0 1 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0
GlobalResAllocation-PT-05-CTLCardinality-15: CTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
37 CTL EXCL 5/2191 1/5 GlobalResAllocation-PT-05-CTLCardinality-12 77666 m, -1105618 m/sec, 131718 t fired, .
58 CTL EXCL 25/221 1/5 GlobalResAllocation-PT-05-CTLCardinality-15 3362 m, 149 m/sec, 6838 t fired, .
64 EF FNDP 1255/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 2900902 t fired, 3 attempts, .
65 EF STEQ 1255/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 sara is running.
Time elapsed: 1414 secs. Pages in use: 60
# running tasks: 4 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
GlobalResAllocation-PT-05-CTLCardinality-04: INITIAL false preprocessing
GlobalResAllocation-PT-05-CTLCardinality-07: CTL true CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-09: CTL false CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-13: CONJ true CONJ
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
GlobalResAllocation-PT-05-CTLCardinality-00: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-01: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-02: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-03: EF 0 1 2 0 2 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-06: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-08: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-10: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-11: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-12: CTL 0 0 1 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0
GlobalResAllocation-PT-05-CTLCardinality-15: CTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
37 CTL EXCL 10/2191 1/5 GlobalResAllocation-PT-05-CTLCardinality-12 154826 m, 15432 m/sec, 270327 t fired, .
58 CTL EXCL 30/201 1/5 GlobalResAllocation-PT-05-CTLCardinality-15 4237 m, 175 m/sec, 8723 t fired, .
64 EF FNDP 1260/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 2907796 t fired, 3 attempts, .
65 EF STEQ 1260/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 sara is running.
Time elapsed: 1419 secs. Pages in use: 60
# running tasks: 4 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
GlobalResAllocation-PT-05-CTLCardinality-04: INITIAL false preprocessing
GlobalResAllocation-PT-05-CTLCardinality-07: CTL true CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-09: CTL false CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-13: CONJ true CONJ
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
GlobalResAllocation-PT-05-CTLCardinality-00: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-01: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-02: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-03: EF 0 1 2 0 2 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-06: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-08: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-10: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-11: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-12: CTL 0 0 1 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0
GlobalResAllocation-PT-05-CTLCardinality-15: CTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
37 CTL EXCL 15/2191 2/5 GlobalResAllocation-PT-05-CTLCardinality-12 240084 m, 17051 m/sec, 427759 t fired, .
58 CTL EXCL 35/201 1/5 GlobalResAllocation-PT-05-CTLCardinality-15 4898 m, 132 m/sec, 10126 t fired, .
64 EF FNDP 1265/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 2914115 t fired, 3 attempts, .
65 EF STEQ 1265/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 sara is running.
Time elapsed: 1424 secs. Pages in use: 62
# running tasks: 4 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
GlobalResAllocation-PT-05-CTLCardinality-04: INITIAL false preprocessing
GlobalResAllocation-PT-05-CTLCardinality-07: CTL true CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-09: CTL false CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-13: CONJ true CONJ
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
GlobalResAllocation-PT-05-CTLCardinality-00: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-01: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-02: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-03: EF 0 1 2 0 2 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-06: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-08: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-10: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-11: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-12: CTL 0 0 1 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0
GlobalResAllocation-PT-05-CTLCardinality-15: CTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
37 CTL EXCL 20/2191 2/5 GlobalResAllocation-PT-05-CTLCardinality-12 335326 m, 19048 m/sec, 601738 t fired, .
58 CTL EXCL 40/201 1/5 GlobalResAllocation-PT-05-CTLCardinality-15 5651 m, 150 m/sec, 11463 t fired, .
64 EF FNDP 1270/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 2920158 t fired, 3 attempts, .
65 EF STEQ 1270/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 sara is running.
Time elapsed: 1429 secs. Pages in use: 62
# running tasks: 4 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
GlobalResAllocation-PT-05-CTLCardinality-04: INITIAL false preprocessing
GlobalResAllocation-PT-05-CTLCardinality-07: CTL true CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-09: CTL false CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-13: CONJ true CONJ
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
GlobalResAllocation-PT-05-CTLCardinality-00: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-01: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-02: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-03: EF 0 1 2 0 2 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-06: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-08: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-10: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-11: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-12: CTL 0 0 1 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0
GlobalResAllocation-PT-05-CTLCardinality-15: CTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
37 CTL EXCL 25/2191 2/5 GlobalResAllocation-PT-05-CTLCardinality-12 424537 m, 17842 m/sec, 766057 t fired, .
58 CTL EXCL 45/201 1/5 GlobalResAllocation-PT-05-CTLCardinality-15 6313 m, 132 m/sec, 12877 t fired, .
64 EF FNDP 1275/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 2926543 t fired, 3 attempts, .
65 EF STEQ 1275/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 sara is running.
Time elapsed: 1434 secs. Pages in use: 62
# running tasks: 4 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
GlobalResAllocation-PT-05-CTLCardinality-04: INITIAL false preprocessing
GlobalResAllocation-PT-05-CTLCardinality-07: CTL true CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-09: CTL false CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-13: CONJ true CONJ
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
GlobalResAllocation-PT-05-CTLCardinality-00: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-01: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-02: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-03: EF 0 1 2 0 2 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-06: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-08: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-10: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-11: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-12: CTL 0 0 1 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0
GlobalResAllocation-PT-05-CTLCardinality-15: CTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
37 CTL EXCL 30/2191 3/5 GlobalResAllocation-PT-05-CTLCardinality-12 518753 m, 18843 m/sec, 945388 t fired, .
58 CTL EXCL 50/201 1/5 GlobalResAllocation-PT-05-CTLCardinality-15 7250 m, 187 m/sec, 14798 t fired, .
64 EF FNDP 1280/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 2932492 t fired, 3 attempts, .
65 EF STEQ 1280/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 sara is running.
Time elapsed: 1439 secs. Pages in use: 64
# running tasks: 4 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
GlobalResAllocation-PT-05-CTLCardinality-04: INITIAL false preprocessing
GlobalResAllocation-PT-05-CTLCardinality-07: CTL true CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-09: CTL false CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-13: CONJ true CONJ
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
GlobalResAllocation-PT-05-CTLCardinality-00: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-01: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-02: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-03: EF 0 1 2 0 2 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-06: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-08: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-10: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-11: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-12: CTL 0 0 1 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0
GlobalResAllocation-PT-05-CTLCardinality-15: CTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
37 CTL EXCL 35/2191 3/5 GlobalResAllocation-PT-05-CTLCardinality-12 613563 m, 18962 m/sec, 1130282 t fired, .
58 CTL EXCL 55/201 1/5 GlobalResAllocation-PT-05-CTLCardinality-15 8111 m, 172 m/sec, 16509 t fired, .
64 EF FNDP 1285/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 2938102 t fired, 3 attempts, .
65 EF STEQ 1285/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 sara is running.
Time elapsed: 1444 secs. Pages in use: 64
# running tasks: 4 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
GlobalResAllocation-PT-05-CTLCardinality-04: INITIAL false preprocessing
GlobalResAllocation-PT-05-CTLCardinality-07: CTL true CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-09: CTL false CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-13: CONJ true CONJ
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
GlobalResAllocation-PT-05-CTLCardinality-00: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-01: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-02: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-03: EF 0 1 2 0 2 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-06: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-08: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-10: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-11: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-12: CTL 0 0 1 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0
GlobalResAllocation-PT-05-CTLCardinality-15: CTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
37 CTL EXCL 40/2191 4/5 GlobalResAllocation-PT-05-CTLCardinality-12 704287 m, 18144 m/sec, 1312534 t fired, .
58 CTL EXCL 60/201 1/5 GlobalResAllocation-PT-05-CTLCardinality-15 8824 m, 142 m/sec, 17933 t fired, .
64 EF FNDP 1290/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 2944530 t fired, 3 attempts, .
65 EF STEQ 1290/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 sara is running.
Time elapsed: 1449 secs. Pages in use: 65
# running tasks: 4 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
GlobalResAllocation-PT-05-CTLCardinality-04: INITIAL false preprocessing
GlobalResAllocation-PT-05-CTLCardinality-07: CTL true CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-09: CTL false CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-13: CONJ true CONJ
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
GlobalResAllocation-PT-05-CTLCardinality-00: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-01: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-02: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-03: EF 0 1 2 0 2 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-06: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-08: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-10: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-11: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-12: CTL 0 0 1 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0
GlobalResAllocation-PT-05-CTLCardinality-15: CTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
37 CTL EXCL 45/2191 4/5 GlobalResAllocation-PT-05-CTLCardinality-12 786426 m, 16427 m/sec, 1478784 t fired, .
58 CTL EXCL 65/201 1/5 GlobalResAllocation-PT-05-CTLCardinality-15 9673 m, 169 m/sec, 19782 t fired, .
64 EF FNDP 1295/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 2951075 t fired, 3 attempts, .
65 EF STEQ 1295/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 sara is running.
Time elapsed: 1454 secs. Pages in use: 66
# running tasks: 4 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
GlobalResAllocation-PT-05-CTLCardinality-04: INITIAL false preprocessing
GlobalResAllocation-PT-05-CTLCardinality-07: CTL true CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-09: CTL false CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-13: CONJ true CONJ
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
GlobalResAllocation-PT-05-CTLCardinality-00: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-01: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-02: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-03: EF 0 1 2 0 2 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-06: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-08: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-10: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-11: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-12: CTL 0 0 1 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0
GlobalResAllocation-PT-05-CTLCardinality-15: CTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
37 CTL EXCL 50/2191 4/5 GlobalResAllocation-PT-05-CTLCardinality-12 877827 m, 18280 m/sec, 1666834 t fired, .
58 CTL EXCL 70/201 1/5 GlobalResAllocation-PT-05-CTLCardinality-15 10391 m, 143 m/sec, 21372 t fired, .
64 EF FNDP 1300/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 2957203 t fired, 3 attempts, .
65 EF STEQ 1300/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 sara is running.
Time elapsed: 1459 secs. Pages in use: 66
# running tasks: 4 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
GlobalResAllocation-PT-05-CTLCardinality-04: INITIAL false preprocessing
GlobalResAllocation-PT-05-CTLCardinality-07: CTL true CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-09: CTL false CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-13: CONJ true CONJ
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
GlobalResAllocation-PT-05-CTLCardinality-00: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-01: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-02: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-03: EF 0 1 2 0 2 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-06: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-08: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-10: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-11: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-12: CTL 0 0 1 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0
GlobalResAllocation-PT-05-CTLCardinality-15: CTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
37 CTL EXCL 55/2191 5/5 GlobalResAllocation-PT-05-CTLCardinality-12 962583 m, 16951 m/sec, 1845957 t fired, .
58 CTL EXCL 75/201 1/5 GlobalResAllocation-PT-05-CTLCardinality-15 11376 m, 197 m/sec, 23584 t fired, .
64 EF FNDP 1305/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 2963612 t fired, 3 attempts, .
65 EF STEQ 1305/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 sara is running.
Time elapsed: 1464 secs. Pages in use: 67
# running tasks: 4 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
GlobalResAllocation-PT-05-CTLCardinality-04: INITIAL false preprocessing
GlobalResAllocation-PT-05-CTLCardinality-07: CTL true CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-09: CTL false CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-13: CONJ true CONJ
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
GlobalResAllocation-PT-05-CTLCardinality-00: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-01: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-02: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-03: EF 0 1 2 0 2 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-06: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-08: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-10: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-11: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-12: CTL 0 0 1 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0
GlobalResAllocation-PT-05-CTLCardinality-15: CTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
37 CTL EXCL 60/2191 5/5 GlobalResAllocation-PT-05-CTLCardinality-12 1053861 m, 18255 m/sec, 2036529 t fired, .
58 CTL EXCL 80/201 1/5 GlobalResAllocation-PT-05-CTLCardinality-15 12077 m, 140 m/sec, 25244 t fired, .
64 EF FNDP 1310/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 2969780 t fired, 3 attempts, .
65 EF STEQ 1310/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 sara is running.
Time elapsed: 1469 secs. Pages in use: 68
# running tasks: 4 of 4 Visible: 16
lola: CANCELED task # 37 (type EXCL) for GlobalResAllocation-PT-05-CTLCardinality-12 (memory limit exceeded)
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
GlobalResAllocation-PT-05-CTLCardinality-04: INITIAL false preprocessing
GlobalResAllocation-PT-05-CTLCardinality-07: CTL true CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-09: CTL false CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-13: CONJ true CONJ
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
GlobalResAllocation-PT-05-CTLCardinality-00: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-01: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-02: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-03: EF 0 1 2 0 2 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-06: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-08: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-10: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-11: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-12: CTL 0 0 0 0 1 0 1 0
GlobalResAllocation-PT-05-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0
GlobalResAllocation-PT-05-CTLCardinality-15: CTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
58 CTL EXCL 85/201 1/5 GlobalResAllocation-PT-05-CTLCardinality-15 13220 m, 228 m/sec, 27651 t fired, .
64 EF FNDP 1315/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 2976019 t fired, 3 attempts, .
65 EF STEQ 1315/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 sara is running.
Time elapsed: 1474 secs. Pages in use: 68
# running tasks: 4 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
GlobalResAllocation-PT-05-CTLCardinality-04: INITIAL false preprocessing
GlobalResAllocation-PT-05-CTLCardinality-07: CTL true CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-09: CTL false CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-13: CONJ true CONJ
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
GlobalResAllocation-PT-05-CTLCardinality-00: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-01: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-02: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-03: EF 0 1 2 0 2 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-06: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-08: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-10: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-11: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-12: CTL 0 0 0 0 1 0 1 0
GlobalResAllocation-PT-05-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0
GlobalResAllocation-PT-05-CTLCardinality-15: CTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
58 CTL EXCL 90/221 1/5 GlobalResAllocation-PT-05-CTLCardinality-15 14075 m, 171 m/sec, 29605 t fired, .
64 EF FNDP 1320/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 2981915 t fired, 3 attempts, .
65 EF STEQ 1320/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 sara is running.
Time elapsed: 1479 secs. Pages in use: 68
# running tasks: 3 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
GlobalResAllocation-PT-05-CTLCardinality-04: INITIAL false preprocessing
GlobalResAllocation-PT-05-CTLCardinality-07: CTL true CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-09: CTL false CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-13: CONJ true CONJ
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
GlobalResAllocation-PT-05-CTLCardinality-00: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-01: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-02: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-03: EF 0 1 2 0 2 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-06: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-08: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-10: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-11: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-12: CTL 0 0 0 0 1 0 1 0
GlobalResAllocation-PT-05-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0
GlobalResAllocation-PT-05-CTLCardinality-15: CTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
58 CTL EXCL 95/221 1/5 GlobalResAllocation-PT-05-CTLCardinality-15 14896 m, 164 m/sec, 31521 t fired, .
64 EF FNDP 1325/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 2988423 t fired, 3 attempts, .
65 EF STEQ 1325/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 sara is running.
Time elapsed: 1484 secs. Pages in use: 68
# running tasks: 3 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
GlobalResAllocation-PT-05-CTLCardinality-04: INITIAL false preprocessing
GlobalResAllocation-PT-05-CTLCardinality-07: CTL true CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-09: CTL false CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-13: CONJ true CONJ
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
GlobalResAllocation-PT-05-CTLCardinality-00: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-01: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-02: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-03: EF 0 1 2 0 2 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-06: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-08: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-10: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-11: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-12: CTL 0 0 0 0 1 0 1 0
GlobalResAllocation-PT-05-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0
GlobalResAllocation-PT-05-CTLCardinality-15: CTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
58 CTL EXCL 100/221 1/5 GlobalResAllocation-PT-05-CTLCardinality-15 15751 m, 171 m/sec, 33476 t fired, .
64 EF FNDP 1330/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 2995376 t fired, 3 attempts, .
65 EF STEQ 1330/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 sara is running.
Time elapsed: 1489 secs. Pages in use: 68
# running tasks: 3 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
GlobalResAllocation-PT-05-CTLCardinality-04: INITIAL false preprocessing
GlobalResAllocation-PT-05-CTLCardinality-07: CTL true CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-09: CTL false CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-13: CONJ true CONJ
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
GlobalResAllocation-PT-05-CTLCardinality-00: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-01: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-02: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-03: EF 0 1 2 0 2 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-06: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-08: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-10: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-11: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-12: CTL 0 0 0 0 1 0 1 0
GlobalResAllocation-PT-05-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0
GlobalResAllocation-PT-05-CTLCardinality-15: CTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
58 CTL EXCL 105/221 1/5 GlobalResAllocation-PT-05-CTLCardinality-15 16800 m, 209 m/sec, 35848 t fired, .
64 EF FNDP 1335/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 3001746 t fired, 4 attempts, .
65 EF STEQ 1335/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 sara is running.
Time elapsed: 1494 secs. Pages in use: 68
# running tasks: 3 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
GlobalResAllocation-PT-05-CTLCardinality-04: INITIAL false preprocessing
GlobalResAllocation-PT-05-CTLCardinality-07: CTL true CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-09: CTL false CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-13: CONJ true CONJ
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
GlobalResAllocation-PT-05-CTLCardinality-00: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-01: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-02: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-03: EF 0 1 2 0 2 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-06: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-08: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-10: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-11: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-12: CTL 0 0 0 0 1 0 1 0
GlobalResAllocation-PT-05-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0
GlobalResAllocation-PT-05-CTLCardinality-15: CTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
58 CTL EXCL 110/221 1/5 GlobalResAllocation-PT-05-CTLCardinality-15 17602 m, 160 m/sec, 37901 t fired, .
64 EF FNDP 1340/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 3007728 t fired, 4 attempts, .
65 EF STEQ 1340/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 sara is running.
Time elapsed: 1499 secs. Pages in use: 68
# running tasks: 3 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
GlobalResAllocation-PT-05-CTLCardinality-04: INITIAL false preprocessing
GlobalResAllocation-PT-05-CTLCardinality-07: CTL true CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-09: CTL false CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-13: CONJ true CONJ
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
GlobalResAllocation-PT-05-CTLCardinality-00: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-01: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-02: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-03: EF 0 1 2 0 2 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-06: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-08: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-10: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-11: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-12: CTL 0 0 0 0 1 0 1 0
GlobalResAllocation-PT-05-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0
GlobalResAllocation-PT-05-CTLCardinality-15: CTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
58 CTL EXCL 115/221 1/5 GlobalResAllocation-PT-05-CTLCardinality-15 18666 m, 212 m/sec, 40247 t fired, .
64 EF FNDP 1345/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 3014462 t fired, 4 attempts, .
65 EF STEQ 1345/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 sara is running.
Time elapsed: 1504 secs. Pages in use: 68
# running tasks: 3 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
GlobalResAllocation-PT-05-CTLCardinality-04: INITIAL false preprocessing
GlobalResAllocation-PT-05-CTLCardinality-07: CTL true CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-09: CTL false CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-13: CONJ true CONJ
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
GlobalResAllocation-PT-05-CTLCardinality-00: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-01: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-02: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-03: EF 0 1 2 0 2 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-06: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-08: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-10: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-11: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-12: CTL 0 0 0 0 1 0 1 0
GlobalResAllocation-PT-05-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0
GlobalResAllocation-PT-05-CTLCardinality-15: CTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
58 CTL EXCL 120/221 1/5 GlobalResAllocation-PT-05-CTLCardinality-15 19471 m, 161 m/sec, 41973 t fired, .
64 EF FNDP 1350/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 3020556 t fired, 4 attempts, .
65 EF STEQ 1350/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 sara is running.
Time elapsed: 1509 secs. Pages in use: 68
# running tasks: 3 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
GlobalResAllocation-PT-05-CTLCardinality-04: INITIAL false preprocessing
GlobalResAllocation-PT-05-CTLCardinality-07: CTL true CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-09: CTL false CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-13: CONJ true CONJ
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
GlobalResAllocation-PT-05-CTLCardinality-00: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-01: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-02: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-03: EF 0 1 2 0 2 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-06: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-08: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-10: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-11: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-12: CTL 0 0 0 0 1 0 1 0
GlobalResAllocation-PT-05-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0
GlobalResAllocation-PT-05-CTLCardinality-15: CTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
58 CTL EXCL 125/221 1/5 GlobalResAllocation-PT-05-CTLCardinality-15 20250 m, 155 m/sec, 43397 t fired, .
64 EF FNDP 1355/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 3026768 t fired, 4 attempts, .
65 EF STEQ 1355/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 sara is running.
Time elapsed: 1514 secs. Pages in use: 68
# running tasks: 3 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
GlobalResAllocation-PT-05-CTLCardinality-04: INITIAL false preprocessing
GlobalResAllocation-PT-05-CTLCardinality-07: CTL true CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-09: CTL false CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-13: CONJ true CONJ
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
GlobalResAllocation-PT-05-CTLCardinality-00: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-01: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-02: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-03: EF 0 1 2 0 2 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-06: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-08: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-10: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-11: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-12: CTL 0 0 0 0 1 0 1 0
GlobalResAllocation-PT-05-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0
GlobalResAllocation-PT-05-CTLCardinality-15: CTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
58 CTL EXCL 130/221 1/5 GlobalResAllocation-PT-05-CTLCardinality-15 21076 m, 165 m/sec, 45363 t fired, .
64 EF FNDP 1360/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 3033120 t fired, 4 attempts, .
65 EF STEQ 1360/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 sara is running.
Time elapsed: 1519 secs. Pages in use: 68
# running tasks: 3 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
GlobalResAllocation-PT-05-CTLCardinality-04: INITIAL false preprocessing
GlobalResAllocation-PT-05-CTLCardinality-07: CTL true CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-09: CTL false CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-13: CONJ true CONJ
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
GlobalResAllocation-PT-05-CTLCardinality-00: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-01: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-02: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-03: EF 0 1 2 0 2 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-06: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-08: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-10: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-11: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-12: CTL 0 0 0 0 1 0 1 0
GlobalResAllocation-PT-05-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0
GlobalResAllocation-PT-05-CTLCardinality-15: CTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
58 CTL EXCL 135/221 1/5 GlobalResAllocation-PT-05-CTLCardinality-15 22190 m, 222 m/sec, 47785 t fired, .
64 EF FNDP 1365/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 3039313 t fired, 4 attempts, .
65 EF STEQ 1365/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 sara is running.
Time elapsed: 1524 secs. Pages in use: 68
# running tasks: 3 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
GlobalResAllocation-PT-05-CTLCardinality-04: INITIAL false preprocessing
GlobalResAllocation-PT-05-CTLCardinality-07: CTL true CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-09: CTL false CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-13: CONJ true CONJ
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
GlobalResAllocation-PT-05-CTLCardinality-00: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-01: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-02: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-03: EF 0 1 2 0 2 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-06: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-08: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-10: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-11: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-12: CTL 0 0 0 0 1 0 1 0
GlobalResAllocation-PT-05-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0
GlobalResAllocation-PT-05-CTLCardinality-15: CTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
58 CTL EXCL 140/221 1/5 GlobalResAllocation-PT-05-CTLCardinality-15 23431 m, 248 m/sec, 50424 t fired, .
64 EF FNDP 1370/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 3045445 t fired, 4 attempts, .
65 EF STEQ 1370/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 sara is running.
Time elapsed: 1529 secs. Pages in use: 69
# running tasks: 3 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
GlobalResAllocation-PT-05-CTLCardinality-04: INITIAL false preprocessing
GlobalResAllocation-PT-05-CTLCardinality-07: CTL true CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-09: CTL false CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-13: CONJ true CONJ
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
GlobalResAllocation-PT-05-CTLCardinality-00: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-01: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-02: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-03: EF 0 1 2 0 2 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-06: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-08: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-10: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-11: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-12: CTL 0 0 0 0 1 0 1 0
GlobalResAllocation-PT-05-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0
GlobalResAllocation-PT-05-CTLCardinality-15: CTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
58 CTL EXCL 145/221 1/5 GlobalResAllocation-PT-05-CTLCardinality-15 24428 m, 199 m/sec, 52610 t fired, .
64 EF FNDP 1375/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 3051540 t fired, 4 attempts, .
65 EF STEQ 1375/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 sara is running.
Time elapsed: 1534 secs. Pages in use: 69
# running tasks: 3 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
GlobalResAllocation-PT-05-CTLCardinality-04: INITIAL false preprocessing
GlobalResAllocation-PT-05-CTLCardinality-07: CTL true CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-09: CTL false CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-13: CONJ true CONJ
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
GlobalResAllocation-PT-05-CTLCardinality-00: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-01: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-02: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-03: EF 0 1 2 0 2 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-06: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-08: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-10: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-11: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-12: CTL 0 0 0 0 1 0 1 0
GlobalResAllocation-PT-05-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0
GlobalResAllocation-PT-05-CTLCardinality-15: CTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
58 CTL EXCL 150/221 1/5 GlobalResAllocation-PT-05-CTLCardinality-15 25728 m, 260 m/sec, 55646 t fired, .
64 EF FNDP 1380/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 3058080 t fired, 4 attempts, .
65 EF STEQ 1380/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 sara is running.
Time elapsed: 1539 secs. Pages in use: 70
# running tasks: 3 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
GlobalResAllocation-PT-05-CTLCardinality-04: INITIAL false preprocessing
GlobalResAllocation-PT-05-CTLCardinality-07: CTL true CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-09: CTL false CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-13: CONJ true CONJ
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
GlobalResAllocation-PT-05-CTLCardinality-00: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-01: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-02: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-03: EF 0 1 2 0 2 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-06: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-08: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-10: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-11: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-12: CTL 0 0 0 0 1 0 1 0
GlobalResAllocation-PT-05-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0
GlobalResAllocation-PT-05-CTLCardinality-15: CTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
58 CTL EXCL 155/221 1/5 GlobalResAllocation-PT-05-CTLCardinality-15 26830 m, 220 m/sec, 57979 t fired, .
64 EF FNDP 1385/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 3064567 t fired, 4 attempts, .
65 EF STEQ 1385/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 sara is running.
Time elapsed: 1544 secs. Pages in use: 70
# running tasks: 3 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
GlobalResAllocation-PT-05-CTLCardinality-04: INITIAL false preprocessing
GlobalResAllocation-PT-05-CTLCardinality-07: CTL true CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-09: CTL false CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-13: CONJ true CONJ
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
GlobalResAllocation-PT-05-CTLCardinality-00: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-01: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-02: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-03: EF 0 1 2 0 2 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-06: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-08: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-10: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-11: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-12: CTL 0 0 0 0 1 0 1 0
GlobalResAllocation-PT-05-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0
GlobalResAllocation-PT-05-CTLCardinality-15: CTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
58 CTL EXCL 160/221 1/5 GlobalResAllocation-PT-05-CTLCardinality-15 27851 m, 204 m/sec, 60341 t fired, .
64 EF FNDP 1390/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 3071071 t fired, 4 attempts, .
65 EF STEQ 1390/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 sara is running.
Time elapsed: 1549 secs. Pages in use: 70
# running tasks: 3 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
GlobalResAllocation-PT-05-CTLCardinality-04: INITIAL false preprocessing
GlobalResAllocation-PT-05-CTLCardinality-07: CTL true CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-09: CTL false CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-13: CONJ true CONJ
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
GlobalResAllocation-PT-05-CTLCardinality-00: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-01: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-02: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-03: EF 0 1 2 0 2 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-06: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-08: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-10: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-11: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-12: CTL 0 0 0 0 1 0 1 0
GlobalResAllocation-PT-05-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0
GlobalResAllocation-PT-05-CTLCardinality-15: CTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
58 CTL EXCL 165/221 1/5 GlobalResAllocation-PT-05-CTLCardinality-15 28656 m, 161 m/sec, 62246 t fired, .
64 EF FNDP 1395/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 3077296 t fired, 4 attempts, .
65 EF STEQ 1395/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 sara is running.
Time elapsed: 1554 secs. Pages in use: 71
# running tasks: 3 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
GlobalResAllocation-PT-05-CTLCardinality-04: INITIAL false preprocessing
GlobalResAllocation-PT-05-CTLCardinality-07: CTL true CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-09: CTL false CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-13: CONJ true CONJ
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
GlobalResAllocation-PT-05-CTLCardinality-00: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-01: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-02: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-03: EF 0 1 2 0 2 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-06: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-08: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-10: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-11: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-12: CTL 0 0 0 0 1 0 1 0
GlobalResAllocation-PT-05-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0
GlobalResAllocation-PT-05-CTLCardinality-15: CTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
58 CTL EXCL 170/221 1/5 GlobalResAllocation-PT-05-CTLCardinality-15 29871 m, 243 m/sec, 64985 t fired, .
64 EF FNDP 1400/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 3083536 t fired, 4 attempts, .
65 EF STEQ 1400/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 sara is running.
Time elapsed: 1559 secs. Pages in use: 71
# running tasks: 3 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
GlobalResAllocation-PT-05-CTLCardinality-04: INITIAL false preprocessing
GlobalResAllocation-PT-05-CTLCardinality-07: CTL true CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-09: CTL false CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-13: CONJ true CONJ
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
GlobalResAllocation-PT-05-CTLCardinality-00: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-01: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-02: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-03: EF 0 1 2 0 2 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-06: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-08: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-10: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-11: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-12: CTL 0 0 0 0 1 0 1 0
GlobalResAllocation-PT-05-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0
GlobalResAllocation-PT-05-CTLCardinality-15: CTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
58 CTL EXCL 175/221 1/5 GlobalResAllocation-PT-05-CTLCardinality-15 31135 m, 252 m/sec, 67705 t fired, .
64 EF FNDP 1405/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 3089962 t fired, 4 attempts, .
65 EF STEQ 1405/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 sara is running.
Time elapsed: 1564 secs. Pages in use: 72
# running tasks: 3 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
GlobalResAllocation-PT-05-CTLCardinality-04: INITIAL false preprocessing
GlobalResAllocation-PT-05-CTLCardinality-07: CTL true CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-09: CTL false CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-13: CONJ true CONJ
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
GlobalResAllocation-PT-05-CTLCardinality-00: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-01: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-02: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-03: EF 0 1 2 0 2 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-06: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-08: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-10: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-11: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-12: CTL 0 0 0 0 1 0 1 0
GlobalResAllocation-PT-05-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0
GlobalResAllocation-PT-05-CTLCardinality-15: CTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
58 CTL EXCL 180/221 1/5 GlobalResAllocation-PT-05-CTLCardinality-15 32020 m, 177 m/sec, 69628 t fired, .
64 EF FNDP 1410/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 3096811 t fired, 4 attempts, .
65 EF STEQ 1410/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 sara is running.
Time elapsed: 1569 secs. Pages in use: 72
# running tasks: 3 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
GlobalResAllocation-PT-05-CTLCardinality-04: INITIAL false preprocessing
GlobalResAllocation-PT-05-CTLCardinality-07: CTL true CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-09: CTL false CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-13: CONJ true CONJ
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
GlobalResAllocation-PT-05-CTLCardinality-00: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-01: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-02: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-03: EF 0 1 2 0 2 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-06: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-08: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-10: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-11: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-12: CTL 0 0 0 0 1 0 1 0
GlobalResAllocation-PT-05-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0
GlobalResAllocation-PT-05-CTLCardinality-15: CTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
58 CTL EXCL 185/221 1/5 GlobalResAllocation-PT-05-CTLCardinality-15 33191 m, 234 m/sec, 72259 t fired, .
64 EF FNDP 1415/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 3103709 t fired, 4 attempts, .
65 EF STEQ 1415/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 sara is running.
Time elapsed: 1574 secs. Pages in use: 73
# running tasks: 3 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
GlobalResAllocation-PT-05-CTLCardinality-04: INITIAL false preprocessing
GlobalResAllocation-PT-05-CTLCardinality-07: CTL true CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-09: CTL false CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-13: CONJ true CONJ
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
GlobalResAllocation-PT-05-CTLCardinality-00: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-01: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-02: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-03: EF 0 1 2 0 2 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-06: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-08: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-10: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-11: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-12: CTL 0 0 0 0 1 0 1 0
GlobalResAllocation-PT-05-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0
GlobalResAllocation-PT-05-CTLCardinality-15: CTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
58 CTL EXCL 190/221 1/5 GlobalResAllocation-PT-05-CTLCardinality-15 34500 m, 261 m/sec, 74969 t fired, .
64 EF FNDP 1420/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 3110468 t fired, 4 attempts, .
65 EF STEQ 1420/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 sara is running.
Time elapsed: 1579 secs. Pages in use: 73
# running tasks: 3 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
GlobalResAllocation-PT-05-CTLCardinality-04: INITIAL false preprocessing
GlobalResAllocation-PT-05-CTLCardinality-07: CTL true CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-09: CTL false CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-13: CONJ true CONJ
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
GlobalResAllocation-PT-05-CTLCardinality-00: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-01: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-02: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-03: EF 0 1 2 0 2 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-06: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-08: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-10: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-11: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-12: CTL 0 0 0 0 1 0 1 0
GlobalResAllocation-PT-05-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0
GlobalResAllocation-PT-05-CTLCardinality-15: CTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
58 CTL EXCL 195/221 1/5 GlobalResAllocation-PT-05-CTLCardinality-15 35943 m, 288 m/sec, 78134 t fired, .
64 EF FNDP 1425/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 3117092 t fired, 4 attempts, .
65 EF STEQ 1425/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 sara is running.
Time elapsed: 1584 secs. Pages in use: 73
# running tasks: 3 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
GlobalResAllocation-PT-05-CTLCardinality-04: INITIAL false preprocessing
GlobalResAllocation-PT-05-CTLCardinality-07: CTL true CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-09: CTL false CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-13: CONJ true CONJ
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
GlobalResAllocation-PT-05-CTLCardinality-00: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-01: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-02: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-03: EF 0 1 2 0 2 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-06: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-08: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-10: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-11: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-12: CTL 0 0 0 0 1 0 1 0
GlobalResAllocation-PT-05-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0
GlobalResAllocation-PT-05-CTLCardinality-15: CTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
58 CTL EXCL 200/221 1/5 GlobalResAllocation-PT-05-CTLCardinality-15 37336 m, 278 m/sec, 81016 t fired, .
64 EF FNDP 1430/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 3123508 t fired, 4 attempts, .
65 EF STEQ 1430/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 sara is running.
Time elapsed: 1589 secs. Pages in use: 74
# running tasks: 3 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
GlobalResAllocation-PT-05-CTLCardinality-04: INITIAL false preprocessing
GlobalResAllocation-PT-05-CTLCardinality-07: CTL true CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-09: CTL false CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-13: CONJ true CONJ
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
GlobalResAllocation-PT-05-CTLCardinality-00: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-01: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-02: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-03: EF 0 1 2 0 2 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-06: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-08: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-10: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-11: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-12: CTL 0 0 0 0 1 0 1 0
GlobalResAllocation-PT-05-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0
GlobalResAllocation-PT-05-CTLCardinality-15: CTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
58 CTL EXCL 205/221 1/5 GlobalResAllocation-PT-05-CTLCardinality-15 38629 m, 258 m/sec, 83566 t fired, .
64 EF FNDP 1435/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 3130059 t fired, 4 attempts, .
65 EF STEQ 1435/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 sara is running.
Time elapsed: 1594 secs. Pages in use: 74
# running tasks: 3 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
GlobalResAllocation-PT-05-CTLCardinality-04: INITIAL false preprocessing
GlobalResAllocation-PT-05-CTLCardinality-07: CTL true CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-09: CTL false CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-13: CONJ true CONJ
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
GlobalResAllocation-PT-05-CTLCardinality-00: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-01: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-02: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-03: EF 0 1 2 0 2 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-06: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-08: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-10: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-11: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-12: CTL 0 0 0 0 1 0 1 0
GlobalResAllocation-PT-05-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0
GlobalResAllocation-PT-05-CTLCardinality-15: CTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
58 CTL EXCL 210/221 1/5 GlobalResAllocation-PT-05-CTLCardinality-15 39981 m, 270 m/sec, 86711 t fired, .
64 EF FNDP 1440/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 3136359 t fired, 4 attempts, .
65 EF STEQ 1440/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 sara is running.
Time elapsed: 1599 secs. Pages in use: 75
# running tasks: 3 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
GlobalResAllocation-PT-05-CTLCardinality-04: INITIAL false preprocessing
GlobalResAllocation-PT-05-CTLCardinality-07: CTL true CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-09: CTL false CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-13: CONJ true CONJ
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
GlobalResAllocation-PT-05-CTLCardinality-00: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-01: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-02: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-03: EF 0 1 2 0 2 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-06: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-08: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-10: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-11: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-12: CTL 0 0 0 0 1 0 1 0
GlobalResAllocation-PT-05-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0
GlobalResAllocation-PT-05-CTLCardinality-15: CTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
58 CTL EXCL 215/221 1/5 GlobalResAllocation-PT-05-CTLCardinality-15 41275 m, 258 m/sec, 89380 t fired, .
64 EF FNDP 1445/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 3142667 t fired, 4 attempts, .
65 EF STEQ 1445/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 sara is running.
Time elapsed: 1604 secs. Pages in use: 75
# running tasks: 3 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
GlobalResAllocation-PT-05-CTLCardinality-04: INITIAL false preprocessing
GlobalResAllocation-PT-05-CTLCardinality-07: CTL true CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-09: CTL false CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-13: CONJ true CONJ
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
GlobalResAllocation-PT-05-CTLCardinality-00: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-01: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-02: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-03: EF 0 1 2 0 2 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-06: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-08: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-10: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-11: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-12: CTL 0 0 0 0 1 0 1 0
GlobalResAllocation-PT-05-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0
GlobalResAllocation-PT-05-CTLCardinality-15: CTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
58 CTL EXCL 220/221 1/5 GlobalResAllocation-PT-05-CTLCardinality-15 42282 m, 201 m/sec, 91808 t fired, .
64 EF FNDP 1450/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 3149443 t fired, 4 attempts, .
65 EF STEQ 1450/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 sara is running.
Time elapsed: 1609 secs. Pages in use: 76
# running tasks: 3 of 4 Visible: 16
lola: CANCELED task # 58 (type EXCL) for GlobalResAllocation-PT-05-CTLCardinality-15 (local timeout)
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
GlobalResAllocation-PT-05-CTLCardinality-04: INITIAL false preprocessing
GlobalResAllocation-PT-05-CTLCardinality-07: CTL true CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-09: CTL false CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-13: CONJ true CONJ
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
GlobalResAllocation-PT-05-CTLCardinality-00: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-01: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-02: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-03: EF 0 1 2 0 2 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-06: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-08: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-10: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-11: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-12: CTL 0 0 0 0 1 0 1 0
GlobalResAllocation-PT-05-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0
GlobalResAllocation-PT-05-CTLCardinality-15: CTL 0 0 0 0 1 1 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
64 EF FNDP 1455/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 3155595 t fired, 4 attempts, .
65 EF STEQ 1455/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 sara is running.
Time elapsed: 1614 secs. Pages in use: 76
# running tasks: 3 of 4 Visible: 16
lola: LAUNCH task # 34 (type EXCL) for 33 GlobalResAllocation-PT-05-CTLCardinality-11
lola: time limit : 220 sec
lola: memory limit: 32 pages
lola: LAUNCH task # 58 (type EXCL) for 57 GlobalResAllocation-PT-05-CTLCardinality-15
lola: time limit : 1986 sec
lola: memory limit: 5 pages
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
GlobalResAllocation-PT-05-CTLCardinality-04: INITIAL false preprocessing
GlobalResAllocation-PT-05-CTLCardinality-07: CTL true CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-09: CTL false CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-13: CONJ true CONJ
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
GlobalResAllocation-PT-05-CTLCardinality-00: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-01: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-02: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-03: EF 0 1 2 0 2 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-06: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-08: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-10: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-11: CTL 0 0 1 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-12: CTL 0 0 0 0 1 0 1 0
GlobalResAllocation-PT-05-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0
GlobalResAllocation-PT-05-CTLCardinality-15: CTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
34 CTL EXCL 5/220 1/32 GlobalResAllocation-PT-05-CTLCardinality-11 75676 m, 15135 m/sec, 216401 t fired, .
58 CTL EXCL 5/1986 1/5 GlobalResAllocation-PT-05-CTLCardinality-15 235 m, -8409 m/sec, 475 t fired, .
64 EF FNDP 1460/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 3160980 t fired, 4 attempts, .
65 EF STEQ 1460/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 sara is running.
Time elapsed: 1619 secs. Pages in use: 79
# running tasks: 4 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
GlobalResAllocation-PT-05-CTLCardinality-04: INITIAL false preprocessing
GlobalResAllocation-PT-05-CTLCardinality-07: CTL true CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-09: CTL false CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-13: CONJ true CONJ
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
GlobalResAllocation-PT-05-CTLCardinality-00: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-01: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-02: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-03: EF 0 1 2 0 2 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-06: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-08: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-10: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-11: CTL 0 0 1 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-12: CTL 0 0 0 0 1 0 1 0
GlobalResAllocation-PT-05-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0
GlobalResAllocation-PT-05-CTLCardinality-15: CTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
34 CTL EXCL 10/220 1/32 GlobalResAllocation-PT-05-CTLCardinality-11 158337 m, 16532 m/sec, 460340 t fired, .
58 CTL EXCL 10/198 1/5 GlobalResAllocation-PT-05-CTLCardinality-15 760 m, 105 m/sec, 1695 t fired, .
64 EF FNDP 1465/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 3166360 t fired, 4 attempts, .
65 EF STEQ 1465/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 sara is running.
Time elapsed: 1624 secs. Pages in use: 80
# running tasks: 4 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
GlobalResAllocation-PT-05-CTLCardinality-04: INITIAL false preprocessing
GlobalResAllocation-PT-05-CTLCardinality-07: CTL true CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-09: CTL false CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-13: CONJ true CONJ
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
GlobalResAllocation-PT-05-CTLCardinality-00: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-01: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-02: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-03: EF 0 1 2 0 2 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-06: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-08: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-10: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-11: CTL 0 0 1 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-12: CTL 0 0 0 0 1 0 1 0
GlobalResAllocation-PT-05-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0
GlobalResAllocation-PT-05-CTLCardinality-15: CTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
34 CTL EXCL 15/220 2/32 GlobalResAllocation-PT-05-CTLCardinality-11 236005 m, 15533 m/sec, 694542 t fired, .
58 CTL EXCL 15/198 1/5 GlobalResAllocation-PT-05-CTLCardinality-15 1501 m, 148 m/sec, 3236 t fired, .
64 EF FNDP 1470/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 3172510 t fired, 4 attempts, .
65 EF STEQ 1470/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 sara is running.
Time elapsed: 1629 secs. Pages in use: 81
# running tasks: 4 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
GlobalResAllocation-PT-05-CTLCardinality-04: INITIAL false preprocessing
GlobalResAllocation-PT-05-CTLCardinality-07: CTL true CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-09: CTL false CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-13: CONJ true CONJ
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
GlobalResAllocation-PT-05-CTLCardinality-00: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-01: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-02: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-03: EF 0 1 2 0 2 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-06: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-08: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-10: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-11: CTL 0 0 1 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-12: CTL 0 0 0 0 1 0 1 0
GlobalResAllocation-PT-05-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0
GlobalResAllocation-PT-05-CTLCardinality-15: CTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
34 CTL EXCL 20/220 2/32 GlobalResAllocation-PT-05-CTLCardinality-11 312383 m, 15275 m/sec, 924791 t fired, .
58 CTL EXCL 20/198 1/5 GlobalResAllocation-PT-05-CTLCardinality-15 1960 m, 91 m/sec, 4215 t fired, .
64 EF FNDP 1475/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 3177930 t fired, 4 attempts, .
65 EF STEQ 1475/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 sara is running.
Time elapsed: 1634 secs. Pages in use: 81
# running tasks: 4 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
GlobalResAllocation-PT-05-CTLCardinality-04: INITIAL false preprocessing
GlobalResAllocation-PT-05-CTLCardinality-07: CTL true CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-09: CTL false CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-13: CONJ true CONJ
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
GlobalResAllocation-PT-05-CTLCardinality-00: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-01: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-02: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-03: EF 0 1 2 0 2 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-06: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-08: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-10: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-11: CTL 0 0 1 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-12: CTL 0 0 0 0 1 0 1 0
GlobalResAllocation-PT-05-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0
GlobalResAllocation-PT-05-CTLCardinality-15: CTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
34 CTL EXCL 25/220 2/32 GlobalResAllocation-PT-05-CTLCardinality-11 388460 m, 15215 m/sec, 1154642 t fired, .
58 CTL EXCL 25/198 1/5 GlobalResAllocation-PT-05-CTLCardinality-15 2641 m, 136 m/sec, 5505 t fired, .
64 EF FNDP 1480/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 3183145 t fired, 4 attempts, .
65 EF STEQ 1480/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 sara is running.
Time elapsed: 1639 secs. Pages in use: 82
# running tasks: 4 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
GlobalResAllocation-PT-05-CTLCardinality-04: INITIAL false preprocessing
GlobalResAllocation-PT-05-CTLCardinality-07: CTL true CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-09: CTL false CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-13: CONJ true CONJ
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
GlobalResAllocation-PT-05-CTLCardinality-00: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-01: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-02: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-03: EF 0 1 2 0 2 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-06: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-08: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-10: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-11: CTL 0 0 1 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-12: CTL 0 0 0 0 1 0 1 0
GlobalResAllocation-PT-05-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0
GlobalResAllocation-PT-05-CTLCardinality-15: CTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
34 CTL EXCL 30/220 3/32 GlobalResAllocation-PT-05-CTLCardinality-11 467166 m, 15741 m/sec, 1399050 t fired, .
58 CTL EXCL 30/198 1/5 GlobalResAllocation-PT-05-CTLCardinality-15 3318 m, 135 m/sec, 6742 t fired, .
64 EF FNDP 1485/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 3188758 t fired, 4 attempts, .
65 EF STEQ 1485/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 sara is running.
Time elapsed: 1644 secs. Pages in use: 83
# running tasks: 4 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
GlobalResAllocation-PT-05-CTLCardinality-04: INITIAL false preprocessing
GlobalResAllocation-PT-05-CTLCardinality-07: CTL true CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-09: CTL false CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-13: CONJ true CONJ
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
GlobalResAllocation-PT-05-CTLCardinality-00: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-01: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-02: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-03: EF 0 1 2 0 2 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-06: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-08: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-10: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-11: CTL 0 0 1 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-12: CTL 0 0 0 0 1 0 1 0
GlobalResAllocation-PT-05-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0
GlobalResAllocation-PT-05-CTLCardinality-15: CTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
34 CTL EXCL 35/220 3/32 GlobalResAllocation-PT-05-CTLCardinality-11 543602 m, 15287 m/sec, 1635791 t fired, .
58 CTL EXCL 35/198 1/5 GlobalResAllocation-PT-05-CTLCardinality-15 3950 m, 126 m/sec, 8190 t fired, .
64 EF FNDP 1490/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 3194310 t fired, 4 attempts, .
65 EF STEQ 1490/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 sara is running.
Time elapsed: 1649 secs. Pages in use: 83
# running tasks: 4 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
GlobalResAllocation-PT-05-CTLCardinality-04: INITIAL false preprocessing
GlobalResAllocation-PT-05-CTLCardinality-07: CTL true CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-09: CTL false CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-13: CONJ true CONJ
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
GlobalResAllocation-PT-05-CTLCardinality-00: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-01: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-02: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-03: EF 0 1 2 0 2 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-06: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-08: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-10: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-11: CTL 0 0 1 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-12: CTL 0 0 0 0 1 0 1 0
GlobalResAllocation-PT-05-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0
GlobalResAllocation-PT-05-CTLCardinality-15: CTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
34 CTL EXCL 40/220 3/32 GlobalResAllocation-PT-05-CTLCardinality-11 616080 m, 14495 m/sec, 1864429 t fired, .
58 CTL EXCL 40/198 1/5 GlobalResAllocation-PT-05-CTLCardinality-15 4814 m, 172 m/sec, 9985 t fired, .
64 EF FNDP 1495/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 3199800 t fired, 4 attempts, .
65 EF STEQ 1495/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 sara is running.
Time elapsed: 1654 secs. Pages in use: 85
# running tasks: 4 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
GlobalResAllocation-PT-05-CTLCardinality-04: INITIAL false preprocessing
GlobalResAllocation-PT-05-CTLCardinality-07: CTL true CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-09: CTL false CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-13: CONJ true CONJ
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
GlobalResAllocation-PT-05-CTLCardinality-00: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-01: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-02: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-03: EF 0 1 2 0 2 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-06: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-08: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-10: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-11: CTL 0 0 1 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-12: CTL 0 0 0 0 1 0 1 0
GlobalResAllocation-PT-05-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0
GlobalResAllocation-PT-05-CTLCardinality-15: CTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
34 CTL EXCL 45/220 4/32 GlobalResAllocation-PT-05-CTLCardinality-11 693537 m, 15491 m/sec, 2106918 t fired, .
58 CTL EXCL 45/198 1/5 GlobalResAllocation-PT-05-CTLCardinality-15 5416 m, 120 m/sec, 11040 t fired, .
64 EF FNDP 1500/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 3204880 t fired, 4 attempts, .
65 EF STEQ 1500/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 sara is running.
Time elapsed: 1659 secs. Pages in use: 86
# running tasks: 4 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
GlobalResAllocation-PT-05-CTLCardinality-04: INITIAL false preprocessing
GlobalResAllocation-PT-05-CTLCardinality-07: CTL true CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-09: CTL false CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-13: CONJ true CONJ
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
GlobalResAllocation-PT-05-CTLCardinality-00: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-01: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-02: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-03: EF 0 1 2 0 2 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-06: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-08: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-10: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-11: CTL 0 0 1 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-12: CTL 0 0 0 0 1 0 1 0
GlobalResAllocation-PT-05-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0
GlobalResAllocation-PT-05-CTLCardinality-15: CTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
34 CTL EXCL 50/220 4/32 GlobalResAllocation-PT-05-CTLCardinality-11 769045 m, 15101 m/sec, 2347396 t fired, .
58 CTL EXCL 50/198 1/5 GlobalResAllocation-PT-05-CTLCardinality-15 6087 m, 134 m/sec, 12321 t fired, .
64 EF FNDP 1505/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 3210395 t fired, 4 attempts, .
65 EF STEQ 1505/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 sara is running.
Time elapsed: 1664 secs. Pages in use: 87
# running tasks: 4 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
GlobalResAllocation-PT-05-CTLCardinality-04: INITIAL false preprocessing
GlobalResAllocation-PT-05-CTLCardinality-07: CTL true CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-09: CTL false CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-13: CONJ true CONJ
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
GlobalResAllocation-PT-05-CTLCardinality-00: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-01: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-02: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-03: EF 0 1 2 0 2 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-06: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-08: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-10: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-11: CTL 0 0 1 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-12: CTL 0 0 0 0 1 0 1 0
GlobalResAllocation-PT-05-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0
GlobalResAllocation-PT-05-CTLCardinality-15: CTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
34 CTL EXCL 55/220 4/32 GlobalResAllocation-PT-05-CTLCardinality-11 842822 m, 14755 m/sec, 2588906 t fired, .
58 CTL EXCL 55/198 1/5 GlobalResAllocation-PT-05-CTLCardinality-15 6707 m, 124 m/sec, 13606 t fired, .
64 EF FNDP 1510/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 3216053 t fired, 4 attempts, .
65 EF STEQ 1510/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 sara is running.
Time elapsed: 1669 secs. Pages in use: 88
# running tasks: 4 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
GlobalResAllocation-PT-05-CTLCardinality-04: INITIAL false preprocessing
GlobalResAllocation-PT-05-CTLCardinality-07: CTL true CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-09: CTL false CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-13: CONJ true CONJ
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
GlobalResAllocation-PT-05-CTLCardinality-00: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-01: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-02: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-03: EF 0 1 2 0 2 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-06: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-08: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-10: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-11: CTL 0 0 1 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-12: CTL 0 0 0 0 1 0 1 0
GlobalResAllocation-PT-05-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0
GlobalResAllocation-PT-05-CTLCardinality-15: CTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
34 CTL EXCL 60/220 5/32 GlobalResAllocation-PT-05-CTLCardinality-11 921002 m, 15636 m/sec, 2841939 t fired, .
58 CTL EXCL 60/198 1/5 GlobalResAllocation-PT-05-CTLCardinality-15 7624 m, 183 m/sec, 15505 t fired, .
64 EF FNDP 1515/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 3221622 t fired, 4 attempts, .
65 EF STEQ 1515/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 sara is running.
Time elapsed: 1674 secs. Pages in use: 89
# running tasks: 4 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
GlobalResAllocation-PT-05-CTLCardinality-04: INITIAL false preprocessing
GlobalResAllocation-PT-05-CTLCardinality-07: CTL true CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-09: CTL false CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-13: CONJ true CONJ
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
GlobalResAllocation-PT-05-CTLCardinality-00: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-01: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-02: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-03: EF 0 1 2 0 2 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-06: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-08: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-10: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-11: CTL 0 0 1 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-12: CTL 0 0 0 0 1 0 1 0
GlobalResAllocation-PT-05-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0
GlobalResAllocation-PT-05-CTLCardinality-15: CTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
34 CTL EXCL 65/220 5/32 GlobalResAllocation-PT-05-CTLCardinality-11 998555 m, 15510 m/sec, 3095766 t fired, .
58 CTL EXCL 65/198 1/5 GlobalResAllocation-PT-05-CTLCardinality-15 8323 m, 139 m/sec, 16914 t fired, .
64 EF FNDP 1520/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 3226811 t fired, 4 attempts, .
65 EF STEQ 1520/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 sara is running.
Time elapsed: 1679 secs. Pages in use: 89
# running tasks: 4 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
GlobalResAllocation-PT-05-CTLCardinality-04: INITIAL false preprocessing
GlobalResAllocation-PT-05-CTLCardinality-07: CTL true CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-09: CTL false CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-13: CONJ true CONJ
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
GlobalResAllocation-PT-05-CTLCardinality-00: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-01: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-02: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-03: EF 0 1 2 0 2 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-06: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-08: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-10: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-11: CTL 0 0 1 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-12: CTL 0 0 0 0 1 0 1 0
GlobalResAllocation-PT-05-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0
GlobalResAllocation-PT-05-CTLCardinality-15: CTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
34 CTL EXCL 70/220 5/32 GlobalResAllocation-PT-05-CTLCardinality-11 1072236 m, 14736 m/sec, 3339301 t fired, .
58 CTL EXCL 70/198 1/5 GlobalResAllocation-PT-05-CTLCardinality-15 9022 m, 139 m/sec, 18380 t fired, .
64 EF FNDP 1525/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 3232070 t fired, 4 attempts, .
65 EF STEQ 1525/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 sara is running.
Time elapsed: 1684 secs. Pages in use: 89
# running tasks: 4 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
GlobalResAllocation-PT-05-CTLCardinality-04: INITIAL false preprocessing
GlobalResAllocation-PT-05-CTLCardinality-07: CTL true CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-09: CTL false CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-13: CONJ true CONJ
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
GlobalResAllocation-PT-05-CTLCardinality-00: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-01: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-02: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-03: EF 0 1 2 0 2 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-06: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-08: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-10: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-11: CTL 0 0 1 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-12: CTL 0 0 0 0 1 0 1 0
GlobalResAllocation-PT-05-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0
GlobalResAllocation-PT-05-CTLCardinality-15: CTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
34 CTL EXCL 75/220 6/32 GlobalResAllocation-PT-05-CTLCardinality-11 1151147 m, 15782 m/sec, 3603733 t fired, .
58 CTL EXCL 75/198 1/5 GlobalResAllocation-PT-05-CTLCardinality-15 9778 m, 151 m/sec, 20004 t fired, .
64 EF FNDP 1530/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 3237002 t fired, 4 attempts, .
65 EF STEQ 1530/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 sara is running.
Time elapsed: 1689 secs. Pages in use: 91
# running tasks: 4 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
GlobalResAllocation-PT-05-CTLCardinality-04: INITIAL false preprocessing
GlobalResAllocation-PT-05-CTLCardinality-07: CTL true CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-09: CTL false CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-13: CONJ true CONJ
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
GlobalResAllocation-PT-05-CTLCardinality-00: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-01: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-02: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-03: EF 0 1 2 0 2 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-06: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-08: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-10: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-11: CTL 0 0 1 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-12: CTL 0 0 0 0 1 0 1 0
GlobalResAllocation-PT-05-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0
GlobalResAllocation-PT-05-CTLCardinality-15: CTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
34 CTL EXCL 80/220 6/32 GlobalResAllocation-PT-05-CTLCardinality-11 1221968 m, 14164 m/sec, 3837127 t fired, .
58 CTL EXCL 80/198 1/5 GlobalResAllocation-PT-05-CTLCardinality-15 10381 m, 120 m/sec, 21357 t fired, .
64 EF FNDP 1535/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 3242685 t fired, 4 attempts, .
65 EF STEQ 1535/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 sara is running.
Time elapsed: 1694 secs. Pages in use: 91
# running tasks: 4 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
GlobalResAllocation-PT-05-CTLCardinality-04: INITIAL false preprocessing
GlobalResAllocation-PT-05-CTLCardinality-07: CTL true CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-09: CTL false CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-13: CONJ true CONJ
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
GlobalResAllocation-PT-05-CTLCardinality-00: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-01: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-02: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-03: EF 0 1 2 0 2 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-06: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-08: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-10: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-11: CTL 0 0 1 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-12: CTL 0 0 0 0 1 0 1 0
GlobalResAllocation-PT-05-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0
GlobalResAllocation-PT-05-CTLCardinality-15: CTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
34 CTL EXCL 85/220 6/32 GlobalResAllocation-PT-05-CTLCardinality-11 1290293 m, 13665 m/sec, 4072388 t fired, .
58 CTL EXCL 85/198 1/5 GlobalResAllocation-PT-05-CTLCardinality-15 11197 m, 163 m/sec, 23108 t fired, .
64 EF FNDP 1540/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 3248694 t fired, 4 attempts, .
65 EF STEQ 1540/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 sara is running.
Time elapsed: 1699 secs. Pages in use: 91
# running tasks: 4 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
GlobalResAllocation-PT-05-CTLCardinality-04: INITIAL false preprocessing
GlobalResAllocation-PT-05-CTLCardinality-07: CTL true CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-09: CTL false CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-13: CONJ true CONJ
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
GlobalResAllocation-PT-05-CTLCardinality-00: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-01: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-02: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-03: EF 0 1 2 0 2 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-06: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-08: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-10: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-11: CTL 0 0 1 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-12: CTL 0 0 0 0 1 0 1 0
GlobalResAllocation-PT-05-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0
GlobalResAllocation-PT-05-CTLCardinality-15: CTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
34 CTL EXCL 90/220 7/32 GlobalResAllocation-PT-05-CTLCardinality-11 1365408 m, 15023 m/sec, 4330932 t fired, .
58 CTL EXCL 90/198 1/5 GlobalResAllocation-PT-05-CTLCardinality-15 11905 m, 141 m/sec, 24802 t fired, .
64 EF FNDP 1545/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 3254267 t fired, 4 attempts, .
65 EF STEQ 1545/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 sara is running.
Time elapsed: 1704 secs. Pages in use: 93
# running tasks: 4 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
GlobalResAllocation-PT-05-CTLCardinality-04: INITIAL false preprocessing
GlobalResAllocation-PT-05-CTLCardinality-07: CTL true CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-09: CTL false CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-13: CONJ true CONJ
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
GlobalResAllocation-PT-05-CTLCardinality-00: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-01: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-02: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-03: EF 0 1 2 0 2 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-06: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-08: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-10: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-11: CTL 0 0 1 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-12: CTL 0 0 0 0 1 0 1 0
GlobalResAllocation-PT-05-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0
GlobalResAllocation-PT-05-CTLCardinality-15: CTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
34 CTL EXCL 95/220 7/32 GlobalResAllocation-PT-05-CTLCardinality-11 1443903 m, 15699 m/sec, 4599592 t fired, .
58 CTL EXCL 95/198 1/5 GlobalResAllocation-PT-05-CTLCardinality-15 12819 m, 182 m/sec, 26813 t fired, .
64 EF FNDP 1550/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 3259698 t fired, 4 attempts, .
65 EF STEQ 1550/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 sara is running.
Time elapsed: 1709 secs. Pages in use: 93
# running tasks: 4 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
GlobalResAllocation-PT-05-CTLCardinality-04: INITIAL false preprocessing
GlobalResAllocation-PT-05-CTLCardinality-07: CTL true CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-09: CTL false CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-13: CONJ true CONJ
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
GlobalResAllocation-PT-05-CTLCardinality-00: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-01: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-02: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-03: EF 0 1 2 0 2 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-06: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-08: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-10: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-11: CTL 0 0 1 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-12: CTL 0 0 0 0 1 0 1 0
GlobalResAllocation-PT-05-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0
GlobalResAllocation-PT-05-CTLCardinality-15: CTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
34 CTL EXCL 100/220 7/32 GlobalResAllocation-PT-05-CTLCardinality-11 1518218 m, 14863 m/sec, 4856503 t fired, .
58 CTL EXCL 100/198 1/5 GlobalResAllocation-PT-05-CTLCardinality-15 13675 m, 171 m/sec, 28753 t fired, .
64 EF FNDP 1555/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 3265623 t fired, 4 attempts, .
65 EF STEQ 1555/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 sara is running.
Time elapsed: 1714 secs. Pages in use: 93
# running tasks: 4 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
GlobalResAllocation-PT-05-CTLCardinality-04: INITIAL false preprocessing
GlobalResAllocation-PT-05-CTLCardinality-07: CTL true CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-09: CTL false CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-13: CONJ true CONJ
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
GlobalResAllocation-PT-05-CTLCardinality-00: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-01: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-02: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-03: EF 0 1 2 0 2 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-06: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-08: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-10: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-11: CTL 0 0 1 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-12: CTL 0 0 0 0 1 0 1 0
GlobalResAllocation-PT-05-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0
GlobalResAllocation-PT-05-CTLCardinality-15: CTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
34 CTL EXCL 105/220 8/32 GlobalResAllocation-PT-05-CTLCardinality-11 1588694 m, 14095 m/sec, 5102346 t fired, .
58 CTL EXCL 105/198 1/5 GlobalResAllocation-PT-05-CTLCardinality-15 14450 m, 155 m/sec, 30430 t fired, .
64 EF FNDP 1560/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 3271367 t fired, 4 attempts, .
65 EF STEQ 1560/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 sara is running.
Time elapsed: 1719 secs. Pages in use: 95
# running tasks: 4 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
GlobalResAllocation-PT-05-CTLCardinality-04: INITIAL false preprocessing
GlobalResAllocation-PT-05-CTLCardinality-07: CTL true CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-09: CTL false CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-13: CONJ true CONJ
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
GlobalResAllocation-PT-05-CTLCardinality-00: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-01: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-02: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-03: EF 0 1 2 0 2 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-06: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-08: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-10: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-11: CTL 0 0 1 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-12: CTL 0 0 0 0 1 0 1 0
GlobalResAllocation-PT-05-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0
GlobalResAllocation-PT-05-CTLCardinality-15: CTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
34 CTL EXCL 110/220 8/32 GlobalResAllocation-PT-05-CTLCardinality-11 1667110 m, 15683 m/sec, 5377255 t fired, .
58 CTL EXCL 110/198 1/5 GlobalResAllocation-PT-05-CTLCardinality-15 15109 m, 131 m/sec, 32095 t fired, .
64 EF FNDP 1565/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 3276681 t fired, 4 attempts, .
65 EF STEQ 1565/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 sara is running.
Time elapsed: 1724 secs. Pages in use: 95
# running tasks: 4 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
GlobalResAllocation-PT-05-CTLCardinality-04: INITIAL false preprocessing
GlobalResAllocation-PT-05-CTLCardinality-07: CTL true CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-09: CTL false CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-13: CONJ true CONJ
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
GlobalResAllocation-PT-05-CTLCardinality-00: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-01: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-02: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-03: EF 0 1 2 0 2 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-06: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-08: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-10: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-11: CTL 0 0 1 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-12: CTL 0 0 0 0 1 0 1 0
GlobalResAllocation-PT-05-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0
GlobalResAllocation-PT-05-CTLCardinality-15: CTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
34 CTL EXCL 115/220 8/32 GlobalResAllocation-PT-05-CTLCardinality-11 1745320 m, 15642 m/sec, 5655201 t fired, .
58 CTL EXCL 115/198 1/5 GlobalResAllocation-PT-05-CTLCardinality-15 15775 m, 133 m/sec, 33521 t fired, .
64 EF FNDP 1570/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 3282202 t fired, 4 attempts, .
65 EF STEQ 1570/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 sara is running.
Time elapsed: 1729 secs. Pages in use: 95
# running tasks: 4 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
GlobalResAllocation-PT-05-CTLCardinality-04: INITIAL false preprocessing
GlobalResAllocation-PT-05-CTLCardinality-07: CTL true CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-09: CTL false CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-13: CONJ true CONJ
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
GlobalResAllocation-PT-05-CTLCardinality-00: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-01: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-02: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-03: EF 0 1 2 0 2 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-06: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-08: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-10: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-11: CTL 0 0 1 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-12: CTL 0 0 0 0 1 0 1 0
GlobalResAllocation-PT-05-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0
GlobalResAllocation-PT-05-CTLCardinality-15: CTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
34 CTL EXCL 120/220 9/32 GlobalResAllocation-PT-05-CTLCardinality-11 1822702 m, 15476 m/sec, 5928390 t fired, .
58 CTL EXCL 120/198 1/5 GlobalResAllocation-PT-05-CTLCardinality-15 16663 m, 177 m/sec, 35539 t fired, .
64 EF FNDP 1575/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 3287510 t fired, 4 attempts, .
65 EF STEQ 1575/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 sara is running.
Time elapsed: 1734 secs. Pages in use: 97
# running tasks: 4 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
GlobalResAllocation-PT-05-CTLCardinality-04: INITIAL false preprocessing
GlobalResAllocation-PT-05-CTLCardinality-07: CTL true CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-09: CTL false CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-13: CONJ true CONJ
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
GlobalResAllocation-PT-05-CTLCardinality-00: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-01: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-02: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-03: EF 0 1 2 0 2 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-06: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-08: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-10: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-11: CTL 0 0 1 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-12: CTL 0 0 0 0 1 0 1 0
GlobalResAllocation-PT-05-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0
GlobalResAllocation-PT-05-CTLCardinality-15: CTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
34 CTL EXCL 125/220 9/32 GlobalResAllocation-PT-05-CTLCardinality-11 1893253 m, 14110 m/sec, 6177804 t fired, .
58 CTL EXCL 125/198 1/5 GlobalResAllocation-PT-05-CTLCardinality-15 17247 m, 116 m/sec, 36999 t fired, .
64 EF FNDP 1580/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 3292924 t fired, 4 attempts, .
65 EF STEQ 1580/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 sara is running.
Time elapsed: 1739 secs. Pages in use: 97
# running tasks: 4 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
GlobalResAllocation-PT-05-CTLCardinality-04: INITIAL false preprocessing
GlobalResAllocation-PT-05-CTLCardinality-07: CTL true CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-09: CTL false CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-13: CONJ true CONJ
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
GlobalResAllocation-PT-05-CTLCardinality-00: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-01: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-02: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-03: EF 0 1 2 0 2 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-06: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-08: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-10: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-11: CTL 0 0 1 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-12: CTL 0 0 0 0 1 0 1 0
GlobalResAllocation-PT-05-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0
GlobalResAllocation-PT-05-CTLCardinality-15: CTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
34 CTL EXCL 130/220 9/32 GlobalResAllocation-PT-05-CTLCardinality-11 1958892 m, 13127 m/sec, 6419907 t fired, .
58 CTL EXCL 130/198 1/5 GlobalResAllocation-PT-05-CTLCardinality-15 18166 m, 183 m/sec, 39158 t fired, .
64 EF FNDP 1585/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 3298965 t fired, 4 attempts, .
65 EF STEQ 1585/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 sara is running.
Time elapsed: 1744 secs. Pages in use: 97
# running tasks: 4 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
GlobalResAllocation-PT-05-CTLCardinality-04: INITIAL false preprocessing
GlobalResAllocation-PT-05-CTLCardinality-07: CTL true CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-09: CTL false CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-13: CONJ true CONJ
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
GlobalResAllocation-PT-05-CTLCardinality-00: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-01: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-02: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-03: EF 0 1 2 0 2 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-06: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-08: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-10: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-11: CTL 0 0 1 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-12: CTL 0 0 0 0 1 0 1 0
GlobalResAllocation-PT-05-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0
GlobalResAllocation-PT-05-CTLCardinality-15: CTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
34 CTL EXCL 135/220 9/32 GlobalResAllocation-PT-05-CTLCardinality-11 2032156 m, 14652 m/sec, 6679591 t fired, .
58 CTL EXCL 135/198 1/5 GlobalResAllocation-PT-05-CTLCardinality-15 18911 m, 149 m/sec, 40852 t fired, .
64 EF FNDP 1590/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 3304663 t fired, 4 attempts, .
65 EF STEQ 1590/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 sara is running.
Time elapsed: 1749 secs. Pages in use: 98
# running tasks: 4 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
GlobalResAllocation-PT-05-CTLCardinality-04: INITIAL false preprocessing
GlobalResAllocation-PT-05-CTLCardinality-07: CTL true CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-09: CTL false CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-13: CONJ true CONJ
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
GlobalResAllocation-PT-05-CTLCardinality-00: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-01: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-02: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-03: EF 0 1 2 0 2 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-06: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-08: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-10: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-11: CTL 0 0 1 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-12: CTL 0 0 0 0 1 0 1 0
GlobalResAllocation-PT-05-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0
GlobalResAllocation-PT-05-CTLCardinality-15: CTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
34 CTL EXCL 140/220 10/32 GlobalResAllocation-PT-05-CTLCardinality-11 2107604 m, 15089 m/sec, 6949298 t fired, .
58 CTL EXCL 140/198 1/5 GlobalResAllocation-PT-05-CTLCardinality-15 19634 m, 144 m/sec, 42263 t fired, .
64 EF FNDP 1595/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 3310117 t fired, 4 attempts, .
65 EF STEQ 1595/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 sara is running.
Time elapsed: 1754 secs. Pages in use: 99
# running tasks: 4 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
GlobalResAllocation-PT-05-CTLCardinality-04: INITIAL false preprocessing
GlobalResAllocation-PT-05-CTLCardinality-07: CTL true CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-09: CTL false CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-13: CONJ true CONJ
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
GlobalResAllocation-PT-05-CTLCardinality-00: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-01: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-02: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-03: EF 0 1 2 0 2 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-06: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-08: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-10: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-11: CTL 0 0 1 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-12: CTL 0 0 0 0 1 0 1 0
GlobalResAllocation-PT-05-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0
GlobalResAllocation-PT-05-CTLCardinality-15: CTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
34 CTL EXCL 145/220 10/32 GlobalResAllocation-PT-05-CTLCardinality-11 2186619 m, 15803 m/sec, 7238144 t fired, .
58 CTL EXCL 145/198 1/5 GlobalResAllocation-PT-05-CTLCardinality-15 20229 m, 119 m/sec, 43347 t fired, .
64 EF FNDP 1600/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 3315485 t fired, 4 attempts, .
65 EF STEQ 1600/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 sara is running.
Time elapsed: 1759 secs. Pages in use: 99
# running tasks: 4 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
GlobalResAllocation-PT-05-CTLCardinality-04: INITIAL false preprocessing
GlobalResAllocation-PT-05-CTLCardinality-07: CTL true CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-09: CTL false CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-13: CONJ true CONJ
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
GlobalResAllocation-PT-05-CTLCardinality-00: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-01: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-02: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-03: EF 0 1 2 0 2 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-06: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-08: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-10: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-11: CTL 0 0 1 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-12: CTL 0 0 0 0 1 0 1 0
GlobalResAllocation-PT-05-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0
GlobalResAllocation-PT-05-CTLCardinality-15: CTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
34 CTL EXCL 150/220 10/32 GlobalResAllocation-PT-05-CTLCardinality-11 2261175 m, 14911 m/sec, 7513815 t fired, .
58 CTL EXCL 150/198 1/5 GlobalResAllocation-PT-05-CTLCardinality-15 20854 m, 125 m/sec, 44795 t fired, .
64 EF FNDP 1605/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 3321276 t fired, 4 attempts, .
65 EF STEQ 1605/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 sara is running.
Time elapsed: 1764 secs. Pages in use: 100
# running tasks: 4 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
GlobalResAllocation-PT-05-CTLCardinality-04: INITIAL false preprocessing
GlobalResAllocation-PT-05-CTLCardinality-07: CTL true CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-09: CTL false CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-13: CONJ true CONJ
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
GlobalResAllocation-PT-05-CTLCardinality-00: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-01: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-02: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-03: EF 0 1 2 0 2 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-06: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-08: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-10: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-11: CTL 0 0 1 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-12: CTL 0 0 0 0 1 0 1 0
GlobalResAllocation-PT-05-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0
GlobalResAllocation-PT-05-CTLCardinality-15: CTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
34 CTL EXCL 155/220 11/32 GlobalResAllocation-PT-05-CTLCardinality-11 2334606 m, 14686 m/sec, 7783297 t fired, .
58 CTL EXCL 155/198 1/5 GlobalResAllocation-PT-05-CTLCardinality-15 21644 m, 158 m/sec, 46684 t fired, .
64 EF FNDP 1610/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 3327291 t fired, 4 attempts, .
65 EF STEQ 1610/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 sara is running.
Time elapsed: 1769 secs. Pages in use: 101
# running tasks: 4 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
GlobalResAllocation-PT-05-CTLCardinality-04: INITIAL false preprocessing
GlobalResAllocation-PT-05-CTLCardinality-07: CTL true CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-09: CTL false CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-13: CONJ true CONJ
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
GlobalResAllocation-PT-05-CTLCardinality-00: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-01: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-02: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-03: EF 0 1 2 0 2 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-06: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-08: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-10: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-11: CTL 0 0 1 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-12: CTL 0 0 0 0 1 0 1 0
GlobalResAllocation-PT-05-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0
GlobalResAllocation-PT-05-CTLCardinality-15: CTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
34 CTL EXCL 160/220 11/32 GlobalResAllocation-PT-05-CTLCardinality-11 2404510 m, 13980 m/sec, 8041547 t fired, .
58 CTL EXCL 160/198 1/5 GlobalResAllocation-PT-05-CTLCardinality-15 22573 m, 185 m/sec, 48548 t fired, .
64 EF FNDP 1615/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 3333076 t fired, 4 attempts, .
65 EF STEQ 1615/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 sara is running.
Time elapsed: 1774 secs. Pages in use: 101
# running tasks: 4 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
GlobalResAllocation-PT-05-CTLCardinality-04: INITIAL false preprocessing
GlobalResAllocation-PT-05-CTLCardinality-07: CTL true CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-09: CTL false CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-13: CONJ true CONJ
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
GlobalResAllocation-PT-05-CTLCardinality-00: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-01: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-02: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-03: EF 0 1 2 0 2 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-06: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-08: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-10: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-11: CTL 0 0 1 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-12: CTL 0 0 0 0 1 0 1 0
GlobalResAllocation-PT-05-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0
GlobalResAllocation-PT-05-CTLCardinality-15: CTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
34 CTL EXCL 165/220 11/32 GlobalResAllocation-PT-05-CTLCardinality-11 2474236 m, 13945 m/sec, 8300792 t fired, .
58 CTL EXCL 165/198 1/5 GlobalResAllocation-PT-05-CTLCardinality-15 23616 m, 208 m/sec, 50783 t fired, .
64 EF FNDP 1620/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 3338727 t fired, 4 attempts, .
65 EF STEQ 1620/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 sara is running.
Time elapsed: 1779 secs. Pages in use: 101
# running tasks: 4 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
GlobalResAllocation-PT-05-CTLCardinality-04: INITIAL false preprocessing
GlobalResAllocation-PT-05-CTLCardinality-07: CTL true CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-09: CTL false CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-13: CONJ true CONJ
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
GlobalResAllocation-PT-05-CTLCardinality-00: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-01: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-02: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-03: EF 0 1 2 0 2 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-06: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-08: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-10: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-11: CTL 0 0 1 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-12: CTL 0 0 0 0 1 0 1 0
GlobalResAllocation-PT-05-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0
GlobalResAllocation-PT-05-CTLCardinality-15: CTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
34 CTL EXCL 170/220 12/32 GlobalResAllocation-PT-05-CTLCardinality-11 2551529 m, 15458 m/sec, 8578471 t fired, .
58 CTL EXCL 170/198 1/5 GlobalResAllocation-PT-05-CTLCardinality-15 24323 m, 141 m/sec, 52365 t fired, .
64 EF FNDP 1625/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 3343773 t fired, 4 attempts, .
65 EF STEQ 1625/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 sara is running.
Time elapsed: 1784 secs. Pages in use: 103
# running tasks: 4 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
GlobalResAllocation-PT-05-CTLCardinality-04: INITIAL false preprocessing
GlobalResAllocation-PT-05-CTLCardinality-07: CTL true CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-09: CTL false CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-13: CONJ true CONJ
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
GlobalResAllocation-PT-05-CTLCardinality-00: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-01: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-02: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-03: EF 0 1 2 0 2 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-06: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-08: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-10: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-11: CTL 0 0 1 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-12: CTL 0 0 0 0 1 0 1 0
GlobalResAllocation-PT-05-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0
GlobalResAllocation-PT-05-CTLCardinality-15: CTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
34 CTL EXCL 175/220 12/32 GlobalResAllocation-PT-05-CTLCardinality-11 2631631 m, 16020 m/sec, 8872972 t fired, .
58 CTL EXCL 175/198 1/5 GlobalResAllocation-PT-05-CTLCardinality-15 25335 m, 202 m/sec, 54654 t fired, .
64 EF FNDP 1630/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 3349380 t fired, 4 attempts, .
65 EF STEQ 1630/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 sara is running.
Time elapsed: 1789 secs. Pages in use: 103
# running tasks: 4 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
GlobalResAllocation-PT-05-CTLCardinality-04: INITIAL false preprocessing
GlobalResAllocation-PT-05-CTLCardinality-07: CTL true CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-09: CTL false CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-13: CONJ true CONJ
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
GlobalResAllocation-PT-05-CTLCardinality-00: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-01: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-02: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-03: EF 0 1 2 0 2 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-06: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-08: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-10: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-11: CTL 0 0 1 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-12: CTL 0 0 0 0 1 0 1 0
GlobalResAllocation-PT-05-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0
GlobalResAllocation-PT-05-CTLCardinality-15: CTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
34 CTL EXCL 180/220 12/32 GlobalResAllocation-PT-05-CTLCardinality-11 2709748 m, 15623 m/sec, 9163655 t fired, .
58 CTL EXCL 180/198 1/5 GlobalResAllocation-PT-05-CTLCardinality-15 26298 m, 192 m/sec, 56963 t fired, .
64 EF FNDP 1635/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 3354747 t fired, 4 attempts, .
65 EF STEQ 1635/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 sara is running.
Time elapsed: 1794 secs. Pages in use: 103
# running tasks: 4 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
GlobalResAllocation-PT-05-CTLCardinality-04: INITIAL false preprocessing
GlobalResAllocation-PT-05-CTLCardinality-07: CTL true CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-09: CTL false CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-13: CONJ true CONJ
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
GlobalResAllocation-PT-05-CTLCardinality-00: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-01: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-02: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-03: EF 0 1 2 0 2 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-06: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-08: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-10: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-11: CTL 0 0 1 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-12: CTL 0 0 0 0 1 0 1 0
GlobalResAllocation-PT-05-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0
GlobalResAllocation-PT-05-CTLCardinality-15: CTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
34 CTL EXCL 185/220 13/32 GlobalResAllocation-PT-05-CTLCardinality-11 2788402 m, 15730 m/sec, 9450887 t fired, .
58 CTL EXCL 185/198 1/5 GlobalResAllocation-PT-05-CTLCardinality-15 27179 m, 176 m/sec, 58833 t fired, .
64 EF FNDP 1640/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 3360822 t fired, 4 attempts, .
65 EF STEQ 1640/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 sara is running.
Time elapsed: 1799 secs. Pages in use: 105
# running tasks: 4 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
GlobalResAllocation-PT-05-CTLCardinality-04: INITIAL false preprocessing
GlobalResAllocation-PT-05-CTLCardinality-07: CTL true CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-09: CTL false CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-13: CONJ true CONJ
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
GlobalResAllocation-PT-05-CTLCardinality-00: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-01: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-02: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-03: EF 0 1 2 0 2 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-06: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-08: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-10: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-11: CTL 0 0 1 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-12: CTL 0 0 0 0 1 0 1 0
GlobalResAllocation-PT-05-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0
GlobalResAllocation-PT-05-CTLCardinality-15: CTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
34 CTL EXCL 190/220 13/32 GlobalResAllocation-PT-05-CTLCardinality-11 2860996 m, 14518 m/sec, 9720755 t fired, .
58 CTL EXCL 190/198 1/5 GlobalResAllocation-PT-05-CTLCardinality-15 27862 m, 136 m/sec, 60382 t fired, .
64 EF FNDP 1645/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 3366431 t fired, 4 attempts, .
65 EF STEQ 1645/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 sara is running.
Time elapsed: 1804 secs. Pages in use: 105
# running tasks: 4 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
GlobalResAllocation-PT-05-CTLCardinality-04: INITIAL false preprocessing
GlobalResAllocation-PT-05-CTLCardinality-07: CTL true CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-09: CTL false CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-13: CONJ true CONJ
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
GlobalResAllocation-PT-05-CTLCardinality-00: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-01: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-02: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-03: EF 0 1 2 0 2 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-06: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-08: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-10: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-11: CTL 0 0 1 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-12: CTL 0 0 0 0 1 0 1 0
GlobalResAllocation-PT-05-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0
GlobalResAllocation-PT-05-CTLCardinality-15: CTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
34 CTL EXCL 195/220 13/32 GlobalResAllocation-PT-05-CTLCardinality-11 2937291 m, 15259 m/sec, 10006068 t fired, .
58 CTL EXCL 195/198 1/5 GlobalResAllocation-PT-05-CTLCardinality-15 28672 m, 162 m/sec, 62282 t fired, .
64 EF FNDP 1650/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 3371510 t fired, 4 attempts, .
65 EF STEQ 1650/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 sara is running.
Time elapsed: 1809 secs. Pages in use: 105
# running tasks: 4 of 4 Visible: 16
lola: CANCELED task # 58 (type EXCL) for GlobalResAllocation-PT-05-CTLCardinality-15 (local timeout)
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
GlobalResAllocation-PT-05-CTLCardinality-04: INITIAL false preprocessing
GlobalResAllocation-PT-05-CTLCardinality-07: CTL true CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-09: CTL false CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-13: CONJ true CONJ
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
GlobalResAllocation-PT-05-CTLCardinality-00: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-01: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-02: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-03: EF 0 1 2 0 2 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-06: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-08: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-10: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-11: CTL 0 0 1 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-12: CTL 0 0 0 0 1 0 1 0
GlobalResAllocation-PT-05-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0
GlobalResAllocation-PT-05-CTLCardinality-15: CTL 0 0 0 0 1 1 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
34 CTL EXCL 200/220 14/32 GlobalResAllocation-PT-05-CTLCardinality-11 3015648 m, 15671 m/sec, 10305770 t fired, .
64 EF FNDP 1655/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 3377194 t fired, 4 attempts, .
65 EF STEQ 1655/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 sara is running.
Time elapsed: 1814 secs. Pages in use: 107
# running tasks: 4 of 4 Visible: 16
lola: LAUNCH task # 58 (type EXCL) for 57 GlobalResAllocation-PT-05-CTLCardinality-15
lola: time limit : 1786 sec
lola: memory limit: 5 pages
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
GlobalResAllocation-PT-05-CTLCardinality-04: INITIAL false preprocessing
GlobalResAllocation-PT-05-CTLCardinality-07: CTL true CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-09: CTL false CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-13: CONJ true CONJ
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
GlobalResAllocation-PT-05-CTLCardinality-00: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-01: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-02: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-03: EF 0 1 2 0 2 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-06: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-08: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-10: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-11: CTL 0 0 1 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-12: CTL 0 0 0 0 1 0 1 0
GlobalResAllocation-PT-05-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0
GlobalResAllocation-PT-05-CTLCardinality-15: CTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
34 CTL EXCL 205/220 14/32 GlobalResAllocation-PT-05-CTLCardinality-11 3080340 m, 12938 m/sec, 10553976 t fired, .
58 CTL EXCL 4/1786 1/5 GlobalResAllocation-PT-05-CTLCardinality-15 187 m, -5697 m/sec, 377 t fired, .
64 EF FNDP 1660/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 3383229 t fired, 4 attempts, .
65 EF STEQ 1660/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 sara is running.
Time elapsed: 1819 secs. Pages in use: 109
# running tasks: 4 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
GlobalResAllocation-PT-05-CTLCardinality-04: INITIAL false preprocessing
GlobalResAllocation-PT-05-CTLCardinality-07: CTL true CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-09: CTL false CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-13: CONJ true CONJ
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
GlobalResAllocation-PT-05-CTLCardinality-00: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-01: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-02: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-03: EF 0 1 2 0 2 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-06: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-08: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-10: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-11: CTL 0 0 1 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-12: CTL 0 0 0 0 1 0 1 0
GlobalResAllocation-PT-05-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0
GlobalResAllocation-PT-05-CTLCardinality-15: CTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
34 CTL EXCL 210/220 14/32 GlobalResAllocation-PT-05-CTLCardinality-11 3148815 m, 13695 m/sec, 10815793 t fired, .
58 CTL EXCL 9/178 1/5 GlobalResAllocation-PT-05-CTLCardinality-15 735 m, 109 m/sec, 1635 t fired, .
64 EF FNDP 1665/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 3387993 t fired, 4 attempts, .
65 EF STEQ 1665/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 sara is running.
Time elapsed: 1824 secs. Pages in use: 109
# running tasks: 4 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
GlobalResAllocation-PT-05-CTLCardinality-04: INITIAL false preprocessing
GlobalResAllocation-PT-05-CTLCardinality-07: CTL true CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-09: CTL false CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-13: CONJ true CONJ
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
GlobalResAllocation-PT-05-CTLCardinality-00: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-01: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-02: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-03: EF 0 1 2 0 2 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-06: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-08: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-10: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-11: CTL 0 0 1 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-12: CTL 0 0 0 0 1 0 1 0
GlobalResAllocation-PT-05-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0
GlobalResAllocation-PT-05-CTLCardinality-15: CTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
34 CTL EXCL 215/220 15/32 GlobalResAllocation-PT-05-CTLCardinality-11 3222344 m, 14705 m/sec, 11093799 t fired, .
58 CTL EXCL 14/178 1/5 GlobalResAllocation-PT-05-CTLCardinality-15 1294 m, 111 m/sec, 2753 t fired, .
64 EF FNDP 1670/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 3392861 t fired, 4 attempts, .
65 EF STEQ 1670/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 sara is running.
Time elapsed: 1829 secs. Pages in use: 111
# running tasks: 4 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
GlobalResAllocation-PT-05-CTLCardinality-04: INITIAL false preprocessing
GlobalResAllocation-PT-05-CTLCardinality-07: CTL true CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-09: CTL false CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-13: CONJ true CONJ
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
GlobalResAllocation-PT-05-CTLCardinality-00: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-01: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-02: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-03: EF 0 1 2 0 2 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-06: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-08: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-10: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-11: CTL 0 0 1 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-12: CTL 0 0 0 0 1 0 1 0
GlobalResAllocation-PT-05-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0
GlobalResAllocation-PT-05-CTLCardinality-15: CTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
34 CTL EXCL 220/220 15/32 GlobalResAllocation-PT-05-CTLCardinality-11 3296663 m, 14863 m/sec, 11385599 t fired, .
58 CTL EXCL 19/178 1/5 GlobalResAllocation-PT-05-CTLCardinality-15 1756 m, 92 m/sec, 3814 t fired, .
64 EF FNDP 1675/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 3398126 t fired, 4 attempts, .
65 EF STEQ 1675/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 sara is running.
Time elapsed: 1834 secs. Pages in use: 111
# running tasks: 4 of 4 Visible: 16
lola: CANCELED task # 34 (type EXCL) for GlobalResAllocation-PT-05-CTLCardinality-11 (local timeout)
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
GlobalResAllocation-PT-05-CTLCardinality-04: INITIAL false preprocessing
GlobalResAllocation-PT-05-CTLCardinality-07: CTL true CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-09: CTL false CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-13: CONJ true CONJ
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
GlobalResAllocation-PT-05-CTLCardinality-00: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-01: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-02: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-03: EF 0 1 2 0 2 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-06: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-08: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-10: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-11: CTL 0 0 0 0 1 1 0 0
GlobalResAllocation-PT-05-CTLCardinality-12: CTL 0 0 0 0 1 0 1 0
GlobalResAllocation-PT-05-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0
GlobalResAllocation-PT-05-CTLCardinality-15: CTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
58 CTL EXCL 24/178 1/5 GlobalResAllocation-PT-05-CTLCardinality-15 2259 m, 100 m/sec, 4789 t fired, .
64 EF FNDP 1680/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 3403049 t fired, 4 attempts, .
65 EF STEQ 1680/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 sara is running.
Time elapsed: 1839 secs. Pages in use: 111
# running tasks: 4 of 4 Visible: 16
lola: LAUNCH task # 34 (type EXCL) for 33 GlobalResAllocation-PT-05-CTLCardinality-11
lola: time limit : 1761 sec
lola: memory limit: 5 pages
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
GlobalResAllocation-PT-05-CTLCardinality-04: INITIAL false preprocessing
GlobalResAllocation-PT-05-CTLCardinality-07: CTL true CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-09: CTL false CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-13: CONJ true CONJ
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
GlobalResAllocation-PT-05-CTLCardinality-00: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-01: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-02: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-03: EF 0 1 2 0 2 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-06: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-08: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-10: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-11: CTL 0 0 1 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-12: CTL 0 0 0 0 1 0 1 0
GlobalResAllocation-PT-05-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0
GlobalResAllocation-PT-05-CTLCardinality-15: CTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
34 CTL EXCL 5/1761 1/5 GlobalResAllocation-PT-05-CTLCardinality-11 44027 m, -650527 m/sec, 125030 t fired, .
58 CTL EXCL 29/198 1/5 GlobalResAllocation-PT-05-CTLCardinality-15 2829 m, 114 m/sec, 5853 t fired, .
64 EF FNDP 1685/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 3408912 t fired, 4 attempts, .
65 EF STEQ 1685/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 sara is running.
Time elapsed: 1844 secs. Pages in use: 113
# running tasks: 4 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
GlobalResAllocation-PT-05-CTLCardinality-04: INITIAL false preprocessing
GlobalResAllocation-PT-05-CTLCardinality-07: CTL true CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-09: CTL false CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-13: CONJ true CONJ
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
GlobalResAllocation-PT-05-CTLCardinality-00: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-01: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-02: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-03: EF 0 1 2 0 2 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-06: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-08: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-10: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-11: CTL 0 0 1 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-12: CTL 0 0 0 0 1 0 1 0
GlobalResAllocation-PT-05-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0
GlobalResAllocation-PT-05-CTLCardinality-15: CTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
34 CTL EXCL 10/1761 1/5 GlobalResAllocation-PT-05-CTLCardinality-11 88152 m, 8825 m/sec, 253088 t fired, .
58 CTL EXCL 34/178 1/5 GlobalResAllocation-PT-05-CTLCardinality-15 3493 m, 132 m/sec, 7106 t fired, .
64 EF FNDP 1690/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 3414740 t fired, 4 attempts, .
65 EF STEQ 1690/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 sara is running.
Time elapsed: 1849 secs. Pages in use: 114
# running tasks: 4 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
GlobalResAllocation-PT-05-CTLCardinality-04: INITIAL false preprocessing
GlobalResAllocation-PT-05-CTLCardinality-07: CTL true CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-09: CTL false CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-13: CONJ true CONJ
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
GlobalResAllocation-PT-05-CTLCardinality-00: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-01: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-02: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-03: EF 0 1 2 0 2 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-06: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-08: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-10: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-11: CTL 0 0 1 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-12: CTL 0 0 0 0 1 0 1 0
GlobalResAllocation-PT-05-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0
GlobalResAllocation-PT-05-CTLCardinality-15: CTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
34 CTL EXCL 15/1761 1/5 GlobalResAllocation-PT-05-CTLCardinality-11 138512 m, 10072 m/sec, 401295 t fired, .
58 CTL EXCL 39/178 1/5 GlobalResAllocation-PT-05-CTLCardinality-15 3989 m, 99 m/sec, 8266 t fired, .
64 EF FNDP 1695/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 3419586 t fired, 4 attempts, .
65 EF STEQ 1695/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 sara is running.
Time elapsed: 1854 secs. Pages in use: 114
# running tasks: 4 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
GlobalResAllocation-PT-05-CTLCardinality-04: INITIAL false preprocessing
GlobalResAllocation-PT-05-CTLCardinality-07: CTL true CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-09: CTL false CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-13: CONJ true CONJ
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
GlobalResAllocation-PT-05-CTLCardinality-00: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-01: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-02: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-03: EF 0 1 2 0 2 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-06: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-08: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-10: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-11: CTL 0 0 1 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-12: CTL 0 0 0 0 1 0 1 0
GlobalResAllocation-PT-05-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0
GlobalResAllocation-PT-05-CTLCardinality-15: CTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
34 CTL EXCL 20/1761 1/5 GlobalResAllocation-PT-05-CTLCardinality-11 189394 m, 10176 m/sec, 552739 t fired, .
58 CTL EXCL 44/178 1/5 GlobalResAllocation-PT-05-CTLCardinality-15 4781 m, 158 m/sec, 9926 t fired, .
64 EF FNDP 1700/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 3425821 t fired, 4 attempts, .
65 EF STEQ 1700/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 sara is running.
Time elapsed: 1859 secs. Pages in use: 114
# running tasks: 4 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
GlobalResAllocation-PT-05-CTLCardinality-04: INITIAL false preprocessing
GlobalResAllocation-PT-05-CTLCardinality-07: CTL true CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-09: CTL false CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-13: CONJ true CONJ
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
GlobalResAllocation-PT-05-CTLCardinality-00: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-01: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-02: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-03: EF 0 1 2 0 2 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-06: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-08: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-10: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-11: CTL 0 0 1 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-12: CTL 0 0 0 0 1 0 1 0
GlobalResAllocation-PT-05-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0
GlobalResAllocation-PT-05-CTLCardinality-15: CTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
34 CTL EXCL 25/1761 2/5 GlobalResAllocation-PT-05-CTLCardinality-11 242141 m, 10549 m/sec, 713086 t fired, .
58 CTL EXCL 49/178 1/5 GlobalResAllocation-PT-05-CTLCardinality-15 5073 m, 58 m/sec, 10438 t fired, .
64 EF FNDP 1705/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 3431289 t fired, 4 attempts, .
65 EF STEQ 1705/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 sara is running.
Time elapsed: 1864 secs. Pages in use: 116
# running tasks: 4 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
GlobalResAllocation-PT-05-CTLCardinality-04: INITIAL false preprocessing
GlobalResAllocation-PT-05-CTLCardinality-07: CTL true CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-09: CTL false CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-13: CONJ true CONJ
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
GlobalResAllocation-PT-05-CTLCardinality-00: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-01: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-02: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-03: EF 0 1 2 0 2 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-06: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-08: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-10: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-11: CTL 0 0 1 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-12: CTL 0 0 0 0 1 0 1 0
GlobalResAllocation-PT-05-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0
GlobalResAllocation-PT-05-CTLCardinality-15: CTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
34 CTL EXCL 30/1761 2/5 GlobalResAllocation-PT-05-CTLCardinality-11 291507 m, 9873 m/sec, 861552 t fired, .
58 CTL EXCL 54/178 1/5 GlobalResAllocation-PT-05-CTLCardinality-15 5895 m, 164 m/sec, 11882 t fired, .
64 EF FNDP 1710/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 3436724 t fired, 4 attempts, .
65 EF STEQ 1710/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 sara is running.
Time elapsed: 1869 secs. Pages in use: 117
# running tasks: 4 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
GlobalResAllocation-PT-05-CTLCardinality-04: INITIAL false preprocessing
GlobalResAllocation-PT-05-CTLCardinality-07: CTL true CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-09: CTL false CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-13: CONJ true CONJ
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
GlobalResAllocation-PT-05-CTLCardinality-00: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-01: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-02: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-03: EF 0 1 2 0 2 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-06: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-08: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-10: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-11: CTL 0 0 1 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-12: CTL 0 0 0 0 1 0 1 0
GlobalResAllocation-PT-05-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0
GlobalResAllocation-PT-05-CTLCardinality-15: CTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
34 CTL EXCL 35/1761 2/5 GlobalResAllocation-PT-05-CTLCardinality-11 312320 m, 4162 m/sec, 924600 t fired, .
58 CTL EXCL 59/178 1/5 GlobalResAllocation-PT-05-CTLCardinality-15 6145 m, 50 m/sec, 12485 t fired, .
64 EF FNDP 1715/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 3442479 t fired, 4 attempts, .
65 EF STEQ 1715/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 sara is running.
Time elapsed: 1874 secs. Pages in use: 117
# running tasks: 4 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
GlobalResAllocation-PT-05-CTLCardinality-04: INITIAL false preprocessing
GlobalResAllocation-PT-05-CTLCardinality-07: CTL true CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-09: CTL false CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-13: CONJ true CONJ
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
GlobalResAllocation-PT-05-CTLCardinality-00: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-01: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-02: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-03: EF 0 1 2 0 2 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-06: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-08: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-10: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-11: CTL 0 0 1 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-12: CTL 0 0 0 0 1 0 1 0
GlobalResAllocation-PT-05-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0
GlobalResAllocation-PT-05-CTLCardinality-15: CTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
34 CTL EXCL 41/1761 2/5 GlobalResAllocation-PT-05-CTLCardinality-11 355081 m, 8552 m/sec, 1053026 t fired, .
58 CTL EXCL 65/178 1/5 GlobalResAllocation-PT-05-CTLCardinality-15 6719 m, 114 m/sec, 13638 t fired, .
64 EF FNDP 1721/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 3447285 t fired, 4 attempts, .
65 EF STEQ 1721/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 sara is running.
Time elapsed: 1880 secs. Pages in use: 117
# running tasks: 4 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
GlobalResAllocation-PT-05-CTLCardinality-04: INITIAL false preprocessing
GlobalResAllocation-PT-05-CTLCardinality-07: CTL true CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-09: CTL false CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-13: CONJ true CONJ
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
GlobalResAllocation-PT-05-CTLCardinality-00: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-01: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-02: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-03: EF 0 1 2 0 2 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-06: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-08: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-10: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-11: CTL 0 0 1 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-12: CTL 0 0 0 0 1 0 1 0
GlobalResAllocation-PT-05-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0
GlobalResAllocation-PT-05-CTLCardinality-15: CTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
34 CTL EXCL 47/1761 2/5 GlobalResAllocation-PT-05-CTLCardinality-11 368059 m, 2595 m/sec, 1093132 t fired, .
58 CTL EXCL 71/178 1/5 GlobalResAllocation-PT-05-CTLCardinality-15 7109 m, 78 m/sec, 14479 t fired, .
64 EF FNDP 1727/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 3449323 t fired, 4 attempts, .
65 EF STEQ 1727/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 sara is running.
Time elapsed: 1886 secs. Pages in use: 117
# running tasks: 4 of 4 Visible: 16
lola: FINISHED task # 65 (type EQUN) for GlobalResAllocation-PT-05-CTLCardinality-03
lola: result : unknown
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
GlobalResAllocation-PT-05-CTLCardinality-04: INITIAL false preprocessing
GlobalResAllocation-PT-05-CTLCardinality-07: CTL true CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-09: CTL false CTL model checker
GlobalResAllocation-PT-05-CTLCardinality-13: CONJ true CONJ
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
GlobalResAllocation-PT-05-CTLCardinality-00: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-01: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-02: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-03: EF 0 1 1 0 3 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-06: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-08: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-10: CTL 0 1 0 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-11: CTL 0 0 1 0 1 0 0 0
GlobalResAllocation-PT-05-CTLCardinality-12: CTL 0 0 0 0 1 0 1 0
GlobalResAllocation-PT-05-CTLCardinality-14: CTL 0 0 0 0 1 0 1 0
GlobalResAllocation-PT-05-CTLCardinality-15: CTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
34 CTL EXCL 52/1761 2/5 GlobalResAllocation-PT-05-CTLCardinality-11 415320 m, 9452 m/sec, 1237298 t fired, .
58 CTL EXCL 76/178 1/5 GlobalResAllocation-PT-05-CTLCardinality-15 7886 m, 155 m/sec, 16026 t fired, .
64 EF FNDP 1732/3441 0/5 GlobalResAllocation-PT-05-CTLCardinality-03 3456520 t fired, 4 attempts, .
Time elapsed: 1891 secs. Pages in use: 117
# running tasks: 3 of 4 Visible: 16
/home/mcc/BenchKit/BenchKit_head.sh: line 62: 416 Killed lola --conf=$BIN_DIR/configfiles/ctlcardinalityconf --formula=$DIR/CTLCardinality.xml --verdictfile=$DIR/GenericPropertiesVerdict.xml $DIR/model.pnml
Sequence of Actions to be Executed by the VM
This is useful if one wants to reexecute the tool in the VM from the submitted image disk.
set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="GlobalResAllocation-PT-05"
export BK_EXAMINATION="CTLCardinality"
export BK_TOOL="lola"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"
# this is specific to your benchmark or test
export BIN_DIR="$HOME/BenchKit/bin"
# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi
# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-4028"
echo " Executing tool lola"
echo " Input is GlobalResAllocation-PT-05, examination is CTLCardinality"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r118-tall-162075402500065"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"
tar xzf /home/mcc/BenchKit/INPUTS/GlobalResAllocation-PT-05.tgz
mv GlobalResAllocation-PT-05 execution
cd execution
if [ "CTLCardinality" = "ReachabilityDeadlock" ] || [ "CTLCardinality" = "UpperBounds" ] || [ "CTLCardinality" = "QuasiLiveness" ] || [ "CTLCardinality" = "StableMarking" ] || [ "CTLCardinality" = "Liveness" ] || [ "CTLCardinality" = "OneSafe" ] || [ "CTLCardinality" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh
echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLCardinality" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLCardinality" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLCardinality.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property CTLCardinality.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "CTLCardinality.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '
echo "FORMULA_NAME $x"
done
elif [ "CTLCardinality" = "ReachabilityDeadlock" ] || [ "CTLCardinality" = "QuasiLiveness" ] || [ "CTLCardinality" = "StableMarking" ] || [ "CTLCardinality" = "Liveness" ] || [ "CTLCardinality" = "OneSafe" ] ; then
echo "FORMULA_NAME CTLCardinality"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;