fond
Model Checking Contest 2021
11th edition, Paris, France, June 23, 2021
Execution of r118-tall-162075402400031
Last Updated
Jun 28, 2021

About the Execution of LoLA for GlobalResAllocation-COL-07

Execution Summary
Max Memory
Used (MB)
Time wait (ms) CPU Usage (ms) I/O Wait (ms) Computed Result Execution
Status
16199.184 904833.00 914715.00 1847.10 [undef] Cannot compute

Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/data/fkordon/mcc2021-input.r118-tall-162075402400031.qcow2', fmt=qcow2 size=4294967296 backing_file='/data/fkordon/mcc2021-input.qcow2' encryption=off cluster_size=65536 lazy_refcounts=off
Waiting for the VM to be ready (probing ssh)
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=====================================================================
Generated by BenchKit 2-4028
Executing tool lola
Input is GlobalResAllocation-COL-07, examination is ReachabilityFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r118-tall-162075402400031
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 336K
-rw-r--r-- 1 mcc users 9.4K May 5 16:58 CTLCardinality.txt
-rw-r--r-- 1 mcc users 68K May 10 09:43 CTLCardinality.xml
-rw-r--r-- 1 mcc users 9.4K May 5 16:58 CTLFireability.txt
-rw-r--r-- 1 mcc users 74K May 10 09:43 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K May 6 14:48 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.3K May 6 14:48 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 3.6K Mar 28 16:13 LTLCardinality.txt
-rw-r--r-- 1 mcc users 23K Mar 28 16:13 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.2K Mar 28 16:13 LTLFireability.txt
-rw-r--r-- 1 mcc users 17K Mar 28 16:13 LTLFireability.xml
-rw-r--r-- 1 mcc users 4.7K Mar 23 11:26 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 22K Mar 23 11:26 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 2.8K Mar 22 20:59 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 15K Mar 22 20:59 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.8K Mar 22 09:15 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.9K Mar 22 09:15 UpperBounds.xml
-rw-r--r-- 1 mcc users 5 May 5 16:51 equiv_pt
-rw-r--r-- 1 mcc users 3 May 5 16:51 instance
-rw-r--r-- 1 mcc users 5 May 5 16:51 iscolored
-rw-r--r-- 1 mcc users 28K May 5 16:51 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME GlobalResAllocation-COL-07-ReachabilityFireability-00
FORMULA_NAME GlobalResAllocation-COL-07-ReachabilityFireability-01
FORMULA_NAME GlobalResAllocation-COL-07-ReachabilityFireability-02
FORMULA_NAME GlobalResAllocation-COL-07-ReachabilityFireability-03
FORMULA_NAME GlobalResAllocation-COL-07-ReachabilityFireability-04
FORMULA_NAME GlobalResAllocation-COL-07-ReachabilityFireability-05
FORMULA_NAME GlobalResAllocation-COL-07-ReachabilityFireability-06
FORMULA_NAME GlobalResAllocation-COL-07-ReachabilityFireability-07
FORMULA_NAME GlobalResAllocation-COL-07-ReachabilityFireability-08
FORMULA_NAME GlobalResAllocation-COL-07-ReachabilityFireability-09
FORMULA_NAME GlobalResAllocation-COL-07-ReachabilityFireability-10
FORMULA_NAME GlobalResAllocation-COL-07-ReachabilityFireability-11
FORMULA_NAME GlobalResAllocation-COL-07-ReachabilityFireability-12
FORMULA_NAME GlobalResAllocation-COL-07-ReachabilityFireability-13
FORMULA_NAME GlobalResAllocation-COL-07-ReachabilityFireability-14
FORMULA_NAME GlobalResAllocation-COL-07-ReachabilityFireability-15

=== Now, execution of the tool begins

BK_START 1620768984994

starting LoLA
BK_INPUT GlobalResAllocation-COL-07
BK_EXAMINATION: ReachabilityFireability
bin directory: /home/mcc/BenchKit/bin
current directory: /home/mcc/execution
ReachabilityFireability

BK_STOP 1620769889827

--------------------
content from stderr:

lola: MEM LIMIT 32
lola: MEM LIMIT 5
lola: NET
lola: input: PNML file (--pnmlnet)
lola: reading net from /home/mcc/execution/model.pnml
lola: reading pnml
lola: PNML file contains High-Level net
lola: finished parsing
lola: closed net file /home/mcc/execution/model.pnml
lola: Reading HL formula in XML format (--xmlformula)
lola: reading formula from /home/mcc/execution/ReachabilityFireability.xml
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: TR BINDINGS
lola: LAUNCH task # 49 (type SKEL/FNDP) for 36 GlobalResAllocation-COL-07-ReachabilityFireability-12
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 50 (type SKEL/EQUN) for 36 GlobalResAllocation-COL-07-ReachabilityFireability-12
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 52 (type SKEL/SRCH) for 36 GlobalResAllocation-COL-07-ReachabilityFireability-12
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 53 (type SKEL/SRCH) for 36 GlobalResAllocation-COL-07-ReachabilityFireability-12
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: FINISHED task # 53 (type SKEL/SRCH) for GlobalResAllocation-COL-07-ReachabilityFireability-12
lola: result : true
lola: markings : 2
lola: fired transitions : 1
lola: time used : 0.000000
lola: memory pages used : 1
lola: CANCELED task # 49 (type FNDP) for GlobalResAllocation-COL-07-ReachabilityFireability-12 (obsolete)
lola: CANCELED task # 50 (type EQUN) for GlobalResAllocation-COL-07-ReachabilityFireability-12 (obsolete)
lola: CANCELED task # 52 (type SRCH) for GlobalResAllocation-COL-07-ReachabilityFireability-12 (obsolete)
lola: FINISHED task # 52 (type SKEL/SRCH) for GlobalResAllocation-COL-07-ReachabilityFireability-12
lola: result : true
lola: markings : 3
lola: fired transitions : 2
lola: time used : 0.000000
lola: memory pages used : 1
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: LAUNCH task # 56 (type SKEL/FNDP) for 30 GlobalResAllocation-COL-07-ReachabilityFireability-10
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 57 (type SKEL/EQUN) for 30 GlobalResAllocation-COL-07-ReachabilityFireability-10
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 59 (type SKEL/SRCH) for 30 GlobalResAllocation-COL-07-ReachabilityFireability-10
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 60 (type SKEL/SRCH) for 30 GlobalResAllocation-COL-07-ReachabilityFireability-10
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 60 (type SKEL/SRCH) for GlobalResAllocation-COL-07-ReachabilityFireability-10
lola: result : true
lola: markings : 1
lola: time used : 0.000000
lola: memory pages used : 1
lola: CANCELED task # 56 (type FNDP) for GlobalResAllocation-COL-07-ReachabilityFireability-10 (obsolete)
lola: CANCELED task # 57 (type EQUN) for GlobalResAllocation-COL-07-ReachabilityFireability-10 (obsolete)
lola: CANCELED task # 59 (type SRCH) for GlobalResAllocation-COL-07-ReachabilityFireability-10 (obsolete)
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: FINISHED task # 56 (type SKEL/FNDP) for GlobalResAllocation-COL-07-ReachabilityFireability-10
lola: result : true
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
sara: try reading problem file /home/mcc/execution/ReachabilityFireability-50.sara.
sara: place or transition ordering is non-deterministic

sara: try reading problem file /home/mcc/execution/ReachabilityFireability-57.sara.
sara: place or transition ordering is non-deterministic

lola: TR BINDINGS DONE
lola: Places: 133, Transitions: 291067
lola: LAUNCH task # 66 (type SKEL/FNDP) for 12 GlobalResAllocation-COL-07-ReachabilityFireability-04
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 69 (type SKEL/EQUN) for 12 GlobalResAllocation-COL-07-ReachabilityFireability-04
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: LAUNCH task # 73 (type SKEL/SRCH) for 12 GlobalResAllocation-COL-07-ReachabilityFireability-04
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 74 (type SKEL/SRCH) for 12 GlobalResAllocation-COL-07-ReachabilityFireability-04
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: FINISHED task # 49 (type SKEL/FNDP) for GlobalResAllocation-COL-07-ReachabilityFireability-12
lola: result : true
lola: fired transitions : 1
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
lola: FINISHED task # 73 (type SKEL/SRCH) for GlobalResAllocation-COL-07-ReachabilityFireability-04
lola: result : true
lola: time used : 0.000000
lola: memory pages used : 1
lola: FINISHED task # 74 (type SKEL/SRCH) for GlobalResAllocation-COL-07-ReachabilityFireability-04
lola: result : true
lola: markings : 1
lola: time used : 0.000000
lola: memory pages used : 1
lola: CANCELED task # 66 (type FNDP) for GlobalResAllocation-COL-07-ReachabilityFireability-04 (obsolete)
lola: CANCELED task # 69 (type EQUN) for GlobalResAllocation-COL-07-ReachabilityFireability-04 (obsolete)
sara: try reading problem file /home/mcc/execution/ReachabilityFireability-69.sara.

lola: LAUNCH task # 65 (type SKEL/FNDP) for 18 GlobalResAllocation-COL-07-ReachabilityFireability-06
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 67 (type SKEL/EQUN) for 18 GlobalResAllocation-COL-07-ReachabilityFireability-06
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 71 (type SKEL/SRCH) for 18 GlobalResAllocation-COL-07-ReachabilityFireability-06
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 72 (type SKEL/SRCH) for 18 GlobalResAllocation-COL-07-ReachabilityFireability-06
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: FINISHED task # 65 (type SKEL/FNDP) for GlobalResAllocation-COL-07-ReachabilityFireability-06
lola: result : true
lola: fired transitions : 1
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
lola: CANCELED task # 67 (type EQUN) for GlobalResAllocation-COL-07-ReachabilityFireability-06 (obsolete)
lola: CANCELED task # 71 (type SRCH) for GlobalResAllocation-COL-07-ReachabilityFireability-06 (obsolete)
lola: CANCELED task # 72 (type SRCH) for GlobalResAllocation-COL-07-ReachabilityFireability-06 (obsolete)
lola: FINISHED task # 66 (type SKEL/FNDP) for GlobalResAllocation-COL-07-ReachabilityFireability-04
lola: result : true
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
lola: FINISHED task # 57 (type SKEL/EQUN) for GlobalResAllocation-COL-07-ReachabilityFireability-10
lola: result : true
sara: try reading problem file /home/mcc/execution/ReachabilityFireability-67.sara.
lola: FINISHED task # 50 (type SKEL/EQUN) for GlobalResAllocation-COL-07-ReachabilityFireability-12
lola: result : true
sara: place or transition ordering is non-deterministic

lola: FINISHED task # 69 (type SKEL/EQUN) for GlobalResAllocation-COL-07-ReachabilityFireability-04
lola: result : true
lola: FINISHED task # 67 (type SKEL/EQUN) for GlobalResAllocation-COL-07-ReachabilityFireability-06
lola: result : true
lola: @ trans enter3
lola: @ trans enter2
lola: @ trans enter1
lola: @ trans exit
lola: @ trans release1
lola: @ trans release2
lola: @ trans enter4
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
GlobalResAllocation-COL-07-ReachabilityFireability-00: AG 0 0 0 0 1 0 0 0
GlobalResAllocation-COL-07-ReachabilityFireability-01: AG 0 0 0 0 1 0 0 0
GlobalResAllocation-COL-07-ReachabilityFireability-02: AG 0 0 0 0 1 0 0 0
GlobalResAllocation-COL-07-ReachabilityFireability-03: AG 0 0 0 0 1 0 0 0
GlobalResAllocation-COL-07-ReachabilityFireability-04: EF 0 0 0 0 4 0 0 1
GlobalResAllocation-COL-07-ReachabilityFireability-05: EF 0 0 0 0 1 0 0 0
GlobalResAllocation-COL-07-ReachabilityFireability-06: AG 0 0 0 0 2 0 0 3
GlobalResAllocation-COL-07-ReachabilityFireability-07: AG 0 0 0 0 1 0 0 0
GlobalResAllocation-COL-07-ReachabilityFireability-08: EF 0 0 0 0 1 0 0 0
GlobalResAllocation-COL-07-ReachabilityFireability-09: EF 0 0 0 0 1 0 0 0
GlobalResAllocation-COL-07-ReachabilityFireability-10: EF 0 0 0 0 3 0 0 2
GlobalResAllocation-COL-07-ReachabilityFireability-11: EF 0 0 0 0 1 0 0 0
GlobalResAllocation-COL-07-ReachabilityFireability-12: EF 0 0 0 0 4 0 0 1
GlobalResAllocation-COL-07-ReachabilityFireability-13: AG 0 0 0 0 1 0 0 0
GlobalResAllocation-COL-07-ReachabilityFireability-14: EF 0 0 0 0 1 0 0 0
GlobalResAllocation-COL-07-ReachabilityFireability-15: EF 0 0 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 5 secs. Pages in use: 2
# running tasks: 0 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
GlobalResAllocation-COL-07-ReachabilityFireability-00: AG 0 0 0 0 1 0 0 0
GlobalResAllocation-COL-07-ReachabilityFireability-01: AG 0 0 0 0 1 0 0 0
GlobalResAllocation-COL-07-ReachabilityFireability-02: AG 0 0 0 0 1 0 0 0
GlobalResAllocation-COL-07-ReachabilityFireability-03: AG 0 0 0 0 1 0 0 0
GlobalResAllocation-COL-07-ReachabilityFireability-04: EF 0 0 0 0 4 0 0 1
GlobalResAllocation-COL-07-ReachabilityFireability-05: EF 0 0 0 0 1 0 0 0
GlobalResAllocation-COL-07-ReachabilityFireability-06: AG 0 0 0 0 2 0 0 3
GlobalResAllocation-COL-07-ReachabilityFireability-07: AG 0 0 0 0 1 0 0 0
GlobalResAllocation-COL-07-ReachabilityFireability-08: EF 0 0 0 0 1 0 0 0
GlobalResAllocation-COL-07-ReachabilityFireability-09: EF 0 0 0 0 1 0 0 0
GlobalResAllocation-COL-07-ReachabilityFireability-10: EF 0 0 0 0 3 0 0 2
GlobalResAllocation-COL-07-ReachabilityFireability-11: EF 0 0 0 0 1 0 0 0
GlobalResAllocation-COL-07-ReachabilityFireability-12: EF 0 0 0 0 4 0 0 1
GlobalResAllocation-COL-07-ReachabilityFireability-13: AG 0 0 0 0 1 0 0 0
GlobalResAllocation-COL-07-ReachabilityFireability-14: EF 0 0 0 0 1 0 0 0
GlobalResAllocation-COL-07-ReachabilityFireability-15: EF 0 0 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

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PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
GlobalResAllocation-COL-07-ReachabilityFireability-00: AG 0 0 0 0 1 0 0 0
GlobalResAllocation-COL-07-ReachabilityFireability-01: AG 0 0 0 0 1 0 0 0
GlobalResAllocation-COL-07-ReachabilityFireability-02: AG 0 0 0 0 1 0 0 0
GlobalResAllocation-COL-07-ReachabilityFireability-03: AG 0 0 0 0 1 0 0 0
GlobalResAllocation-COL-07-ReachabilityFireability-04: EF 0 0 0 0 4 0 0 1
GlobalResAllocation-COL-07-ReachabilityFireability-05: EF 0 0 0 0 1 0 0 0
GlobalResAllocation-COL-07-ReachabilityFireability-06: AG 0 0 0 0 2 0 0 3
GlobalResAllocation-COL-07-ReachabilityFireability-07: AG 0 0 0 0 1 0 0 0
GlobalResAllocation-COL-07-ReachabilityFireability-08: EF 0 0 0 0 1 0 0 0
GlobalResAllocation-COL-07-ReachabilityFireability-09: EF 0 0 0 0 1 0 0 0
GlobalResAllocation-COL-07-ReachabilityFireability-10: EF 0 0 0 0 3 0 0 2
GlobalResAllocation-COL-07-ReachabilityFireability-11: EF 0 0 0 0 1 0 0 0
GlobalResAllocation-COL-07-ReachabilityFireability-12: EF 0 0 0 0 4 0 0 1
GlobalResAllocation-COL-07-ReachabilityFireability-13: AG 0 0 0 0 1 0 0 0
GlobalResAllocation-COL-07-ReachabilityFireability-14: EF 0 0 0 0 1 0 0 0
GlobalResAllocation-COL-07-ReachabilityFireability-15: EF 0 0 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

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PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
GlobalResAllocation-COL-07-ReachabilityFireability-00: AG 0 0 0 0 1 0 0 0
GlobalResAllocation-COL-07-ReachabilityFireability-01: AG 0 0 0 0 1 0 0 0
GlobalResAllocation-COL-07-ReachabilityFireability-02: AG 0 0 0 0 1 0 0 0
GlobalResAllocation-COL-07-ReachabilityFireability-03: AG 0 0 0 0 1 0 0 0
GlobalResAllocation-COL-07-ReachabilityFireability-04: EF 0 0 0 0 4 0 0 1
GlobalResAllocation-COL-07-ReachabilityFireability-05: EF 0 0 0 0 1 0 0 0
GlobalResAllocation-COL-07-ReachabilityFireability-06: AG 0 0 0 0 2 0 0 3
GlobalResAllocation-COL-07-ReachabilityFireability-07: AG 0 0 0 0 1 0 0 0
GlobalResAllocation-COL-07-ReachabilityFireability-08: EF 0 0 0 0 1 0 0 0
GlobalResAllocation-COL-07-ReachabilityFireability-09: EF 0 0 0 0 1 0 0 0
GlobalResAllocation-COL-07-ReachabilityFireability-10: EF 0 0 0 0 3 0 0 2
GlobalResAllocation-COL-07-ReachabilityFireability-11: EF 0 0 0 0 1 0 0 0
GlobalResAllocation-COL-07-ReachabilityFireability-12: EF 0 0 0 0 4 0 0 1
GlobalResAllocation-COL-07-ReachabilityFireability-13: AG 0 0 0 0 1 0 0 0
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/home/mcc/BenchKit/BenchKit_head.sh: line 62: 410 Killed lola --conf=$BIN_DIR/configfiles/reachabilityfireabilityconf --formula=$DIR/ReachabilityFireability.xml --verdictfile=$DIR/GenericPropertiesVerdict.xml $DIR/model.pnml

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="GlobalResAllocation-COL-07"
export BK_EXAMINATION="ReachabilityFireability"
export BK_TOOL="lola"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-4028"
echo " Executing tool lola"
echo " Input is GlobalResAllocation-COL-07, examination is ReachabilityFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r118-tall-162075402400031"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/GlobalResAllocation-COL-07.tgz
mv GlobalResAllocation-COL-07 execution
cd execution
if [ "ReachabilityFireability" = "ReachabilityDeadlock" ] || [ "ReachabilityFireability" = "UpperBounds" ] || [ "ReachabilityFireability" = "QuasiLiveness" ] || [ "ReachabilityFireability" = "StableMarking" ] || [ "ReachabilityFireability" = "Liveness" ] || [ "ReachabilityFireability" = "OneSafe" ] || [ "ReachabilityFireability" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "ReachabilityFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "ReachabilityFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "ReachabilityFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property ReachabilityFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "ReachabilityFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' ReachabilityFireability.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ "ReachabilityFireability" = "ReachabilityDeadlock" ] || [ "ReachabilityFireability" = "QuasiLiveness" ] || [ "ReachabilityFireability" = "StableMarking" ] || [ "ReachabilityFireability" = "Liveness" ] || [ "ReachabilityFireability" = "OneSafe" ] ; then
echo "FORMULA_NAME ReachabilityFireability"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;