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Model Checking Contest 2021
11th edition, Paris, France, June 23, 2021
Execution of r087-tall-162048883800542
Last Updated
Jun 28, 2021

About the Execution of LoLA for FamilyReunion-COL-L00100M0010C005P005G002

Execution Summary
Max Memory
Used (MB)
Time wait (ms) CPU Usage (ms) I/O Wait (ms) Computed Result Execution
Status
4825.359 176209.00 282578.00 445.60 T normal

Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/data/fkordon/mcc2021-input.r087-tall-162048883800542.qcow2', fmt=qcow2 size=4294967296 backing_file='/data/fkordon/mcc2021-input.qcow2' encryption=off cluster_size=65536 lazy_refcounts=off
Waiting for the VM to be ready (probing ssh)
........................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................
=====================================================================
Generated by BenchKit 2-4028
Executing tool lola
Input is FamilyReunion-COL-L00100M0010C005P005G002, examination is QuasiLiveness
Time confinement is 1800 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r087-tall-162048883800542
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 516K
-rw-r--r-- 1 mcc users 12K May 5 16:58 CTLCardinality.txt
-rw-r--r-- 1 mcc users 116K May 5 16:58 CTLCardinality.xml
-rw-r--r-- 1 mcc users 18K May 5 16:58 CTLFireability.txt
-rw-r--r-- 1 mcc users 94K May 5 16:58 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K May 6 14:48 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 3.3K Mar 28 16:09 LTLCardinality.txt
-rw-r--r-- 1 mcc users 22K Mar 28 16:09 LTLCardinality.xml
-rw-r--r-- 1 mcc users 3.1K Mar 28 16:09 LTLFireability.txt
-rw-r--r-- 1 mcc users 19K Mar 28 16:09 LTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K Mar 23 10:50 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 21K Mar 23 10:49 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 3.6K Mar 22 18:56 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 16K Mar 22 18:55 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 2.0K Mar 22 09:12 UpperBounds.txt
-rw-r--r-- 1 mcc users 4.0K Mar 22 09:11 UpperBounds.xml
-rw-r--r-- 1 mcc users 5 May 5 16:51 equiv_pt
-rw-r--r-- 1 mcc users 24 May 5 16:51 instance
-rw-r--r-- 1 mcc users 5 May 5 16:51 iscolored
-rw-r--r-- 1 mcc users 140K May 5 16:51 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

FORMULA_NAME QuasiLiveness

=== Now, execution of the tool begins

BK_START 1620575736991

starting LoLA
BK_INPUT FamilyReunion-COL-L00100M0010C005P005G002
BK_EXAMINATION: QuasiLiveness
bin directory: /home/mcc/BenchKit/bin
current directory: /home/mcc/execution
GlobalProperty: QuasiLiveness

FORMULA QuasiLiveness TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

BK_STOP 1620575913200

--------------------
content from stderr:

lola: MEM LIMIT 32
lola: MEM LIMIT 5
lola: NET
lola: input: PNML file (--pnmlnet)
lola: reading net from /home/mcc/execution/model.pnml
lola: reading pnml
lola: PNML file contains High-Level net
lola: finished parsing
lola: closed net file /home/mcc/execution/model.pnml
lola: TR BINDINGS
lola: TR BINDINGS DONE
lola: Places: 40706, Transitions: 36871
lola: @ trans RegisterRelativePubHealth
lola: @ trans Gate1XORSplit
lola: @ trans ObtainMissingDocs
lola: @ trans DisplayReqDocs
lola: @ trans Gate2ANDJoin
lola: @ trans SummonApplicant
lola: @ trans GotIt
lola: @ trans Gate3XORSplit
lola: @ trans HousingSuitCertifObtained
lola: @ trans CheckRequiredDoc
lola: @ trans ReceiveRegsitration
lola: @ trans ProvidePersonalnfo
lola: @ trans AppReqReceived
lola: @ trans ReserveAppoint
lola: @ trans SendClearanceToRel
lola: @ trans SendLangChoice
lola: @ trans ObtainRelativeFinStatement
lola: @ trans TransmitReq
lola: @ trans TickDocsObtained
lola: @ trans ReceiveAccessReq
lola: @ trans ReceiveLangChoice
lola: @ trans ReqHousingSuitCertif
lola: @ trans BringReqtoCINFORMI
lola: @ trans ExplainHowToObtainMissingDocs
lola: @ trans SendSuitabilityCertif
lola: @ trans EvaluateReq
lola: @ trans CheckHousingSuitReq
lola: @ trans ReceiveAppoint
lola: @ trans DisplayLangChoice
lola: @ trans Gate1ANDJoin
lola: @ trans Gate2XORSplit
lola: @ trans RegisterRelative
lola: @ trans Summoned
lola: @ trans PrepIncomeCertif
lola: @ trans Gate1ANDSplit
lola: @ trans ReceiveQuestion
lola: @ trans RespReceived
lola: @ trans PrepFamReuClearReq
lola: @ trans ReqAppointCINFORMI
lola: @ trans GoToAppoint
lola: @ trans GotoOSSAndProdDoc
lola: @ trans ArchiveReq
lola: @ trans Gate2ANDSplit
lola: @ trans ReceiveDocsObtained
lola: @ trans AppointReceived
lola: @ trans CheckSanityReq
lola: @ trans ReceiveInstructions
lola: @ trans AccessMicTerminal
lola: @ trans SetUpAppoint
lola: @ trans ReceiveReqDocsReq
lola: @ trans ReceiveLangReq
lola: @ trans CommunicateResp
lola: @ trans ObtainRelHealtCondStatement
lola: @ trans GiveAppoint
lola: @ trans ReserveAppCINFORMI
lola: @ trans ChoseFamilyReunion
lola: @ trans Gate1XORJoin
lola: @ trans ClearanceReqReceived
lola: @ trans ReceiveNeedReq
lola: @ trans ExplainProcedure
lola: @ trans ReceiveHousingSuitCertifReq
lola: @ trans ObtainFamRelCertif
lola: @ trans ReceiveAppointReq
lola: @ trans ReceiveNeedChoice
lola: @ trans DisplayNeedChoice
lola: @ trans AskCINFORMI
lola: STATE EQUATION TRIES TRANSITION t17204
sara: try reading problem file stateEquationProblem-QuasiLiveness-7007.sara.
lola: reporting
lola: not produced: 36871
lola: reporting
lola: not produced: 36871
lola: reporting
lola: not produced: 36871
lola: reporting
lola: not produced: 36871
lola: reporting
lola: not produced: 36871
lola: reporting
lola: not produced: 36871
lola: reporting
lola: not produced: 36871
lola: reporting
lola: not produced: 36871
lola: reporting
lola: not produced: 36871
lola: reporting
lola: not produced: 36871
lola: reporting
lola: not produced: 36871
lola: reporting
lola: not produced: 36871
lola: reporting
lola: not produced: 36871
lola: reporting
lola: not produced: 36871
lola: reporting
lola: not produced: 36871
lola: reporting
lola: not produced: 36871
lola: reporting
lola: not produced: 36871
lola: reporting
lola: not produced: 36871
lola: reporting
lola: not produced: 36871
lola: reporting
lola: not produced: 36871
lola: LAUNCH SYMM
lola: The net is quasilive

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="FamilyReunion-COL-L00100M0010C005P005G002"
export BK_EXAMINATION="QuasiLiveness"
export BK_TOOL="lola"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="1800"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-4028"
echo " Executing tool lola"
echo " Input is FamilyReunion-COL-L00100M0010C005P005G002, examination is QuasiLiveness"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r087-tall-162048883800542"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/FamilyReunion-COL-L00100M0010C005P005G002.tgz
mv FamilyReunion-COL-L00100M0010C005P005G002 execution
cd execution
if [ "QuasiLiveness" = "ReachabilityDeadlock" ] || [ "QuasiLiveness" = "UpperBounds" ] || [ "QuasiLiveness" = "QuasiLiveness" ] || [ "QuasiLiveness" = "StableMarking" ] || [ "QuasiLiveness" = "Liveness" ] || [ "QuasiLiveness" = "OneSafe" ] || [ "QuasiLiveness" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "QuasiLiveness" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "QuasiLiveness" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "QuasiLiveness.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property QuasiLiveness.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "QuasiLiveness.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' QuasiLiveness.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ "QuasiLiveness" = "ReachabilityDeadlock" ] || [ "QuasiLiveness" = "QuasiLiveness" ] || [ "QuasiLiveness" = "StableMarking" ] || [ "QuasiLiveness" = "Liveness" ] || [ "QuasiLiveness" = "OneSafe" ] ; then
echo "FORMULA_NAME QuasiLiveness"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;