fond
Model Checking Contest 2021
11th edition, Paris, France, June 23, 2021
Execution of r080-tall-162048871600964
Last Updated
Jun 28, 2021

About the Execution of LoLA for FamilyReunion-PT-L00100M0010C005P005G002

Execution Summary
Max Memory
Used (MB)
Time wait (ms) CPU Usage (ms) I/O Wait (ms) Computed Result Execution
Status
15331.231 1027110.00 2142696.00 1872.10 ???F????FF?????? normal

Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/data/fkordon/mcc2021-input.r080-tall-162048871600964.qcow2', fmt=qcow2 size=4294967296 backing_file='/data/fkordon/mcc2021-input.qcow2' encryption=off cluster_size=65536 lazy_refcounts=off
Waiting for the VM to be ready (probing ssh)
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=====================================================================
Generated by BenchKit 2-4028
Executing tool lola
Input is FamilyReunion-PT-L00100M0010C005P005G002, examination is LTLCardinality
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r080-tall-162048871600964
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 55M
-rw-r--r-- 1 mcc users 2.0M May 5 16:58 CTLCardinality.txt
-rw-r--r-- 1 mcc users 12M May 5 16:58 CTLCardinality.xml
-rw-r--r-- 1 mcc users 4.5M May 5 16:58 CTLFireability.txt
-rw-r--r-- 1 mcc users 16M May 5 16:58 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K May 6 14:48 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 7.0K May 6 14:48 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 168K Mar 28 16:09 LTLCardinality.txt
-rw-r--r-- 1 mcc users 682K Mar 28 16:09 LTLCardinality.xml
-rw-r--r-- 1 mcc users 320K Mar 28 16:09 LTLFireability.txt
-rw-r--r-- 1 mcc users 853K Mar 28 16:09 LTLFireability.xml
-rw-r--r-- 1 mcc users 170K Mar 23 10:50 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 640K Mar 23 10:49 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 473K Mar 22 18:56 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 1.3M Mar 22 18:56 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 41K Mar 22 09:12 UpperBounds.txt
-rw-r--r-- 1 mcc users 112K Mar 22 09:12 UpperBounds.xml
-rw-r--r-- 1 mcc users 5 May 5 16:51 equiv_col
-rw-r--r-- 1 mcc users 24 May 5 16:51 instance
-rw-r--r-- 1 mcc users 6 May 5 16:51 iscolored
-rw-r--r-- 1 mcc users 17M May 5 16:51 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME FamilyReunion-PT-L00100M0010C005P005G002-00
FORMULA_NAME FamilyReunion-PT-L00100M0010C005P005G002-01
FORMULA_NAME FamilyReunion-PT-L00100M0010C005P005G002-02
FORMULA_NAME FamilyReunion-PT-L00100M0010C005P005G002-03
FORMULA_NAME FamilyReunion-PT-L00100M0010C005P005G002-04
FORMULA_NAME FamilyReunion-PT-L00100M0010C005P005G002-05
FORMULA_NAME FamilyReunion-PT-L00100M0010C005P005G002-06
FORMULA_NAME FamilyReunion-PT-L00100M0010C005P005G002-07
FORMULA_NAME FamilyReunion-PT-L00100M0010C005P005G002-08
FORMULA_NAME FamilyReunion-PT-L00100M0010C005P005G002-09
FORMULA_NAME FamilyReunion-PT-L00100M0010C005P005G002-10
FORMULA_NAME FamilyReunion-PT-L00100M0010C005P005G002-11
FORMULA_NAME FamilyReunion-PT-L00100M0010C005P005G002-12
FORMULA_NAME FamilyReunion-PT-L00100M0010C005P005G002-13
FORMULA_NAME FamilyReunion-PT-L00100M0010C005P005G002-14
FORMULA_NAME FamilyReunion-PT-L00100M0010C005P005G002-15

=== Now, execution of the tool begins

BK_START 1620578982343

starting LoLA
BK_INPUT FamilyReunion-PT-L00100M0010C005P005G002
BK_EXAMINATION: LTLCardinality
bin directory: /home/mcc/BenchKit/bin
current directory: /home/mcc/execution
LTLCardinality

FORMULA FamilyReunion-PT-L00100M0010C005P005G002-03 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA FamilyReunion-PT-L00100M0010C005P005G002-09 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA FamilyReunion-PT-L00100M0010C005P005G002-08 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

BK_STOP 1620580009453

--------------------
content from stderr:

lola: MEM LIMIT 32
lola: MEM LIMIT 5
lola: NET
lola: input: PNML file (--pnmlnet)
lola: reading net from /home/mcc/execution/model.pnml
lola: reading pnml
lola: PNML file contains place/transition net
lola: finished parsing
lola: closed net file /home/mcc/execution/model.pnml
lola: Reading formula.
lola: Using XML format (--xmlformula)
lola: reading XML formula
lola: reading formula from /home/mcc/execution/LTLCardinality.xml
lola: rewrite Frontend/Parser/formula_rewrite.k:352
lola: rewrite Frontend/Parser/formula_rewrite.k:98
lola: rewrite Frontend/Parser/formula_rewrite.k:355
lola: rewrite Frontend/Parser/formula_rewrite.k:153
lola: rewrite Frontend/Parser/formula_rewrite.k:524
lola: rewrite Frontend/Parser/formula_rewrite.k:114
lola: rewrite Frontend/Parser/formula_rewrite.k:424
lola: rewrite Frontend/Parser/formula_rewrite.k:376
lola: rewrite Frontend/Parser/formula_rewrite.k:430
lola: rewrite Frontend/Parser/formula_rewrite.k:436
lola: rewrite Frontend/Parser/formula_rewrite.k:521
lola: rewrite Frontend/Parser/formula_rewrite.k:379
lola: rewrite Frontend/Parser/formula_rewrite.k:346
lola: rewrite Frontend/Parser/formula_rewrite.k:535
lola: rewrite Frontend/Parser/formula_rewrite.k:150
lola: rewrite Frontend/Parser/formula_rewrite.k:352
lola: rewrite Frontend/Parser/formula_rewrite.k:355
lola: rewrite Frontend/Parser/formula_rewrite.k:379
lola: rewrite Frontend/Parser/formula_rewrite.k:430
lola: rewrite Frontend/Parser/formula_rewrite.k:346
lola: rewrite Frontend/Parser/formula_rewrite.k:430
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:352
lola: rewrite Frontend/Parser/formula_rewrite.k:349
lola: rewrite Frontend/Parser/formula_rewrite.k:430
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:98
lola: rewrite Frontend/Parser/formula_rewrite.k:352
lola: rewrite Frontend/Parser/formula_rewrite.k:436
lola: rewrite Frontend/Parser/formula_rewrite.k:521
lola: rewrite Frontend/Parser/formula_rewrite.k:115
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:421
lola: rewrite Frontend/Parser/formula_rewrite.k:373
lola: rewrite Frontend/Parser/formula_rewrite.k:379
lola: rewrite Frontend/Parser/formula_rewrite.k:373
lola: rewrite Frontend/Parser/formula_rewrite.k:535
lola: rewrite Frontend/Parser/formula_rewrite.k:150
lola: rewrite Frontend/Parser/formula_rewrite.k:355
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:355
lola: Created skeleton in 0.000000 secs.
lola: NOTDEADLOCKFREE
lola: LAUNCH task # 56 (type SKEL/SRCH) for 0 FamilyReunion-PT-L00100M0010C005P005G002-00
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 56 (type SKEL/SRCH) for FamilyReunion-PT-L00100M0010C005P005G002-00
lola: result : false
lola: markings : 5782
lola: fired transitions : 5782
lola: time used : 0.000000
lola: memory pages used : 1
lola: Created skeleton in 0.000000 secs.
lola: NOTDEADLOCKFREE
lola: Created skeleton in 1.000000 secs.
lola: NOTDEADLOCKFREE
lola: Created skeleton in 0.000000 secs.
lola: NOTDEADLOCKFREE
lola: Rule S: 0 transitions removed,0 places removed
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-PT-L00100M0010C005P005G002-00: LTL 0 0 0 0 1 0 0 0
FamilyReunion-PT-L00100M0010C005P005G002-01: LTL 0 0 0 0 1 0 0 0
FamilyReunion-PT-L00100M0010C005P005G002-02: LTL 0 0 0 0 1 0 0 0
FamilyReunion-PT-L00100M0010C005P005G002-03: CONJ 0 0 0 0 1 0 0 0
FamilyReunion-PT-L00100M0010C005P005G002-04: LTL 0 0 0 0 0 0 0 0
FamilyReunion-PT-L00100M0010C005P005G002-05: LTL 0 0 0 0 0 0 0 0
FamilyReunion-PT-L00100M0010C005P005G002-06: LTL 0 0 0 0 0 0 0 0
FamilyReunion-PT-L00100M0010C005P005G002-07: LTL 0 0 0 0 0 0 0 0
FamilyReunion-PT-L00100M0010C005P005G002-08: AG 0 0 0 0 0 0 0 0
FamilyReunion-PT-L00100M0010C005P005G002-09: AG 0 0 0 0 0 0 0 0
FamilyReunion-PT-L00100M0010C005P005G002-10: LTL 0 0 0 0 0 0 0 0
FamilyReunion-PT-L00100M0010C005P005G002-11: LTL 0 0 0 0 0 0 0 0
FamilyReunion-PT-L00100M0010C005P005G002-12: CONJ 0 0 0 0 0 0 0 0
FamilyReunion-PT-L00100M0010C005P005G002-13: LTL 0 0 0 0 0 0 0 0
FamilyReunion-PT-L00100M0010C005P005G002-14: LTL 0 0 0 0 0 0 0 0
FamilyReunion-PT-L00100M0010C005P005G002-15: LTL 0 0 0 0 0 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 593 secs. Pages in use: 1
# running tasks: 0 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FamilyReunion-PT-L00100M0010C005P005G002-00: LTL 0 0 0 0 1 0 0 0
FamilyReunion-PT-L00100M0010C005P005G002-01: LTL 0 0 0 0 1 0 0 0
FamilyReunion-PT-L00100M0010C005P005G002-02: LTL 0 0 0 0 1 0 0 0
FamilyReunion-PT-L00100M0010C005P005G002-03: CONJ 0 0 0 0 1 0 0 0
FamilyReunion-PT-L00100M0010C005P005G002-04: LTL 0 0 0 0 0 0 0 0
FamilyReunion-PT-L00100M0010C005P005G002-05: LTL 0 0 0 0 0 0 0 0
FamilyReunion-PT-L00100M0010C005P005G002-06: LTL 0 0 0 0 0 0 0 0
FamilyReunion-PT-L00100M0010C005P005G002-07: LTL 0 0 0 0 0 0 0 0
FamilyReunion-PT-L00100M0010C005P005G002-08: AG 0 0 0 0 0 0 0 0
FamilyReunion-PT-L00100M0010C005P005G002-09: AG 0 0 0 0 0 0 0 0
FamilyReunion-PT-L00100M0010C005P005G002-10: LTL 0 0 0 0 0 0 0 0
FamilyReunion-PT-L00100M0010C005P005G002-11: LTL 0 0 0 0 0 0 0 0
FamilyReunion-PT-L00100M0010C005P005G002-12: CONJ 0 0 0 0 0 0 0 0
FamilyReunion-PT-L00100M0010C005P005G002-13: LTL 0 0 0 0 0 0 0 0
FamilyReunion-PT-L00100M0010C005P005G002-14: LTL 0 0 0 0 0 0 0 0
FamilyReunion-PT-L00100M0010C005P005G002-15: LTL 0 0 0 0 0 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 598 secs. Pages in use: 1
# running tasks: 0 of 4 Visible: 16
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45 LTL EXCL 13/203 1/32 FamilyReunion-PT-L00100M0010C005P005G002-12 4330 m, 197 m/sec, 5834 t fired, .

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45 LTL EXCL 18/203 1/32 FamilyReunion-PT-L00100M0010C005P005G002-12 5423 m, 218 m/sec, 7753 t fired, .

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45 LTL EXCL 23/203 1/32 FamilyReunion-PT-L00100M0010C005P005G002-12 6397 m, 194 m/sec, 9433 t fired, .

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45 LTL EXCL 28/203 1/32 FamilyReunion-PT-L00100M0010C005P005G002-12 7401 m, 200 m/sec, 11199 t fired, .

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45 LTL EXCL 33/203 1/32 FamilyReunion-PT-L00100M0010C005P005G002-12 8326 m, 185 m/sec, 12827 t fired, .

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45 LTL EXCL 38/203 1/32 FamilyReunion-PT-L00100M0010C005P005G002-12 9263 m, 187 m/sec, 14503 t fired, .

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45 LTL EXCL 43/203 1/32 FamilyReunion-PT-L00100M0010C005P005G002-12 10201 m, 187 m/sec, 16171 t fired, .

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45 LTL EXCL 48/203 1/32 FamilyReunion-PT-L00100M0010C005P005G002-12 11190 m, 197 m/sec, 17881 t fired, .

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45 LTL EXCL 53/203 1/32 FamilyReunion-PT-L00100M0010C005P005G002-12 12343 m, 230 m/sec, 19915 t fired, .

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/home/mcc/BenchKit/BenchKit_head.sh: line 62: 399 Killed lola --conf=$BIN_DIR/configfiles/ltlcardinalityconf --formula=$DIR/LTLCardinality.xml --verdictfile=$DIR/GenericPropertiesVerdict.xml $DIR/model.pnml

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="FamilyReunion-PT-L00100M0010C005P005G002"
export BK_EXAMINATION="LTLCardinality"
export BK_TOOL="lola"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-4028"
echo " Executing tool lola"
echo " Input is FamilyReunion-PT-L00100M0010C005P005G002, examination is LTLCardinality"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r080-tall-162048871600964"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/FamilyReunion-PT-L00100M0010C005P005G002.tgz
mv FamilyReunion-PT-L00100M0010C005P005G002 execution
cd execution
if [ "LTLCardinality" = "ReachabilityDeadlock" ] || [ "LTLCardinality" = "UpperBounds" ] || [ "LTLCardinality" = "QuasiLiveness" ] || [ "LTLCardinality" = "StableMarking" ] || [ "LTLCardinality" = "Liveness" ] || [ "LTLCardinality" = "OneSafe" ] || [ "LTLCardinality" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "LTLCardinality" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "LTLCardinality" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "LTLCardinality.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property LTLCardinality.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "LTLCardinality.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' LTLCardinality.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ "LTLCardinality" = "ReachabilityDeadlock" ] || [ "LTLCardinality" = "QuasiLiveness" ] || [ "LTLCardinality" = "StableMarking" ] || [ "LTLCardinality" = "Liveness" ] || [ "LTLCardinality" = "OneSafe" ] ; then
echo "FORMULA_NAME LTLCardinality"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;