About the Execution of LoLA for FamilyReunion-COL-L00020M0002C001P001G001
| Execution Summary | |||||
| Max Memory Used (MB) |
Time wait (ms) | CPU Usage (ms) | I/O Wait (ms) | Computed Result | Execution Status |
| 1258.827 | 1982462.00 | 2102833.00 | 4817.10 | ?TFFTTFFFFT?TFFT | normal |
Execution Chart
We display below the execution chart for this examination (boot time has been removed).
Trace from the execution
Formatting '/data/fkordon/mcc2021-input.r080-tall-162048871500850.qcow2', fmt=qcow2 size=4294967296 backing_file='/data/fkordon/mcc2021-input.qcow2' encryption=off cluster_size=65536 lazy_refcounts=off
Waiting for the VM to be ready (probing ssh)
........................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................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..............................
=====================================================================
Generated by BenchKit 2-4028
Executing tool lola
Input is FamilyReunion-COL-L00020M0002C001P001G001, examination is CTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r080-tall-162048871500850
=====================================================================
--------------------
preparation of the directory to be used:
/home/mcc/execution
total 496K
-rw-r--r-- 1 mcc users 12K May 5 16:58 CTLCardinality.txt
-rw-r--r-- 1 mcc users 112K May 10 09:43 CTLCardinality.xml
-rw-r--r-- 1 mcc users 16K May 5 16:58 CTLFireability.txt
-rw-r--r-- 1 mcc users 79K May 10 09:43 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K May 6 14:48 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 7.0K May 6 14:48 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 3.5K Mar 28 16:09 LTLCardinality.txt
-rw-r--r-- 1 mcc users 25K Mar 28 16:09 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.9K Mar 28 16:09 LTLFireability.txt
-rw-r--r-- 1 mcc users 18K Mar 28 16:09 LTLFireability.xml
-rw-r--r-- 1 mcc users 4.0K Mar 23 10:45 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 20K Mar 23 10:45 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 4.0K Mar 22 18:48 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 18K Mar 22 18:48 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 2.0K Mar 22 09:11 UpperBounds.txt
-rw-r--r-- 1 mcc users 4.0K Mar 22 09:11 UpperBounds.xml
-rw-r--r-- 1 mcc users 5 May 5 16:51 equiv_pt
-rw-r--r-- 1 mcc users 24 May 5 16:51 instance
-rw-r--r-- 1 mcc users 5 May 5 16:51 iscolored
-rw-r--r-- 1 mcc users 135K May 5 16:51 model.pnml
--------------------
content from stdout:
=== Data for post analysis generated by BenchKit (invocation template)
The expected result is a vector of booleans
BOOL_VECTOR
here is the order used to build the result vector(from text file)
FORMULA_NAME FamilyReunion-COL-L00020M0002C001P001G001-CTLFireability-00
FORMULA_NAME FamilyReunion-COL-L00020M0002C001P001G001-CTLFireability-01
FORMULA_NAME FamilyReunion-COL-L00020M0002C001P001G001-CTLFireability-02
FORMULA_NAME FamilyReunion-COL-L00020M0002C001P001G001-CTLFireability-03
FORMULA_NAME FamilyReunion-COL-L00020M0002C001P001G001-CTLFireability-04
FORMULA_NAME FamilyReunion-COL-L00020M0002C001P001G001-CTLFireability-05
FORMULA_NAME FamilyReunion-COL-L00020M0002C001P001G001-CTLFireability-06
FORMULA_NAME FamilyReunion-COL-L00020M0002C001P001G001-CTLFireability-07
FORMULA_NAME FamilyReunion-COL-L00020M0002C001P001G001-CTLFireability-08
FORMULA_NAME FamilyReunion-COL-L00020M0002C001P001G001-CTLFireability-09
FORMULA_NAME FamilyReunion-COL-L00020M0002C001P001G001-CTLFireability-10
FORMULA_NAME FamilyReunion-COL-L00020M0002C001P001G001-CTLFireability-11
FORMULA_NAME FamilyReunion-COL-L00020M0002C001P001G001-CTLFireability-12
FORMULA_NAME FamilyReunion-COL-L00020M0002C001P001G001-CTLFireability-13
FORMULA_NAME FamilyReunion-COL-L00020M0002C001P001G001-CTLFireability-14
FORMULA_NAME FamilyReunion-COL-L00020M0002C001P001G001-CTLFireability-15
=== Now, execution of the tool begins
BK_START 1620813880520
starting LoLA
BK_INPUT FamilyReunion-COL-L00020M0002C001P001G001
BK_EXAMINATION: CTLFireability
bin directory: /home/mcc/BenchKit/bin
current directory: /home/mcc/execution
CTLFireability
FORMULA FamilyReunion-COL-L00020M0002C001P001G001-CTLFireability-04 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA FamilyReunion-COL-L00020M0002C001P001G001-CTLFireability-01 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA FamilyReunion-COL-L00020M0002C001P001G001-CTLFireability-02 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA FamilyReunion-COL-L00020M0002C001P001G001-CTLFireability-03 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA FamilyReunion-COL-L00020M0002C001P001G001-CTLFireability-05 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA FamilyReunion-COL-L00020M0002C001P001G001-CTLFireability-06 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA FamilyReunion-COL-L00020M0002C001P001G001-CTLFireability-07 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA FamilyReunion-COL-L00020M0002C001P001G001-CTLFireability-09 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA FamilyReunion-COL-L00020M0002C001P001G001-CTLFireability-14 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA FamilyReunion-COL-L00020M0002C001P001G001-CTLFireability-13 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA FamilyReunion-COL-L00020M0002C001P001G001-CTLFireability-10 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA FamilyReunion-COL-L00020M0002C001P001G001-CTLFireability-12 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA FamilyReunion-COL-L00020M0002C001P001G001-CTLFireability-08 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA FamilyReunion-COL-L00020M0002C001P001G001-CTLFireability-15 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
BK_STOP 1620815862982
--------------------
content from stderr:
lola: MEM LIMIT 32
lola: MEM LIMIT 5
lola: NET
lola: input: PNML file (--pnmlnet)
lola: reading net from /home/mcc/execution/model.pnml
lola: reading pnml
lola: PNML file contains High-Level net
lola: finished parsing
lola: closed net file /home/mcc/execution/model.pnml
lola: Reading HL formula in XML format (--xmlformula)
lola: reading formula from /home/mcc/execution/CTLFireability.xml
lola: rewrite Frontend/Parser/formula_rewrite.k:96
lola: rewrite Frontend/Parser/formula_rewrite.k:138
lola: rewrite Frontend/Parser/formula_rewrite.k:98
lola: rewrite Frontend/Parser/formula_rewrite.k:122
lola: rewrite Frontend/Parser/formula_rewrite.k:96
lola: rewrite Frontend/Parser/formula_rewrite.k:168
lola: rewrite Frontend/Parser/formula_rewrite.k:156
lola: rewrite Frontend/Parser/formula_rewrite.k:147
lola: rewrite Frontend/Parser/formula_rewrite.k:138
lola: rewrite Frontend/Parser/formula_rewrite.k:96
lola: rewrite Frontend/Parser/formula_rewrite.k:96
lola: rewrite Frontend/Parser/formula_rewrite.k:179
lola: rewrite Frontend/Parser/formula_rewrite.k:147
lola: rewrite Frontend/Parser/formula_rewrite.k:96
lola: rewrite Frontend/Parser/formula_rewrite.k:132
lola: rewrite Frontend/Parser/formula_rewrite.k:179
lola: rewrite Frontend/Parser/formula_rewrite.k:150
lola: rewrite Frontend/Parser/formula_rewrite.k:96
lola: rewrite Frontend/Parser/formula_rewrite.k:121
lola: rewrite Frontend/Parser/formula_rewrite.k:96
lola: rewrite Frontend/Parser/formula_rewrite.k:98
lola: rewrite Frontend/Parser/formula_rewrite.k:135
lola: rewrite Frontend/Parser/formula_rewrite.k:121
lola: rewrite Frontend/Parser/formula_rewrite.k:278
lola: rewrite Frontend/Parser/formula_rewrite.k:117
lola: rewrite Frontend/Parser/formula_rewrite.k:281
lola: rewrite Frontend/Parser/formula_rewrite.k:159
lola: rewrite Frontend/Parser/formula_rewrite.k:147
lola: rewrite Frontend/Parser/formula_rewrite.k:96
lola: rewrite Frontend/Parser/formula_rewrite.k:156
lola: rewrite Frontend/Parser/formula_rewrite.k:147
lola: rewrite Frontend/Parser/formula_rewrite.k:162
lola: rewrite Frontend/Parser/formula_rewrite.k:150
lola: rewrite Frontend/Parser/formula_rewrite.k:162
lola: rewrite Frontend/Parser/formula_rewrite.k:147
lola: rewrite Frontend/Parser/formula_rewrite.k:96
lola: rewrite Frontend/Parser/formula_rewrite.k:156
lola: rewrite Frontend/Parser/formula_rewrite.k:150
lola: rewrite Frontend/Parser/formula_rewrite.k:281
lola: rewrite Frontend/Parser/formula_rewrite.k:115
lola: rewrite Frontend/Parser/formula_rewrite.k:117
lola: rewrite Frontend/Parser/formula_rewrite.k:96
lola: rewrite Frontend/Parser/formula_rewrite.k:156
lola: rewrite Frontend/Parser/formula_rewrite.k:147
lola: rewrite Frontend/Parser/formula_rewrite.k:121
lola: rewrite Frontend/Parser/formula_rewrite.k:162
lola: rewrite Frontend/Parser/formula_rewrite.k:147
lola: rewrite Frontend/Parser/formula_rewrite.k:96
lola: rewrite Frontend/Parser/formula_rewrite.k:96
lola: rewrite Frontend/Parser/formula_rewrite.k:179
lola: rewrite Frontend/Parser/formula_rewrite.k:150
lola: rewrite Frontend/Parser/formula_rewrite.k:96
lola: rewrite Frontend/Parser/formula_rewrite.k:117
lola: rewrite Frontend/Parser/formula_rewrite.k:96
lola: rewrite Frontend/Parser/formula_rewrite.k:96
lola: rewrite Frontend/Parser/formula_rewrite.k:179
lola: rewrite Frontend/Parser/formula_rewrite.k:150
lola: rewrite Frontend/Parser/formula_rewrite.k:281
lola: rewrite Frontend/Parser/formula_rewrite.k:153
lola: rewrite Frontend/Parser/formula_rewrite.k:150
lola: rewrite Frontend/Parser/formula_rewrite.k:117
lola: rewrite Frontend/Parser/formula_rewrite.k:156
lola: rewrite Frontend/Parser/formula_rewrite.k:150
lola: rewrite Frontend/Parser/formula_rewrite.k:162
lola: rewrite Frontend/Parser/formula_rewrite.k:147
lola: rewrite Frontend/Parser/formula_rewrite.k:96
lola: rewrite Frontend/Parser/formula_rewrite.k:156
lola: rewrite Frontend/Parser/formula_rewrite.k:147
lola: rewrite Frontend/Parser/formula_rewrite.k:156
lola: rewrite Frontend/Parser/formula_rewrite.k:147
lola: rewrite Frontend/Parser/formula_rewrite.k:281
lola: rewrite Frontend/Parser/formula_rewrite.k:96
lola: rewrite Frontend/Parser/formula_rewrite.k:156
lola: rewrite Frontend/Parser/formula_rewrite.k:147
lola: rewrite Frontend/Parser/formula_rewrite.k:156
lola: rewrite Frontend/Parser/formula_rewrite.k:147
lola: rewrite Frontend/Parser/formula_rewrite.k:156
lola: rewrite Frontend/Parser/formula_rewrite.k:150
lola: rewrite Frontend/Parser/formula_rewrite.k:281
lola: rewrite Frontend/Parser/formula_rewrite.k:98
lola: rewrite Frontend/Parser/formula_rewrite.k:135
lola: rewrite Frontend/Parser/formula_rewrite.k:96
lola: rewrite Frontend/Parser/formula_rewrite.k:138
lola: rewrite Frontend/Parser/formula_rewrite.k:96
lola: rewrite Frontend/Parser/formula_rewrite.k:162
lola: rewrite Frontend/Parser/formula_rewrite.k:150
lola: rewrite Frontend/Parser/formula_rewrite.k:120
lola: rewrite Frontend/Parser/formula_rewrite.k:284
lola: rewrite Frontend/Parser/formula_rewrite.k:115
lola: rewrite Frontend/Parser/formula_rewrite.k:96
lola: rewrite Frontend/Parser/formula_rewrite.k:156
lola: rewrite Frontend/Parser/formula_rewrite.k:147
lola: rewrite Frontend/Parser/formula_rewrite.k:96
lola: rewrite Frontend/Parser/formula_rewrite.k:121
lola: rewrite Frontend/Parser/formula_rewrite.k:116
lola: rewrite Frontend/Parser/formula_rewrite.k:281
lola: rewrite Frontend/Parser/formula_rewrite.k:278
lola: rewrite Frontend/Parser/formula_rewrite.k:162
lola: rewrite Frontend/Parser/formula_rewrite.k:147
lola: rewrite Frontend/Parser/formula_rewrite.k:96
lola: rewrite Frontend/Parser/formula_rewrite.k:156
lola: rewrite Frontend/Parser/formula_rewrite.k:147
lola: rewrite Frontend/Parser/formula_rewrite.k:162
lola: rewrite Frontend/Parser/formula_rewrite.k:150
lola: rewrite Frontend/Parser/formula_rewrite.k:98
lola: rewrite Frontend/Parser/formula_rewrite.k:96
lola: rewrite Frontend/Parser/formula_rewrite.k:156
lola: rewrite Frontend/Parser/formula_rewrite.k:147
lola: rewrite Frontend/Parser/formula_rewrite.k:115
lola: rewrite Frontend/Parser/formula_rewrite.k:96
lola: rewrite Frontend/Parser/formula_rewrite.k:138
lola: rewrite Frontend/Parser/formula_rewrite.k:117
lola: rewrite Frontend/Parser/formula_rewrite.k:138
lola: rewrite Frontend/Parser/formula_rewrite.k:96
lola: rewrite Frontend/Parser/formula_rewrite.k:120
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:284
lola: rewrite Frontend/Parser/formula_rewrite.k:96
lola: rewrite Frontend/Parser/formula_rewrite.k:98
lola: rewrite Frontend/Parser/formula_rewrite.k:135
lola: rewrite Frontend/Parser/formula_rewrite.k:117
lola: rewrite Frontend/Parser/formula_rewrite.k:96
lola: rewrite Frontend/Parser/formula_rewrite.k:156
lola: rewrite Frontend/Parser/formula_rewrite.k:150
lola: rewrite Frontend/Parser/formula_rewrite.k:281
lola: rewrite Frontend/Parser/formula_rewrite.k:117
lola: rewrite Frontend/Parser/formula_rewrite.k:156
lola: rewrite Frontend/Parser/formula_rewrite.k:150
lola: rewrite Frontend/Parser/formula_rewrite.k:96
lola: rewrite Frontend/Parser/formula_rewrite.k:98
lola: rewrite Frontend/Parser/formula_rewrite.k:159
lola: rewrite Frontend/Parser/formula_rewrite.k:150
lola: rewrite Frontend/Parser/formula_rewrite.k:129
lola: rewrite Frontend/Parser/formula_rewrite.k:182
lola: rewrite Frontend/Parser/formula_rewrite.k:96
lola: rewrite Frontend/Parser/formula_rewrite.k:138
lola: rewrite Frontend/Parser/formula_rewrite.k:199
lola: rewrite Frontend/Parser/formula_rewrite.k:147
lola: rewrite Frontend/Parser/formula_rewrite.k:98
lola: rewrite Frontend/Parser/formula_rewrite.k:96
lola: rewrite Frontend/Parser/formula_rewrite.k:162
lola: rewrite Frontend/Parser/formula_rewrite.k:150
lola: rewrite Frontend/Parser/formula_rewrite.k:115
lola: rewrite Frontend/Parser/formula_rewrite.k:138
lola: rewrite Frontend/Parser/formula_rewrite.k:199
lola: rewrite Frontend/Parser/formula_rewrite.k:147
lola: rewrite Frontend/Parser/formula_rewrite.k:233
lola: rewrite Frontend/Parser/formula_rewrite.k:96
lola: rewrite Frontend/Parser/formula_rewrite.k:156
lola: rewrite Frontend/Parser/formula_rewrite.k:147
lola: rewrite Frontend/Parser/formula_rewrite.k:281
lola: rewrite Frontend/Parser/formula_rewrite.k:96
lola: rewrite Frontend/Parser/formula_rewrite.k:96
lola: rewrite Frontend/Parser/formula_rewrite.k:162
lola: rewrite Frontend/Parser/formula_rewrite.k:147
lola: rewrite Frontend/Parser/formula_rewrite.k:117
lola: rewrite Frontend/Parser/formula_rewrite.k:138
lola: rewrite Frontend/Parser/formula_rewrite.k:168
lola: rewrite Frontend/Parser/formula_rewrite.k:202
lola: rewrite Frontend/Parser/formula_rewrite.k:96
lola: rewrite Frontend/Parser/formula_rewrite.k:156
lola: rewrite Frontend/Parser/formula_rewrite.k:150
lola: rewrite Frontend/Parser/formula_rewrite.k:96
lola: rewrite Frontend/Parser/formula_rewrite.k:117
lola: rewrite Frontend/Parser/formula_rewrite.k:132
lola: rewrite Frontend/Parser/formula_rewrite.k:281
lola: rewrite Frontend/Parser/formula_rewrite.k:153
lola: rewrite Frontend/Parser/formula_rewrite.k:147
lola: rewrite Frontend/Parser/formula_rewrite.k:96
lola: rewrite Frontend/Parser/formula_rewrite.k:96
lola: rewrite Frontend/Parser/formula_rewrite.k:179
lola: rewrite Frontend/Parser/formula_rewrite.k:147
lola: rewrite Frontend/Parser/formula_rewrite.k:116
lola: rewrite Frontend/Parser/formula_rewrite.k:96
lola: rewrite Frontend/Parser/formula_rewrite.k:121
lola: rewrite Frontend/Parser/formula_rewrite.k:132
lola: rewrite Frontend/Parser/formula_rewrite.k:96
lola: rewrite Frontend/Parser/formula_rewrite.k:132
lola: rewrite Frontend/Parser/formula_rewrite.k:96
lola: rewrite Frontend/Parser/formula_rewrite.k:117
lola: rewrite Frontend/Parser/formula_rewrite.k:179
lola: rewrite Frontend/Parser/formula_rewrite.k:147
lola: rewrite Frontend/Parser/formula_rewrite.k:168
lola: rewrite Frontend/Parser/formula_rewrite.k:156
lola: rewrite Frontend/Parser/formula_rewrite.k:150
lola: rewrite Frontend/Parser/formula_rewrite.k:98
lola: rewrite Frontend/Parser/formula_rewrite.k:129
lola: rewrite Frontend/Parser/formula_rewrite.k:196
lola: rewrite Frontend/Parser/formula_rewrite.k:150
lola: rewrite Frontend/Parser/formula_rewrite.k:96
lola: rewrite Frontend/Parser/formula_rewrite.k:162
lola: rewrite Frontend/Parser/formula_rewrite.k:147
lola: rewrite Frontend/Parser/formula_rewrite.k:96
lola: rewrite Frontend/Parser/formula_rewrite.k:162
lola: rewrite Frontend/Parser/formula_rewrite.k:147
lola: rewrite Frontend/Parser/formula_rewrite.k:96
lola: rewrite Frontend/Parser/formula_rewrite.k:117
lola: rewrite Frontend/Parser/formula_rewrite.k:121
lola: rewrite Frontend/Parser/formula_rewrite.k:98
lola: rewrite Frontend/Parser/formula_rewrite.k:135
lola: rewrite Frontend/Parser/formula_rewrite.k:117
lola: rewrite Frontend/Parser/formula_rewrite.k:96
lola: rewrite Frontend/Parser/formula_rewrite.k:96
lola: rewrite Frontend/Parser/formula_rewrite.k:179
lola: rewrite Frontend/Parser/formula_rewrite.k:147
lola: rewrite Frontend/Parser/formula_rewrite.k:96
lola: rewrite Frontend/Parser/formula_rewrite.k:156
lola: rewrite Frontend/Parser/formula_rewrite.k:150
lola: rewrite Frontend/Parser/formula_rewrite.k:179
lola: rewrite Frontend/Parser/formula_rewrite.k:147
lola: rewrite Frontend/Parser/formula_rewrite.k:121
lola: rewrite Frontend/Parser/formula_rewrite.k:132
lola: rewrite Frontend/Parser/formula_rewrite.k:207
lola: rewrite Frontend/Parser/formula_rewrite.k:156
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lola: FINISHED task # 60 (type FNDP) for FamilyReunion-COL-L00020M0002C001P001G001-CTLFireability-08
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lola: LAUNCH task # 46 (type EXCL) for 45 FamilyReunion-COL-L00020M0002C001P001G001-CTLFireability-15
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lola: LAUNCH task # 61 (type EXCL) for 0 FamilyReunion-COL-L00020M0002C001P001G001-CTLFireability-00
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FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FamilyReunion-COL-L00020M0002C001P001G001-CTLFireability-01: INITIAL true skeleton: preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLFireability-02: INITIAL false skeleton: preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLFireability-03: INITIAL false skeleton: preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLFireability-04: INITIAL true skeleton: preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLFireability-05: INITIAL true skeleton: preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLFireability-06: INITIAL false skeleton: preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLFireability-07: INITIAL false skeleton: preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLFireability-08: AG NODL false state space
FamilyReunion-COL-L00020M0002C001P001G001-CTLFireability-09: INITIAL false skeleton: preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLFireability-10: INITIAL true preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLFireability-12: EF true state space
FamilyReunion-COL-L00020M0002C001P001G001-CTLFireability-13: INITIAL false skeleton: preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLFireability-14: INITIAL false skeleton: preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLFireability-15: EXEF true state space /EXEF
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61 EG EXCL 2/1782 1/32 FamilyReunion-COL-L00020M0002C001P001G001-CTLFireability-00 4490 m, 898 m/sec, 11046 t fired, .
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FamilyReunion-COL-L00020M0002C001P001G001-CTLFireability-04: INITIAL true skeleton: preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLFireability-05: INITIAL true skeleton: preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLFireability-06: INITIAL false skeleton: preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLFireability-07: INITIAL false skeleton: preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLFireability-08: AG NODL false state space
FamilyReunion-COL-L00020M0002C001P001G001-CTLFireability-09: INITIAL false skeleton: preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLFireability-10: INITIAL true preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLFireability-12: EF true state space
FamilyReunion-COL-L00020M0002C001P001G001-CTLFireability-13: INITIAL false skeleton: preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLFireability-14: INITIAL false skeleton: preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLFireability-15: EXEF true state space /EXEF
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61 EG EXCL 7/1782 1/32 FamilyReunion-COL-L00020M0002C001P001G001-CTLFireability-00 17304 m, 2562 m/sec, 58786 t fired, .
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FamilyReunion-COL-L00020M0002C001P001G001-CTLFireability-07: INITIAL false skeleton: preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLFireability-08: AG NODL false state space
FamilyReunion-COL-L00020M0002C001P001G001-CTLFireability-09: INITIAL false skeleton: preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLFireability-10: INITIAL true preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLFireability-12: EF true state space
FamilyReunion-COL-L00020M0002C001P001G001-CTLFireability-13: INITIAL false skeleton: preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLFireability-14: INITIAL false skeleton: preprocessing
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61 EG EXCL 12/1782 1/32 FamilyReunion-COL-L00020M0002C001P001G001-CTLFireability-00 30306 m, 2600 m/sec, 107246 t fired, .
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FamilyReunion-COL-L00020M0002C001P001G001-CTLFireability-07: INITIAL false skeleton: preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLFireability-08: AG NODL false state space
FamilyReunion-COL-L00020M0002C001P001G001-CTLFireability-09: INITIAL false skeleton: preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLFireability-10: INITIAL true preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLFireability-12: EF true state space
FamilyReunion-COL-L00020M0002C001P001G001-CTLFireability-13: INITIAL false skeleton: preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLFireability-14: INITIAL false skeleton: preprocessing
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61 EG EXCL 17/1782 1/32 FamilyReunion-COL-L00020M0002C001P001G001-CTLFireability-00 40222 m, 1983 m/sec, 153916 t fired, .
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FamilyReunion-COL-L00020M0002C001P001G001-CTLFireability-06: INITIAL false skeleton: preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLFireability-07: INITIAL false skeleton: preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLFireability-08: AG NODL false state space
FamilyReunion-COL-L00020M0002C001P001G001-CTLFireability-09: INITIAL false skeleton: preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLFireability-10: INITIAL true preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLFireability-12: EF true state space
FamilyReunion-COL-L00020M0002C001P001G001-CTLFireability-13: INITIAL false skeleton: preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLFireability-14: INITIAL false skeleton: preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLFireability-15: EXEF true state space /EXEF
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61 EG EXCL 22/1782 2/32 FamilyReunion-COL-L00020M0002C001P001G001-CTLFireability-00 50854 m, 2126 m/sec, 198580 t fired, .
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FamilyReunion-COL-L00020M0002C001P001G001-CTLFireability-06: INITIAL false skeleton: preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLFireability-07: INITIAL false skeleton: preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLFireability-08: AG NODL false state space
FamilyReunion-COL-L00020M0002C001P001G001-CTLFireability-09: INITIAL false skeleton: preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLFireability-10: INITIAL true preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLFireability-12: EF true state space
FamilyReunion-COL-L00020M0002C001P001G001-CTLFireability-13: INITIAL false skeleton: preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLFireability-14: INITIAL false skeleton: preprocessing
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61 EG EXCL 27/1782 2/32 FamilyReunion-COL-L00020M0002C001P001G001-CTLFireability-00 60421 m, 1913 m/sec, 245061 t fired, .
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FamilyReunion-COL-L00020M0002C001P001G001-CTLFireability-07: INITIAL false skeleton: preprocessing
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FamilyReunion-COL-L00020M0002C001P001G001-CTLFireability-09: INITIAL false skeleton: preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLFireability-10: INITIAL true preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLFireability-12: EF true state space
FamilyReunion-COL-L00020M0002C001P001G001-CTLFireability-13: INITIAL false skeleton: preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLFireability-14: INITIAL false skeleton: preprocessing
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61 EG EXCL 32/1782 2/32 FamilyReunion-COL-L00020M0002C001P001G001-CTLFireability-00 71644 m, 2244 m/sec, 293155 t fired, .
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FamilyReunion-COL-L00020M0002C001P001G001-CTLFireability-10: INITIAL true preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLFireability-12: EF true state space
FamilyReunion-COL-L00020M0002C001P001G001-CTLFireability-13: INITIAL false skeleton: preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLFireability-14: INITIAL false skeleton: preprocessing
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61 EG EXCL 37/1782 2/32 FamilyReunion-COL-L00020M0002C001P001G001-CTLFireability-00 82771 m, 2225 m/sec, 341210 t fired, .
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FamilyReunion-COL-L00020M0002C001P001G001-CTLFireability-10: INITIAL true preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLFireability-12: EF true state space
FamilyReunion-COL-L00020M0002C001P001G001-CTLFireability-13: INITIAL false skeleton: preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLFireability-14: INITIAL false skeleton: preprocessing
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61 EG EXCL 42/1782 2/32 FamilyReunion-COL-L00020M0002C001P001G001-CTLFireability-00 92862 m, 2018 m/sec, 390695 t fired, .
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FamilyReunion-COL-L00020M0002C001P001G001-CTLFireability-12: EF true state space
FamilyReunion-COL-L00020M0002C001P001G001-CTLFireability-13: INITIAL false skeleton: preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLFireability-14: INITIAL false skeleton: preprocessing
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61 EG EXCL 47/1782 3/32 FamilyReunion-COL-L00020M0002C001P001G001-CTLFireability-00 103225 m, 2072 m/sec, 437755 t fired, .
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FamilyReunion-COL-L00020M0002C001P001G001-CTLFireability-12: EF true state space
FamilyReunion-COL-L00020M0002C001P001G001-CTLFireability-13: INITIAL false skeleton: preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLFireability-14: INITIAL false skeleton: preprocessing
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61 EG EXCL 52/1782 3/32 FamilyReunion-COL-L00020M0002C001P001G001-CTLFireability-00 115311 m, 2417 m/sec, 486585 t fired, .
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61 EG EXCL 57/1782 3/32 FamilyReunion-COL-L00020M0002C001P001G001-CTLFireability-00 125110 m, 1959 m/sec, 533497 t fired, .
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61 EG EXCL 62/1782 3/32 FamilyReunion-COL-L00020M0002C001P001G001-CTLFireability-00 135565 m, 2091 m/sec, 579457 t fired, .
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61 EG EXCL 67/1782 3/32 FamilyReunion-COL-L00020M0002C001P001G001-CTLFireability-00 144904 m, 1867 m/sec, 628002 t fired, .
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61 EG EXCL 72/1782 3/32 FamilyReunion-COL-L00020M0002C001P001G001-CTLFireability-00 153453 m, 1709 m/sec, 678345 t fired, .
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61 EG EXCL 77/1782 4/32 FamilyReunion-COL-L00020M0002C001P001G001-CTLFireability-00 162438 m, 1797 m/sec, 726115 t fired, .
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61 EG EXCL 82/1782 4/32 FamilyReunion-COL-L00020M0002C001P001G001-CTLFireability-00 172890 m, 2090 m/sec, 773274 t fired, .
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61 EG EXCL 87/1782 4/32 FamilyReunion-COL-L00020M0002C001P001G001-CTLFireability-00 183006 m, 2023 m/sec, 820842 t fired, .
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61 EG EXCL 92/1782 4/32 FamilyReunion-COL-L00020M0002C001P001G001-CTLFireability-00 194439 m, 2286 m/sec, 869061 t fired, .
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61 EG EXCL 97/1782 4/32 FamilyReunion-COL-L00020M0002C001P001G001-CTLFireability-00 205055 m, 2123 m/sec, 918672 t fired, .
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61 EG EXCL 102/1782 5/32 FamilyReunion-COL-L00020M0002C001P001G001-CTLFireability-00 215438 m, 2076 m/sec, 966502 t fired, .
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FamilyReunion-COL-L00020M0002C001P001G001-CTLFireability-12: EF true state space
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FamilyReunion-COL-L00020M0002C001P001G001-CTLFireability-14: INITIAL false skeleton: preprocessing
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61 EG EXCL 112/1782 5/32 FamilyReunion-COL-L00020M0002C001P001G001-CTLFireability-00 236146 m, 1905 m/sec, 1059933 t fired, .
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FamilyReunion-COL-L00020M0002C001P001G001-CTLFireability-12: EF true state space
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FamilyReunion-COL-L00020M0002C001P001G001-CTLFireability-14: INITIAL false skeleton: preprocessing
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61 EG EXCL 117/1782 5/32 FamilyReunion-COL-L00020M0002C001P001G001-CTLFireability-00 247266 m, 2224 m/sec, 1106900 t fired, .
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FamilyReunion-COL-L00020M0002C001P001G001-CTLFireability-12: EF true state space
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FamilyReunion-COL-L00020M0002C001P001G001-CTLFireability-14: INITIAL false skeleton: preprocessing
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61 EG EXCL 122/1782 6/32 FamilyReunion-COL-L00020M0002C001P001G001-CTLFireability-00 257060 m, 1958 m/sec, 1153896 t fired, .
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FamilyReunion-COL-L00020M0002C001P001G001-CTLFireability-12: EF true state space
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FamilyReunion-COL-L00020M0002C001P001G001-CTLFireability-14: INITIAL false skeleton: preprocessing
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61 EG EXCL 127/1782 6/32 FamilyReunion-COL-L00020M0002C001P001G001-CTLFireability-00 267649 m, 2117 m/sec, 1199669 t fired, .
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FamilyReunion-COL-L00020M0002C001P001G001-CTLFireability-12: EF true state space
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FamilyReunion-COL-L00020M0002C001P001G001-CTLFireability-14: INITIAL false skeleton: preprocessing
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61 EG EXCL 132/1782 6/32 FamilyReunion-COL-L00020M0002C001P001G001-CTLFireability-00 277681 m, 2006 m/sec, 1246180 t fired, .
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FamilyReunion-COL-L00020M0002C001P001G001-CTLFireability-12: EF true state space
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61 EG EXCL 137/1782 6/32 FamilyReunion-COL-L00020M0002C001P001G001-CTLFireability-00 288099 m, 2083 m/sec, 1293086 t fired, .
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61 EG EXCL 142/1782 6/32 FamilyReunion-COL-L00020M0002C001P001G001-CTLFireability-00 298355 m, 2051 m/sec, 1339311 t fired, .
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61 EG EXCL 147/1782 6/32 FamilyReunion-COL-L00020M0002C001P001G001-CTLFireability-00 308626 m, 2054 m/sec, 1387473 t fired, .
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61 EG EXCL 152/1782 6/32 FamilyReunion-COL-L00020M0002C001P001G001-CTLFireability-00 319056 m, 2086 m/sec, 1433079 t fired, .
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61 EG EXCL 157/1782 6/32 FamilyReunion-COL-L00020M0002C001P001G001-CTLFireability-00 327554 m, 1699 m/sec, 1483116 t fired, .
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61 EG EXCL 162/1782 6/32 FamilyReunion-COL-L00020M0002C001P001G001-CTLFireability-00 336479 m, 1785 m/sec, 1530455 t fired, .
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61 EG EXCL 167/1782 6/32 FamilyReunion-COL-L00020M0002C001P001G001-CTLFireability-00 346434 m, 1991 m/sec, 1577957 t fired, .
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61 EG EXCL 172/1782 7/32 FamilyReunion-COL-L00020M0002C001P001G001-CTLFireability-00 357462 m, 2205 m/sec, 1624361 t fired, .
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61 EG EXCL 177/1782 7/32 FamilyReunion-COL-L00020M0002C001P001G001-CTLFireability-00 368348 m, 2177 m/sec, 1675607 t fired, .
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61 EG EXCL 182/1782 7/32 FamilyReunion-COL-L00020M0002C001P001G001-CTLFireability-00 378932 m, 2116 m/sec, 1723327 t fired, .
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61 EG EXCL 187/1782 7/32 FamilyReunion-COL-L00020M0002C001P001G001-CTLFireability-00 390259 m, 2265 m/sec, 1771474 t fired, .
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61 EG EXCL 192/1782 7/32 FamilyReunion-COL-L00020M0002C001P001G001-CTLFireability-00 400543 m, 2056 m/sec, 1820892 t fired, .
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61 EG EXCL 197/1782 8/32 FamilyReunion-COL-L00020M0002C001P001G001-CTLFireability-00 411255 m, 2142 m/sec, 1872023 t fired, .
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61 EG EXCL 202/1782 8/32 FamilyReunion-COL-L00020M0002C001P001G001-CTLFireability-00 420125 m, 1774 m/sec, 1922625 t fired, .
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61 EG EXCL 207/1782 8/32 FamilyReunion-COL-L00020M0002C001P001G001-CTLFireability-00 428990 m, 1773 m/sec, 1968834 t fired, .
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61 EG EXCL 212/1782 8/32 FamilyReunion-COL-L00020M0002C001P001G001-CTLFireability-00 440137 m, 2229 m/sec, 2020715 t fired, .
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61 EG EXCL 217/1782 8/32 FamilyReunion-COL-L00020M0002C001P001G001-CTLFireability-00 451592 m, 2291 m/sec, 2070853 t fired, .
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61 EG EXCL 222/1782 9/32 FamilyReunion-COL-L00020M0002C001P001G001-CTLFireability-00 462698 m, 2221 m/sec, 2120268 t fired, .
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61 EG EXCL 227/1782 9/32 FamilyReunion-COL-L00020M0002C001P001G001-CTLFireability-00 473539 m, 2168 m/sec, 2169958 t fired, .
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61 EG EXCL 232/1782 9/32 FamilyReunion-COL-L00020M0002C001P001G001-CTLFireability-00 484440 m, 2180 m/sec, 2216494 t fired, .
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61 EG EXCL 237/1782 9/32 FamilyReunion-COL-L00020M0002C001P001G001-CTLFireability-00 494642 m, 2040 m/sec, 2265515 t fired, .
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61 EG EXCL 242/1782 10/32 FamilyReunion-COL-L00020M0002C001P001G001-CTLFireability-00 507006 m, 2472 m/sec, 2317236 t fired, .
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61 EG EXCL 247/1782 10/32 FamilyReunion-COL-L00020M0002C001P001G001-CTLFireability-00 517598 m, 2118 m/sec, 2368385 t fired, .
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61 EG EXCL 252/1782 10/32 FamilyReunion-COL-L00020M0002C001P001G001-CTLFireability-00 528099 m, 2100 m/sec, 2417067 t fired, .
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61 EG EXCL 257/1782 10/32 FamilyReunion-COL-L00020M0002C001P001G001-CTLFireability-00 536302 m, 1640 m/sec, 2465263 t fired, .
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61 EG EXCL 262/1782 10/32 FamilyReunion-COL-L00020M0002C001P001G001-CTLFireability-00 545963 m, 1932 m/sec, 2516284 t fired, .
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61 EG EXCL 267/1782 10/32 FamilyReunion-COL-L00020M0002C001P001G001-CTLFireability-00 556638 m, 2135 m/sec, 2564040 t fired, .
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FamilyReunion-COL-L00020M0002C001P001G001-CTLFireability-10: INITIAL true preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLFireability-12: EF true state space
FamilyReunion-COL-L00020M0002C001P001G001-CTLFireability-13: INITIAL false skeleton: preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLFireability-14: INITIAL false skeleton: preprocessing
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61 EG EXCL 282/1782 11/32 FamilyReunion-COL-L00020M0002C001P001G001-CTLFireability-00 585772 m, 1739 m/sec, 2712059 t fired, .
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FamilyReunion-COL-L00020M0002C001P001G001-CTLFireability-10: INITIAL true preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLFireability-12: EF true state space
FamilyReunion-COL-L00020M0002C001P001G001-CTLFireability-13: INITIAL false skeleton: preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLFireability-14: INITIAL false skeleton: preprocessing
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61 EG EXCL 287/1782 11/32 FamilyReunion-COL-L00020M0002C001P001G001-CTLFireability-00 595509 m, 1947 m/sec, 2762475 t fired, .
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FamilyReunion-COL-L00020M0002C001P001G001-CTLFireability-10: INITIAL true preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLFireability-12: EF true state space
FamilyReunion-COL-L00020M0002C001P001G001-CTLFireability-13: INITIAL false skeleton: preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLFireability-14: INITIAL false skeleton: preprocessing
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61 EG EXCL 292/1782 11/32 FamilyReunion-COL-L00020M0002C001P001G001-CTLFireability-00 604092 m, 1716 m/sec, 2811241 t fired, .
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FamilyReunion-COL-L00020M0002C001P001G001-CTLFireability-12: EF true state space
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FamilyReunion-COL-L00020M0002C001P001G001-CTLFireability-14: INITIAL false skeleton: preprocessing
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61 EG EXCL 297/1782 11/32 FamilyReunion-COL-L00020M0002C001P001G001-CTLFireability-00 613324 m, 1846 m/sec, 2863324 t fired, .
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FamilyReunion-COL-L00020M0002C001P001G001-CTLFireability-10: INITIAL true preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLFireability-12: EF true state space
FamilyReunion-COL-L00020M0002C001P001G001-CTLFireability-13: INITIAL false skeleton: preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLFireability-14: INITIAL false skeleton: preprocessing
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61 EG EXCL 302/1782 12/32 FamilyReunion-COL-L00020M0002C001P001G001-CTLFireability-00 622044 m, 1744 m/sec, 2913146 t fired, .
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FamilyReunion-COL-L00020M0002C001P001G001-CTLFireability-12: EF true state space
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FamilyReunion-COL-L00020M0002C001P001G001-CTLFireability-14: INITIAL false skeleton: preprocessing
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61 EG EXCL 307/1782 12/32 FamilyReunion-COL-L00020M0002C001P001G001-CTLFireability-00 629208 m, 1432 m/sec, 2963176 t fired, .
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FamilyReunion-COL-L00020M0002C001P001G001-CTLFireability-12: EF true state space
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61 EG EXCL 312/1782 12/32 FamilyReunion-COL-L00020M0002C001P001G001-CTLFireability-00 636640 m, 1486 m/sec, 3010984 t fired, .
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FamilyReunion-COL-L00020M0002C001P001G001-CTLFireability-12: EF true state space
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61 EG EXCL 317/1782 12/32 FamilyReunion-COL-L00020M0002C001P001G001-CTLFireability-00 646199 m, 1911 m/sec, 3058452 t fired, .
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61 EG EXCL 322/1782 12/32 FamilyReunion-COL-L00020M0002C001P001G001-CTLFireability-00 656368 m, 2033 m/sec, 3105939 t fired, .
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61 EG EXCL 327/1782 12/32 FamilyReunion-COL-L00020M0002C001P001G001-CTLFireability-00 667410 m, 2208 m/sec, 3155566 t fired, .
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61 EG EXCL 332/1782 12/32 FamilyReunion-COL-L00020M0002C001P001G001-CTLFireability-00 675699 m, 1657 m/sec, 3205023 t fired, .
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61 EG EXCL 337/1782 13/32 FamilyReunion-COL-L00020M0002C001P001G001-CTLFireability-00 684758 m, 1811 m/sec, 3254112 t fired, .
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61 EG EXCL 342/1782 13/32 FamilyReunion-COL-L00020M0002C001P001G001-CTLFireability-00 694568 m, 1962 m/sec, 3305056 t fired, .
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61 EG EXCL 347/1782 13/32 FamilyReunion-COL-L00020M0002C001P001G001-CTLFireability-00 703669 m, 1820 m/sec, 3357547 t fired, .
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61 EG EXCL 352/1782 13/32 FamilyReunion-COL-L00020M0002C001P001G001-CTLFireability-00 712977 m, 1861 m/sec, 3407816 t fired, .
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61 EG EXCL 357/1782 13/32 FamilyReunion-COL-L00020M0002C001P001G001-CTLFireability-00 720569 m, 1518 m/sec, 3457871 t fired, .
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61 EG EXCL 362/1782 13/32 FamilyReunion-COL-L00020M0002C001P001G001-CTLFireability-00 728059 m, 1498 m/sec, 3509034 t fired, .
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61 EG EXCL 367/1782 13/32 FamilyReunion-COL-L00020M0002C001P001G001-CTLFireability-00 736166 m, 1621 m/sec, 3556348 t fired, .
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61 EG EXCL 372/1782 14/32 FamilyReunion-COL-L00020M0002C001P001G001-CTLFireability-00 744739 m, 1714 m/sec, 3604303 t fired, .
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61 EG EXCL 377/1782 14/32 FamilyReunion-COL-L00020M0002C001P001G001-CTLFireability-00 752707 m, 1593 m/sec, 3650693 t fired, .
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61 EG EXCL 382/1782 14/32 FamilyReunion-COL-L00020M0002C001P001G001-CTLFireability-00 761768 m, 1812 m/sec, 3699704 t fired, .
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61 EG EXCL 387/1782 14/32 FamilyReunion-COL-L00020M0002C001P001G001-CTLFireability-00 769095 m, 1465 m/sec, 3750101 t fired, .
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61 EG EXCL 397/1782 14/32 FamilyReunion-COL-L00020M0002C001P001G001-CTLFireability-00 784879 m, 1622 m/sec, 3849443 t fired, .
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61 EG EXCL 402/1782 15/32 FamilyReunion-COL-L00020M0002C001P001G001-CTLFireability-00 792619 m, 1548 m/sec, 3902447 t fired, .
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61 EG EXCL 407/1782 15/32 FamilyReunion-COL-L00020M0002C001P001G001-CTLFireability-00 800291 m, 1534 m/sec, 3953458 t fired, .
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61 EG EXCL 412/1782 15/32 FamilyReunion-COL-L00020M0002C001P001G001-CTLFireability-00 807850 m, 1511 m/sec, 4001443 t fired, .
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61 EG EXCL 417/1782 15/32 FamilyReunion-COL-L00020M0002C001P001G001-CTLFireability-00 814778 m, 1385 m/sec, 4054302 t fired, .
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61 EG EXCL 422/1782 15/32 FamilyReunion-COL-L00020M0002C001P001G001-CTLFireability-00 821158 m, 1276 m/sec, 4103941 t fired, .
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61 EG EXCL 427/1782 15/32 FamilyReunion-COL-L00020M0002C001P001G001-CTLFireability-00 828308 m, 1430 m/sec, 4156034 t fired, .
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61 EG EXCL 432/1782 15/32 FamilyReunion-COL-L00020M0002C001P001G001-CTLFireability-00 838882 m, 2114 m/sec, 4203398 t fired, .
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61 EG EXCL 437/1782 15/32 FamilyReunion-COL-L00020M0002C001P001G001-CTLFireability-00 849304 m, 2084 m/sec, 4251632 t fired, .
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FamilyReunion-COL-L00020M0002C001P001G001-CTLFireability-10: INITIAL true preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLFireability-12: EF true state space
FamilyReunion-COL-L00020M0002C001P001G001-CTLFireability-13: INITIAL false skeleton: preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLFireability-14: INITIAL false skeleton: preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLFireability-15: EXEF true state space /EXEF
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61 EG EXCL 452/1782 16/32 FamilyReunion-COL-L00020M0002C001P001G001-CTLFireability-00 881674 m, 2344 m/sec, 4392242 t fired, .
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FamilyReunion-COL-L00020M0002C001P001G001-CTLFireability-03: INITIAL false skeleton: preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLFireability-04: INITIAL true skeleton: preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLFireability-05: INITIAL true skeleton: preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLFireability-06: INITIAL false skeleton: preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLFireability-07: INITIAL false skeleton: preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLFireability-08: AG NODL false state space
FamilyReunion-COL-L00020M0002C001P001G001-CTLFireability-09: INITIAL false skeleton: preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLFireability-10: INITIAL true preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLFireability-12: EF true state space
FamilyReunion-COL-L00020M0002C001P001G001-CTLFireability-13: INITIAL false skeleton: preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLFireability-14: INITIAL false skeleton: preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLFireability-15: EXEF true state space /EXEF
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
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TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
61 EG EXCL 457/1782 16/32 FamilyReunion-COL-L00020M0002C001P001G001-CTLFireability-00 891809 m, 2027 m/sec, 4440291 t fired, .
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FamilyReunion-COL-L00020M0002C001P001G001-CTLFireability-03: INITIAL false skeleton: preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLFireability-04: INITIAL true skeleton: preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLFireability-05: INITIAL true skeleton: preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLFireability-06: INITIAL false skeleton: preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLFireability-07: INITIAL false skeleton: preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLFireability-08: AG NODL false state space
FamilyReunion-COL-L00020M0002C001P001G001-CTLFireability-09: INITIAL false skeleton: preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLFireability-10: INITIAL true preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLFireability-12: EF true state space
FamilyReunion-COL-L00020M0002C001P001G001-CTLFireability-13: INITIAL false skeleton: preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLFireability-14: INITIAL false skeleton: preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLFireability-15: EXEF true state space /EXEF
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
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TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
61 EG EXCL 462/1782 16/32 FamilyReunion-COL-L00020M0002C001P001G001-CTLFireability-00 901436 m, 1925 m/sec, 4493254 t fired, .
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FamilyReunion-COL-L00020M0002C001P001G001-CTLFireability-03: INITIAL false skeleton: preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLFireability-04: INITIAL true skeleton: preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLFireability-05: INITIAL true skeleton: preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLFireability-06: INITIAL false skeleton: preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLFireability-07: INITIAL false skeleton: preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLFireability-08: AG NODL false state space
FamilyReunion-COL-L00020M0002C001P001G001-CTLFireability-09: INITIAL false skeleton: preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLFireability-10: INITIAL true preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLFireability-12: EF true state space
FamilyReunion-COL-L00020M0002C001P001G001-CTLFireability-13: INITIAL false skeleton: preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLFireability-14: INITIAL false skeleton: preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLFireability-15: EXEF true state space /EXEF
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61 EG EXCL 467/1782 17/32 FamilyReunion-COL-L00020M0002C001P001G001-CTLFireability-00 912787 m, 2270 m/sec, 4539050 t fired, .
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FamilyReunion-COL-L00020M0002C001P001G001-CTLFireability-03: INITIAL false skeleton: preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLFireability-04: INITIAL true skeleton: preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLFireability-05: INITIAL true skeleton: preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLFireability-06: INITIAL false skeleton: preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLFireability-07: INITIAL false skeleton: preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLFireability-08: AG NODL false state space
FamilyReunion-COL-L00020M0002C001P001G001-CTLFireability-09: INITIAL false skeleton: preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLFireability-10: INITIAL true preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLFireability-12: EF true state space
FamilyReunion-COL-L00020M0002C001P001G001-CTLFireability-13: INITIAL false skeleton: preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLFireability-14: INITIAL false skeleton: preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLFireability-15: EXEF true state space /EXEF
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61 EG EXCL 472/1782 17/32 FamilyReunion-COL-L00020M0002C001P001G001-CTLFireability-00 923077 m, 2058 m/sec, 4586294 t fired, .
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FamilyReunion-COL-L00020M0002C001P001G001-CTLFireability-03: INITIAL false skeleton: preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLFireability-04: INITIAL true skeleton: preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLFireability-05: INITIAL true skeleton: preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLFireability-06: INITIAL false skeleton: preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLFireability-07: INITIAL false skeleton: preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLFireability-08: AG NODL false state space
FamilyReunion-COL-L00020M0002C001P001G001-CTLFireability-09: INITIAL false skeleton: preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLFireability-10: INITIAL true preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLFireability-12: EF true state space
FamilyReunion-COL-L00020M0002C001P001G001-CTLFireability-13: INITIAL false skeleton: preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLFireability-14: INITIAL false skeleton: preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLFireability-15: EXEF true state space /EXEF
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
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61 EG EXCL 477/1782 17/32 FamilyReunion-COL-L00020M0002C001P001G001-CTLFireability-00 932398 m, 1864 m/sec, 4634204 t fired, .
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FamilyReunion-COL-L00020M0002C001P001G001-CTLFireability-03: INITIAL false skeleton: preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLFireability-04: INITIAL true skeleton: preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLFireability-05: INITIAL true skeleton: preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLFireability-06: INITIAL false skeleton: preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLFireability-07: INITIAL false skeleton: preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLFireability-08: AG NODL false state space
FamilyReunion-COL-L00020M0002C001P001G001-CTLFireability-09: INITIAL false skeleton: preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLFireability-10: INITIAL true preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLFireability-12: EF true state space
FamilyReunion-COL-L00020M0002C001P001G001-CTLFireability-13: INITIAL false skeleton: preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLFireability-14: INITIAL false skeleton: preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLFireability-15: EXEF true state space /EXEF
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
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61 EG EXCL 482/1782 17/32 FamilyReunion-COL-L00020M0002C001P001G001-CTLFireability-00 942555 m, 2031 m/sec, 4683233 t fired, .
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FamilyReunion-COL-L00020M0002C001P001G001-CTLFireability-03: INITIAL false skeleton: preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLFireability-04: INITIAL true skeleton: preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLFireability-05: INITIAL true skeleton: preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLFireability-06: INITIAL false skeleton: preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLFireability-07: INITIAL false skeleton: preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLFireability-08: AG NODL false state space
FamilyReunion-COL-L00020M0002C001P001G001-CTLFireability-09: INITIAL false skeleton: preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLFireability-10: INITIAL true preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLFireability-12: EF true state space
FamilyReunion-COL-L00020M0002C001P001G001-CTLFireability-13: INITIAL false skeleton: preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLFireability-14: INITIAL false skeleton: preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLFireability-15: EXEF true state space /EXEF
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
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61 EG EXCL 487/1782 17/32 FamilyReunion-COL-L00020M0002C001P001G001-CTLFireability-00 953963 m, 2281 m/sec, 4731377 t fired, .
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FamilyReunion-COL-L00020M0002C001P001G001-CTLFireability-03: INITIAL false skeleton: preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLFireability-04: INITIAL true skeleton: preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLFireability-05: INITIAL true skeleton: preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLFireability-06: INITIAL false skeleton: preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLFireability-07: INITIAL false skeleton: preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLFireability-08: AG NODL false state space
FamilyReunion-COL-L00020M0002C001P001G001-CTLFireability-09: INITIAL false skeleton: preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLFireability-10: INITIAL true preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLFireability-12: EF true state space
FamilyReunion-COL-L00020M0002C001P001G001-CTLFireability-13: INITIAL false skeleton: preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLFireability-14: INITIAL false skeleton: preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLFireability-15: EXEF true state space /EXEF
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
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61 EG EXCL 492/1782 17/32 FamilyReunion-COL-L00020M0002C001P001G001-CTLFireability-00 965547 m, 2316 m/sec, 4781809 t fired, .
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FamilyReunion-COL-L00020M0002C001P001G001-CTLFireability-03: INITIAL false skeleton: preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLFireability-04: INITIAL true skeleton: preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLFireability-05: INITIAL true skeleton: preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLFireability-06: INITIAL false skeleton: preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLFireability-07: INITIAL false skeleton: preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLFireability-08: AG NODL false state space
FamilyReunion-COL-L00020M0002C001P001G001-CTLFireability-09: INITIAL false skeleton: preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLFireability-10: INITIAL true preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLFireability-12: EF true state space
FamilyReunion-COL-L00020M0002C001P001G001-CTLFireability-13: INITIAL false skeleton: preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLFireability-14: INITIAL false skeleton: preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLFireability-15: EXEF true state space /EXEF
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
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61 EG EXCL 497/1782 18/32 FamilyReunion-COL-L00020M0002C001P001G001-CTLFireability-00 975430 m, 1976 m/sec, 4831899 t fired, .
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FamilyReunion-COL-L00020M0002C001P001G001-CTLFireability-03: INITIAL false skeleton: preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLFireability-04: INITIAL true skeleton: preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLFireability-05: INITIAL true skeleton: preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLFireability-06: INITIAL false skeleton: preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLFireability-07: INITIAL false skeleton: preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLFireability-08: AG NODL false state space
FamilyReunion-COL-L00020M0002C001P001G001-CTLFireability-09: INITIAL false skeleton: preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLFireability-10: INITIAL true preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLFireability-12: EF true state space
FamilyReunion-COL-L00020M0002C001P001G001-CTLFireability-13: INITIAL false skeleton: preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLFireability-14: INITIAL false skeleton: preprocessing
FamilyReunion-COL-L00020M0002C001P001G001-CTLFireability-15: EXEF true state space /EXEF
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61 EG EXCL 502/1782 18/32 FamilyReunion-COL-L00020M0002C001P001G001-CTLFireability-00 986501 m, 2214 m/sec, 4881232 t fired, .
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========== file over 1MB has been truncated ======
retrieve it from the run archives if needed
Sequence of Actions to be Executed by the VM
This is useful if one wants to reexecute the tool in the VM from the submitted image disk.
set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="FamilyReunion-COL-L00020M0002C001P001G001"
export BK_EXAMINATION="CTLFireability"
export BK_TOOL="lola"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"
# this is specific to your benchmark or test
export BIN_DIR="$HOME/BenchKit/bin"
# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi
# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-4028"
echo " Executing tool lola"
echo " Input is FamilyReunion-COL-L00020M0002C001P001G001, examination is CTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r080-tall-162048871500850"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"
tar xzf /home/mcc/BenchKit/INPUTS/FamilyReunion-COL-L00020M0002C001P001G001.tgz
mv FamilyReunion-COL-L00020M0002C001P001G001 execution
cd execution
if [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "UpperBounds" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] || [ "CTLFireability" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh
echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property CTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "CTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '
echo "FORMULA_NAME $x"
done
elif [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] ; then
echo "FORMULA_NAME CTLFireability"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;