fond
Model Checking Contest 2021
11th edition, Paris, France, June 23, 2021
Execution of r080-tall-162048871500834
Last Updated
Jun 28, 2021

About the Execution of LoLA for FMS-PT-50000

Execution Summary
Max Memory
Used (MB)
Time wait (ms) CPU Usage (ms) I/O Wait (ms) Computed Result Execution
Status
8253.680 1053920.00 1145946.00 4327.80 ?????F?FT??????T normal

Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/data/fkordon/mcc2021-input.r080-tall-162048871500834.qcow2', fmt=qcow2 size=4294967296 backing_file='/data/fkordon/mcc2021-input.qcow2' encryption=off cluster_size=65536 lazy_refcounts=off
Waiting for the VM to be ready (probing ssh)
..................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................
=====================================================================
Generated by BenchKit 2-4028
Executing tool lola
Input is FMS-PT-50000, examination is CTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r080-tall-162048871500834
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 412K
-rw-r--r-- 1 mcc users 14K May 5 16:58 CTLCardinality.txt
-rw-r--r-- 1 mcc users 137K May 10 09:43 CTLCardinality.xml
-rw-r--r-- 1 mcc users 9.6K May 5 16:58 CTLFireability.txt
-rw-r--r-- 1 mcc users 90K May 10 09:43 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K May 6 14:48 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.3K May 6 14:48 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 3.1K Mar 28 16:09 LTLCardinality.txt
-rw-r--r-- 1 mcc users 22K Mar 28 16:09 LTLCardinality.xml
-rw-r--r-- 1 mcc users 1.9K Mar 28 16:09 LTLFireability.txt
-rw-r--r-- 1 mcc users 17K Mar 28 16:09 LTLFireability.xml
-rw-r--r-- 1 mcc users 3.3K Mar 23 10:45 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 17K Mar 23 10:45 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 2.7K Mar 22 18:48 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 17K Mar 22 18:48 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.5K Mar 22 09:11 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.6K Mar 22 09:11 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 May 5 16:51 equiv_col
-rw-r--r-- 1 mcc users 6 May 5 16:51 instance
-rw-r--r-- 1 mcc users 6 May 5 16:51 iscolored
-rw-r--r-- 1 mcc users 16K May 5 16:51 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME FMS-PT-50000-CTLFireability-00
FORMULA_NAME FMS-PT-50000-CTLFireability-01
FORMULA_NAME FMS-PT-50000-CTLFireability-02
FORMULA_NAME FMS-PT-50000-CTLFireability-03
FORMULA_NAME FMS-PT-50000-CTLFireability-04
FORMULA_NAME FMS-PT-50000-CTLFireability-05
FORMULA_NAME FMS-PT-50000-CTLFireability-06
FORMULA_NAME FMS-PT-50000-CTLFireability-07
FORMULA_NAME FMS-PT-50000-CTLFireability-08
FORMULA_NAME FMS-PT-50000-CTLFireability-09
FORMULA_NAME FMS-PT-50000-CTLFireability-10
FORMULA_NAME FMS-PT-50000-CTLFireability-11
FORMULA_NAME FMS-PT-50000-CTLFireability-12
FORMULA_NAME FMS-PT-50000-CTLFireability-13
FORMULA_NAME FMS-PT-50000-CTLFireability-14
FORMULA_NAME FMS-PT-50000-CTLFireability-15

=== Now, execution of the tool begins

BK_START 1620749040852

starting LoLA
BK_INPUT FMS-PT-50000
BK_EXAMINATION: CTLFireability
bin directory: /home/mcc/BenchKit/bin
current directory: /home/mcc/execution
CTLFireability

FORMULA FMS-PT-50000-CTLFireability-05 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA FMS-PT-50000-CTLFireability-07 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA FMS-PT-50000-CTLFireability-08 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA FMS-PT-50000-CTLFireability-15 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

BK_STOP 1620750094772

--------------------
content from stderr:

lola: MEM LIMIT 32
lola: MEM LIMIT 5
lola: NET
lola: input: PNML file (--pnmlnet)
lola: reading net from /home/mcc/execution/model.pnml
lola: reading pnml
lola: PNML file contains place/transition net
lola: finished parsing
lola: closed net file /home/mcc/execution/model.pnml
lola: Reading formula.
lola: Using XML format (--xmlformula)
lola: reading XML formula
lola: reading formula from /home/mcc/execution/CTLFireability.xml
lola: rewrite Frontend/Parser/formula_rewrite.k:388
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:397
lola: rewrite Frontend/Parser/formula_rewrite.k:457
lola: rewrite Frontend/Parser/formula_rewrite.k:469
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:394
lola: rewrite Frontend/Parser/formula_rewrite.k:475
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:397
lola: rewrite Frontend/Parser/formula_rewrite.k:460
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:553
lola: rewrite Frontend/Parser/formula_rewrite.k:553
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:478
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:340
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:475
lola: rewrite Frontend/Parser/formula_rewrite.k:472
lola: rewrite Frontend/Parser/formula_rewrite.k:388
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:397
lola: rewrite Frontend/Parser/formula_rewrite.k:454
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: RELEASE
lola: RELEASE
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Rule S: 0 transitions removed,0 places removed
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: LAUNCH task # 44 (type EXCL) for 43 FMS-PT-50000-CTLFireability-13
lola: time limit : 128 sec
lola: memory limit: 32 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:703
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: LAUNCH task # 53 (type FNDP) for 15 FMS-PT-50000-CTLFireability-05
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 54 (type EQUN) for 15 FMS-PT-50000-CTLFireability-05
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 56 (type SRCH) for 15 FMS-PT-50000-CTLFireability-05
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 56 (type SRCH) for FMS-PT-50000-CTLFireability-05
lola: result : unknown
lola: time used : 0.000000
lola: memory pages used : 1
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: Created skeleton in 0.000000 secs.
sara: try reading problem file /home/mcc/execution/CTLFireability-54.sara.
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:753
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: FINISHED task # 53 (type FNDP) for FMS-PT-50000-CTLFireability-05
lola: result : true
lola: fired transitions : 149999
lola: tried executions : 1
lola: time used : 1.000000
lola: memory pages used : 0
lola: CANCELED task # 54 (type EQUN) for FMS-PT-50000-CTLFireability-05 (obsolete)
lola: FINISHED task # 54 (type EQUN) for FMS-PT-50000-CTLFireability-05
lola: result : unknown
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FMS-PT-50000-CTLFireability-05: AG false findpath

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FMS-PT-50000-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-07: AXAG 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-12: DISJ 0 2 0 0 2 0 0 0
FMS-PT-50000-CTLFireability-13: CTL 0 0 1 0 1 0 0 0
FMS-PT-50000-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-15: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
44 CTL EXCL 5/224 2/32 FMS-PT-50000-CTLFireability-13 276869 m, 55373 m/sec, 1080603 t fired, .

Time elapsed: 6 secs. Pages in use: 2
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FMS-PT-50000-CTLFireability-05: AG false findpath

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FMS-PT-50000-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-07: AXAG 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-12: DISJ 0 2 0 0 2 0 0 0
FMS-PT-50000-CTLFireability-13: CTL 0 0 1 0 1 0 0 0
FMS-PT-50000-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-15: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
44 CTL EXCL 10/224 3/32 FMS-PT-50000-CTLFireability-13 547909 m, 54208 m/sec, 2140572 t fired, .

Time elapsed: 11 secs. Pages in use: 3
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FMS-PT-50000-CTLFireability-05: AG false findpath

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FMS-PT-50000-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-07: AXAG 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-12: DISJ 0 2 0 0 2 0 0 0
FMS-PT-50000-CTLFireability-13: CTL 0 0 1 0 1 0 0 0
FMS-PT-50000-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-15: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
44 CTL EXCL 15/224 4/32 FMS-PT-50000-CTLFireability-13 879880 m, 66394 m/sec, 3389631 t fired, .

Time elapsed: 16 secs. Pages in use: 4
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FMS-PT-50000-CTLFireability-05: AG false findpath

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FMS-PT-50000-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-07: AXAG 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-12: DISJ 0 2 0 0 2 0 0 0
FMS-PT-50000-CTLFireability-13: CTL 0 0 1 0 1 0 0 0
FMS-PT-50000-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-15: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
44 CTL EXCL 20/224 6/32 FMS-PT-50000-CTLFireability-13 1201911 m, 64406 m/sec, 4607614 t fired, .

Time elapsed: 21 secs. Pages in use: 6
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FMS-PT-50000-CTLFireability-05: AG false findpath

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FMS-PT-50000-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-07: AXAG 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-12: DISJ 0 2 0 0 2 0 0 0
FMS-PT-50000-CTLFireability-13: CTL 0 0 1 0 1 0 0 0
FMS-PT-50000-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-15: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
44 CTL EXCL 25/224 7/32 FMS-PT-50000-CTLFireability-13 1466722 m, 52962 m/sec, 5650149 t fired, .

Time elapsed: 26 secs. Pages in use: 7
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FMS-PT-50000-CTLFireability-05: AG false findpath

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FMS-PT-50000-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-07: AXAG 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-12: DISJ 0 2 0 0 2 0 0 0
FMS-PT-50000-CTLFireability-13: CTL 0 0 1 0 1 0 0 0
FMS-PT-50000-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-15: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
44 CTL EXCL 30/224 8/32 FMS-PT-50000-CTLFireability-13 1785969 m, 63849 m/sec, 6857888 t fired, .

Time elapsed: 31 secs. Pages in use: 8
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FMS-PT-50000-CTLFireability-05: AG false findpath

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FMS-PT-50000-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-07: AXAG 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-12: DISJ 0 2 0 0 2 0 0 0
FMS-PT-50000-CTLFireability-13: CTL 0 0 1 0 1 0 0 0
FMS-PT-50000-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-15: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
44 CTL EXCL 35/224 9/32 FMS-PT-50000-CTLFireability-13 2029262 m, 48658 m/sec, 7806621 t fired, .

Time elapsed: 36 secs. Pages in use: 9
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FMS-PT-50000-CTLFireability-05: AG false findpath

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FMS-PT-50000-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-07: AXAG 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-12: DISJ 0 2 0 0 2 0 0 0
FMS-PT-50000-CTLFireability-13: CTL 0 0 1 0 1 0 0 0
FMS-PT-50000-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-15: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
44 CTL EXCL 40/224 10/32 FMS-PT-50000-CTLFireability-13 2363936 m, 66934 m/sec, 9091783 t fired, .

Time elapsed: 41 secs. Pages in use: 10
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FMS-PT-50000-CTLFireability-05: AG false findpath

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FMS-PT-50000-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-07: AXAG 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-12: DISJ 0 2 0 0 2 0 0 0
FMS-PT-50000-CTLFireability-13: CTL 0 0 1 0 1 0 0 0
FMS-PT-50000-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-15: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
44 CTL EXCL 45/224 12/32 FMS-PT-50000-CTLFireability-13 2671333 m, 61479 m/sec, 10263970 t fired, .

Time elapsed: 46 secs. Pages in use: 12
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FMS-PT-50000-CTLFireability-05: AG false findpath

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FMS-PT-50000-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-07: AXAG 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-12: DISJ 0 2 0 0 2 0 0 0
FMS-PT-50000-CTLFireability-13: CTL 0 0 1 0 1 0 0 0
FMS-PT-50000-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-15: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
44 CTL EXCL 50/224 13/32 FMS-PT-50000-CTLFireability-13 3065815 m, 78896 m/sec, 11763193 t fired, .

Time elapsed: 51 secs. Pages in use: 13
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FMS-PT-50000-CTLFireability-05: AG false findpath

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FMS-PT-50000-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-07: AXAG 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-12: DISJ 0 2 0 0 2 0 0 0
FMS-PT-50000-CTLFireability-13: CTL 0 0 1 0 1 0 0 0
FMS-PT-50000-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-15: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
44 CTL EXCL 55/224 14/32 FMS-PT-50000-CTLFireability-13 3305195 m, 47876 m/sec, 12670710 t fired, .

Time elapsed: 56 secs. Pages in use: 14
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FMS-PT-50000-CTLFireability-05: AG false findpath

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FMS-PT-50000-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-07: AXAG 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-12: DISJ 0 2 0 0 2 0 0 0
FMS-PT-50000-CTLFireability-13: CTL 0 0 1 0 1 0 0 0
FMS-PT-50000-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-15: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
44 CTL EXCL 60/224 16/32 FMS-PT-50000-CTLFireability-13 3667374 m, 72435 m/sec, 14069418 t fired, .

Time elapsed: 61 secs. Pages in use: 16
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FMS-PT-50000-CTLFireability-05: AG false findpath

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FMS-PT-50000-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-07: AXAG 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-12: DISJ 0 2 0 0 2 0 0 0
FMS-PT-50000-CTLFireability-13: CTL 0 0 1 0 1 0 0 0
FMS-PT-50000-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-15: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
44 CTL EXCL 65/224 17/32 FMS-PT-50000-CTLFireability-13 4005990 m, 67723 m/sec, 15367929 t fired, .

Time elapsed: 66 secs. Pages in use: 17
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FMS-PT-50000-CTLFireability-05: AG false findpath

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FMS-PT-50000-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-07: AXAG 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-12: DISJ 0 2 0 0 2 0 0 0
FMS-PT-50000-CTLFireability-13: CTL 0 0 1 0 1 0 0 0
FMS-PT-50000-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-15: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
44 CTL EXCL 70/224 19/32 FMS-PT-50000-CTLFireability-13 4351438 m, 69089 m/sec, 16656357 t fired, .

Time elapsed: 71 secs. Pages in use: 19
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FMS-PT-50000-CTLFireability-05: AG false findpath

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FMS-PT-50000-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-07: AXAG 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-12: DISJ 0 2 0 0 2 0 0 0
FMS-PT-50000-CTLFireability-13: CTL 0 0 1 0 1 0 0 0
FMS-PT-50000-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-15: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
44 CTL EXCL 75/224 20/32 FMS-PT-50000-CTLFireability-13 4688438 m, 67400 m/sec, 17972847 t fired, .

Time elapsed: 76 secs. Pages in use: 20
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FMS-PT-50000-CTLFireability-05: AG false findpath

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FMS-PT-50000-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-07: AXAG 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-12: DISJ 0 2 0 0 2 0 0 0
FMS-PT-50000-CTLFireability-13: CTL 0 0 1 0 1 0 0 0
FMS-PT-50000-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-15: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
44 CTL EXCL 80/224 21/32 FMS-PT-50000-CTLFireability-13 4948253 m, 51963 m/sec, 18944708 t fired, .

Time elapsed: 81 secs. Pages in use: 21
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FMS-PT-50000-CTLFireability-05: AG false findpath

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FMS-PT-50000-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-07: AXAG 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-12: DISJ 0 2 0 0 2 0 0 0
FMS-PT-50000-CTLFireability-13: CTL 0 0 1 0 1 0 0 0
FMS-PT-50000-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-15: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
44 CTL EXCL 85/224 23/32 FMS-PT-50000-CTLFireability-13 5263233 m, 62996 m/sec, 20159409 t fired, .

Time elapsed: 86 secs. Pages in use: 23
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FMS-PT-50000-CTLFireability-05: AG false findpath

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FMS-PT-50000-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-07: AXAG 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-12: DISJ 0 2 0 0 2 0 0 0
FMS-PT-50000-CTLFireability-13: CTL 0 0 1 0 1 0 0 0
FMS-PT-50000-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-15: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
44 CTL EXCL 90/224 24/32 FMS-PT-50000-CTLFireability-13 5513846 m, 50122 m/sec, 21141484 t fired, .

Time elapsed: 91 secs. Pages in use: 24
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FMS-PT-50000-CTLFireability-05: AG false findpath

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FMS-PT-50000-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-07: AXAG 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-12: DISJ 0 2 0 0 2 0 0 0
FMS-PT-50000-CTLFireability-13: CTL 0 0 1 0 1 0 0 0
FMS-PT-50000-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-15: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
44 CTL EXCL 95/224 25/32 FMS-PT-50000-CTLFireability-13 5881911 m, 73613 m/sec, 22543446 t fired, .

Time elapsed: 96 secs. Pages in use: 25
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FMS-PT-50000-CTLFireability-05: AG false findpath

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FMS-PT-50000-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-07: AXAG 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-12: DISJ 0 2 0 0 2 0 0 0
FMS-PT-50000-CTLFireability-13: CTL 0 0 1 0 1 0 0 0
FMS-PT-50000-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-15: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
44 CTL EXCL 100/224 27/32 FMS-PT-50000-CTLFireability-13 6225736 m, 68765 m/sec, 23890652 t fired, .

Time elapsed: 101 secs. Pages in use: 27
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FMS-PT-50000-CTLFireability-05: AG false findpath

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FMS-PT-50000-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-07: AXAG 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-12: DISJ 0 2 0 0 2 0 0 0
FMS-PT-50000-CTLFireability-13: CTL 0 0 1 0 1 0 0 0
FMS-PT-50000-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-15: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
44 CTL EXCL 105/224 28/32 FMS-PT-50000-CTLFireability-13 6587826 m, 72418 m/sec, 25263411 t fired, .

Time elapsed: 106 secs. Pages in use: 28
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FMS-PT-50000-CTLFireability-05: AG false findpath

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FMS-PT-50000-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-07: AXAG 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-12: DISJ 0 2 0 0 2 0 0 0
FMS-PT-50000-CTLFireability-13: CTL 0 0 1 0 1 0 0 0
FMS-PT-50000-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-15: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
44 CTL EXCL 110/224 30/32 FMS-PT-50000-CTLFireability-13 7025343 m, 87503 m/sec, 26925959 t fired, .

Time elapsed: 111 secs. Pages in use: 30
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FMS-PT-50000-CTLFireability-05: AG false findpath

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FMS-PT-50000-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-07: AXAG 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-12: DISJ 0 2 0 0 2 0 0 0
FMS-PT-50000-CTLFireability-13: CTL 0 0 1 0 1 0 0 0
FMS-PT-50000-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-15: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
44 CTL EXCL 115/224 32/32 FMS-PT-50000-CTLFireability-13 7397388 m, 74409 m/sec, 28363057 t fired, .

Time elapsed: 116 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
lola: CANCELED task # 44 (type EXCL) for FMS-PT-50000-CTLFireability-13 (memory limit exceeded)
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FMS-PT-50000-CTLFireability-05: AG false findpath

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FMS-PT-50000-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-07: AXAG 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-12: DISJ 0 2 0 0 2 0 0 0
FMS-PT-50000-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-15: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 121 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
lola: LAUNCH task # 57 (type EXCL) for 21 FMS-PT-50000-CTLFireability-07
lola: time limit : 231 sec
lola: memory limit: 32 pages
lola: FINISHED task # 57 (type EXCL) for FMS-PT-50000-CTLFireability-07
lola: result : true
lola: markings : 50003
lola: fired transitions : 50002
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 47 (type EXCL) for 46 FMS-PT-50000-CTLFireability-14
lola: time limit : 248 sec
lola: memory limit: 32 pages
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FMS-PT-50000-CTLFireability-05: AG false findpath
FMS-PT-50000-CTLFireability-07: AXAG false state space /EXEF

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FMS-PT-50000-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-12: DISJ 0 2 0 0 2 0 0 0
FMS-PT-50000-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-14: CTL 0 0 1 0 1 0 0 0
FMS-PT-50000-CTLFireability-15: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
47 CTL EXCL 5/248 5/32 FMS-PT-50000-CTLFireability-14 1044835 m, 208967 m/sec, 1294840 t fired, .

Time elapsed: 126 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FMS-PT-50000-CTLFireability-05: AG false findpath
FMS-PT-50000-CTLFireability-07: AXAG false state space /EXEF

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FMS-PT-50000-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-12: DISJ 0 2 0 0 2 0 0 0
FMS-PT-50000-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-14: CTL 0 0 1 0 1 0 0 0
FMS-PT-50000-CTLFireability-15: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
47 CTL EXCL 10/248 9/32 FMS-PT-50000-CTLFireability-14 1956120 m, 182257 m/sec, 2434180 t fired, .

Time elapsed: 131 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FMS-PT-50000-CTLFireability-05: AG false findpath
FMS-PT-50000-CTLFireability-07: AXAG false state space /EXEF

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FMS-PT-50000-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-12: DISJ 0 2 0 0 2 0 0 0
FMS-PT-50000-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-14: CTL 0 0 1 0 1 0 0 0
FMS-PT-50000-CTLFireability-15: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
47 CTL EXCL 15/248 15/32 FMS-PT-50000-CTLFireability-14 3061366 m, 221049 m/sec, 3811381 t fired, .

Time elapsed: 136 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FMS-PT-50000-CTLFireability-05: AG false findpath
FMS-PT-50000-CTLFireability-07: AXAG false state space /EXEF

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FMS-PT-50000-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-12: DISJ 0 2 0 0 2 0 0 0
FMS-PT-50000-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-14: CTL 0 0 1 0 1 0 0 0
FMS-PT-50000-CTLFireability-15: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
47 CTL EXCL 20/248 18/32 FMS-PT-50000-CTLFireability-14 3884123 m, 164551 m/sec, 4834142 t fired, .

Time elapsed: 141 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FMS-PT-50000-CTLFireability-05: AG false findpath
FMS-PT-50000-CTLFireability-07: AXAG false state space /EXEF

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FMS-PT-50000-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-12: DISJ 0 2 0 0 2 0 0 0
FMS-PT-50000-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-14: CTL 0 0 1 0 1 0 0 0
FMS-PT-50000-CTLFireability-15: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
47 CTL EXCL 25/248 22/32 FMS-PT-50000-CTLFireability-14 4631454 m, 149466 m/sec, 5781476 t fired, .

Time elapsed: 146 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FMS-PT-50000-CTLFireability-05: AG false findpath
FMS-PT-50000-CTLFireability-07: AXAG false state space /EXEF

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FMS-PT-50000-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-12: DISJ 0 2 0 0 2 0 0 0
FMS-PT-50000-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-14: CTL 0 0 1 0 1 0 0 0
FMS-PT-50000-CTLFireability-15: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
47 CTL EXCL 30/248 26/32 FMS-PT-50000-CTLFireability-14 5511945 m, 176098 m/sec, 6867917 t fired, .

Time elapsed: 151 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FMS-PT-50000-CTLFireability-05: AG false findpath
FMS-PT-50000-CTLFireability-07: AXAG false state space /EXEF

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FMS-PT-50000-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-12: DISJ 0 2 0 0 2 0 0 0
FMS-PT-50000-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-14: CTL 0 0 1 0 1 0 0 0
FMS-PT-50000-CTLFireability-15: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
47 CTL EXCL 35/248 30/32 FMS-PT-50000-CTLFireability-14 6404418 m, 178494 m/sec, 8004450 t fired, .

Time elapsed: 156 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
lola: CANCELED task # 47 (type EXCL) for FMS-PT-50000-CTLFireability-14 (memory limit exceeded)
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FMS-PT-50000-CTLFireability-05: AG false findpath
FMS-PT-50000-CTLFireability-07: AXAG false state space /EXEF

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FMS-PT-50000-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-12: DISJ 0 2 0 0 2 0 0 0
FMS-PT-50000-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-14: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-15: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 161 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
lola: LAUNCH task # 41 (type EXCL) for 36 FMS-PT-50000-CTLFireability-12
lola: time limit : 264 sec
lola: memory limit: 32 pages
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FMS-PT-50000-CTLFireability-05: AG false findpath
FMS-PT-50000-CTLFireability-07: AXAG false state space /EXEF

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FMS-PT-50000-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-12: DISJ 0 1 1 0 2 0 0 0
FMS-PT-50000-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-14: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-15: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
41 CTL EXCL 5/264 3/32 FMS-PT-50000-CTLFireability-12 639497 m, 127899 m/sec, 1139491 t fired, .

Time elapsed: 166 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FMS-PT-50000-CTLFireability-05: AG false findpath
FMS-PT-50000-CTLFireability-07: AXAG false state space /EXEF

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FMS-PT-50000-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-12: DISJ 0 1 1 0 2 0 0 0
FMS-PT-50000-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-14: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-15: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
41 CTL EXCL 10/264 7/32 FMS-PT-50000-CTLFireability-12 1394942 m, 151089 m/sec, 2494930 t fired, .

Time elapsed: 171 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FMS-PT-50000-CTLFireability-05: AG false findpath
FMS-PT-50000-CTLFireability-07: AXAG false state space /EXEF

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FMS-PT-50000-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-12: DISJ 0 1 1 0 2 0 0 0
FMS-PT-50000-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-14: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-15: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
41 CTL EXCL 15/264 10/32 FMS-PT-50000-CTLFireability-12 2047355 m, 130482 m/sec, 3718329 t fired, .

Time elapsed: 176 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FMS-PT-50000-CTLFireability-05: AG false findpath
FMS-PT-50000-CTLFireability-07: AXAG false state space /EXEF

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FMS-PT-50000-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-12: DISJ 0 1 1 0 2 0 0 0
FMS-PT-50000-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-14: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-15: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
41 CTL EXCL 20/264 12/32 FMS-PT-50000-CTLFireability-12 2609781 m, 112485 m/sec, 4724382 t fired, .

Time elapsed: 181 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FMS-PT-50000-CTLFireability-05: AG false findpath
FMS-PT-50000-CTLFireability-07: AXAG false state space /EXEF

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FMS-PT-50000-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-12: DISJ 0 1 1 0 2 0 0 0
FMS-PT-50000-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-14: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-15: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
41 CTL EXCL 25/264 15/32 FMS-PT-50000-CTLFireability-12 3267711 m, 131586 m/sec, 5969192 t fired, .

Time elapsed: 186 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FMS-PT-50000-CTLFireability-05: AG false findpath
FMS-PT-50000-CTLFireability-07: AXAG false state space /EXEF

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FMS-PT-50000-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-12: DISJ 0 1 1 0 2 0 0 0
FMS-PT-50000-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-14: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-15: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
41 CTL EXCL 30/264 18/32 FMS-PT-50000-CTLFireability-12 3827454 m, 111948 m/sec, 6968532 t fired, .

Time elapsed: 191 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FMS-PT-50000-CTLFireability-05: AG false findpath
FMS-PT-50000-CTLFireability-07: AXAG false state space /EXEF

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FMS-PT-50000-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-12: DISJ 0 1 1 0 2 0 0 0
FMS-PT-50000-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-14: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-15: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
41 CTL EXCL 35/264 21/32 FMS-PT-50000-CTLFireability-12 4458423 m, 126193 m/sec, 8145940 t fired, .

Time elapsed: 196 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FMS-PT-50000-CTLFireability-05: AG false findpath
FMS-PT-50000-CTLFireability-07: AXAG false state space /EXEF

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FMS-PT-50000-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-12: DISJ 0 1 1 0 2 0 0 0
FMS-PT-50000-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-14: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-15: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
41 CTL EXCL 40/264 24/32 FMS-PT-50000-CTLFireability-12 5163031 m, 140921 m/sec, 9425955 t fired, .

Time elapsed: 201 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FMS-PT-50000-CTLFireability-05: AG false findpath
FMS-PT-50000-CTLFireability-07: AXAG false state space /EXEF

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FMS-PT-50000-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-12: DISJ 0 1 1 0 2 0 0 0
FMS-PT-50000-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-14: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-15: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
41 CTL EXCL 45/264 27/32 FMS-PT-50000-CTLFireability-12 5786393 m, 124672 m/sec, 10572665 t fired, .

Time elapsed: 206 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FMS-PT-50000-CTLFireability-05: AG false findpath
FMS-PT-50000-CTLFireability-07: AXAG false state space /EXEF

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FMS-PT-50000-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-12: DISJ 0 1 1 0 2 0 0 0
FMS-PT-50000-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-14: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-15: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
41 CTL EXCL 50/264 29/32 FMS-PT-50000-CTLFireability-12 6282598 m, 99241 m/sec, 11506333 t fired, .

Time elapsed: 211 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FMS-PT-50000-CTLFireability-05: AG false findpath
FMS-PT-50000-CTLFireability-07: AXAG false state space /EXEF

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FMS-PT-50000-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-12: DISJ 0 1 1 0 2 0 0 0
FMS-PT-50000-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-14: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-15: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
41 CTL EXCL 55/264 32/32 FMS-PT-50000-CTLFireability-12 6952728 m, 134026 m/sec, 12705313 t fired, .

Time elapsed: 216 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
lola: CANCELED task # 41 (type EXCL) for FMS-PT-50000-CTLFireability-12 (memory limit exceeded)
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FMS-PT-50000-CTLFireability-05: AG false findpath
FMS-PT-50000-CTLFireability-07: AXAG false state space /EXEF

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FMS-PT-50000-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-12: DISJ 0 1 0 0 2 0 1 0
FMS-PT-50000-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-14: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-15: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 221 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
lola: LAUNCH task # 31 (type EXCL) for 30 FMS-PT-50000-CTLFireability-10
lola: time limit : 281 sec
lola: memory limit: 32 pages
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FMS-PT-50000-CTLFireability-05: AG false findpath
FMS-PT-50000-CTLFireability-07: AXAG false state space /EXEF

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FMS-PT-50000-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-10: CTL 0 0 1 0 1 0 0 0
FMS-PT-50000-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-12: DISJ 0 1 0 0 2 0 1 0
FMS-PT-50000-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-14: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-15: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
31 CTL EXCL 5/281 3/32 FMS-PT-50000-CTLFireability-10 621800 m, 124360 m/sec, 1143584 t fired, .

Time elapsed: 226 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FMS-PT-50000-CTLFireability-05: AG false findpath
FMS-PT-50000-CTLFireability-07: AXAG false state space /EXEF

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FMS-PT-50000-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-10: CTL 0 0 1 0 1 0 0 0
FMS-PT-50000-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-12: DISJ 0 1 0 0 2 0 1 0
FMS-PT-50000-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-14: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-15: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
31 CTL EXCL 10/281 5/32 FMS-PT-50000-CTLFireability-10 1070660 m, 89772 m/sec, 1951622 t fired, .

Time elapsed: 231 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FMS-PT-50000-CTLFireability-05: AG false findpath
FMS-PT-50000-CTLFireability-07: AXAG false state space /EXEF

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FMS-PT-50000-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-10: CTL 0 0 1 0 1 0 0 0
FMS-PT-50000-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-12: DISJ 0 1 0 0 2 0 1 0
FMS-PT-50000-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-14: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-15: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
31 CTL EXCL 15/281 7/32 FMS-PT-50000-CTLFireability-10 1501092 m, 86086 m/sec, 2752152 t fired, .

Time elapsed: 236 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FMS-PT-50000-CTLFireability-05: AG false findpath
FMS-PT-50000-CTLFireability-07: AXAG false state space /EXEF

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FMS-PT-50000-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-10: CTL 0 0 1 0 1 0 0 0
FMS-PT-50000-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-12: DISJ 0 1 0 0 2 0 1 0
FMS-PT-50000-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-14: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-15: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
31 CTL EXCL 20/281 9/32 FMS-PT-50000-CTLFireability-10 1947627 m, 89307 m/sec, 3547608 t fired, .

Time elapsed: 241 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FMS-PT-50000-CTLFireability-05: AG false findpath
FMS-PT-50000-CTLFireability-07: AXAG false state space /EXEF

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FMS-PT-50000-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-10: CTL 0 0 1 0 1 0 0 0
FMS-PT-50000-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-12: DISJ 0 1 0 0 2 0 1 0
FMS-PT-50000-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-14: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-15: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
31 CTL EXCL 25/281 11/32 FMS-PT-50000-CTLFireability-10 2477707 m, 106016 m/sec, 4555363 t fired, .

Time elapsed: 246 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FMS-PT-50000-CTLFireability-05: AG false findpath
FMS-PT-50000-CTLFireability-07: AXAG false state space /EXEF

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FMS-PT-50000-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-10: CTL 0 0 1 0 1 0 0 0
FMS-PT-50000-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-12: DISJ 0 1 0 0 2 0 1 0
FMS-PT-50000-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-14: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-15: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
31 CTL EXCL 30/281 13/32 FMS-PT-50000-CTLFireability-10 2960456 m, 96549 m/sec, 5460424 t fired, .

Time elapsed: 251 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FMS-PT-50000-CTLFireability-05: AG false findpath
FMS-PT-50000-CTLFireability-07: AXAG false state space /EXEF

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FMS-PT-50000-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-10: CTL 0 0 1 0 1 0 0 0
FMS-PT-50000-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-12: DISJ 0 1 0 0 2 0 1 0
FMS-PT-50000-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-14: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-15: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
31 CTL EXCL 35/281 15/32 FMS-PT-50000-CTLFireability-10 3353941 m, 78697 m/sec, 6157812 t fired, .

Time elapsed: 256 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FMS-PT-50000-CTLFireability-05: AG false findpath
FMS-PT-50000-CTLFireability-07: AXAG false state space /EXEF

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FMS-PT-50000-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-10: CTL 0 0 1 0 1 0 0 0
FMS-PT-50000-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-12: DISJ 0 1 0 0 2 0 1 0
FMS-PT-50000-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-14: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-15: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
31 CTL EXCL 40/281 17/32 FMS-PT-50000-CTLFireability-10 3844225 m, 98056 m/sec, 7085464 t fired, .

Time elapsed: 261 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FMS-PT-50000-CTLFireability-05: AG false findpath
FMS-PT-50000-CTLFireability-07: AXAG false state space /EXEF

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FMS-PT-50000-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-10: CTL 0 0 1 0 1 0 0 0
FMS-PT-50000-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-12: DISJ 0 1 0 0 2 0 1 0
FMS-PT-50000-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-14: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-15: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
31 CTL EXCL 45/281 19/32 FMS-PT-50000-CTLFireability-10 4335433 m, 98241 m/sec, 7935390 t fired, .

Time elapsed: 266 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FMS-PT-50000-CTLFireability-05: AG false findpath
FMS-PT-50000-CTLFireability-07: AXAG false state space /EXEF

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FMS-PT-50000-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-10: CTL 0 0 1 0 1 0 0 0
FMS-PT-50000-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-12: DISJ 0 1 0 0 2 0 1 0
FMS-PT-50000-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-14: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-15: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
31 CTL EXCL 50/281 21/32 FMS-PT-50000-CTLFireability-10 4835996 m, 100112 m/sec, 8871892 t fired, .

Time elapsed: 271 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FMS-PT-50000-CTLFireability-05: AG false findpath
FMS-PT-50000-CTLFireability-07: AXAG false state space /EXEF

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FMS-PT-50000-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-10: CTL 0 0 1 0 1 0 0 0
FMS-PT-50000-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-12: DISJ 0 1 0 0 2 0 1 0
FMS-PT-50000-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-14: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-15: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
31 CTL EXCL 55/281 23/32 FMS-PT-50000-CTLFireability-10 5431851 m, 119171 m/sec, 9963592 t fired, .

Time elapsed: 276 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FMS-PT-50000-CTLFireability-05: AG false findpath
FMS-PT-50000-CTLFireability-07: AXAG false state space /EXEF

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FMS-PT-50000-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-10: CTL 0 0 1 0 1 0 0 0
FMS-PT-50000-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-12: DISJ 0 1 0 0 2 0 1 0
FMS-PT-50000-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-14: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-15: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
31 CTL EXCL 60/281 25/32 FMS-PT-50000-CTLFireability-10 5933461 m, 100322 m/sec, 10908503 t fired, .

Time elapsed: 281 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FMS-PT-50000-CTLFireability-05: AG false findpath
FMS-PT-50000-CTLFireability-07: AXAG false state space /EXEF

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FMS-PT-50000-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-10: CTL 0 0 1 0 1 0 0 0
FMS-PT-50000-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-12: DISJ 0 1 0 0 2 0 1 0
FMS-PT-50000-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-14: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-15: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
31 CTL EXCL 65/281 28/32 FMS-PT-50000-CTLFireability-10 6517616 m, 116831 m/sec, 11968875 t fired, .

Time elapsed: 286 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FMS-PT-50000-CTLFireability-05: AG false findpath
FMS-PT-50000-CTLFireability-07: AXAG false state space /EXEF

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FMS-PT-50000-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-10: CTL 0 0 1 0 1 0 0 0
FMS-PT-50000-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-12: DISJ 0 1 0 0 2 0 1 0
FMS-PT-50000-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-14: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-15: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
31 CTL EXCL 70/281 30/32 FMS-PT-50000-CTLFireability-10 7122582 m, 120993 m/sec, 13081277 t fired, .

Time elapsed: 291 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
lola: CANCELED task # 31 (type EXCL) for FMS-PT-50000-CTLFireability-10 (memory limit exceeded)
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FMS-PT-50000-CTLFireability-05: AG false findpath
FMS-PT-50000-CTLFireability-07: AXAG false state space /EXEF

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FMS-PT-50000-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-12: DISJ 0 1 0 0 2 0 1 0
FMS-PT-50000-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-14: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-15: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 296 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
lola: LAUNCH task # 28 (type EXCL) for 27 FMS-PT-50000-CTLFireability-09
lola: time limit : 300 sec
lola: memory limit: 32 pages
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FMS-PT-50000-CTLFireability-05: AG false findpath
FMS-PT-50000-CTLFireability-07: AXAG false state space /EXEF

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FMS-PT-50000-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-09: CTL 0 0 1 0 1 0 0 0
FMS-PT-50000-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-12: DISJ 0 1 0 0 2 0 1 0
FMS-PT-50000-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-14: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-15: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
28 CTL EXCL 5/300 2/32 FMS-PT-50000-CTLFireability-09 450778 m, 90155 m/sec, 1252710 t fired, .

Time elapsed: 301 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FMS-PT-50000-CTLFireability-05: AG false findpath
FMS-PT-50000-CTLFireability-07: AXAG false state space /EXEF

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FMS-PT-50000-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-09: CTL 0 0 1 0 1 0 0 0
FMS-PT-50000-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-12: DISJ 0 1 0 0 2 0 1 0
FMS-PT-50000-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-14: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-15: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
28 CTL EXCL 10/300 4/32 FMS-PT-50000-CTLFireability-09 790139 m, 67872 m/sec, 2240462 t fired, .

Time elapsed: 306 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FMS-PT-50000-CTLFireability-05: AG false findpath
FMS-PT-50000-CTLFireability-07: AXAG false state space /EXEF

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FMS-PT-50000-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-09: CTL 0 0 1 0 1 0 0 0
FMS-PT-50000-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-12: DISJ 0 1 0 0 2 0 1 0
FMS-PT-50000-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-14: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-15: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
28 CTL EXCL 15/300 5/32 FMS-PT-50000-CTLFireability-09 1072716 m, 56515 m/sec, 3029474 t fired, .

Time elapsed: 311 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FMS-PT-50000-CTLFireability-05: AG false findpath
FMS-PT-50000-CTLFireability-07: AXAG false state space /EXEF

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FMS-PT-50000-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-09: CTL 0 0 1 0 1 0 0 0
FMS-PT-50000-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-12: DISJ 0 1 0 0 2 0 1 0
FMS-PT-50000-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-14: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-15: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
28 CTL EXCL 20/300 7/32 FMS-PT-50000-CTLFireability-09 1498668 m, 85190 m/sec, 4247316 t fired, .

Time elapsed: 316 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FMS-PT-50000-CTLFireability-05: AG false findpath
FMS-PT-50000-CTLFireability-07: AXAG false state space /EXEF

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FMS-PT-50000-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-09: CTL 0 0 1 0 1 0 0 0
FMS-PT-50000-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-12: DISJ 0 1 0 0 2 0 1 0
FMS-PT-50000-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-14: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-15: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
28 CTL EXCL 25/300 8/32 FMS-PT-50000-CTLFireability-09 1775613 m, 55389 m/sec, 5051203 t fired, .

Time elapsed: 321 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FMS-PT-50000-CTLFireability-05: AG false findpath
FMS-PT-50000-CTLFireability-07: AXAG false state space /EXEF

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FMS-PT-50000-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-09: CTL 0 0 1 0 1 0 0 0
FMS-PT-50000-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-12: DISJ 0 1 0 0 2 0 1 0
FMS-PT-50000-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-14: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-15: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
28 CTL EXCL 30/300 9/32 FMS-PT-50000-CTLFireability-09 2097000 m, 64277 m/sec, 5943975 t fired, .

Time elapsed: 326 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FMS-PT-50000-CTLFireability-05: AG false findpath
FMS-PT-50000-CTLFireability-07: AXAG false state space /EXEF

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FMS-PT-50000-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-09: CTL 0 0 1 0 1 0 0 0
FMS-PT-50000-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-12: DISJ 0 1 0 0 2 0 1 0
FMS-PT-50000-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-14: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-15: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
28 CTL EXCL 35/300 11/32 FMS-PT-50000-CTLFireability-09 2414858 m, 63571 m/sec, 6844521 t fired, .

Time elapsed: 331 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FMS-PT-50000-CTLFireability-05: AG false findpath
FMS-PT-50000-CTLFireability-07: AXAG false state space /EXEF

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FMS-PT-50000-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-09: CTL 0 0 1 0 1 0 0 0
FMS-PT-50000-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-12: DISJ 0 1 0 0 2 0 1 0
FMS-PT-50000-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-14: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-15: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
28 CTL EXCL 40/300 12/32 FMS-PT-50000-CTLFireability-09 2756534 m, 68335 m/sec, 7819544 t fired, .

Time elapsed: 336 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FMS-PT-50000-CTLFireability-05: AG false findpath
FMS-PT-50000-CTLFireability-07: AXAG false state space /EXEF

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FMS-PT-50000-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-09: CTL 0 0 1 0 1 0 0 0
FMS-PT-50000-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-12: DISJ 0 1 0 0 2 0 1 0
FMS-PT-50000-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-14: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-15: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
28 CTL EXCL 45/300 13/32 FMS-PT-50000-CTLFireability-09 3065570 m, 61807 m/sec, 8696648 t fired, .

Time elapsed: 341 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FMS-PT-50000-CTLFireability-05: AG false findpath
FMS-PT-50000-CTLFireability-07: AXAG false state space /EXEF

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FMS-PT-50000-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-09: CTL 0 0 1 0 1 0 0 0
FMS-PT-50000-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-12: DISJ 0 1 0 0 2 0 1 0
FMS-PT-50000-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-14: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-15: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
28 CTL EXCL 50/300 15/32 FMS-PT-50000-CTLFireability-09 3387532 m, 64392 m/sec, 9612525 t fired, .

Time elapsed: 346 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FMS-PT-50000-CTLFireability-05: AG false findpath
FMS-PT-50000-CTLFireability-07: AXAG false state space /EXEF

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FMS-PT-50000-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-09: CTL 0 0 1 0 1 0 0 0
FMS-PT-50000-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-12: DISJ 0 1 0 0 2 0 1 0
FMS-PT-50000-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-14: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-15: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
28 CTL EXCL 55/300 16/32 FMS-PT-50000-CTLFireability-09 3679456 m, 58384 m/sec, 10438294 t fired, .

Time elapsed: 351 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FMS-PT-50000-CTLFireability-05: AG false findpath
FMS-PT-50000-CTLFireability-07: AXAG false state space /EXEF

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FMS-PT-50000-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-09: CTL 0 0 1 0 1 0 0 0
FMS-PT-50000-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-12: DISJ 0 1 0 0 2 0 1 0
FMS-PT-50000-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-14: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-15: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
28 CTL EXCL 60/300 17/32 FMS-PT-50000-CTLFireability-09 3984732 m, 61055 m/sec, 11304115 t fired, .

Time elapsed: 356 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FMS-PT-50000-CTLFireability-05: AG false findpath
FMS-PT-50000-CTLFireability-07: AXAG false state space /EXEF

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FMS-PT-50000-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-09: CTL 0 0 1 0 1 0 0 0
FMS-PT-50000-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-12: DISJ 0 1 0 0 2 0 1 0
FMS-PT-50000-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-14: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-15: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
28 CTL EXCL 65/300 19/32 FMS-PT-50000-CTLFireability-09 4317259 m, 66505 m/sec, 12234471 t fired, .

Time elapsed: 361 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FMS-PT-50000-CTLFireability-05: AG false findpath
FMS-PT-50000-CTLFireability-07: AXAG false state space /EXEF

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FMS-PT-50000-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-09: CTL 0 0 1 0 1 0 0 0
FMS-PT-50000-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-12: DISJ 0 1 0 0 2 0 1 0
FMS-PT-50000-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-14: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-15: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
28 CTL EXCL 70/300 20/32 FMS-PT-50000-CTLFireability-09 4627828 m, 62113 m/sec, 13105606 t fired, .

Time elapsed: 366 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FMS-PT-50000-CTLFireability-05: AG false findpath
FMS-PT-50000-CTLFireability-07: AXAG false state space /EXEF

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FMS-PT-50000-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-09: CTL 0 0 1 0 1 0 0 0
FMS-PT-50000-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-12: DISJ 0 1 0 0 2 0 1 0
FMS-PT-50000-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-14: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-15: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
28 CTL EXCL 75/300 21/32 FMS-PT-50000-CTLFireability-09 4965861 m, 67606 m/sec, 14055386 t fired, .

Time elapsed: 371 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FMS-PT-50000-CTLFireability-05: AG false findpath
FMS-PT-50000-CTLFireability-07: AXAG false state space /EXEF

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FMS-PT-50000-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-09: CTL 0 0 1 0 1 0 0 0
FMS-PT-50000-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-12: DISJ 0 1 0 0 2 0 1 0
FMS-PT-50000-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-14: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-15: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
28 CTL EXCL 80/300 23/32 FMS-PT-50000-CTLFireability-09 5312630 m, 69353 m/sec, 15069071 t fired, .

Time elapsed: 376 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FMS-PT-50000-CTLFireability-05: AG false findpath
FMS-PT-50000-CTLFireability-07: AXAG false state space /EXEF

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FMS-PT-50000-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-09: CTL 0 0 1 0 1 0 0 0
FMS-PT-50000-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-12: DISJ 0 1 0 0 2 0 1 0
FMS-PT-50000-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-14: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-15: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
28 CTL EXCL 85/300 24/32 FMS-PT-50000-CTLFireability-09 5621550 m, 61784 m/sec, 15950283 t fired, .

Time elapsed: 381 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FMS-PT-50000-CTLFireability-05: AG false findpath
FMS-PT-50000-CTLFireability-07: AXAG false state space /EXEF

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FMS-PT-50000-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-09: CTL 0 0 1 0 1 0 0 0
FMS-PT-50000-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-12: DISJ 0 1 0 0 2 0 1 0
FMS-PT-50000-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-14: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-15: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
28 CTL EXCL 90/300 25/32 FMS-PT-50000-CTLFireability-09 5905461 m, 56782 m/sec, 16743965 t fired, .

Time elapsed: 386 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FMS-PT-50000-CTLFireability-05: AG false findpath
FMS-PT-50000-CTLFireability-07: AXAG false state space /EXEF

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FMS-PT-50000-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-09: CTL 0 0 1 0 1 0 0 0
FMS-PT-50000-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-12: DISJ 0 1 0 0 2 0 1 0
FMS-PT-50000-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-14: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-15: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
28 CTL EXCL 95/300 27/32 FMS-PT-50000-CTLFireability-09 6222204 m, 63348 m/sec, 17652557 t fired, .

Time elapsed: 391 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FMS-PT-50000-CTLFireability-05: AG false findpath
FMS-PT-50000-CTLFireability-07: AXAG false state space /EXEF

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FMS-PT-50000-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-09: CTL 0 0 1 0 1 0 0 0
FMS-PT-50000-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-12: DISJ 0 1 0 0 2 0 1 0
FMS-PT-50000-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-14: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-15: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
28 CTL EXCL 100/300 28/32 FMS-PT-50000-CTLFireability-09 6550723 m, 65703 m/sec, 18601375 t fired, .

Time elapsed: 396 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FMS-PT-50000-CTLFireability-05: AG false findpath
FMS-PT-50000-CTLFireability-07: AXAG false state space /EXEF

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FMS-PT-50000-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-09: CTL 0 0 1 0 1 0 0 0
FMS-PT-50000-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-12: DISJ 0 1 0 0 2 0 1 0
FMS-PT-50000-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-14: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-15: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
28 CTL EXCL 105/300 30/32 FMS-PT-50000-CTLFireability-09 6956551 m, 81165 m/sec, 19719510 t fired, .

Time elapsed: 401 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FMS-PT-50000-CTLFireability-05: AG false findpath
FMS-PT-50000-CTLFireability-07: AXAG false state space /EXEF

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FMS-PT-50000-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-09: CTL 0 0 1 0 1 0 0 0
FMS-PT-50000-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-12: DISJ 0 1 0 0 2 0 1 0
FMS-PT-50000-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-14: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-15: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
28 CTL EXCL 110/300 31/32 FMS-PT-50000-CTLFireability-09 7329600 m, 74609 m/sec, 20759124 t fired, .

Time elapsed: 406 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FMS-PT-50000-CTLFireability-05: AG false findpath
FMS-PT-50000-CTLFireability-07: AXAG false state space /EXEF

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FMS-PT-50000-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-09: CTL 0 0 1 0 1 0 0 0
FMS-PT-50000-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-12: DISJ 0 1 0 0 2 0 1 0
FMS-PT-50000-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-14: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-15: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
28 CTL EXCL 115/300 32/32 FMS-PT-50000-CTLFireability-09 7600442 m, 54168 m/sec, 21550804 t fired, .

Time elapsed: 411 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
lola: CANCELED task # 28 (type EXCL) for FMS-PT-50000-CTLFireability-09 (memory limit exceeded)
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FMS-PT-50000-CTLFireability-05: AG false findpath
FMS-PT-50000-CTLFireability-07: AXAG false state space /EXEF

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FMS-PT-50000-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-09: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-12: DISJ 0 1 0 0 2 0 1 0
FMS-PT-50000-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-14: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-15: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 416 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
lola: LAUNCH task # 25 (type EXCL) for 24 FMS-PT-50000-CTLFireability-08
lola: time limit : 318 sec
lola: memory limit: 32 pages
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FMS-PT-50000-CTLFireability-05: AG false findpath
FMS-PT-50000-CTLFireability-07: AXAG false state space /EXEF

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FMS-PT-50000-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-08: CTL 0 0 1 0 1 0 0 0
FMS-PT-50000-CTLFireability-09: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-12: DISJ 0 1 0 0 2 0 1 0
FMS-PT-50000-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-14: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-15: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
25 CTL EXCL 5/318 3/32 FMS-PT-50000-CTLFireability-08 548698 m, 109739 m/sec, 1198706 t fired, .

Time elapsed: 421 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
lola: FINISHED task # 25 (type EXCL) for FMS-PT-50000-CTLFireability-08
lola: result : true
lola: markings : 699997
lola: fired transitions : 1400005
lola: time used : 6.000000
lola: memory pages used : 4
lola: LAUNCH task # 10 (type EXCL) for 9 FMS-PT-50000-CTLFireability-03
lola: time limit : 353 sec
lola: memory limit: 32 pages
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FMS-PT-50000-CTLFireability-05: AG false findpath
FMS-PT-50000-CTLFireability-07: AXAG false state space /EXEF
FMS-PT-50000-CTLFireability-08: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FMS-PT-50000-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-03: CTL 0 0 1 0 1 0 0 0
FMS-PT-50000-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-09: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-12: DISJ 0 1 0 0 2 0 1 0
FMS-PT-50000-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-14: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-15: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
10 CTL EXCL 4/353 3/32 FMS-PT-50000-CTLFireability-03 476070 m, 95214 m/sec, 1065176 t fired, .

Time elapsed: 426 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FMS-PT-50000-CTLFireability-05: AG false findpath
FMS-PT-50000-CTLFireability-07: AXAG false state space /EXEF
FMS-PT-50000-CTLFireability-08: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FMS-PT-50000-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-03: CTL 0 0 1 0 1 0 0 0
FMS-PT-50000-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-09: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-12: DISJ 0 1 0 0 2 0 1 0
FMS-PT-50000-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-14: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-15: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
10 CTL EXCL 9/353 5/32 FMS-PT-50000-CTLFireability-03 1028443 m, 110474 m/sec, 2372210 t fired, .

Time elapsed: 431 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FMS-PT-50000-CTLFireability-05: AG false findpath
FMS-PT-50000-CTLFireability-07: AXAG false state space /EXEF
FMS-PT-50000-CTLFireability-08: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FMS-PT-50000-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-03: CTL 0 0 1 0 1 0 0 0
FMS-PT-50000-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-09: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-12: DISJ 0 1 0 0 2 0 1 0
FMS-PT-50000-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-14: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-15: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
10 CTL EXCL 14/353 8/32 FMS-PT-50000-CTLFireability-03 1634067 m, 121124 m/sec, 3893178 t fired, .

Time elapsed: 436 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FMS-PT-50000-CTLFireability-05: AG false findpath
FMS-PT-50000-CTLFireability-07: AXAG false state space /EXEF
FMS-PT-50000-CTLFireability-08: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FMS-PT-50000-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-03: CTL 0 0 1 0 1 0 0 0
FMS-PT-50000-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-09: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-12: DISJ 0 1 0 0 2 0 1 0
FMS-PT-50000-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-14: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-15: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
10 CTL EXCL 19/353 10/32 FMS-PT-50000-CTLFireability-03 2054812 m, 84149 m/sec, 4822964 t fired, .

Time elapsed: 441 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FMS-PT-50000-CTLFireability-05: AG false findpath
FMS-PT-50000-CTLFireability-07: AXAG false state space /EXEF
FMS-PT-50000-CTLFireability-08: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FMS-PT-50000-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-03: CTL 0 0 1 0 1 0 0 0
FMS-PT-50000-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-09: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-12: DISJ 0 1 0 0 2 0 1 0
FMS-PT-50000-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-14: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-15: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
10 CTL EXCL 24/353 13/32 FMS-PT-50000-CTLFireability-03 2672516 m, 123540 m/sec, 6367522 t fired, .

Time elapsed: 446 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FMS-PT-50000-CTLFireability-05: AG false findpath
FMS-PT-50000-CTLFireability-07: AXAG false state space /EXEF
FMS-PT-50000-CTLFireability-08: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FMS-PT-50000-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-03: CTL 0 0 1 0 1 0 0 0
FMS-PT-50000-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-09: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-12: DISJ 0 1 0 0 2 0 1 0
FMS-PT-50000-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-14: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-15: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
10 CTL EXCL 29/353 15/32 FMS-PT-50000-CTLFireability-03 3231880 m, 111872 m/sec, 7777107 t fired, .

Time elapsed: 451 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FMS-PT-50000-CTLFireability-05: AG false findpath
FMS-PT-50000-CTLFireability-07: AXAG false state space /EXEF
FMS-PT-50000-CTLFireability-08: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FMS-PT-50000-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-03: CTL 0 0 1 0 1 0 0 0
FMS-PT-50000-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-09: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-12: DISJ 0 1 0 0 2 0 1 0
FMS-PT-50000-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-14: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-15: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
10 CTL EXCL 34/353 17/32 FMS-PT-50000-CTLFireability-03 3634434 m, 80510 m/sec, 8754616 t fired, .

Time elapsed: 456 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FMS-PT-50000-CTLFireability-05: AG false findpath
FMS-PT-50000-CTLFireability-07: AXAG false state space /EXEF
FMS-PT-50000-CTLFireability-08: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FMS-PT-50000-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-03: CTL 0 0 1 0 1 0 0 0
FMS-PT-50000-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-09: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-12: DISJ 0 1 0 0 2 0 1 0
FMS-PT-50000-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-14: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-15: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
10 CTL EXCL 39/353 19/32 FMS-PT-50000-CTLFireability-03 4132463 m, 99605 m/sec, 9981110 t fired, .

Time elapsed: 461 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FMS-PT-50000-CTLFireability-05: AG false findpath
FMS-PT-50000-CTLFireability-07: AXAG false state space /EXEF
FMS-PT-50000-CTLFireability-08: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FMS-PT-50000-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-03: CTL 0 0 1 0 1 0 0 0
FMS-PT-50000-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-09: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-12: DISJ 0 1 0 0 2 0 1 0
FMS-PT-50000-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-14: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-15: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
10 CTL EXCL 44/353 21/32 FMS-PT-50000-CTLFireability-03 4645753 m, 102658 m/sec, 11268090 t fired, .

Time elapsed: 466 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FMS-PT-50000-CTLFireability-05: AG false findpath
FMS-PT-50000-CTLFireability-07: AXAG false state space /EXEF
FMS-PT-50000-CTLFireability-08: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FMS-PT-50000-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-03: CTL 0 0 1 0 1 0 0 0
FMS-PT-50000-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-09: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-12: DISJ 0 1 0 0 2 0 1 0
FMS-PT-50000-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-14: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-15: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
10 CTL EXCL 49/353 23/32 FMS-PT-50000-CTLFireability-03 5102071 m, 91263 m/sec, 12459566 t fired, .

Time elapsed: 471 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FMS-PT-50000-CTLFireability-05: AG false findpath
FMS-PT-50000-CTLFireability-07: AXAG false state space /EXEF
FMS-PT-50000-CTLFireability-08: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FMS-PT-50000-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-03: CTL 0 0 1 0 1 0 0 0
FMS-PT-50000-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-09: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-12: DISJ 0 1 0 0 2 0 1 0
FMS-PT-50000-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-14: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-15: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
10 CTL EXCL 54/353 25/32 FMS-PT-50000-CTLFireability-03 5561683 m, 91922 m/sec, 13697751 t fired, .

Time elapsed: 476 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FMS-PT-50000-CTLFireability-05: AG false findpath
FMS-PT-50000-CTLFireability-07: AXAG false state space /EXEF
FMS-PT-50000-CTLFireability-08: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FMS-PT-50000-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-03: CTL 0 0 1 0 1 0 0 0
FMS-PT-50000-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-09: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-12: DISJ 0 1 0 0 2 0 1 0
FMS-PT-50000-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-14: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-15: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
10 CTL EXCL 59/353 26/32 FMS-PT-50000-CTLFireability-03 5973237 m, 82310 m/sec, 14731951 t fired, .

Time elapsed: 481 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FMS-PT-50000-CTLFireability-05: AG false findpath
FMS-PT-50000-CTLFireability-07: AXAG false state space /EXEF
FMS-PT-50000-CTLFireability-08: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FMS-PT-50000-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-03: CTL 0 0 1 0 1 0 0 0
FMS-PT-50000-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-09: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-12: DISJ 0 1 0 0 2 0 1 0
FMS-PT-50000-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-14: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-15: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
10 CTL EXCL 64/353 28/32 FMS-PT-50000-CTLFireability-03 6349462 m, 75245 m/sec, 15666446 t fired, .

Time elapsed: 486 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FMS-PT-50000-CTLFireability-05: AG false findpath
FMS-PT-50000-CTLFireability-07: AXAG false state space /EXEF
FMS-PT-50000-CTLFireability-08: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FMS-PT-50000-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-03: CTL 0 0 1 0 1 0 0 0
FMS-PT-50000-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-09: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-12: DISJ 0 1 0 0 2 0 1 0
FMS-PT-50000-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-14: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-15: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
10 CTL EXCL 69/353 30/32 FMS-PT-50000-CTLFireability-03 6728955 m, 75898 m/sec, 16583079 t fired, .

Time elapsed: 491 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FMS-PT-50000-CTLFireability-05: AG false findpath
FMS-PT-50000-CTLFireability-07: AXAG false state space /EXEF
FMS-PT-50000-CTLFireability-08: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FMS-PT-50000-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-03: CTL 0 0 1 0 1 0 0 0
FMS-PT-50000-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-09: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-12: DISJ 0 1 0 0 2 0 1 0
FMS-PT-50000-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-14: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-15: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
10 CTL EXCL 74/353 31/32 FMS-PT-50000-CTLFireability-03 7130761 m, 80361 m/sec, 17577134 t fired, .

Time elapsed: 496 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
lola: CANCELED task # 10 (type EXCL) for FMS-PT-50000-CTLFireability-03 (memory limit exceeded)
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FMS-PT-50000-CTLFireability-05: AG false findpath
FMS-PT-50000-CTLFireability-07: AXAG false state space /EXEF
FMS-PT-50000-CTLFireability-08: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FMS-PT-50000-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-03: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-09: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-12: DISJ 0 1 0 0 2 0 1 0
FMS-PT-50000-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-14: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-15: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 501 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
lola: LAUNCH task # 7 (type EXCL) for 6 FMS-PT-50000-CTLFireability-02
lola: time limit : 387 sec
lola: memory limit: 32 pages
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FMS-PT-50000-CTLFireability-05: AG false findpath
FMS-PT-50000-CTLFireability-07: AXAG false state space /EXEF
FMS-PT-50000-CTLFireability-08: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FMS-PT-50000-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-02: CTL 0 0 1 0 1 0 0 0
FMS-PT-50000-CTLFireability-03: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-09: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-12: DISJ 0 1 0 0 2 0 1 0
FMS-PT-50000-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-14: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-15: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
7 CTL EXCL 5/387 3/32 FMS-PT-50000-CTLFireability-02 516250 m, 103250 m/sec, 965611 t fired, .

Time elapsed: 506 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FMS-PT-50000-CTLFireability-05: AG false findpath
FMS-PT-50000-CTLFireability-07: AXAG false state space /EXEF
FMS-PT-50000-CTLFireability-08: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FMS-PT-50000-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-02: CTL 0 0 1 0 1 0 0 0
FMS-PT-50000-CTLFireability-03: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-09: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-12: DISJ 0 1 0 0 2 0 1 0
FMS-PT-50000-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-14: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-15: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
7 CTL EXCL 10/387 5/32 FMS-PT-50000-CTLFireability-02 1090729 m, 114895 m/sec, 2001793 t fired, .

Time elapsed: 511 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FMS-PT-50000-CTLFireability-05: AG false findpath
FMS-PT-50000-CTLFireability-07: AXAG false state space /EXEF
FMS-PT-50000-CTLFireability-08: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FMS-PT-50000-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-02: CTL 0 0 1 0 1 0 0 0
FMS-PT-50000-CTLFireability-03: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-09: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-12: DISJ 0 1 0 0 2 0 1 0
FMS-PT-50000-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-14: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-15: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
7 CTL EXCL 15/387 8/32 FMS-PT-50000-CTLFireability-02 1684762 m, 118806 m/sec, 3086861 t fired, .

Time elapsed: 516 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FMS-PT-50000-CTLFireability-05: AG false findpath
FMS-PT-50000-CTLFireability-07: AXAG false state space /EXEF
FMS-PT-50000-CTLFireability-08: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FMS-PT-50000-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-02: CTL 0 0 1 0 1 0 0 0
FMS-PT-50000-CTLFireability-03: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-09: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-12: DISJ 0 1 0 0 2 0 1 0
FMS-PT-50000-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-14: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-15: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
7 CTL EXCL 20/387 10/32 FMS-PT-50000-CTLFireability-02 2283142 m, 119676 m/sec, 4182798 t fired, .

Time elapsed: 521 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FMS-PT-50000-CTLFireability-05: AG false findpath
FMS-PT-50000-CTLFireability-07: AXAG false state space /EXEF
FMS-PT-50000-CTLFireability-08: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FMS-PT-50000-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-02: CTL 0 0 1 0 1 0 0 0
FMS-PT-50000-CTLFireability-03: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-09: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-12: DISJ 0 1 0 0 2 0 1 0
FMS-PT-50000-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-14: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-15: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
7 CTL EXCL 25/387 13/32 FMS-PT-50000-CTLFireability-02 3027338 m, 148839 m/sec, 5554614 t fired, .

Time elapsed: 526 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FMS-PT-50000-CTLFireability-05: AG false findpath
FMS-PT-50000-CTLFireability-07: AXAG false state space /EXEF
FMS-PT-50000-CTLFireability-08: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FMS-PT-50000-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-02: CTL 0 0 1 0 1 0 0 0
FMS-PT-50000-CTLFireability-03: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-09: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-12: DISJ 0 1 0 0 2 0 1 0
FMS-PT-50000-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-14: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-15: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
7 CTL EXCL 30/387 16/32 FMS-PT-50000-CTLFireability-02 3620119 m, 118556 m/sec, 6640165 t fired, .

Time elapsed: 531 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FMS-PT-50000-CTLFireability-05: AG false findpath
FMS-PT-50000-CTLFireability-07: AXAG false state space /EXEF
FMS-PT-50000-CTLFireability-08: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FMS-PT-50000-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-02: CTL 0 0 1 0 1 0 0 0
FMS-PT-50000-CTLFireability-03: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-09: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-12: DISJ 0 1 0 0 2 0 1 0
FMS-PT-50000-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-14: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-15: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
7 CTL EXCL 35/387 18/32 FMS-PT-50000-CTLFireability-02 4096256 m, 95227 m/sec, 7515536 t fired, .

Time elapsed: 536 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FMS-PT-50000-CTLFireability-05: AG false findpath
FMS-PT-50000-CTLFireability-07: AXAG false state space /EXEF
FMS-PT-50000-CTLFireability-08: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FMS-PT-50000-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-02: CTL 0 0 1 0 1 0 0 0
FMS-PT-50000-CTLFireability-03: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-09: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-12: DISJ 0 1 0 0 2 0 1 0
FMS-PT-50000-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-14: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-15: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
7 CTL EXCL 40/387 20/32 FMS-PT-50000-CTLFireability-02 4723002 m, 125349 m/sec, 8682385 t fired, .

Time elapsed: 541 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FMS-PT-50000-CTLFireability-05: AG false findpath
FMS-PT-50000-CTLFireability-07: AXAG false state space /EXEF
FMS-PT-50000-CTLFireability-08: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FMS-PT-50000-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-02: CTL 0 0 1 0 1 0 0 0
FMS-PT-50000-CTLFireability-03: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-09: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-12: DISJ 0 1 0 0 2 0 1 0
FMS-PT-50000-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-14: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-15: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
7 CTL EXCL 45/387 23/32 FMS-PT-50000-CTLFireability-02 5265879 m, 108575 m/sec, 9639565 t fired, .

Time elapsed: 546 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FMS-PT-50000-CTLFireability-05: AG false findpath
FMS-PT-50000-CTLFireability-07: AXAG false state space /EXEF
FMS-PT-50000-CTLFireability-08: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FMS-PT-50000-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-02: CTL 0 0 1 0 1 0 0 0
FMS-PT-50000-CTLFireability-03: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-09: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-12: DISJ 0 1 0 0 2 0 1 0
FMS-PT-50000-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-14: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-15: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
7 CTL EXCL 50/387 25/32 FMS-PT-50000-CTLFireability-02 5879881 m, 122800 m/sec, 10774553 t fired, .

Time elapsed: 551 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FMS-PT-50000-CTLFireability-05: AG false findpath
FMS-PT-50000-CTLFireability-07: AXAG false state space /EXEF
FMS-PT-50000-CTLFireability-08: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FMS-PT-50000-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-02: CTL 0 0 1 0 1 0 0 0
FMS-PT-50000-CTLFireability-03: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-09: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-12: DISJ 0 1 0 0 2 0 1 0
FMS-PT-50000-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-14: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-15: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
7 CTL EXCL 55/387 28/32 FMS-PT-50000-CTLFireability-02 6530386 m, 130101 m/sec, 12000801 t fired, .

Time elapsed: 556 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FMS-PT-50000-CTLFireability-05: AG false findpath
FMS-PT-50000-CTLFireability-07: AXAG false state space /EXEF
FMS-PT-50000-CTLFireability-08: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FMS-PT-50000-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-02: CTL 0 0 1 0 1 0 0 0
FMS-PT-50000-CTLFireability-03: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-09: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-12: DISJ 0 1 0 0 2 0 1 0
FMS-PT-50000-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-14: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-15: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
7 CTL EXCL 60/387 31/32 FMS-PT-50000-CTLFireability-02 7139644 m, 121851 m/sec, 13123931 t fired, .

Time elapsed: 561 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
lola: CANCELED task # 7 (type EXCL) for FMS-PT-50000-CTLFireability-02 (memory limit exceeded)
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FMS-PT-50000-CTLFireability-05: AG false findpath
FMS-PT-50000-CTLFireability-07: AXAG false state space /EXEF
FMS-PT-50000-CTLFireability-08: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FMS-PT-50000-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-03: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-09: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-12: DISJ 0 1 0 0 2 0 1 0
FMS-PT-50000-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-14: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-15: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 566 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
lola: LAUNCH task # 4 (type EXCL) for 3 FMS-PT-50000-CTLFireability-01
lola: time limit : 433 sec
lola: memory limit: 32 pages
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FMS-PT-50000-CTLFireability-05: AG false findpath
FMS-PT-50000-CTLFireability-07: AXAG false state space /EXEF
FMS-PT-50000-CTLFireability-08: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FMS-PT-50000-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-01: CTL 0 0 1 0 1 0 0 0
FMS-PT-50000-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-03: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-09: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-12: DISJ 0 1 0 0 2 0 1 0
FMS-PT-50000-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-14: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-15: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
4 CTL EXCL 5/433 3/32 FMS-PT-50000-CTLFireability-01 476060 m, 95212 m/sec, 1541207 t fired, .

Time elapsed: 571 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FMS-PT-50000-CTLFireability-05: AG false findpath
FMS-PT-50000-CTLFireability-07: AXAG false state space /EXEF
FMS-PT-50000-CTLFireability-08: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FMS-PT-50000-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-01: CTL 0 0 1 0 1 0 0 0
FMS-PT-50000-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-03: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-09: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-12: DISJ 0 1 0 0 2 0 1 0
FMS-PT-50000-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-14: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-15: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
4 CTL EXCL 10/433 5/32 FMS-PT-50000-CTLFireability-01 954495 m, 95687 m/sec, 3113490 t fired, .

Time elapsed: 576 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FMS-PT-50000-CTLFireability-05: AG false findpath
FMS-PT-50000-CTLFireability-07: AXAG false state space /EXEF
FMS-PT-50000-CTLFireability-08: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FMS-PT-50000-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-01: CTL 0 0 1 0 1 0 0 0
FMS-PT-50000-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-03: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-09: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-12: DISJ 0 1 0 0 2 0 1 0
FMS-PT-50000-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-14: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-15: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
4 CTL EXCL 15/433 7/32 FMS-PT-50000-CTLFireability-01 1341822 m, 77465 m/sec, 4371374 t fired, .

Time elapsed: 581 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FMS-PT-50000-CTLFireability-05: AG false findpath
FMS-PT-50000-CTLFireability-07: AXAG false state space /EXEF
FMS-PT-50000-CTLFireability-08: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FMS-PT-50000-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-01: CTL 0 0 1 0 1 0 0 0
FMS-PT-50000-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-03: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-09: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-12: DISJ 0 1 0 0 2 0 1 0
FMS-PT-50000-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-14: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-15: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
4 CTL EXCL 20/433 9/32 FMS-PT-50000-CTLFireability-01 1773702 m, 86376 m/sec, 5771114 t fired, .

Time elapsed: 586 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FMS-PT-50000-CTLFireability-05: AG false findpath
FMS-PT-50000-CTLFireability-07: AXAG false state space /EXEF
FMS-PT-50000-CTLFireability-08: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FMS-PT-50000-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-01: CTL 0 0 1 0 1 0 0 0
FMS-PT-50000-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-03: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-09: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-12: DISJ 0 1 0 0 2 0 1 0
FMS-PT-50000-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-14: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-15: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
4 CTL EXCL 25/433 11/32 FMS-PT-50000-CTLFireability-01 2117922 m, 68844 m/sec, 6887722 t fired, .

Time elapsed: 591 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FMS-PT-50000-CTLFireability-05: AG false findpath
FMS-PT-50000-CTLFireability-07: AXAG false state space /EXEF
FMS-PT-50000-CTLFireability-08: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FMS-PT-50000-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-01: CTL 0 0 1 0 1 0 0 0
FMS-PT-50000-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-03: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-09: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-12: DISJ 0 1 0 0 2 0 1 0
FMS-PT-50000-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-14: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-15: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
4 CTL EXCL 30/433 12/32 FMS-PT-50000-CTLFireability-01 2394760 m, 55367 m/sec, 7784291 t fired, .

Time elapsed: 596 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FMS-PT-50000-CTLFireability-05: AG false findpath
FMS-PT-50000-CTLFireability-07: AXAG false state space /EXEF
FMS-PT-50000-CTLFireability-08: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FMS-PT-50000-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-01: CTL 0 0 1 0 1 0 0 0
FMS-PT-50000-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-03: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-09: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-12: DISJ 0 1 0 0 2 0 1 0
FMS-PT-50000-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-14: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-15: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
4 CTL EXCL 35/433 14/32 FMS-PT-50000-CTLFireability-01 2753831 m, 71814 m/sec, 8961505 t fired, .

Time elapsed: 601 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FMS-PT-50000-CTLFireability-05: AG false findpath
FMS-PT-50000-CTLFireability-07: AXAG false state space /EXEF
FMS-PT-50000-CTLFireability-08: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FMS-PT-50000-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-01: CTL 0 0 1 0 1 0 0 0
FMS-PT-50000-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-03: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-09: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-12: DISJ 0 1 0 0 2 0 1 0
FMS-PT-50000-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-14: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-15: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
4 CTL EXCL 40/433 15/32 FMS-PT-50000-CTLFireability-01 3078894 m, 65012 m/sec, 10001124 t fired, .

Time elapsed: 606 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FMS-PT-50000-CTLFireability-05: AG false findpath
FMS-PT-50000-CTLFireability-07: AXAG false state space /EXEF
FMS-PT-50000-CTLFireability-08: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FMS-PT-50000-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-01: CTL 0 0 1 0 1 0 0 0
FMS-PT-50000-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-03: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-09: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-12: DISJ 0 1 0 0 2 0 1 0
FMS-PT-50000-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-14: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-15: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
4 CTL EXCL 45/433 17/32 FMS-PT-50000-CTLFireability-01 3546539 m, 93529 m/sec, 11537883 t fired, .

Time elapsed: 611 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FMS-PT-50000-CTLFireability-05: AG false findpath
FMS-PT-50000-CTLFireability-07: AXAG false state space /EXEF
FMS-PT-50000-CTLFireability-08: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FMS-PT-50000-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-01: CTL 0 0 1 0 1 0 0 0
FMS-PT-50000-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-03: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-09: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-12: DISJ 0 1 0 0 2 0 1 0
FMS-PT-50000-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-14: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-15: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
4 CTL EXCL 50/433 19/32 FMS-PT-50000-CTLFireability-01 3886646 m, 68021 m/sec, 12628259 t fired, .

Time elapsed: 616 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FMS-PT-50000-CTLFireability-05: AG false findpath
FMS-PT-50000-CTLFireability-07: AXAG false state space /EXEF
FMS-PT-50000-CTLFireability-08: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FMS-PT-50000-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-01: CTL 0 0 1 0 1 0 0 0
FMS-PT-50000-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-03: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-09: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-12: DISJ 0 1 0 0 2 0 1 0
FMS-PT-50000-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-14: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-15: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
4 CTL EXCL 55/433 21/32 FMS-PT-50000-CTLFireability-01 4225211 m, 67713 m/sec, 13725653 t fired, .

Time elapsed: 621 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FMS-PT-50000-CTLFireability-05: AG false findpath
FMS-PT-50000-CTLFireability-07: AXAG false state space /EXEF
FMS-PT-50000-CTLFireability-08: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FMS-PT-50000-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-01: CTL 0 0 1 0 1 0 0 0
FMS-PT-50000-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-03: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-09: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-12: DISJ 0 1 0 0 2 0 1 0
FMS-PT-50000-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-14: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-15: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
4 CTL EXCL 60/433 22/32 FMS-PT-50000-CTLFireability-01 4610229 m, 77003 m/sec, 14980709 t fired, .

Time elapsed: 626 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FMS-PT-50000-CTLFireability-05: AG false findpath
FMS-PT-50000-CTLFireability-07: AXAG false state space /EXEF
FMS-PT-50000-CTLFireability-08: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FMS-PT-50000-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-01: CTL 0 0 1 0 1 0 0 0
FMS-PT-50000-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-03: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-09: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-12: DISJ 0 1 0 0 2 0 1 0
FMS-PT-50000-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-14: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-15: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
4 CTL EXCL 65/433 24/32 FMS-PT-50000-CTLFireability-01 5018201 m, 81594 m/sec, 16304627 t fired, .

Time elapsed: 631 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FMS-PT-50000-CTLFireability-05: AG false findpath
FMS-PT-50000-CTLFireability-07: AXAG false state space /EXEF
FMS-PT-50000-CTLFireability-08: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FMS-PT-50000-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-01: CTL 0 0 1 0 1 0 0 0
FMS-PT-50000-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-03: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-09: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-12: DISJ 0 1 0 0 2 0 1 0
FMS-PT-50000-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-14: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-15: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
4 CTL EXCL 70/433 26/32 FMS-PT-50000-CTLFireability-01 5423489 m, 81057 m/sec, 17620493 t fired, .

Time elapsed: 636 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FMS-PT-50000-CTLFireability-05: AG false findpath
FMS-PT-50000-CTLFireability-07: AXAG false state space /EXEF
FMS-PT-50000-CTLFireability-08: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FMS-PT-50000-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-01: CTL 0 0 1 0 1 0 0 0
FMS-PT-50000-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-03: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-09: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-12: DISJ 0 1 0 0 2 0 1 0
FMS-PT-50000-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-14: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-15: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
4 CTL EXCL 75/433 28/32 FMS-PT-50000-CTLFireability-01 5834173 m, 82136 m/sec, 18952546 t fired, .

Time elapsed: 641 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FMS-PT-50000-CTLFireability-05: AG false findpath
FMS-PT-50000-CTLFireability-07: AXAG false state space /EXEF
FMS-PT-50000-CTLFireability-08: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FMS-PT-50000-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-01: CTL 0 0 1 0 1 0 0 0
FMS-PT-50000-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-03: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-09: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-12: DISJ 0 1 0 0 2 0 1 0
FMS-PT-50000-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-14: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-15: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
4 CTL EXCL 80/433 30/32 FMS-PT-50000-CTLFireability-01 6275526 m, 88270 m/sec, 20389339 t fired, .

Time elapsed: 646 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FMS-PT-50000-CTLFireability-05: AG false findpath
FMS-PT-50000-CTLFireability-07: AXAG false state space /EXEF
FMS-PT-50000-CTLFireability-08: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FMS-PT-50000-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-01: CTL 0 0 1 0 1 0 0 0
FMS-PT-50000-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-03: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-09: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-12: DISJ 0 1 0 0 2 0 1 0
FMS-PT-50000-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-14: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-15: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
4 CTL EXCL 85/433 32/32 FMS-PT-50000-CTLFireability-01 6684824 m, 81859 m/sec, 21721883 t fired, .

Time elapsed: 651 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
lola: CANCELED task # 4 (type EXCL) for FMS-PT-50000-CTLFireability-01 (memory limit exceeded)
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FMS-PT-50000-CTLFireability-05: AG false findpath
FMS-PT-50000-CTLFireability-07: AXAG false state space /EXEF
FMS-PT-50000-CTLFireability-08: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FMS-PT-50000-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-01: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-03: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-09: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-12: DISJ 0 1 0 0 2 0 1 0
FMS-PT-50000-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-14: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-15: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 656 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
lola: LAUNCH task # 39 (type EXCL) for 36 FMS-PT-50000-CTLFireability-12
lola: time limit : 490 sec
lola: memory limit: 32 pages
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FMS-PT-50000-CTLFireability-05: AG false findpath
FMS-PT-50000-CTLFireability-07: AXAG false state space /EXEF
FMS-PT-50000-CTLFireability-08: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FMS-PT-50000-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-01: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-03: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-09: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-12: DISJ 0 0 1 0 2 0 1 0
FMS-PT-50000-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-14: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-15: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
39 AGEF EXCL 5/490 4/32 FMS-PT-50000-CTLFireability-12 975778 m, 195155 m/sec, 1475787 t fired, .

Time elapsed: 661 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FMS-PT-50000-CTLFireability-05: AG false findpath
FMS-PT-50000-CTLFireability-07: AXAG false state space /EXEF
FMS-PT-50000-CTLFireability-08: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FMS-PT-50000-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-01: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-03: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-09: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-12: DISJ 0 0 1 0 2 0 1 0
FMS-PT-50000-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-14: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-15: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
39 AGEF EXCL 10/490 8/32 FMS-PT-50000-CTLFireability-12 2044316 m, 213707 m/sec, 3088611 t fired, .

Time elapsed: 666 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FMS-PT-50000-CTLFireability-05: AG false findpath
FMS-PT-50000-CTLFireability-07: AXAG false state space /EXEF
FMS-PT-50000-CTLFireability-08: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FMS-PT-50000-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-01: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-03: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-09: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-12: DISJ 0 0 1 0 2 0 1 0
FMS-PT-50000-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-14: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-15: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
39 AGEF EXCL 15/490 13/32 FMS-PT-50000-CTLFireability-12 3196962 m, 230529 m/sec, 4796993 t fired, .

Time elapsed: 671 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FMS-PT-50000-CTLFireability-05: AG false findpath
FMS-PT-50000-CTLFireability-07: AXAG false state space /EXEF
FMS-PT-50000-CTLFireability-08: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FMS-PT-50000-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-01: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-03: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-09: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-12: DISJ 0 0 1 0 2 0 1 0
FMS-PT-50000-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-14: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-15: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
39 AGEF EXCL 20/490 16/32 FMS-PT-50000-CTLFireability-12 4070263 m, 174660 m/sec, 6120302 t fired, .

Time elapsed: 676 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FMS-PT-50000-CTLFireability-05: AG false findpath
FMS-PT-50000-CTLFireability-07: AXAG false state space /EXEF
FMS-PT-50000-CTLFireability-08: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FMS-PT-50000-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-01: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-03: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-09: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-12: DISJ 0 0 1 0 2 0 1 0
FMS-PT-50000-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-14: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-15: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
39 AGEF EXCL 25/490 20/32 FMS-PT-50000-CTLFireability-12 5149503 m, 215848 m/sec, 7748953 t fired, .

Time elapsed: 681 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FMS-PT-50000-CTLFireability-05: AG false findpath
FMS-PT-50000-CTLFireability-07: AXAG false state space /EXEF
FMS-PT-50000-CTLFireability-08: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FMS-PT-50000-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-01: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-03: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-09: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-12: DISJ 0 0 1 0 2 0 1 0
FMS-PT-50000-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-14: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-15: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
39 AGEF EXCL 30/490 23/32 FMS-PT-50000-CTLFireability-12 5950057 m, 160110 m/sec, 8950052 t fired, .

Time elapsed: 686 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FMS-PT-50000-CTLFireability-05: AG false findpath
FMS-PT-50000-CTLFireability-07: AXAG false state space /EXEF
FMS-PT-50000-CTLFireability-08: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FMS-PT-50000-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-01: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-03: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-09: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-12: DISJ 0 0 1 0 2 0 1 0
FMS-PT-50000-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-14: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-15: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
39 AGEF EXCL 35/490 27/32 FMS-PT-50000-CTLFireability-12 6942472 m, 198483 m/sec, 10434873 t fired, .

Time elapsed: 691 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FMS-PT-50000-CTLFireability-05: AG false findpath
FMS-PT-50000-CTLFireability-07: AXAG false state space /EXEF
FMS-PT-50000-CTLFireability-08: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FMS-PT-50000-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-01: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-03: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-09: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-12: DISJ 0 0 1 0 2 0 1 0
FMS-PT-50000-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-14: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-15: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
39 AGEF EXCL 40/490 31/32 FMS-PT-50000-CTLFireability-12 7873682 m, 186242 m/sec, 11823760 t fired, .

Time elapsed: 696 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
lola: CANCELED task # 39 (type EXCL) for FMS-PT-50000-CTLFireability-12 (memory limit exceeded)
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FMS-PT-50000-CTLFireability-05: AG false findpath
FMS-PT-50000-CTLFireability-07: AXAG false state space /EXEF
FMS-PT-50000-CTLFireability-08: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FMS-PT-50000-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-01: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-03: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-09: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-12: DISJ 0 0 0 0 2 0 2 0
FMS-PT-50000-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-14: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-15: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 701 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
lola: LAUNCH task # 50 (type EXCL) for 49 FMS-PT-50000-CTLFireability-15
lola: time limit : 579 sec
lola: memory limit: 32 pages
lola: FINISHED task # 50 (type EXCL) for FMS-PT-50000-CTLFireability-15
lola: result : true
lola: markings : 1
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 34 (type EXCL) for 33 FMS-PT-50000-CTLFireability-11
lola: time limit : 724 sec
lola: memory limit: 32 pages
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FMS-PT-50000-CTLFireability-05: AG false findpath
FMS-PT-50000-CTLFireability-07: AXAG false state space /EXEF
FMS-PT-50000-CTLFireability-08: CTL true CTL model checker
FMS-PT-50000-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FMS-PT-50000-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-01: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-03: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-09: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-11: CTL 0 0 1 0 1 0 0 0
FMS-PT-50000-CTLFireability-12: DISJ 0 0 0 0 2 0 2 0
FMS-PT-50000-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
34 CTL EXCL 5/724 2/32 FMS-PT-50000-CTLFireability-11 339677 m, 67935 m/sec, 1308699 t fired, .

Time elapsed: 706 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FMS-PT-50000-CTLFireability-05: AG false findpath
FMS-PT-50000-CTLFireability-07: AXAG false state space /EXEF
FMS-PT-50000-CTLFireability-08: CTL true CTL model checker
FMS-PT-50000-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FMS-PT-50000-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-01: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-03: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-09: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-11: CTL 0 0 1 0 1 0 0 0
FMS-PT-50000-CTLFireability-12: DISJ 0 0 0 0 2 0 2 0
FMS-PT-50000-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
34 CTL EXCL 10/724 4/32 FMS-PT-50000-CTLFireability-11 741546 m, 80373 m/sec, 2824631 t fired, .

Time elapsed: 711 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FMS-PT-50000-CTLFireability-05: AG false findpath
FMS-PT-50000-CTLFireability-07: AXAG false state space /EXEF
FMS-PT-50000-CTLFireability-08: CTL true CTL model checker
FMS-PT-50000-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FMS-PT-50000-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-01: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-03: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-09: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-11: CTL 0 0 1 0 1 0 0 0
FMS-PT-50000-CTLFireability-12: DISJ 0 0 0 0 2 0 2 0
FMS-PT-50000-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
34 CTL EXCL 15/724 5/32 FMS-PT-50000-CTLFireability-11 1082126 m, 68116 m/sec, 4144536 t fired, .

Time elapsed: 716 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FMS-PT-50000-CTLFireability-05: AG false findpath
FMS-PT-50000-CTLFireability-07: AXAG false state space /EXEF
FMS-PT-50000-CTLFireability-08: CTL true CTL model checker
FMS-PT-50000-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FMS-PT-50000-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-01: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-03: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-09: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-11: CTL 0 0 1 0 1 0 0 0
FMS-PT-50000-CTLFireability-12: DISJ 0 0 0 0 2 0 2 0
FMS-PT-50000-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
34 CTL EXCL 20/724 6/32 FMS-PT-50000-CTLFireability-11 1378803 m, 59335 m/sec, 5279575 t fired, .

Time elapsed: 721 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FMS-PT-50000-CTLFireability-05: AG false findpath
FMS-PT-50000-CTLFireability-07: AXAG false state space /EXEF
FMS-PT-50000-CTLFireability-08: CTL true CTL model checker
FMS-PT-50000-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FMS-PT-50000-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-01: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-03: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-09: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-11: CTL 0 0 1 0 1 0 0 0
FMS-PT-50000-CTLFireability-12: DISJ 0 0 0 0 2 0 2 0
FMS-PT-50000-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
34 CTL EXCL 26/724 7/32 FMS-PT-50000-CTLFireability-11 1644106 m, 53060 m/sec, 6282299 t fired, .

Time elapsed: 727 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FMS-PT-50000-CTLFireability-05: AG false findpath
FMS-PT-50000-CTLFireability-07: AXAG false state space /EXEF
FMS-PT-50000-CTLFireability-08: CTL true CTL model checker
FMS-PT-50000-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FMS-PT-50000-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-01: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-03: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-09: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-11: CTL 0 0 1 0 1 0 0 0
FMS-PT-50000-CTLFireability-12: DISJ 0 0 0 0 2 0 2 0
FMS-PT-50000-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
34 CTL EXCL 31/724 9/32 FMS-PT-50000-CTLFireability-11 1964680 m, 64114 m/sec, 7516008 t fired, .

Time elapsed: 732 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FMS-PT-50000-CTLFireability-05: AG false findpath
FMS-PT-50000-CTLFireability-07: AXAG false state space /EXEF
FMS-PT-50000-CTLFireability-08: CTL true CTL model checker
FMS-PT-50000-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FMS-PT-50000-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-01: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-03: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-09: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-11: CTL 0 0 1 0 1 0 0 0
FMS-PT-50000-CTLFireability-12: DISJ 0 0 0 0 2 0 2 0
FMS-PT-50000-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
34 CTL EXCL 36/724 10/32 FMS-PT-50000-CTLFireability-11 2289235 m, 64911 m/sec, 8776497 t fired, .

Time elapsed: 737 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FMS-PT-50000-CTLFireability-05: AG false findpath
FMS-PT-50000-CTLFireability-07: AXAG false state space /EXEF
FMS-PT-50000-CTLFireability-08: CTL true CTL model checker
FMS-PT-50000-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FMS-PT-50000-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-01: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-03: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-09: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-11: CTL 0 0 1 0 1 0 0 0
FMS-PT-50000-CTLFireability-12: DISJ 0 0 0 0 2 0 2 0
FMS-PT-50000-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
34 CTL EXCL 41/724 11/32 FMS-PT-50000-CTLFireability-11 2591203 m, 60393 m/sec, 9935347 t fired, .

Time elapsed: 742 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FMS-PT-50000-CTLFireability-05: AG false findpath
FMS-PT-50000-CTLFireability-07: AXAG false state space /EXEF
FMS-PT-50000-CTLFireability-08: CTL true CTL model checker
FMS-PT-50000-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FMS-PT-50000-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-01: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-03: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-09: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-11: CTL 0 0 1 0 1 0 0 0
FMS-PT-50000-CTLFireability-12: DISJ 0 0 0 0 2 0 2 0
FMS-PT-50000-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
34 CTL EXCL 46/724 12/32 FMS-PT-50000-CTLFireability-11 2812153 m, 44190 m/sec, 10786431 t fired, .

Time elapsed: 747 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FMS-PT-50000-CTLFireability-05: AG false findpath
FMS-PT-50000-CTLFireability-07: AXAG false state space /EXEF
FMS-PT-50000-CTLFireability-08: CTL true CTL model checker
FMS-PT-50000-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FMS-PT-50000-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-01: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-03: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-09: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-11: CTL 0 0 1 0 1 0 0 0
FMS-PT-50000-CTLFireability-12: DISJ 0 0 0 0 2 0 2 0
FMS-PT-50000-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
34 CTL EXCL 51/724 14/32 FMS-PT-50000-CTLFireability-11 3135408 m, 64651 m/sec, 12006193 t fired, .

Time elapsed: 752 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FMS-PT-50000-CTLFireability-05: AG false findpath
FMS-PT-50000-CTLFireability-07: AXAG false state space /EXEF
FMS-PT-50000-CTLFireability-08: CTL true CTL model checker
FMS-PT-50000-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FMS-PT-50000-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-01: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-03: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-09: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-11: CTL 0 0 1 0 1 0 0 0
FMS-PT-50000-CTLFireability-12: DISJ 0 0 0 0 2 0 2 0
FMS-PT-50000-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
34 CTL EXCL 56/724 15/32 FMS-PT-50000-CTLFireability-11 3471087 m, 67135 m/sec, 13294801 t fired, .

Time elapsed: 757 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FMS-PT-50000-CTLFireability-05: AG false findpath
FMS-PT-50000-CTLFireability-07: AXAG false state space /EXEF
FMS-PT-50000-CTLFireability-08: CTL true CTL model checker
FMS-PT-50000-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FMS-PT-50000-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-01: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-03: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-09: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-11: CTL 0 0 1 0 1 0 0 0
FMS-PT-50000-CTLFireability-12: DISJ 0 0 0 0 2 0 2 0
FMS-PT-50000-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
34 CTL EXCL 61/724 17/32 FMS-PT-50000-CTLFireability-11 3819251 m, 69632 m/sec, 14661533 t fired, .

Time elapsed: 762 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FMS-PT-50000-CTLFireability-05: AG false findpath
FMS-PT-50000-CTLFireability-07: AXAG false state space /EXEF
FMS-PT-50000-CTLFireability-08: CTL true CTL model checker
FMS-PT-50000-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FMS-PT-50000-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-01: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-03: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-09: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-11: CTL 0 0 1 0 1 0 0 0
FMS-PT-50000-CTLFireability-12: DISJ 0 0 0 0 2 0 2 0
FMS-PT-50000-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
34 CTL EXCL 66/724 18/32 FMS-PT-50000-CTLFireability-11 4084331 m, 53016 m/sec, 15654383 t fired, .

Time elapsed: 767 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FMS-PT-50000-CTLFireability-05: AG false findpath
FMS-PT-50000-CTLFireability-07: AXAG false state space /EXEF
FMS-PT-50000-CTLFireability-08: CTL true CTL model checker
FMS-PT-50000-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FMS-PT-50000-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-01: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-03: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-09: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-11: CTL 0 0 1 0 1 0 0 0
FMS-PT-50000-CTLFireability-12: DISJ 0 0 0 0 2 0 2 0
FMS-PT-50000-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
34 CTL EXCL 71/724 19/32 FMS-PT-50000-CTLFireability-11 4359700 m, 55073 m/sec, 16693537 t fired, .

Time elapsed: 772 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FMS-PT-50000-CTLFireability-05: AG false findpath
FMS-PT-50000-CTLFireability-07: AXAG false state space /EXEF
FMS-PT-50000-CTLFireability-08: CTL true CTL model checker
FMS-PT-50000-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FMS-PT-50000-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-01: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-03: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-09: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-11: CTL 0 0 1 0 1 0 0 0
FMS-PT-50000-CTLFireability-12: DISJ 0 0 0 0 2 0 2 0
FMS-PT-50000-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
34 CTL EXCL 76/724 20/32 FMS-PT-50000-CTLFireability-11 4640609 m, 56181 m/sec, 17771780 t fired, .

Time elapsed: 777 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FMS-PT-50000-CTLFireability-05: AG false findpath
FMS-PT-50000-CTLFireability-07: AXAG false state space /EXEF
FMS-PT-50000-CTLFireability-08: CTL true CTL model checker
FMS-PT-50000-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FMS-PT-50000-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-01: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-03: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-09: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-11: CTL 0 0 1 0 1 0 0 0
FMS-PT-50000-CTLFireability-12: DISJ 0 0 0 0 2 0 2 0
FMS-PT-50000-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
34 CTL EXCL 81/724 21/32 FMS-PT-50000-CTLFireability-11 4953033 m, 62484 m/sec, 18963523 t fired, .

Time elapsed: 782 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FMS-PT-50000-CTLFireability-05: AG false findpath
FMS-PT-50000-CTLFireability-07: AXAG false state space /EXEF
FMS-PT-50000-CTLFireability-08: CTL true CTL model checker
FMS-PT-50000-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FMS-PT-50000-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-01: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-03: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-09: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-11: CTL 0 0 1 0 1 0 0 0
FMS-PT-50000-CTLFireability-12: DISJ 0 0 0 0 2 0 2 0
FMS-PT-50000-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
34 CTL EXCL 86/724 23/32 FMS-PT-50000-CTLFireability-11 5250294 m, 59452 m/sec, 20101187 t fired, .

Time elapsed: 787 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FMS-PT-50000-CTLFireability-05: AG false findpath
FMS-PT-50000-CTLFireability-07: AXAG false state space /EXEF
FMS-PT-50000-CTLFireability-08: CTL true CTL model checker
FMS-PT-50000-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FMS-PT-50000-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-01: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-03: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-09: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-11: CTL 0 0 1 0 1 0 0 0
FMS-PT-50000-CTLFireability-12: DISJ 0 0 0 0 2 0 2 0
FMS-PT-50000-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
34 CTL EXCL 91/724 24/32 FMS-PT-50000-CTLFireability-11 5554279 m, 60797 m/sec, 21269112 t fired, .

Time elapsed: 792 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FMS-PT-50000-CTLFireability-05: AG false findpath
FMS-PT-50000-CTLFireability-07: AXAG false state space /EXEF
FMS-PT-50000-CTLFireability-08: CTL true CTL model checker
FMS-PT-50000-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FMS-PT-50000-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-01: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-03: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-09: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-11: CTL 0 0 1 0 1 0 0 0
FMS-PT-50000-CTLFireability-12: DISJ 0 0 0 0 2 0 2 0
FMS-PT-50000-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
34 CTL EXCL 96/724 25/32 FMS-PT-50000-CTLFireability-11 5802972 m, 49738 m/sec, 22258858 t fired, .

Time elapsed: 797 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FMS-PT-50000-CTLFireability-05: AG false findpath
FMS-PT-50000-CTLFireability-07: AXAG false state space /EXEF
FMS-PT-50000-CTLFireability-08: CTL true CTL model checker
FMS-PT-50000-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FMS-PT-50000-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-01: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-03: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-09: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-11: CTL 0 0 1 0 1 0 0 0
FMS-PT-50000-CTLFireability-12: DISJ 0 0 0 0 2 0 2 0
FMS-PT-50000-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
34 CTL EXCL 101/724 26/32 FMS-PT-50000-CTLFireability-11 6048222 m, 49050 m/sec, 23192763 t fired, .

Time elapsed: 802 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FMS-PT-50000-CTLFireability-05: AG false findpath
FMS-PT-50000-CTLFireability-07: AXAG false state space /EXEF
FMS-PT-50000-CTLFireability-08: CTL true CTL model checker
FMS-PT-50000-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FMS-PT-50000-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-01: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-03: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-09: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-11: CTL 0 0 1 0 1 0 0 0
FMS-PT-50000-CTLFireability-12: DISJ 0 0 0 0 2 0 2 0
FMS-PT-50000-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
34 CTL EXCL 106/724 27/32 FMS-PT-50000-CTLFireability-11 6370314 m, 64418 m/sec, 24431125 t fired, .

Time elapsed: 807 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FMS-PT-50000-CTLFireability-05: AG false findpath
FMS-PT-50000-CTLFireability-07: AXAG false state space /EXEF
FMS-PT-50000-CTLFireability-08: CTL true CTL model checker
FMS-PT-50000-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FMS-PT-50000-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-01: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-03: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-09: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-11: CTL 0 0 1 0 1 0 0 0
FMS-PT-50000-CTLFireability-12: DISJ 0 0 0 0 2 0 2 0
FMS-PT-50000-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
34 CTL EXCL 111/724 29/32 FMS-PT-50000-CTLFireability-11 6691938 m, 64324 m/sec, 25667617 t fired, .

Time elapsed: 812 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FMS-PT-50000-CTLFireability-05: AG false findpath
FMS-PT-50000-CTLFireability-07: AXAG false state space /EXEF
FMS-PT-50000-CTLFireability-08: CTL true CTL model checker
FMS-PT-50000-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FMS-PT-50000-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-01: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-03: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-09: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-11: CTL 0 0 1 0 1 0 0 0
FMS-PT-50000-CTLFireability-12: DISJ 0 0 0 0 2 0 2 0
FMS-PT-50000-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
34 CTL EXCL 116/724 30/32 FMS-PT-50000-CTLFireability-11 7053346 m, 72281 m/sec, 27014876 t fired, .

Time elapsed: 817 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FMS-PT-50000-CTLFireability-05: AG false findpath
FMS-PT-50000-CTLFireability-07: AXAG false state space /EXEF
FMS-PT-50000-CTLFireability-08: CTL true CTL model checker
FMS-PT-50000-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FMS-PT-50000-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-01: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-03: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-09: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-11: CTL 0 0 1 0 1 0 0 0
FMS-PT-50000-CTLFireability-12: DISJ 0 0 0 0 2 0 2 0
FMS-PT-50000-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
34 CTL EXCL 121/724 31/32 FMS-PT-50000-CTLFireability-11 7262890 m, 41908 m/sec, 27851414 t fired, .

Time elapsed: 822 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FMS-PT-50000-CTLFireability-05: AG false findpath
FMS-PT-50000-CTLFireability-07: AXAG false state space /EXEF
FMS-PT-50000-CTLFireability-08: CTL true CTL model checker
FMS-PT-50000-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FMS-PT-50000-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-01: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-03: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-09: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-11: CTL 0 0 1 0 1 0 0 0
FMS-PT-50000-CTLFireability-12: DISJ 0 0 0 0 2 0 2 0
FMS-PT-50000-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
34 CTL EXCL 126/724 32/32 FMS-PT-50000-CTLFireability-11 7557839 m, 58989 m/sec, 28981202 t fired, .

Time elapsed: 827 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
lola: CANCELED task # 34 (type EXCL) for FMS-PT-50000-CTLFireability-11 (memory limit exceeded)
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FMS-PT-50000-CTLFireability-05: AG false findpath
FMS-PT-50000-CTLFireability-07: AXAG false state space /EXEF
FMS-PT-50000-CTLFireability-08: CTL true CTL model checker
FMS-PT-50000-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FMS-PT-50000-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-01: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-03: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-09: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-12: DISJ 0 0 0 0 2 0 2 0
FMS-PT-50000-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 832 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
lola: LAUNCH task # 13 (type EXCL) for 12 FMS-PT-50000-CTLFireability-04
lola: time limit : 922 sec
lola: memory limit: 32 pages
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FMS-PT-50000-CTLFireability-05: AG false findpath
FMS-PT-50000-CTLFireability-07: AXAG false state space /EXEF
FMS-PT-50000-CTLFireability-08: CTL true CTL model checker
FMS-PT-50000-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FMS-PT-50000-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-01: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-03: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-04: CTL 0 0 1 0 1 0 0 0
FMS-PT-50000-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-09: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-12: DISJ 0 0 0 0 2 0 2 0
FMS-PT-50000-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
13 CTL EXCL 5/922 3/32 FMS-PT-50000-CTLFireability-04 584829 m, 116965 m/sec, 1084822 t fired, .

Time elapsed: 837 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FMS-PT-50000-CTLFireability-05: AG false findpath
FMS-PT-50000-CTLFireability-07: AXAG false state space /EXEF
FMS-PT-50000-CTLFireability-08: CTL true CTL model checker
FMS-PT-50000-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FMS-PT-50000-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-01: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-03: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-04: CTL 0 0 1 0 1 0 0 0
FMS-PT-50000-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-09: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-12: DISJ 0 0 0 0 2 0 2 0
FMS-PT-50000-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
13 CTL EXCL 10/922 5/32 FMS-PT-50000-CTLFireability-04 1149731 m, 112980 m/sec, 2149300 t fired, .

Time elapsed: 842 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FMS-PT-50000-CTLFireability-05: AG false findpath
FMS-PT-50000-CTLFireability-07: AXAG false state space /EXEF
FMS-PT-50000-CTLFireability-08: CTL true CTL model checker
FMS-PT-50000-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FMS-PT-50000-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-01: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-03: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-04: CTL 0 0 1 0 1 0 0 0
FMS-PT-50000-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-09: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-12: DISJ 0 0 0 0 2 0 2 0
FMS-PT-50000-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
13 CTL EXCL 15/922 9/32 FMS-PT-50000-CTLFireability-04 1907257 m, 151505 m/sec, 3507239 t fired, .

Time elapsed: 847 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FMS-PT-50000-CTLFireability-05: AG false findpath
FMS-PT-50000-CTLFireability-07: AXAG false state space /EXEF
FMS-PT-50000-CTLFireability-08: CTL true CTL model checker
FMS-PT-50000-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FMS-PT-50000-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-01: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-03: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-04: CTL 0 0 1 0 1 0 0 0
FMS-PT-50000-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-09: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-12: DISJ 0 0 0 0 2 0 2 0
FMS-PT-50000-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
13 CTL EXCL 20/922 11/32 FMS-PT-50000-CTLFireability-04 2536210 m, 125790 m/sec, 4636186 t fired, .

Time elapsed: 852 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FMS-PT-50000-CTLFireability-05: AG false findpath
FMS-PT-50000-CTLFireability-07: AXAG false state space /EXEF
FMS-PT-50000-CTLFireability-08: CTL true CTL model checker
FMS-PT-50000-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FMS-PT-50000-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-01: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-03: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-04: CTL 0 0 1 0 1 0 0 0
FMS-PT-50000-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-09: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-12: DISJ 0 0 0 0 2 0 2 0
FMS-PT-50000-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
13 CTL EXCL 25/922 13/32 FMS-PT-50000-CTLFireability-04 2986797 m, 90117 m/sec, 5486767 t fired, .

Time elapsed: 857 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FMS-PT-50000-CTLFireability-05: AG false findpath
FMS-PT-50000-CTLFireability-07: AXAG false state space /EXEF
FMS-PT-50000-CTLFireability-08: CTL true CTL model checker
FMS-PT-50000-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FMS-PT-50000-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-01: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-03: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-04: CTL 0 0 1 0 1 0 0 0
FMS-PT-50000-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-09: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-12: DISJ 0 0 0 0 2 0 2 0
FMS-PT-50000-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
13 CTL EXCL 30/922 16/32 FMS-PT-50000-CTLFireability-04 3655664 m, 133773 m/sec, 6711254 t fired, .

Time elapsed: 862 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FMS-PT-50000-CTLFireability-05: AG false findpath
FMS-PT-50000-CTLFireability-07: AXAG false state space /EXEF
FMS-PT-50000-CTLFireability-08: CTL true CTL model checker
FMS-PT-50000-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FMS-PT-50000-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-01: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-03: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-04: CTL 0 0 1 0 1 0 0 0
FMS-PT-50000-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-09: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-12: DISJ 0 0 0 0 2 0 2 0
FMS-PT-50000-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
13 CTL EXCL 35/922 18/32 FMS-PT-50000-CTLFireability-04 4208521 m, 110571 m/sec, 7716956 t fired, .

Time elapsed: 867 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FMS-PT-50000-CTLFireability-05: AG false findpath
FMS-PT-50000-CTLFireability-07: AXAG false state space /EXEF
FMS-PT-50000-CTLFireability-08: CTL true CTL model checker
FMS-PT-50000-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FMS-PT-50000-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-01: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-03: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-04: CTL 0 0 1 0 1 0 0 0
FMS-PT-50000-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-09: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-12: DISJ 0 0 0 0 2 0 2 0
FMS-PT-50000-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
13 CTL EXCL 40/922 20/32 FMS-PT-50000-CTLFireability-04 4663093 m, 90914 m/sec, 8532614 t fired, .

Time elapsed: 872 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FMS-PT-50000-CTLFireability-05: AG false findpath
FMS-PT-50000-CTLFireability-07: AXAG false state space /EXEF
FMS-PT-50000-CTLFireability-08: CTL true CTL model checker
FMS-PT-50000-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FMS-PT-50000-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-01: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-03: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-04: CTL 0 0 1 0 1 0 0 0
FMS-PT-50000-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-09: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-12: DISJ 0 0 0 0 2 0 2 0
FMS-PT-50000-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
13 CTL EXCL 45/922 23/32 FMS-PT-50000-CTLFireability-04 5269748 m, 121331 m/sec, 9649237 t fired, .

Time elapsed: 877 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FMS-PT-50000-CTLFireability-05: AG false findpath
FMS-PT-50000-CTLFireability-07: AXAG false state space /EXEF
FMS-PT-50000-CTLFireability-08: CTL true CTL model checker
FMS-PT-50000-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FMS-PT-50000-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-01: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-03: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-04: CTL 0 0 1 0 1 0 0 0
FMS-PT-50000-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-09: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-12: DISJ 0 0 0 0 2 0 2 0
FMS-PT-50000-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
13 CTL EXCL 50/922 25/32 FMS-PT-50000-CTLFireability-04 5736018 m, 93254 m/sec, 10521920 t fired, .

Time elapsed: 882 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FMS-PT-50000-CTLFireability-05: AG false findpath
FMS-PT-50000-CTLFireability-07: AXAG false state space /EXEF
FMS-PT-50000-CTLFireability-08: CTL true CTL model checker
FMS-PT-50000-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FMS-PT-50000-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-01: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-03: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-04: CTL 0 0 1 0 1 0 0 0
FMS-PT-50000-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-09: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-12: DISJ 0 0 0 0 2 0 2 0
FMS-PT-50000-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
13 CTL EXCL 55/922 27/32 FMS-PT-50000-CTLFireability-04 6401899 m, 133176 m/sec, 11751836 t fired, .

Time elapsed: 887 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FMS-PT-50000-CTLFireability-05: AG false findpath
FMS-PT-50000-CTLFireability-07: AXAG false state space /EXEF
FMS-PT-50000-CTLFireability-08: CTL true CTL model checker
FMS-PT-50000-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FMS-PT-50000-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-01: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-03: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-04: CTL 0 0 1 0 1 0 0 0
FMS-PT-50000-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-09: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-12: DISJ 0 0 0 0 2 0 2 0
FMS-PT-50000-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
13 CTL EXCL 60/922 29/32 FMS-PT-50000-CTLFireability-04 6845037 m, 88627 m/sec, 12587421 t fired, .

Time elapsed: 892 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FMS-PT-50000-CTLFireability-05: AG false findpath
FMS-PT-50000-CTLFireability-07: AXAG false state space /EXEF
FMS-PT-50000-CTLFireability-08: CTL true CTL model checker
FMS-PT-50000-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FMS-PT-50000-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-01: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-03: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-04: CTL 0 0 1 0 1 0 0 0
FMS-PT-50000-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-09: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-12: DISJ 0 0 0 0 2 0 2 0
FMS-PT-50000-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
13 CTL EXCL 65/922 32/32 FMS-PT-50000-CTLFireability-04 7505030 m, 131998 m/sec, 13759908 t fired, .

Time elapsed: 897 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
lola: CANCELED task # 13 (type EXCL) for FMS-PT-50000-CTLFireability-04 (memory limit exceeded)
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FMS-PT-50000-CTLFireability-05: AG false findpath
FMS-PT-50000-CTLFireability-07: AXAG false state space /EXEF
FMS-PT-50000-CTLFireability-08: CTL true CTL model checker
FMS-PT-50000-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FMS-PT-50000-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-01: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-03: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-09: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-12: DISJ 0 0 0 0 2 0 2 0
FMS-PT-50000-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 902 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
lola: LAUNCH task # 19 (type EXCL) for 18 FMS-PT-50000-CTLFireability-06
lola: time limit : 1349 sec
lola: memory limit: 32 pages
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FMS-PT-50000-CTLFireability-05: AG false findpath
FMS-PT-50000-CTLFireability-07: AXAG false state space /EXEF
FMS-PT-50000-CTLFireability-08: CTL true CTL model checker
FMS-PT-50000-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FMS-PT-50000-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-01: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-03: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-06: CTL 0 0 1 0 1 0 0 0
FMS-PT-50000-CTLFireability-09: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-12: DISJ 0 0 0 0 2 0 2 0
FMS-PT-50000-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
19 CTL EXCL 5/1349 3/32 FMS-PT-50000-CTLFireability-06 524924 m, 104984 m/sec, 1512222 t fired, .

Time elapsed: 907 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FMS-PT-50000-CTLFireability-05: AG false findpath
FMS-PT-50000-CTLFireability-07: AXAG false state space /EXEF
FMS-PT-50000-CTLFireability-08: CTL true CTL model checker
FMS-PT-50000-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FMS-PT-50000-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-01: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-03: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-06: CTL 0 0 1 0 1 0 0 0
FMS-PT-50000-CTLFireability-09: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-12: DISJ 0 0 0 0 2 0 2 0
FMS-PT-50000-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
19 CTL EXCL 10/1349 5/32 FMS-PT-50000-CTLFireability-06 974284 m, 89872 m/sec, 2772830 t fired, .

Time elapsed: 912 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FMS-PT-50000-CTLFireability-05: AG false findpath
FMS-PT-50000-CTLFireability-07: AXAG false state space /EXEF
FMS-PT-50000-CTLFireability-08: CTL true CTL model checker
FMS-PT-50000-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FMS-PT-50000-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-01: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-03: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-06: CTL 0 0 1 0 1 0 0 0
FMS-PT-50000-CTLFireability-09: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-12: DISJ 0 0 0 0 2 0 2 0
FMS-PT-50000-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
19 CTL EXCL 15/1349 6/32 FMS-PT-50000-CTLFireability-06 1328913 m, 70925 m/sec, 3757813 t fired, .

Time elapsed: 917 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FMS-PT-50000-CTLFireability-05: AG false findpath
FMS-PT-50000-CTLFireability-07: AXAG false state space /EXEF
FMS-PT-50000-CTLFireability-08: CTL true CTL model checker
FMS-PT-50000-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FMS-PT-50000-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-01: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-03: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-06: CTL 0 0 1 0 1 0 0 0
FMS-PT-50000-CTLFireability-09: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-12: DISJ 0 0 0 0 2 0 2 0
FMS-PT-50000-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
19 CTL EXCL 20/1349 8/32 FMS-PT-50000-CTLFireability-06 1760621 m, 86341 m/sec, 5021223 t fired, .

Time elapsed: 922 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FMS-PT-50000-CTLFireability-05: AG false findpath
FMS-PT-50000-CTLFireability-07: AXAG false state space /EXEF
FMS-PT-50000-CTLFireability-08: CTL true CTL model checker
FMS-PT-50000-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FMS-PT-50000-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-01: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-03: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-06: CTL 0 0 1 0 1 0 0 0
FMS-PT-50000-CTLFireability-09: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-12: DISJ 0 0 0 0 2 0 2 0
FMS-PT-50000-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
19 CTL EXCL 25/1349 10/32 FMS-PT-50000-CTLFireability-06 2171200 m, 82115 m/sec, 6163554 t fired, .

Time elapsed: 927 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FMS-PT-50000-CTLFireability-05: AG false findpath
FMS-PT-50000-CTLFireability-07: AXAG false state space /EXEF
FMS-PT-50000-CTLFireability-08: CTL true CTL model checker
FMS-PT-50000-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FMS-PT-50000-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-01: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-03: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-06: CTL 0 0 1 0 1 0 0 0
FMS-PT-50000-CTLFireability-09: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-12: DISJ 0 0 0 0 2 0 2 0
FMS-PT-50000-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
19 CTL EXCL 30/1349 12/32 FMS-PT-50000-CTLFireability-06 2651630 m, 96086 m/sec, 7553232 t fired, .

Time elapsed: 932 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FMS-PT-50000-CTLFireability-05: AG false findpath
FMS-PT-50000-CTLFireability-07: AXAG false state space /EXEF
FMS-PT-50000-CTLFireability-08: CTL true CTL model checker
FMS-PT-50000-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FMS-PT-50000-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-01: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-03: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-06: CTL 0 0 1 0 1 0 0 0
FMS-PT-50000-CTLFireability-09: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-12: DISJ 0 0 0 0 2 0 2 0
FMS-PT-50000-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
19 CTL EXCL 35/1349 13/32 FMS-PT-50000-CTLFireability-06 2979887 m, 65651 m/sec, 8459743 t fired, .

Time elapsed: 937 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FMS-PT-50000-CTLFireability-05: AG false findpath
FMS-PT-50000-CTLFireability-07: AXAG false state space /EXEF
FMS-PT-50000-CTLFireability-08: CTL true CTL model checker
FMS-PT-50000-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FMS-PT-50000-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-01: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-03: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-06: CTL 0 0 1 0 1 0 0 0
FMS-PT-50000-CTLFireability-09: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-12: DISJ 0 0 0 0 2 0 2 0
FMS-PT-50000-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
19 CTL EXCL 40/1349 15/32 FMS-PT-50000-CTLFireability-06 3417186 m, 87459 m/sec, 9684337 t fired, .

Time elapsed: 942 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FMS-PT-50000-CTLFireability-05: AG false findpath
FMS-PT-50000-CTLFireability-07: AXAG false state space /EXEF
FMS-PT-50000-CTLFireability-08: CTL true CTL model checker
FMS-PT-50000-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FMS-PT-50000-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-01: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-03: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-06: CTL 0 0 1 0 1 0 0 0
FMS-PT-50000-CTLFireability-09: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-12: DISJ 0 0 0 0 2 0 2 0
FMS-PT-50000-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
19 CTL EXCL 45/1349 16/32 FMS-PT-50000-CTLFireability-06 3747354 m, 66033 m/sec, 10594672 t fired, .

Time elapsed: 947 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FMS-PT-50000-CTLFireability-05: AG false findpath
FMS-PT-50000-CTLFireability-07: AXAG false state space /EXEF
FMS-PT-50000-CTLFireability-08: CTL true CTL model checker
FMS-PT-50000-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FMS-PT-50000-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-01: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-03: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-06: CTL 0 0 1 0 1 0 0 0
FMS-PT-50000-CTLFireability-09: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-12: DISJ 0 0 0 0 2 0 2 0
FMS-PT-50000-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
19 CTL EXCL 50/1349 17/32 FMS-PT-50000-CTLFireability-06 4047679 m, 60065 m/sec, 11445319 t fired, .

Time elapsed: 952 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FMS-PT-50000-CTLFireability-05: AG false findpath
FMS-PT-50000-CTLFireability-07: AXAG false state space /EXEF
FMS-PT-50000-CTLFireability-08: CTL true CTL model checker
FMS-PT-50000-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FMS-PT-50000-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-01: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-03: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-06: CTL 0 0 1 0 1 0 0 0
FMS-PT-50000-CTLFireability-09: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-12: DISJ 0 0 0 0 2 0 2 0
FMS-PT-50000-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
19 CTL EXCL 55/1349 19/32 FMS-PT-50000-CTLFireability-06 4475258 m, 85515 m/sec, 12700470 t fired, .

Time elapsed: 957 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FMS-PT-50000-CTLFireability-05: AG false findpath
FMS-PT-50000-CTLFireability-07: AXAG false state space /EXEF
FMS-PT-50000-CTLFireability-08: CTL true CTL model checker
FMS-PT-50000-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FMS-PT-50000-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-01: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-03: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-06: CTL 0 0 1 0 1 0 0 0
FMS-PT-50000-CTLFireability-09: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-12: DISJ 0 0 0 0 2 0 2 0
FMS-PT-50000-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
19 CTL EXCL 60/1349 21/32 FMS-PT-50000-CTLFireability-06 4946977 m, 94343 m/sec, 13993905 t fired, .

Time elapsed: 962 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FMS-PT-50000-CTLFireability-05: AG false findpath
FMS-PT-50000-CTLFireability-07: AXAG false state space /EXEF
FMS-PT-50000-CTLFireability-08: CTL true CTL model checker
FMS-PT-50000-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FMS-PT-50000-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-01: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-03: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-06: CTL 0 0 1 0 1 0 0 0
FMS-PT-50000-CTLFireability-09: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-12: DISJ 0 0 0 0 2 0 2 0
FMS-PT-50000-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
19 CTL EXCL 65/1349 23/32 FMS-PT-50000-CTLFireability-06 5280736 m, 66751 m/sec, 14957442 t fired, .

Time elapsed: 967 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FMS-PT-50000-CTLFireability-05: AG false findpath
FMS-PT-50000-CTLFireability-07: AXAG false state space /EXEF
FMS-PT-50000-CTLFireability-08: CTL true CTL model checker
FMS-PT-50000-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FMS-PT-50000-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-01: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-03: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-06: CTL 0 0 1 0 1 0 0 0
FMS-PT-50000-CTLFireability-09: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-12: DISJ 0 0 0 0 2 0 2 0
FMS-PT-50000-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
19 CTL EXCL 70/1349 24/32 FMS-PT-50000-CTLFireability-06 5685161 m, 80885 m/sec, 16120263 t fired, .

Time elapsed: 972 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FMS-PT-50000-CTLFireability-05: AG false findpath
FMS-PT-50000-CTLFireability-07: AXAG false state space /EXEF
FMS-PT-50000-CTLFireability-08: CTL true CTL model checker
FMS-PT-50000-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FMS-PT-50000-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-01: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-03: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-06: CTL 0 0 1 0 1 0 0 0
FMS-PT-50000-CTLFireability-09: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-12: DISJ 0 0 0 0 2 0 2 0
FMS-PT-50000-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
19 CTL EXCL 75/1349 26/32 FMS-PT-50000-CTLFireability-06 6105699 m, 84107 m/sec, 17311338 t fired, .

Time elapsed: 977 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FMS-PT-50000-CTLFireability-05: AG false findpath
FMS-PT-50000-CTLFireability-07: AXAG false state space /EXEF
FMS-PT-50000-CTLFireability-08: CTL true CTL model checker
FMS-PT-50000-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FMS-PT-50000-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-01: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-03: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-06: CTL 0 0 1 0 1 0 0 0
FMS-PT-50000-CTLFireability-09: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-12: DISJ 0 0 0 0 2 0 2 0
FMS-PT-50000-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
19 CTL EXCL 80/1349 27/32 FMS-PT-50000-CTLFireability-06 6365660 m, 51992 m/sec, 18046852 t fired, .

Time elapsed: 982 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FMS-PT-50000-CTLFireability-05: AG false findpath
FMS-PT-50000-CTLFireability-07: AXAG false state space /EXEF
FMS-PT-50000-CTLFireability-08: CTL true CTL model checker
FMS-PT-50000-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FMS-PT-50000-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-01: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-03: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-06: CTL 0 0 1 0 1 0 0 0
FMS-PT-50000-CTLFireability-09: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-12: DISJ 0 0 0 0 2 0 2 0
FMS-PT-50000-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
19 CTL EXCL 85/1349 29/32 FMS-PT-50000-CTLFireability-06 6750391 m, 76946 m/sec, 19101199 t fired, .

Time elapsed: 987 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FMS-PT-50000-CTLFireability-05: AG false findpath
FMS-PT-50000-CTLFireability-07: AXAG false state space /EXEF
FMS-PT-50000-CTLFireability-08: CTL true CTL model checker
FMS-PT-50000-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FMS-PT-50000-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-01: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-03: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-06: CTL 0 0 1 0 1 0 0 0
FMS-PT-50000-CTLFireability-09: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-12: DISJ 0 0 0 0 2 0 2 0
FMS-PT-50000-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
19 CTL EXCL 90/1349 30/32 FMS-PT-50000-CTLFireability-06 7076164 m, 65154 m/sec, 20041396 t fired, .

Time elapsed: 992 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FMS-PT-50000-CTLFireability-05: AG false findpath
FMS-PT-50000-CTLFireability-07: AXAG false state space /EXEF
FMS-PT-50000-CTLFireability-08: CTL true CTL model checker
FMS-PT-50000-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FMS-PT-50000-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-01: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-03: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-06: CTL 0 0 1 0 1 0 0 0
FMS-PT-50000-CTLFireability-09: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-12: DISJ 0 0 0 0 2 0 2 0
FMS-PT-50000-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
19 CTL EXCL 95/1349 31/32 FMS-PT-50000-CTLFireability-06 7326944 m, 50156 m/sec, 20753815 t fired, .

Time elapsed: 997 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
lola: CANCELED task # 19 (type EXCL) for FMS-PT-50000-CTLFireability-06 (memory limit exceeded)
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FMS-PT-50000-CTLFireability-05: AG false findpath
FMS-PT-50000-CTLFireability-07: AXAG false state space /EXEF
FMS-PT-50000-CTLFireability-08: CTL true CTL model checker
FMS-PT-50000-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FMS-PT-50000-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
FMS-PT-50000-CTLFireability-01: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-03: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-06: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-09: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-12: DISJ 0 0 0 0 2 0 2 0
FMS-PT-50000-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 1002 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
lola: LAUNCH task # 1 (type EXCL) for 0 FMS-PT-50000-CTLFireability-00
lola: time limit : 2598 sec
lola: memory limit: 32 pages
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FMS-PT-50000-CTLFireability-05: AG false findpath
FMS-PT-50000-CTLFireability-07: AXAG false state space /EXEF
FMS-PT-50000-CTLFireability-08: CTL true CTL model checker
FMS-PT-50000-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FMS-PT-50000-CTLFireability-00: CTL 0 0 1 0 1 0 0 0
FMS-PT-50000-CTLFireability-01: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-03: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-06: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-09: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-12: DISJ 0 0 0 0 2 0 2 0
FMS-PT-50000-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
1 CTL EXCL 5/2598 3/32 FMS-PT-50000-CTLFireability-00 584564 m, 116912 m/sec, 734567 t fired, .

Time elapsed: 1007 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FMS-PT-50000-CTLFireability-05: AG false findpath
FMS-PT-50000-CTLFireability-07: AXAG false state space /EXEF
FMS-PT-50000-CTLFireability-08: CTL true CTL model checker
FMS-PT-50000-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FMS-PT-50000-CTLFireability-00: CTL 0 0 1 0 1 0 0 0
FMS-PT-50000-CTLFireability-01: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-03: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-06: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-09: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-12: DISJ 0 0 0 0 2 0 2 0
FMS-PT-50000-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
1 CTL EXCL 10/2598 8/32 FMS-PT-50000-CTLFireability-00 1598170 m, 202721 m/sec, 1998178 t fired, .

Time elapsed: 1012 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FMS-PT-50000-CTLFireability-05: AG false findpath
FMS-PT-50000-CTLFireability-07: AXAG false state space /EXEF
FMS-PT-50000-CTLFireability-08: CTL true CTL model checker
FMS-PT-50000-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FMS-PT-50000-CTLFireability-00: CTL 0 0 1 0 1 0 0 0
FMS-PT-50000-CTLFireability-01: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-03: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-06: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-09: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-12: DISJ 0 0 0 0 2 0 2 0
FMS-PT-50000-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
1 CTL EXCL 15/2598 12/32 FMS-PT-50000-CTLFireability-00 2547469 m, 189859 m/sec, 3197483 t fired, .

Time elapsed: 1017 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FMS-PT-50000-CTLFireability-05: AG false findpath
FMS-PT-50000-CTLFireability-07: AXAG false state space /EXEF
FMS-PT-50000-CTLFireability-08: CTL true CTL model checker
FMS-PT-50000-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FMS-PT-50000-CTLFireability-00: CTL 0 0 1 0 1 0 0 0
FMS-PT-50000-CTLFireability-01: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-03: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-06: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-09: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-12: DISJ 0 0 0 0 2 0 2 0
FMS-PT-50000-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
1 CTL EXCL 20/2598 14/32 FMS-PT-50000-CTLFireability-00 3184596 m, 127425 m/sec, 3984613 t fired, .

Time elapsed: 1022 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FMS-PT-50000-CTLFireability-05: AG false findpath
FMS-PT-50000-CTLFireability-07: AXAG false state space /EXEF
FMS-PT-50000-CTLFireability-08: CTL true CTL model checker
FMS-PT-50000-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FMS-PT-50000-CTLFireability-00: CTL 0 0 1 0 1 0 0 0
FMS-PT-50000-CTLFireability-01: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-03: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-06: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-09: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-12: DISJ 0 0 0 0 2 0 2 0
FMS-PT-50000-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
1 CTL EXCL 25/2598 18/32 FMS-PT-50000-CTLFireability-00 3936521 m, 150385 m/sec, 4936541 t fired, .

Time elapsed: 1027 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FMS-PT-50000-CTLFireability-05: AG false findpath
FMS-PT-50000-CTLFireability-07: AXAG false state space /EXEF
FMS-PT-50000-CTLFireability-08: CTL true CTL model checker
FMS-PT-50000-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FMS-PT-50000-CTLFireability-00: CTL 0 0 1 0 1 0 0 0
FMS-PT-50000-CTLFireability-01: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-03: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-06: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-09: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-12: DISJ 0 0 0 0 2 0 2 0
FMS-PT-50000-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
1 CTL EXCL 30/2598 21/32 FMS-PT-50000-CTLFireability-00 4689805 m, 150656 m/sec, 5884708 t fired, .

Time elapsed: 1032 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FMS-PT-50000-CTLFireability-05: AG false findpath
FMS-PT-50000-CTLFireability-07: AXAG false state space /EXEF
FMS-PT-50000-CTLFireability-08: CTL true CTL model checker
FMS-PT-50000-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FMS-PT-50000-CTLFireability-00: CTL 0 0 1 0 1 0 0 0
FMS-PT-50000-CTLFireability-01: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-03: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-06: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-09: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-12: DISJ 0 0 0 0 2 0 2 0
FMS-PT-50000-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
1 CTL EXCL 35/2598 24/32 FMS-PT-50000-CTLFireability-00 5448729 m, 151784 m/sec, 6823095 t fired, .

Time elapsed: 1037 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FMS-PT-50000-CTLFireability-05: AG false findpath
FMS-PT-50000-CTLFireability-07: AXAG false state space /EXEF
FMS-PT-50000-CTLFireability-08: CTL true CTL model checker
FMS-PT-50000-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FMS-PT-50000-CTLFireability-00: CTL 0 0 1 0 1 0 0 0
FMS-PT-50000-CTLFireability-01: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-03: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-06: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-09: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-12: DISJ 0 0 0 0 2 0 2 0
FMS-PT-50000-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
1 CTL EXCL 40/2598 28/32 FMS-PT-50000-CTLFireability-00 6244101 m, 159074 m/sec, 7816152 t fired, .

Time elapsed: 1042 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FMS-PT-50000-CTLFireability-05: AG false findpath
FMS-PT-50000-CTLFireability-07: AXAG false state space /EXEF
FMS-PT-50000-CTLFireability-08: CTL true CTL model checker
FMS-PT-50000-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FMS-PT-50000-CTLFireability-00: CTL 0 0 1 0 1 0 0 0
FMS-PT-50000-CTLFireability-01: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-03: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-06: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-09: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-12: DISJ 0 0 0 0 2 0 2 0
FMS-PT-50000-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
1 CTL EXCL 45/2598 32/32 FMS-PT-50000-CTLFireability-00 7095397 m, 170259 m/sec, 8893097 t fired, .

Time elapsed: 1047 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
lola: CANCELED task # 1 (type EXCL) for FMS-PT-50000-CTLFireability-00 (memory limit exceeded)
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FMS-PT-50000-CTLFireability-05: AG false findpath
FMS-PT-50000-CTLFireability-07: AXAG false state space /EXEF
FMS-PT-50000-CTLFireability-08: CTL true CTL model checker
FMS-PT-50000-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
FMS-PT-50000-CTLFireability-00: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-01: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-03: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-06: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-09: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-12: DISJ 0 0 0 0 2 0 2 0
FMS-PT-50000-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
FMS-PT-50000-CTLFireability-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 1052 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
lola: Portfolio finished: no open tasks 16

FINAL RESULTS
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
FMS-PT-50000-CTLFireability-00: CTL unknown AGGR
FMS-PT-50000-CTLFireability-01: CTL unknown AGGR
FMS-PT-50000-CTLFireability-02: CTL unknown AGGR
FMS-PT-50000-CTLFireability-03: CTL unknown AGGR
FMS-PT-50000-CTLFireability-04: CTL unknown AGGR
FMS-PT-50000-CTLFireability-05: AG false findpath
FMS-PT-50000-CTLFireability-06: CTL unknown AGGR
FMS-PT-50000-CTLFireability-07: AXAG false state space /EXEF
FMS-PT-50000-CTLFireability-08: CTL true CTL model checker
FMS-PT-50000-CTLFireability-09: CTL unknown AGGR
FMS-PT-50000-CTLFireability-10: CTL unknown AGGR
FMS-PT-50000-CTLFireability-11: CTL unknown AGGR
FMS-PT-50000-CTLFireability-12: DISJ unknown DISJ
FMS-PT-50000-CTLFireability-13: CTL unknown AGGR
FMS-PT-50000-CTLFireability-14: CTL unknown AGGR
FMS-PT-50000-CTLFireability-15: CTL true CTL model checker


Time elapsed: 1052 secs. Pages in use: 32

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="FMS-PT-50000"
export BK_EXAMINATION="CTLFireability"
export BK_TOOL="lola"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-4028"
echo " Executing tool lola"
echo " Input is FMS-PT-50000, examination is CTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r080-tall-162048871500834"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/FMS-PT-50000.tgz
mv FMS-PT-50000 execution
cd execution
if [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "UpperBounds" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] || [ "CTLFireability" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property CTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "CTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' CTLFireability.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] ; then
echo "FORMULA_NAME CTLFireability"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;