MCC'2021- Execution of r080-tall-162048871400802

About the Execution of LoLA for FMS-PT-02000

Execution Summary
Max Memory Used (MB)	Time wait (ms)	CPU Usage (ms)	I/O Wait (ms)	Computed Result	Execution Status
6601.224	542615.00	578067.00	1468.50	F???F??F??TT???F	normal

Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/data/fkordon/mcc2021-inp
Waiting for the VM to
...............................
=========
Generated by BenchKit 2-4028
Executing tool lola
Input is FMS-PT-02000,
Time confinement is
Memory confinement
Number of cores is 4
Run identifier is
===============================

--------------------
preparation of the directory
/home/mcc/execution
total 444K
-rw-r--r-- 1 mcc users
-rw-r--r-- 1 mcc users
-rw-r--r-- 1 mcc users
-rw-r--r-- 1 mcc users
-rw-r--r-- 1 mcc users 4.2K May
-rw-r--r-- 1 mcc users 6.3K May
-rw-r--r-- 1 mcc users
-rw-r--r-- 1 mcc users
-rw-r--r-- 1 mcc users
-rw-r--r-- 1 mcc users
-rw-r--r-- 1 mcc users
-rw-r--r-- 1 mcc users
-rw-r--r-- 1 mcc users
-rw-r--r-- 1 mcc users
-rw-r--r-- 1 mcc users
-rw-r--r-- 1 mcc users
-rw-r--r-- 1 mcc users
-rw-r--r-- 1 mcc users
-rw-r--r-- 1 mcc users
-rw-r--r-- 1 mcc users

--------------------
content from stdout:

=== Data for post analysis

The expected result is
BOOL_VECTOR

here is the order used
FORMULA_NAME FMS-PT-02000-CTLFi
FORMULA_NAME FMS-PT-02000-CTLFi
FORMULA_NAME FMS-PT-02000-CTLFi
FORMULA_NAME FMS-PT-02000-CTLFi
FORMULA_NAME FMS-PT-02000-CTLFi
FORMULA_NAME FMS-PT-02000-CTLFi
FORMULA_NAME FMS-PT-02000-CTLFi
FORMULA_NAME FMS-PT-02000-CTLFi
FORMULA_NAME FMS-PT-02000-CTLFi
FORMULA_NAME FMS-PT-02000-CTLFi
FORMULA_NAME FMS-PT-02000-CTLFi
FORMULA_NAME FMS-PT-02000-CTLFi
FORMULA_NAME FMS-PT-02000-CTLFi
FORMULA_NAME FMS-PT-02000-CTLFi
FORMULA_NAME FMS-PT-02000-CTLFi
FORMULA_NAME FMS-PT-02000-CTLFi

=== Now, execution of

BK_START 1620742766093

starting LoLA
BK_INPUT FMS-PT-02000
BK_EXAMINATION: CTLFireability
bin directory: /home/mcc/BenchK
current directory: /home/mcc/ex
CTLFireability

FORMULA FMS-PT-02000-CTLFireability-11

FORMULA FMS-PT-02000-CTLFireability-10

FORMULA FMS-PT-02000-CTLFireability-07

FORMULA FMS-PT-02000-CTLFireability-04

FORMULA FMS-PT-02000-CTLFireability-00

FORMULA FMS-PT-02000-CTLFireability-15

BK_STOP 1620743308708

--------------------
content from stderr:

lola: MEM LIMIT 32
lola: MEM LIMIT 5
lola: NET
lola: input: PNML file
lola: reading net from
lola: reading pnml
lola: PNML file contains
lola: finished parsing
lola: closed net file
lola: Reading formula.
lola: Using XML format
lola: reading XML formula
lola: reading formula
lola: rewrite Frontend/Parser
lola: rewrite Frontend/Parser
lola: rewrite Frontend/Parser
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lola: RELEASE
lola: RELEASE
lola: RELEASE
lola: RELEASE
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lola: rewrite Frontend/Parser
lola: rewrite Frontend/Parser
lola: rewrite Frontend/Parser
lola: rewrite Frontend/Parser
lola: rewrite Frontend/Parser
lola: RELEASE
lola: RELEASE
lola: Created skeleton
lola: Created skeleton
lola: Created skeleton
lola: Created skeleton
lola: Created skeleton
lola: Created skeleton
lola: Created skeleton
lola: Created skeleton
lola: Created skeleton
lola: Rule S: 0 transitions
lola: Created skeleton
lola: Created skeleton
lola: Created skeleton
lola: Created skeleton
lola: Created skeleton
lola: Created skeleton
lola: Created skeleton
lola: rewrite Frontend/Parser
lola: rewrite Frontend/Parser
lola: rewrite Frontend/Parser
lola: rewrite Frontend/Parser
lola: rewrite Frontend/Parser
lola: rewrite Frontend/Parser
lola: rewrite Frontend/Parser
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lola: rewrite Frontend/Parser
lola: rewrite Frontend/Parser
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lola: rewrite Frontend/Parser
lola: rewrite Frontend/Parser
lola: rewrite Frontend/Parser
lola: rewrite Frontend/Parser
lola: rewrite Frontend/Parser
lola: rewrite Frontend/Parser
lola: rewrite Frontend/Parser
lola: rewrite Frontend/Parser
lola: Created skeleton
lola: Created skeleton
lola: rewrite Frontend/Parser
lola: rewrite Frontend/Parser
lola: rewrite Frontend/Parser
lola: rewrite Frontend/Parser
lola: rewrite Frontend/Parser
lola: rewrite Frontend/Parser
lola: rewrite Frontend/Parser
lola: rewrite Frontend/Parser
lola: rewrite Frontend/Parser
lola: rewrite Frontend/Parser
lola: LAUNCH task #
lola: time limit : 180 sec
lola: memory limit: 32 pages
lola: rewrite Frontend/Parser
lola: rewrite Frontend/Parser
lola: rewrite Frontend/Parser
lola: rewrite Frontend/Parser
lola: rewrite Frontend/Parser
lola: rewrite Frontend/Parser
lola: rewrite Frontend/Parser
lola: rewrite Frontend/Parser
lola: rewrite Frontend/Parser
lola: rewrite Frontend/Parser
lola: rewrite Frontend/Parser
lola: rewrite Frontend/Parser
lola: rewrite Frontend/Parser
lola: rewrite Frontend/Parser
lola: Created skeleton
lola: rewrite Frontend/Parser
lola: rewrite Frontend/Parser
lola: rewrite Frontend/Parser
lola: rewrite Frontend/Parser
lola: rewrite Frontend/Parser
lola: rewrite Frontend/Parser
lola: rewrite Frontend/Parser
lola: rewrite Frontend/Parser
lola: rewrite Frontend/Parser
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lola: rewrite Frontend/Parser
lola: rewrite Frontend/Parser
lola: rewrite Frontend/Parser
lola: rewrite Frontend/Parser
lola: rewrite Frontend/Parser
lola: rewrite Frontend/Parser
lola: rewrite Frontend/Parser
lola: FINISHED task
lola: result
lola: time used :
lola: memory pages used :
lola: rewrite Frontend/Parser
lola: rewrite Frontend/Parser
lola: rewrite Frontend/Parser
lola: rewrite Frontend/Parser
lola: rewrite Frontend/Parser
lola: rewrite Frontend/Parser
lola: rewrite Frontend/Parser
lola: rewrite Frontend/Parser
lola: rewrite Frontend/Parser
lola: rewrite Frontend/Parser
lola: LAUNCH task #
lola: time limit : 199 sec
lola: memory limit: 32 pages
lola: rewrite Frontend/Parser
lola: rewrite Frontend/Parser
lola: rewrite Frontend/Parser
lola: rewrite Frontend/Parser
lola: rewrite Frontend/Parser
lola: rewrite Frontend/Parser
lola: rewrite Frontend/Parser
lola: rewrite Frontend/Parser
lola: rewrite Frontend/Parser
lola: rewrite Frontend/Parser
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lola: rewrite Frontend/Parser
lola: rewrite Frontend/Parser
lola: rewrite Frontend/Parser
lola: FINISHED task
lola: result
lola: markings :
lola: fired transitions :
lola: time used :
lola: memory pages used :
lola: LAUNCH task #
lola: time limit : 211 sec
lola: memory limit: 32 pages
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============================================================ examination is CTLFireability 3600 seconds is 16384 MBytes r080-tall-162048871400802 ====================================== to be used: 16K May 5 16:58 CTLCardinality.txt 156K May 10 09:43 CTLCardinality.xml 12K May 5 16:58 CTLFireability.txt 112K May 10 09:43 CTLFireability.xml 6 14:48 GenericPropertiesDefinition.xml 6 14:48 GenericPropertiesVerdict.xml 3.3K Mar 28 16:09 LTLCardinality.txt 25K Mar 28 16:09 LTLCardinality.xml 1.9K Mar 28 16:09 LTLFireability.txt 16K Mar 28 16:09 LTLFireability.xml 3.8K Mar 23 10:44 ReachabilityCardinality.txt 20K Mar 23 10:44 ReachabilityCardinality.xml 2.5K Mar 22 18:47 ReachabilityFireability.txt 15K Mar 22 18:47 ReachabilityFireability.xml 1.5K Mar 22 09:11 UpperBounds.txt 3.6K Mar 22 09:11 UpperBounds.xml 6 May 5 16:51 equiv_col 6 May 5 16:51 instance 6 May 5 16:51 iscolored 16K May 5 16:51 model.pnml generated by BenchKit (invocation template) a vector of booleans to build the result vector(from text file) reability-00 reability-01 reability-02 reability-03 reability-04 reability-05 reability-06 reability-07 reability-08 reability-09 reability-10 reability-11 reability-12 reability-13 reability-14 reability-15 the tool begins it/bin ecution TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT (--pnmlnet) /home/mcc/execution/model.pnml place/transition net /home/mcc/execution/model.pnml (--xmlformula) from /home/mcc/execution/CTLFireability.xml /formula_rewrite.k:322 /formula_rewrite.k:328 /formula_rewrite.k:296 /formula_rewrite.k:325 /formula_rewrite.k:331 /formula_rewrite.k:299 /formula_rewrite.k:544 /formula_rewrite.k:388 /formula_rewrite.k:550 /formula_rewrite.k:322 /formula_rewrite.k:331 /formula_rewrite.k:317 /formula_rewrite.k:322 /formula_rewrite.k:334 /formula_rewrite.k:322 /formula_rewrite.k:328 /formula_rewrite.k:296 /formula_rewrite.k:314 /formula_rewrite.k:322 /formula_rewrite.k:334 /formula_rewrite.k:322 /formula_rewrite.k:331 /formula_rewrite.k:296 /formula_rewrite.k:322 /formula_rewrite.k:334 /formula_rewrite.k:322 /formula_rewrite.k:331 /formula_rewrite.k:296 /formula_rewrite.k:325 /formula_rewrite.k:328 /formula_rewrite.k:314 /formula_rewrite.k:325 /formula_rewrite.k:334 /formula_rewrite.k:325 /formula_rewrite.k:331 /formula_rewrite.k:299 /formula_rewrite.k:317 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/formula_rewrite.k:331 /formula_rewrite.k:296 /formula_rewrite.k:296 /formula_rewrite.k:314 /formula_rewrite.k:317 /formula_rewrite.k:325 /formula_rewrite.k:337 /formula_rewrite.k:296 /formula_rewrite.k:296 /formula_rewrite.k:296 /formula_rewrite.k:296 /formula_rewrite.k:314 /formula_rewrite.k:317 /formula_rewrite.k:325 /formula_rewrite.k:334 /formula_rewrite.k:296 /formula_rewrite.k:322 /formula_rewrite.k:328 /formula_rewrite.k:296 /formula_rewrite.k:314 /formula_rewrite.k:317 /formula_rewrite.k:299 /formula_rewrite.k:325 /formula_rewrite.k:328 /formula_rewrite.k:299 /formula_rewrite.k:314 /formula_rewrite.k:325 /formula_rewrite.k:337 /formula_rewrite.k:296 /formula_rewrite.k:296 /formula_rewrite.k:322 /formula_rewrite.k:328 /formula_rewrite.k:317 /formula_rewrite.k:325 /formula_rewrite.k:337 /formula_rewrite.k:296 /formula_rewrite.k:296 /formula_rewrite.k:325 /formula_rewrite.k:334 /formula_rewrite.k:296 /formula_rewrite.k:322 /formula_rewrite.k:328 /formula_rewrite.k:317 /formula_rewrite.k:325 /formula_rewrite.k:334 /formula_rewrite.k:296 /formula_rewrite.k:325 /formula_rewrite.k:334 /formula_rewrite.k:314 /formula_rewrite.k:296 /formula_rewrite.k:322 /formula_rewrite.k:337 /formula_rewrite.k:296 /formula_rewrite.k:296 /formula_rewrite.k:475 /formula_rewrite.k:322 /formula_rewrite.k:328 /formula_rewrite.k:296 /formula_rewrite.k:325 /formula_rewrite.k:337 /formula_rewrite.k:296 /formula_rewrite.k:314 /formula_rewrite.k:322 /formula_rewrite.k:337 /formula_rewrite.k:296 /formula_rewrite.k:296 /formula_rewrite.k:325 /formula_rewrite.k:328 /formula_rewrite.k:296 in 0.000000 secs. in 0.000000 secs. in 0.000000 secs. in 0.000000 secs. in 0.000000 secs. in 0.000000 secs. in 0.000000 secs. in 0.000000 secs. in 0.000000 secs. removed,0 places removed in 0.000000 secs. in 0.000000 secs. in 0.000000 secs. in 0.000000 secs. in 0.000000 secs. in 0.000000 secs. in 0.000000 secs. /formula_rewrite.k:807 /formula_rewrite.k:806 /formula_rewrite.k:813 /formula_rewrite.k:808 /formula_rewrite.k:810 /formula_rewrite.k:811 /formula_rewrite.k:815 /formula_rewrite.k:814 /formula_rewrite.k:814 /formula_rewrite.k:808 /formula_rewrite.k:813 /formula_rewrite.k:806 /formula_rewrite.k:806 /formula_rewrite.k:812 /formula_rewrite.k:813 /formula_rewrite.k:807 /formula_rewrite.k:810 /formula_rewrite.k:811 /formula_rewrite.k:812 /formula_rewrite.k:809 /formula_rewrite.k:809 /formula_rewrite.k:813 /formula_rewrite.k:812 /formula_rewrite.k:814 in 0.000000 secs. in 0.000000 secs. /formula_rewrite.k:811 /formula_rewrite.k:806 /formula_rewrite.k:813 /formula_rewrite.k:807 /formula_rewrite.k:807 /formula_rewrite.k:806 /formula_rewrite.k:806 /formula_rewrite.k:812 /formula_rewrite.k:814 /formula_rewrite.k:806 47 (type EXCL) for 40 FMS-PT-02000-CTLFireability-12 /formula_rewrite.k:811 /formula_rewrite.k:810 /formula_rewrite.k:814 /formula_rewrite.k:813 /formula_rewrite.k:812 /formula_rewrite.k:809 /formula_rewrite.k:807 /formula_rewrite.k:813 /formula_rewrite.k:812 /formula_rewrite.k:811 /formula_rewrite.k:812 /formula_rewrite.k:811 /formula_rewrite.k:812 /formula_rewrite.k:811 in 0.000000 secs. /formula_rewrite.k:815 /formula_rewrite.k:808 /formula_rewrite.k:812 /formula_rewrite.k:815 /formula_rewrite.k:813 /formula_rewrite.k:807 /formula_rewrite.k:809 /formula_rewrite.k:815 /formula_rewrite.k:808 /formula_rewrite.k:814 /formula_rewrite.k:806 /formula_rewrite.k:814 /formula_rewrite.k:815 /formula_rewrite.k:808 /formula_rewrite.k:810 /formula_rewrite.k:813 /formula_rewrite.k:813 # 47 (type EXCL) for FMS-PT-02000-CTLFireability-12 : false 1.000000 1 /formula_rewrite.k:813 /formula_rewrite.k:812 /formula_rewrite.k:811 /formula_rewrite.k:809 /formula_rewrite.k:806 /formula_rewrite.k:810 /formula_rewrite.k:813 /formula_rewrite.k:811 /formula_rewrite.k:813 /formula_rewrite.k:810 38 (type EXCL) for 37 FMS-PT-02000-CTLFireability-11 /formula_rewrite.k:810 /formula_rewrite.k:814 /formula_rewrite.k:808 /formula_rewrite.k:813 /formula_rewrite.k:812 /formula_rewrite.k:806 /formula_rewrite.k:806 /formula_rewrite.k:806 /formula_rewrite.k:807 /formula_rewrite.k:806 /formula_rewrite.k:813 /formula_rewrite.k:813 /formula_rewrite.k:807 /formula_rewrite.k:806 /formula_rewrite.k:808 /formula_rewrite.k:808 /formula_rewrite.k:811 /formula_rewrite.k:812 /formula_rewrite.k:813 /formula_rewrite.k:806 /formula_rewrite.k:806 /formula_rewrite.k:813 /formula_rewrite.k:811 /formula_rewrite.k:808 /formula_rewrite.k:815 /formula_rewrite.k:812 /formula_rewrite.k:806 /formula_rewrite.k:811 /formula_rewrite.k:815 /formula_rewrite.k:815 /formula_rewrite.k:812 /formula_rewrite.k:806 /formula_rewrite.k:815 /formula_rewrite.k:812 /formula_rewrite.k:810 /formula_rewrite.k:812 /formula_rewrite.k:806 # 38 (type EXCL) for FMS-PT-02000-CTLFireability-11 : true 93971 121990 0.000000 1 55 (type EXCL) for 54 FMS-PT-02000-CTLFireability-14 VALUE PRODUCED BY CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 2 0 0 4 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS 4/32 FMS-PT-02000-CTLFireability-14 787530 m, 157506 m/sec, 1443332 t fired, . Pages in use: 4 4 Visible: 16 VALUE PRODUCED BY CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 2 0 0 4 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS 7/32 FMS-PT-02000-CTLFireability-14 1582031 m, 158900 m/sec, 2901088 t fired, . Pages in use: 7 4 Visible: 16 VALUE PRODUCED BY CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 2 0 0 4 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS 10/32 FMS-PT-02000-CTLFireability-14 2308061 m, 145206 m/sec, 4230967 t fired, . Pages in use: 10 4 Visible: 16 VALUE PRODUCED BY CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 2 0 0 4 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS 14/32 FMS-PT-02000-CTLFireability-14 3119250 m, 162237 m/sec, 5718469 t fired, . Pages in use: 14 4 Visible: 16 VALUE PRODUCED BY CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 2 0 0 4 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS 17/32 FMS-PT-02000-CTLFireability-14 3860366 m, 148223 m/sec, 7075500 t fired, . Pages in use: 17 4 Visible: 16 VALUE PRODUCED BY CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 2 0 0 4 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS 21/32 FMS-PT-02000-CTLFireability-14 4645341 m, 156995 m/sec, 8514356 t fired, . Pages in use: 21 4 Visible: 16 VALUE PRODUCED BY CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 2 0 0 4 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS 24/32 FMS-PT-02000-CTLFireability-14 5393560 m, 149643 m/sec, 9886212 t fired, . Pages in use: 24 4 Visible: 16 VALUE PRODUCED BY CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 2 0 0 4 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS 28/32 FMS-PT-02000-CTLFireability-14 6170003 m, 155288 m/sec, 11308918 t fired, . Pages in use: 28 4 Visible: 16 VALUE PRODUCED BY CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 2 0 0 4 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS 31/32 FMS-PT-02000-CTLFireability-14 6969923 m, 159984 m/sec, 12775451 t fired, . Pages in use: 31 4 Visible: 16 # 55 (type EXCL) for FMS-PT-02000-CTLFireability-14 (memory limit exceeded) VALUE PRODUCED BY CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 2 0 0 4 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS Pages in use: 32 4 Visible: 16 52 (type EXCL) for 51 FMS-PT-02000-CTLFireability-13 VALUE PRODUCED BY CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 2 0 0 4 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS 3/32 FMS-PT-02000-CTLFireability-13 664356 m, 132871 m/sec, 1867836 t fired, . Pages in use: 32 4 Visible: 16 VALUE PRODUCED BY CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 2 0 0 4 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS 7/32 FMS-PT-02000-CTLFireability-13 1438657 m, 154860 m/sec, 4061258 t fired, . Pages in use: 32 4 Visible: 16 VALUE PRODUCED BY CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 2 0 0 4 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS 9/32 FMS-PT-02000-CTLFireability-13 2070738 m, 126416 m/sec, 5852962 t fired, . Pages in use: 32 4 Visible: 16 VALUE PRODUCED BY CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 2 0 0 4 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS 13/32 FMS-PT-02000-CTLFireability-13 2770827 m, 140017 m/sec, 7835102 t fired, . Pages in use: 32 4 Visible: 16 VALUE PRODUCED BY CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 2 0 0 4 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS 15/32 FMS-PT-02000-CTLFireability-13 3416275 m, 129089 m/sec, 9663701 t fired, . Pages in use: 32 4 Visible: 16 VALUE PRODUCED BY CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 2 0 0 4 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS 18/32 FMS-PT-02000-CTLFireability-13 4035150 m, 123775 m/sec, 11415507 t fired, . Pages in use: 32 4 Visible: 16 VALUE PRODUCED BY CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 2 0 0 4 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS 21/32 FMS-PT-02000-CTLFireability-13 4654653 m, 123900 m/sec, 13171636 t fired, . Pages in use: 32 4 Visible: 16 VALUE PRODUCED BY CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 2 0 0 4 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS 24/32 FMS-PT-02000-CTLFireability-13 5318987 m, 132866 m/sec, 15052650 t fired, . Pages in use: 32 4 Visible: 16 VALUE PRODUCED BY CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 2 0 0 4 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS 27/32 FMS-PT-02000-CTLFireability-13 5981017 m, 132406 m/sec, 16928829 t fired, . Pages in use: 32 4 Visible: 16 VALUE PRODUCED BY CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 2 0 0 4 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS 29/32 FMS-PT-02000-CTLFireability-13 6604671 m, 124730 m/sec, 18695228 t fired, . Pages in use: 32 4 Visible: 16 VALUE PRODUCED BY CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 2 0 0 4 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS 32/32 FMS-PT-02000-CTLFireability-13 7221871 m, 123440 m/sec, 20444007 t fired, . Pages in use: 32 4 Visible: 16 # 52 (type EXCL) for FMS-PT-02000-CTLFireability-13 (memory limit exceeded) VALUE PRODUCED BY CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 DISJ 0 2 0 0 4 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS Pages in use: 32 4 Visible: 16 35 (type EXCL) for 34 FMS-PT-02000-CTLFireability-10 # 35 (type EXCL) for FMS-PT-02000-CTLFireability-10 : true 6008 14019 0.000000 1 32 (type EXCL) for 31 FMS-PT-02000-CTLFireability-09 VALUE PRODUCED BY CTL true CTL model checker CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 DISJ 0 2 0 0 4 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS 3/32 FMS-PT-02000-CTLFireability-09 630726 m, 126145 m/sec, 1744163 t fired, . Pages in use: 32 4 Visible: 16 VALUE PRODUCED BY CTL true CTL model checker CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 DISJ 0 2 0 0 4 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS 6/32 FMS-PT-02000-CTLFireability-09 1284046 m, 130664 m/sec, 3595780 t fired, . Pages in use: 32 4 Visible: 16 VALUE PRODUCED BY CTL true CTL model checker CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 DISJ 0 2 0 0 4 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS 9/32 FMS-PT-02000-CTLFireability-09 2005787 m, 144348 m/sec, 5640371 t fired, . Pages in use: 32 4 Visible: 16 VALUE PRODUCED BY CTL true CTL model checker CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 DISJ 0 2 0 0 4 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS 12/32 FMS-PT-02000-CTLFireability-09 2608632 m, 120569 m/sec, 7348607 t fired, . Pages in use: 32 4 Visible: 16 VALUE PRODUCED BY CTL true CTL model checker CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 DISJ 0 2 0 0 4 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS 15/32 FMS-PT-02000-CTLFireability-09 3253395 m, 128952 m/sec, 9174572 t fired, . Pages in use: 32 4 Visible: 16 VALUE PRODUCED BY CTL true CTL model checker CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 DISJ 0 2 0 0 4 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS 18/32 FMS-PT-02000-CTLFireability-09 3874013 m, 124123 m/sec, 10933642 t fired, . Pages in use: 32 4 Visible: 16 VALUE PRODUCED BY CTL true CTL model checker CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 DISJ 0 2 0 0 4 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS 20/32 FMS-PT-02000-CTLFireability-09 4433440 m, 111885 m/sec, 12517784 t fired, . Pages in use: 32 4 Visible: 16 VALUE PRODUCED BY CTL true CTL model checker CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 DISJ 0 2 0 0 4 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS 23/32 FMS-PT-02000-CTLFireability-09 5105049 m, 134321 m/sec, 14420611 t fired, . Pages in use: 32 4 Visible: 16 VALUE PRODUCED BY CTL true CTL model checker CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 DISJ 0 2 0 0 4 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS 26/32 FMS-PT-02000-CTLFireability-09 5696458 m, 118281 m/sec, 16095060 t fired, . Pages in use: 32 4 Visible: 16 VALUE PRODUCED BY CTL true CTL model checker CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 DISJ 0 2 0 0 4 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS 29/32 FMS-PT-02000-CTLFireability-09 6368383 m, 134385 m/sec, 17998378 t fired, . Pages in use: 32 4 Visible: 16 VALUE PRODUCED BY CTL true CTL model checker CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 DISJ 0 2 0 0 4 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS 32/32 FMS-PT-02000-CTLFireability-09 7071751 m, 140673 m/sec, 19991730 t fired, . Pages in use: 32 4 Visible: 16 # 32 (type EXCL) for FMS-PT-02000-CTLFireability-09 (memory limit exceeded) VALUE PRODUCED BY CTL true CTL model checker CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 2 0 0 4 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS Pages in use: 32 4 Visible: 16 29 (type EXCL) for 28 FMS-PT-02000-CTLFireability-08 VALUE PRODUCED BY CTL true CTL model checker CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 2 0 0 4 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS 5/32 FMS-PT-02000-CTLFireability-08 1032493 m, 206498 m/sec, 1892469 t fired, . Pages in use: 32 4 Visible: 16 VALUE PRODUCED BY CTL true CTL model checker CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 2 0 0 4 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS 9/32 FMS-PT-02000-CTLFireability-08 1935137 m, 180528 m/sec, 3547305 t fired, . Pages in use: 32 4 Visible: 16 VALUE PRODUCED BY CTL true CTL model checker CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 2 0 0 4 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS 13/32 FMS-PT-02000-CTLFireability-08 2833681 m, 179708 m/sec, 5193944 t fired, . Pages in use: 32 4 Visible: 16 VALUE PRODUCED BY CTL true CTL model checker CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 2 0 0 4 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS 17/32 FMS-PT-02000-CTLFireability-08 3733885 m, 180040 m/sec, 6843903 t fired, . Pages in use: 32 4 Visible: 16 VALUE PRODUCED BY CTL true CTL model checker CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 2 0 0 4 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS 21/32 FMS-PT-02000-CTLFireability-08 4666791 m, 186581 m/sec, 8555061 t fired, . Pages in use: 32 4 Visible: 16 VALUE PRODUCED BY CTL true CTL model checker CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 2 0 0 4 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS 25/32 FMS-PT-02000-CTLFireability-08 5536602 m, 173962 m/sec, 10148435 t fired, . Pages in use: 32 4 Visible: 16 VALUE PRODUCED BY CTL true CTL model checker CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 2 0 0 4 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS 28/32 FMS-PT-02000-CTLFireability-08 6307114 m, 154102 m/sec, 11559539 t fired, . Pages in use: 32 4 Visible: 16 # 29 (type EXCL) for FMS-PT-02000-CTLFireability-08 (memory limit exceeded) VALUE PRODUCED BY CTL true CTL model checker CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 2 0 0 4 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS Pages in use: 32 4 Visible: 16 26 (type EXCL) for 25 FMS-PT-02000-CTLFireability-07 # 26 (type EXCL) for FMS-PT-02000-CTLFireability-07 : false 91975 117978 0.000000 1 20 (type EXCL) for 19 FMS-PT-02000-CTLFireability-05 VALUE PRODUCED BY CTL false CTL model checker CTL true CTL model checker CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 2 0 0 4 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS 7/32 FMS-PT-02000-CTLFireability-05 1470232 m, 294046 m/sec, 1838418 t fired, . Pages in use: 32 4 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker CTL true CTL model checker CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 2 0 0 4 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS 12/32 FMS-PT-02000-CTLFireability-05 2651440 m, 236241 m/sec, 3315159 t fired, . Pages in use: 32 4 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker CTL true CTL model checker CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 2 0 0 4 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS 17/32 FMS-PT-02000-CTLFireability-05 3840523 m, 237816 m/sec, 4801004 t fired, . Pages in use: 32 4 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker CTL true CTL model checker CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 2 0 0 4 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS 24/32 FMS-PT-02000-CTLFireability-05 5287664 m, 289428 m/sec, 6610327 t fired, . Pages in use: 32 4 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker CTL true CTL model checker CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 2 0 0 4 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS 29/32 FMS-PT-02000-CTLFireability-05 6558991 m, 254265 m/sec, 8199812 t fired, . Pages in use: 32 4 Visible: 16 # 20 (type EXCL) for FMS-PT-02000-CTLFireability-05 (memory limit exceeded) VALUE PRODUCED BY CTL false CTL model checker CTL true CTL model checker CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 2 0 0 4 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS Pages in use: 32 4 Visible: 16 17 (type EXCL) for 16 FMS-PT-02000-CTLFireability-04 # 17 (type EXCL) for FMS-PT-02000-CTLFireability-04 : false 35996 42004 0.000000 1 14 (type EXCL) for 13 FMS-PT-02000-CTLFireability-03 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL true CTL model checker CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 2 0 0 4 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS 4/32 FMS-PT-02000-CTLFireability-03 889561 m, 177912 m/sec, 1622685 t fired, . Pages in use: 32 4 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL true CTL model checker CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 2 0 0 4 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS 9/32 FMS-PT-02000-CTLFireability-03 1929138 m, 207915 m/sec, 3528649 t fired, . Pages in use: 32 4 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL true CTL model checker CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 2 0 0 4 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS 13/32 FMS-PT-02000-CTLFireability-03 2972776 m, 208727 m/sec, 5441091 t fired, . Pages in use: 32 4 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL true CTL model checker CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 2 0 0 4 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS 17/32 FMS-PT-02000-CTLFireability-03 3861701 m, 177785 m/sec, 7070848 t fired, . Pages in use: 32 4 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL true CTL model checker CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 2 0 0 4 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS 21/32 FMS-PT-02000-CTLFireability-03 4647575 m, 157174 m/sec, 8510835 t fired, . Pages in use: 32 4 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL true CTL model checker CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 2 0 0 4 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS 25/32 FMS-PT-02000-CTLFireability-03 5598864 m, 190257 m/sec, 10253473 t fired, . Pages in use: 32 4 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL true CTL model checker CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 2 0 0 4 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS 29/32 FMS-PT-02000-CTLFireability-03 6461467 m, 172520 m/sec, 11835714 t fired, . Pages in use: 32 4 Visible: 16 # 14 (type EXCL) for FMS-PT-02000-CTLFireability-03 (memory limit exceeded) VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL true CTL model checker CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 2 0 0 4 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS Pages in use: 32 4 Visible: 16 4 (type EXCL) for 3 FMS-PT-02000-CTLFireability-01 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL true CTL model checker CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 2 0 0 4 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS 5/32 FMS-PT-02000-CTLFireability-01 1085055 m, 217011 m/sec, 1612943 t fired, . Pages in use: 32 4 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL true CTL model checker CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 2 0 0 4 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS 9/32 FMS-PT-02000-CTLFireability-01 2026061 m, 188201 m/sec, 3023734 t fired, . Pages in use: 32 4 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL true CTL model checker CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 2 0 0 4 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS 12/32 FMS-PT-02000-CTLFireability-01 2805628 m, 155913 m/sec, 4192847 t fired, . Pages in use: 32 4 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL true CTL model checker CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 2 0 0 4 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS 16/32 FMS-PT-02000-CTLFireability-01 3686022 m, 176078 m/sec, 5512763 t fired, . Pages in use: 32 4 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL true CTL model checker CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 2 0 0 4 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS 20/32 FMS-PT-02000-CTLFireability-01 4551952 m, 173186 m/sec, 6811721 t fired, . Pages in use: 32 4 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL true CTL model checker CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 2 0 0 4 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS 23/32 FMS-PT-02000-CTLFireability-01 5475577 m, 184725 m/sec, 8196826 t fired, . Pages in use: 32 4 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL true CTL model checker CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 2 0 0 4 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS 27/32 FMS-PT-02000-CTLFireability-01 6267648 m, 158414 m/sec, 9384087 t fired, . Pages in use: 32 4 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL true CTL model checker CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 2 0 0 4 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS 30/32 FMS-PT-02000-CTLFireability-01 7051872 m, 156844 m/sec, 10560658 t fired, . Pages in use: 32 4 Visible: 16 # 4 (type EXCL) for FMS-PT-02000-CTLFireability-01 (memory limit exceeded) VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL true CTL model checker CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CONJ 0 2 0 0 2 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 2 0 0 4 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS Pages in use: 32 4 Visible: 16 1 (type EXCL) for 0 FMS-PT-02000-CTLFireability-00 # 1 (type EXCL) for FMS-PT-02000-CTLFireability-00 : false 21997 23998 0.000000 1 9 (type EXCL) for 6 FMS-PT-02000-CTLFireability-02 # 9 (type EXCL) for FMS-PT-02000-CTLFireability-02 : true 3 6 0.000000 1 11 (type EXCL) for 6 FMS-PT-02000-CTLFireability-02 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL true CTL model checker CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CONJ 0 0 1 0 3 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 2 0 0 4 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS 4/32 FMS-PT-02000-CTLFireability-02 910386 m, 182077 m/sec, 1668537 t fired, . Pages in use: 32 4 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL true CTL model checker CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CONJ 0 0 1 0 3 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 2 0 0 4 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS 9/32 FMS-PT-02000-CTLFireability-02 1881490 m, 194220 m/sec, 3448638 t fired, . Pages in use: 32 4 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL true CTL model checker CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CONJ 0 0 1 0 3 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 2 0 0 4 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS 12/32 FMS-PT-02000-CTLFireability-02 2747132 m, 173128 m/sec, 5034843 t fired, . Pages in use: 32 4 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL true CTL model checker CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CONJ 0 0 1 0 3 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 2 0 0 4 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS 17/32 FMS-PT-02000-CTLFireability-02 3750251 m, 200623 m/sec, 6873309 t fired, . Pages in use: 32 4 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL true CTL model checker CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CONJ 0 0 1 0 3 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 2 0 0 4 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS 21/32 FMS-PT-02000-CTLFireability-02 4693112 m, 188572 m/sec, 8600372 t fired, . Pages in use: 32 4 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL true CTL model checker CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CONJ 0 0 1 0 3 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 2 0 0 4 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS 25/32 FMS-PT-02000-CTLFireability-02 5539341 m, 169245 m/sec, 10150533 t fired, . Pages in use: 32 4 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL true CTL model checker CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CONJ 0 0 1 0 3 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 2 0 0 4 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS 30/32 FMS-PT-02000-CTLFireability-02 6624780 m, 217087 m/sec, 12139876 t fired, . Pages in use: 32 4 Visible: 16 # 11 (type EXCL) for FMS-PT-02000-CTLFireability-02 (memory limit exceeded) VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL true CTL model checker CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CONJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 2 0 0 4 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS Pages in use: 32 4 Visible: 16 43 (type EXCL) for 40 FMS-PT-02000-CTLFireability-12 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL true CTL model checker CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CONJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 1 1 0 4 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS 5/32 FMS-PT-02000-CTLFireability-12 1073815 m, 214763 m/sec, 1965096 t fired, . Pages in use: 32 4 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL true CTL model checker CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CONJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 1 1 0 4 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS 9/32 FMS-PT-02000-CTLFireability-12 1966836 m, 178604 m/sec, 3600862 t fired, . Pages in use: 32 4 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL true CTL model checker CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CONJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 1 1 0 4 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS 13/32 FMS-PT-02000-CTLFireability-12 2984468 m, 203526 m/sec, 5467448 t fired, . Pages in use: 32 4 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL true CTL model checker CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CONJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 1 1 0 4 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS 17/32 FMS-PT-02000-CTLFireability-12 3919183 m, 186943 m/sec, 7180410 t fired, . Pages in use: 32 4 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL true CTL model checker CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CONJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 1 1 0 4 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS 21/32 FMS-PT-02000-CTLFireability-12 4823716 m, 180906 m/sec, 8837278 t fired, . Pages in use: 32 4 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL true CTL model checker CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CONJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 1 1 0 4 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS 25/32 FMS-PT-02000-CTLFireability-12 5635020 m, 162260 m/sec, 10325225 t fired, . Pages in use: 32 4 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL true CTL model checker CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CONJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 1 1 0 4 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS 29/32 FMS-PT-02000-CTLFireability-12 6508729 m, 174741 m/sec, 11927103 t fired, . Pages in use: 32 4 Visible: 16 # 43 (type EXCL) for FMS-PT-02000-CTLFireability-12 (memory limit exceeded) VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL true CTL model checker CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CONJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 1 0 0 4 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS Pages in use: 32 4 Visible: 16 23 (type EXCL) for 22 FMS-PT-02000-CTLFireability-06 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL true CTL model checker CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CONJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 1 0 0 4 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS 5/32 FMS-PT-02000-CTLFireability-06 956061 m, 191212 m/sec, 1752553 t fired, . Pages in use: 32 4 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL true CTL model checker CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CONJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 1 0 0 4 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS 9/32 FMS-PT-02000-CTLFireability-06 1988917 m, 206571 m/sec, 3646048 t fired, . Pages in use: 32 4 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL true CTL model checker CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CONJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 1 0 0 4 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS 13/32 FMS-PT-02000-CTLFireability-06 2871743 m, 176565 m/sec, 5264049 t fired, . Pages in use: 32 4 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL true CTL model checker CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CONJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 1 0 0 4 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS 16/32 FMS-PT-02000-CTLFireability-06 3668390 m, 159329 m/sec, 6723682 t fired, . Pages in use: 32 4 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL true CTL model checker CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CONJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 1 0 0 4 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS 20/32 FMS-PT-02000-CTLFireability-06 4478329 m, 161987 m/sec, 8208418 t fired, . Pages in use: 32 4 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL true CTL model checker CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CONJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 1 0 0 4 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS 23/32 FMS-PT-02000-CTLFireability-06 5318996 m, 168133 m/sec, 9749330 t fired, . Pages in use: 32 4 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL true CTL model checker CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CONJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 1 0 0 4 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS 27/32 FMS-PT-02000-CTLFireability-06 6256331 m, 187467 m/sec, 11467532 t fired, . Pages in use: 32 4 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL true CTL model checker CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CONJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 1 0 0 4 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS 31/32 FMS-PT-02000-CTLFireability-06 7160656 m, 180865 m/sec, 13124163 t fired, . Pages in use: 32 4 Visible: 16 # 23 (type EXCL) for FMS-PT-02000-CTLFireability-06 (memory limit exceeded) VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL true CTL model checker CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CONJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 1 0 0 4 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS Pages in use: 32 4 Visible: 16 49 (type EXCL) for 40 FMS-PT-02000-CTLFireability-12 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL true CTL model checker CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CONJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 0 1 0 4 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS 2/32 FMS-PT-02000-CTLFireability-12 442209 m, 88441 m/sec, 2138425 t fired, . Pages in use: 32 4 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL true CTL model checker CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CONJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 0 1 0 4 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS 4/32 FMS-PT-02000-CTLFireability-12 907438 m, 93045 m/sec, 4385337 t fired, . Pages in use: 32 4 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL true CTL model checker CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CONJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 0 1 0 4 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS 6/32 FMS-PT-02000-CTLFireability-12 1280527 m, 74617 m/sec, 6189096 t fired, . Pages in use: 32 4 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL true CTL model checker CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CONJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 0 1 0 4 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS 8/32 FMS-PT-02000-CTLFireability-12 1652608 m, 74416 m/sec, 7987308 t fired, . Pages in use: 32 4 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL true CTL model checker CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CONJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 0 1 0 4 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS 9/32 FMS-PT-02000-CTLFireability-12 2034510 m, 76380 m/sec, 9827559 t fired, . Pages in use: 32 4 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL true CTL model checker CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CONJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 0 1 0 4 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS 11/32 FMS-PT-02000-CTLFireability-12 2436609 m, 80419 m/sec, 11770832 t fired, . Pages in use: 32 4 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL true CTL model checker CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CONJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 0 1 0 4 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS 13/32 FMS-PT-02000-CTLFireability-12 2832708 m, 79219 m/sec, 13685432 t fired, . Pages in use: 32 4 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL true CTL model checker CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CONJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 0 1 0 4 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS 15/32 FMS-PT-02000-CTLFireability-12 3252813 m, 84021 m/sec, 15719545 t fired, . Pages in use: 32 4 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL true CTL model checker CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CONJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 0 1 0 4 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS 16/32 FMS-PT-02000-CTLFireability-12 3612903 m, 72018 m/sec, 17458573 t fired, . Pages in use: 32 4 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL true CTL model checker CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CONJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 0 1 0 4 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS 18/32 FMS-PT-02000-CTLFireability-12 4040718 m, 85563 m/sec, 19528421 t fired, . Pages in use: 32 4 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL true CTL model checker CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CONJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 0 1 0 4 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS 20/32 FMS-PT-02000-CTLFireability-12 4457026 m, 83261 m/sec, 21540900 t fired, . Pages in use: 32 4 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL true CTL model checker CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CONJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 0 1 0 4 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS 22/32 FMS-PT-02000-CTLFireability-12 4819206 m, 72436 m/sec, 23288954 t fired, . Pages in use: 32 4 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL true CTL model checker CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CONJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 0 1 0 4 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS 23/32 FMS-PT-02000-CTLFireability-12 5191917 m, 74542 m/sec, 25091297 t fired, . Pages in use: 32 4 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL true CTL model checker CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CONJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 0 1 0 4 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS 25/32 FMS-PT-02000-CTLFireability-12 5611404 m, 83897 m/sec, 27116725 t fired, . Pages in use: 32 4 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL true CTL model checker CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CONJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 0 1 0 4 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS 27/32 FMS-PT-02000-CTLFireability-12 5985386 m, 74796 m/sec, 28926879 t fired, . Pages in use: 32 4 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL true CTL model checker CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CONJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 0 1 0 4 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS 29/32 FMS-PT-02000-CTLFireability-12 6448324 m, 92587 m/sec, 31164391 t fired, . Pages in use: 32 4 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL true CTL model checker CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CONJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 0 1 0 4 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS 31/32 FMS-PT-02000-CTLFireability-12 6881320 m, 86599 m/sec, 33257158 t fired, . Pages in use: 32 4 Visible: 16 # 49 (type EXCL) for FMS-PT-02000-CTLFireability-12 (memory limit exceeded) VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL true CTL model checker CTL true CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CONJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 4 0 2 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS Pages in use: 32 4 Visible: 16 58 (type EXCL) for 57 FMS-PT-02000-CTLFireability-15 # 58 (type EXCL) for FMS-PT-02000-CTLFireability-15 : false 35999 40025 0.000000 1 no open tasks 16 VALUE PRODUCED BY CTL false CTL model checker CTL unknown AGGR CONJ unknown CONJ CTL unknown AGGR CTL false CTL model checker CTL unknown AGGR CTL unknown AGGR CTL false CTL model checker CTL unknown AGGR CTL unknown AGGR CTL true CTL model checker CTL true CTL model checker DISJ unknown DISJ CTL unknown AGGR CTL unknown AGGR CTL false CTL model checker Pages in use: 32

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="FMS-PT-02000"
export BK_EXAMINATION="CTLFireability"
export BK_TOOL="lola"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-4028"
echo " Executing tool lola"
echo " Input is FMS-PT-02000, examination is CTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r080-tall-162048871400802"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/FMS-PT-02000.tgz
mv FMS-PT-02000 execution
cd execution
if [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "UpperBounds" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] || [ "CTLFireability" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property CTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "CTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' CTLFireability.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] ; then
echo "FORMULA_NAME CTLFireability"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;