MCC'2021- Execution of r080-tall-162048871000484

About the Execution of LoLA for DrinkVendingMachine-COL-24

Execution Summary
Max Memory Used (MB)	Time wait (ms)	CPU Usage (ms)	I/O Wait (ms)	Computed Result	Execution Status
16231.436	366736.00	374036.00	952.40	T????T?????TT?TT	normal

Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/data/fkordon/mcc2021-in
Waiting for the VM to
..............................
========
Generated by BenchKit 2-4028
Executing tool lola
Input is DrinkVendingMachine-COL-24,
Time confinement
Memory confinement
Number of cores is 4
Run identifier is
==============================

--------------------
preparation of the directory
/home/mcc/execution
total 420K
-rw-r--r-- 1 mcc users
-rw-r--r-- 1 mcc users 115K May
-rw-r--r-- 1 mcc users
-rw-r--r-- 1 mcc users 103K May
-rw-r--r-- 1 mcc users 4.2K May
-rw-r--r-- 1 mcc users 6.5K May
-rw-r--r-- 1 mcc users
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content from stdout:

=== Data for post analysis

The expected result is
BOOL_VECTOR

here is the order used
FORMULA_NAME DrinkVendingMachi
FORMULA_NAME DrinkVendingMachi
FORMULA_NAME DrinkVendingMachi
FORMULA_NAME DrinkVendingMachi
FORMULA_NAME DrinkVendingMachi
FORMULA_NAME DrinkVendingMachi
FORMULA_NAME DrinkVendingMachi
FORMULA_NAME DrinkVendingMachi
FORMULA_NAME DrinkVendingMachi
FORMULA_NAME DrinkVendingMachi
FORMULA_NAME DrinkVendingMachi
FORMULA_NAME DrinkVendingMachi
FORMULA_NAME DrinkVendingMachi
FORMULA_NAME DrinkVendingMachi
FORMULA_NAME DrinkVendingMachi
FORMULA_NAME DrinkVendingMachi

=== Now, execution of

BK_START 1620543155453

starting LoLA
BK_INPUT DrinkVendingMachine-C
BK_EXAMINATION: LTLCardinality
bin directory: /home/mcc/Bench
current directory: /home/mcc/e
LTLCardinality

FORMULA DrinkVendingMachine-COL-24-15

FORMULA DrinkVendingMachine-COL-24-00

FORMULA DrinkVendingMachine-COL-24-05

FORMULA DrinkVendingMachine-COL-24-12

FORMULA DrinkVendingMachine-COL-24-11

FORMULA DrinkVendingMachine-COL-24-14

BK_STOP 1620543522189

--------------------
content from stderr:

lola: MEM LIMIT 32
lola: MEM LIMIT 5
lola: NET
lola: input: PNML file
lola: reading net from
lola: reading pnml
lola: PNML file contains
lola: finished parsing
lola: closed net file
lola: Reading HL formula
lola: reading formula
lola: rewrite Frontend/Parse
lola: rewrite Frontend/Parse
lola: rewrite Frontend/Parse
lola: rewrite Frontend/Parse
lola: rewrite Frontend/Parse
lola: rewrite Frontend/Parse
lola: rewrite Frontend/Parse
lola: rewrite Frontend/Parse
lola: rewrite Frontend/Parse
lola: rewrite Frontend/Parse
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lola: rewrite Frontend/Parse
lola: rewrite Frontend/Parse
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lola: rewrite Frontend/Parse
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lola: rewrite Frontend/Parse
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lola: rewrite Frontend/Parse
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lola: rewrite Frontend/Parse
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lola: rewrite Frontend/Parse
lola: rewrite Frontend/Parse
lola: rewrite Frontend/Parse
lola: rewrite Frontend/Parse
lola: rewrite Frontend/Parse
lola: rewrite Frontend/Parse
lola: RELEASE
lola: rewrite Frontend/Parse
lola: rewrite Frontend/Parse
lola: rewrite Frontend/Parse
lola: rewrite Frontend/Parse
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lola: rewrite Frontend/Parse
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lola: rewrite Frontend/Parse
lola: ASSUMEDDEADLOCKFREE
lola: ASSUMEDDEADLOCKFREE
lola: ASSUMEDDEADLOCKFREE
lola: ASSUMEDDEADLOCKFREE
lola: ASSUMEDDEADLOCKFREE
lola: ASSUMEDDEADLOCKFREE
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lola: ASSUMEDDEADLOCKFREE
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lola: ASSUMEDDEADLOCKFREE
lola: ASSUMEDDEADLOCKFREE
lola: ASSUMEDDEADLOCKFREE
lola: ASSUMEDDEADLOCKFREE
lola: ASSUMEDDEADLOCKFREE
lola: ASSUMEDDEADLOCKFREE
lola: LAUNCH task #
lola: time limit
lola: memory limit: 5 pages
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lola: LAUNCH task #
lola: time limit
lola: memory limit: 5 pages
lola: LAUNCH task #
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lola: memory limit: 5 pages
lola: TR BINDINGS
lola: FINISHED task
lola: result
lola: markings :
lola: fired transitions :
lola: time used
lola: memory pages used :
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lola: time used
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lola: result
lola: markings :
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lola: time used
lola: memory pages used :
lola: LAUNCH INITIAL
lola: TR BINDINGS DONE
lola: Places: 288,
lola: LAUNCH task #
lola: time limit : 0 sec
lola: memory limit: 0 pages
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/home/mcc/BenchKit/BenchKit_head.sh:
put.r080-tall-162048871000484.qcow2', fmt=qcow2 size=4294967296 backing_file='/data/fkordon/mcc2021-input.qcow2' encryption=off cluster_size=65536 lazy_refcounts=off be ready (probing ssh) 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============================================================= examination is LTLCardinality is 3600 seconds is 16384 MBytes r080-tall-162048871000484 ======================================= to be used: 14K May 5 16:58 CTLCardinality.txt 5 16:58 CTLCardinality.xml 14K May 5 16:58 CTLFireability.txt 5 16:58 CTLFireability.xml 6 14:48 GenericPropertiesDefinition.xml 6 14:48 GenericPropertiesVerdict.xml 4.0K Mar 28 16:05 LTLCardinality.txt 25K Mar 28 16:05 LTLCardinality.xml 2.3K Mar 28 16:06 LTLFireability.txt 17K Mar 28 16:06 LTLFireability.xml 3.8K Mar 23 10:26 ReachabilityCardinality.txt 17K Mar 23 10:26 ReachabilityCardinality.xml 3.4K Mar 22 18:29 ReachabilityFireability.txt 18K Mar 22 18:29 ReachabilityFireability.xml 1.9K Mar 22 09:11 UpperBounds.txt 3.9K Mar 22 09:11 UpperBounds.xml 5 May 5 16:51 equiv_pt 3 May 5 16:51 instance 5 May 5 16:51 iscolored 28K May 5 16:51 model.pnml generated by BenchKit (invocation template) a vector of booleans to build the result vector(from text file) ne-COL-24-00 ne-COL-24-01 ne-COL-24-02 ne-COL-24-03 ne-COL-24-04 ne-COL-24-05 ne-COL-24-06 ne-COL-24-07 ne-COL-24-08 ne-COL-24-09 ne-COL-24-10 ne-COL-24-11 ne-COL-24-12 ne-COL-24-13 ne-COL-24-14 ne-COL-24-15 the tool begins OL-24 Kit/bin xecution TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT (--pnmlnet) /home/mcc/execution/model.pnml High-Level net /home/mcc/execution/model.pnml in XML format (--xmlformula) from /home/mcc/execution/LTLCardinality.xml r/formula_rewrite.k:98 r/formula_rewrite.k:355 r/formula_rewrite.k:355 r/formula_rewrite.k:355 r/formula_rewrite.k:355 r/formula_rewrite.k:346 r/formula_rewrite.k:314 r/formula_rewrite.k:296 r/formula_rewrite.k:334 r/formula_rewrite.k:296 r/formula_rewrite.k:355 r/formula_rewrite.k:352 r/formula_rewrite.k:376 r/formula_rewrite.k:331 r/formula_rewrite.k:296 r/formula_rewrite.k:314 r/formula_rewrite.k:296 r/formula_rewrite.k:331 r/formula_rewrite.k:296 r/formula_rewrite.k:253 r/formula_rewrite.k:253 r/formula_rewrite.k:355 r/formula_rewrite.k:334 r/formula_rewrite.k:331 r/formula_rewrite.k:296 r/formula_rewrite.k:352 r/formula_rewrite.k:349 r/formula_rewrite.k:98 r/formula_rewrite.k:153 r/formula_rewrite.k:168 r/formula_rewrite.k:337 r/formula_rewrite.k:296 r/formula_rewrite.k:296 r/formula_rewrite.k:98 r/formula_rewrite.k:331 r/formula_rewrite.k:314 r/formula_rewrite.k:334 r/formula_rewrite.k:296 r/formula_rewrite.k:317 r/formula_rewrite.k:296 r/formula_rewrite.k:334 r/formula_rewrite.k:278 r/formula_rewrite.k:144 r/formula_rewrite.k:116 r/formula_rewrite.k:120 r/formula_rewrite.k:352 r/formula_rewrite.k:98 r/formula_rewrite.k:96 r/formula_rewrite.k:162 r/formula_rewrite.k:156 r/formula_rewrite.k:121 r/formula_rewrite.k:352 r/formula_rewrite.k:352 r/formula_rewrite.k:355 r/formula_rewrite.k:352 r/formula_rewrite.k:352 r/formula_rewrite.k:376 r/formula_rewrite.k:376 r/formula_rewrite.k:328 r/formula_rewrite.k:331 r/formula_rewrite.k:317 r/formula_rewrite.k:296 r/formula_rewrite.k:328 r/formula_rewrite.k:296 r/formula_rewrite.k:352 r/formula_rewrite.k:376 r/formula_rewrite.k:427 r/formula_rewrite.k:370 r/formula_rewrite.k:352 r/formula_rewrite.k:355 r/formula_rewrite.k:379 r/formula_rewrite.k:355 r/formula_rewrite.k:334 r/formula_rewrite.k:331 r/formula_rewrite.k:296 r/formula_rewrite.k:98 r/formula_rewrite.k:168 r/formula_rewrite.k:331 r/formula_rewrite.k:296 r/formula_rewrite.k:314 r/formula_rewrite.k:296 r/formula_rewrite.k:334 r/formula_rewrite.k:328 r/formula_rewrite.k:299 r/formula_rewrite.k:352 r/formula_rewrite.k:436 r/formula_rewrite.k:521 r/formula_rewrite.k:98 r/formula_rewrite.k:430 r/formula_rewrite.k:153 r/formula_rewrite.k:114 r/formula_rewrite.k:123 r/formula_rewrite.k:159 r/formula_rewrite.k:153 r/formula_rewrite.k:150 55 (type SKEL/SRCH) for 27 DrinkVendingMachine-COL-24-09 : 32000000 sec 56 (type SKEL/SRCH) for 30 DrinkVendingMachine-COL-24-10 : 32000000 sec 48 (type SKEL/SRCH) for 3 DrinkVendingMachine-COL-24-01 : 32000000 sec 49 (type SKEL/SRCH) for 18 DrinkVendingMachine-COL-24-06 : 32000000 sec # 56 (type SKEL/SRCH) for DrinkVendingMachine-COL-24-10 : false 122 123 : 0.000000 1 # 55 (type SKEL/SRCH) for DrinkVendingMachine-COL-24-09 : false 1389 2463 : 0.000000 1 # 48 (type SKEL/SRCH) for DrinkVendingMachine-COL-24-01 : false 214 214 : 0.000000 1 Transitions: 8308944 47 (type SKEL/CNST) for 45 DrinkVendingMachine-COL-24-15 57 (type SKEL/SRCH) for 6 DrinkVendingMachine-COL-24-02 : 32000000 sec 61 (type SKEL/SRCH) for 42 DrinkVendingMachine-COL-24-14 : 32000000 sec # 49 (type SKEL/SRCH) for DrinkVendingMachine-COL-24-06 : false 997 1323 : 0.000000 1 # 47 (type SKEL/CNST) for DrinkVendingMachine-COL-24-15 : true # 57 (type SKEL/SRCH) for DrinkVendingMachine-COL-24-02 : false 9 9 : 0.000000 1 50 (type SKEL/SRCH) for 0 DrinkVendingMachine-COL-24-00 : 32000000 sec 51 (type SKEL/SRCH) for 9 DrinkVendingMachine-COL-24-03 : 32000000 sec 52 (type SKEL/SRCH) for 15 DrinkVendingMachine-COL-24-05 : 32000000 sec # 50 (type SKEL/SRCH) for DrinkVendingMachine-COL-24-00 : true 193 576 : 0.000000 1 53 (type SKEL/SRCH) for 36 DrinkVendingMachine-COL-24-12 : 32000000 sec elaborate3 # 52 (type SKEL/SRCH) for DrinkVendingMachine-COL-24-05 : true 9 8 : 0.000000 1 54 (type SKEL/SRCH) for 21 DrinkVendingMachine-COL-24-07 : 32000000 sec # 51 (type SKEL/SRCH) for DrinkVendingMachine-COL-24-03 : false 125 125 : 0.000000 1 58 (type SKEL/SRCH) for 33 DrinkVendingMachine-COL-24-11 : 32000000 sec # 53 (type SKEL/SRCH) for DrinkVendingMachine-COL-24-12 : true 23 31 : 0.000000 1 59 (type SKEL/SRCH) for 12 DrinkVendingMachine-COL-24-04 : 32000000 sec # 58 (type SKEL/SRCH) for DrinkVendingMachine-COL-24-11 : true 1 : 0.000000 1 60 (type SKEL/SRCH) for 24 DrinkVendingMachine-COL-24-08 : 32000000 sec # 59 (type SKEL/SRCH) for DrinkVendingMachine-COL-24-04 : false 131 132 : 0.000000 1 62 (type SKEL/SRCH) for 39 DrinkVendingMachine-COL-24-13 : 32000000 sec # 60 (type SKEL/SRCH) for DrinkVendingMachine-COL-24-08 : false 877 1183 : 0.000000 1 # 62 (type SKEL/SRCH) for DrinkVendingMachine-COL-24-13 : false 125 125 : 0.000000 1 # 54 (type SKEL/SRCH) for DrinkVendingMachine-COL-24-07 : false 77 78 : 0.000000 1 # 61 (type SKEL/SRCH) for DrinkVendingMachine-COL-24-14 : true 25345 218612 : 0.000000 1 VALUE PRODUCED BY LTL true skeleton: LTL model checker LTL true skeleton: LTL model checker LTL true skeleton: LTL model checker LTL true skeleton: LTL model checker LTL true skeleton: LTL model checker true skeleton: preprocessing IDL ACT RUN SUS FIN C/T C/M OBS LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS Pages in use: 3 4 Visible: 16 VALUE PRODUCED BY LTL true skeleton: LTL model checker LTL true skeleton: LTL model checker LTL true skeleton: LTL model checker LTL true skeleton: LTL model checker LTL true skeleton: LTL model checker true skeleton: preprocessing IDL ACT RUN SUS FIN C/T C/M OBS LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS Pages in use: 3 4 Visible: 16 VALUE PRODUCED BY LTL true skeleton: LTL model checker LTL true skeleton: LTL model checker LTL true skeleton: LTL model checker LTL true skeleton: LTL model checker LTL true skeleton: LTL model checker true skeleton: preprocessing IDL ACT RUN SUS FIN C/T C/M OBS LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS Pages in use: 3 4 Visible: 16 VALUE PRODUCED BY LTL true skeleton: LTL model checker LTL true skeleton: LTL model checker LTL true skeleton: LTL model checker LTL true skeleton: LTL model checker LTL true skeleton: LTL model checker true skeleton: preprocessing IDL ACT RUN SUS FIN C/T C/M OBS LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS Pages in use: 3 4 Visible: 16 VALUE PRODUCED BY LTL true skeleton: LTL model checker LTL true skeleton: LTL model checker LTL true skeleton: LTL model checker LTL true skeleton: LTL model checker LTL true skeleton: LTL model checker true skeleton: preprocessing IDL ACT RUN SUS FIN C/T C/M OBS LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS Pages in use: 3 4 Visible: 16 VALUE PRODUCED BY LTL true skeleton: LTL model checker LTL true skeleton: LTL model checker LTL true skeleton: LTL model checker LTL true skeleton: LTL model checker LTL true skeleton: LTL model checker true skeleton: preprocessing IDL ACT RUN SUS FIN C/T C/M OBS LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS Pages in use: 3 4 Visible: 16 VALUE PRODUCED BY LTL true skeleton: LTL model checker LTL true skeleton: LTL model checker LTL true skeleton: LTL model checker LTL true skeleton: LTL model checker LTL true skeleton: LTL model checker true skeleton: preprocessing IDL ACT RUN SUS FIN C/T C/M OBS LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS Pages in use: 3 4 Visible: 16 VALUE PRODUCED BY LTL true skeleton: LTL model checker LTL true skeleton: LTL model checker LTL true skeleton: LTL model checker LTL true skeleton: LTL model checker LTL true skeleton: LTL model checker true skeleton: preprocessing IDL ACT RUN SUS FIN C/T C/M OBS LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS Pages in use: 3 4 Visible: 16 VALUE PRODUCED BY LTL true skeleton: LTL model checker LTL true skeleton: LTL model checker LTL true skeleton: LTL model checker LTL true skeleton: LTL model checker LTL true skeleton: LTL model checker true skeleton: preprocessing IDL ACT RUN SUS FIN C/T C/M OBS LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS Pages in use: 3 4 Visible: 16 VALUE PRODUCED BY LTL true skeleton: LTL model checker LTL true skeleton: LTL model checker LTL true skeleton: LTL model checker LTL true skeleton: LTL model checker LTL true skeleton: LTL model checker true skeleton: preprocessing IDL ACT RUN SUS FIN C/T C/M OBS LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS Pages in use: 3 4 Visible: 16 VALUE PRODUCED BY LTL true skeleton: LTL model checker LTL true skeleton: LTL model checker LTL true skeleton: LTL model checker LTL true skeleton: LTL model checker LTL true skeleton: LTL model checker true skeleton: preprocessing IDL ACT RUN SUS FIN C/T C/M OBS LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS Pages in use: 3 4 Visible: 16 VALUE PRODUCED BY LTL true skeleton: LTL model checker LTL true skeleton: LTL model checker LTL true skeleton: LTL model checker LTL true skeleton: LTL model checker LTL true skeleton: LTL model checker true skeleton: preprocessing IDL ACT RUN SUS FIN C/T C/M OBS LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS Pages in use: 3 4 Visible: 16 VALUE PRODUCED BY LTL true skeleton: LTL model checker LTL true skeleton: LTL model checker LTL true skeleton: LTL model checker LTL true skeleton: LTL model checker LTL true skeleton: LTL model checker true skeleton: preprocessing IDL ACT RUN SUS FIN C/T C/M OBS LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS Pages in use: 3 4 Visible: 16 VALUE PRODUCED BY LTL true skeleton: LTL model checker LTL true skeleton: LTL model checker LTL true skeleton: LTL model checker LTL true skeleton: LTL model checker LTL true skeleton: LTL model checker true skeleton: preprocessing IDL ACT RUN SUS FIN C/T C/M OBS LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS Pages in use: 3 4 Visible: 16 VALUE PRODUCED BY LTL true skeleton: LTL model checker LTL true skeleton: LTL model checker LTL true skeleton: LTL model checker LTL true skeleton: LTL model checker LTL true skeleton: LTL model checker true skeleton: preprocessing IDL ACT RUN SUS FIN C/T C/M OBS LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS Pages in use: 3 4 Visible: 16 VALUE PRODUCED BY LTL true skeleton: LTL model checker LTL true skeleton: LTL model checker LTL true skeleton: LTL model checker LTL true skeleton: LTL model checker LTL true skeleton: LTL model checker true skeleton: preprocessing IDL ACT RUN SUS FIN C/T C/M OBS LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS Pages in use: 3 4 Visible: 16 VALUE PRODUCED BY LTL true skeleton: LTL model checker LTL true skeleton: LTL model checker LTL true skeleton: LTL model checker LTL true skeleton: LTL model checker LTL true skeleton: LTL model checker true skeleton: preprocessing IDL ACT RUN SUS FIN C/T C/M OBS LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS Pages in use: 3 4 Visible: 16 VALUE PRODUCED BY LTL true skeleton: LTL model checker LTL true skeleton: LTL model checker LTL true skeleton: LTL model checker LTL true skeleton: LTL model checker LTL true skeleton: LTL model checker true skeleton: preprocessing IDL ACT RUN SUS FIN C/T C/M OBS LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS Pages in use: 3 4 Visible: 16 VALUE PRODUCED BY LTL true skeleton: LTL model checker LTL true skeleton: LTL model checker LTL true skeleton: LTL model checker LTL true skeleton: LTL model checker LTL true skeleton: LTL model checker true skeleton: preprocessing IDL ACT RUN SUS FIN C/T C/M OBS LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 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skeleton: LTL model checker true skeleton: preprocessing IDL ACT RUN SUS FIN C/T C/M OBS LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS Pages in use: 3 4 Visible: 16 VALUE PRODUCED BY LTL true skeleton: LTL model checker LTL true skeleton: LTL model checker LTL true skeleton: LTL model checker LTL true skeleton: LTL model checker LTL true skeleton: LTL model checker true skeleton: preprocessing IDL ACT RUN SUS FIN C/T C/M OBS LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS Pages in use: 3 4 Visible: 16 VALUE PRODUCED BY LTL true skeleton: LTL model checker LTL true skeleton: LTL model checker LTL true skeleton: LTL model checker LTL true skeleton: LTL model checker LTL true skeleton: LTL model checker true skeleton: preprocessing IDL ACT RUN SUS FIN C/T C/M OBS LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS Pages in use: 3 4 Visible: 16 VALUE PRODUCED BY LTL true skeleton: LTL model checker LTL true skeleton: LTL model checker LTL true skeleton: LTL model checker LTL true skeleton: LTL model checker LTL true skeleton: LTL model checker true skeleton: preprocessing IDL ACT RUN SUS FIN C/T C/M OBS LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS Pages in use: 3 4 Visible: 16 VALUE PRODUCED BY LTL true skeleton: LTL model checker LTL true skeleton: LTL model checker LTL true skeleton: LTL model checker LTL true skeleton: LTL model checker LTL true skeleton: LTL model checker true skeleton: preprocessing IDL ACT RUN SUS FIN C/T C/M OBS LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS Pages in use: 3 4 Visible: 16 VALUE PRODUCED BY LTL true skeleton: LTL model checker LTL true skeleton: LTL model checker LTL true skeleton: LTL model checker LTL true skeleton: LTL model checker LTL true skeleton: LTL model checker true skeleton: preprocessing IDL ACT RUN SUS FIN C/T C/M OBS LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS Pages in use: 3 4 Visible: 16 VALUE PRODUCED BY LTL true skeleton: LTL model checker LTL true skeleton: LTL model checker LTL true skeleton: LTL model checker LTL true skeleton: LTL model checker LTL true skeleton: LTL model checker true skeleton: preprocessing IDL ACT RUN SUS FIN C/T C/M OBS LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS Pages in use: 3 4 Visible: 16 VALUE PRODUCED BY LTL true skeleton: LTL model checker LTL true skeleton: LTL model checker LTL true skeleton: LTL model checker LTL true skeleton: LTL model checker LTL true skeleton: LTL model checker true skeleton: preprocessing IDL ACT RUN SUS FIN C/T C/M OBS LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 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skeleton: LTL model checker LTL true skeleton: LTL model checker LTL true skeleton: LTL model checker true skeleton: preprocessing IDL ACT RUN SUS FIN C/T C/M OBS LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS Pages in use: 3 4 Visible: 16 VALUE PRODUCED BY LTL true skeleton: LTL model checker LTL true skeleton: LTL model checker LTL true skeleton: LTL model checker LTL true skeleton: LTL model checker LTL true skeleton: LTL model checker true skeleton: preprocessing IDL ACT RUN SUS FIN C/T C/M OBS LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS Pages in use: 3 4 Visible: 16 elaborate1 addProduct addOption VALUE PRODUCED BY LTL true skeleton: LTL model checker LTL true skeleton: LTL model checker LTL true skeleton: LTL model checker LTL true skeleton: LTL model checker LTL true skeleton: LTL model checker true skeleton: preprocessing IDL ACT RUN SUS FIN C/T C/M OBS LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS Pages in use: 3 4 Visible: 16 VALUE PRODUCED BY LTL true skeleton: LTL model checker LTL true skeleton: LTL model checker LTL true skeleton: LTL model checker LTL true skeleton: LTL model checker LTL true skeleton: LTL model checker true skeleton: preprocessing IDL ACT RUN SUS FIN C/T C/M OBS LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS Pages in use: 3 4 Visible: 16 VALUE PRODUCED BY LTL true skeleton: LTL model checker LTL true skeleton: LTL model checker LTL true skeleton: LTL model checker LTL true skeleton: LTL model checker LTL true skeleton: LTL model checker true skeleton: preprocessing IDL ACT RUN SUS FIN C/T C/M OBS LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS Pages in use: 3 4 Visible: 16 VALUE PRODUCED BY LTL true skeleton: LTL model checker LTL true skeleton: LTL model checker LTL true skeleton: LTL model checker LTL true skeleton: LTL model checker LTL true skeleton: LTL model checker true skeleton: preprocessing IDL ACT RUN SUS FIN C/T C/M OBS LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS Pages in use: 3 4 Visible: 16 VALUE PRODUCED BY LTL true skeleton: LTL model checker LTL true skeleton: LTL model checker LTL true skeleton: LTL model checker LTL true skeleton: LTL model checker LTL true skeleton: LTL model checker true skeleton: preprocessing IDL ACT RUN SUS FIN C/T C/M OBS LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS Pages in use: 3 4 Visible: 16 VALUE PRODUCED BY LTL true skeleton: LTL model checker LTL true skeleton: LTL model checker LTL true skeleton: LTL model checker LTL true skeleton: LTL model checker LTL true skeleton: LTL model checker true skeleton: preprocessing IDL ACT RUN SUS FIN C/T C/M OBS LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS Pages in use: 3 4 Visible: 16 VALUE PRODUCED BY LTL true skeleton: LTL model checker LTL true skeleton: LTL model checker LTL true skeleton: LTL model checker LTL true skeleton: LTL model checker LTL true skeleton: LTL model checker true skeleton: preprocessing IDL ACT RUN SUS FIN C/T C/M OBS LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS Pages in use: 3 4 Visible: 16 VALUE PRODUCED BY LTL true skeleton: LTL model checker LTL true skeleton: LTL model checker LTL true skeleton: LTL model checker LTL true skeleton: LTL model checker LTL true skeleton: LTL model checker true skeleton: preprocessing IDL ACT RUN SUS FIN C/T C/M OBS LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS Pages in use: 3 4 Visible: 16 VALUE PRODUCED BY LTL true skeleton: LTL model checker LTL true skeleton: LTL model checker LTL true skeleton: LTL model checker LTL true skeleton: LTL model checker LTL true skeleton: LTL model checker true skeleton: preprocessing IDL ACT RUN SUS FIN C/T C/M OBS LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS Pages in use: 3 4 Visible: 16 VALUE PRODUCED BY LTL true skeleton: LTL model checker LTL true skeleton: LTL model checker LTL true skeleton: LTL model checker LTL true skeleton: LTL model checker LTL true skeleton: LTL model checker true skeleton: preprocessing IDL ACT RUN SUS FIN C/T C/M OBS LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS Pages in use: 3 4 Visible: 16 VALUE PRODUCED BY LTL true skeleton: LTL model checker LTL true skeleton: LTL model checker LTL true skeleton: LTL model checker LTL true skeleton: LTL model checker LTL true skeleton: LTL model checker true skeleton: preprocessing IDL ACT RUN SUS FIN C/T C/M OBS LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS Pages in use: 3 4 Visible: 16 VALUE PRODUCED BY LTL true skeleton: LTL model checker LTL true skeleton: LTL model checker LTL true skeleton: LTL model checker LTL true skeleton: LTL model checker LTL true skeleton: LTL model checker true skeleton: preprocessing IDL ACT RUN SUS FIN C/T C/M OBS LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS Pages in use: 3 4 Visible: 16 VALUE PRODUCED BY LTL true skeleton: LTL model checker LTL true skeleton: LTL model checker LTL true skeleton: LTL model checker LTL true skeleton: LTL model checker LTL true skeleton: LTL model checker true skeleton: preprocessing IDL ACT RUN SUS FIN C/T C/M OBS LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS Pages in use: 3 4 Visible: 16 VALUE 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TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS Pages in use: 3 4 Visible: 16 VALUE PRODUCED BY LTL true skeleton: LTL model checker LTL true skeleton: LTL model checker LTL true skeleton: LTL model checker LTL true skeleton: LTL model checker LTL true skeleton: LTL model checker true skeleton: preprocessing IDL ACT RUN SUS FIN C/T C/M OBS LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS Pages in use: 3 4 Visible: 16 VALUE PRODUCED BY LTL true skeleton: LTL model checker LTL true skeleton: LTL model checker LTL true skeleton: LTL model checker LTL true skeleton: LTL model checker LTL true skeleton: LTL model checker true skeleton: preprocessing IDL ACT RUN SUS FIN C/T C/M OBS LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 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0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS Pages in use: 3 4 Visible: 16 VALUE PRODUCED BY LTL true skeleton: LTL model checker LTL true skeleton: LTL model checker LTL true skeleton: LTL model checker LTL true skeleton: LTL model checker LTL true skeleton: LTL model checker true skeleton: preprocessing IDL ACT RUN SUS FIN C/T C/M OBS LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS Pages in use: 3 4 Visible: 16 VALUE PRODUCED BY LTL true skeleton: LTL model checker LTL true skeleton: LTL model checker LTL true skeleton: LTL model checker LTL true skeleton: LTL model checker LTL true skeleton: LTL model checker true skeleton: preprocessing IDL ACT RUN SUS FIN C/T C/M OBS LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS Pages in use: 3 4 Visible: 16 VALUE PRODUCED BY LTL true skeleton: LTL model checker LTL true skeleton: LTL model checker LTL true skeleton: LTL model checker LTL true skeleton: LTL model checker LTL true skeleton: LTL model checker true skeleton: preprocessing IDL ACT RUN SUS FIN C/T C/M OBS LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS Pages in use: 3 4 Visible: 16 VALUE PRODUCED BY LTL true skeleton: LTL model checker LTL true skeleton: LTL model checker LTL true skeleton: LTL model checker LTL true skeleton: LTL model checker LTL true skeleton: LTL model checker true skeleton: preprocessing IDL ACT RUN SUS FIN C/T C/M OBS LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS Pages in use: 3 4 Visible: 16 VALUE PRODUCED BY LTL true skeleton: LTL model checker LTL true skeleton: LTL model checker LTL true skeleton: LTL model checker LTL true skeleton: LTL model checker LTL true skeleton: LTL model checker true skeleton: preprocessing IDL ACT RUN SUS FIN C/T C/M OBS LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS Pages in use: 3 4 Visible: 16 VALUE PRODUCED BY LTL true skeleton: LTL model checker LTL true skeleton: LTL model checker LTL true skeleton: LTL model checker LTL true skeleton: LTL model checker LTL true skeleton: LTL model checker true skeleton: preprocessing IDL ACT RUN SUS FIN C/T C/M OBS LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS Pages in use: 3 4 Visible: 16 VALUE PRODUCED BY LTL true skeleton: LTL model checker LTL true skeleton: LTL model checker LTL true skeleton: LTL model checker LTL true skeleton: LTL model checker LTL true skeleton: LTL model checker true skeleton: preprocessing IDL ACT RUN SUS FIN C/T C/M OBS LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS Pages in use: 3 4 Visible: 16 VALUE PRODUCED BY LTL true skeleton: LTL model checker LTL true skeleton: LTL model checker LTL true skeleton: LTL model checker LTL true skeleton: LTL model checker LTL true skeleton: LTL model checker true skeleton: preprocessing IDL ACT RUN SUS FIN C/T C/M OBS LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS Pages in use: 3 4 Visible: 16 VALUE PRODUCED BY LTL true skeleton: LTL model checker LTL true skeleton: LTL model checker LTL true skeleton: LTL model checker LTL true skeleton: LTL model checker LTL true skeleton: LTL model checker true skeleton: preprocessing IDL ACT RUN SUS FIN C/T C/M OBS LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS Pages in use: 3 4 Visible: 16 VALUE PRODUCED BY LTL true skeleton: LTL model checker LTL true skeleton: LTL model checker LTL true skeleton: LTL model checker LTL true skeleton: LTL model checker LTL true skeleton: LTL model checker true skeleton: preprocessing IDL ACT RUN SUS FIN C/T C/M OBS LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS Pages in use: 3 4 Visible: 16 VALUE PRODUCED BY LTL true skeleton: LTL model checker LTL true skeleton: LTL model checker LTL true skeleton: LTL model checker LTL true skeleton: LTL model checker LTL true skeleton: LTL model checker true skeleton: preprocessing IDL ACT RUN SUS FIN C/T C/M OBS LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS Pages in use: 3 4 Visible: 16 VALUE PRODUCED BY LTL true skeleton: LTL model checker LTL true skeleton: LTL model checker LTL true skeleton: LTL model checker LTL true skeleton: LTL model checker LTL true skeleton: LTL model checker true skeleton: preprocessing IDL ACT RUN SUS FIN C/T C/M OBS LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS Pages in use: 3 4 Visible: 16 VALUE PRODUCED BY LTL true skeleton: LTL model checker LTL true skeleton: LTL model checker LTL true skeleton: LTL model checker LTL true skeleton: LTL model checker LTL true skeleton: LTL model checker true skeleton: preprocessing IDL ACT RUN SUS FIN C/T C/M OBS LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 LTL 0 0 0 0 1 0 0 0 TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS Pages in use: 3 4 Visible: 16 line 62: 410 Killed lola --conf=$BIN_DIR/configfiles/ltlcardinalityconf --formula=$DIR/LTLCardinality.xml --verdictfile=$DIR/GenericPropertiesVerdict.xml $DIR/model.pnml

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="DrinkVendingMachine-COL-24"
export BK_EXAMINATION="LTLCardinality"
export BK_TOOL="lola"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-4028"
echo " Executing tool lola"
echo " Input is DrinkVendingMachine-COL-24, examination is LTLCardinality"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r080-tall-162048871000484"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/DrinkVendingMachine-COL-24.tgz
mv DrinkVendingMachine-COL-24 execution
cd execution
if [ "LTLCardinality" = "ReachabilityDeadlock" ] || [ "LTLCardinality" = "UpperBounds" ] || [ "LTLCardinality" = "QuasiLiveness" ] || [ "LTLCardinality" = "StableMarking" ] || [ "LTLCardinality" = "Liveness" ] || [ "LTLCardinality" = "OneSafe" ] || [ "LTLCardinality" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "LTLCardinality" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "LTLCardinality" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "LTLCardinality.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property LTLCardinality.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "LTLCardinality.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' LTLCardinality.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ "LTLCardinality" = "ReachabilityDeadlock" ] || [ "LTLCardinality" = "QuasiLiveness" ] || [ "LTLCardinality" = "StableMarking" ] || [ "LTLCardinality" = "Liveness" ] || [ "LTLCardinality" = "OneSafe" ] ; then
echo "FORMULA_NAME LTLCardinality"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;