About the Execution of LoLA for DLCround-PT-12a
| Execution Summary | |||||
| Max Memory Used (MB) |
Time wait (ms) | CPU Usage (ms) | I/O Wait (ms) | Computed Result | Execution Status |
| 14831.728 | 3600000.00 | 782471.00 | 10911.00 | FFTFTFFF?TTFFFF? | normal |
Execution Chart
We display below the execution chart for this examination (boot time has been removed).
Trace from the execution
Formatting '/data/fkordon/mcc2021-input.r061-tall-162038393200420.qcow2', fmt=qcow2 size=4294967296 backing_file='/data/fkordon/mcc2021-input.qcow2' encryption=off cluster_size=65536 lazy_refcounts=off
Waiting for the VM to be ready (probing ssh)
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=====================================================================
Generated by BenchKit 2-4028
Executing tool lola
Input is DLCround-PT-12a, examination is LTLCardinality
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r061-tall-162038393200420
=====================================================================
--------------------
preparation of the directory to be used:
/home/mcc/execution
total 1.3M
-rw-r--r-- 1 mcc users 11K May 5 16:58 CTLCardinality.txt
-rw-r--r-- 1 mcc users 97K May 5 16:58 CTLCardinality.xml
-rw-r--r-- 1 mcc users 11K May 5 16:58 CTLFireability.txt
-rw-r--r-- 1 mcc users 98K May 5 16:58 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K May 6 14:48 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.4K May 6 14:48 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 3.6K Mar 28 15:58 LTLCardinality.txt
-rw-r--r-- 1 mcc users 27K Mar 28 15:58 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.0K Mar 28 15:59 LTLFireability.txt
-rw-r--r-- 1 mcc users 17K Mar 28 15:59 LTLFireability.xml
-rw-r--r-- 1 mcc users 3.7K Mar 23 08:50 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 19K Mar 23 08:50 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 3.0K Mar 22 16:24 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 20K Mar 22 16:24 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.6K Mar 22 09:10 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.6K Mar 22 09:10 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 May 5 16:51 equiv_col
-rw-r--r-- 1 mcc users 4 May 5 16:51 instance
-rw-r--r-- 1 mcc users 6 May 5 16:51 iscolored
-rw-r--r-- 1 mcc users 871K May 5 16:51 model.pnml
--------------------
content from stdout:
=== Data for post analysis generated by BenchKit (invocation template)
The expected result is a vector of booleans
BOOL_VECTOR
here is the order used to build the result vector(from text file)
FORMULA_NAME DLCround-PT-12a-00
FORMULA_NAME DLCround-PT-12a-01
FORMULA_NAME DLCround-PT-12a-02
FORMULA_NAME DLCround-PT-12a-03
FORMULA_NAME DLCround-PT-12a-04
FORMULA_NAME DLCround-PT-12a-05
FORMULA_NAME DLCround-PT-12a-06
FORMULA_NAME DLCround-PT-12a-07
FORMULA_NAME DLCround-PT-12a-08
FORMULA_NAME DLCround-PT-12a-09
FORMULA_NAME DLCround-PT-12a-10
FORMULA_NAME DLCround-PT-12a-11
FORMULA_NAME DLCround-PT-12a-12
FORMULA_NAME DLCround-PT-12a-13
FORMULA_NAME DLCround-PT-12a-14
FORMULA_NAME DLCround-PT-12a-15
=== Now, execution of the tool begins
BK_START 1620453944085
starting LoLA
BK_INPUT DLCround-PT-12a
BK_EXAMINATION: LTLCardinality
bin directory: /home/mcc/BenchKit/bin
current directory: /home/mcc/execution
LTLCardinality
FORMULA DLCround-PT-12a-07 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA DLCround-PT-12a-02 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA DLCround-PT-12a-12 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA DLCround-PT-12a-14 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA DLCround-PT-12a-00 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA DLCround-PT-12a-13 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA DLCround-PT-12a-11 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA DLCround-PT-12a-10 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA DLCround-PT-12a-09 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA DLCround-PT-12a-06 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA DLCround-PT-12a-05 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA DLCround-PT-12a-04 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA DLCround-PT-12a-03 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA DLCround-PT-12a-01 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
BK_TIME_CONFINEMENT_REACHED
--------------------
content from stderr:
lola: MEM LIMIT 32
lola: MEM LIMIT 5
lola: NET
lola: input: PNML file (--pnmlnet)
lola: reading net from /home/mcc/execution/model.pnml
lola: reading pnml
lola: PNML file contains place/transition net
lola: finished parsing
lola: closed net file /home/mcc/execution/model.pnml
lola: Reading formula.
lola: Using XML format (--xmlformula)
lola: reading XML formula
lola: reading formula from /home/mcc/execution/LTLCardinality.xml
lola: rewrite Frontend/Parser/formula_rewrite.k:98
lola: rewrite Frontend/Parser/formula_rewrite.k:98
lola: rewrite Frontend/Parser/formula_rewrite.k:153
lola: rewrite Frontend/Parser/formula_rewrite.k:123
lola: rewrite Frontend/Parser/formula_rewrite.k:278
lola: rewrite Frontend/Parser/formula_rewrite.k:144
lola: rewrite Frontend/Parser/formula_rewrite.k:116
lola: rewrite Frontend/Parser/formula_rewrite.k:162
lola: rewrite Frontend/Parser/formula_rewrite.k:144
lola: rewrite Frontend/Parser/formula_rewrite.k:120
lola: rewrite Frontend/Parser/formula_rewrite.k:98
lola: rewrite Frontend/Parser/formula_rewrite.k:153
lola: rewrite Frontend/Parser/formula_rewrite.k:168
lola: rewrite Frontend/Parser/formula_rewrite.k:355
lola: rewrite Frontend/Parser/formula_rewrite.k:379
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:352
lola: rewrite Frontend/Parser/formula_rewrite.k:98
lola: rewrite Frontend/Parser/formula_rewrite.k:168
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:535
lola: rewrite Frontend/Parser/formula_rewrite.k:96
lola: rewrite Frontend/Parser/formula_rewrite.k:117
lola: rewrite Frontend/Parser/formula_rewrite.k:120
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:349
lola: rewrite Frontend/Parser/formula_rewrite.k:436
lola: rewrite Frontend/Parser/formula_rewrite.k:521
lola: rewrite Frontend/Parser/formula_rewrite.k:98
lola: rewrite Frontend/Parser/formula_rewrite.k:165
lola: rewrite Frontend/Parser/formula_rewrite.k:430
lola: rewrite Frontend/Parser/formula_rewrite.k:153
lola: rewrite Frontend/Parser/formula_rewrite.k:114
lola: rewrite Frontend/Parser/formula_rewrite.k:123
lola: rewrite Frontend/Parser/formula_rewrite.k:123
lola: rewrite Frontend/Parser/formula_rewrite.k:278
lola: rewrite Frontend/Parser/formula_rewrite.k:150
lola: rewrite Frontend/Parser/formula_rewrite.k:98
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:352
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:98
lola: rewrite Frontend/Parser/formula_rewrite.k:98
lola: rewrite Frontend/Parser/formula_rewrite.k:168
lola: rewrite Frontend/Parser/formula_rewrite.k:168
lola: rewrite Frontend/Parser/formula_rewrite.k:346
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:98
lola: rewrite Frontend/Parser/formula_rewrite.k:141
lola: rewrite Frontend/Parser/formula_rewrite.k:141
lola: rewrite Frontend/Parser/formula_rewrite.k:355
lola: rewrite Frontend/Parser/formula_rewrite.k:153
lola: rewrite Frontend/Parser/formula_rewrite.k:98
lola: rewrite Frontend/Parser/formula_rewrite.k:153
lola: rewrite Frontend/Parser/formula_rewrite.k:98
lola: rewrite Frontend/Parser/formula_rewrite.k:159
lola: rewrite Frontend/Parser/formula_rewrite.k:168
lola: rewrite Frontend/Parser/formula_rewrite.k:153
lola: rewrite Frontend/Parser/formula_rewrite.k:153
lola: rewrite Frontend/Parser/formula_rewrite.k:114
lola: rewrite Frontend/Parser/formula_rewrite.k:141
lola: rewrite Frontend/Parser/formula_rewrite.k:98
lola: rewrite Frontend/Parser/formula_rewrite.k:115
lola: rewrite Frontend/Parser/formula_rewrite.k:430
lola: rewrite Frontend/Parser/formula_rewrite.k:346
lola: rewrite Frontend/Parser/formula_rewrite.k:535
lola: rewrite Frontend/Parser/formula_rewrite.k:355
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:433
lola: rewrite Frontend/Parser/formula_rewrite.k:421
lola: rewrite Frontend/Parser/formula_rewrite.k:550
lola: rewrite Frontend/Parser/formula_rewrite.k:98
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:278
lola: rewrite Frontend/Parser/formula_rewrite.k:144
lola: rewrite Frontend/Parser/formula_rewrite.k:120
lola: rewrite Frontend/Parser/formula_rewrite.k:349
lola: Created skeleton in 0.000000 secs.
lola: NOTDEADLOCKFREE
lola: Created skeleton in 0.000000 secs.
lola: NOTDEADLOCKFREE
lola: Created skeleton in 0.000000 secs.
lola: Rule S: 0 transitions removed,0 places removed
lola: Created skeleton in 0.000000 secs.
lola: NOTDEADLOCKFREE
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: NOTDEADLOCKFREE
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: NOTDEADLOCKFREE
lola: LAUNCH task # 60 (type SKEL/SRCH) for 22 DLCround-PT-12a-06
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: NOTDEADLOCKFREE
lola: LAUNCH task # 61 (type SKEL/SRCH) for 15 DLCround-PT-12a-05
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: Created skeleton in 0.000000 secs.
lola: LAUNCH INITIAL
lola: LAUNCH task # 26 (type CNST) for 25 DLCround-PT-12a-07
lola: time limit : 0 sec
lola: memory limit: 0 pages
lola: FINISHED task # 26 (type CNST) for DLCround-PT-12a-07
lola: result : false
lola: FINISHED task # 60 (type SKEL/SRCH) for DLCround-PT-12a-06
lola: result : false
lola: markings : 3
lola: fired transitions : 3
lola: time used : 0.000000
lola: memory pages used : 1
lola: FINISHED task # 61 (type SKEL/SRCH) for DLCround-PT-12a-05
lola: result : false
lola: markings : 258
lola: fired transitions : 4758
lola: time used : 0.000000
lola: memory pages used : 1
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: NOTDEADLOCKFREE
lola: LAUNCH task # 62 (type SKEL/SRCH) for 34 DLCround-PT-12a-10
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 62 (type SKEL/SRCH) for DLCround-PT-12a-10
lola: result : true
lola: markings : 2
lola: fired transitions : 1
lola: time used : 0.000000
lola: memory pages used : 1
lola: NOTDEADLOCKFREE
lola: LAUNCH task # 63 (type SKEL/SRCH) for 6 DLCround-PT-12a-02
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 63 (type SKEL/SRCH) for DLCround-PT-12a-02
lola: result : true
lola: markings : 1
lola: time used : 0.000000
lola: memory pages used : 1
lola: Created skeleton in 0.000000 secs.
lola: planning for DLCround-PT-12a-02 stopped (result already fixed).
lola: NOTDEADLOCKFREE
lola: LAUNCH task # 64 (type SKEL/SRCH) for 40 DLCround-PT-12a-12
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: Created skeleton in 0.000000 secs.
lola: FINISHED task # 64 (type SKEL/SRCH) for DLCround-PT-12a-12
lola: result : false
lola: markings : 3
lola: fired transitions : 3
lola: time used : 0.000000
lola: memory pages used : 1
lola: RELEASE
lola: planning for (null) stopped (result already fixed).
lola: planning for (null) stopped (result already fixed).
lola: Created skeleton in 0.000000 secs.
lola: NOTDEADLOCKFREE
lola: Created skeleton in 0.000000 secs.
lola: NOTDEADLOCKFREE
lola: LAUNCH task # 65 (type SKEL/SRCH) for 47 DLCround-PT-12a-13
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: NOTDEADLOCKFREE
lola: Created skeleton in 0.000000 secs.
lola: NOTDEADLOCKFREE
lola: NOTDEADLOCKFREE
lola: LAUNCH task # 66 (type SKEL/SRCH) for 50 DLCround-PT-12a-14
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 66 (type SKEL/SRCH) for DLCround-PT-12a-14
lola: result : false
lola: markings : 4
lola: fired transitions : 4
lola: time used : 0.000000
lola: memory pages used : 1
lola: Created skeleton in 0.000000 secs.
lola: LAUNCH task # 1 (type EXCL) for 0 DLCround-PT-12a-00
lola: time limit : 257 sec
lola: memory limit: 32 pages
lola: FINISHED task # 1 (type EXCL) for DLCround-PT-12a-00
lola: result : false
lola: markings : 2
lola: fired transitions : 2
lola: time used : 0.000000
lola: memory pages used : 1
lola: NOTDEADLOCKFREE
lola: Created skeleton in 1.000000 secs.
lola: LAUNCH task # 20 (type EXCL) for 15 DLCround-PT-12a-05
lola: time limit : 276 sec
lola: memory limit: 32 pages
lola: NOTDEADLOCKFREE
lola: FINISHED task # 65 (type SKEL/SRCH) for DLCround-PT-12a-13
lola: result : false
lola: markings : 23068
lola: fired transitions : 434447
lola: time used : 1.000000
lola: memory pages used : 1
lola: FINISHED task # 20 (type EXCL) for DLCround-PT-12a-05
lola: result : true
lola: markings : 16633
lola: fired transitions : 1278848
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 58 (type EXCL) for 57 DLCround-PT-12a-15
lola: time limit : 327 sec
lola: memory limit: 32 pages
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DLCround-PT-12a-00: LTL false LTL model checker
DLCround-PT-12a-02: LTL true skeleton: LTL model checker
DLCround-PT-12a-07: INITIAL false preprocessing
DLCround-PT-12a-12: CONJ false skeleton: LTL model checker
DLCround-PT-12a-14: CONJ false skeleton: LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DLCround-PT-12a-01: LTL 0 1 0 0 1 0 0 0
DLCround-PT-12a-03: LTL 0 1 0 0 1 0 0 0
DLCround-PT-12a-04: LTL 0 1 0 0 1 0 0 0
DLCround-PT-12a-05: CONJ 0 1 0 0 3 0 0 0
DLCround-PT-12a-06: LTL 0 1 0 0 1 0 0 0
DLCround-PT-12a-08: LTL 0 1 0 0 1 0 0 0
DLCround-PT-12a-09: LTL 0 1 0 0 1 0 0 0
DLCround-PT-12a-10: LTL/CTL 0 1 0 0 1 0 0 0
DLCround-PT-12a-11: LTL 0 1 0 0 1 0 0 0
DLCround-PT-12a-13: LTL 0 1 0 0 1 0 0 0
DLCround-PT-12a-15: LTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
58 LTL EXCL 3/327 1/32 DLCround-PT-12a-15 48752 m, 9750 m/sec, 3837960 t fired, .
Time elapsed: 5 secs. Pages in use: 2
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DLCround-PT-12a-00: LTL false LTL model checker
DLCround-PT-12a-02: LTL true skeleton: LTL model checker
DLCround-PT-12a-07: INITIAL false preprocessing
DLCround-PT-12a-12: CONJ false skeleton: LTL model checker
DLCround-PT-12a-14: CONJ false skeleton: LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DLCround-PT-12a-01: LTL 0 1 0 0 1 0 0 0
DLCround-PT-12a-03: LTL 0 1 0 0 1 0 0 0
DLCround-PT-12a-04: LTL 0 1 0 0 1 0 0 0
DLCround-PT-12a-05: CONJ 0 1 0 0 3 0 0 0
DLCround-PT-12a-06: LTL 0 1 0 0 1 0 0 0
DLCround-PT-12a-08: LTL 0 1 0 0 1 0 0 0
DLCround-PT-12a-09: LTL 0 1 0 0 1 0 0 0
DLCround-PT-12a-10: LTL/CTL 0 1 0 0 1 0 0 0
DLCround-PT-12a-11: LTL 0 1 0 0 1 0 0 0
DLCround-PT-12a-13: LTL 0 1 0 0 1 0 0 0
DLCround-PT-12a-15: LTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
58 LTL EXCL 8/327 1/32 DLCround-PT-12a-15 126576 m, 15564 m/sec, 10031682 t fired, .
Time elapsed: 10 secs. Pages in use: 2
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DLCround-PT-12a-00: LTL false LTL model checker
DLCround-PT-12a-02: LTL true skeleton: LTL model checker
DLCround-PT-12a-07: INITIAL false preprocessing
DLCround-PT-12a-12: CONJ false skeleton: LTL model checker
DLCround-PT-12a-14: CONJ false skeleton: LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DLCround-PT-12a-01: LTL 0 1 0 0 1 0 0 0
DLCround-PT-12a-03: LTL 0 1 0 0 1 0 0 0
DLCround-PT-12a-04: LTL 0 1 0 0 1 0 0 0
DLCround-PT-12a-05: CONJ 0 1 0 0 3 0 0 0
DLCround-PT-12a-06: LTL 0 1 0 0 1 0 0 0
DLCround-PT-12a-08: LTL 0 1 0 0 1 0 0 0
DLCround-PT-12a-09: LTL 0 1 0 0 1 0 0 0
DLCround-PT-12a-10: LTL/CTL 0 1 0 0 1 0 0 0
DLCround-PT-12a-11: LTL 0 1 0 0 1 0 0 0
DLCround-PT-12a-13: LTL 0 1 0 0 1 0 0 0
DLCround-PT-12a-15: LTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
58 LTL EXCL 13/327 2/32 DLCround-PT-12a-15 205954 m, 15875 m/sec, 16159395 t fired, .
Time elapsed: 15 secs. Pages in use: 2
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DLCround-PT-12a-00: LTL false LTL model checker
DLCround-PT-12a-02: LTL true skeleton: LTL model checker
DLCround-PT-12a-07: INITIAL false preprocessing
DLCround-PT-12a-12: CONJ false skeleton: LTL model checker
DLCround-PT-12a-14: CONJ false skeleton: LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DLCround-PT-12a-01: LTL 0 1 0 0 1 0 0 0
DLCround-PT-12a-03: LTL 0 1 0 0 1 0 0 0
DLCround-PT-12a-04: LTL 0 1 0 0 1 0 0 0
DLCround-PT-12a-05: CONJ 0 1 0 0 3 0 0 0
DLCround-PT-12a-06: LTL 0 1 0 0 1 0 0 0
DLCround-PT-12a-08: LTL 0 1 0 0 1 0 0 0
DLCround-PT-12a-09: LTL 0 1 0 0 1 0 0 0
DLCround-PT-12a-10: LTL/CTL 0 1 0 0 1 0 0 0
DLCround-PT-12a-11: LTL 0 1 0 0 1 0 0 0
DLCround-PT-12a-13: LTL 0 1 0 0 1 0 0 0
DLCround-PT-12a-15: LTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
58 LTL EXCL 18/327 2/32 DLCround-PT-12a-15 283131 m, 15435 m/sec, 22368467 t fired, .
Time elapsed: 20 secs. Pages in use: 2
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DLCround-PT-12a-00: LTL false LTL model checker
DLCround-PT-12a-02: LTL true skeleton: LTL model checker
DLCround-PT-12a-07: INITIAL false preprocessing
DLCround-PT-12a-12: CONJ false skeleton: LTL model checker
DLCround-PT-12a-14: CONJ false skeleton: LTL model checker
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58 LTL EXCL 23/327 3/32 DLCround-PT-12a-15 361742 m, 15722 m/sec, 28587513 t fired, .
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DLCround-PT-12a-07: INITIAL false preprocessing
DLCround-PT-12a-12: CONJ false skeleton: LTL model checker
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58 LTL EXCL 28/327 3/32 DLCround-PT-12a-15 436725 m, 14996 m/sec, 34746439 t fired, .
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DLCround-PT-12a-00: LTL false LTL model checker
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DLCround-PT-12a-07: INITIAL false preprocessing
DLCround-PT-12a-12: CONJ false skeleton: LTL model checker
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58 LTL EXCL 33/327 4/32 DLCround-PT-12a-15 514629 m, 15580 m/sec, 40972316 t fired, .
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DLCround-PT-12a-00: LTL false LTL model checker
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DLCround-PT-12a-07: INITIAL false preprocessing
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58 LTL EXCL 38/327 4/32 DLCround-PT-12a-15 588011 m, 14676 m/sec, 47122981 t fired, .
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DLCround-PT-12a-07: INITIAL false preprocessing
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58 LTL EXCL 43/327 5/32 DLCround-PT-12a-15 665639 m, 15525 m/sec, 53204312 t fired, .
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DLCround-PT-12a-07: INITIAL false preprocessing
DLCround-PT-12a-12: CONJ false skeleton: LTL model checker
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58 LTL EXCL 48/327 5/32 DLCround-PT-12a-15 749045 m, 16681 m/sec, 59306383 t fired, .
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DLCround-PT-12a-07: INITIAL false preprocessing
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58 LTL EXCL 53/327 6/32 DLCround-PT-12a-15 830883 m, 16367 m/sec, 65386050 t fired, .
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DLCround-PT-12a-07: INITIAL false preprocessing
DLCround-PT-12a-12: CONJ false skeleton: LTL model checker
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58 LTL EXCL 58/327 6/32 DLCround-PT-12a-15 908324 m, 15488 m/sec, 71434406 t fired, .
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DLCround-PT-12a-07: INITIAL false preprocessing
DLCround-PT-12a-12: CONJ false skeleton: LTL model checker
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58 LTL EXCL 63/327 7/32 DLCround-PT-12a-15 991484 m, 16632 m/sec, 77595321 t fired, .
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58 LTL EXCL 68/327 7/32 DLCround-PT-12a-15 1072287 m, 16160 m/sec, 83629719 t fired, .
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DLCround-PT-12a-07: INITIAL false preprocessing
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58 LTL EXCL 73/327 8/32 DLCround-PT-12a-15 1157560 m, 17054 m/sec, 89613068 t fired, .
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58 LTL EXCL 78/327 9/32 DLCround-PT-12a-15 1237646 m, 16017 m/sec, 95672724 t fired, .
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DLCround-PT-12a-07: INITIAL false preprocessing
DLCround-PT-12a-12: CONJ false skeleton: LTL model checker
DLCround-PT-12a-14: CONJ false skeleton: LTL model checker
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58 LTL EXCL 103/327 11/32 DLCround-PT-12a-15 1646375 m, 16384 m/sec, 126002905 t fired, .
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58 LTL EXCL 108/327 12/32 DLCround-PT-12a-15 1731156 m, 16956 m/sec, 132574280 t fired, .
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DLCround-PT-12a-07: INITIAL false preprocessing
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58 LTL EXCL 113/327 12/32 DLCround-PT-12a-15 1811533 m, 16075 m/sec, 138588262 t fired, .
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DLCround-PT-12a-07: INITIAL false preprocessing
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58 LTL EXCL 118/327 13/32 DLCround-PT-12a-15 1893148 m, 16323 m/sec, 144612255 t fired, .
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DLCround-PT-12a-07: INITIAL false preprocessing
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58 LTL EXCL 123/327 13/32 DLCround-PT-12a-15 1976390 m, 16648 m/sec, 150590904 t fired, .
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DLCround-PT-12a-07: INITIAL false preprocessing
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58 LTL EXCL 128/327 14/32 DLCround-PT-12a-15 2061565 m, 17035 m/sec, 156876846 t fired, .
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DLCround-PT-12a-07: INITIAL false preprocessing
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58 LTL EXCL 133/327 14/32 DLCround-PT-12a-15 2145758 m, 16838 m/sec, 163485416 t fired, .
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DLCround-PT-12a-07: INITIAL false preprocessing
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58 LTL EXCL 138/327 15/32 DLCround-PT-12a-15 2228535 m, 16555 m/sec, 169437505 t fired, .
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DLCround-PT-12a-07: INITIAL false preprocessing
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58 LTL EXCL 148/327 16/32 DLCround-PT-12a-15 2391041 m, 16015 m/sec, 181428168 t fired, .
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DLCround-PT-12a-12: CONJ false skeleton: LTL model checker
DLCround-PT-12a-14: CONJ false skeleton: LTL model checker
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DLCround-PT-12a-12: CONJ false skeleton: LTL model checker
DLCround-PT-12a-14: CONJ false skeleton: LTL model checker
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DLCround-PT-12a-07: INITIAL false preprocessing
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DLCround-PT-12a-07: INITIAL false preprocessing
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DLCround-PT-12a-02: LTL true skeleton: LTL model checker
DLCround-PT-12a-07: INITIAL false preprocessing
DLCround-PT-12a-12: CONJ false skeleton: LTL model checker
DLCround-PT-12a-14: CONJ false skeleton: LTL model checker
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DLCround-PT-12a-13: LTL 0 0 1 0 1 0 0 0
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48 LTL EXCL 30/328 4/32 DLCround-PT-12a-13 463735 m, 14751 m/sec, 36990766 t fired, .
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48 LTL EXCL 35/328 4/32 DLCround-PT-12a-13 540661 m, 15385 m/sec, 43167864 t fired, .
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DLCround-PT-12a-07: INITIAL false preprocessing
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48 LTL EXCL 40/328 4/32 DLCround-PT-12a-13 613870 m, 14641 m/sec, 49255513 t fired, .
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48 LTL EXCL 45/328 5/32 DLCround-PT-12a-13 694601 m, 16146 m/sec, 55239585 t fired, .
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DLCround-PT-12a-07: INITIAL false preprocessing
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48 LTL EXCL 50/328 6/32 DLCround-PT-12a-13 776106 m, 16301 m/sec, 61307510 t fired, .
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DLCround-PT-12a-07: INITIAL false preprocessing
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48 LTL EXCL 55/328 6/32 DLCround-PT-12a-13 856484 m, 16075 m/sec, 67350392 t fired, .
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DLCround-PT-12a-07: INITIAL false preprocessing
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48 LTL EXCL 60/328 7/32 DLCround-PT-12a-13 933483 m, 15399 m/sec, 73308462 t fired, .
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DLCround-PT-12a-07: INITIAL false preprocessing
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48 LTL EXCL 65/328 7/32 DLCround-PT-12a-13 1016830 m, 16669 m/sec, 79443142 t fired, .
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DLCround-PT-12a-07: INITIAL false preprocessing
DLCround-PT-12a-12: CONJ false skeleton: LTL model checker
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48 LTL EXCL 70/328 8/32 DLCround-PT-12a-13 1097660 m, 16166 m/sec, 85410859 t fired, .
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DLCround-PT-12a-07: INITIAL false preprocessing
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48 LTL EXCL 75/328 8/32 DLCround-PT-12a-13 1181766 m, 16821 m/sec, 91365643 t fired, .
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DLCround-PT-12a-07: INITIAL false preprocessing
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48 LTL EXCL 80/328 9/32 DLCround-PT-12a-13 1259626 m, 15572 m/sec, 97371941 t fired, .
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DLCround-PT-12a-07: INITIAL false preprocessing
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DLCround-PT-12a-07: INITIAL false preprocessing
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lola: FINISHED task # 48 (type EXCL) for DLCround-PT-12a-13
lola: result : false
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lola: LAUNCH task # 38 (type EXCL) for 37 DLCround-PT-12a-11
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lola: FINISHED task # 38 (type EXCL) for DLCround-PT-12a-11
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DLCround-PT-12a-00: LTL false LTL model checker
DLCround-PT-12a-02: LTL true skeleton: LTL model checker
DLCround-PT-12a-07: INITIAL false preprocessing
DLCround-PT-12a-09: LTL true LTL model checker
DLCround-PT-12a-10: LTL/CTL true LTL model checker
DLCround-PT-12a-11: LTL false LTL model checker
DLCround-PT-12a-12: CONJ false skeleton: LTL model checker
DLCround-PT-12a-13: LTL false LTL model checker
DLCround-PT-12a-14: CONJ false skeleton: LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DLCround-PT-12a-01: LTL 0 1 0 0 1 0 0 0
DLCround-PT-12a-03: LTL 0 1 0 0 1 0 0 0
DLCround-PT-12a-04: LTL 0 1 0 0 1 0 0 0
DLCround-PT-12a-05: CONJ 0 1 0 0 3 0 0 0
DLCround-PT-12a-06: LTL 0 1 0 0 1 0 0 0
DLCround-PT-12a-08: LTL 0 0 1 0 1 0 0 0
DLCround-PT-12a-15: LTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
29 LTL EXCL 3/530 1/32 DLCround-PT-12a-08 37200 m, 7440 m/sec, 2929721 t fired, .
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DLCround-PT-12a-00: LTL false LTL model checker
DLCround-PT-12a-02: LTL true skeleton: LTL model checker
DLCround-PT-12a-07: INITIAL false preprocessing
DLCround-PT-12a-09: LTL true LTL model checker
DLCround-PT-12a-10: LTL/CTL true LTL model checker
DLCround-PT-12a-11: LTL false LTL model checker
DLCround-PT-12a-12: CONJ false skeleton: LTL model checker
DLCround-PT-12a-13: LTL false LTL model checker
DLCround-PT-12a-14: CONJ false skeleton: LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DLCround-PT-12a-01: LTL 0 1 0 0 1 0 0 0
DLCround-PT-12a-03: LTL 0 1 0 0 1 0 0 0
DLCround-PT-12a-04: LTL 0 1 0 0 1 0 0 0
DLCround-PT-12a-05: CONJ 0 1 0 0 3 0 0 0
DLCround-PT-12a-06: LTL 0 1 0 0 1 0 0 0
DLCround-PT-12a-08: LTL 0 0 1 0 1 0 0 0
DLCround-PT-12a-15: LTL 0 0 0 0 1 0 1 0
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29 LTL EXCL 8/530 1/32 DLCround-PT-12a-08 115287 m, 15617 m/sec, 9175852 t fired, .
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DLCround-PT-12a-00: LTL false LTL model checker
DLCround-PT-12a-02: LTL true skeleton: LTL model checker
DLCround-PT-12a-07: INITIAL false preprocessing
DLCround-PT-12a-09: LTL true LTL model checker
DLCround-PT-12a-10: LTL/CTL true LTL model checker
DLCround-PT-12a-11: LTL false LTL model checker
DLCround-PT-12a-12: CONJ false skeleton: LTL model checker
DLCround-PT-12a-13: LTL false LTL model checker
DLCround-PT-12a-14: CONJ false skeleton: LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DLCround-PT-12a-01: LTL 0 1 0 0 1 0 0 0
DLCround-PT-12a-03: LTL 0 1 0 0 1 0 0 0
DLCround-PT-12a-04: LTL 0 1 0 0 1 0 0 0
DLCround-PT-12a-05: CONJ 0 1 0 0 3 0 0 0
DLCround-PT-12a-06: LTL 0 1 0 0 1 0 0 0
DLCround-PT-12a-08: LTL 0 0 1 0 1 0 0 0
DLCround-PT-12a-15: LTL 0 0 0 0 1 0 1 0
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29 LTL EXCL 13/530 2/32 DLCround-PT-12a-08 195417 m, 16026 m/sec, 15329711 t fired, .
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DLCround-PT-12a-00: LTL false LTL model checker
DLCround-PT-12a-02: LTL true skeleton: LTL model checker
DLCround-PT-12a-07: INITIAL false preprocessing
DLCround-PT-12a-09: LTL true LTL model checker
DLCround-PT-12a-10: LTL/CTL true LTL model checker
DLCround-PT-12a-11: LTL false LTL model checker
DLCround-PT-12a-12: CONJ false skeleton: LTL model checker
DLCround-PT-12a-13: LTL false LTL model checker
DLCround-PT-12a-14: CONJ false skeleton: LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DLCround-PT-12a-01: LTL 0 1 0 0 1 0 0 0
DLCround-PT-12a-03: LTL 0 1 0 0 1 0 0 0
DLCround-PT-12a-04: LTL 0 1 0 0 1 0 0 0
DLCround-PT-12a-05: CONJ 0 1 0 0 3 0 0 0
DLCround-PT-12a-06: LTL 0 1 0 0 1 0 0 0
DLCround-PT-12a-08: LTL 0 0 1 0 1 0 0 0
DLCround-PT-12a-15: LTL 0 0 0 0 1 0 1 0
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29 LTL EXCL 18/530 2/32 DLCround-PT-12a-08 273235 m, 15563 m/sec, 21523244 t fired, .
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DLCround-PT-12a-00: LTL false LTL model checker
DLCround-PT-12a-02: LTL true skeleton: LTL model checker
DLCround-PT-12a-07: INITIAL false preprocessing
DLCround-PT-12a-09: LTL true LTL model checker
DLCround-PT-12a-10: LTL/CTL true LTL model checker
DLCround-PT-12a-11: LTL false LTL model checker
DLCround-PT-12a-12: CONJ false skeleton: LTL model checker
DLCround-PT-12a-13: LTL false LTL model checker
DLCround-PT-12a-14: CONJ false skeleton: LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DLCround-PT-12a-01: LTL 0 1 0 0 1 0 0 0
DLCround-PT-12a-03: LTL 0 1 0 0 1 0 0 0
DLCround-PT-12a-04: LTL 0 1 0 0 1 0 0 0
DLCround-PT-12a-05: CONJ 0 1 0 0 3 0 0 0
DLCround-PT-12a-06: LTL 0 1 0 0 1 0 0 0
DLCround-PT-12a-08: LTL 0 0 1 0 1 0 0 0
DLCround-PT-12a-15: LTL 0 0 0 0 1 0 1 0
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29 LTL EXCL 23/530 3/32 DLCround-PT-12a-08 350608 m, 15474 m/sec, 27735004 t fired, .
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DLCround-PT-12a-00: LTL false LTL model checker
DLCround-PT-12a-02: LTL true skeleton: LTL model checker
DLCround-PT-12a-07: INITIAL false preprocessing
DLCround-PT-12a-09: LTL true LTL model checker
DLCround-PT-12a-10: LTL/CTL true LTL model checker
DLCround-PT-12a-11: LTL false LTL model checker
DLCround-PT-12a-12: CONJ false skeleton: LTL model checker
DLCround-PT-12a-13: LTL false LTL model checker
DLCround-PT-12a-14: CONJ false skeleton: LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DLCround-PT-12a-01: LTL 0 1 0 0 1 0 0 0
DLCround-PT-12a-03: LTL 0 1 0 0 1 0 0 0
DLCround-PT-12a-04: LTL 0 1 0 0 1 0 0 0
DLCround-PT-12a-05: CONJ 0 1 0 0 3 0 0 0
DLCround-PT-12a-06: LTL 0 1 0 0 1 0 0 0
DLCround-PT-12a-08: LTL 0 0 1 0 1 0 0 0
DLCround-PT-12a-15: LTL 0 0 0 0 1 0 1 0
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29 LTL EXCL 28/530 3/32 DLCround-PT-12a-08 426965 m, 15271 m/sec, 33932135 t fired, .
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DLCround-PT-12a-00: LTL false LTL model checker
DLCround-PT-12a-02: LTL true skeleton: LTL model checker
DLCround-PT-12a-07: INITIAL false preprocessing
DLCround-PT-12a-09: LTL true LTL model checker
DLCround-PT-12a-10: LTL/CTL true LTL model checker
DLCround-PT-12a-11: LTL false LTL model checker
DLCround-PT-12a-12: CONJ false skeleton: LTL model checker
DLCround-PT-12a-13: LTL false LTL model checker
DLCround-PT-12a-14: CONJ false skeleton: LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DLCround-PT-12a-01: LTL 0 1 0 0 1 0 0 0
DLCround-PT-12a-03: LTL 0 1 0 0 1 0 0 0
DLCround-PT-12a-04: LTL 0 1 0 0 1 0 0 0
DLCround-PT-12a-05: CONJ 0 1 0 0 3 0 0 0
DLCround-PT-12a-06: LTL 0 1 0 0 1 0 0 0
DLCround-PT-12a-08: LTL 0 0 1 0 1 0 0 0
DLCround-PT-12a-15: LTL 0 0 0 0 1 0 1 0
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29 LTL EXCL 33/530 4/32 DLCround-PT-12a-08 504773 m, 15561 m/sec, 40156002 t fired, .
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DLCround-PT-12a-00: LTL false LTL model checker
DLCround-PT-12a-02: LTL true skeleton: LTL model checker
DLCround-PT-12a-07: INITIAL false preprocessing
DLCround-PT-12a-09: LTL true LTL model checker
DLCround-PT-12a-10: LTL/CTL true LTL model checker
DLCround-PT-12a-11: LTL false LTL model checker
DLCround-PT-12a-12: CONJ false skeleton: LTL model checker
DLCround-PT-12a-13: LTL false LTL model checker
DLCround-PT-12a-14: CONJ false skeleton: LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DLCround-PT-12a-01: LTL 0 1 0 0 1 0 0 0
DLCround-PT-12a-03: LTL 0 1 0 0 1 0 0 0
DLCround-PT-12a-04: LTL 0 1 0 0 1 0 0 0
DLCround-PT-12a-05: CONJ 0 1 0 0 3 0 0 0
DLCround-PT-12a-06: LTL 0 1 0 0 1 0 0 0
DLCround-PT-12a-08: LTL 0 0 1 0 1 0 0 0
DLCround-PT-12a-15: LTL 0 0 0 0 1 0 1 0
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29 LTL EXCL 38/530 4/32 DLCround-PT-12a-08 577970 m, 14639 m/sec, 46319811 t fired, .
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DLCround-PT-12a-00: LTL false LTL model checker
DLCround-PT-12a-02: LTL true skeleton: LTL model checker
DLCround-PT-12a-07: INITIAL false preprocessing
DLCround-PT-12a-09: LTL true LTL model checker
DLCround-PT-12a-10: LTL/CTL true LTL model checker
DLCround-PT-12a-11: LTL false LTL model checker
DLCround-PT-12a-12: CONJ false skeleton: LTL model checker
DLCround-PT-12a-13: LTL false LTL model checker
DLCround-PT-12a-14: CONJ false skeleton: LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DLCround-PT-12a-01: LTL 0 1 0 0 1 0 0 0
DLCround-PT-12a-03: LTL 0 1 0 0 1 0 0 0
DLCround-PT-12a-04: LTL 0 1 0 0 1 0 0 0
DLCround-PT-12a-05: CONJ 0 1 0 0 3 0 0 0
DLCround-PT-12a-06: LTL 0 1 0 0 1 0 0 0
DLCround-PT-12a-08: LTL 0 0 1 0 1 0 0 0
DLCround-PT-12a-15: LTL 0 0 0 0 1 0 1 0
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29 LTL EXCL 43/530 5/32 DLCround-PT-12a-08 654083 m, 15222 m/sec, 52435182 t fired, .
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DLCround-PT-12a-00: LTL false LTL model checker
DLCround-PT-12a-02: LTL true skeleton: LTL model checker
DLCround-PT-12a-07: INITIAL false preprocessing
DLCround-PT-12a-09: LTL true LTL model checker
DLCround-PT-12a-10: LTL/CTL true LTL model checker
DLCround-PT-12a-11: LTL false LTL model checker
DLCround-PT-12a-12: CONJ false skeleton: LTL model checker
DLCround-PT-12a-13: LTL false LTL model checker
DLCround-PT-12a-14: CONJ false skeleton: LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DLCround-PT-12a-01: LTL 0 1 0 0 1 0 0 0
DLCround-PT-12a-03: LTL 0 1 0 0 1 0 0 0
DLCround-PT-12a-04: LTL 0 1 0 0 1 0 0 0
DLCround-PT-12a-05: CONJ 0 1 0 0 3 0 0 0
DLCround-PT-12a-06: LTL 0 1 0 0 1 0 0 0
DLCround-PT-12a-08: LTL 0 0 1 0 1 0 0 0
DLCround-PT-12a-15: LTL 0 0 0 0 1 0 1 0
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29 LTL EXCL 48/530 5/32 DLCround-PT-12a-08 737112 m, 16605 m/sec, 58463673 t fired, .
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DLCround-PT-12a-00: LTL false LTL model checker
DLCround-PT-12a-02: LTL true skeleton: LTL model checker
DLCround-PT-12a-07: INITIAL false preprocessing
DLCround-PT-12a-09: LTL true LTL model checker
DLCround-PT-12a-10: LTL/CTL true LTL model checker
DLCround-PT-12a-11: LTL false LTL model checker
DLCround-PT-12a-12: CONJ false skeleton: LTL model checker
DLCround-PT-12a-13: LTL false LTL model checker
DLCround-PT-12a-14: CONJ false skeleton: LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DLCround-PT-12a-01: LTL 0 1 0 0 1 0 0 0
DLCround-PT-12a-03: LTL 0 1 0 0 1 0 0 0
DLCround-PT-12a-04: LTL 0 1 0 0 1 0 0 0
DLCround-PT-12a-05: CONJ 0 1 0 0 3 0 0 0
DLCround-PT-12a-06: LTL 0 1 0 0 1 0 0 0
DLCround-PT-12a-08: LTL 0 0 1 0 1 0 0 0
DLCround-PT-12a-15: LTL 0 0 0 0 1 0 1 0
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29 LTL EXCL 53/530 6/32 DLCround-PT-12a-08 819582 m, 16494 m/sec, 64568394 t fired, .
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DLCround-PT-12a-00: LTL false LTL model checker
DLCround-PT-12a-02: LTL true skeleton: LTL model checker
DLCround-PT-12a-07: INITIAL false preprocessing
DLCround-PT-12a-09: LTL true LTL model checker
DLCround-PT-12a-10: LTL/CTL true LTL model checker
DLCround-PT-12a-11: LTL false LTL model checker
DLCround-PT-12a-12: CONJ false skeleton: LTL model checker
DLCround-PT-12a-13: LTL false LTL model checker
DLCround-PT-12a-14: CONJ false skeleton: LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DLCround-PT-12a-01: LTL 0 1 0 0 1 0 0 0
DLCround-PT-12a-03: LTL 0 1 0 0 1 0 0 0
DLCround-PT-12a-04: LTL 0 1 0 0 1 0 0 0
DLCround-PT-12a-05: CONJ 0 1 0 0 3 0 0 0
DLCround-PT-12a-06: LTL 0 1 0 0 1 0 0 0
DLCround-PT-12a-08: LTL 0 0 1 0 1 0 0 0
DLCround-PT-12a-15: LTL 0 0 0 0 1 0 1 0
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29 LTL EXCL 58/530 6/32 DLCround-PT-12a-08 899008 m, 15885 m/sec, 70660074 t fired, .
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DLCround-PT-12a-00: LTL false LTL model checker
DLCround-PT-12a-02: LTL true skeleton: LTL model checker
DLCround-PT-12a-07: INITIAL false preprocessing
DLCround-PT-12a-09: LTL true LTL model checker
DLCround-PT-12a-10: LTL/CTL true LTL model checker
DLCround-PT-12a-11: LTL false LTL model checker
DLCround-PT-12a-12: CONJ false skeleton: LTL model checker
DLCround-PT-12a-13: LTL false LTL model checker
DLCround-PT-12a-14: CONJ false skeleton: LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DLCround-PT-12a-01: LTL 0 1 0 0 1 0 0 0
DLCround-PT-12a-03: LTL 0 1 0 0 1 0 0 0
DLCround-PT-12a-04: LTL 0 1 0 0 1 0 0 0
DLCround-PT-12a-05: CONJ 0 1 0 0 3 0 0 0
DLCround-PT-12a-06: LTL 0 1 0 0 1 0 0 0
DLCround-PT-12a-08: LTL 0 0 1 0 1 0 0 0
DLCround-PT-12a-15: LTL 0 0 0 0 1 0 1 0
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29 LTL EXCL 63/530 7/32 DLCround-PT-12a-08 980680 m, 16334 m/sec, 76807684 t fired, .
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DLCround-PT-12a-00: LTL false LTL model checker
DLCround-PT-12a-02: LTL true skeleton: LTL model checker
DLCround-PT-12a-07: INITIAL false preprocessing
DLCround-PT-12a-09: LTL true LTL model checker
DLCround-PT-12a-10: LTL/CTL true LTL model checker
DLCround-PT-12a-11: LTL false LTL model checker
DLCround-PT-12a-12: CONJ false skeleton: LTL model checker
DLCround-PT-12a-13: LTL false LTL model checker
DLCround-PT-12a-14: CONJ false skeleton: LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
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DLCround-PT-12a-06: LTL 0 1 0 0 1 0 0 0
DLCround-PT-12a-08: LTL 0 0 1 0 1 0 0 0
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DLCround-PT-12a-00: LTL false LTL model checker
DLCround-PT-12a-02: LTL true skeleton: LTL model checker
DLCround-PT-12a-07: INITIAL false preprocessing
DLCround-PT-12a-09: LTL true LTL model checker
DLCround-PT-12a-10: LTL/CTL true LTL model checker
DLCround-PT-12a-11: LTL false LTL model checker
DLCround-PT-12a-12: CONJ false skeleton: LTL model checker
DLCround-PT-12a-13: LTL false LTL model checker
DLCround-PT-12a-14: CONJ false skeleton: LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
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DLCround-PT-12a-06: LTL 0 1 0 0 1 0 0 0
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29 LTL EXCL 73/530 8/32 DLCround-PT-12a-08 1148258 m, 17207 m/sec, 88854773 t fired, .
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DLCround-PT-12a-00: LTL false LTL model checker
DLCround-PT-12a-02: LTL true skeleton: LTL model checker
DLCround-PT-12a-07: INITIAL false preprocessing
DLCround-PT-12a-09: LTL true LTL model checker
DLCround-PT-12a-10: LTL/CTL true LTL model checker
DLCround-PT-12a-11: LTL false LTL model checker
DLCround-PT-12a-12: CONJ false skeleton: LTL model checker
DLCround-PT-12a-13: LTL false LTL model checker
DLCround-PT-12a-14: CONJ false skeleton: LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
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DLCround-PT-12a-06: LTL 0 1 0 0 1 0 0 0
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DLCround-PT-12a-00: LTL false LTL model checker
DLCround-PT-12a-02: LTL true skeleton: LTL model checker
DLCround-PT-12a-07: INITIAL false preprocessing
DLCround-PT-12a-09: LTL true LTL model checker
DLCround-PT-12a-10: LTL/CTL true LTL model checker
DLCround-PT-12a-11: LTL false LTL model checker
DLCround-PT-12a-12: CONJ false skeleton: LTL model checker
DLCround-PT-12a-13: LTL false LTL model checker
DLCround-PT-12a-14: CONJ false skeleton: LTL model checker
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29 LTL EXCL 83/530 9/32 DLCround-PT-12a-08 1307612 m, 16076 m/sec, 100945433 t fired, .
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DLCround-PT-12a-07: INITIAL false preprocessing
DLCround-PT-12a-09: LTL true LTL model checker
DLCround-PT-12a-10: LTL/CTL true LTL model checker
DLCround-PT-12a-11: LTL false LTL model checker
DLCround-PT-12a-12: CONJ false skeleton: LTL model checker
DLCround-PT-12a-13: LTL false LTL model checker
DLCround-PT-12a-14: CONJ false skeleton: LTL model checker
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DLCround-PT-12a-00: LTL false LTL model checker
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DLCround-PT-12a-07: INITIAL false preprocessing
DLCround-PT-12a-09: LTL true LTL model checker
DLCround-PT-12a-10: LTL/CTL true LTL model checker
DLCround-PT-12a-11: LTL false LTL model checker
DLCround-PT-12a-12: CONJ false skeleton: LTL model checker
DLCround-PT-12a-13: LTL false LTL model checker
DLCround-PT-12a-14: CONJ false skeleton: LTL model checker
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DLCround-PT-12a-00: LTL false LTL model checker
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DLCround-PT-12a-07: INITIAL false preprocessing
DLCround-PT-12a-09: LTL true LTL model checker
DLCround-PT-12a-10: LTL/CTL true LTL model checker
DLCround-PT-12a-11: LTL false LTL model checker
DLCround-PT-12a-12: CONJ false skeleton: LTL model checker
DLCround-PT-12a-13: LTL false LTL model checker
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DLCround-PT-12a-00: LTL false LTL model checker
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DLCround-PT-12a-07: INITIAL false preprocessing
DLCround-PT-12a-09: LTL true LTL model checker
DLCround-PT-12a-10: LTL/CTL true LTL model checker
DLCround-PT-12a-11: LTL false LTL model checker
DLCround-PT-12a-12: CONJ false skeleton: LTL model checker
DLCround-PT-12a-13: LTL false LTL model checker
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DLCround-PT-12a-07: INITIAL false preprocessing
DLCround-PT-12a-09: LTL true LTL model checker
DLCround-PT-12a-10: LTL/CTL true LTL model checker
DLCround-PT-12a-11: LTL false LTL model checker
DLCround-PT-12a-12: CONJ false skeleton: LTL model checker
DLCround-PT-12a-13: LTL false LTL model checker
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DLCround-PT-12a-07: INITIAL false preprocessing
DLCround-PT-12a-09: LTL true LTL model checker
DLCround-PT-12a-10: LTL/CTL true LTL model checker
DLCround-PT-12a-11: LTL false LTL model checker
DLCround-PT-12a-12: CONJ false skeleton: LTL model checker
DLCround-PT-12a-13: LTL false LTL model checker
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DLCround-PT-12a-09: LTL true LTL model checker
DLCround-PT-12a-10: LTL/CTL true LTL model checker
DLCround-PT-12a-11: LTL false LTL model checker
DLCround-PT-12a-12: CONJ false skeleton: LTL model checker
DLCround-PT-12a-13: LTL false LTL model checker
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DLCround-PT-12a-07: INITIAL false preprocessing
DLCround-PT-12a-09: LTL true LTL model checker
DLCround-PT-12a-10: LTL/CTL true LTL model checker
DLCround-PT-12a-11: LTL false LTL model checker
DLCround-PT-12a-12: CONJ false skeleton: LTL model checker
DLCround-PT-12a-13: LTL false LTL model checker
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DLCround-PT-12a-09: LTL true LTL model checker
DLCround-PT-12a-10: LTL/CTL true LTL model checker
DLCround-PT-12a-11: LTL false LTL model checker
DLCround-PT-12a-12: CONJ false skeleton: LTL model checker
DLCround-PT-12a-13: LTL false LTL model checker
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DLCround-PT-12a-09: LTL true LTL model checker
DLCround-PT-12a-10: LTL/CTL true LTL model checker
DLCround-PT-12a-11: LTL false LTL model checker
DLCround-PT-12a-12: CONJ false skeleton: LTL model checker
DLCround-PT-12a-13: LTL false LTL model checker
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DLCround-PT-12a-09: LTL true LTL model checker
DLCround-PT-12a-10: LTL/CTL true LTL model checker
DLCround-PT-12a-11: LTL false LTL model checker
DLCround-PT-12a-12: CONJ false skeleton: LTL model checker
DLCround-PT-12a-13: LTL false LTL model checker
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DLCround-PT-12a-09: LTL true LTL model checker
DLCround-PT-12a-10: LTL/CTL true LTL model checker
DLCround-PT-12a-11: LTL false LTL model checker
DLCround-PT-12a-12: CONJ false skeleton: LTL model checker
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DLCround-PT-12a-09: LTL true LTL model checker
DLCround-PT-12a-10: LTL/CTL true LTL model checker
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DLCround-PT-12a-10: LTL/CTL true LTL model checker
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DLCround-PT-12a-09: LTL true LTL model checker
DLCround-PT-12a-10: LTL/CTL true LTL model checker
DLCround-PT-12a-11: LTL false LTL model checker
DLCround-PT-12a-12: CONJ false skeleton: LTL model checker
DLCround-PT-12a-13: LTL false LTL model checker
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Sequence of Actions to be Executed by the VM
This is useful if one wants to reexecute the tool in the VM from the submitted image disk.
set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="DLCround-PT-12a"
export BK_EXAMINATION="LTLCardinality"
export BK_TOOL="lola"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"
# this is specific to your benchmark or test
export BIN_DIR="$HOME/BenchKit/bin"
# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi
# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-4028"
echo " Executing tool lola"
echo " Input is DLCround-PT-12a, examination is LTLCardinality"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r061-tall-162038393200420"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"
tar xzf /home/mcc/BenchKit/INPUTS/DLCround-PT-12a.tgz
mv DLCround-PT-12a execution
cd execution
if [ "LTLCardinality" = "ReachabilityDeadlock" ] || [ "LTLCardinality" = "UpperBounds" ] || [ "LTLCardinality" = "QuasiLiveness" ] || [ "LTLCardinality" = "StableMarking" ] || [ "LTLCardinality" = "Liveness" ] || [ "LTLCardinality" = "OneSafe" ] || [ "LTLCardinality" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh
echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "LTLCardinality" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "LTLCardinality" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "LTLCardinality.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property LTLCardinality.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "LTLCardinality.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '
echo "FORMULA_NAME $x"
done
elif [ "LTLCardinality" = "ReachabilityDeadlock" ] || [ "LTLCardinality" = "QuasiLiveness" ] || [ "LTLCardinality" = "StableMarking" ] || [ "LTLCardinality" = "Liveness" ] || [ "LTLCardinality" = "OneSafe" ] ; then
echo "FORMULA_NAME LTLCardinality"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;