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jQuery Multi Level CSS Menu Css3Menu.com

Model Checking Contest 2021
11th edition, Paris, France, June 23, 2021
Execution of r061-tall-162038392900206
Last Updated
Jun 28, 2021

About the Execution of LoLA for DLCflexbar-PT-4b

Execution Summary
Max Memory
Used (MB)		 Time wait (ms) CPU Usage (ms) I/O Wait (ms) Computed Result Execution
Status
1227.863 108427.00 131311.00 307.30 FTFFFTTFTFTFFFFT normal

Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/data/fkordon/mcc2021-input.r061-tall-162038392900206.qcow2', fmt=qcow2 size=4294967296 backing_file='/data/fkordon/mcc2021-input.qcow2' encryption=off cluster_size=65536 lazy_refcounts=off
Waiting for the VM to be ready (probing ssh)
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=====================================================================
Generated by BenchKit 2-4028
Executing tool lola
Input is DLCflexbar-PT-4b, examination is ReachabilityCardinality
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r061-tall-162038392900206
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 4.5M
-rw-r--r-- 1 mcc users 14K May 5 16:58 CTLCardinality.txt
-rw-r--r-- 1 mcc users 123K May 5 16:58 CTLCardinality.xml
-rw-r--r-- 1 mcc users 11K May 5 16:58 CTLFireability.txt
-rw-r--r-- 1 mcc users 86K May 5 16:58 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K May 6 14:48 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.4K May 6 14:48 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 3.6K Mar 28 15:57 LTLCardinality.txt
-rw-r--r-- 1 mcc users 26K Mar 28 15:57 LTLCardinality.xml
-rw-r--r-- 1 mcc users 1.9K Mar 28 15:57 LTLFireability.txt
-rw-r--r-- 1 mcc users 15K Mar 28 15:57 LTLFireability.xml
-rw-r--r-- 1 mcc users 3.4K Mar 23 03:50 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 17K Mar 23 03:50 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 2.8K Mar 22 13:49 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 16K Mar 22 13:49 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.6K Mar 22 09:10 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.7K Mar 22 09:10 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 May 5 16:51 equiv_col
-rw-r--r-- 1 mcc users 3 May 5 16:51 instance
-rw-r--r-- 1 mcc users 6 May 5 16:51 iscolored
-rw-r--r-- 1 mcc users 4.1M May 5 16:51 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME DLCflexbar-PT-4b-ReachabilityCardinality-00
FORMULA_NAME DLCflexbar-PT-4b-ReachabilityCardinality-01
FORMULA_NAME DLCflexbar-PT-4b-ReachabilityCardinality-02
FORMULA_NAME DLCflexbar-PT-4b-ReachabilityCardinality-03
FORMULA_NAME DLCflexbar-PT-4b-ReachabilityCardinality-04
FORMULA_NAME DLCflexbar-PT-4b-ReachabilityCardinality-05
FORMULA_NAME DLCflexbar-PT-4b-ReachabilityCardinality-06
FORMULA_NAME DLCflexbar-PT-4b-ReachabilityCardinality-07
FORMULA_NAME DLCflexbar-PT-4b-ReachabilityCardinality-08
FORMULA_NAME DLCflexbar-PT-4b-ReachabilityCardinality-09
FORMULA_NAME DLCflexbar-PT-4b-ReachabilityCardinality-10
FORMULA_NAME DLCflexbar-PT-4b-ReachabilityCardinality-11
FORMULA_NAME DLCflexbar-PT-4b-ReachabilityCardinality-12
FORMULA_NAME DLCflexbar-PT-4b-ReachabilityCardinality-13
FORMULA_NAME DLCflexbar-PT-4b-ReachabilityCardinality-14
FORMULA_NAME DLCflexbar-PT-4b-ReachabilityCardinality-15

=== Now, execution of the tool begins

BK_START 1620436532065

starting LoLA
BK_INPUT DLCflexbar-PT-4b
BK_EXAMINATION: ReachabilityCardinality
bin directory: /home/mcc/BenchKit/bin
current directory: /home/mcc/execution
ReachabilityCardinality

FORMULA DLCflexbar-PT-4b-ReachabilityCardinality-10 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA DLCflexbar-PT-4b-ReachabilityCardinality-07 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA DLCflexbar-PT-4b-ReachabilityCardinality-04 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA DLCflexbar-PT-4b-ReachabilityCardinality-09 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA DLCflexbar-PT-4b-ReachabilityCardinality-00 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA DLCflexbar-PT-4b-ReachabilityCardinality-01 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA DLCflexbar-PT-4b-ReachabilityCardinality-03 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA DLCflexbar-PT-4b-ReachabilityCardinality-12 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA DLCflexbar-PT-4b-ReachabilityCardinality-15 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA DLCflexbar-PT-4b-ReachabilityCardinality-13 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA DLCflexbar-PT-4b-ReachabilityCardinality-11 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA DLCflexbar-PT-4b-ReachabilityCardinality-14 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA DLCflexbar-PT-4b-ReachabilityCardinality-05 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA DLCflexbar-PT-4b-ReachabilityCardinality-02 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA DLCflexbar-PT-4b-ReachabilityCardinality-08 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA DLCflexbar-PT-4b-ReachabilityCardinality-06 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

BK_STOP 1620436640492

--------------------
content from stderr:

lola: MEM LIMIT 32
lola: MEM LIMIT 5
lola: NET
lola: input: PNML file (--pnmlnet)
lola: reading net from /home/mcc/execution/model.pnml
lola: reading pnml
lola: PNML file contains place/transition net
lola: finished parsing
lola: closed net file /home/mcc/execution/model.pnml
lola: Reading formula.
lola: Using XML format (--xmlformula)
lola: reading XML formula
lola: reading formula from /home/mcc/execution/ReachabilityCardinality.xml
lola: Created skeleton in 2.000000 secs.
lola: Created skeleton in 3.000000 secs.
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DLCflexbar-PT-4b-ReachabilityCardinality-00: EF 0 0 0 0 1 0 0 0
DLCflexbar-PT-4b-ReachabilityCardinality-01: EF 0 0 0 0 1 0 0 0
DLCflexbar-PT-4b-ReachabilityCardinality-02: AG 0 0 0 0 0 0 0 0
DLCflexbar-PT-4b-ReachabilityCardinality-03: EF 0 0 0 0 0 0 0 0
DLCflexbar-PT-4b-ReachabilityCardinality-04: AG 0 0 0 0 0 0 0 0
DLCflexbar-PT-4b-ReachabilityCardinality-05: EF 0 0 0 0 0 0 0 0
DLCflexbar-PT-4b-ReachabilityCardinality-06: AG 0 0 0 0 0 0 0 0
DLCflexbar-PT-4b-ReachabilityCardinality-07: EF 0 0 0 0 0 0 0 0
DLCflexbar-PT-4b-ReachabilityCardinality-08: EF 0 0 0 0 0 0 0 0
DLCflexbar-PT-4b-ReachabilityCardinality-09: AG 0 0 0 0 0 0 0 0
DLCflexbar-PT-4b-ReachabilityCardinality-10: EF 0 0 0 0 0 0 0 0
DLCflexbar-PT-4b-ReachabilityCardinality-11: AG 0 0 0 0 0 0 0 0
DLCflexbar-PT-4b-ReachabilityCardinality-12: AG 0 0 0 0 0 0 0 0
DLCflexbar-PT-4b-ReachabilityCardinality-13: AG 0 0 0 0 0 0 0 0
DLCflexbar-PT-4b-ReachabilityCardinality-14: EF 0 0 0 0 0 0 0 0
DLCflexbar-PT-4b-ReachabilityCardinality-15: AG 0 0 0 0 0 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 70 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 16
lola: Created skeleton in 2.000000 secs.
lola: Created skeleton in 2.000000 secs.
lola: Rule S: 0 transitions removed,0 places removed
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DLCflexbar-PT-4b-ReachabilityCardinality-00: EF 0 0 0 0 1 0 0 0
DLCflexbar-PT-4b-ReachabilityCardinality-01: EF 0 0 0 0 1 0 0 0
DLCflexbar-PT-4b-ReachabilityCardinality-02: AG 0 0 0 0 1 0 0 0
DLCflexbar-PT-4b-ReachabilityCardinality-03: EF 0 0 0 0 1 0 0 0
DLCflexbar-PT-4b-ReachabilityCardinality-04: AG 0 0 0 0 0 0 0 0
DLCflexbar-PT-4b-ReachabilityCardinality-05: EF 0 0 0 0 0 0 0 0
DLCflexbar-PT-4b-ReachabilityCardinality-06: AG 0 0 0 0 0 0 0 0
DLCflexbar-PT-4b-ReachabilityCardinality-07: EF 0 0 0 0 0 0 0 0
DLCflexbar-PT-4b-ReachabilityCardinality-08: EF 0 0 0 0 0 0 0 0
DLCflexbar-PT-4b-ReachabilityCardinality-09: AG 0 0 0 0 0 0 0 0
DLCflexbar-PT-4b-ReachabilityCardinality-10: EF 0 0 0 0 0 0 0 0
DLCflexbar-PT-4b-ReachabilityCardinality-11: AG 0 0 0 0 0 0 0 0
DLCflexbar-PT-4b-ReachabilityCardinality-12: AG 0 0 0 0 0 0 0 0
DLCflexbar-PT-4b-ReachabilityCardinality-13: AG 0 0 0 0 0 0 0 0
DLCflexbar-PT-4b-ReachabilityCardinality-14: EF 0 0 0 0 0 0 0 0
DLCflexbar-PT-4b-ReachabilityCardinality-15: AG 0 0 0 0 0 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 75 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 16
lola: Created skeleton in 2.000000 secs.
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DLCflexbar-PT-4b-ReachabilityCardinality-00: EF 0 0 0 0 1 0 0 0
DLCflexbar-PT-4b-ReachabilityCardinality-01: EF 0 0 0 0 1 0 0 0
DLCflexbar-PT-4b-ReachabilityCardinality-02: AG 0 0 0 0 1 0 0 0
DLCflexbar-PT-4b-ReachabilityCardinality-03: EF 0 0 0 0 1 0 0 0
DLCflexbar-PT-4b-ReachabilityCardinality-04: AG 0 0 0 0 1 0 0 0
DLCflexbar-PT-4b-ReachabilityCardinality-05: EF 0 0 0 0 0 0 0 0
DLCflexbar-PT-4b-ReachabilityCardinality-06: AG 0 0 0 0 0 0 0 0
DLCflexbar-PT-4b-ReachabilityCardinality-07: EF 0 0 0 0 0 0 0 0
DLCflexbar-PT-4b-ReachabilityCardinality-08: EF 0 0 0 0 0 0 0 0
DLCflexbar-PT-4b-ReachabilityCardinality-09: AG 0 0 0 0 0 0 0 0
DLCflexbar-PT-4b-ReachabilityCardinality-10: EF 0 0 0 0 0 0 0 0
DLCflexbar-PT-4b-ReachabilityCardinality-11: AG 0 0 0 0 0 0 0 0
DLCflexbar-PT-4b-ReachabilityCardinality-12: AG 0 0 0 0 0 0 0 0
DLCflexbar-PT-4b-ReachabilityCardinality-13: AG 0 0 0 0 0 0 0 0
DLCflexbar-PT-4b-ReachabilityCardinality-14: EF 0 0 0 0 0 0 0 0
DLCflexbar-PT-4b-ReachabilityCardinality-15: AG 0 0 0 0 0 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 80 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 16
lola: Created skeleton in 2.000000 secs.
lola: Created skeleton in 3.000000 secs.
lola: Created skeleton in 2.000000 secs.
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DLCflexbar-PT-4b-ReachabilityCardinality-00: EF 0 0 0 0 1 0 0 0
DLCflexbar-PT-4b-ReachabilityCardinality-01: EF 0 0 0 0 1 0 0 0
DLCflexbar-PT-4b-ReachabilityCardinality-02: AG 0 0 0 0 1 0 0 0
DLCflexbar-PT-4b-ReachabilityCardinality-03: EF 0 0 0 0 1 0 0 0
DLCflexbar-PT-4b-ReachabilityCardinality-04: AG 0 0 0 0 1 0 0 0
DLCflexbar-PT-4b-ReachabilityCardinality-05: EF 0 0 0 0 1 0 0 0
DLCflexbar-PT-4b-ReachabilityCardinality-06: AG 0 0 0 0 0 0 0 0
DLCflexbar-PT-4b-ReachabilityCardinality-07: EF 0 0 0 0 1 0 0 0
DLCflexbar-PT-4b-ReachabilityCardinality-08: EF 0 0 0 0 0 0 0 0
DLCflexbar-PT-4b-ReachabilityCardinality-09: AG 0 0 0 0 1 0 0 0
DLCflexbar-PT-4b-ReachabilityCardinality-10: EF 0 0 0 0 0 0 0 0
DLCflexbar-PT-4b-ReachabilityCardinality-11: AG 0 0 0 0 0 0 0 0
DLCflexbar-PT-4b-ReachabilityCardinality-12: AG 0 0 0 0 0 0 0 0
DLCflexbar-PT-4b-ReachabilityCardinality-13: AG 0 0 0 0 0 0 0 0
DLCflexbar-PT-4b-ReachabilityCardinality-14: EF 0 0 0 0 0 0 0 0
DLCflexbar-PT-4b-ReachabilityCardinality-15: AG 0 0 0 0 0 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 85 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DLCflexbar-PT-4b-ReachabilityCardinality-00: EF 0 0 0 0 1 0 0 0
DLCflexbar-PT-4b-ReachabilityCardinality-01: EF 0 0 0 0 1 0 0 0
DLCflexbar-PT-4b-ReachabilityCardinality-02: AG 0 0 0 0 1 0 0 0
DLCflexbar-PT-4b-ReachabilityCardinality-03: EF 0 0 0 0 1 0 0 0
DLCflexbar-PT-4b-ReachabilityCardinality-04: AG 0 0 0 0 1 0 0 0
DLCflexbar-PT-4b-ReachabilityCardinality-05: EF 0 0 0 0 1 0 0 0
DLCflexbar-PT-4b-ReachabilityCardinality-06: AG 0 0 0 0 0 0 0 0
DLCflexbar-PT-4b-ReachabilityCardinality-07: EF 0 0 0 0 1 0 0 0
DLCflexbar-PT-4b-ReachabilityCardinality-08: EF 0 0 0 0 0 0 0 0
DLCflexbar-PT-4b-ReachabilityCardinality-09: AG 0 0 0 0 1 0 0 0
DLCflexbar-PT-4b-ReachabilityCardinality-10: EF 0 0 0 0 0 0 0 0
DLCflexbar-PT-4b-ReachabilityCardinality-11: AG 0 0 0 0 0 0 0 0
DLCflexbar-PT-4b-ReachabilityCardinality-12: AG 0 0 0 0 0 0 0 0
DLCflexbar-PT-4b-ReachabilityCardinality-13: AG 0 0 0 0 0 0 0 0
DLCflexbar-PT-4b-ReachabilityCardinality-14: EF 0 0 0 0 0 0 0 0
DLCflexbar-PT-4b-ReachabilityCardinality-15: AG 0 0 0 0 0 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 90 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 16
lola: Created skeleton in 7.000000 secs.
lola: Created skeleton in 2.000000 secs.
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DLCflexbar-PT-4b-ReachabilityCardinality-00: EF 0 0 0 0 1 0 0 0
DLCflexbar-PT-4b-ReachabilityCardinality-01: EF 0 0 0 0 1 0 0 0
DLCflexbar-PT-4b-ReachabilityCardinality-02: AG 0 0 0 0 1 0 0 0
DLCflexbar-PT-4b-ReachabilityCardinality-03: EF 0 0 0 0 1 0 0 0
DLCflexbar-PT-4b-ReachabilityCardinality-04: AG 0 0 0 0 1 0 0 0
DLCflexbar-PT-4b-ReachabilityCardinality-05: EF 0 0 0 0 1 0 0 0
DLCflexbar-PT-4b-ReachabilityCardinality-06: AG 0 0 0 0 0 0 0 0
DLCflexbar-PT-4b-ReachabilityCardinality-07: EF 0 0 0 0 1 0 0 0
DLCflexbar-PT-4b-ReachabilityCardinality-08: EF 0 0 0 0 1 0 0 0
DLCflexbar-PT-4b-ReachabilityCardinality-09: AG 0 0 0 0 1 0 0 0
DLCflexbar-PT-4b-ReachabilityCardinality-10: EF 0 0 0 0 0 0 0 0
DLCflexbar-PT-4b-ReachabilityCardinality-11: AG 0 0 0 0 0 0 0 0
DLCflexbar-PT-4b-ReachabilityCardinality-12: AG 0 0 0 0 1 0 0 0
DLCflexbar-PT-4b-ReachabilityCardinality-13: AG 0 0 0 0 0 0 0 0
DLCflexbar-PT-4b-ReachabilityCardinality-14: EF 0 0 0 0 0 0 0 0
DLCflexbar-PT-4b-ReachabilityCardinality-15: AG 0 0 0 0 0 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

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lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: LAUNCH task # 52 (type EXCL) for 30 DLCflexbar-PT-4b-ReachabilityCardinality-10
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lola: LAUNCH task # 49 (type EQUN) for 30 DLCflexbar-PT-4b-ReachabilityCardinality-10
lola: rewrite Frontend/Parser/formula_rewrite.k:711
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lola: LAUNCH task # 51 (type SRCH) for 30 DLCflexbar-PT-4b-ReachabilityCardinality-10
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lola: FINISHED task # 51 (type SRCH) for DLCflexbar-PT-4b-ReachabilityCardinality-10
lola: result : true
lola: markings : 2
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lola: CANCELED task # 48 (type FNDP) for DLCflexbar-PT-4b-ReachabilityCardinality-10 (obsolete)
lola: CANCELED task # 49 (type EQUN) for DLCflexbar-PT-4b-ReachabilityCardinality-10 (obsolete)
lola: CANCELED task # 52 (type EXCL) for DLCflexbar-PT-4b-ReachabilityCardinality-10 (obsolete)
lola: FINISHED task # 48 (type FNDP) for DLCflexbar-PT-4b-ReachabilityCardinality-10
lola: result : true
lola: tried executions : 1
lola: time used : 0.000000
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sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-49.sara.
sara: place or transition ordering is non-deterministic

lola: FINISHED task # 49 (type EQUN) for DLCflexbar-PT-4b-ReachabilityCardinality-10
lola: result : true
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DLCflexbar-PT-4b-ReachabilityCardinality-10: EF true tandem / insertion

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DLCflexbar-PT-4b-ReachabilityCardinality-00: EF 0 0 0 0 1 0 0 0
DLCflexbar-PT-4b-ReachabilityCardinality-01: EF 0 0 0 0 1 0 0 0
DLCflexbar-PT-4b-ReachabilityCardinality-02: AG 0 0 0 0 1 0 0 0
DLCflexbar-PT-4b-ReachabilityCardinality-03: EF 0 0 0 0 1 0 0 0
DLCflexbar-PT-4b-ReachabilityCardinality-04: AG 0 0 0 0 1 0 0 0
DLCflexbar-PT-4b-ReachabilityCardinality-05: EF 0 0 0 0 1 0 0 0
DLCflexbar-PT-4b-ReachabilityCardinality-06: AG 0 0 0 0 0 0 0 0
DLCflexbar-PT-4b-ReachabilityCardinality-07: EF 0 0 0 0 1 0 0 0
DLCflexbar-PT-4b-ReachabilityCardinality-08: EF 0 0 0 0 1 0 0 0
DLCflexbar-PT-4b-ReachabilityCardinality-09: AG 0 0 0 0 1 0 0 0
DLCflexbar-PT-4b-ReachabilityCardinality-11: AG 0 0 0 0 0 0 0 0
DLCflexbar-PT-4b-ReachabilityCardinality-12: AG 0 0 0 0 1 0 0 0
DLCflexbar-PT-4b-ReachabilityCardinality-13: AG 0 0 0 0 0 0 0 0
DLCflexbar-PT-4b-ReachabilityCardinality-14: EF 0 0 0 0 1 0 0 0
DLCflexbar-PT-4b-ReachabilityCardinality-15: AG 0 0 0 0 0 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 100 secs. Pages in use: 2
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lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: LAUNCH task # 61 (type EXCL) for 21 DLCflexbar-PT-4b-ReachabilityCardinality-07
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lola: LAUNCH task # 58 (type SRCH) for 21 DLCflexbar-PT-4b-ReachabilityCardinality-07
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lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: FINISHED task # 61 (type EXCL) for DLCflexbar-PT-4b-ReachabilityCardinality-07
lola: result : false
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lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: FINISHED task # 58 (type SRCH) for DLCflexbar-PT-4b-ReachabilityCardinality-07
lola: result : false
lola: markings : 2
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lola: time used : 0.000000
lola: memory pages used : 1
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-55.sara.
sara: place or transition ordering is non-deterministic

lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: CANCELED task # 54 (type FNDP) for DLCflexbar-PT-4b-ReachabilityCardinality-07 (obsolete)
lola: CANCELED task # 55 (type EQUN) for DLCflexbar-PT-4b-ReachabilityCardinality-07 (obsolete)
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: LAUNCH task # 81 (type EXCL) for 0 DLCflexbar-PT-4b-ReachabilityCardinality-00
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lola: LAUNCH task # 71 (type FNDP) for 12 DLCflexbar-PT-4b-ReachabilityCardinality-04
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lola: LAUNCH task # 74 (type SRCH) for 12 DLCflexbar-PT-4b-ReachabilityCardinality-04
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: FINISHED task # 71 (type FNDP) for DLCflexbar-PT-4b-ReachabilityCardinality-04
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: result : true
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-72.sara.
sara: place or transition ordering is non-deterministic

lola: CANCELED task # 72 (type EQUN) for DLCflexbar-PT-4b-ReachabilityCardinality-04 (obsolete)
lola: CANCELED task # 74 (type SRCH) for DLCflexbar-PT-4b-ReachabilityCardinality-04 (obsolete)
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lola: time limit : 32000000 sec
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lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: LAUNCH task # 103 (type SRCH) for 27 DLCflexbar-PT-4b-ReachabilityCardinality-09
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: FINISHED task # 54 (type FNDP) for DLCflexbar-PT-4b-ReachabilityCardinality-07
lola: result : unknown
lola: fired transitions : 809
lola: tried executions : 2
lola: time used : 0.000000
lola: memory pages used : 0
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: FINISHED task # 55 (type EQUN) for DLCflexbar-PT-4b-ReachabilityCardinality-07
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-101.sara.
sara: place or transition ordering is non-deterministic

lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: result : false
lola: FINISHED task # 72 (type EQUN) for DLCflexbar-PT-4b-ReachabilityCardinality-04
lola: result : true
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: FINISHED task # 103 (type SRCH) for DLCflexbar-PT-4b-ReachabilityCardinality-09
lola: result : true
lola: markings : 3
lola: fired transitions : 2
lola: time used : 0.000000
lola: memory pages used : 1
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: CANCELED task # 100 (type FNDP) for DLCflexbar-PT-4b-ReachabilityCardinality-09 (obsolete)
lola: CANCELED task # 101 (type EQUN) for DLCflexbar-PT-4b-ReachabilityCardinality-09 (obsolete)
lola: LAUNCH task # 59 (type FNDP) for 42 DLCflexbar-PT-4b-ReachabilityCardinality-14
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lola: FINISHED task # 81 (type EXCL) for DLCflexbar-PT-4b-ReachabilityCardinality-00
lola: result : false
lola: markings : 3
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lola: time used : 0.000000
lola: memory pages used : 1
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: LAUNCH task # 109 (type EXCL) for 9 DLCflexbar-PT-4b-ReachabilityCardinality-03
lola: time limit : 291 sec
lola: memory limit: 32 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: FINISHED task # 100 (type FNDP) for DLCflexbar-PT-4b-ReachabilityCardinality-09
lola: result : true
lola: fired transitions : 1
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-62.sara.
sara: place or transition ordering is non-deterministic

lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: FINISHED task # 101 (type EQUN) for DLCflexbar-PT-4b-ReachabilityCardinality-09
lola: result : true
lola: FINISHED task # 109 (type EXCL) for DLCflexbar-PT-4b-ReachabilityCardinality-03
lola: result : false
lola: markings : 4
lola: fired transitions : 7
lola: time used : 0.000000
lola: memory pages used : 1
lola: FINISHED task # 84 (type FNDP) for DLCflexbar-PT-4b-ReachabilityCardinality-01
lola: result : true
lola: fired transitions : 2
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: LAUNCH task # 114 (type EXCL) for 45 DLCflexbar-PT-4b-ReachabilityCardinality-15
lola: time limit : 249 sec
lola: memory limit: 32 pages
lola: LAUNCH task # 119 (type FNDP) for 36 DLCflexbar-PT-4b-ReachabilityCardinality-12
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: FINISHED task # 114 (type EXCL) for DLCflexbar-PT-4b-ReachabilityCardinality-15
lola: result : false
lola: markings : 9
lola: fired transitions : 11
lola: time used : 0.000000
lola: memory pages used : 1
lola: FINISHED task # 119 (type FNDP) for DLCflexbar-PT-4b-ReachabilityCardinality-12
lola: result : true
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
lola: LAUNCH task # 93 (type EXCL) for 39 DLCflexbar-PT-4b-ReachabilityCardinality-13
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lola: FINISHED task # 93 (type EXCL) for DLCflexbar-PT-4b-ReachabilityCardinality-13
lola: result : true
lola: markings : 4
lola: fired transitions : 3
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 124 (type EXCL) for 6 DLCflexbar-PT-4b-ReachabilityCardinality-02
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lola: memory limit: 32 pages
lola: FINISHED task # 67 (type FNDP) for DLCflexbar-PT-4b-ReachabilityCardinality-11
lola: result : true
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
lola: LAUNCH task # 112 (type FNDP) for 15 DLCflexbar-PT-4b-ReachabilityCardinality-05
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 62 (type EQUN) for DLCflexbar-PT-4b-ReachabilityCardinality-14
lola: result : false
lola: CANCELED task # 59 (type FNDP) for DLCflexbar-PT-4b-ReachabilityCardinality-14 (obsolete)
lola: LAUNCH task # 118 (type FNDP) for 24 DLCflexbar-PT-4b-ReachabilityCardinality-08
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lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 112 (type FNDP) for DLCflexbar-PT-4b-ReachabilityCardinality-05
lola: result : true
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
lola: LAUNCH task # 95 (type FNDP) for 6 DLCflexbar-PT-4b-ReachabilityCardinality-02
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 95 (type FNDP) for DLCflexbar-PT-4b-ReachabilityCardinality-02
lola: result : true
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
lola: CANCELED task # 124 (type EXCL) for DLCflexbar-PT-4b-ReachabilityCardinality-02 (obsolete)
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: LAUNCH task # 141 (type EXCL) for 24 DLCflexbar-PT-4b-ReachabilityCardinality-08
lola: time limit : 1166 sec
lola: memory limit: 32 pages
lola: LAUNCH task # 140 (type SRCH) for 24 DLCflexbar-PT-4b-ReachabilityCardinality-08
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 118 (type FNDP) for DLCflexbar-PT-4b-ReachabilityCardinality-08
lola: result : true
lola: fired transitions : 1
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
lola: CANCELED task # 129 (type EQUN) for DLCflexbar-PT-4b-ReachabilityCardinality-08 (obsolete)
lola: CANCELED task # 140 (type SRCH) for DLCflexbar-PT-4b-ReachabilityCardinality-08 (obsolete)
lola: CANCELED task # 141 (type EXCL) for DLCflexbar-PT-4b-ReachabilityCardinality-08 (obsolete)
lola: FINISHED task # 59 (type FNDP) for DLCflexbar-PT-4b-ReachabilityCardinality-14
lola: result : unknown
lola: fired transitions : 772538
lola: tried executions : 2
lola: time used : 0.000000
lola: memory pages used : 0
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-129.sara.
sara: place or transition ordering is non-deterministic

lola: FINISHED task # 129 (type EQUN) for DLCflexbar-PT-4b-ReachabilityCardinality-08
lola: result : true
lola: Created skeleton in 3.000000 secs.
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DLCflexbar-PT-4b-ReachabilityCardinality-00: EF false tandem / relaxed
DLCflexbar-PT-4b-ReachabilityCardinality-01: EF true findpath
DLCflexbar-PT-4b-ReachabilityCardinality-02: AG false findpath
DLCflexbar-PT-4b-ReachabilityCardinality-03: EF false tandem / relaxed
DLCflexbar-PT-4b-ReachabilityCardinality-04: AG false findpath
DLCflexbar-PT-4b-ReachabilityCardinality-05: EF true findpath
DLCflexbar-PT-4b-ReachabilityCardinality-07: EF false tandem / insertion
DLCflexbar-PT-4b-ReachabilityCardinality-08: EF true findpath
DLCflexbar-PT-4b-ReachabilityCardinality-09: AG false tandem / insertion
DLCflexbar-PT-4b-ReachabilityCardinality-10: EF true tandem / insertion
DLCflexbar-PT-4b-ReachabilityCardinality-11: AG false findpath
DLCflexbar-PT-4b-ReachabilityCardinality-12: AG false findpath
DLCflexbar-PT-4b-ReachabilityCardinality-13: AG false tandem / relaxed
DLCflexbar-PT-4b-ReachabilityCardinality-14: EF false state equation
DLCflexbar-PT-4b-ReachabilityCardinality-15: AG true tandem / relaxed

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
DLCflexbar-PT-4b-ReachabilityCardinality-06: AG 0 0 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 105 secs. Pages in use: 2
# running tasks: 0 of 4 Visible: 16
lola: Created skeleton in 2.000000 secs.
lola: Created skeleton in 2.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: LAUNCH task # 150 (type EXCL) for 18 DLCflexbar-PT-4b-ReachabilityCardinality-06
lola: time limit : 3492 sec
lola: memory limit: 32 pages
lola: LAUNCH task # 146 (type FNDP) for 18 DLCflexbar-PT-4b-ReachabilityCardinality-06
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 147 (type EQUN) for 18 DLCflexbar-PT-4b-ReachabilityCardinality-06
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: LAUNCH task # 149 (type SRCH) for 18 DLCflexbar-PT-4b-ReachabilityCardinality-06
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 150 (type EXCL) for DLCflexbar-PT-4b-ReachabilityCardinality-06
lola: result : false
lola: markings : 2
lola: fired transitions : 2
lola: time used : 0.000000
lola: memory pages used : 1
lola: CANCELED task # 146 (type FNDP) for DLCflexbar-PT-4b-ReachabilityCardinality-06 (obsolete)
lola: CANCELED task # 147 (type EQUN) for DLCflexbar-PT-4b-ReachabilityCardinality-06 (obsolete)
lola: CANCELED task # 149 (type SRCH) for DLCflexbar-PT-4b-ReachabilityCardinality-06 (obsolete)
lola: Portfolio finished: no open formulas

FINAL RESULTS
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
DLCflexbar-PT-4b-ReachabilityCardinality-00: EF false tandem / relaxed
DLCflexbar-PT-4b-ReachabilityCardinality-01: EF true findpath
DLCflexbar-PT-4b-ReachabilityCardinality-02: AG false findpath
DLCflexbar-PT-4b-ReachabilityCardinality-03: EF false tandem / relaxed
DLCflexbar-PT-4b-ReachabilityCardinality-04: AG false findpath
DLCflexbar-PT-4b-ReachabilityCardinality-05: EF true findpath
DLCflexbar-PT-4b-ReachabilityCardinality-06: AG true tandem / relaxed
DLCflexbar-PT-4b-ReachabilityCardinality-07: EF false tandem / insertion
DLCflexbar-PT-4b-ReachabilityCardinality-08: EF true findpath
DLCflexbar-PT-4b-ReachabilityCardinality-09: AG false tandem / insertion
DLCflexbar-PT-4b-ReachabilityCardinality-10: EF true tandem / insertion
DLCflexbar-PT-4b-ReachabilityCardinality-11: AG false findpath
DLCflexbar-PT-4b-ReachabilityCardinality-12: AG false findpath
DLCflexbar-PT-4b-ReachabilityCardinality-13: AG false tandem / relaxed
DLCflexbar-PT-4b-ReachabilityCardinality-14: EF false state equation
DLCflexbar-PT-4b-ReachabilityCardinality-15: AG true tandem / relaxed


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Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="DLCflexbar-PT-4b"
export BK_EXAMINATION="ReachabilityCardinality"
export BK_TOOL="lola"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-4028"
echo " Executing tool lola"
echo " Input is DLCflexbar-PT-4b, examination is ReachabilityCardinality"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r061-tall-162038392900206"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/DLCflexbar-PT-4b.tgz
mv DLCflexbar-PT-4b execution
cd execution
if [ "ReachabilityCardinality" = "ReachabilityDeadlock" ] || [ "ReachabilityCardinality" = "UpperBounds" ] || [ "ReachabilityCardinality" = "QuasiLiveness" ] || [ "ReachabilityCardinality" = "StableMarking" ] || [ "ReachabilityCardinality" = "Liveness" ] || [ "ReachabilityCardinality" = "OneSafe" ] || [ "ReachabilityCardinality" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "ReachabilityCardinality" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "ReachabilityCardinality" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "ReachabilityCardinality.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property ReachabilityCardinality.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "ReachabilityCardinality.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' ReachabilityCardinality.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ "ReachabilityCardinality" = "ReachabilityDeadlock" ] || [ "ReachabilityCardinality" = "QuasiLiveness" ] || [ "ReachabilityCardinality" = "StableMarking" ] || [ "ReachabilityCardinality" = "Liveness" ] || [ "ReachabilityCardinality" = "OneSafe" ] ; then
echo "FORMULA_NAME ReachabilityCardinality"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;