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Model Checking Contest 2021
11th edition, Paris, France, June 23, 2021
Execution of r023-tajo-162038139300170
Last Updated
Jun 28, 2021

About the Execution of LoLA for BridgeAndVehicles-PT-V10P10N10

Execution Summary
Max Memory
Used (MB)		 Time wait (ms) CPU Usage (ms) I/O Wait (ms) Computed Result Execution
Status
1227.027 13515.00 25124.00 5.00 TTTFFFTTTFFFFFFF normal

Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/mnt/tpsp/fkordon/mcc2021-input.r023-tajo-162038139300170.qcow2', fmt=qcow2 size=4294967296 backing_file='/mnt/tpsp/fkordon/mcc2021-input.qcow2' encryption=off cluster_size=65536 lazy_refcounts=off
Waiting for the VM to be ready (probing ssh)
................
=====================================================================
Generated by BenchKit 2-4028
Executing tool lola
Input is BridgeAndVehicles-PT-V10P10N10, examination is CTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r023-tajo-162038139300170
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 1.5M
-rw-r--r-- 1 mcc users 40K May 5 16:58 CTLCardinality.txt
-rw-r--r-- 1 mcc users 221K May 10 09:42 CTLCardinality.xml
-rw-r--r-- 1 mcc users 133K May 5 16:58 CTLFireability.txt
-rw-r--r-- 1 mcc users 539K May 10 09:42 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K May 6 14:48 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.4K May 6 14:48 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 4.4K Mar 28 15:46 LTLCardinality.txt
-rw-r--r-- 1 mcc users 26K Mar 28 15:46 LTLCardinality.xml
-rw-r--r-- 1 mcc users 16K Mar 28 15:46 LTLFireability.txt
-rw-r--r-- 1 mcc users 56K Mar 28 15:46 LTLFireability.xml
-rw-r--r-- 1 mcc users 6.7K Mar 23 02:48 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 26K Mar 23 02:48 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 19K Mar 22 11:00 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 61K Mar 22 11:00 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 2.1K Mar 22 09:10 UpperBounds.txt
-rw-r--r-- 1 mcc users 4.3K Mar 22 09:10 UpperBounds.xml
-rw-r--r-- 1 mcc users 5 May 5 16:51 equiv_col
-rw-r--r-- 1 mcc users 10 May 5 16:51 instance
-rw-r--r-- 1 mcc users 6 May 5 16:51 iscolored
-rw-r--r-- 1 mcc users 311K May 5 16:51 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME BridgeAndVehicles-PT-V10P10N10-CTLFireability-00
FORMULA_NAME BridgeAndVehicles-PT-V10P10N10-CTLFireability-01
FORMULA_NAME BridgeAndVehicles-PT-V10P10N10-CTLFireability-02
FORMULA_NAME BridgeAndVehicles-PT-V10P10N10-CTLFireability-03
FORMULA_NAME BridgeAndVehicles-PT-V10P10N10-CTLFireability-04
FORMULA_NAME BridgeAndVehicles-PT-V10P10N10-CTLFireability-05
FORMULA_NAME BridgeAndVehicles-PT-V10P10N10-CTLFireability-06
FORMULA_NAME BridgeAndVehicles-PT-V10P10N10-CTLFireability-07
FORMULA_NAME BridgeAndVehicles-PT-V10P10N10-CTLFireability-08
FORMULA_NAME BridgeAndVehicles-PT-V10P10N10-CTLFireability-09
FORMULA_NAME BridgeAndVehicles-PT-V10P10N10-CTLFireability-10
FORMULA_NAME BridgeAndVehicles-PT-V10P10N10-CTLFireability-11
FORMULA_NAME BridgeAndVehicles-PT-V10P10N10-CTLFireability-12
FORMULA_NAME BridgeAndVehicles-PT-V10P10N10-CTLFireability-13
FORMULA_NAME BridgeAndVehicles-PT-V10P10N10-CTLFireability-14
FORMULA_NAME BridgeAndVehicles-PT-V10P10N10-CTLFireability-15

=== Now, execution of the tool begins

BK_START 1620856785972

starting LoLA
BK_INPUT BridgeAndVehicles-PT-V10P10N10
BK_EXAMINATION: CTLFireability
bin directory: /home/mcc/BenchKit/bin
current directory: /home/mcc/execution
CTLFireability

FORMULA BridgeAndVehicles-PT-V10P10N10-CTLFireability-09 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA BridgeAndVehicles-PT-V10P10N10-CTLFireability-13 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA BridgeAndVehicles-PT-V10P10N10-CTLFireability-15 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA BridgeAndVehicles-PT-V10P10N10-CTLFireability-14 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA BridgeAndVehicles-PT-V10P10N10-CTLFireability-12 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA BridgeAndVehicles-PT-V10P10N10-CTLFireability-10 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA BridgeAndVehicles-PT-V10P10N10-CTLFireability-08 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA BridgeAndVehicles-PT-V10P10N10-CTLFireability-05 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA BridgeAndVehicles-PT-V10P10N10-CTLFireability-02 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA BridgeAndVehicles-PT-V10P10N10-CTLFireability-00 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA BridgeAndVehicles-PT-V10P10N10-CTLFireability-04 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA BridgeAndVehicles-PT-V10P10N10-CTLFireability-03 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA BridgeAndVehicles-PT-V10P10N10-CTLFireability-07 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA BridgeAndVehicles-PT-V10P10N10-CTLFireability-01 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA BridgeAndVehicles-PT-V10P10N10-CTLFireability-11 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA BridgeAndVehicles-PT-V10P10N10-CTLFireability-06 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

BK_STOP 1620856799487

--------------------
content from stderr:

lola: MEM LIMIT 32
lola: MEM LIMIT 5
lola: NET
lola: input: PNML file (--pnmlnet)
lola: reading net from /home/mcc/execution/model.pnml
lola: reading pnml
lola: PNML file contains place/transition net
lola: finished parsing
lola: closed net file /home/mcc/execution/model.pnml
lola: Reading formula.
lola: Using XML format (--xmlformula)
lola: reading XML formula
lola: reading formula from /home/mcc/execution/CTLFireability.xml
lola: rewrite Frontend/Parser/formula_rewrite.k:391
lola: rewrite Frontend/Parser/formula_rewrite.k:547
lola: rewrite Frontend/Parser/formula_rewrite.k:454
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:445
lola: rewrite Frontend/Parser/formula_rewrite.k:391
lola: rewrite Frontend/Parser/formula_rewrite.k:439
lola: rewrite Frontend/Parser/formula_rewrite.k:391
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:340
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:340
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:388
lola: rewrite Frontend/Parser/formula_rewrite.k:457
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:340
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:550
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Rule S: 0 transitions removed,0 places removed
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: LAUNCH task # 44 (type EXCL) for 43 BridgeAndVehicles-PT-V10P10N10-CTLFireability-13
lola: time limit : 224 sec
lola: memory limit: 32 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: LAUNCH task # 53 (type FNDP) for 31 BridgeAndVehicles-PT-V10P10N10-CTLFireability-09
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 54 (type EQUN) for 31 BridgeAndVehicles-PT-V10P10N10-CTLFireability-09
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 56 (type SRCH) for 31 BridgeAndVehicles-PT-V10P10N10-CTLFireability-09
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: FINISHED task # 56 (type SRCH) for BridgeAndVehicles-PT-V10P10N10-CTLFireability-09
lola: result : unknown
lola: markings : 14
lola: fired transitions : 16
lola: time used : 0.000000
lola: memory pages used : 1
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: FINISHED task # 53 (type FNDP) for BridgeAndVehicles-PT-V10P10N10-CTLFireability-09
lola: result : true
lola: fired transitions : 1612
lola: tried executions : 48
lola: time used : 0.000000
lola: memory pages used : 0
lola: CANCELED task # 54 (type EQUN) for BridgeAndVehicles-PT-V10P10N10-CTLFireability-09 (obsolete)
sara: try reading problem file /home/mcc/execution/CTLFireability-54.sara.
sara: place or transition ordering is non-deterministic
lola: FINISHED task # 44 (type EXCL) for BridgeAndVehicles-PT-V10P10N10-CTLFireability-13
lola: result : false
lola: markings : 259556
lola: fired transitions : 821888
lola: time used : 1.000000
lola: memory pages used : 2
lola: LAUNCH task # 50 (type EXCL) for 49 BridgeAndVehicles-PT-V10P10N10-CTLFireability-15
lola: time limit : 239 sec
lola: memory limit: 32 pages
lola: FINISHED task # 50 (type EXCL) for BridgeAndVehicles-PT-V10P10N10-CTLFireability-15
lola: result : false
lola: markings : 86
lola: fired transitions : 175
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 47 (type EXCL) for 46 BridgeAndVehicles-PT-V10P10N10-CTLFireability-14
lola: time limit : 256 sec
lola: memory limit: 32 pages
lola: FINISHED task # 47 (type EXCL) for BridgeAndVehicles-PT-V10P10N10-CTLFireability-14
lola: result : false
lola: markings : 86
lola: fired transitions : 177
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 41 (type EXCL) for 40 BridgeAndVehicles-PT-V10P10N10-CTLFireability-12
lola: time limit : 276 sec
lola: memory limit: 32 pages
lola: FINISHED task # 41 (type EXCL) for BridgeAndVehicles-PT-V10P10N10-CTLFireability-12
lola: result : false
lola: markings : 259556
lola: fired transitions : 2400513
lola: time used : 3.000000
lola: memory pages used : 2
lola: LAUNCH task # 35 (type EXCL) for 34 BridgeAndVehicles-PT-V10P10N10-CTLFireability-10
lola: time limit : 299 sec
lola: memory limit: 32 pages
lola: FINISHED task # 35 (type EXCL) for BridgeAndVehicles-PT-V10P10N10-CTLFireability-10
lola: result : false
lola: markings : 8199
lola: fired transitions : 31724
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 29 (type EXCL) for 28 BridgeAndVehicles-PT-V10P10N10-CTLFireability-08
lola: time limit : 326 sec
lola: memory limit: 32 pages
lola: FINISHED task # 29 (type EXCL) for BridgeAndVehicles-PT-V10P10N10-CTLFireability-08
lola: result : true
lola: markings : 9703
lola: fired transitions : 28916
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 20 (type EXCL) for 19 BridgeAndVehicles-PT-V10P10N10-CTLFireability-05
lola: time limit : 359 sec
lola: memory limit: 32 pages
lola: FINISHED task # 20 (type EXCL) for BridgeAndVehicles-PT-V10P10N10-CTLFireability-05
lola: result : false
lola: markings : 52
lola: fired transitions : 145
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 7 (type EXCL) for 6 BridgeAndVehicles-PT-V10P10N10-CTLFireability-02
lola: time limit : 399 sec
lola: memory limit: 32 pages
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
BridgeAndVehicles-PT-V10P10N10-CTLFireability-05: CTL false CTL model checker
BridgeAndVehicles-PT-V10P10N10-CTLFireability-08: CTL true CTL model checker
BridgeAndVehicles-PT-V10P10N10-CTLFireability-09: AG false findpath
BridgeAndVehicles-PT-V10P10N10-CTLFireability-10: CTL false CTL model checker
BridgeAndVehicles-PT-V10P10N10-CTLFireability-12: CTL false CTL model checker
BridgeAndVehicles-PT-V10P10N10-CTLFireability-13: CTL false CTL model checker
BridgeAndVehicles-PT-V10P10N10-CTLFireability-14: CTL false CTL model checker
BridgeAndVehicles-PT-V10P10N10-CTLFireability-15: CTL false CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
BridgeAndVehicles-PT-V10P10N10-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-PT-V10P10N10-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-PT-V10P10N10-CTLFireability-02: CTL 0 0 1 0 1 0 0 0
BridgeAndVehicles-PT-V10P10N10-CTLFireability-03: EG 0 1 0 0 1 0 0 0
BridgeAndVehicles-PT-V10P10N10-CTLFireability-04: DISJ 0 2 0 0 2 0 0 0
BridgeAndVehicles-PT-V10P10N10-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-PT-V10P10N10-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
BridgeAndVehicles-PT-V10P10N10-CTLFireability-11: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
7 CTL EXCL 1/399 1/32 BridgeAndVehicles-PT-V10P10N10-CTLFireability-02 49260 m, 9852 m/sec, 128457 t fired, .

Time elapsed: 9 secs. Pages in use: 2
# running tasks: 1 of 4 Visible: 16
lola: FINISHED task # 7 (type EXCL) for BridgeAndVehicles-PT-V10P10N10-CTLFireability-02
lola: result : true
lola: markings : 220558
lola: fired transitions : 632736
lola: time used : 2.000000
lola: memory pages used : 1
lola: LAUNCH task # 1 (type EXCL) for 0 BridgeAndVehicles-PT-V10P10N10-CTLFireability-00
lola: time limit : 448 sec
lola: memory limit: 32 pages
lola: FINISHED task # 1 (type EXCL) for BridgeAndVehicles-PT-V10P10N10-CTLFireability-00
lola: result : true
lola: markings : 116
lola: fired transitions : 117
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 17 (type EXCL) for 12 BridgeAndVehicles-PT-V10P10N10-CTLFireability-04
lola: time limit : 512 sec
lola: memory limit: 32 pages
lola: FINISHED task # 17 (type EXCL) for BridgeAndVehicles-PT-V10P10N10-CTLFireability-04
lola: result : false
lola: markings : 1
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 15 (type EXCL) for 12 BridgeAndVehicles-PT-V10P10N10-CTLFireability-04
lola: time limit : 598 sec
lola: memory limit: 32 pages
lola: FINISHED task # 15 (type EXCL) for BridgeAndVehicles-PT-V10P10N10-CTLFireability-04
lola: result : false
lola: markings : 121
lola: fired transitions : 220
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 10 (type EXCL) for 9 BridgeAndVehicles-PT-V10P10N10-CTLFireability-03
lola: time limit : 718 sec
lola: memory limit: 32 pages
lola: FINISHED task # 10 (type EXCL) for BridgeAndVehicles-PT-V10P10N10-CTLFireability-03
lola: result : false
lola: markings : 121
lola: fired transitions : 220
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 26 (type EXCL) for 25 BridgeAndVehicles-PT-V10P10N10-CTLFireability-07
lola: time limit : 897 sec
lola: memory limit: 32 pages
lola: FINISHED task # 26 (type EXCL) for BridgeAndVehicles-PT-V10P10N10-CTLFireability-07
lola: result : true
lola: markings : 259556
lola: fired transitions : 1329610
lola: time used : 3.000000
lola: memory pages used : 2
lola: LAUNCH task # 4 (type EXCL) for 3 BridgeAndVehicles-PT-V10P10N10-CTLFireability-01
lola: time limit : 1195 sec
lola: memory limit: 32 pages
lola: FINISHED task # 4 (type EXCL) for BridgeAndVehicles-PT-V10P10N10-CTLFireability-01
lola: result : true
lola: markings : 86
lola: fired transitions : 343
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 38 (type EXCL) for 37 BridgeAndVehicles-PT-V10P10N10-CTLFireability-11
lola: time limit : 1793 sec
lola: memory limit: 32 pages
lola: FINISHED task # 38 (type EXCL) for BridgeAndVehicles-PT-V10P10N10-CTLFireability-11
lola: result : false
lola: markings : 331
lola: fired transitions : 658
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 23 (type EXCL) for 22 BridgeAndVehicles-PT-V10P10N10-CTLFireability-06
lola: time limit : 3587 sec
lola: memory limit: 32 pages
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
BridgeAndVehicles-PT-V10P10N10-CTLFireability-00: CTL true CTL model checker
BridgeAndVehicles-PT-V10P10N10-CTLFireability-01: CTL true CTL model checker
BridgeAndVehicles-PT-V10P10N10-CTLFireability-02: CTL true CTL model checker
BridgeAndVehicles-PT-V10P10N10-CTLFireability-03: EG false state space / EG
BridgeAndVehicles-PT-V10P10N10-CTLFireability-04: DISJ false DISJ
BridgeAndVehicles-PT-V10P10N10-CTLFireability-05: CTL false CTL model checker
BridgeAndVehicles-PT-V10P10N10-CTLFireability-07: CTL true CTL model checker
BridgeAndVehicles-PT-V10P10N10-CTLFireability-08: CTL true CTL model checker
BridgeAndVehicles-PT-V10P10N10-CTLFireability-09: AG false findpath
BridgeAndVehicles-PT-V10P10N10-CTLFireability-10: CTL false CTL model checker
BridgeAndVehicles-PT-V10P10N10-CTLFireability-11: CTL false CTL model checker
BridgeAndVehicles-PT-V10P10N10-CTLFireability-12: CTL false CTL model checker
BridgeAndVehicles-PT-V10P10N10-CTLFireability-13: CTL false CTL model checker
BridgeAndVehicles-PT-V10P10N10-CTLFireability-14: CTL false CTL model checker
BridgeAndVehicles-PT-V10P10N10-CTLFireability-15: CTL false CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
BridgeAndVehicles-PT-V10P10N10-CTLFireability-06: CTL 0 0 1 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
23 CTL EXCL 1/3587 2/32 BridgeAndVehicles-PT-V10P10N10-CTLFireability-06 259556 m, 51911 m/sec, 828696 t fired, .

Time elapsed: 14 secs. Pages in use: 2
# running tasks: 1 of 4 Visible: 16
lola: FINISHED task # 23 (type EXCL) for BridgeAndVehicles-PT-V10P10N10-CTLFireability-06
lola: result : true
lola: markings : 259556
lola: fired transitions : 859687
lola: time used : 1.000000
lola: memory pages used : 2
lola: Portfolio finished: no open formulas

FINAL RESULTS
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
BridgeAndVehicles-PT-V10P10N10-CTLFireability-00: CTL true CTL model checker
BridgeAndVehicles-PT-V10P10N10-CTLFireability-01: CTL true CTL model checker
BridgeAndVehicles-PT-V10P10N10-CTLFireability-02: CTL true CTL model checker
BridgeAndVehicles-PT-V10P10N10-CTLFireability-03: EG false state space / EG
BridgeAndVehicles-PT-V10P10N10-CTLFireability-04: DISJ false DISJ
BridgeAndVehicles-PT-V10P10N10-CTLFireability-05: CTL false CTL model checker
BridgeAndVehicles-PT-V10P10N10-CTLFireability-06: CTL true CTL model checker
BridgeAndVehicles-PT-V10P10N10-CTLFireability-07: CTL true CTL model checker
BridgeAndVehicles-PT-V10P10N10-CTLFireability-08: CTL true CTL model checker
BridgeAndVehicles-PT-V10P10N10-CTLFireability-09: AG false findpath
BridgeAndVehicles-PT-V10P10N10-CTLFireability-10: CTL false CTL model checker
BridgeAndVehicles-PT-V10P10N10-CTLFireability-11: CTL false CTL model checker
BridgeAndVehicles-PT-V10P10N10-CTLFireability-12: CTL false CTL model checker
BridgeAndVehicles-PT-V10P10N10-CTLFireability-13: CTL false CTL model checker
BridgeAndVehicles-PT-V10P10N10-CTLFireability-14: CTL false CTL model checker
BridgeAndVehicles-PT-V10P10N10-CTLFireability-15: CTL false CTL model checker


Time elapsed: 14 secs. Pages in use: 2

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="BridgeAndVehicles-PT-V10P10N10"
export BK_EXAMINATION="CTLFireability"
export BK_TOOL="lola"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-4028"
echo " Executing tool lola"
echo " Input is BridgeAndVehicles-PT-V10P10N10, examination is CTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r023-tajo-162038139300170"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/BridgeAndVehicles-PT-V10P10N10.tgz
mv BridgeAndVehicles-PT-V10P10N10 execution
cd execution
if [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "UpperBounds" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] || [ "CTLFireability" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property CTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "CTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' CTLFireability.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] ; then
echo "FORMULA_NAME CTLFireability"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;