About the Execution of LoLA for BridgeAndVehicles-COL-V50P20N10
Execution Summary | |||||
Max Memory Used (MB) |
Time wait (ms) | CPU Usage (ms) | I/O Wait (ms) | Computed Result | Execution Status |
16230.336 | 88003.00 | 339754.00 | 250.10 | ?T?TTFTT?FFFFTF? | normal |
Execution Chart
We display below the execution chart for this examination (boot time has been removed).
Trace from the execution
Formatting '/mnt/tpsp/fkordon/mcc2021-input.r023-tajo-162038139100070.qcow2', fmt=qcow2 size=4294967296 backing_file='/mnt/tpsp/fkordon/mcc2021-input.qcow2' encryption=off cluster_size=65536 lazy_refcounts=off
Waiting for the VM to be ready (probing ssh)
................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................
=====================================================================
Generated by BenchKit 2-4028
Executing tool lola
Input is BridgeAndVehicles-COL-V50P20N10, examination is ReachabilityCardinality
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r023-tajo-162038139100070
=====================================================================
--------------------
preparation of the directory to be used:
/home/mcc/execution
total 460K
-rw-r--r-- 1 mcc users 22K May 5 16:58 CTLCardinality.txt
-rw-r--r-- 1 mcc users 162K May 10 09:42 CTLCardinality.xml
-rw-r--r-- 1 mcc users 13K May 5 16:58 CTLFireability.txt
-rw-r--r-- 1 mcc users 70K May 10 09:42 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K May 6 14:48 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.4K May 6 14:48 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 3.9K Mar 28 15:46 LTLCardinality.txt
-rw-r--r-- 1 mcc users 24K Mar 28 15:46 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.6K Mar 28 15:46 LTLFireability.txt
-rw-r--r-- 1 mcc users 17K Mar 28 15:46 LTLFireability.xml
-rw-r--r-- 1 mcc users 4.1K Mar 23 02:50 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 19K Mar 23 02:50 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 3.7K Mar 22 11:12 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 19K Mar 22 11:12 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.9K Mar 22 09:10 UpperBounds.txt
-rw-r--r-- 1 mcc users 4.0K Mar 22 09:10 UpperBounds.xml
-rw-r--r-- 1 mcc users 5 May 5 16:51 equiv_pt
-rw-r--r-- 1 mcc users 10 May 5 16:51 instance
-rw-r--r-- 1 mcc users 5 May 5 16:51 iscolored
-rw-r--r-- 1 mcc users 42K May 5 16:51 model.pnml
--------------------
content from stdout:
=== Data for post analysis generated by BenchKit (invocation template)
The expected result is a vector of booleans
BOOL_VECTOR
here is the order used to build the result vector(from text file)
FORMULA_NAME BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-00
FORMULA_NAME BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-01
FORMULA_NAME BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-02
FORMULA_NAME BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-03
FORMULA_NAME BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-04
FORMULA_NAME BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-05
FORMULA_NAME BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-06
FORMULA_NAME BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-07
FORMULA_NAME BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-08
FORMULA_NAME BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-09
FORMULA_NAME BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-10
FORMULA_NAME BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-11
FORMULA_NAME BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-12
FORMULA_NAME BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-13
FORMULA_NAME BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-14
FORMULA_NAME BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-15
=== Now, execution of the tool begins
BK_START 1620853113342
starting LoLA
BK_INPUT BridgeAndVehicles-COL-V50P20N10
BK_EXAMINATION: ReachabilityCardinality
bin directory: /home/mcc/BenchKit/bin
current directory: /home/mcc/execution
ReachabilityCardinality
FORMULA BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-06 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-12 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-03 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-04 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-13 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-14 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-11 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-07 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-10 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-01 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-05 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-09 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
BK_STOP 1620853201345
--------------------
content from stderr:
lola: MEM LIMIT 32
lola: MEM LIMIT 5
lola: NET
lola: input: PNML file (--pnmlnet)
lola: reading net from /home/mcc/execution/model.pnml
lola: reading pnml
lola: PNML file contains High-Level net
lola: finished parsing
lola: closed net file /home/mcc/execution/model.pnml
lola: Reading HL formula in XML format (--xmlformula)
lola: reading formula from /home/mcc/execution/ReachabilityCardinality.xml
lola: rewrite Frontend/Parser/formula_rewrite.k:98
lola: rewrite Frontend/Parser/formula_rewrite.k:159
lola: rewrite Frontend/Parser/formula_rewrite.k:150
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: LAUNCH INITIAL
lola: LAUNCH task # 20 (type SKEL/CNST) for 18 BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-06
lola: time limit : 0 sec
lola: memory limit: 0 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: LAUNCH task # 54 (type SKEL/FNDP) for 36 BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-12
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 56 (type SKEL/EQUN) for 36 BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-12
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 58 (type SKEL/SRCH) for 36 BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-12
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 20 (type SKEL/CNST) for BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-06
lola: result : true
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: TR BINDINGS
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: LAUNCH task # 72 (type SKEL/FNDP) for 6 BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-02
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: FINISHED task # 72 (type SKEL/FNDP) for BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-02
lola: result : true
lola: fired transitions : 63
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: LAUNCH task # 153 (type SKEL/SRCH) for 30 BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-10
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: FINISHED task # 153 (type SKEL/SRCH) for BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-10
lola: result : unknown
lola: time used : 0.000000
lola: memory pages used : 1
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-56.sara.
lola: LAUNCH task # 152 (type SKEL/FNDP) for 3 BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-01
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: TR BINDINGS DONE
lola: Places: 128, Transitions: 1328
lola: FINISHED task # 56 (type SKEL/EQUN) for BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-12
lola: result : false
lola: CANCELED task # 54 (type FNDP) for BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-12 (obsolete)
lola: CANCELED task # 58 (type SRCH) for BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-12 (obsolete)
lola: LAUNCH task # 125 (type SKEL/FNDP) for 27 BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-09
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 129 (type SKEL/EQUN) for 27 BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-09
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 131 (type SKEL/SRCH) for 27 BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-09
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 54 (type SKEL/FNDP) for BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-12
lola: result : unknown
lola: fired transitions : 220783
lola: tried executions : 199
lola: time used : 0.000000
lola: memory pages used : 0
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: FINISHED task # 131 (type SKEL/SRCH) for BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-09
lola: result : true
lola: markings : 20
lola: fired transitions : 19
lola: time used : 0.000000
lola: memory pages used : 1
lola: CANCELED task # 125 (type FNDP) for BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-09 (obsolete)
lola: CANCELED task # 129 (type EQUN) for BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-09 (obsolete)
lola: LAUNCH task # 135 (type SKEL/FNDP) for 15 BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-05
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 145 (type SKEL/EQUN) for 15 BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-05
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 147 (type SKEL/SRCH) for 15 BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-05
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 125 (type SKEL/FNDP) for BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-09
lola: result : true
lola: fired transitions : 18
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
lola: @ trans enregistrement_A
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: FINISHED task # 129 (type SKEL/EQUN) for BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-09
lola: result : unknown
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: FINISHED task # 147 (type SKEL/SRCH) for BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-05
lola: result : true
lola: markings : 54
lola: fired transitions : 55
lola: time used : 0.000000
lola: memory pages used : 1
lola: CANCELED task # 135 (type FNDP) for BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-05 (obsolete)
lola: CANCELED task # 145 (type EQUN) for BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-05 (obsolete)
lola: LAUNCH task # 100 (type SKEL/FNDP) for 9 BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-03
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 101 (type SKEL/EQUN) for 9 BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-03
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 103 (type SKEL/SRCH) for 9 BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-03
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 135 (type SKEL/FNDP) for BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-05
lola: result : true
lola: fired transitions : 52
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: @ trans decision
lola: @ trans altern_cpt
lola: FINISHED task # 145 (type SKEL/EQUN) for BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-05
lola: result : unknown
lola: @ trans autorisation_A
lola: @ trans liberation_A
lola: @ trans enregistrement_B
lola: @ trans timeout_A
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-101.sara.
lola: @ trans timeout_B
lola: @ trans liberation_B
lola: @ trans basculement
lola: @ trans autorisation_B
lola: FINISHED task # 101 (type SKEL/EQUN) for BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-03
lola: result : false
lola: CANCELED task # 100 (type FNDP) for BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-03 (obsolete)
lola: CANCELED task # 103 (type SRCH) for BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-03 (obsolete)
lola: LAUNCH task # 50 (type SKEL/FNDP) for 12 BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-04
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 51 (type SKEL/EQUN) for 12 BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-04
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 95 (type SKEL/SRCH) for 12 BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-04
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 100 (type SKEL/FNDP) for BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-03
lola: result : unknown
lola: fired transitions : 85522
lola: tried executions : 1268
lola: time used : 0.000000
lola: memory pages used : 0
lola: FINISHED task # 95 (type SKEL/SRCH) for BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-04
lola: result : false
lola: markings : 2
lola: fired transitions : 2
lola: time used : 0.000000
lola: memory pages used : 1
lola: CANCELED task # 50 (type FNDP) for BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-04 (obsolete)
lola: CANCELED task # 51 (type EQUN) for BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-04 (obsolete)
lola: LAUNCH task # 62 (type SKEL/FNDP) for 24 BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-08
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 66 (type SKEL/EQUN) for 24 BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-08
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 68 (type SKEL/SRCH) for 24 BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-08
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 68 (type SKEL/SRCH) for BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-08
lola: result : true
lola: markings : 83
lola: fired transitions : 82
lola: time used : 0.000000
lola: memory pages used : 1
lola: CANCELED task # 62 (type FNDP) for BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-08 (obsolete)
lola: CANCELED task # 66 (type EQUN) for BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-08 (obsolete)
lola: LAUNCH task # 124 (type SKEL/FNDP) for 39 BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-13
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 126 (type SKEL/EQUN) for 39 BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-13
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 133 (type SKEL/SRCH) for 39 BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-13
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:98
lola: rewrite Frontend/Parser/formula_rewrite.k:159
lola: rewrite Frontend/Parser/formula_rewrite.k:150
lola: FINISHED task # 133 (type SKEL/SRCH) for BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-13
lola: result : false
lola: markings : 1
lola: time used : 0.000000
lola: memory pages used : 1
lola: CANCELED task # 124 (type FNDP) for BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-13 (obsolete)
lola: CANCELED task # 126 (type EQUN) for BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-13 (obsolete)
lola: LAUNCH task # 128 (type SKEL/FNDP) for 42 BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-14
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 137 (type SKEL/EQUN) for 42 BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-14
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 139 (type SKEL/SRCH) for 42 BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-14
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 124 (type SKEL/FNDP) for BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-13
lola: result : unknown
lola: fired transitions : 1400
lola: tried executions : 1401
lola: time used : 0.000000
lola: memory pages used : 0
lola: FINISHED task # 62 (type SKEL/FNDP) for BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-08
lola: result : true
lola: fired transitions : 81
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
lola: FINISHED task # 139 (type SKEL/SRCH) for BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-14
lola: result : false
lola: markings : 2
lola: fired transitions : 1
lola: time used : 0.000000
lola: memory pages used : 1
lola: CANCELED task # 128 (type FNDP) for BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-14 (obsolete)
lola: CANCELED task # 137 (type EQUN) for BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-14 (obsolete)
lola: LAUNCH task # 114 (type SKEL/FNDP) for 33 BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-11
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 115 (type SKEL/EQUN) for 33 BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-11
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 117 (type SKEL/SRCH) for 33 BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-11
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 128 (type SKEL/FNDP) for BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-14
lola: result : unknown
lola: fired transitions : 2861
lola: tried executions : 1432
lola: time used : 0.000000
lola: memory pages used : 0
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:711
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-66.sara.
sara: place or transition ordering is non-deterministic
lola: FINISHED task # 117 (type SKEL/SRCH) for BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-11
lola: result : false
lola: markings : 1
lola: time used : 0.000000
lola: memory pages used : 1
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-51.sara.
sara: place or transition ordering is non-deterministic
lola: CANCELED task # 114 (type FNDP) for BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-11 (obsolete)
lola: rewrite Frontend/Parser/formula_rewrite.k:711
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-137.sara.
lola: CANCELED task # 115 (type EQUN) for BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-11 (obsolete)
lola: LAUNCH task # 141 (type SKEL/FNDP) for 21 BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-07
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 150 (type SKEL/EQUN) for 21 BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-07
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 159 (type SKEL/SRCH) for 21 BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-07
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-126.sara.
lola: FINISHED task # 66 (type SKEL/EQUN) for BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-08
lola: result : true
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-115.sara.
sara: place or transition ordering is non-deterministic
lola: FINISHED task # 159 (type SKEL/SRCH) for BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-07
lola: result : false
lola: markings : 1
lola: time used : 1.000000
lola: memory pages used : 1
lola: FINISHED task # 137 (type SKEL/EQUN) for BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-14
lola: result : false
lola: CANCELED task # 141 (type FNDP) for BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-07 (obsolete)
lola: CANCELED task # 150 (type EQUN) for BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-07 (obsolete)
lola: LAUNCH task # 79 (type SKEL/FNDP) for 0 BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-00
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 108 (type SKEL/EQUN) for 0 BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-00
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 110 (type SKEL/SRCH) for 0 BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-00
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 51 (type SKEL/EQUN) for BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-04
lola: result : false
lola: FINISHED task # 141 (type SKEL/FNDP) for BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-07
lola: result : unknown
lola: fired transitions : 3362
lola: tried executions : 3363
lola: time used : 1.000000
lola: memory pages used : 0
lola: FINISHED task # 126 (type SKEL/EQUN) for BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-13
lola: result : false
lola: FINISHED task # 115 (type SKEL/EQUN) for BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-11
lola: result : false
lola: FINISHED task # 110 (type SKEL/SRCH) for BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-00
lola: result : true
lola: markings : 32
lola: fired transitions : 31
lola: time used : 0.000000
lola: memory pages used : 1
lola: CANCELED task # 79 (type FNDP) for BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-00 (obsolete)
lola: CANCELED task # 108 (type EQUN) for BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-00 (obsolete)
lola: LAUNCH task # 89 (type SKEL/FNDP) for 45 BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-15
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 90 (type SKEL/EQUN) for 45 BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-15
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 92 (type SKEL/SRCH) for 45 BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-15
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 79 (type SKEL/FNDP) for BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-00
lola: result : true
lola: fired transitions : 30
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
lola: FINISHED task # 92 (type SKEL/SRCH) for BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-15
lola: result : true
lola: markings : 19
lola: fired transitions : 18
lola: time used : 0.000000
lola: memory pages used : 1
lola: CANCELED task # 89 (type FNDP) for BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-15 (obsolete)
lola: CANCELED task # 90 (type EQUN) for BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-15 (obsolete)
lola: LAUNCH task # 81 (type SKEL/FNDP) for 30 BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-10
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 120 (type SKEL/EQUN) for 30 BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-10
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 122 (type SKEL/SRCH) for 30 BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-10
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 122 (type SKEL/SRCH) for BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-10
lola: result : false
lola: markings : 1
lola: time used : 0.000000
lola: memory pages used : 1
lola: CANCELED task # 81 (type FNDP) for BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-10 (obsolete)
lola: CANCELED task # 120 (type EQUN) for BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-10 (obsolete)
lola: LAUNCH task # 154 (type SKEL/EQUN) for 3 BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-01
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 156 (type SKEL/SRCH) for 3 BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-01
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 157 (type SKEL/SRCH) for 3 BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-01
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 89 (type SKEL/FNDP) for BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-15
lola: result : true
lola: fired transitions : 17
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
lola: FINISHED task # 157 (type SKEL/SRCH) for BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-01
lola: result : false
lola: markings : 202
lola: fired transitions : 305
lola: time used : 0.000000
lola: memory pages used : 1
lola: CANCELED task # 152 (type FNDP) for BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-01 (obsolete)
lola: CANCELED task # 154 (type EQUN) for BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-01 (obsolete)
lola: CANCELED task # 156 (type SRCH) for BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-01 (obsolete)
lola: FINISHED task # 152 (type SKEL/FNDP) for BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-01
lola: result : unknown
lola: fired transitions : 259704
lola: tried executions : 8121
lola: time used : 1.000000
lola: memory pages used : 0
lola: rewrite Frontend/Parser/formula_rewrite.k:98
lola: rewrite Frontend/Parser/formula_rewrite.k:159
lola: rewrite Frontend/Parser/formula_rewrite.k:150
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-90.sara.
sara: place or transition ordering is non-deterministic
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-108.sara.
sara: place or transition ordering is non-deterministic
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-150.sara.
lola: FINISHED task # 90 (type SKEL/EQUN) for BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-15
lola: result : true
lola: FINISHED task # 108 (type SKEL/EQUN) for BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-00
lola: result : true
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-120.sara.
sara: error: :5: error: syntax error, unexpected $end, expecting KEY_TRANSITION
sara: error while reading Petri net from file -- aborting [#04]
sara: see manual for a documentation of this error
sara: last error message: No such file or directory
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-154.sara.
sara: place or transition ordering is non-deterministic
lola: FINISHED task # 150 (type SKEL/EQUN) for BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-07
lola: result : false
lola: FINISHED task # 120 (type SKEL/EQUN) for BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-10
lola: result : unknown
lola: FINISHED task # 154 (type SKEL/EQUN) for BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-01
lola: result : false
lola: rewrite Frontend/Parser/formula_rewrite.k:98
lola: rewrite Frontend/Parser/formula_rewrite.k:159
lola: rewrite Frontend/Parser/formula_rewrite.k:150
lola: rewrite Frontend/Parser/formula_rewrite.k:96
lola: rewrite Frontend/Parser/formula_rewrite.k:156
lola: rewrite Frontend/Parser/formula_rewrite.k:147
lola: rewrite Frontend/Parser/formula_rewrite.k:96
lola: rewrite Frontend/Parser/formula_rewrite.k:156
lola: rewrite Frontend/Parser/formula_rewrite.k:147
lola: rewrite Frontend/Parser/formula_rewrite.k:96
lola: rewrite Frontend/Parser/formula_rewrite.k:156
lola: rewrite Frontend/Parser/formula_rewrite.k:147
lola: rewrite Frontend/Parser/formula_rewrite.k:98
lola: rewrite Frontend/Parser/formula_rewrite.k:159
lola: rewrite Frontend/Parser/formula_rewrite.k:150
lola: rewrite Frontend/Parser/formula_rewrite.k:96
lola: rewrite Frontend/Parser/formula_rewrite.k:156
lola: rewrite Frontend/Parser/formula_rewrite.k:147
lola: Rule S: 0 transitions removed,0 places removed
lola: planning for BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-04 stopped (result already fixed).
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: LAUNCH task # 167 (type EXCL) for 6 BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-02
lola: time limit : 599 sec
lola: memory limit: 32 pages
lola: LAUNCH task # 163 (type FNDP) for 6 BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-02
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 164 (type EQUN) for 6 BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-02
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: LAUNCH task # 166 (type SRCH) for 6 BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-02
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-164.sara.
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
sara: place or transition ordering is non-deterministic
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-01: AG true skeleton: tandem / relaxed
BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-03: AG true skeleton: state equation
BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-04: AG true skeleton: tandem / insertion
BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-06: INITIAL true skeleton: preprocessing
BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-07: AG true skeleton: tandem / insertion
BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-10: EF false skeleton: tandem / insertion
BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-11: EF false skeleton: tandem / insertion
BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-12: EF false skeleton: state equation
BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-13: AG true skeleton: tandem / insertion
BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-14: EF false skeleton: tandem / insertion
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-00: AG 0 5 0 0 3 0 0 2
BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-02: EF 0 1 4 0 1 0 0 4
BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-05: AG 0 5 0 0 3 0 0 2
BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-08: AG 0 5 0 0 3 0 0 2
BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-09: AG 0 5 0 0 3 0 0 2
BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-15: AG 0 5 0 0 3 0 0 2
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
163 EF FNDP 4/449 0/5 BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-02 94809 t fired, 221 attempts, .
164 EF STEQ 4/449 0/5 BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-02 sara is running.
166 EF SRCH 4/449 1/5 BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-02 94198 m, 18839 m/sec, 233536 t fired, .
167 EF EXCL 4/599 1/32 BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-02 37704 m, 7540 m/sec, 51189 t fired, .
Time elapsed: 5 secs. Pages in use: 2
# running tasks: 4 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-01: AG true skeleton: tandem / relaxed
BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-03: AG true skeleton: state equation
BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-04: AG true skeleton: tandem / insertion
BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-06: INITIAL true skeleton: preprocessing
BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-07: AG true skeleton: tandem / insertion
BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-10: EF false skeleton: tandem / insertion
BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-11: EF false skeleton: tandem / insertion
BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-12: EF false skeleton: state equation
BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-13: AG true skeleton: tandem / insertion
BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-14: EF false skeleton: tandem / insertion
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-00: AG 0 5 0 0 3 0 0 2
BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-02: EF 0 1 4 0 1 0 0 4
BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-05: AG 0 5 0 0 3 0 0 2
BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-08: AG 0 5 0 0 3 0 0 2
BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-09: AG 0 5 0 0 3 0 0 2
BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-15: AG 0 5 0 0 3 0 0 2
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
163 EF FNDP 9/445 0/5 BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-02 212182 t fired, 491 attempts, .
164 EF STEQ 9/445 0/5 BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-02 sara is running.
166 EF SRCH 9/445 1/5 BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-02 229511 m, 27062 m/sec, 591503 t fired, .
167 EF EXCL 9/599 1/32 BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-02 72872 m, 7033 m/sec, 93368 t fired, .
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BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-01: AG true skeleton: tandem / relaxed
BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-03: AG true skeleton: state equation
BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-04: AG true skeleton: tandem / insertion
BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-06: INITIAL true skeleton: preprocessing
BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-07: AG true skeleton: tandem / insertion
BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-10: EF false skeleton: tandem / insertion
BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-11: EF false skeleton: tandem / insertion
BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-12: EF false skeleton: state equation
BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-13: AG true skeleton: tandem / insertion
BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-14: EF false skeleton: tandem / insertion
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-00: AG 0 5 0 0 3 0 0 2
BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-02: EF 0 1 4 0 1 0 0 4
BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-05: AG 0 5 0 0 3 0 0 2
BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-08: AG 0 5 0 0 3 0 0 2
BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-09: AG 0 5 0 0 3 0 0 2
BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-15: AG 0 5 0 0 3 0 0 2
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
163 EF FNDP 14/440 0/5 BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-02 329457 t fired, 761 attempts, .
164 EF STEQ 14/440 0/5 BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-02 sara is running.
166 EF SRCH 14/440 2/5 BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-02 380865 m, 30270 m/sec, 1000648 t fired, .
167 EF EXCL 14/599 1/32 BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-02 114836 m, 8392 m/sec, 143787 t fired, .
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BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-01: AG true skeleton: tandem / relaxed
BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-03: AG true skeleton: state equation
BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-04: AG true skeleton: tandem / insertion
BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-06: INITIAL true skeleton: preprocessing
BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-07: AG true skeleton: tandem / insertion
BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-10: EF false skeleton: tandem / insertion
BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-11: EF false skeleton: tandem / insertion
BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-12: EF false skeleton: state equation
BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-13: AG true skeleton: tandem / insertion
BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-14: EF false skeleton: tandem / insertion
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-00: AG 0 5 0 0 3 0 0 2
BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-02: EF 0 1 4 0 1 0 0 4
BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-05: AG 0 5 0 0 3 0 0 2
BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-08: AG 0 5 0 0 3 0 0 2
BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-09: AG 0 5 0 0 3 0 0 2
BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-15: AG 0 5 0 0 3 0 0 2
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
163 EF FNDP 19/435 0/5 BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-02 461652 t fired, 1064 attempts, .
164 EF STEQ 19/435 0/5 BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-02 sara is running.
166 EF SRCH 19/435 3/5 BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-02 577053 m, 39237 m/sec, 1531837 t fired, .
167 EF EXCL 19/599 1/32 BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-02 169230 m, 10878 m/sec, 209551 t fired, .
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BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-01: AG true skeleton: tandem / relaxed
BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-03: AG true skeleton: state equation
BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-04: AG true skeleton: tandem / insertion
BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-06: INITIAL true skeleton: preprocessing
BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-07: AG true skeleton: tandem / insertion
BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-10: EF false skeleton: tandem / insertion
BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-11: EF false skeleton: tandem / insertion
BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-12: EF false skeleton: state equation
BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-13: AG true skeleton: tandem / insertion
BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-14: EF false skeleton: tandem / insertion
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-00: AG 0 5 0 0 3 0 0 2
BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-02: EF 0 1 4 0 1 0 0 4
BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-05: AG 0 5 0 0 3 0 0 2
BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-08: AG 0 5 0 0 3 0 0 2
BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-09: AG 0 5 0 0 3 0 0 2
BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-15: AG 0 5 0 0 3 0 0 2
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
163 EF FNDP 24/430 0/5 BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-02 582401 t fired, 1341 attempts, .
164 EF STEQ 24/430 0/5 BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-02 sara is running.
166 EF SRCH 24/430 3/5 BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-02 737388 m, 32067 m/sec, 1965498 t fired, .
167 EF EXCL 24/599 1/32 BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-02 207091 m, 7572 m/sec, 262070 t fired, .
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BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-01: AG true skeleton: tandem / relaxed
BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-03: AG true skeleton: state equation
BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-04: AG true skeleton: tandem / insertion
BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-06: INITIAL true skeleton: preprocessing
BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-07: AG true skeleton: tandem / insertion
BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-10: EF false skeleton: tandem / insertion
BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-11: EF false skeleton: tandem / insertion
BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-12: EF false skeleton: state equation
BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-13: AG true skeleton: tandem / insertion
BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-14: EF false skeleton: tandem / insertion
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-00: AG 0 5 0 0 3 0 0 2
BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-02: EF 0 1 4 0 1 0 0 4
BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-05: AG 0 5 0 0 3 0 0 2
BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-08: AG 0 5 0 0 3 0 0 2
BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-09: AG 0 5 0 0 3 0 0 2
BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-15: AG 0 5 0 0 3 0 0 2
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
163 EF FNDP 29/425 0/5 BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-02 683584 t fired, 1572 attempts, .
164 EF STEQ 29/425 0/5 BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-02 sara is running.
166 EF SRCH 29/425 4/5 BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-02 882178 m, 28958 m/sec, 2361967 t fired, .
167 EF EXCL 29/599 2/32 BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-02 239026 m, 6387 m/sec, 303459 t fired, .
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BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-01: AG true skeleton: tandem / relaxed
BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-03: AG true skeleton: state equation
BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-04: AG true skeleton: tandem / insertion
BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-06: INITIAL true skeleton: preprocessing
BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-07: AG true skeleton: tandem / insertion
BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-10: EF false skeleton: tandem / insertion
BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-11: EF false skeleton: tandem / insertion
BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-12: EF false skeleton: state equation
BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-13: AG true skeleton: tandem / insertion
BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-14: EF false skeleton: tandem / insertion
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BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-00: AG 0 5 0 0 3 0 0 2
BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-02: EF 0 1 4 0 1 0 0 4
BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-05: AG 0 5 0 0 3 0 0 2
BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-08: AG 0 5 0 0 3 0 0 2
BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-09: AG 0 5 0 0 3 0 0 2
BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-15: AG 0 5 0 0 3 0 0 2
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
163 EF FNDP 34/420 0/5 BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-02 798724 t fired, 1835 attempts, .
164 EF STEQ 34/420 0/5 BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-02 sara is running.
166 EF SRCH 34/420 4/5 BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-02 1036330 m, 30830 m/sec, 2783296 t fired, .
167 EF EXCL 34/599 2/32 BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-02 276723 m, 7539 m/sec, 354825 t fired, .
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BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-01: AG true skeleton: tandem / relaxed
BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-03: AG true skeleton: state equation
BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-04: AG true skeleton: tandem / insertion
BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-06: INITIAL true skeleton: preprocessing
BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-07: AG true skeleton: tandem / insertion
BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-10: EF false skeleton: tandem / insertion
BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-11: EF false skeleton: tandem / insertion
BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-12: EF false skeleton: state equation
BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-13: AG true skeleton: tandem / insertion
BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-14: EF false skeleton: tandem / insertion
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-00: AG 0 5 0 0 3 0 0 2
BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-02: EF 0 1 4 0 1 0 0 4
BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-05: AG 0 5 0 0 3 0 0 2
BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-08: AG 0 5 0 0 3 0 0 2
BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-09: AG 0 5 0 0 3 0 0 2
BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-15: AG 0 5 0 0 3 0 0 2
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
163 EF FNDP 39/415 0/5 BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-02 907106 t fired, 2083 attempts, .
164 EF STEQ 39/415 0/5 BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-02 sara is running.
166 EF SRCH 39/415 5/5 BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-02 1174240 m, 27582 m/sec, 3158698 t fired, .
167 EF EXCL 39/599 2/32 BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-02 332542 m, 11163 m/sec, 430628 t fired, .
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BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-01: AG true skeleton: tandem / relaxed
BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-03: AG true skeleton: state equation
BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-04: AG true skeleton: tandem / insertion
BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-06: INITIAL true skeleton: preprocessing
BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-07: AG true skeleton: tandem / insertion
BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-10: EF false skeleton: tandem / insertion
BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-11: EF false skeleton: tandem / insertion
BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-12: EF false skeleton: state equation
BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-13: AG true skeleton: tandem / insertion
BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-14: EF false skeleton: tandem / insertion
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BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-00: AG 0 5 0 0 3 0 0 2
BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-02: EF 0 1 4 0 1 0 0 4
BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-05: AG 0 5 0 0 3 0 0 2
BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-08: AG 0 5 0 0 3 0 0 2
BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-09: AG 0 5 0 0 3 0 0 2
BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-15: AG 0 5 0 0 3 0 0 2
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
163 EF FNDP 44/410 0/5 BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-02 1029877 t fired, 2363 attempts, .
164 EF STEQ 44/410 0/5 BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-02 sara is running.
166 EF SRCH 44/410 5/5 BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-02 1282027 m, 21557 m/sec, 3449494 t fired, .
167 EF EXCL 44/599 2/32 BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-02 373180 m, 8127 m/sec, 485475 t fired, .
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BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-01: AG true skeleton: tandem / relaxed
BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-03: AG true skeleton: state equation
BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-04: AG true skeleton: tandem / insertion
BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-06: INITIAL true skeleton: preprocessing
BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-07: AG true skeleton: tandem / insertion
BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-10: EF false skeleton: tandem / insertion
BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-11: EF false skeleton: tandem / insertion
BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-12: EF false skeleton: state equation
BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-13: AG true skeleton: tandem / insertion
BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-14: EF false skeleton: tandem / insertion
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BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-00: AG 0 5 0 0 3 0 0 2
BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-02: EF 0 1 3 0 1 0 1 4
BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-05: AG 0 5 0 0 3 0 0 2
BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-08: AG 0 5 0 0 3 0 0 2
BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-09: AG 0 5 0 0 3 0 0 2
BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-15: AG 0 5 0 0 3 0 0 2
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
163 EF FNDP 49/405 0/5 BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-02 1114431 t fired, 2557 attempts, .
164 EF STEQ 49/405 0/5 BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-02 sara is running.
167 EF EXCL 49/599 2/32 BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-02 415627 m, 8489 m/sec, 546709 t fired, .
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lola: FINISHED task # 184 (type FNDP) for BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-05
lola: result : true
lola: fired transitions : 50
lola: tried executions : 1
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lola: result : true
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BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-01: AG true skeleton: tandem / relaxed
BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-03: AG true skeleton: state equation
BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-04: AG true skeleton: tandem / insertion
BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-05: AG false findpath
BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-06: INITIAL true skeleton: preprocessing
BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-07: AG true skeleton: tandem / insertion
BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-09: AG false findpath
BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-10: EF false skeleton: tandem / insertion
BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-11: EF false skeleton: tandem / insertion
BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-12: EF false skeleton: state equation
BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-13: AG true skeleton: tandem / insertion
BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-14: EF false skeleton: tandem / insertion
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-00: AG 0 5 0 0 3 0 0 2
BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-02: EF 0 1 3 0 1 0 1 4
BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-08: AG 0 4 1 0 3 0 0 2
BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-15: AG 0 5 0 0 3 0 0 2
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
163 EF FNDP 54/669 0/5 BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-02 1189174 t fired, 2728 attempts, .
164 EF STEQ 54/669 0/5 BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-02 sara is running.
167 EF EXCL 54/899 2/32 BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-02 439375 m, 4749 m/sec, 578205 t fired, .
177 EF FNDP 5/709 0/5 BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-08 112239 t fired, 261 attempts, .
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BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-01: AG true skeleton: tandem / relaxed
BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-03: AG true skeleton: state equation
BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-04: AG true skeleton: tandem / insertion
BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-05: AG false findpath
BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-06: INITIAL true skeleton: preprocessing
BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-07: AG true skeleton: tandem / insertion
BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-09: AG false findpath
BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-10: EF false skeleton: tandem / insertion
BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-11: EF false skeleton: tandem / insertion
BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-12: EF false skeleton: state equation
BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-13: AG true skeleton: tandem / insertion
BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-14: EF false skeleton: tandem / insertion
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-00: AG 0 5 0 0 3 0 0 2
BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-02: EF 0 1 3 0 1 0 1 4
BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-08: AG 0 4 1 0 3 0 0 2
BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-15: AG 0 5 0 0 3 0 0 2
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
163 EF FNDP 59/665 0/5 BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-02 1283873 t fired, 2944 attempts, .
164 EF STEQ 59/665 0/5 BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-02 sara is running.
167 EF EXCL 59/899 3/32 BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-02 465518 m, 5228 m/sec, 613097 t fired, .
177 EF FNDP 10/705 0/5 BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-08 214998 t fired, 497 attempts, .
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BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-01: AG true skeleton: tandem / relaxed
BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-03: AG true skeleton: state equation
BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-04: AG true skeleton: tandem / insertion
BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-05: AG false findpath
BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-06: INITIAL true skeleton: preprocessing
BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-07: AG true skeleton: tandem / insertion
BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-09: AG false findpath
BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-10: EF false skeleton: tandem / insertion
BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-11: EF false skeleton: tandem / insertion
BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-12: EF false skeleton: state equation
BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-13: AG true skeleton: tandem / insertion
BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-14: EF false skeleton: tandem / insertion
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-00: AG 0 5 0 0 3 0 0 2
BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-02: EF 0 1 3 0 1 0 1 4
BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-08: AG 0 4 1 0 3 0 0 2
BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-15: AG 0 5 0 0 3 0 0 2
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
163 EF FNDP 64/660 0/5 BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-02 1373215 t fired, 3149 attempts, .
164 EF STEQ 64/660 0/5 BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-02 sara is running.
167 EF EXCL 64/899 3/32 BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-02 498941 m, 6684 m/sec, 657480 t fired, .
177 EF FNDP 15/700 0/5 BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-08 333687 t fired, 769 attempts, .
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BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-01: AG true skeleton: tandem / relaxed
BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-03: AG true skeleton: state equation
BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-04: AG true skeleton: tandem / insertion
BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-05: AG false findpath
BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-06: INITIAL true skeleton: preprocessing
BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-07: AG true skeleton: tandem / insertion
BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-09: AG false findpath
BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-10: EF false skeleton: tandem / insertion
BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-11: EF false skeleton: tandem / insertion
BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-12: EF false skeleton: state equation
BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-13: AG true skeleton: tandem / insertion
BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-14: EF false skeleton: tandem / insertion
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-00: AG 0 5 0 0 3 0 0 2
BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-02: EF 0 1 3 0 1 0 1 4
BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-08: AG 0 4 1 0 3 0 0 2
BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-15: AG 0 5 0 0 3 0 0 2
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
163 EF FNDP 69/655 0/5 BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-02 1476004 t fired, 3384 attempts, .
164 EF STEQ 69/655 0/5 BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-02 sara is running.
167 EF EXCL 69/899 3/32 BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-02 536211 m, 7454 m/sec, 709032 t fired, .
177 EF FNDP 20/695 0/5 BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-08 454667 t fired, 1046 attempts, .
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BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-01: AG true skeleton: tandem / relaxed
BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-03: AG true skeleton: state equation
BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-04: AG true skeleton: tandem / insertion
BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-05: AG false findpath
BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-06: INITIAL true skeleton: preprocessing
BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-07: AG true skeleton: tandem / insertion
BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-09: AG false findpath
BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-10: EF false skeleton: tandem / insertion
BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-11: EF false skeleton: tandem / insertion
BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-12: EF false skeleton: state equation
BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-13: AG true skeleton: tandem / insertion
BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-14: EF false skeleton: tandem / insertion
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-00: AG 0 5 0 0 3 0 0 2
BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-02: EF 0 1 3 0 1 0 1 4
BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-08: AG 0 4 1 0 3 0 0 2
BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-15: AG 0 5 0 0 3 0 0 2
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
163 EF FNDP 74/650 0/5 BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-02 1556157 t fired, 3567 attempts, .
164 EF STEQ 74/650 0/5 BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-02 sara is running.
167 EF EXCL 74/899 3/32 BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-02 583259 m, 9409 m/sec, 772783 t fired, .
177 EF FNDP 25/690 0/5 BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-08 529061 t fired, 1216 attempts, .
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BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-01: AG true skeleton: tandem / relaxed
BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-03: AG true skeleton: state equation
BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-04: AG true skeleton: tandem / insertion
BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-05: AG false findpath
BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-06: INITIAL true skeleton: preprocessing
BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-07: AG true skeleton: tandem / insertion
BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-09: AG false findpath
BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-10: EF false skeleton: tandem / insertion
BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-11: EF false skeleton: tandem / insertion
BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-12: EF false skeleton: state equation
BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-13: AG true skeleton: tandem / insertion
BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-14: EF false skeleton: tandem / insertion
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-00: AG 0 5 0 0 3 0 0 2
BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-02: EF 0 1 3 0 1 0 1 4
BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-08: AG 0 4 1 0 3 0 0 2
BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-15: AG 0 5 0 0 3 0 0 2
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
163 EF FNDP 79/645 0/5 BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-02 1657077 t fired, 3797 attempts, .
164 EF STEQ 79/645 0/5 BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-02 sara is running.
167 EF EXCL 79/899 3/32 BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-02 622581 m, 7864 m/sec, 826599 t fired, .
177 EF FNDP 30/685 0/5 BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-08 610109 t fired, 1400 attempts, .
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BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-01: AG true skeleton: tandem / relaxed
BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-03: AG true skeleton: state equation
BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-04: AG true skeleton: tandem / insertion
BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-05: AG false findpath
BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-06: INITIAL true skeleton: preprocessing
BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-07: AG true skeleton: tandem / insertion
BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-09: AG false findpath
BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-10: EF false skeleton: tandem / insertion
BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-11: EF false skeleton: tandem / insertion
BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-12: EF false skeleton: state equation
BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-13: AG true skeleton: tandem / insertion
BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-14: EF false skeleton: tandem / insertion
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-00: AG 0 5 0 0 3 0 0 2
BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-02: EF 0 1 3 0 1 0 1 4
BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-08: AG 0 4 1 0 3 0 0 2
BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-15: AG 0 5 0 0 3 0 0 2
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
163 EF FNDP 84/640 0/5 BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-02 1745412 t fired, 3999 attempts, .
164 EF STEQ 84/640 0/5 BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-02 sara is running.
167 EF EXCL 84/899 3/32 BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-02 646637 m, 4811 m/sec, 862440 t fired, .
177 EF FNDP 35/680 0/5 BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-08 711879 t fired, 1633 attempts, .
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lola: FINISHED task # 164 (type EQUN) for BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-02
lola: result : unknown
lola: Error: Could not create thread
lola: LAUNCH task # 191 (type FNDP) for 0 BridgeAndVehicles-COL-V50P20N10-ReachabilityCardinality-00
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
/home/mcc/BenchKit/BenchKit_head.sh: line 62: 410 Killed lola --conf=$BIN_DIR/configfiles/reachabilitycardinalityconf --formula=$DIR/ReachabilityCardinality.xml --verdictfile=$DIR/GenericPropertiesVerdict.xml $DIR/model.pnml
Sequence of Actions to be Executed by the VM
This is useful if one wants to reexecute the tool in the VM from the submitted image disk.
set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="BridgeAndVehicles-COL-V50P20N10"
export BK_EXAMINATION="ReachabilityCardinality"
export BK_TOOL="lola"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"
# this is specific to your benchmark or test
export BIN_DIR="$HOME/BenchKit/bin"
# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi
# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-4028"
echo " Executing tool lola"
echo " Input is BridgeAndVehicles-COL-V50P20N10, examination is ReachabilityCardinality"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r023-tajo-162038139100070"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"
tar xzf /home/mcc/BenchKit/INPUTS/BridgeAndVehicles-COL-V50P20N10.tgz
mv BridgeAndVehicles-COL-V50P20N10 execution
cd execution
if [ "ReachabilityCardinality" = "ReachabilityDeadlock" ] || [ "ReachabilityCardinality" = "UpperBounds" ] || [ "ReachabilityCardinality" = "QuasiLiveness" ] || [ "ReachabilityCardinality" = "StableMarking" ] || [ "ReachabilityCardinality" = "Liveness" ] || [ "ReachabilityCardinality" = "OneSafe" ] || [ "ReachabilityCardinality" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh
echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "ReachabilityCardinality" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "ReachabilityCardinality" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "ReachabilityCardinality.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property ReachabilityCardinality.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "ReachabilityCardinality.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '
echo "FORMULA_NAME $x"
done
elif [ "ReachabilityCardinality" = "ReachabilityDeadlock" ] || [ "ReachabilityCardinality" = "QuasiLiveness" ] || [ "ReachabilityCardinality" = "StableMarking" ] || [ "ReachabilityCardinality" = "Liveness" ] || [ "ReachabilityCardinality" = "OneSafe" ] ; then
echo "FORMULA_NAME ReachabilityCardinality"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;