About the Execution of LoLA for BridgeAndVehicles-COL-V20P10N50
Execution Summary | |||||
Max Memory Used (MB) |
Time wait (ms) | CPU Usage (ms) | I/O Wait (ms) | Computed Result | Execution Status |
1401.888 | 4537.00 | 10877.00 | 0.00 | FFTTFTTFFTFTFFFF | normal |
Execution Chart
We display below the execution chart for this examination (boot time has been removed).
Trace from the execution
Formatting '/mnt/tpsp/fkordon/mcc2021-input.r023-tajo-162038139100038.qcow2', fmt=qcow2 size=4294967296 backing_file='/mnt/tpsp/fkordon/mcc2021-input.qcow2' encryption=off cluster_size=65536 lazy_refcounts=off
Waiting for the VM to be ready (probing ssh)
...........................
=====================================================================
Generated by BenchKit 2-4028
Executing tool lola
Input is BridgeAndVehicles-COL-V20P10N50, examination is ReachabilityCardinality
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r023-tajo-162038139100038
=====================================================================
--------------------
preparation of the directory to be used:
/home/mcc/execution
total 444K
-rw-r--r-- 1 mcc users 18K May 5 16:58 CTLCardinality.txt
-rw-r--r-- 1 mcc users 123K May 10 09:42 CTLCardinality.xml
-rw-r--r-- 1 mcc users 16K May 5 16:58 CTLFireability.txt
-rw-r--r-- 1 mcc users 100K May 10 09:42 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K May 6 14:48 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.4K May 6 14:48 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 3.7K Mar 28 15:46 LTLCardinality.txt
-rw-r--r-- 1 mcc users 24K Mar 28 15:46 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.6K Mar 28 15:46 LTLFireability.txt
-rw-r--r-- 1 mcc users 17K Mar 28 15:46 LTLFireability.xml
-rw-r--r-- 1 mcc users 4.1K Mar 23 02:49 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 18K Mar 23 02:48 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 3.4K Mar 22 11:05 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 17K Mar 22 11:05 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.9K Mar 22 09:10 UpperBounds.txt
-rw-r--r-- 1 mcc users 4.0K Mar 22 09:10 UpperBounds.xml
-rw-r--r-- 1 mcc users 5 May 5 16:51 equiv_pt
-rw-r--r-- 1 mcc users 10 May 5 16:51 instance
-rw-r--r-- 1 mcc users 5 May 5 16:51 iscolored
-rw-r--r-- 1 mcc users 41K May 5 16:51 model.pnml
--------------------
content from stdout:
=== Data for post analysis generated by BenchKit (invocation template)
The expected result is a vector of booleans
BOOL_VECTOR
here is the order used to build the result vector(from text file)
FORMULA_NAME BridgeAndVehicles-COL-V20P10N50-ReachabilityCardinality-00
FORMULA_NAME BridgeAndVehicles-COL-V20P10N50-ReachabilityCardinality-01
FORMULA_NAME BridgeAndVehicles-COL-V20P10N50-ReachabilityCardinality-02
FORMULA_NAME BridgeAndVehicles-COL-V20P10N50-ReachabilityCardinality-03
FORMULA_NAME BridgeAndVehicles-COL-V20P10N50-ReachabilityCardinality-04
FORMULA_NAME BridgeAndVehicles-COL-V20P10N50-ReachabilityCardinality-05
FORMULA_NAME BridgeAndVehicles-COL-V20P10N50-ReachabilityCardinality-06
FORMULA_NAME BridgeAndVehicles-COL-V20P10N50-ReachabilityCardinality-07
FORMULA_NAME BridgeAndVehicles-COL-V20P10N50-ReachabilityCardinality-08
FORMULA_NAME BridgeAndVehicles-COL-V20P10N50-ReachabilityCardinality-09
FORMULA_NAME BridgeAndVehicles-COL-V20P10N50-ReachabilityCardinality-10
FORMULA_NAME BridgeAndVehicles-COL-V20P10N50-ReachabilityCardinality-11
FORMULA_NAME BridgeAndVehicles-COL-V20P10N50-ReachabilityCardinality-12
FORMULA_NAME BridgeAndVehicles-COL-V20P10N50-ReachabilityCardinality-13
FORMULA_NAME BridgeAndVehicles-COL-V20P10N50-ReachabilityCardinality-14
FORMULA_NAME BridgeAndVehicles-COL-V20P10N50-ReachabilityCardinality-15
=== Now, execution of the tool begins
BK_START 1620853027511
starting LoLA
BK_INPUT BridgeAndVehicles-COL-V20P10N50
BK_EXAMINATION: ReachabilityCardinality
bin directory: /home/mcc/BenchKit/bin
current directory: /home/mcc/execution
ReachabilityCardinality
FORMULA BridgeAndVehicles-COL-V20P10N50-ReachabilityCardinality-12 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA BridgeAndVehicles-COL-V20P10N50-ReachabilityCardinality-10 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA BridgeAndVehicles-COL-V20P10N50-ReachabilityCardinality-15 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA BridgeAndVehicles-COL-V20P10N50-ReachabilityCardinality-06 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA BridgeAndVehicles-COL-V20P10N50-ReachabilityCardinality-01 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA BridgeAndVehicles-COL-V20P10N50-ReachabilityCardinality-02 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA BridgeAndVehicles-COL-V20P10N50-ReachabilityCardinality-00 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA BridgeAndVehicles-COL-V20P10N50-ReachabilityCardinality-05 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA BridgeAndVehicles-COL-V20P10N50-ReachabilityCardinality-08 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA BridgeAndVehicles-COL-V20P10N50-ReachabilityCardinality-13 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA BridgeAndVehicles-COL-V20P10N50-ReachabilityCardinality-09 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA BridgeAndVehicles-COL-V20P10N50-ReachabilityCardinality-11 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA BridgeAndVehicles-COL-V20P10N50-ReachabilityCardinality-03 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA BridgeAndVehicles-COL-V20P10N50-ReachabilityCardinality-07 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA BridgeAndVehicles-COL-V20P10N50-ReachabilityCardinality-04 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA BridgeAndVehicles-COL-V20P10N50-ReachabilityCardinality-14 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
BK_STOP 1620853032048
--------------------
content from stderr:
lola: MEM LIMIT 32
lola: MEM LIMIT 5
lola: NET
lola: input: PNML file (--pnmlnet)
lola: reading net from /home/mcc/execution/model.pnml
lola: reading pnml
lola: PNML file contains High-Level net
lola: finished parsing
lola: closed net file /home/mcc/execution/model.pnml
lola: Reading HL formula in XML format (--xmlformula)
lola: reading formula from /home/mcc/execution/ReachabilityCardinality.xml
lola: rewrite Frontend/Parser/formula_rewrite.k:96
lola: rewrite Frontend/Parser/formula_rewrite.k:156
lola: rewrite Frontend/Parser/formula_rewrite.k:147
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: LAUNCH task # 52 (type SKEL/FNDP) for 21 BridgeAndVehicles-COL-V20P10N50-ReachabilityCardinality-07
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: TR BINDINGS
lola: LAUNCH task # 57 (type SKEL/EQUN) for 21 BridgeAndVehicles-COL-V20P10N50-ReachabilityCardinality-07
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 59 (type SKEL/SRCH) for 21 BridgeAndVehicles-COL-V20P10N50-ReachabilityCardinality-07
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: LAUNCH task # 60 (type SKEL/SRCH) for 21 BridgeAndVehicles-COL-V20P10N50-ReachabilityCardinality-07
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH INITIAL
lola: LAUNCH task # 38 (type SKEL/CNST) for 36 BridgeAndVehicles-COL-V20P10N50-ReachabilityCardinality-12
lola: time limit : 0 sec
lola: memory limit: 0 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: FINISHED task # 59 (type SKEL/SRCH) for BridgeAndVehicles-COL-V20P10N50-ReachabilityCardinality-07
lola: result : true
lola: markings : 21
lola: fired transitions : 20
lola: time used : 0.000000
lola: memory pages used : 1
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: FINISHED task # 38 (type SKEL/CNST) for BridgeAndVehicles-COL-V20P10N50-ReachabilityCardinality-12
lola: result : false
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: CANCELED task # 52 (type FNDP) for BridgeAndVehicles-COL-V20P10N50-ReachabilityCardinality-07 (obsolete)
lola: CANCELED task # 57 (type EQUN) for BridgeAndVehicles-COL-V20P10N50-ReachabilityCardinality-07 (obsolete)
lola: CANCELED task # 60 (type SRCH) for BridgeAndVehicles-COL-V20P10N50-ReachabilityCardinality-07 (obsolete)
lola: LAUNCH task # 108 (type SKEL/FNDP) for 30 BridgeAndVehicles-COL-V20P10N50-ReachabilityCardinality-10
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 109 (type SKEL/EQUN) for 30 BridgeAndVehicles-COL-V20P10N50-ReachabilityCardinality-10
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: LAUNCH task # 111 (type SKEL/SRCH) for 30 BridgeAndVehicles-COL-V20P10N50-ReachabilityCardinality-10
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 112 (type SKEL/SRCH) for 30 BridgeAndVehicles-COL-V20P10N50-ReachabilityCardinality-10
sara: lola: try reading problem file /home/mcc/execution/ReachabilityCardinality-57.sara.
time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: FINISHED task # 52 (type SKEL/FNDP) for BridgeAndVehicles-COL-V20P10N50-ReachabilityCardinality-07
lola: result : true
lola: fired transitions : 19
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: FINISHED task # 111 (type SKEL/SRCH) for BridgeAndVehicles-COL-V20P10N50-ReachabilityCardinality-10
lola: result : false
lola: markings : 1
lola: time used : 0.000000
lola: memory pages used : 1
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: TR BINDINGS DONE
lola: Places: 108, Transitions: 2228
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: CANCELED task # 108 (type FNDP) for BridgeAndVehicles-COL-V20P10N50-ReachabilityCardinality-10 (obsolete)
lola: CANCELED task # 109 (type EQUN) for BridgeAndVehicles-COL-V20P10N50-ReachabilityCardinality-10 (obsolete)
lola: CANCELED task # 112 (type SRCH) for BridgeAndVehicles-COL-V20P10N50-ReachabilityCardinality-10 (obsolete)
lola: LAUNCH task # 94 (type SKEL/FNDP) for 45 BridgeAndVehicles-COL-V20P10N50-ReachabilityCardinality-15
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 100 (type SKEL/EQUN) for 45 BridgeAndVehicles-COL-V20P10N50-ReachabilityCardinality-15
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 135 (type SKEL/SRCH) for 45 BridgeAndVehicles-COL-V20P10N50-ReachabilityCardinality-15
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 136 (type SKEL/SRCH) for 45 BridgeAndVehicles-COL-V20P10N50-ReachabilityCardinality-15
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:711
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-109.sara.
lola: rewrite Frontend/Parser/formula_rewrite.k:711
sara: error: :5: error: syntax error, unexpected $end, expecting KEY_TRANSITION
sara: error while reading Petri net from file -- aborting [#04]
sara: see manual for a documentation of this error
sara: last error message: No such file or directory
lola: FINISHED task # 57 (type SKEL/EQUN) for BridgeAndVehicles-COL-V20P10N50-ReachabilityCardinality-07
lola: result : true
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-100.sara.
sara: error: :5: error: syntax error, unexpected $end, expecting KEY_TRANSITION
sara: error while reading Petri net from file -- aborting [#04]
sara: see manual for a documentation of this error
sara: last error message: No such file or directory
lola: FINISHED task # 135 (type SKEL/SRCH) for BridgeAndVehicles-COL-V20P10N50-ReachabilityCardinality-15
lola: result : false
lola: markings : 1
lola: time used : 0.000000
lola: memory pages used : 1
lola: FINISHED task # 136 (type SKEL/SRCH) for BridgeAndVehicles-COL-V20P10N50-ReachabilityCardinality-15
lola: result : false
lola: markings : 1
lola: time used : 0.000000
lola: memory pages used : 1
lola: CANCELED task # 94 (type FNDP) for BridgeAndVehicles-COL-V20P10N50-ReachabilityCardinality-15 (obsolete)
lola: CANCELED task # 100 (type EQUN) for BridgeAndVehicles-COL-V20P10N50-ReachabilityCardinality-15 (obsolete)
lola: LAUNCH task # 90 (type SKEL/FNDP) for 42 BridgeAndVehicles-COL-V20P10N50-ReachabilityCardinality-14
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 93 (type SKEL/EQUN) for 42 BridgeAndVehicles-COL-V20P10N50-ReachabilityCardinality-14
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 139 (type SKEL/SRCH) for 42 BridgeAndVehicles-COL-V20P10N50-ReachabilityCardinality-14
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: LAUNCH task # 150 (type SKEL/SRCH) for 42 BridgeAndVehicles-COL-V20P10N50-ReachabilityCardinality-14
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: FINISHED task # 94 (type SKEL/FNDP) for BridgeAndVehicles-COL-V20P10N50-ReachabilityCardinality-15
lola: result : unknown
lola: fired transitions : 4210
lola: tried executions : 4211
lola: time used : 0.000000
lola: memory pages used : 0
lola: FINISHED task # 150 (type SKEL/SRCH) for BridgeAndVehicles-COL-V20P10N50-ReachabilityCardinality-14
lola: result : true
lola: markings : 21
lola: fired transitions : 20
lola: time used : 0.000000
lola: memory pages used : 1
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-93.sara.
lola:
FINISHED task # 139 (type SKEL/SRCH) for BridgeAndVehicles-COL-V20P10N50-ReachabilityCardinality-14
lola: result : true
lola: markings : 21
lola: fired transitions : 20
lola: time used : 0.000000
lola: memory pages used : 1
lola: FINISHED task # 90 (type SKEL/FNDP) for BridgeAndVehicles-COL-V20P10N50-ReachabilityCardinality-14
lola: result : true
lola: fired transitions : 19
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
lola: CANCELED task # 93 (type EQUN) for BridgeAndVehicles-COL-V20P10N50-ReachabilityCardinality-14 (obsolete)
lola: LAUNCH task # 63 (type SKEL/FNDP) for 15 BridgeAndVehicles-COL-V20P10N50-ReachabilityCardinality-05
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 64 (type SKEL/EQUN) for 15 BridgeAndVehicles-COL-V20P10N50-ReachabilityCardinality-05
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 66 (type SKEL/SRCH) for 15 BridgeAndVehicles-COL-V20P10N50-ReachabilityCardinality-05
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 67 (type SKEL/SRCH) for 15 BridgeAndVehicles-COL-V20P10N50-ReachabilityCardinality-05
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: FINISHED task # 109 (type SKEL/EQUN) for BridgeAndVehicles-COL-V20P10N50-ReachabilityCardinality-10
lola: result : unknown
lola: FINISHED task # 93 (type SKEL/EQUN) for BridgeAndVehicles-COL-V20P10N50-ReachabilityCardinality-14
lola: result : true
lola: FINISHED task # 100 (type SKEL/EQUN) for BridgeAndVehicles-COL-V20P10N50-ReachabilityCardinality-15
lola: result : unknown
lola: FINISHED task # 66 (type SKEL/SRCH) for BridgeAndVehicles-COL-V20P10N50-ReachabilityCardinality-05
lola: result : true
lola: markings : 28
lola: fired transitions : 27
lola: time used : 0.000000
lola: memory pages used : 1
lola: CANCELED task # 63 (type FNDP) for BridgeAndVehicles-COL-V20P10N50-ReachabilityCardinality-05 (obsolete)
lola: CANCELED task # 64 (type EQUN) for BridgeAndVehicles-COL-V20P10N50-ReachabilityCardinality-05 (obsolete)
lola: CANCELED task # 67 (type SRCH) for BridgeAndVehicles-COL-V20P10N50-ReachabilityCardinality-05 (obsolete)
lola: LAUNCH task # 121 (type SKEL/FNDP) for 18 BridgeAndVehicles-COL-V20P10N50-ReachabilityCardinality-06
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 122 (type SKEL/EQUN) for 18 BridgeAndVehicles-COL-V20P10N50-ReachabilityCardinality-06
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: LAUNCH task # 124 (type SKEL/SRCH) for 18 BridgeAndVehicles-COL-V20P10N50-ReachabilityCardinality-06
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: LAUNCH task # 125 (type SKEL/SRCH) for 18 BridgeAndVehicles-COL-V20P10N50-ReachabilityCardinality-06
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 64 (type SKEL/EQUN) for BridgeAndVehicles-COL-V20P10N50-ReachabilityCardinality-05
lola: result : unknown
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-122.sara.
sara: place or transition ordering is non-deterministic
lola: FINISHED task # 63 (type SKEL/FNDP) for BridgeAndVehicles-COL-V20P10N50-ReachabilityCardinality-05
lola: result : true
lola: fired transitions : 26
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
lola: @ trans enregistrement_A
lola: FINISHED task # 125 (type SKEL/SRCH) for BridgeAndVehicles-COL-V20P10N50-ReachabilityCardinality-06
lola: result : false
lola: markings : 1762
lola: fired transitions : 2603
lola: time used : 0.000000
lola: memory pages used : 1
lola: @ trans decision
lola: CANCELED task # 121 (type FNDP) for BridgeAndVehicles-COL-V20P10N50-ReachabilityCardinality-06 (obsolete)
lola: CANCELED task # 122 (type EQUN) for BridgeAndVehicles-COL-V20P10N50-ReachabilityCardinality-06 (obsolete)
lola: CANCELED task # 124 (type SRCH) for BridgeAndVehicles-COL-V20P10N50-ReachabilityCardinality-06 (obsolete)
lola: @ trans altern_cpt
lola: @ trans autorisation_A
lola: LAUNCH task # 147 (type SKEL/FNDP) for 24 BridgeAndVehicles-COL-V20P10N50-ReachabilityCardinality-08
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 148 (type SKEL/EQUN) for 24 BridgeAndVehicles-COL-V20P10N50-ReachabilityCardinality-08
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 151 (type SKEL/SRCH) for 24 BridgeAndVehicles-COL-V20P10N50-ReachabilityCardinality-08
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 152 (type SKEL/SRCH) for 24 BridgeAndVehicles-COL-V20P10N50-ReachabilityCardinality-08
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: FINISHED task # 121 (type SKEL/FNDP) for BridgeAndVehicles-COL-V20P10N50-ReachabilityCardinality-06
lola: result : unknown
lola: fired transitions : 20915
lola: tried executions : 190
lola: time used : 0.000000
lola: memory pages used : 0
lola: @ trans liberation_A
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-148.sara.
lola: FINISHED task # 122 (type SKEL/EQUN) for BridgeAndVehicles-COL-V20P10N50-ReachabilityCardinality-06
lola: result : false
lola: @ trans enregistrement_B
lola: @ trans timeout_A
lola: FINISHED task # 148 (type SKEL/EQUN) for BridgeAndVehicles-COL-V20P10N50-ReachabilityCardinality-08
lola: result : true
lola: FINISHED task # 147 (type SKEL/FNDP) for BridgeAndVehicles-COL-V20P10N50-ReachabilityCardinality-08
lola: result : true
lola: fired transitions : 27
lola: tried executions : 1
lola: time used : 1.000000
lola: memory pages used : 0
lola: CANCELED task # 151 (type SRCH) for BridgeAndVehicles-COL-V20P10N50-ReachabilityCardinality-08 (obsolete)
lola: CANCELED task # 152 (type SRCH) for BridgeAndVehicles-COL-V20P10N50-ReachabilityCardinality-08 (obsolete)
lola: LAUNCH task # 129 (type SKEL/FNDP) for 3 BridgeAndVehicles-COL-V20P10N50-ReachabilityCardinality-01
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 130 (type SKEL/EQUN) for 3 BridgeAndVehicles-COL-V20P10N50-ReachabilityCardinality-01
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: LAUNCH task # 132 (type SKEL/SRCH) for 3 BridgeAndVehicles-COL-V20P10N50-ReachabilityCardinality-01
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 133 (type SKEL/SRCH) for 3 BridgeAndVehicles-COL-V20P10N50-ReachabilityCardinality-01
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 132 (type SKEL/SRCH) for BridgeAndVehicles-COL-V20P10N50-ReachabilityCardinality-01
lola: result : false
lola: markings : 2
lola: fired transitions : 2
lola: time used : 0.000000
lola: memory pages used : 1
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-130.sara.
sara: place or transition ordering is non-deterministic
lola: CANCELED task # 129 (type FNDP) for BridgeAndVehicles-COL-V20P10N50-ReachabilityCardinality-01 (obsolete)
lola: CANCELED task # 130 (type EQUN) for BridgeAndVehicles-COL-V20P10N50-ReachabilityCardinality-01 (obsolete)
lola: CANCELED task # 133 (type SRCH) for BridgeAndVehicles-COL-V20P10N50-ReachabilityCardinality-01 (obsolete)
lola: @ trans timeout_B
lola: LAUNCH task # 53 (type SKEL/FNDP) for 12 BridgeAndVehicles-COL-V20P10N50-ReachabilityCardinality-04
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 56 (type SKEL/EQUN) for 12 BridgeAndVehicles-COL-V20P10N50-ReachabilityCardinality-04
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: LAUNCH task # 70 (type SKEL/SRCH) for 12 BridgeAndVehicles-COL-V20P10N50-ReachabilityCardinality-04
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: @ trans liberation_B
lola: @ trans basculement
lola: LAUNCH task # 71 (type SKEL/SRCH) for 12 BridgeAndVehicles-COL-V20P10N50-ReachabilityCardinality-04
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 133 (type SKEL/SRCH) for BridgeAndVehicles-COL-V20P10N50-ReachabilityCardinality-01
lola: result : false
lola: markings : 2
lola: fired transitions : 2
lola: time used : 0.000000
lola: memory pages used : 1
lola: @ trans autorisation_B
lola: FINISHED task # 71 (type SKEL/SRCH) for BridgeAndVehicles-COL-V20P10N50-ReachabilityCardinality-04
lola: result : true
lola: markings : 250
lola: fired transitions : 321
lola: time used : 0.000000
lola: memory pages used : 1
lola: CANCELED task # 53 (type FNDP) for BridgeAndVehicles-COL-V20P10N50-ReachabilityCardinality-04 (obsolete)
lola: CANCELED task # 56 (type EQUN) for BridgeAndVehicles-COL-V20P10N50-ReachabilityCardinality-04 (obsolete)
lola: CANCELED task # 70 (type SRCH) for BridgeAndVehicles-COL-V20P10N50-ReachabilityCardinality-04 (obsolete)
lola: LAUNCH task # 102 (type SKEL/FNDP) for 6 BridgeAndVehicles-COL-V20P10N50-ReachabilityCardinality-02
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 103 (type SKEL/EQUN) for 6 BridgeAndVehicles-COL-V20P10N50-ReachabilityCardinality-02
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 143 (type SKEL/SRCH) for 6 BridgeAndVehicles-COL-V20P10N50-ReachabilityCardinality-02
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 144 (type SKEL/SRCH) for 6 BridgeAndVehicles-COL-V20P10N50-ReachabilityCardinality-02
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-56.sara.
sara: place or transition ordering is non-deterministic
lola: FINISHED task # 130 (type SKEL/EQUN) for BridgeAndVehicles-COL-V20P10N50-ReachabilityCardinality-01
lola: result : false
lola: FINISHED task # 53 (type SKEL/FNDP) for BridgeAndVehicles-COL-V20P10N50-ReachabilityCardinality-04
lola: result : true
lola: fired transitions : 29
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
lola: FINISHED task # 56 (type SKEL/EQUN) for BridgeAndVehicles-COL-V20P10N50-ReachabilityCardinality-04
lola: result : true
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-103.sara.
sara: place or transition ordering is non-deterministic
lola: FINISHED task # 144 (type SKEL/SRCH) for BridgeAndVehicles-COL-V20P10N50-ReachabilityCardinality-02
lola: result : false
lola: markings : 21399
lola: fired transitions : 31506
lola: time used : 0.000000
lola: memory pages used : 1
lola: CANCELED task # 102 (type FNDP) for BridgeAndVehicles-COL-V20P10N50-ReachabilityCardinality-02 (obsolete)
lola: CANCELED task # 103 (type EQUN) for BridgeAndVehicles-COL-V20P10N50-ReachabilityCardinality-02 (obsolete)
lola: CANCELED task # 143 (type SRCH) for BridgeAndVehicles-COL-V20P10N50-ReachabilityCardinality-02 (obsolete)
lola: LAUNCH task # 55 (type SKEL/FNDP) for 0 BridgeAndVehicles-COL-V20P10N50-ReachabilityCardinality-00
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 84 (type SKEL/EQUN) for 0 BridgeAndVehicles-COL-V20P10N50-ReachabilityCardinality-00
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 105 (type SKEL/SRCH) for 0 BridgeAndVehicles-COL-V20P10N50-ReachabilityCardinality-00
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 106 (type SKEL/SRCH) for 0 BridgeAndVehicles-COL-V20P10N50-ReachabilityCardinality-00
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 102 (type SKEL/FNDP) for BridgeAndVehicles-COL-V20P10N50-ReachabilityCardinality-02
lola: result : unknown
lola: fired transitions : 76003
lola: tried executions : 2
lola: time used : 0.000000
lola: memory pages used : 0
lola: FINISHED task # 103 (type SKEL/EQUN) for BridgeAndVehicles-COL-V20P10N50-ReachabilityCardinality-02
lola: result : false
lola: FINISHED task # 105 (type SKEL/SRCH) for BridgeAndVehicles-COL-V20P10N50-ReachabilityCardinality-00
lola: result : false
lola: markings : 116862
lola: fired transitions : 337943
lola: time used : 0.000000
lola: memory pages used : 1
lola: CANCELED task # 55 (type FNDP) for BridgeAndVehicles-COL-V20P10N50-ReachabilityCardinality-00 (obsolete)
lola: CANCELED task # 84 (type EQUN) for BridgeAndVehicles-COL-V20P10N50-ReachabilityCardinality-00 (obsolete)
lola: CANCELED task # 106 (type SRCH) for BridgeAndVehicles-COL-V20P10N50-ReachabilityCardinality-00 (obsolete)
lola: LAUNCH task # 95 (type SKEL/FNDP) for 27 BridgeAndVehicles-COL-V20P10N50-ReachabilityCardinality-09
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 126 (type SKEL/EQUN) for 27 BridgeAndVehicles-COL-V20P10N50-ReachabilityCardinality-09
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 140 (type SKEL/SRCH) for 27 BridgeAndVehicles-COL-V20P10N50-ReachabilityCardinality-09
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 141 (type SKEL/SRCH) for 27 BridgeAndVehicles-COL-V20P10N50-ReachabilityCardinality-09
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 55 (type SKEL/FNDP) for BridgeAndVehicles-COL-V20P10N50-ReachabilityCardinality-00
lola: result : unknown
lola: fired transitions : 392241
lola: tried executions : 1459
lola: time used : 0.000000
lola: memory pages used : 0
lola: FINISHED task # 140 (type SKEL/SRCH) for BridgeAndVehicles-COL-V20P10N50-ReachabilityCardinality-09
lola: result : true
lola: markings : 21
lola: fired transitions : 20
lola: time used : 0.000000
lola: memory pages used : 1
lola: CANCELED task # 95 (type FNDP) for BridgeAndVehicles-COL-V20P10N50-ReachabilityCardinality-09 (obsolete)
lola: CANCELED task # 126 (type EQUN) for BridgeAndVehicles-COL-V20P10N50-ReachabilityCardinality-09 (obsolete)
lola: CANCELED task # 141 (type SRCH) for BridgeAndVehicles-COL-V20P10N50-ReachabilityCardinality-09 (obsolete)
lola: LAUNCH task # 78 (type SKEL/FNDP) for 33 BridgeAndVehicles-COL-V20P10N50-ReachabilityCardinality-11
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 79 (type SKEL/EQUN) for 33 BridgeAndVehicles-COL-V20P10N50-ReachabilityCardinality-11
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 81 (type SKEL/SRCH) for 33 BridgeAndVehicles-COL-V20P10N50-ReachabilityCardinality-11
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 82 (type SKEL/SRCH) for 33 BridgeAndVehicles-COL-V20P10N50-ReachabilityCardinality-11
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 141 (type SKEL/SRCH) for BridgeAndVehicles-COL-V20P10N50-ReachabilityCardinality-09
lola: result : true
lola: markings : 21
lola: fired transitions : 20
lola: time used : 0.000000
lola: memory pages used : 1
lola: FINISHED task # 82 (type SKEL/SRCH) for BridgeAndVehicles-COL-V20P10N50-ReachabilityCardinality-11
lola: result : true
lola: markings : 165
lola: fired transitions : 185
lola: time used : 0.000000
lola: memory pages used : 1
lola: CANCELED task # 78 (type FNDP) for BridgeAndVehicles-COL-V20P10N50-ReachabilityCardinality-11 (obsolete)
lola: CANCELED task # 79 (type EQUN) for BridgeAndVehicles-COL-V20P10N50-ReachabilityCardinality-11 (obsolete)
lola: CANCELED task # 81 (type SRCH) for BridgeAndVehicles-COL-V20P10N50-ReachabilityCardinality-11 (obsolete)
lola: LAUNCH task # 115 (type SKEL/FNDP) for 9 BridgeAndVehicles-COL-V20P10N50-ReachabilityCardinality-03
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 116 (type SKEL/EQUN) for 9 BridgeAndVehicles-COL-V20P10N50-ReachabilityCardinality-03
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 118 (type SKEL/SRCH) for 9 BridgeAndVehicles-COL-V20P10N50-ReachabilityCardinality-03
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 119 (type SKEL/SRCH) for 9 BridgeAndVehicles-COL-V20P10N50-ReachabilityCardinality-03
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 115 (type SKEL/FNDP) for BridgeAndVehicles-COL-V20P10N50-ReachabilityCardinality-03
lola: result : true
lola: fired transitions : 19
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
lola: CANCELED task # 116 (type EQUN) for BridgeAndVehicles-COL-V20P10N50-ReachabilityCardinality-03 (obsolete)
lola: CANCELED task # 118 (type SRCH) for BridgeAndVehicles-COL-V20P10N50-ReachabilityCardinality-03 (obsolete)
lola: CANCELED task # 119 (type SRCH) for BridgeAndVehicles-COL-V20P10N50-ReachabilityCardinality-03 (obsolete)
lola: LAUNCH task # 96 (type SKEL/FNDP) for 39 BridgeAndVehicles-COL-V20P10N50-ReachabilityCardinality-13
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 145 (type SKEL/EQUN) for 39 BridgeAndVehicles-COL-V20P10N50-ReachabilityCardinality-13
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 156 (type SKEL/SRCH) for 39 BridgeAndVehicles-COL-V20P10N50-ReachabilityCardinality-13
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 157 (type SKEL/SRCH) for 39 BridgeAndVehicles-COL-V20P10N50-ReachabilityCardinality-13
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 95 (type SKEL/FNDP) for BridgeAndVehicles-COL-V20P10N50-ReachabilityCardinality-09
lola: result : true
lola: fired transitions : 19
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
lola: FINISHED task # 156 (type SKEL/SRCH) for BridgeAndVehicles-COL-V20P10N50-ReachabilityCardinality-13
lola: result : true
lola: markings : 31
lola: fired transitions : 30
lola: time used : 0.000000
lola: memory pages used : 1
lola: CANCELED task # 96 (type FNDP) for BridgeAndVehicles-COL-V20P10N50-ReachabilityCardinality-13 (obsolete)
lola: CANCELED task # 145 (type EQUN) for BridgeAndVehicles-COL-V20P10N50-ReachabilityCardinality-13 (obsolete)
lola: CANCELED task # 157 (type SRCH) for BridgeAndVehicles-COL-V20P10N50-ReachabilityCardinality-13 (obsolete)
lola: FINISHED task # 78 (type SKEL/FNDP) for BridgeAndVehicles-COL-V20P10N50-ReachabilityCardinality-11
lola: result : true
lola: fired transitions : 110
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
lola: FINISHED task # 96 (type SKEL/FNDP) for BridgeAndVehicles-COL-V20P10N50-ReachabilityCardinality-13
lola: result : true
lola: fired transitions : 29
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
lola: rewrite Frontend/Parser/formula_rewrite.k:96
lola: rewrite Frontend/Parser/formula_rewrite.k:156
lola: rewrite Frontend/Parser/formula_rewrite.k:147
lola: rewrite Frontend/Parser/formula_rewrite.k:96
lola: rewrite Frontend/Parser/formula_rewrite.k:156
lola: rewrite Frontend/Parser/formula_rewrite.k:147
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-84.sara.
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-79.sara.
sara: place or transition ordering is non-deterministic
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-116.sara.
sara: place or transition ordering is non-deterministic
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-126.sara.
sara: place or transition ordering is non-deterministic
lola: Rule S: 0 transitions removed,0 places removed
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-145.sara.
lola: FINISHED task # 116 (type SKEL/EQUN) for BridgeAndVehicles-COL-V20P10N50-ReachabilityCardinality-03
lola: result : true
lola: FINISHED task # 79 (type SKEL/EQUN) for BridgeAndVehicles-COL-V20P10N50-ReachabilityCardinality-11
lola: result : true
lola: FINISHED task # 126 (type SKEL/EQUN) for BridgeAndVehicles-COL-V20P10N50-ReachabilityCardinality-09
lola: result : true
lola: FINISHED task # 145 (type SKEL/EQUN) for BridgeAndVehicles-COL-V20P10N50-ReachabilityCardinality-13
lola: result : true
lola: FINISHED task # 84 (type SKEL/EQUN) for BridgeAndVehicles-COL-V20P10N50-ReachabilityCardinality-00
lola: result : false
lola: planning for BridgeAndVehicles-COL-V20P10N50-ReachabilityCardinality-00 stopped (result already fixed).
lola: planning for BridgeAndVehicles-COL-V20P10N50-ReachabilityCardinality-01 stopped (result already fixed).
lola: planning for BridgeAndVehicles-COL-V20P10N50-ReachabilityCardinality-02 stopped (result already fixed).
lola: planning for BridgeAndVehicles-COL-V20P10N50-ReachabilityCardinality-06 stopped (result already fixed).
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: LAUNCH task # 165 (type EXCL) for 15 BridgeAndVehicles-COL-V20P10N50-ReachabilityCardinality-05
lola: time limit : 449 sec
lola: memory limit: 32 pages
lola: LAUNCH task # 160 (type FNDP) for 15 BridgeAndVehicles-COL-V20P10N50-ReachabilityCardinality-05
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 161 (type EQUN) for 15 BridgeAndVehicles-COL-V20P10N50-ReachabilityCardinality-05
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: LAUNCH task # 164 (type SRCH) for 15 BridgeAndVehicles-COL-V20P10N50-ReachabilityCardinality-05
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-161.sara.
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: FINISHED task # 164 (type SRCH) for BridgeAndVehicles-COL-V20P10N50-ReachabilityCardinality-05
lola: result : true
lola: markings : 28
lola: fired transitions : 27
lola: time used : 0.000000
lola: memory pages used : 1
lola: CANCELED task # 160 (type FNDP) for BridgeAndVehicles-COL-V20P10N50-ReachabilityCardinality-05 (obsolete)
lola: CANCELED task # 161 (type EQUN) for BridgeAndVehicles-COL-V20P10N50-ReachabilityCardinality-05 (obsolete)
lola: CANCELED task # 165 (type EXCL) for BridgeAndVehicles-COL-V20P10N50-ReachabilityCardinality-05 (obsolete)
lola: LAUNCH task # 197 (type EXCL) for 39 BridgeAndVehicles-COL-V20P10N50-ReachabilityCardinality-13
lola: time limit : 449 sec
lola: memory limit: 32 pages
lola: LAUNCH task # 201 (type FNDP) for 24 BridgeAndVehicles-COL-V20P10N50-ReachabilityCardinality-08
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 202 (type EQUN) for 24 BridgeAndVehicles-COL-V20P10N50-ReachabilityCardinality-08
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 204 (type SRCH) for 24 BridgeAndVehicles-COL-V20P10N50-ReachabilityCardinality-08
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 161 (type EQUN) for BridgeAndVehicles-COL-V20P10N50-ReachabilityCardinality-05
lola: result : unknown
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: FINISHED task # 160 (type FNDP) for BridgeAndVehicles-COL-V20P10N50-ReachabilityCardinality-05
lola: result : true
lola: fired transitions : 26
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
lola: FINISHED task # 204 (type SRCH) for BridgeAndVehicles-COL-V20P10N50-ReachabilityCardinality-08
lola: result : true
lola: markings : 22
lola: fired transitions : 21
lola: time used : 0.000000
lola: memory pages used : 1
lola: CANCELED task # 201 (type FNDP) for BridgeAndVehicles-COL-V20P10N50-ReachabilityCardinality-08 (obsolete)
lola: CANCELED task # 202 (type EQUN) for BridgeAndVehicles-COL-V20P10N50-ReachabilityCardinality-08 (obsolete)
lola: LAUNCH task # 200 (type FNDP) for 27 BridgeAndVehicles-COL-V20P10N50-ReachabilityCardinality-09
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 207 (type EQUN) for 27 BridgeAndVehicles-COL-V20P10N50-ReachabilityCardinality-09
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 209 (type SRCH) for 27 BridgeAndVehicles-COL-V20P10N50-ReachabilityCardinality-09
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 201 (type FNDP) for BridgeAndVehicles-COL-V20P10N50-ReachabilityCardinality-08
lola: result : true
lola: fired transitions : 20
lola: tried executions : 1
lola: time used : 0.000000
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: memory pages used : 0
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-202.sara.
lola: FINISHED task # 197 (type EXCL) for BridgeAndVehicles-COL-V20P10N50-ReachabilityCardinality-13
lola: result : true
lola: markings : 34
lola: fired transitions : 33
lola: time used : 1.000000
lola: memory pages used : 1
lola: LAUNCH task # 184 (type EXCL) for 21 BridgeAndVehicles-COL-V20P10N50-ReachabilityCardinality-07
lola: time limit : 599 sec
lola: memory limit: 32 pages
lola: FINISHED task # 200 (type FNDP) for BridgeAndVehicles-COL-V20P10N50-ReachabilityCardinality-09
lola: result : true
lola: fired transitions : 19
lola: tried executions : 1
lola: time used : 1.000000
lola: memory pages used : 0
lola: CANCELED task # 207 (type EQUN) for BridgeAndVehicles-COL-V20P10N50-ReachabilityCardinality-09 (obsolete)
lola: CANCELED task # 209 (type SRCH) for BridgeAndVehicles-COL-V20P10N50-ReachabilityCardinality-09 (obsolete)
lola: LAUNCH task # 186 (type FNDP) for 33 BridgeAndVehicles-COL-V20P10N50-ReachabilityCardinality-11
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 187 (type EQUN) for 33 BridgeAndVehicles-COL-V20P10N50-ReachabilityCardinality-11
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 189 (type SRCH) for 33 BridgeAndVehicles-COL-V20P10N50-ReachabilityCardinality-11
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:711
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-207.sara.
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-187.sara.
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: FINISHED task # 186 (type FNDP) for BridgeAndVehicles-COL-V20P10N50-ReachabilityCardinality-11
lola: result : true
lola: fired transitions : 113
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
lola: CANCELED task # 187 (type EQUN) for BridgeAndVehicles-COL-V20P10N50-ReachabilityCardinality-11 (obsolete)
lola: CANCELED task # 189 (type SRCH) for BridgeAndVehicles-COL-V20P10N50-ReachabilityCardinality-11 (obsolete)
sara: place or transition ordering is non-deterministic
lola: LAUNCH task # 163 (type FNDP) for 9 BridgeAndVehicles-COL-V20P10N50-ReachabilityCardinality-03
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 166 (type EQUN) for 9 BridgeAndVehicles-COL-V20P10N50-ReachabilityCardinality-03
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 169 (type SRCH) for 9 BridgeAndVehicles-COL-V20P10N50-ReachabilityCardinality-03
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 187 (type EQUN) for BridgeAndVehicles-COL-V20P10N50-ReachabilityCardinality-11
lola: result : unknown
lola: rewrite Frontend/Parser/formula_rewrite.k:711
sara: place or transition ordering is non-deterministic
lola: FINISHED task # 169 (type SRCH) for BridgeAndVehicles-COL-V20P10N50-ReachabilityCardinality-03
lola: result : true
lola: markings : 21
lola: fired transitions : 20
lola: time used : 0.000000
lola: memory pages used : 1
lola: CANCELED task # 163 (type FNDP) for BridgeAndVehicles-COL-V20P10N50-ReachabilityCardinality-03 (obsolete)
lola: CANCELED task # 166 (type EQUN) for BridgeAndVehicles-COL-V20P10N50-ReachabilityCardinality-03 (obsolete)
lola: LAUNCH task # 173 (type FNDP) for 12 BridgeAndVehicles-COL-V20P10N50-ReachabilityCardinality-04
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 174 (type EQUN) for 12 BridgeAndVehicles-COL-V20P10N50-ReachabilityCardinality-04
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: LAUNCH task # 176 (type SRCH) for 12 BridgeAndVehicles-COL-V20P10N50-ReachabilityCardinality-04
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 163 (type FNDP) for BridgeAndVehicles-COL-V20P10N50-ReachabilityCardinality-03
lola: result : true
lola: fired transitions : 19
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-166.sara.
lola: FINISHED task # 184 (type EXCL) for BridgeAndVehicles-COL-V20P10N50-ReachabilityCardinality-07
lola: result : true
lola: markings : 164
lola: fired transitions : 163
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 217 (type EXCL) for 42 BridgeAndVehicles-COL-V20P10N50-ReachabilityCardinality-14
lola: time limit : 1798 sec
lola: memory limit: 32 pages
lola: FINISHED task # 176 (type SRCH) for BridgeAndVehicles-COL-V20P10N50-ReachabilityCardinality-04
lola: result : true
lola: markings : 31
lola: fired transitions : 30
lola: time used : 0.000000
lola: memory pages used : 1
lola: CANCELED task # 173 (type FNDP) for BridgeAndVehicles-COL-V20P10N50-ReachabilityCardinality-04 (obsolete)
lola: CANCELED task # 174 (type EQUN) for BridgeAndVehicles-COL-V20P10N50-ReachabilityCardinality-04 (obsolete)
lola: LAUNCH task # 213 (type FNDP) for 42 BridgeAndVehicles-COL-V20P10N50-ReachabilityCardinality-14
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 214 (type EQUN) for 42 BridgeAndVehicles-COL-V20P10N50-ReachabilityCardinality-14
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 216 (type SRCH) for 42 BridgeAndVehicles-COL-V20P10N50-ReachabilityCardinality-14
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 173 (type FNDP) for BridgeAndVehicles-COL-V20P10N50-ReachabilityCardinality-04
lola: result : true
lola: fired transitions : 29
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-174.sara.
lola: FINISHED task # 207 (type EQUN) for BridgeAndVehicles-COL-V20P10N50-ReachabilityCardinality-09
lola: result : true
lola: FINISHED task # 216 (type SRCH) for BridgeAndVehicles-COL-V20P10N50-ReachabilityCardinality-14
lola: result : true
lola: markings : 21
lola: fired transitions : 20
lola: time used : 0.000000
lola: memory pages used : 1
lola: CANCELED task # 213 (type FNDP) for BridgeAndVehicles-COL-V20P10N50-ReachabilityCardinality-14 (obsolete)
lola: CANCELED task # 214 (type EQUN) for BridgeAndVehicles-COL-V20P10N50-ReachabilityCardinality-14 (obsolete)
lola: CANCELED task # 217 (type EXCL) for BridgeAndVehicles-COL-V20P10N50-ReachabilityCardinality-14 (obsolete)
lola: Portfolio finished: no open formulas
FINAL RESULTS
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
BridgeAndVehicles-COL-V20P10N50-ReachabilityCardinality-00: EF false skeleton: tandem / insertion
BridgeAndVehicles-COL-V20P10N50-ReachabilityCardinality-01: EF false skeleton: tandem / insertion
BridgeAndVehicles-COL-V20P10N50-ReachabilityCardinality-02: AG true skeleton: tandem / relaxed
BridgeAndVehicles-COL-V20P10N50-ReachabilityCardinality-03: EF true tandem / insertion
BridgeAndVehicles-COL-V20P10N50-ReachabilityCardinality-04: AG false tandem / insertion
BridgeAndVehicles-COL-V20P10N50-ReachabilityCardinality-05: EF true tandem / insertion
BridgeAndVehicles-COL-V20P10N50-ReachabilityCardinality-06: AG true skeleton: tandem / relaxed
BridgeAndVehicles-COL-V20P10N50-ReachabilityCardinality-07: AG false tandem / relaxed
BridgeAndVehicles-COL-V20P10N50-ReachabilityCardinality-08: AG false tandem / insertion
BridgeAndVehicles-COL-V20P10N50-ReachabilityCardinality-09: EF true findpath
BridgeAndVehicles-COL-V20P10N50-ReachabilityCardinality-10: EF false skeleton: tandem / insertion
BridgeAndVehicles-COL-V20P10N50-ReachabilityCardinality-11: EF true findpath
BridgeAndVehicles-COL-V20P10N50-ReachabilityCardinality-12: INITIAL false skeleton: preprocessing
BridgeAndVehicles-COL-V20P10N50-ReachabilityCardinality-13: AG false tandem / relaxed
BridgeAndVehicles-COL-V20P10N50-ReachabilityCardinality-14: AG false tandem / insertion
BridgeAndVehicles-COL-V20P10N50-ReachabilityCardinality-15: EF false skeleton: tandem / insertion
Time elapsed: 4 secs. Pages in use: 4
Sequence of Actions to be Executed by the VM
This is useful if one wants to reexecute the tool in the VM from the submitted image disk.
set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="BridgeAndVehicles-COL-V20P10N50"
export BK_EXAMINATION="ReachabilityCardinality"
export BK_TOOL="lola"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"
# this is specific to your benchmark or test
export BIN_DIR="$HOME/BenchKit/bin"
# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi
# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-4028"
echo " Executing tool lola"
echo " Input is BridgeAndVehicles-COL-V20P10N50, examination is ReachabilityCardinality"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r023-tajo-162038139100038"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"
tar xzf /home/mcc/BenchKit/INPUTS/BridgeAndVehicles-COL-V20P10N50.tgz
mv BridgeAndVehicles-COL-V20P10N50 execution
cd execution
if [ "ReachabilityCardinality" = "ReachabilityDeadlock" ] || [ "ReachabilityCardinality" = "UpperBounds" ] || [ "ReachabilityCardinality" = "QuasiLiveness" ] || [ "ReachabilityCardinality" = "StableMarking" ] || [ "ReachabilityCardinality" = "Liveness" ] || [ "ReachabilityCardinality" = "OneSafe" ] || [ "ReachabilityCardinality" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh
echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "ReachabilityCardinality" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "ReachabilityCardinality" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "ReachabilityCardinality.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property ReachabilityCardinality.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "ReachabilityCardinality.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '
echo "FORMULA_NAME $x"
done
elif [ "ReachabilityCardinality" = "ReachabilityDeadlock" ] || [ "ReachabilityCardinality" = "QuasiLiveness" ] || [ "ReachabilityCardinality" = "StableMarking" ] || [ "ReachabilityCardinality" = "Liveness" ] || [ "ReachabilityCardinality" = "OneSafe" ] ; then
echo "FORMULA_NAME ReachabilityCardinality"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;