Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/mnt/tpsp/fkordon/mcc2021-input.r023-tajo-162038139000006.qcow2', fmt=qcow2 size=4294967296 backing_file='/mnt/tpsp/fkordon/mcc2021-input.qcow2' encryption=off cluster_size=65536 lazy_refcounts=off
Waiting for the VM to be ready (probing ssh)
....................
=====================================================================
Generated by BenchKit 2-4028
Executing tool lola
Input is BridgeAndVehicles-COL-V04P05N02, examination is ReachabilityCardinality
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r023-tajo-162038139000006
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 412K
-rw-r--r-- 1 mcc users 16K May 5 16:58 CTLCardinality.txt
-rw-r--r-- 1 mcc users 118K May 10 09:42 CTLCardinality.xml
-rw-r--r-- 1 mcc users 12K May 5 16:58 CTLFireability.txt
-rw-r--r-- 1 mcc users 68K May 10 09:42 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K May 6 14:48 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.4K May 6 14:48 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 4.1K Mar 28 15:46 LTLCardinality.txt
-rw-r--r-- 1 mcc users 26K Mar 28 15:46 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.6K Mar 28 15:46 LTLFireability.txt
-rw-r--r-- 1 mcc users 18K Mar 28 15:46 LTLFireability.xml
-rw-r--r-- 1 mcc users 3.8K Mar 23 02:47 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 17K Mar 23 02:47 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 4.4K Mar 22 11:00 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 25K Mar 22 11:00 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.9K Mar 22 09:10 UpperBounds.txt
-rw-r--r-- 1 mcc users 4.0K Mar 22 09:10 UpperBounds.xml
-rw-r--r-- 1 mcc users 5 May 5 16:51 equiv_pt
-rw-r--r-- 1 mcc users 10 May 5 16:51 instance
-rw-r--r-- 1 mcc users 5 May 5 16:51 iscolored
-rw-r--r-- 1 mcc users 37K May 5 16:51 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME BridgeAndVehicles-COL-V04P05N02-ReachabilityCardinality-00
FORMULA_NAME BridgeAndVehicles-COL-V04P05N02-ReachabilityCardinality-01
FORMULA_NAME BridgeAndVehicles-COL-V04P05N02-ReachabilityCardinality-02
FORMULA_NAME BridgeAndVehicles-COL-V04P05N02-ReachabilityCardinality-03
FORMULA_NAME BridgeAndVehicles-COL-V04P05N02-ReachabilityCardinality-04
FORMULA_NAME BridgeAndVehicles-COL-V04P05N02-ReachabilityCardinality-05
FORMULA_NAME BridgeAndVehicles-COL-V04P05N02-ReachabilityCardinality-06
FORMULA_NAME BridgeAndVehicles-COL-V04P05N02-ReachabilityCardinality-07
FORMULA_NAME BridgeAndVehicles-COL-V04P05N02-ReachabilityCardinality-08
FORMULA_NAME BridgeAndVehicles-COL-V04P05N02-ReachabilityCardinality-09
FORMULA_NAME BridgeAndVehicles-COL-V04P05N02-ReachabilityCardinality-10
FORMULA_NAME BridgeAndVehicles-COL-V04P05N02-ReachabilityCardinality-11
FORMULA_NAME BridgeAndVehicles-COL-V04P05N02-ReachabilityCardinality-12
FORMULA_NAME BridgeAndVehicles-COL-V04P05N02-ReachabilityCardinality-13
FORMULA_NAME BridgeAndVehicles-COL-V04P05N02-ReachabilityCardinality-14
FORMULA_NAME BridgeAndVehicles-COL-V04P05N02-ReachabilityCardinality-15

=== Now, execution of the tool begins

BK_START 1620853011052

starting LoLA
BK_INPUT BridgeAndVehicles-COL-V04P05N02
BK_EXAMINATION: ReachabilityCardinality
bin directory: /home/mcc/BenchKit/bin
current directory: /home/mcc/execution
ReachabilityCardinality

FORMULA BridgeAndVehicles-COL-V04P05N02-ReachabilityCardinality-03 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA BridgeAndVehicles-COL-V04P05N02-ReachabilityCardinality-08 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA BridgeAndVehicles-COL-V04P05N02-ReachabilityCardinality-06 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA BridgeAndVehicles-COL-V04P05N02-ReachabilityCardinality-07 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA BridgeAndVehicles-COL-V04P05N02-ReachabilityCardinality-04 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA BridgeAndVehicles-COL-V04P05N02-ReachabilityCardinality-15 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA BridgeAndVehicles-COL-V04P05N02-ReachabilityCardinality-13 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA BridgeAndVehicles-COL-V04P05N02-ReachabilityCardinality-00 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA BridgeAndVehicles-COL-V04P05N02-ReachabilityCardinality-01 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA BridgeAndVehicles-COL-V04P05N02-ReachabilityCardinality-09 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA BridgeAndVehicles-COL-V04P05N02-ReachabilityCardinality-10 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA BridgeAndVehicles-COL-V04P05N02-ReachabilityCardinality-02 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA BridgeAndVehicles-COL-V04P05N02-ReachabilityCardinality-14 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA BridgeAndVehicles-COL-V04P05N02-ReachabilityCardinality-11 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA BridgeAndVehicles-COL-V04P05N02-ReachabilityCardinality-05 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA BridgeAndVehicles-COL-V04P05N02-ReachabilityCardinality-12 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

BK_STOP 1620853011741

--------------------
content from stderr:

lola: MEM LIMIT 32
lola: MEM LIMIT 5
lola: NET
lola: input: PNML file (--pnmlnet)
lola: reading net from /home/mcc/execution/model.pnml
lola: reading pnml
lola: PNML file contains High-Level net
lola: finished parsing
lola: closed net file /home/mcc/execution/model.pnml
lola: Reading HL formula in XML format (--xmlformula)
lola: reading formula from /home/mcc/execution/ReachabilityCardinality.xml
lola: rewrite Frontend/Parser/formula_rewrite.k:98
lola: rewrite Frontend/Parser/formula_rewrite.k:159
lola: rewrite Frontend/Parser/formula_rewrite.k:150
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: LAUNCH INITIAL
lola: TR BINDINGS
lola: LAUNCH task # 11 (type SKEL/CNST) for 9 BridgeAndVehicles-COL-V04P05N02-ReachabilityCardinality-03
lola: time limit : 0 sec
lola: memory limit: 0 pages
lola: LAUNCH task # 49 (type SKEL/FNDP) for 24 BridgeAndVehicles-COL-V04P05N02-ReachabilityCardinality-08
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 51 (type SKEL/EQUN) for 24 BridgeAndVehicles-COL-V04P05N02-ReachabilityCardinality-08
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 54 (type SKEL/SRCH) for 24 BridgeAndVehicles-COL-V04P05N02-ReachabilityCardinality-08
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 11 (type SKEL/CNST) for BridgeAndVehicles-COL-V04P05N02-ReachabilityCardinality-03
lola: result : true
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: LAUNCH task # 55 (type SKEL/SRCH) for 24 BridgeAndVehicles-COL-V04P05N02-ReachabilityCardinality-08
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: FINISHED task # 54 (type SKEL/SRCH) for BridgeAndVehicles-COL-V04P05N02-ReachabilityCardinality-08
lola: result : false
lola: markings : 1
lola: time used : 0.000000
lola: memory pages used : 1
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: CANCELED task # 49 (type FNDP) for BridgeAndVehicles-COL-V04P05N02-ReachabilityCardinality-08 (obsolete)
lola: CANCELED task # 51 (type EQUN) for BridgeAndVehicles-COL-V04P05N02-ReachabilityCardinality-08 (obsolete)
lola: CANCELED task # 55 (type SRCH) for BridgeAndVehicles-COL-V04P05N02-ReachabilityCardinality-08 (obsolete)
lola: LAUNCH task # 73 (type SKEL/FNDP) for 18 BridgeAndVehicles-COL-V04P05N02-ReachabilityCardinality-06
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 74 (type SKEL/EQUN) for 18 BridgeAndVehicles-COL-V04P05N02-ReachabilityCardinality-06
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: LAUNCH task # 76 (type SKEL/SRCH) for 18 BridgeAndVehicles-COL-V04P05N02-ReachabilityCardinality-06
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: LAUNCH task # 77 (type SKEL/SRCH) for 18 BridgeAndVehicles-COL-V04P05N02-ReachabilityCardinality-06
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: TR BINDINGS DONE
lola: Places: 28, Transitions: 52
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-51.sara.
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
sara: place or transition ordering is non-deterministic
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: FINISHED task # 76 (type SKEL/SRCH) for BridgeAndVehicles-COL-V04P05N02-ReachabilityCardinality-06
lola: result : false
lola: markings : 2
lola: fired transitions : 2
lola: time used : 0.000000
lola: memory pages used : 1
lola: CANCELED task # 73 (type FNDP) for BridgeAndVehicles-COL-V04P05N02-ReachabilityCardinality-06 (obsolete)
lola: CANCELED task # 74 (type EQUN) for BridgeAndVehicles-COL-V04P05N02-ReachabilityCardinality-06 (obsolete)
lola: CANCELED task # 77 (type SRCH) for BridgeAndVehicles-COL-V04P05N02-ReachabilityCardinality-06 (obsolete)
lola: LAUNCH task # 88 (type SKEL/FNDP) for 21 BridgeAndVehicles-COL-V04P05N02-ReachabilityCardinality-07
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 96 (type SKEL/EQUN) for 21 BridgeAndVehicles-COL-V04P05N02-ReachabilityCardinality-07
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 112 (type SKEL/SRCH) for 21 BridgeAndVehicles-COL-V04P05N02-ReachabilityCardinality-07
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 113 (type SKEL/SRCH) for 21 BridgeAndVehicles-COL-V04P05N02-ReachabilityCardinality-07
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: FINISHED task # 77 (type SKEL/SRCH) for BridgeAndVehicles-COL-V04P05N02-ReachabilityCardinality-06
lola: result : false
lola: markings : 2
lola: fired transitions : 2
lola: time used : 0.000000
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: memory pages used : 1
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: FINISHED task # 73 (type SKEL/FNDP) for BridgeAndVehicles-COL-V04P05N02-ReachabilityCardinality-06
lola: result : unknown
lola: fired transitions : 5117
lola: tried executions : 2
lola: time used : 0.000000
lola: memory pages used : 0
lola: FINISHED task # 74 (type SKEL/EQUN) for BridgeAndVehicles-COL-V04P05N02-ReachabilityCardinality-06
lola: result : unknown
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: FINISHED task # 112 (type SKEL/SRCH) for BridgeAndVehicles-COL-V04P05N02-ReachabilityCardinality-07
lola: result : false

lola: markings : 1
lola: time used : 0.000000
lola: memory pages used : 1
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:711
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-96.sara.
lola: CANCELED task # 88 (type FNDP) for BridgeAndVehicles-COL-V04P05N02-ReachabilityCardinality-07 (obsolete)
lola: CANCELED task # 96 (type EQUN) for BridgeAndVehicles-COL-V04P05N02-ReachabilityCardinality-07 (obsolete)
lola: CANCELED task # 113 (type SRCH) for BridgeAndVehicles-COL-V04P05N02-ReachabilityCardinality-07 (obsolete)
lola: LAUNCH task # 72 (type SKEL/FNDP) for 15 BridgeAndVehicles-COL-V04P05N02-ReachabilityCardinality-05
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 95 (type SKEL/EQUN) for 15 BridgeAndVehicles-COL-V04P05N02-ReachabilityCardinality-05
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 139 (type SKEL/SRCH) for 15 BridgeAndVehicles-COL-V04P05N02-ReachabilityCardinality-05
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: LAUNCH task # 140 (type SKEL/SRCH) for 15 BridgeAndVehicles-COL-V04P05N02-ReachabilityCardinality-05
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 113 (type SKEL/SRCH) for BridgeAndVehicles-COL-V04P05N02-ReachabilityCardinality-07
lola: result : false
lola: markings : 1281
lola: fired transitions : 2824
lola: time used : 0.000000
lola: memory pages used : 1
lola: FINISHED task # 96 (type SKEL/EQUN) for BridgeAndVehicles-COL-V04P05N02-ReachabilityCardinality-07
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: result : unknown
lola: FINISHED task # 88 (type SKEL/FNDP) for BridgeAndVehicles-COL-V04P05N02-ReachabilityCardinality-07
lola: result : unknown
lola: fired transitions : 1
lola: tried executions : 2
lola: time used : 0.000000
lola: memory pages used : 0
lola: FINISHED task # 72 (type SKEL/FNDP) for BridgeAndVehicles-COL-V04P05N02-ReachabilityCardinality-05
lola: result : true
lola: fired transitions : 14
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
lola: CANCELED task # 95 (type EQUN) for BridgeAndVehicles-COL-V04P05N02-ReachabilityCardinality-05 (obsolete)
lola: CANCELED task # 139 (type SRCH) for BridgeAndVehicles-COL-V04P05N02-ReachabilityCardinality-05 (obsolete)
lola: CANCELED task # 140 (type SRCH) for BridgeAndVehicles-COL-V04P05N02-ReachabilityCardinality-05 (obsolete)
lola: LAUNCH task # 80 (type SKEL/FNDP) for 12 BridgeAndVehicles-COL-V04P05N02-ReachabilityCardinality-04
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 81 (type SKEL/EQUN) for 12 BridgeAndVehicles-COL-V04P05N02-ReachabilityCardinality-04
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 83 (type SKEL/SRCH) for 12 BridgeAndVehicles-COL-V04P05N02-ReachabilityCardinality-04
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 84 (type SKEL/SRCH) for 12 BridgeAndVehicles-COL-V04P05N02-ReachabilityCardinality-04
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 139 (type SKEL/SRCH) for BridgeAndVehicles-COL-V04P05N02-ReachabilityCardinality-05
lola: result : true
lola: markings : 16
lola: fired transitions : 15
lola: time used : 0.000000
lola: memory pages used : 1
lola: sara: rewrite Frontend/Parser/formula_rewrite.k:711
try reading problem file /home/mcc/execution/ReachabilityCardinality-95.sara.
lola: FINISHED task # 83 (type SKEL/SRCH) for BridgeAndVehicles-COL-V04P05N02-ReachabilityCardinality-04
lola: result : false
lola: markings : 385
lola: fired transitions : 709
lola: sara: time used : 0.000000place or transition ordering is non-deterministic

lola: memory pages used : 1
lola: CANCELED task # 80 (type FNDP) for BridgeAndVehicles-COL-V04P05N02-ReachabilityCardinality-04 (obsolete)
lola: CANCELED task # 81 (type EQUN) for BridgeAndVehicles-COL-V04P05N02-ReachabilityCardinality-04 (obsolete)
lola: CANCELED task # 84 (type SRCH) for BridgeAndVehicles-COL-V04P05N02-ReachabilityCardinality-04 (obsolete)
lola: LAUNCH task # 111 (type SKEL/FNDP) for 45 BridgeAndVehicles-COL-V04P05N02-ReachabilityCardinality-15
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: LAUNCH task # 126 (type SKEL/FNDP) for 36 BridgeAndVehicles-COL-V04P05N02-ReachabilityCardinality-12
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 137 (type SKEL/EQUN) for 36 BridgeAndVehicles-COL-V04P05N02-ReachabilityCardinality-12
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 141 (type SKEL/EQUN) for 45 BridgeAndVehicles-COL-V04P05N02-ReachabilityCardinality-15
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 84 (type SKEL/SRCH) for BridgeAndVehicles-COL-V04P05N02-ReachabilityCardinality-04
lola: result : false
lola: markings : 405
lola: fired transitions : 615
lola: time used : 0.000000
lola: memory pages used : 1
lola: FINISHED task # 51 (type SKEL/EQUN) for BridgeAndVehicles-COL-V04P05N02-ReachabilityCardinality-08
lola: result : false

lola: FINISHED task # 80 (type SKEL/FNDP) for BridgeAndVehicles-COL-V04P05N02-ReachabilityCardinality-04
lola: result : unknown
lola: fired transitions : 2133
lola: tried executions : 2
lola: time used : 0.000000
lola: memory pages used : 0
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: @ trans enregistrement_A
lola: rewrite Frontend/Parser/formula_rewrite.k:711
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-81.sara.

lola: FINISHED task # 95 (type SKEL/EQUN) for BridgeAndVehicles-COL-V04P05N02-ReachabilityCardinality-05
lola: result : true
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-137.sara.
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-141.sara.


lola: @ trans decision
lola: FINISHED task # 137 (type SKEL/EQUN) for BridgeAndVehicles-COL-V04P05N02-ReachabilityCardinality-12
lola: result : true
lola: CANCELED task # 126 (type FNDP) for BridgeAndVehicles-COL-V04P05N02-ReachabilityCardinality-12 (obsolete)
lola: LAUNCH task # 127 (type SKEL/FNDP) for 39 BridgeAndVehicles-COL-V04P05N02-ReachabilityCardinality-13
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 133 (type SKEL/EQUN) for 39 BridgeAndVehicles-COL-V04P05N02-ReachabilityCardinality-13
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: @ trans altern_cpt
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: @ trans autorisation_A
lola: FINISHED task # 81 (type SKEL/EQUN) for BridgeAndVehicles-COL-V04P05N02-ReachabilityCardinality-04
lola: result : false
lola: FINISHED task # 126 (type SKEL/FNDP) for BridgeAndVehicles-COL-V04P05N02-ReachabilityCardinality-12
lola: result : unknown
lola: fired transitions : 1137
lola: tried executions : 39
lola: time used : 0.000000
lola: memory pages used : 0
lola: @ trans liberation_A
lola: @ trans enregistrement_B
lola: @ trans timeout_A
lola: @ trans timeout_B
lola: FINISHED task # 141 (type SKEL/EQUN) for BridgeAndVehicles-COL-V04P05N02-ReachabilityCardinality-15
lola: result : false
lola: CANCELED task # 111 (type FNDP) for BridgeAndVehicles-COL-V04P05N02-ReachabilityCardinality-15 (obsolete)
lola: LAUNCH task # 93 (type SKEL/FNDP) for 0 BridgeAndVehicles-COL-V04P05N02-ReachabilityCardinality-00
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 103 (type SKEL/EQUN) for 0 BridgeAndVehicles-COL-V04P05N02-ReachabilityCardinality-00
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: @ trans liberation_B
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-133.sara.
sara: place or transition ordering is non-deterministic

lola: FINISHED task # 111 (type SKEL/FNDP) for BridgeAndVehicles-COL-V04P05N02-ReachabilityCardinality-15
lola: result : unknown
lola: fired transitions : 29802
lola: tried executions : 985
lola: time used : 0.000000
lola: memory pages used : 0
lola: @ trans basculement
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: @ trans autorisation_B
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-103.sara.

lola: rewrite Frontend/Parser/formula_rewrite.k:98
lola: rewrite Frontend/Parser/formula_rewrite.k:159
lola: rewrite Frontend/Parser/formula_rewrite.k:150
lola: rewrite Frontend/Parser/formula_rewrite.k:98
lola: rewrite Frontend/Parser/formula_rewrite.k:159
lola: rewrite Frontend/Parser/formula_rewrite.k:150
lola: rewrite Frontend/Parser/formula_rewrite.k:96
lola: rewrite Frontend/Parser/formula_rewrite.k:156
lola: rewrite Frontend/Parser/formula_rewrite.k:147
lola: FINISHED task # 133 (type SKEL/EQUN) for BridgeAndVehicles-COL-V04P05N02-ReachabilityCardinality-13
lola: result : false
lola: CANCELED task # 127 (type FNDP) for BridgeAndVehicles-COL-V04P05N02-ReachabilityCardinality-13 (obsolete)
lola: LAUNCH task # 53 (type SKEL/FNDP) for 6 BridgeAndVehicles-COL-V04P05N02-ReachabilityCardinality-02
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 57 (type SKEL/EQUN) for 6 BridgeAndVehicles-COL-V04P05N02-ReachabilityCardinality-02
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 127 (type SKEL/FNDP) for BridgeAndVehicles-COL-V04P05N02-ReachabilityCardinality-13
lola: result : unknown
lola: fired transitions : 40447
lola: tried executions : 2689
lola: time used : 0.000000
lola: memory pages used : 0
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: Rule S: 0 transitions removed,0 places removed
lola: sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-57.sara.planning for BridgeAndVehicles-COL-V04P05N02-ReachabilityCardinality-08 stopped (result already fixed).

sara: place or transition ordering is non-deterministic

lola: planning for BridgeAndVehicles-COL-V04P05N02-ReachabilityCardinality-04 stopped (result already fixed).
lola: planning for BridgeAndVehicles-COL-V04P05N02-ReachabilityCardinality-15 stopped (result already fixed).
lola: planning for BridgeAndVehicles-COL-V04P05N02-ReachabilityCardinality-06 stopped (result already fixed).
lola: FINISHED task # 103 (type SKEL/EQUN) for BridgeAndVehicles-COL-V04P05N02-ReachabilityCardinality-00
lola: result : false
lola: LAUNCH INITIAL
lola: planning for BridgeAndVehicles-COL-V04P05N02-ReachabilityCardinality-13 stopped (result already fixed).
lola: LAUNCH task # 4 (type CNST) for 3 BridgeAndVehicles-COL-V04P05N02-ReachabilityCardinality-01
lola: time limit : 0 sec
lola: memory limit: 0 pages
lola: LAUNCH INITIAL
lola: LAUNCH task # 28 (type CNST) for 27 BridgeAndVehicles-COL-V04P05N02-ReachabilityCardinality-09
lola: time limit : 0 sec
lola: memory limit: 0 pages
lola: CANCELED task # 93 (type FNDP) for BridgeAndVehicles-COL-V04P05N02-ReachabilityCardinality-00 (obsolete)
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: FINISHED task # 93 (type SKEL/FNDP) for BridgeAndVehicles-COL-V04P05N02-ReachabilityCardinality-00
lola: result : unknown
lola: fired transitions : 67180
lola: tried executions : 2
lola: time used : 0.000000
lola: memory pages used : 0
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: FINISHED task # 4 (type CNST) for BridgeAndVehicles-COL-V04P05N02-ReachabilityCardinality-01
lola: result : true
lola: FINISHED task # 28 (type CNST) for BridgeAndVehicles-COL-V04P05N02-ReachabilityCardinality-09
lola: result : false
lola: LAUNCH task # 163 (type EXCL) for 30 BridgeAndVehicles-COL-V04P05N02-ReachabilityCardinality-10
lola: time limit : 1200 sec
lola: memory limit: 32 pages
lola: LAUNCH task # 116 (type SKEL/FNDP) for 30 BridgeAndVehicles-COL-V04P05N02-ReachabilityCardinality-10
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: FINISHED task # 163 (type EXCL) for BridgeAndVehicles-COL-V04P05N02-ReachabilityCardinality-10
lola: result : false
lola: markings : 1514
lola: fired transitions : 1852
lola: time used : 0.000000
lola: memory pages used : 1
lola: CANCELED task # 116 (type FNDP) for BridgeAndVehicles-COL-V04P05N02-ReachabilityCardinality-10 (obsolete)
lola: LAUNCH task # 196 (type EXCL) for 42 BridgeAndVehicles-COL-V04P05N02-ReachabilityCardinality-14
lola: time limit : 720 sec
lola: memory limit: 32 pages
lola: LAUNCH task # 91 (type SKEL/FNDP) for 33 BridgeAndVehicles-COL-V04P05N02-ReachabilityCardinality-11
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 116 (type SKEL/FNDP) for BridgeAndVehicles-COL-V04P05N02-ReachabilityCardinality-10
lola: result : unknown
lola: fired transitions : 9117
lola: tried executions : 2
lola: time used : 0.000000
lola: memory pages used : 0
lola: FINISHED task # 57 (type SKEL/EQUN) for BridgeAndVehicles-COL-V04P05N02-ReachabilityCardinality-02
lola: result : false
lola: CANCELED task # 53 (type FNDP) for BridgeAndVehicles-COL-V04P05N02-ReachabilityCardinality-02 (obsolete)
lola: LAUNCH task # 175 (type FNDP) for 36 BridgeAndVehicles-COL-V04P05N02-ReachabilityCardinality-12
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 181 (type EQUN) for 36 BridgeAndVehicles-COL-V04P05N02-ReachabilityCardinality-12
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 53 (type SKEL/FNDP) for BridgeAndVehicles-COL-V04P05N02-ReachabilityCardinality-02
lola: result : unknown
lola: fired transitions : 104011
lola: tried executions : 2
lola: time used : 0.000000
lola: memory pages used : 0
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: FINISHED task # 196 (type EXCL) for BridgeAndVehicles-COL-V04P05N02-ReachabilityCardinality-14
lola: result : false
lola: markings : 1416
lola: fired transitions : 1754
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 179 (type EXCL) for 33 BridgeAndVehicles-COL-V04P05N02-ReachabilityCardinality-11
lola: time limit : 1200 sec
lola: memory limit: 32 pages
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-181.sara.
sara: place or transition ordering is non-deterministic
lola: FINISHED task # 179 (type EXCL) for BridgeAndVehicles-COL-V04P05N02-ReachabilityCardinality-11
lola: result : false
lola: markings : 1514
lola: fired transitions : 1852
lola: time used : 0.000000
lola: memory pages used : 1
lola: CANCELED task # 91 (type FNDP) for BridgeAndVehicles-COL-V04P05N02-ReachabilityCardinality-11 (obsolete)
lola: LAUNCH task # 191 (type EXCL) for 15 BridgeAndVehicles-COL-V04P05N02-ReachabilityCardinality-05
lola: time limit : 1800 sec
lola: memory limit: 32 pages
lola: LAUNCH task # 172 (type FNDP) for 15 BridgeAndVehicles-COL-V04P05N02-ReachabilityCardinality-05
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 91 (type SKEL/FNDP) for BridgeAndVehicles-COL-V04P05N02-ReachabilityCardinality-11
lola: result : unknown
lola: fired transitions : 109661
lola: tried executions : 2
lola: time used : 0.000000
lola: memory pages used : 0
lola: FINISHED task # 191 (type EXCL) for BridgeAndVehicles-COL-V04P05N02-ReachabilityCardinality-05
lola: result : false
lola: markings : 1429
lola: fired transitions : 1767
lola: time used : 0.000000
lola: memory pages used : 1
lola: CANCELED task # 172 (type FNDP) for BridgeAndVehicles-COL-V04P05N02-ReachabilityCardinality-05 (obsolete)
lola: LAUNCH task # 192 (type EXCL) for 36 BridgeAndVehicles-COL-V04P05N02-ReachabilityCardinality-12
lola: time limit : 3600 sec
lola: memory limit: 32 pages
lola: LAUNCH task # 190 (type SRCH) for 36 BridgeAndVehicles-COL-V04P05N02-ReachabilityCardinality-12
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 172 (type FNDP) for BridgeAndVehicles-COL-V04P05N02-ReachabilityCardinality-05
lola: result : unknown
lola: fired transitions : 5221
lola: tried executions : 119
lola: time used : 0.000000
lola: memory pages used : 0
sara: warning, failure of lp_solve (at job 42)
lola: FINISHED task # 190 (type SRCH) for BridgeAndVehicles-COL-V04P05N02-ReachabilityCardinality-12
lola: result : false
lola: markings : 2274
lola: fired transitions : 5076
lola: time used : 0.000000
lola: memory pages used : 1
lola: CANCELED task # 175 (type FNDP) for BridgeAndVehicles-COL-V04P05N02-ReachabilityCardinality-12 (obsolete)
lola: CANCELED task # 181 (type EQUN) for BridgeAndVehicles-COL-V04P05N02-ReachabilityCardinality-12 (obsolete)
lola: CANCELED task # 192 (type EXCL) for BridgeAndVehicles-COL-V04P05N02-ReachabilityCardinality-12 (obsolete)
lola: Portfolio finished: no open formulas

FINAL RESULTS
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
BridgeAndVehicles-COL-V04P05N02-ReachabilityCardinality-00: EF false skeleton: state equation
BridgeAndVehicles-COL-V04P05N02-ReachabilityCardinality-01: AG true preprocessing
BridgeAndVehicles-COL-V04P05N02-ReachabilityCardinality-02: EF false skeleton: state equation
BridgeAndVehicles-COL-V04P05N02-ReachabilityCardinality-03: INITIAL true skeleton: preprocessing
BridgeAndVehicles-COL-V04P05N02-ReachabilityCardinality-04: EF false skeleton: tandem / insertion
BridgeAndVehicles-COL-V04P05N02-ReachabilityCardinality-05: EF false tandem / relaxed
BridgeAndVehicles-COL-V04P05N02-ReachabilityCardinality-06: EF false skeleton: tandem / insertion
BridgeAndVehicles-COL-V04P05N02-ReachabilityCardinality-07: AG true skeleton: tandem / insertion
BridgeAndVehicles-COL-V04P05N02-ReachabilityCardinality-08: EF false skeleton: tandem / insertion
BridgeAndVehicles-COL-V04P05N02-ReachabilityCardinality-09: EF false preprocessing
BridgeAndVehicles-COL-V04P05N02-ReachabilityCardinality-10: EF false tandem / relaxed
BridgeAndVehicles-COL-V04P05N02-ReachabilityCardinality-11: EF false tandem / relaxed
BridgeAndVehicles-COL-V04P05N02-ReachabilityCardinality-12: EF false tandem / insertion
BridgeAndVehicles-COL-V04P05N02-ReachabilityCardinality-13: AG true skeleton: state equation
BridgeAndVehicles-COL-V04P05N02-ReachabilityCardinality-14: AG true tandem / relaxed
BridgeAndVehicles-COL-V04P05N02-ReachabilityCardinality-15: AG true skeleton: state equation


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Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="BridgeAndVehicles-COL-V04P05N02"
export BK_EXAMINATION="ReachabilityCardinality"
export BK_TOOL="lola"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-4028"
echo " Executing tool lola"
echo " Input is BridgeAndVehicles-COL-V04P05N02, examination is ReachabilityCardinality"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r023-tajo-162038139000006"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/BridgeAndVehicles-COL-V04P05N02.tgz
mv BridgeAndVehicles-COL-V04P05N02 execution
cd execution
if [ "ReachabilityCardinality" = "ReachabilityDeadlock" ] || [ "ReachabilityCardinality" = "UpperBounds" ] || [ "ReachabilityCardinality" = "QuasiLiveness" ] || [ "ReachabilityCardinality" = "StableMarking" ] || [ "ReachabilityCardinality" = "Liveness" ] || [ "ReachabilityCardinality" = "OneSafe" ] || [ "ReachabilityCardinality" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "ReachabilityCardinality" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "ReachabilityCardinality" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "ReachabilityCardinality.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property ReachabilityCardinality.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "ReachabilityCardinality.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' ReachabilityCardinality.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ "ReachabilityCardinality" = "ReachabilityDeadlock" ] || [ "ReachabilityCardinality" = "QuasiLiveness" ] || [ "ReachabilityCardinality" = "StableMarking" ] || [ "ReachabilityCardinality" = "Liveness" ] || [ "ReachabilityCardinality" = "OneSafe" ] ; then
echo "FORMULA_NAME ReachabilityCardinality"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;