Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/data/fkordon/mcc2021-input.r007-tall-162037989700234.qcow2', fmt=qcow2 size=4294967296 backing_file='/data/fkordon/mcc2021-input.qcow2' encryption=off cluster_size=65536 lazy_refcounts=off
Waiting for the VM to be ready (probing ssh)
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=====================================================================
Generated by BenchKit 2-4028
Executing tool itstools
Input is AirplaneLD-COL-4000, examination is LTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r007-tall-162037989700234
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 1004K
-rw-r--r-- 1 mcc users 18K May 5 16:58 CTLCardinality.txt
-rw-r--r-- 1 mcc users 124K May 5 16:58 CTLCardinality.xml
-rw-r--r-- 1 mcc users 11K May 5 16:58 CTLFireability.txt
-rw-r--r-- 1 mcc users 92K May 5 16:58 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K May 6 14:48 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.5K May 6 14:48 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 3.6K Mar 28 15:43 LTLCardinality.txt
-rw-r--r-- 1 mcc users 25K Mar 28 15:43 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.1K Mar 28 15:43 LTLFireability.txt
-rw-r--r-- 1 mcc users 17K Mar 28 15:43 LTLFireability.xml
-rw-r--r-- 1 mcc users 3.9K Mar 23 01:45 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 19K Mar 23 01:41 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 2.7K Mar 22 10:14 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 15K Mar 22 10:10 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.7K Mar 22 09:09 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.8K Mar 22 09:09 UpperBounds.xml
-rw-r--r-- 1 mcc users 5 May 5 16:51 equiv_pt
-rw-r--r-- 1 mcc users 5 May 5 16:51 instance
-rw-r--r-- 1 mcc users 5 May 5 16:51 iscolored
-rw-r--r-- 1 mcc users 620K May 5 16:51 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME AirplaneLD-COL-4000-00
FORMULA_NAME AirplaneLD-COL-4000-01
FORMULA_NAME AirplaneLD-COL-4000-02
FORMULA_NAME AirplaneLD-COL-4000-03
FORMULA_NAME AirplaneLD-COL-4000-04
FORMULA_NAME AirplaneLD-COL-4000-05
FORMULA_NAME AirplaneLD-COL-4000-06
FORMULA_NAME AirplaneLD-COL-4000-07
FORMULA_NAME AirplaneLD-COL-4000-08
FORMULA_NAME AirplaneLD-COL-4000-09
FORMULA_NAME AirplaneLD-COL-4000-10
FORMULA_NAME AirplaneLD-COL-4000-11
FORMULA_NAME AirplaneLD-COL-4000-12
FORMULA_NAME AirplaneLD-COL-4000-13
FORMULA_NAME AirplaneLD-COL-4000-14
FORMULA_NAME AirplaneLD-COL-4000-15

=== Now, execution of the tool begins

BK_START 1620453136104

Running Version 0
[2021-05-08 05:52:17] [INFO ] Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, LTLFireability, -spotpath, /home/mcc/BenchKit/bin//..//ltlfilt, -z3path, /home/mcc/BenchKit/bin//..//z3/bin/z3, -yices2path, /home/mcc/BenchKit/bin//..//yices/bin/yices, -its, -ltsmin, -greatspnpath, /home/mcc/BenchKit/bin//..//greatspn/, -order, META, -manyOrder, -smt, -timeout, 3600]
[2021-05-08 05:52:17] [INFO ] Parsing pnml file : /home/mcc/execution/model.pnml
[2021-05-08 05:52:18] [INFO ] Detected file is not PT type :http://www.pnml.org/version-2009/grammar/symmetricnet
log4j:WARN No appenders could be found for logger (org.apache.axiom.locator.DefaultOMMetaFactoryLocator).
log4j:WARN Please initialize the log4j system properly.
[2021-05-08 05:52:18] [WARNING] Using fallBack plugin, rng conformance not checked
[2021-05-08 05:52:18] [INFO ] Load time of PNML (colored model parsed with PNMLFW) : 766 ms
[2021-05-08 05:52:18] [INFO ] Detected 3 constant HL places corresponding to 12002 PT places.
[2021-05-08 05:52:18] [INFO ] Imported 20 HL places and 15 HL transitions for a total of 28019 PT places and 48012.0 transition bindings in 19 ms.
Parsed 16 properties from file /home/mcc/execution/LTLFireability.xml in 11 ms.
Working with output stream class java.io.PrintStream
[2021-05-08 05:52:18] [INFO ] Built PT skeleton of HLPN with 20 places and 15 transitions in 5 ms.
[2021-05-08 05:52:18] [INFO ] Skeletonized HLPN properties in 1 ms.
Successfully produced net in file /tmp/petri1000_15297782312434110177.dot
Reduce places removed 3 places and 0 transitions.
Ensure Unique test removed 1 transitions
Reduce redundant transitions removed 1 transitions.
Finished random walk after 0 steps, including 0 resets, run visited all 0 properties in 1 ms. (steps per millisecond=0 )
[2021-05-08 05:52:18] [INFO ] Flatten gal took : 19 ms
[2021-05-08 05:52:18] [INFO ] Flatten gal took : 3 ms
[2021-05-08 05:52:19] [INFO ] Unfolded HLPN to a Petri net with 28019 places and 32008 transitions in 141 ms.
[2021-05-08 05:52:19] [INFO ] Unfolded HLPN properties in 13 ms.
Successfully produced net in file /tmp/petri1001_2141097762095306814.dot
[2021-05-08 05:52:19] [INFO ] Reduced 3999 identical enabling conditions.
[2021-05-08 05:52:19] [INFO ] Reduced 3999 identical enabling conditions.
[2021-05-08 05:52:19] [INFO ] Reduced 3999 identical enabling conditions.
[2021-05-08 05:52:19] [INFO ] Reduced 3999 identical enabling conditions.
[2021-05-08 05:52:19] [INFO ] Reduced 1 identical enabling conditions.
[2021-05-08 05:52:19] [INFO ] Reduced 1 identical enabling conditions.
[2021-05-08 05:52:19] [INFO ] Reduced 7999 identical enabling conditions.
[2021-05-08 05:52:19] [INFO ] Reduced 1 identical enabling conditions.
[2021-05-08 05:52:19] [INFO ] Reduced 1 identical enabling conditions.
[2021-05-08 05:52:19] [INFO ] Reduced 1 identical enabling conditions.
[2021-05-08 05:52:19] [INFO ] Reduced 7999 identical enabling conditions.
[2021-05-08 05:52:19] [INFO ] Reduced 3999 identical enabling conditions.
[2021-05-08 05:52:19] [INFO ] Reduced 3999 identical enabling conditions.
[2021-05-08 05:52:19] [INFO ] Reduced 3999 identical enabling conditions.
[2021-05-08 05:52:19] [INFO ] Reduced 1 identical enabling conditions.
[2021-05-08 05:52:19] [INFO ] Reduced 3999 identical enabling conditions.
[2021-05-08 05:52:19] [INFO ] Reduced 3999 identical enabling conditions.
[2021-05-08 05:52:19] [INFO ] Reduced 1 identical enabling conditions.
[2021-05-08 05:52:19] [INFO ] Reduced 1 identical enabling conditions.
[2021-05-08 05:52:19] [INFO ] Reduced 3999 identical enabling conditions.
[2021-05-08 05:52:19] [INFO ] Initial state test concluded for 2 properties.
Reduce places removed 12002 places and 0 transitions.
FORMULA AirplaneLD-COL-4000-00 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
Support contains 12015 out of 16017 places. Attempting structural reductions.
Starting structural reductions, iteration 0 : 16017/16017 places, 32008/32008 transitions.
Reduce places removed 3 places and 0 transitions.
Iterating post reduction 0 with 3 rules applied. Total rules applied 3 place count 16014 transition count 32008
Discarding 3998 places :
Symmetric choice reduction at 1 with 3998 rule applications. Total rules 4001 place count 12016 transition count 28010
Iterating global reduction 1 with 3998 rules applied. Total rules applied 7999 place count 12016 transition count 28010
Ensure Unique test removed 3998 transitions
Reduce isomorphic transitions removed 3998 transitions.
Iterating post reduction 1 with 3998 rules applied. Total rules applied 11997 place count 12016 transition count 24012
Applied a total of 11997 rules in 1017 ms. Remains 12016 /16017 variables (removed 4001) and now considering 24012/32008 (removed 7996) transitions.
// Phase 1: matrix 24012 rows 12016 cols
[2021-05-08 05:52:30] [INFO ] Computed 1 place invariants in 9718 ms
[2021-05-08 05:52:32] [INFO ] SMT solver returned unknown. Retrying;
[2021-05-08 05:52:32] [INFO ] Implicit Places using invariants in 11216 ms returned []
Implicit Place search using SMT only with invariants took 11239 ms to find 0 implicit places.
// Phase 1: matrix 24012 rows 12016 cols
[2021-05-08 05:52:41] [INFO ] Computed 1 place invariants in 9568 ms
[2021-05-08 05:52:43] [INFO ] SMT solver returned unknown. Retrying;
[2021-05-08 05:52:43] [INFO ] Dead Transitions using invariants and state equation in 10777 ms returned []
Finished structural reductions, in 1 iterations. Remains : 12016/16017 places, 24012/32008 transitions.
[2021-05-08 05:52:44] [INFO ] Initial state reduction rules for LTL removed 1 formulas.
[2021-05-08 05:52:44] [INFO ] Flatten gal took : 1156 ms
FORMULA AirplaneLD-COL-4000-08 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
[2021-05-08 05:52:49] [INFO ] Flatten gal took : 1061 ms
[2021-05-08 05:52:53] [INFO ] Input system was already deterministic with 24012 transitions.
Interrupted random walk after 19057 steps, including 2345 resets, run timeout after 30001 ms. (steps per millisecond=0 ) properties seen :{0=1, 1=1, 2=1, 3=1, 4=1, 5=1, 6=1, 7=1, 8=1, 9=1, 10=1, 11=1, 12=1, 13=1, 15=1, 17=1, 18=1, 19=1, 20=1}
Running SMT prover for 2 properties.
// Phase 1: matrix 24012 rows 12016 cols
[2021-05-08 05:53:33] [INFO ] Computed 1 place invariants in 9594 ms
[2021-05-08 05:53:35] [INFO ] [Real]Absence check using 0 positive and 1 generalized place invariants in 4 ms returned sat
[2021-05-08 05:53:35] [INFO ] [Real]Adding state equation constraints to refine reachable states.
[2021-05-08 05:53:58] [INFO ] [Real]Absence check using state equation in 22659 ms returned unsat :0 sat :1 real:1
Attempting to minimize the solution found.
Minimization took 667 ms.
[2021-05-08 05:53:58] [INFO ] SMT Verify possible in real domain returnedunsat :0 sat :1 real:1
[2021-05-08 05:54:00] [INFO ] [Nat]Absence check using 0 positive and 1 generalized place invariants in 3 ms returned sat
[2021-05-08 05:54:01] [INFO ] [Nat]Adding state equation constraints to refine reachable states.
[2021-05-08 05:54:24] [INFO ] [Nat]Absence check using state equation in 23302 ms returned unsat :1 sat :1
Attempting to minimize the solution found.
Minimization took 677 ms.
[2021-05-08 05:54:25] [INFO ] SMT Verify possible in nat domain returned unsat :1 sat :1
Successfully simplified 1 atomic propositions for a total of 14 simplifications.
FORMULA AirplaneLD-COL-4000-12 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
Running Spot : CommandLine [args=[/home/mcc/BenchKit/bin//..//ltl2tgba, --hoaf=tv, -f, !((X(F(p0))||G(p1)))], workingDir=/home/mcc/execution]
Support contains 3 out of 12016 places. Attempting structural reductions.
Starting structural reductions, iteration 0 : 12016/12016 places, 24012/24012 transitions.
Applied a total of 0 rules in 42 ms. Remains 12016 /12016 variables (removed 0) and now considering 24012/24012 (removed 0) transitions.
// Phase 1: matrix 24012 rows 12016 cols
[2021-05-08 05:54:35] [INFO ] Computed 1 place invariants in 9774 ms
[2021-05-08 05:54:36] [INFO ] SMT solver returned unknown. Retrying;
[2021-05-08 05:54:36] [INFO ] Implicit Places using invariants in 11032 ms returned []
Implicit Place search using SMT only with invariants took 11033 ms to find 0 implicit places.
// Phase 1: matrix 24012 rows 12016 cols
[2021-05-08 05:54:45] [INFO ] Computed 1 place invariants in 9376 ms
[2021-05-08 05:54:47] [INFO ] SMT solver returned unknown. Retrying;
[2021-05-08 05:54:47] [INFO ] Dead Transitions using invariants and state equation in 10733 ms returned []
Finished structural reductions, in 1 iterations. Remains : 12016/12016 places, 24012/24012 transitions.
Stuttering acceptance computed with spot in 194 ms :[(NOT p0), (AND (NOT p0) (NOT p1)), (AND (NOT p0) (NOT p1))]
Running random walk in product with property : AirplaneLD-COL-4000-01 automaton TGBA [mat=[[{ cond=(NOT p0), acceptance={0} source=0 dest: 0}], [{ cond=(NOT p1), acceptance={} source=1 dest: 0}, { cond=p1, acceptance={} source=1 dest: 2}], [{ cond=(AND (NOT p1) (NOT p0)), acceptance={} source=2 dest: 0}, { cond=(AND p1 (NOT p0)), acceptance={} source=2 dest: 2}]], initial=1, aps=[p0:(GEQ s0 1), p1:(OR (LT s9 1) (LT s13 1))], nbAcceptance=1, properties=[trans-labels, explicit-labels, trans-acc, deterministic, no-univ-branch, unambiguous, semi-deterministic, very-weak, weak, inherently-weak], stateDesc=[null, null, null][false, false, false]]
Stuttering criterion allowed to conclude after 9 steps with 1 reset in 23 ms.
FORMULA AirplaneLD-COL-4000-01 FALSE TECHNIQUES STUTTER_TEST
Treatment of property AirplaneLD-COL-4000-01 finished in 22147 ms.
Running Spot : CommandLine [args=[/home/mcc/BenchKit/bin//..//ltl2tgba, --hoaf=tv, -f, !((G(p0)||F(p1)||G(F(p2))))], workingDir=/home/mcc/execution]
Support contains 6005 out of 12016 places. Attempting structural reductions.
Starting structural reductions, iteration 0 : 12016/12016 places, 24012/24012 transitions.
Discarding 5996 places :
Symmetric choice reduction at 0 with 5996 rule applications. Total rules 5996 place count 6020 transition count 18016
Iterating global reduction 0 with 5996 rules applied. Total rules applied 11992 place count 6020 transition count 18016
Ensure Unique test removed 5996 transitions
Reduce isomorphic transitions removed 5996 transitions.
Iterating post reduction 0 with 5996 rules applied. Total rules applied 17988 place count 6020 transition count 12020
Applied a total of 17988 rules in 524 ms. Remains 6020 /12016 variables (removed 5996) and now considering 12020/24012 (removed 11992) transitions.
// Phase 1: matrix 12020 rows 6020 cols
[2021-05-08 05:54:49] [INFO ] Computed 1 place invariants in 1961 ms
[2021-05-08 05:54:50] [INFO ] SMT solver returned unknown. Retrying;
[2021-05-08 05:54:50] [INFO ] Implicit Places using invariants in 2628 ms returned [9]
Discarding 1 places :
Implicit Place search using SMT only with invariants took 2640 ms to find 1 implicit places.
// Phase 1: matrix 12020 rows 6019 cols
[2021-05-08 05:54:52] [INFO ] Computed 0 place invariants in 1985 ms
[2021-05-08 05:54:59] [INFO ] Dead Transitions using invariants and state equation in 9201 ms returned []
Starting structural reductions, iteration 1 : 6019/12016 places, 12020/24012 transitions.
Drop transitions removed 2 transitions
Trivial Post-agglo rules discarded 2 transitions
Performed 2 trivial Post agglomeration. Transition count delta: 2
Iterating post reduction 0 with 2 rules applied. Total rules applied 2 place count 6019 transition count 12018
Reduce places removed 2 places and 0 transitions.
Iterating post reduction 1 with 2 rules applied. Total rules applied 4 place count 6017 transition count 12018
Applied a total of 4 rules in 123 ms. Remains 6017 /6019 variables (removed 2) and now considering 12018/12020 (removed 2) transitions.
// Phase 1: matrix 12018 rows 6017 cols
[2021-05-08 05:55:01] [INFO ] Computed 0 place invariants in 1999 ms
[2021-05-08 05:55:02] [INFO ] Implicit Places using invariants in 2456 ms returned []
Implicit Place search using SMT only with invariants took 2465 ms to find 0 implicit places.
Finished structural reductions, in 2 iterations. Remains : 6017/12016 places, 12018/24012 transitions.
Stuttering acceptance computed with spot in 112 ms :[(AND (NOT p0) (NOT p1) (NOT p2)), (AND (NOT p1) (NOT p2)), (AND (NOT p1) (NOT p2))]
Running random walk in product with property : AirplaneLD-COL-4000-02 automaton TGBA [mat=[[{ cond=(AND p0 (NOT p1)), acceptance={} source=0 dest: 0}, { cond=(AND (NOT p0) (NOT p1)), acceptance={} source=0 dest: 1}, { cond=(AND (NOT p0) (NOT p1) (NOT p2)), acceptance={} source=0 dest: 2}], [{ cond=(NOT p1), acceptance={} source=1 dest: 1}, { cond=(AND (NOT p1) (NOT p2)), acceptance={} source=1 dest: 2}], [{ cond=(AND (NOT p1) (NOT p2)), acceptance={0} source=2 dest: 2}]], initial=0, aps=[p0:(GEQ s0 1), p1:(AND (OR (AND (GEQ s5 1) (GEQ s5095 1)) (AND (GEQ s5 1) (GEQ s5615 1)) (AND (GEQ s5 1) (GEQ s4055 1)) (AND (GEQ s5 1) (GEQ s4575 1)) (AND (GEQ s5 1) (GEQ s5355 1)) (AND (GEQ s5 1) (GEQ s4315 1)) (AND (GEQ s5 1) (GEQ s4916 1)) (AND (GEQ s5 1) (GEQ s5956 1)) (AND (GEQ s5 1) (GEQ s5794 1)) (AND (GEQ s5 1) (GEQ s4136 1)) (AND (GEQ s5 1) (GEQ s4656 1)) (AND (GEQ s5 1) (GEQ s5274 1)) (AND (GEQ s5 1) (GEQ s5534 1)) (AND (GEQ s5 1) (GEQ s4835 1)) (AND (GEQ s5 1) (GEQ s4396 1)) (AND (GEQ s5 1) (GEQ s5777 1)) (AND (GEQ s5 1) (GEQ s4038 1)) (AND (GEQ s5 1) (GEQ s4217 1)) (AND (GEQ s5 1) (GEQ s4477 1)) (AND (GEQ s5 1) (GEQ s4818 1)) (AND (GEQ s5 1) (GEQ s5078 1)) (AND (GEQ s5 1) (GEQ s5257 1)) (AND (GEQ s5 1) (GEQ s5517 1)) (AND (GEQ s5 1) (GEQ s5176 1)) (AND (GEQ s5 1) (GEQ s5696 1)) (AND (GEQ s5 1) (GEQ s4298 1)) (AND (GEQ s5 1) (GEQ s4558 1)) (AND (GEQ s5 1) (GEQ s4737 1)) (AND (GEQ s5 1) (GEQ s4997 1)) (AND (GEQ s5 1) (GEQ s5875 1)) (AND (GEQ s5 1) (GEQ s5436 1)) (AND (GEQ s5 1) (GEQ s5159 1)) (AND (GEQ s5 1) (GEQ s5679 1)) (AND (GEQ s5 1) (GEQ s4119 1)) (AND (GEQ s5 1) (GEQ s4639 1)) (AND (GEQ s5 1) (GEQ s4720 1)) (AND (GEQ s5 1) (GEQ s4980 1)) (AND (GEQ s5 1) (GEQ s5419 1)) (AND (GEQ s5 1) (GEQ s4379 1)) (AND (GEQ s5 1) (GEQ s4200 1)) (AND (GEQ s5 1) (GEQ s4460 1)) (AND (GEQ s5 1) (GEQ s5338 1)) (AND (GEQ s5 1) (GEQ s5598 1)) (AND (GEQ s5 1) (GEQ s5841 1)) (AND (GEQ s5 1) (GEQ s4021 1)) (AND (GEQ s5 1) (GEQ s4899 1)) (AND (GEQ s5 1) (GEQ s4102 1)) (AND (GEQ s5 1) (GEQ s4882 1)) (AND (GEQ s5 1) (GEQ s5142 1)) (AND (GEQ s5 1) (GEQ s5581 1)) (AND (GEQ s5 1) (GEQ s4281 1)) (AND (GEQ s5 1) (GEQ s4541 1)) (AND (GEQ s5 1) (GEQ s5321 1)) (AND (GEQ s5 1) (GEQ s5858 1)) (AND (GEQ s5 1) (GEQ s5240 1)) (AND (GEQ s5 1) (GEQ s5760 1)) (AND (GEQ s5 1) (GEQ s4362 1)) (AND (GEQ s5 1) (GEQ s4622 1)) (AND (GEQ s5 1) (GEQ s4801 1)) (AND (GEQ s5 1) (GEQ s5061 1)) (AND (GEQ s5 1) (GEQ s5500 1)) (AND (GEQ s5 1) (GEQ s5939 1)) (AND (GEQ s5 1) (GEQ s4703 1)) (AND (GEQ s5 1) (GEQ s5223 1)) (AND (GEQ s5 1) (GEQ s5743 1)) (AND (GEQ s5 1) (GEQ s4183 1)) (AND (GEQ s5 1) (GEQ s4443 1)) (AND (GEQ s5 1) (GEQ s4784 1)) (AND (GEQ s5 1) (GEQ s5044 1)) (AND (GEQ s5 1) (GEQ s5824 1)) (AND (GEQ s5 1) (GEQ s5483 1)) (AND (GEQ s5 1) (GEQ s4085 1)) (AND (GEQ s5 1) (GEQ s4264 1)) (AND (GEQ s5 1) (GEQ s4524 1)) (AND (GEQ s5 1) (GEQ s5402 1)) (AND (GEQ s5 1) (GEQ s5662 1)) (AND (GEQ s5 1) (GEQ s5905 1)) (AND (GEQ s5 1) (GEQ s4963 1)) (AND (GEQ s5 1) (GEQ s4166 1)) (AND (GEQ s5 1) (GEQ s4605 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(GEQ s5 1) (GEQ s5449 1)) (AND (GEQ s5 1) (GEQ s5709 1)) (AND (GEQ s5 1) (GEQ s4409 1)) (AND (GEQ s5 1) (GEQ s4669 1)) (AND (GEQ s5 1) (GEQ s5986 1)) (AND (GEQ s5 1) (GEQ s5010 1)) (AND (GEQ s5 1) (GEQ s5368 1)) (AND (GEQ s5 1) (GEQ s5628 1)) (AND (GEQ s5 1) (GEQ s5807 1)) (AND (GEQ s5 1) (GEQ s4929 1)) (AND (GEQ s5 1) (GEQ s5189 1)) (AND (GEQ s5 1) (GEQ s4051 1)) (AND (GEQ s5 1) (GEQ s4490 1)) (AND (GEQ s5 1) (GEQ s5351 1)) (AND (GEQ s5 1) (GEQ s5611 1)) (AND (GEQ s5 1) (GEQ s4132 1)) (AND (GEQ s5 1) (GEQ s4311 1)) (AND (GEQ s5 1) (GEQ s4571 1)) (AND (GEQ s5 1) (GEQ s4912 1)) (AND (GEQ s5 1) (GEQ s5172 1)) (AND (GEQ s5 1) (GEQ s5952 1)) (AND (GEQ s5 1) (GEQ s4213 1)) (AND (GEQ s5 1) (GEQ s5790 1)) (AND (GEQ s5 1) (GEQ s4831 1)) (AND (GEQ s5 1) (GEQ s5091 1)) (AND (GEQ s5 1) (GEQ s4392 1)) (AND (GEQ s5 1) (GEQ s4652 1)) (AND (GEQ s5 1) (GEQ s5530 1)) (AND (GEQ s5 1) (GEQ s4294 1)) (AND (GEQ s5 1) (GEQ s4814 1)) (AND (GEQ s5 1) (GEQ s5334 1)) (AND (GEQ s5 1) (GEQ s5513 1)) (AND (GEQ s5 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1)) (AND (GEQ s5 1) (GEQ s4890 1)) (AND (GEQ s5 1) (GEQ s5150 1)) (AND (GEQ s5 1) (GEQ s5410 1)) (AND (GEQ s5 1) (GEQ s5670 1)) (AND (GEQ s5 1) (GEQ s5832 1)) (AND (GEQ s5 1) (GEQ s4613 1)) (AND (GEQ s5 1) (GEQ s4353 1)) (AND (GEQ s5 1) (GEQ s4873 1)) (AND (GEQ s5 1) (GEQ s5133 1)) (AND (GEQ s5 1) (GEQ s5393 1)) (AND (GEQ s5 1) (GEQ s4093 1)) (AND (GEQ s5 1) (GEQ s5849 1)) (AND (GEQ s5 1) (GEQ s5653 1)) (AND (GEQ s5 1) (GEQ s4694 1)) (AND (GEQ s5 1) (GEQ s4792 1)) (AND (GEQ s5 1) (GEQ s5052 1)) (AND (GEQ s5 1) (GEQ s5312 1)) (AND (GEQ s5 1) (GEQ s5572 1)) (AND (GEQ s5 1) (GEQ s5930 1)) (AND (GEQ s5 1) (GEQ s4434 1)) (AND (GEQ s5 1) (GEQ s4174 1)) (AND (GEQ s5 1) (GEQ s5751 1)) (AND (GEQ s5 1) (GEQ s5035 1)) (AND (GEQ s5 1) (GEQ s5295 1)) (AND (GEQ s5 1) (GEQ s5555 1)) (AND (GEQ s5 1) (GEQ s5815 1)) (AND (GEQ s5 1) (GEQ s4255 1)) (AND (GEQ s5 1) (GEQ s4515 1)) (AND (GEQ s5 1) (GEQ s4775 1)) (AND (GEQ s5 1) (GEQ s4954 1)) (AND (GEQ s5 1) (GEQ s5214 1)) (AND (GEQ s5 1) (GEQ s5474 1)) (AND (GEQ s5 1) (GEQ s5734 1)) (AND (GEQ s5 1) (GEQ s5896 1)) (AND (GEQ s5 1) (GEQ s4076 1)) (AND (GEQ s5 1) (GEQ s4336 1)) (AND (GEQ s5 1) (GEQ s4596 1)) (AND (GEQ s5 1) (GEQ s5717 1)) (AND (GEQ s5 1) (GEQ s4157 1)) (AND (GEQ s5 1) (GEQ s4417 1)) (AND (GEQ s5 1) (GEQ s4677 1)) (AND (GEQ s5 1) (GEQ s4937 1)) (AND (GEQ s5 1) (GEQ s5197 1)) (AND (GEQ s5 1) (GEQ s5457 1)) (AND (GEQ s5 1) (GEQ s5913 1)) (AND (GEQ s5 1) (GEQ s4758 1)) (AND (GEQ s5 1) (GEQ s5376 1)) (AND (GEQ s5 1) (GEQ s5636 1)) (AND (GEQ s5 1) (GEQ s5994 1)) (AND (GEQ s5 1) (GEQ s4856 1)) (AND (GEQ s5 1) (GEQ s5116 1)) (AND (GEQ s5 1) (GEQ s4498 1)) (AND (GEQ s5 1) (GEQ s4238 1)) (AND (GEQ s5 1) (GEQ s4839 1)) (AND (GEQ s5 1) (GEQ s5099 1)) (AND (GEQ s5 1) (GEQ s5359 1)) (AND (GEQ s5 1) (GEQ s5619 1)) (AND (GEQ s5 1) (GEQ s5879 1)) (AND (GEQ s5 1) (GEQ s4059 1)) (AND (GEQ s5 1) (GEQ s4319 1)) (AND (GEQ s5 1) (GEQ s4579 1)) (AND (GEQ s5 1) (GEQ s4140 1)) (AND (GEQ s5 1) (GEQ s4400 1)) (AND (GEQ s5 1) (GEQ s4660 1)) (AND (GEQ s5 1) (GEQ s5960 1)) (AND (GEQ s5 1) (GEQ s5018 1)) (AND (GEQ s5 1) (GEQ s5538 1)) (AND (GEQ s5 1) (GEQ s5278 1)) (AND (GEQ s5 1) (GEQ s5977 1)) (AND (GEQ s5 1) (GEQ s5521 1)) (AND (GEQ s5 1) (GEQ s5781 1)) (AND (GEQ s5 1) (GEQ s4481 1)) (AND (GEQ s5 1) (GEQ s5001 1)) (AND (GEQ s5 1) (GEQ s4221 1)) (AND (GEQ s5 1) (GEQ s4822 1)) (AND (GEQ s5 1) (GEQ s5261 1)) (AND (GEQ s5 1) (GEQ s5798 1)) (AND (GEQ s5 1) (GEQ s4920 1)) (AND (GEQ s5 1) (GEQ s5180 1)) (AND (GEQ s5 1) (GEQ s5440 1)) (AND (GEQ s5 1) (GEQ s5700 1)) (AND (GEQ s5 1) (GEQ s4042 1)) (AND (GEQ s5 1) (GEQ s4562 1)) (AND (GEQ s5 1) (GEQ s4302 1)) (AND (GEQ s5 1) (GEQ s4741 1)) (AND (GEQ s5 1) (GEQ s4903 1)) (AND (GEQ s5 1) (GEQ s5163 1)) (AND (GEQ s5 1) (GEQ s5423 1)) (AND (GEQ s5 1) (GEQ s5683 1)) (AND (GEQ s5 1) (GEQ s5943 1)) (AND (GEQ s5 1) (GEQ s4123 1)) (AND (GEQ s5 1) (GEQ s4383 1)) (AND (GEQ s5 1) (GEQ s4643 1)) (AND (GEQ s5 1) (GEQ s4724 1)) (AND (GEQ s5 1) (GEQ s4464 1)) (AND (GEQ s5 1) (GEQ s5082 1)) (AND (GEQ s5 1) (GEQ s5602 1)) (AND (GEQ s5 1) (GEQ s4204 1)) (AND (GEQ s5 1) (GEQ s5342 1)) (AND (GEQ s5 1) (GEQ s5845 1)) (AND (GEQ s5 1) (GEQ s4025 1)) (AND (GEQ s5 1) (GEQ s5585 1)) (AND (GEQ s5 1) (GEQ s4545 1)) (AND (GEQ s5 1) (GEQ s5065 1)) (AND (GEQ s5 1) (GEQ s4886 1)) (AND (GEQ s5 1) (GEQ s4285 1)) (AND (GEQ s5 1) (GEQ s5325 1)) (AND (GEQ s5 1) (GEQ s5862 1)) (AND (GEQ s5 1) (GEQ s5244 1)) (AND (GEQ s5 1) (GEQ s5504 1)) (AND (GEQ s5 1) (GEQ s5764 1)) (AND (GEQ s5 1) (GEQ s4106 1)) (AND (GEQ s5 1) (GEQ s4626 1)) (AND (GEQ s5 1) (GEQ s4984 1)) (AND (GEQ s5 1) (GEQ s4366 1)) (AND (GEQ s5 1) (GEQ s4805 1)) (AND (GEQ s5 1) (GEQ s4967 1)) (AND (GEQ s5 1) (GEQ s5227 1)) (AND (GEQ s5 1) (GEQ s5487 1)) (AND (GEQ s5 1) (GEQ s5747 1)) (AND (GEQ s5 1) (GEQ s6007 1)) (AND (GEQ s5 1) (GEQ s4447 1)) (AND (GEQ s5 1) (GEQ s4187 1)) (AND (GEQ s5 1) (GEQ s4788 1)) (AND (GEQ s5 1) (GEQ s5828 1)) (AND (GEQ s5 1) (GEQ s4528 1)) (AND (GEQ s5 1) (GEQ s5146 1)) (AND (GEQ s5 1) (GEQ s5666 1)) (AND (GEQ s5 1) (GEQ s4268 1)) (AND (GEQ s5 1) (GEQ s4707 1)) (AND (GEQ s5 1) (GEQ s5406 1)) (AND (GEQ s5 1) (GEQ s5909 1)) (AND (GEQ s5 1) (GEQ s4089 1)) (AND (GEQ s5 1) (GEQ s4609 1)) (AND (GEQ s5 1) (GEQ s5129 1)) (AND (GEQ s5 1) (GEQ s5649 1)) (AND (GEQ s5 1) (GEQ s4349 1)) (AND (GEQ s5 1) (GEQ s4950 1)) (AND (GEQ s5 1) (GEQ s5389 1)) (AND (GEQ s5 1) (GEQ s5926 1)) (AND (GEQ s5 1) (GEQ s4690 1)) (AND (GEQ s5 1) (GEQ s5048 1)) (AND (GEQ s5 1) (GEQ s5568 1)) (AND (GEQ s5 1) (GEQ s4170 1)) (AND (GEQ s5 1) (GEQ s4430 1)) (AND (GEQ s5 1) (GEQ s4869 1)) (AND (GEQ s5 1) (GEQ s5308 1)) (AND (GEQ s5 1) (GEQ s5031 1)) (AND (GEQ s5 1) (GEQ s5551 1)) (AND (GEQ s5 1) (GEQ s4511 1)) (AND (GEQ s5 1) (GEQ s5291 1)) (AND (GEQ s5 1) (GEQ s5892 1)) (AND (GEQ s5 1) (GEQ s4251 1)) (AND (GEQ s5 1) (GEQ s4852 1)) (AND (GEQ s5 1) (GEQ s5210 1)) (AND (GEQ s5 1) (GEQ s5730 1)) (AND (GEQ s5 1) (GEQ s4072 1)) (AND (GEQ s5 1) (GEQ s4592 1)) (AND (GEQ s5 1) (GEQ s4771 1)) (AND (GEQ s5 1) (GEQ s5470 1)) (AND (GEQ s5 1) (GEQ s5973 1)) (AND (GEQ s5 1) (GEQ s4332 1)) (AND (GEQ s5 1) (GEQ s5713 1)) (AND (GEQ s5 1) (GEQ s4153 1)) (AND (GEQ s5 1) (GEQ s4673 1)) (AND (GEQ s5 1) (GEQ s5193 1)) (AND (GEQ s5 1) (GEQ s4754 1)) (AND (GEQ s5 1) (GEQ s5014 1)) (AND (GEQ s5 1) (GEQ s5453 1)) (AND (GEQ s5 1) (GEQ s4413 1)) (AND (GEQ s5 1) (GEQ s5990 1)) (AND (GEQ s5 1) (GEQ s5112 1)) (AND (GEQ s5 1) (GEQ s5632 1)) (AND (GEQ s5 1) (GEQ s4234 1)) (AND (GEQ s5 1) (GEQ s4494 1)) (AND (GEQ s5 1) (GEQ s5372 1)) (AND (GEQ s5 1) (GEQ s5811 1)) (AND (GEQ s5 1) (GEQ s4933 1)))], nbAcceptance=1, properties=[trans-labels, explicit-labels, trans-acc, no-univ-branch, stutter-invariant, very-weak, weak, inherently-weak], stateDesc=[null, null, null][true, true, true]]
Stuttering criterion allowed to conclude after 5 steps with 0 reset in 22 ms.
FORMULA AirplaneLD-COL-4000-02 FALSE TECHNIQUES STUTTER_TEST
Treatment of property AirplaneLD-COL-4000-02 finished in 15192 ms.
Running Spot : CommandLine [args=[/home/mcc/BenchKit/bin//..//ltl2tgba, --hoaf=tv, -f, !(F((G((p0&&F(p1)))||(X(p2)&&F((p2 U (p3||G(p2))))))))], workingDir=/home/mcc/execution]
Support contains 6006 out of 12016 places. Attempting structural reductions.
Starting structural reductions, iteration 0 : 12016/12016 places, 24012/24012 transitions.
Discarding 5997 places :
Symmetric choice reduction at 0 with 5997 rule applications. Total rules 5997 place count 6019 transition count 18015
Iterating global reduction 0 with 5997 rules applied. Total rules applied 11994 place count 6019 transition count 18015
Ensure Unique test removed 5997 transitions
Reduce isomorphic transitions removed 5997 transitions.
Iterating post reduction 0 with 5997 rules applied. Total rules applied 17991 place count 6019 transition count 12018
Applied a total of 17991 rules in 357 ms. Remains 6019 /12016 variables (removed 5997) and now considering 12018/24012 (removed 11994) transitions.
// Phase 1: matrix 12018 rows 6019 cols
[2021-05-08 05:55:04] [INFO ] Computed 1 place invariants in 1462 ms
[2021-05-08 05:55:04] [INFO ] SMT solver returned unknown. Retrying;
[2021-05-08 05:55:05] [INFO ] Implicit Places using invariants in 2063 ms returned [9]
Discarding 1 places :
Implicit Place search using SMT only with invariants took 2069 ms to find 1 implicit places.
// Phase 1: matrix 12018 rows 6018 cols
[2021-05-08 05:55:06] [INFO ] Computed 0 place invariants in 1500 ms
[2021-05-08 05:55:13] [INFO ] Dead Transitions using invariants and state equation in 8755 ms returned []
Starting structural reductions, iteration 1 : 6018/12016 places, 12018/24012 transitions.
Applied a total of 0 rules in 52 ms. Remains 6018 /6018 variables (removed 0) and now considering 12018/12018 (removed 0) transitions.
// Phase 1: matrix 12018 rows 6018 cols
[2021-05-08 05:55:15] [INFO ] Computed 0 place invariants in 1450 ms
[2021-05-08 05:55:22] [INFO ] Dead Transitions using invariants and state equation in 8328 ms returned []
Finished structural reductions, in 2 iterations. Remains : 6018/12016 places, 12018/24012 transitions.
Stuttering acceptance computed with spot in 180 ms :[(OR (AND (NOT p0) (NOT p2)) (AND (NOT p1) (NOT p2))), (OR (AND (NOT p0) (NOT p2)) (AND (NOT p1) (NOT p2))), (AND (NOT p1) (NOT p2)), (OR (AND (NOT p0) (NOT p2) (NOT p3)) (AND (NOT p1) (NOT p2) (NOT p3))), (AND (NOT p1) (NOT p3) (NOT p2))]
Running random walk in product with property : AirplaneLD-COL-4000-03 automaton TGBA [mat=[[{ cond=true, acceptance={} source=0 dest: 1}, { cond=(AND p0 (NOT p1)), acceptance={} source=0 dest: 2}, { cond=(NOT p3), acceptance={} source=0 dest: 3}, { cond=(AND p0 (NOT p3) (NOT p1)), acceptance={} source=0 dest: 4}], [{ cond=(AND (NOT p0) (NOT p2)), acceptance={0, 1} source=1 dest: 1}, { cond=(AND p0 (NOT p2)), acceptance={0} source=1 dest: 1}, { cond=(AND p0 (NOT p2) (NOT p1)), acceptance={} source=1 dest: 2}, { cond=(AND (NOT p3) (NOT p2)), acceptance={} source=1 dest: 3}, { cond=(AND p0 (NOT p3) (NOT p2) (NOT p1)), acceptance={} source=1 dest: 4}], [{ cond=(AND (NOT p2) (NOT p1)), acceptance={0, 1} source=2 dest: 2}, { cond=(AND (NOT p3) (NOT p2) (NOT p1)), acceptance={} source=2 dest: 4}], [{ cond=(AND (NOT p0) (NOT p3) (NOT p2)), acceptance={0, 1} source=3 dest: 3}, { cond=(AND (NOT p0) (NOT p3) p2), acceptance={1} source=3 dest: 3}, { cond=(AND p0 (NOT p3) (NOT p2)), acceptance={0} source=3 dest: 3}, { cond=(AND p0 (NOT p3) p2), acceptance={} source=3 dest: 3}, { cond=(AND p0 (NOT p3) (NOT p1)), acceptance={} source=3 dest: 4}], [{ cond=(AND (NOT p3) (NOT p2) (NOT p1)), acceptance={0, 1} source=4 dest: 4}, { cond=(AND (NOT p3) p2 (NOT p1)), acceptance={1} source=4 dest: 4}]], initial=0, aps=[p0:(OR (LT s8 1) (LT s9 1)), p1:(AND (OR (LT s6 1) (LT s5014 1)) (OR (LT s6 1) (LT s5534 1)) (OR (LT s6 1) (LT s4234 1)) (OR (LT s6 1) (LT s4575 1)) (OR (LT s6 1) (LT s4835 1)) (OR (LT s6 1) (LT s5615 1)) (OR (LT s6 1) (LT s5875 1)) (OR (LT s6 1) (LT s5274 1)) (OR (LT s6 1) (LT s4413 1)) (OR (LT s6 1) (LT s4153 1)) (OR (LT s6 1) (LT s4656 1)) (OR (LT s6 1) (LT s4916 1)) (OR (LT s6 1) (LT s5095 1)) (OR (LT s6 1) (LT s5355 1)) (OR (LT s6 1) (LT s5794 1)) (OR (LT s6 1) (LT s4396 1)) (OR (LT s6 1) (LT s4136 1)) (OR (LT s6 1) (LT s4673 1)) (OR (LT s6 1) (LT s4933 1)) (OR (LT s6 1) (LT s5713 1)) (OR (LT s6 1) (LT s5973 1)) (OR (LT s6 1) (LT s5112 1)) (OR (LT s6 1) (LT s5372 1)) (OR (LT s6 1) (LT s4055 1)) (OR (LT s6 1) (LT s4315 1)) (OR (LT s6 1) (LT s4494 1)) (OR (LT s6 1) (LT s4754 1)) (OR (LT s6 1) (LT s5193 1)) (OR (LT s6 1) (LT s5453 1)) (OR (LT s6 1) (LT s5892 1)) (OR (LT s6 1) (LT s5632 1)) (OR (LT s6 1) (LT s5470 1)) (OR (LT s6 1) (LT s5990 1)) (OR (LT s6 1) (LT s4430 1)) (OR (LT s6 1) (LT s4950 1)) (OR (LT s6 1) (LT s4511 1)) (OR (LT s6 1) (LT s4771 1)) (OR (LT s6 1) (LT s5210 1)) (OR (LT s6 1) (LT s5811 1)) (OR (LT s6 1) (LT s4170 1)) (OR (LT s6 1) (LT s5551 1)) (OR (LT s6 1) (LT s4089 1)) (OR (LT s6 1) (LT s4349 1)) (OR (LT s6 1) (LT s5031 1)) (OR (LT s6 1) (LT s5291 1)) (OR (LT s6 1) (LT s4592 1)) (OR (LT s6 1) (LT s4852 1)) (OR (LT s6 1) (LT s5730 1)) (OR (LT s6 1) (LT s4072 1)) (OR (LT s6 1) (LT s4609 1)) (OR (LT s6 1) (LT s4869 1)) (OR (LT s6 1) (LT s5048 1)) (OR (LT s6 1) (LT s5308 1)) (OR (LT s6 1) (LT s5649 1)) (OR (LT s6 1) (LT s5909 1)) (OR (LT s6 1) (LT s4332 1)) (OR (LT s6 1) (LT s6007 1)) (OR (LT s6 1) (LT s4251 1)) (OR (LT s6 1) (LT s5129 1)) (OR (LT s6 1) (LT s5389 1)) (OR (LT s6 1) (LT s5568 1)) (OR (LT s6 1) (LT s5828 1)) (OR (LT s6 1) (LT s4690 1)) (OR (LT s6 1) (LT s5406 1)) (OR (LT s6 1) (LT s5926 1)) (OR (LT s6 1) (LT s4366 1)) (OR (LT s6 1) (LT s4886 1)) (OR (LT s6 1) (LT s5146 1)) (OR (LT s6 1) (LT s4106 1)) (OR (LT s6 1) (LT s4707 1)) (OR (LT s6 1) (LT s5747 1)) (OR (LT s6 1) (LT s4967 1)) (OR (LT s6 1) (LT s5487 1)) (OR (LT s6 1) (LT s4025 1)) (OR (LT s6 1) (LT s4285 1)) (OR (LT s6 1) (LT s4528 1)) (OR (LT s6 1) (LT s4788 1)) (OR (LT s6 1) (LT s5666 1)) (OR (LT s6 1) (LT s5227 1)) (OR (LT s6 1) (LT s4984 1)) (OR (LT s6 1) (LT s5504 1)) (OR (LT s6 1) (LT s4545 1)) (OR (LT s6 1) (LT s4268 1)) (OR (LT s6 1) (LT s4805 1)) (OR (LT s6 1) (LT s5585 1)) (OR (LT s6 1) (LT s5845 1)) (OR (LT s6 1) (LT s5244 1)) (OR (LT s6 1) (LT s5943 1)) (OR (LT s6 1) (LT s4447 1)) (OR (LT s6 1) (LT s5065 1)) (OR (LT s6 1) (LT s5325 1)) (OR (LT s6 1) (LT s5764 1)) (OR (LT s6 1) (LT s4187 1)) (OR (LT s6 1) (LT s4626 1)) (OR (LT s6 1) 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(OR (LT s7 1) (LT s682 1)) (OR (LT s7 1) (LT s1202 1)) (OR (LT s7 1) (LT s1594 1)) (OR (LT s7 1) (LT s2114 1)) (OR (LT s7 1) (LT s2634 1)) (OR (LT s7 1) (LT s3154 1)) (OR (LT s7 1) (LT s3674 1)) (OR (LT s7 1) (LT s3333 1)) (OR (LT s7 1) (LT s2293 1)) (OR (LT s7 1) (LT s341 1)) (OR (LT s7 1) (LT s861 1)) (OR (LT s7 1) (LT s1935 1)) (OR (LT s7 1) (LT s1415 1)) (OR (LT s7 1) (LT s2813 1)) (OR (LT s7 1) (LT s1040 1)) (OR (LT s7 1) (LT s1756 1)) (OR (LT s7 1) (LT s2276 1)) (OR (LT s7 1) (LT s2796 1)) (OR (LT s7 1) (LT s3316 1)) (OR (LT s7 1) (LT s3512 1)) (OR (LT s7 1) (LT s520 1)) (OR (LT s7 1) (LT s3495 1)) (OR (LT s7 1) (LT s699 1)) (OR (LT s7 1) (LT s1219 1)) (OR (LT s7 1) (LT s2455 1)) (OR (LT s7 1) (LT s2975 1)) (OR (LT s7 1) (LT s1577 1)) (OR (LT s7 1) (LT s2097 1)) (OR (LT s7 1) (LT s3853 1)) (OR (LT s7 1) (LT s3870 1)) (OR (LT s7 1) (LT s750 1)) (OR (LT s7 1) (LT s1790 1)) (OR (LT s7 1) (LT s2830 1)) (OR (LT s7 1) (LT s1611 1)) (OR (LT s7 1) (LT s51 1)) (OR (LT s7 1) (LT s3009 1)) (OR (LT s7 1) (LT s3691 1)) (OR (LT s7 1) (LT s2131 1)) (OR (LT s7 1) (LT s2489 1)) (OR (LT s7 1) (LT s409 1)) (OR (LT s7 1) (LT s929 1)) (OR (LT s7 1) (LT s230 1)) (OR (LT s7 1) (LT s2310 1)) (OR (LT s7 1) (LT s68 1)) (OR (LT s7 1) (LT s588 1)) (OR (LT s7 1) (LT s1432 1)) (OR (LT s7 1) (LT s1952 1)) (OR (LT s7 1) (LT s1108 1)) (OR (LT s7 1) (LT s2472 1)) (OR (LT s7 1) (LT s2992 1)) (OR (LT s7 1) (LT s3708 1)) (OR (LT s7 1) (LT s1287 1)) (OR (LT s7 1) (LT s247 1)) (OR (LT s7 1) (LT s3529 1)) (OR (LT s7 1) (LT s2651 1)) (OR (LT s7 1) (LT s3171 1)) (OR (LT s7 1) (LT s3350 1)) (OR (LT s7 1) (LT s767 1)) (OR (LT s7 1) (LT s1773 1)) (OR (LT s7 1) (LT s34 1)) (OR (LT s7 1) (LT s554 1)) (OR (LT s7 1) (LT s1074 1)) (OR (LT s7 1) (LT s1986 1)) (OR (LT s7 1) (LT s2506 1)) (OR (LT s7 1) (LT s3026 1)) (OR (LT s7 1) (LT s3546 1)) (OR (LT s7 1) (LT s1466 1)) (OR (LT s7 1) (LT s3205 1)) (OR (LT s7 1) (LT s2165 1)) (OR (LT s7 1) (LT s1253 1)) (OR (LT s7 1) (LT s213 1)) (OR (LT s7 1) (LT s2685 1)) (OR (LT s7 1) (LT s1807 1)) (OR (LT s7 1) (LT s3384 1)) (OR (LT s7 1) (LT s733 1)) (OR (LT s7 1) (LT s3887 1)) (OR (LT s7 1) (LT s392 1)) (OR (LT s7 1) (LT s912 1)) (OR (LT s7 1) (LT s1628 1)) (OR (LT s7 1) (LT s2148 1)) (OR (LT s7 1) (LT s2668 1)) (OR (LT s7 1) (LT s3188 1)) (OR (LT s7 1) (LT s2327 1)) (OR (LT s7 1) (LT s3904 1)) (OR (LT s7 1) (LT s3367 1)) (OR (LT s7 1) (LT s571 1)) (OR (LT s7 1) (LT s1091 1)) (OR (LT s7 1) (LT s1449 1)) (OR (LT s7 1) (LT s1969 1)) (OR (LT s7 1) (LT s3725 1)) (OR (LT s7 1) (LT s2847 1)) (OR (LT s7 1) (LT s1270 1)) (OR (LT s7 1) (LT s3401 1)) (OR (LT s7 1) (LT s3742 1)) (OR (LT s7 1) (LT s1321 1)) (OR (LT s7 1) (LT s2361 1)) (OR (LT s7 1) (LT s622 1)) (OR (LT s7 1) (LT s1662 1)) (OR (LT s7 1) (LT s2702 1)) (OR (LT s7 1) (LT s281 1)) (OR (LT s7 1) (LT s801 1)) (OR (LT s7 1) (LT s1483 1)) (OR (LT s7 1) (LT s3563 1)) (OR (LT s7 1) (LT s2003 1)) (OR (LT s7 1) (LT s2881 1)) (OR (LT s7 1) (LT s2182 1)) (OR (LT s7 1) (LT s102 1)) (OR (LT s7 1) (LT s460 1)) (OR (LT s7 1) (LT s980 1)) (OR (LT s7 1) (LT s3580 1)) (OR (LT s7 1) (LT s119 1)) (OR (LT s7 1) (LT s1824 1)) (OR (LT s7 1) (LT s2864 1)) (OR (LT s7 1) (LT s1159 1)) (OR (LT s7 1) (LT s2523 1)) (OR (LT s7 1) (LT s3043 1)) (OR (LT s7 1) (LT s3222 1)) (OR (LT s7 1) (LT s3921 1)) (OR (LT s7 1) (LT s1645 1)) (OR (LT s7 1) (LT s2344 1)) (OR (LT s7 1) (LT s639 1)) (OR (LT s7 1) (LT s1338 1)) (OR (LT s7 1) (LT s426 1)) (OR (LT s7 1) (LT s946 1)) (OR (LT s7 1) (LT s3077 1)) (OR (LT s7 1) (LT s1858 1)) (OR (LT s7 1) (LT s2037 1)) (OR (LT s7 1) (LT s2898 1)) (OR (LT s7 1) (LT s3938 1)) (OR (LT s7 1) (LT s85 1)) (OR (LT s7 1) (LT s1125 1)) (OR (LT s7 1) (LT s3759 1)) (OR (LT s7 1) (LT s2378 1)) (OR (LT s7 1) (LT s2557 1)) (OR (LT s7 1) (LT s1304 1)) (OR (LT s7 1) (LT s605 1)) (OR (LT s7 1) (LT s1679 1)) (OR (LT s7 1) (LT s3256 1)) (OR (LT s7 1) (LT s264 1)) (OR (LT s7 1) (LT s784 1)) (OR (LT s7 1) (LT s1500 1)) (OR (LT s7 1) (LT s2020 1)) (OR (LT s7 1) (LT s2540 1)) (OR (LT s7 1) (LT s3060 1)) (OR (LT s7 1) (LT s3776 1)) (OR (LT s7 1) (LT s2199 1)) (OR (LT s7 1) (LT s3239 1)) (OR (LT s7 1) (LT s963 1)) (OR (LT s7 1) (LT s443 1)) (OR (LT s7 1) (LT s3597 1)) (OR (LT s7 1) (LT s1841 1)) (OR (LT s7 1) (LT s3418 1)) (OR (LT s7 1) (LT s1142 1)) (OR (LT s7 1) (LT s2719 1)))], nbAcceptance=2, properties=[trans-labels, explicit-labels, trans-acc, no-univ-branch], stateDesc=[null, null, null, null, null][false, false, false, false, false]]
Product exploration timeout after 4350 steps with 2175 reset in 10008 ms.
Product exploration timeout after 4360 steps with 2180 reset in 10004 ms.
Complete graph has no SCC; deadlocks are unavoidable. place count 6018 transition count 12018
Detected that all paths lead to deadlock. Applying this knowledge to assert that all AP eventually converge : F ( (Ga|G!a) & (Gb|G!b)...)
Knowledge obtained : [(F (G p0)), (F (G p1)), (F (G p3)), (F (G p2)), p0, p1, p3, p2]
Property proved to be true thanks to knowledge :(F (G p2))
FORMULA AirplaneLD-COL-4000-03 TRUE TECHNIQUES STRUCTURAL INITIAL_STATE
Treatment of property AirplaneLD-COL-4000-03 finished in 45338 ms.
Running Spot : CommandLine [args=[/home/mcc/BenchKit/bin//..//ltl2tgba, --hoaf=tv, -f, !(G((p0||X(X(G(p0))))))], workingDir=/home/mcc/execution]
Support contains 1 out of 12016 places. Attempting structural reductions.
Starting structural reductions, iteration 0 : 12016/12016 places, 24012/24012 transitions.
Applied a total of 0 rules in 33 ms. Remains 12016 /12016 variables (removed 0) and now considering 24012/24012 (removed 0) transitions.
// Phase 1: matrix 24012 rows 12016 cols
[2021-05-08 05:55:57] [INFO ] Computed 1 place invariants in 9594 ms
[2021-05-08 05:55:58] [INFO ] SMT solver returned unknown. Retrying;
[2021-05-08 05:55:58] [INFO ] Implicit Places using invariants in 10768 ms returned []
Implicit Place search using SMT only with invariants took 10768 ms to find 0 implicit places.
// Phase 1: matrix 24012 rows 12016 cols
[2021-05-08 05:56:08] [INFO ] Computed 1 place invariants in 9874 ms
[2021-05-08 05:56:09] [INFO ] SMT solver returned unknown. Retrying;
[2021-05-08 05:56:09] [INFO ] Dead Transitions using invariants and state equation in 10947 ms returned []
Finished structural reductions, in 1 iterations. Remains : 12016/12016 places, 24012/24012 transitions.
Stuttering acceptance computed with spot in 108 ms :[(NOT p0), (NOT p0), true, (NOT p0)]
Running random walk in product with property : AirplaneLD-COL-4000-04 automaton TGBA [mat=[[{ cond=true, acceptance={} source=0 dest: 3}], [{ cond=(NOT p0), acceptance={} source=1 dest: 0}, { cond=p0, acceptance={} source=1 dest: 1}], [{ cond=true, acceptance={0} source=2 dest: 2}], [{ cond=(NOT p0), acceptance={} source=3 dest: 2}, { cond=p0, acceptance={} source=3 dest: 3}]], initial=1, aps=[p0:(GEQ s4 1)], nbAcceptance=1, properties=[trans-labels, explicit-labels, trans-acc, complete, deterministic, no-univ-branch, unambiguous, semi-deterministic, terminal, very-weak, weak, inherently-weak], stateDesc=[null, null, null, null][false, false, false, false]]
Entered a terminal (fully accepting) state of product in 6 steps with 0 reset in 14 ms.
FORMULA AirplaneLD-COL-4000-04 FALSE TECHNIQUES STUTTER_TEST
Treatment of property AirplaneLD-COL-4000-04 finished in 21929 ms.
Running Spot : CommandLine [args=[/home/mcc/BenchKit/bin//..//ltl2tgba, --hoaf=tv, -f, !((F(p0)&&X((G(p1)||F(G(p2))))))], workingDir=/home/mcc/execution]
Support contains 2002 out of 12016 places. Attempting structural reductions.
Starting structural reductions, iteration 0 : 12016/12016 places, 24012/24012 transitions.
Applied a total of 0 rules in 31 ms. Remains 12016 /12016 variables (removed 0) and now considering 24012/24012 (removed 0) transitions.
// Phase 1: matrix 24012 rows 12016 cols
[2021-05-08 05:56:19] [INFO ] Computed 1 place invariants in 9556 ms
[2021-05-08 05:56:20] [INFO ] SMT solver returned unknown. Retrying;
[2021-05-08 05:56:20] [INFO ] Implicit Places using invariants in 10654 ms returned []
Implicit Place search using SMT only with invariants took 10664 ms to find 0 implicit places.
// Phase 1: matrix 24012 rows 12016 cols
[2021-05-08 05:56:30] [INFO ] Computed 1 place invariants in 9396 ms
[2021-05-08 05:56:31] [INFO ] SMT solver returned unknown. Retrying;
[2021-05-08 05:56:31] [INFO ] Dead Transitions using invariants and state equation in 10476 ms returned []
Finished structural reductions, in 1 iterations. Remains : 12016/12016 places, 24012/24012 transitions.
Stuttering acceptance computed with spot in 198 ms :[(OR (NOT p0) (AND (NOT p1) (NOT p2))), (NOT p0), (AND (NOT p1) (NOT p2)), (NOT p2)]
Running random walk in product with property : AirplaneLD-COL-4000-05 automaton TGBA [mat=[[{ cond=(NOT p0), acceptance={} source=0 dest: 1}, { cond=true, acceptance={} source=0 dest: 2}], [{ cond=(NOT p0), acceptance={0} source=1 dest: 1}], [{ cond=p1, acceptance={} source=2 dest: 2}, { cond=(NOT p1), acceptance={} source=2 dest: 3}], [{ cond=(NOT p2), acceptance={0} source=3 dest: 3}, { cond=p2, acceptance={} source=3 dest: 3}]], initial=0, aps=[p0:(GEQ s2 1), p1:(OR (AND (GEQ s6 1) (GEQ s6575 1)) (AND (GEQ s6 1) (GEQ s7095 1)) (AND (GEQ s6 1) (GEQ s7615 1)) (AND (GEQ s6 1) (GEQ s6055 1)) (AND (GEQ s6 1) (GEQ s6656 1)) (AND (GEQ s6 1) (GEQ s6916 1)) (AND (GEQ s6 1) (GEQ s7355 1)) (AND (GEQ s6 1) (GEQ s7956 1)) (AND (GEQ s6 1) (GEQ s6315 1)) (AND (GEQ s6 1) (GEQ s7176 1)) (AND (GEQ s6 1) (GEQ s7696 1)) (AND (GEQ s6 1) (GEQ s6234 1)) (AND (GEQ s6 1) (GEQ s6494 1)) (AND (GEQ s6 1) (GEQ s6737 1)) (AND (GEQ s6 1) (GEQ s6997 1)) (AND (GEQ s6 1) (GEQ s7875 1)) (AND (GEQ s6 1) (GEQ s7436 1)) (AND (GEQ s6 1) (GEQ s6818 1)) (AND (GEQ s6 1) (GEQ s7078 1)) (AND (GEQ s6 1) (GEQ s6153 1)) (AND (GEQ s6 1) (GEQ s6413 1)) (AND (GEQ s6 1) (GEQ s7257 1)) (AND (GEQ s6 1) (GEQ s7517 1)) (AND (GEQ s6 1) (GEQ s7858 1)) (AND (GEQ s6 1) (GEQ s6072 1)) (AND (GEQ s6 1) (GEQ s6592 1)) (AND (GEQ s6 1) (GEQ s7338 1)) (AND (GEQ s6 1) (GEQ s7598 1)) (AND (GEQ s6 1) (GEQ s7777 1)) (AND (GEQ s6 1) (GEQ s6332 1)) (AND (GEQ s6 1) (GEQ s6899 1)) (AND (GEQ s6 1) (GEQ s6511 1)) (AND (GEQ s6 1) (GEQ s7159 1)) (AND (GEQ s6 1) (GEQ s7679 1)) (AND (GEQ s6 1) (GEQ s6720 1)) (AND (GEQ s6 1) (GEQ s6980 1)) (AND (GEQ s6 1) (GEQ s7760 1)) (AND (GEQ s6 1) (GEQ s6251 1)) (AND (GEQ s6 1) (GEQ s7419 1)) (AND (GEQ s6 1) (GEQ s6801 1)) (AND (GEQ s6 1) (GEQ s7240 1)) (AND (GEQ s6 1) (GEQ s7500 1)) (AND (GEQ s6 1) (GEQ s6170 1)) (AND (GEQ s6 1) (GEQ s6430 1)) (AND (GEQ s6 1) (GEQ s7061 1)) (AND (GEQ s6 1) (GEQ s7939 1)) (AND (GEQ s6 1) (GEQ s6089 1)) (AND (GEQ s6 1) (GEQ s6609 1)) (AND (GEQ s6 1) (GEQ s6882 1)) (AND (GEQ s6 1) (GEQ s7142 1)) (AND (GEQ s6 1) (GEQ s7922 1)) (AND (GEQ s6 1) (GEQ s7321 1)) (AND (GEQ s6 1) (GEQ s7581 1)) (AND (GEQ s6 1) (GEQ s6349 1)) (AND (GEQ s6 1) (GEQ s6528 1)) (AND (GEQ s6 1) (GEQ s6703 1)) (AND (GEQ s6 1) (GEQ s6963 1)) (AND (GEQ s6 1) (GEQ s7402 1)) (AND (GEQ s6 1) (GEQ s7662 1)) (AND (GEQ s6 1) (GEQ s7841 1)) (AND (GEQ s6 1) (GEQ s6268 1)) (AND (GEQ s6 1) (GEQ s6447 1)) (AND (GEQ s6 1) (GEQ s7743 1)) (AND (GEQ s6 1) (GEQ s6784 1)) (AND (GEQ s6 1) (GEQ s7044 1)) (AND (GEQ s6 1) (GEQ s7223 1)) (AND (GEQ s6 1) (GEQ s7483 1)) (AND (GEQ s6 1) (GEQ s7824 1)) (AND (GEQ s6 1) (GEQ s6187 1)) (AND (GEQ s6 1) (GEQ s6106 1)) (AND (GEQ s6 1) (GEQ s6626 1)) (AND (GEQ s6 1) (GEQ s7125 1)) (AND (GEQ s6 1) (GEQ s7304 1)) (AND (GEQ s6 1) (GEQ s7564 1)) (AND (GEQ s6 1) (GEQ s6865 1)) (AND (GEQ s6 1) (GEQ s6366 1)) (AND (GEQ s6 1) (GEQ s8003 1)) (AND (GEQ s6 1) (GEQ s6025 1)) (AND (GEQ s6 1) (GEQ s6545 1)) (AND (GEQ s6 1) (GEQ s6686 1)) (AND (GEQ s6 1) (GEQ s7206 1)) (AND (GEQ s6 1) (GEQ s7385 1)) (AND (GEQ s6 1) (GEQ s7645 1)) (AND (GEQ s6 1) (GEQ s7986 1)) (AND (GEQ s6 1) (GEQ s6285 1)) (AND (GEQ s6 1) (GEQ s6946 1)) (AND (GEQ s6 1) (GEQ s6464 1)) (AND (GEQ s6 1) (GEQ s7466 1)) (AND (GEQ s6 1) (GEQ s7726 1)) (AND (GEQ s6 1) (GEQ s7905 1)) (AND (GEQ s6 1) (GEQ s6767 1)) (AND (GEQ s6 1) (GEQ s7027 1)) (AND (GEQ s6 1) (GEQ s6204 1)) (AND (GEQ s6 1) (GEQ s6643 1)) (AND (GEQ s6 1) (GEQ s6383 1)) (AND (GEQ s6 1) (GEQ s7287 1)) (AND (GEQ s6 1) (GEQ s7547 1)) (AND (GEQ s6 1) (GEQ s6848 1)) (AND (GEQ s6 1) (GEQ s7108 1)) (AND (GEQ s6 1) (GEQ s7888 1)) (AND (GEQ s6 1) (GEQ s6123 1)) (AND (GEQ s6 1) (GEQ s6042 1)) (AND (GEQ s6 1) (GEQ s6562 1)) (AND (GEQ s6 1) (GEQ s6669 1)) (AND (GEQ s6 1) (GEQ s7807 1)) (AND (GEQ s6 1) (GEQ s7189 1)) (AND (GEQ s6 1) (GEQ s7368 1)) (AND (GEQ s6 1) (GEQ s7628 1)) (AND (GEQ s6 1) (GEQ s6302 1)) (AND (GEQ s6 1) (GEQ s6929 1)) (AND (GEQ s6 1) (GEQ s6750 1)) (AND (GEQ s6 1) (GEQ s7270 1)) (AND (GEQ s6 1) (GEQ s6481 1)) (AND (GEQ s6 1) (GEQ s7790 1)) (AND (GEQ s6 1) (GEQ s7449 1)) (AND (GEQ s6 1) (GEQ s7709 1)) (AND (GEQ s6 1) (GEQ s7010 1)) (AND (GEQ s6 1) (GEQ s6221 1)) (AND (GEQ s6 1) (GEQ s6400 1)) (AND (GEQ s6 1) (GEQ s7969 1)) (AND (GEQ s6 1) (GEQ s6831 1)) (AND (GEQ s6 1) (GEQ s7091 1)) (AND (GEQ s6 1) (GEQ s6140 1)) (AND (GEQ s6 1) (GEQ s7530 1)) (AND (GEQ s6 1) (GEQ s6579 1)) (AND (GEQ s6 1) (GEQ s6059 1)) (AND (GEQ s6 1) (GEQ s6319 1)) (AND (GEQ s6 1) (GEQ s6912 1)) (AND (GEQ s6 1) (GEQ s7172 1)) (AND (GEQ s6 1) (GEQ s7351 1)) (AND (GEQ s6 1) (GEQ s7611 1)) (AND (GEQ s6 1) (GEQ s7952 1)) (AND (GEQ s6 1) (GEQ s6498 1)) (AND (GEQ s6 1) (GEQ s7253 1)) (AND (GEQ s6 1) (GEQ s6733 1)) (AND (GEQ s6 1) (GEQ s7871 1)) (AND (GEQ s6 1) (GEQ s7432 1)) (AND (GEQ s6 1) (GEQ s7692 1)) (AND (GEQ s6 1) (GEQ s6238 1)) (AND (GEQ s6 1) (GEQ s6993 1)) (AND (GEQ s6 1) (GEQ s6814 1)) (AND (GEQ s6 1) (GEQ s6417 1)) (AND (GEQ s6 1) (GEQ s7334 1)) (AND (GEQ s6 1) (GEQ s7854 1)) (AND (GEQ s6 1) (GEQ s7074 1)) (AND (GEQ s6 1) (GEQ s6157 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(GEQ s6 1) (GEQ s6371 1)) (AND (GEQ s6 1) (GEQ s7380 1)) (AND (GEQ s6 1) (GEQ s7559 1)) (AND (GEQ s6 1) (GEQ s7120 1)) (AND (GEQ s6 1) (GEQ s6030 1)) (AND (GEQ s6 1) (GEQ s6290 1)) (AND (GEQ s6 1) (GEQ s6550 1)) (AND (GEQ s6 1) (GEQ s6681 1)) (AND (GEQ s6 1) (GEQ s6941 1)) (AND (GEQ s6 1) (GEQ s7201 1)) (AND (GEQ s6 1) (GEQ s7461 1)) (AND (GEQ s6 1) (GEQ s7981 1)) (AND (GEQ s6 1) (GEQ s7640 1)) (AND (GEQ s6 1) (GEQ s6762 1)) (AND (GEQ s6 1) (GEQ s7022 1)) (AND (GEQ s6 1) (GEQ s7282 1)) (AND (GEQ s6 1) (GEQ s7542 1)) (AND (GEQ s6 1) (GEQ s6209 1)) (AND (GEQ s6 1) (GEQ s6469 1)) (AND (GEQ s6 1) (GEQ s7900 1)) (AND (GEQ s6 1) (GEQ s7721 1)) (AND (GEQ s6 1) (GEQ s6648 1)) (AND (GEQ s6 1) (GEQ s6128 1)) (AND (GEQ s6 1) (GEQ s6388 1)) (AND (GEQ s6 1) (GEQ s6843 1)) (AND (GEQ s6 1) (GEQ s7363 1)) (AND (GEQ s6 1) (GEQ s7883 1)) (AND (GEQ s6 1) (GEQ s6567 1)) (AND (GEQ s6 1) (GEQ s7103 1)) (AND (GEQ s6 1) (GEQ s6664 1)) (AND (GEQ s6 1) (GEQ s7802 1)) (AND (GEQ s6 1) (GEQ s6307 1)) (AND (GEQ s6 1) (GEQ s6924 1)) (AND (GEQ s6 1) (GEQ s7444 1)) (AND (GEQ s6 1) (GEQ s7184 1)) (AND (GEQ s6 1) (GEQ s7623 1)) (AND (GEQ s6 1) (GEQ s6047 1)) (AND (GEQ s6 1) (GEQ s6226 1)) (AND (GEQ s6 1) (GEQ s6486 1)) (AND (GEQ s6 1) (GEQ s7265 1)) (AND (GEQ s6 1) (GEQ s7525 1)) (AND (GEQ s6 1) (GEQ s7785 1)) (AND (GEQ s6 1) (GEQ s6745 1)) (AND (GEQ s6 1) (GEQ s7005 1)) (AND (GEQ s6 1) (GEQ s7704 1)) (AND (GEQ s6 1) (GEQ s6826 1)) (AND (GEQ s6 1) (GEQ s7086 1)) (AND (GEQ s6 1) (GEQ s7346 1)) (AND (GEQ s6 1) (GEQ s6145 1)) (AND (GEQ s6 1) (GEQ s6405 1)) (AND (GEQ s6 1) (GEQ s7606 1)) (AND (GEQ s6 1) (GEQ s7964 1)) (AND (GEQ s6 1) (GEQ s6584 1)) (AND (GEQ s6 1) (GEQ s6324 1)) (AND (GEQ s6 1) (GEQ s7947 1)) (AND (GEQ s6 1) (GEQ s6907 1)) (AND (GEQ s6 1) (GEQ s7427 1)) (AND (GEQ s6 1) (GEQ s6503 1)) (AND (GEQ s6 1) (GEQ s6064 1)) (AND (GEQ s6 1) (GEQ s7167 1)) (AND (GEQ s6 1) (GEQ s6728 1)) (AND (GEQ s6 1) (GEQ s6988 1)) (AND (GEQ s6 1) (GEQ s7248 1)) (AND (GEQ s6 1) (GEQ s7508 1)) (AND (GEQ s6 1) (GEQ s7866 1)) (AND (GEQ s6 1) (GEQ s6243 1)) (AND (GEQ s6 1) (GEQ s7687 1)) (AND (GEQ s6 1) (GEQ s6809 1)) (AND (GEQ s6 1) (GEQ s7069 1)) (AND (GEQ s6 1) (GEQ s6162 1)) (AND (GEQ s6 1) (GEQ s6422 1)) (AND (GEQ s6 1) (GEQ s7329 1)) (AND (GEQ s6 1) (GEQ s7589 1)) (AND (GEQ s6 1) (GEQ s7849 1)) (AND (GEQ s6 1) (GEQ s6601 1)) (AND (GEQ s6 1) (GEQ s6890 1)) (AND (GEQ s6 1) (GEQ s7150 1)) (AND (GEQ s6 1) (GEQ s7410 1)) (AND (GEQ s6 1) (GEQ s7670 1)) (AND (GEQ s6 1) (GEQ s7768 1)) (AND (GEQ s6 1) (GEQ s6341 1)) (AND (GEQ s6 1) (GEQ s6081 1)) (AND (GEQ s6 1) (GEQ s6520 1)) (AND (GEQ s6 1) (GEQ s6711 1)) (AND (GEQ s6 1) (GEQ s6971 1)) (AND (GEQ s6 1) (GEQ s7231 1)) (AND (GEQ s6 1) (GEQ s7491 1)) (AND (GEQ s6 1) (GEQ s7751 1)) (AND (GEQ s6 1) (GEQ s6260 1)) (AND (GEQ s6 1) (GEQ s8011 1)) (AND (GEQ s6 1) (GEQ s6439 1)) (AND (GEQ s6 1) (GEQ s7052 1)) (AND (GEQ s6 1) (GEQ s7312 1)) (AND (GEQ s6 1) (GEQ s7572 1)) (AND (GEQ s6 1) (GEQ s7930 1)) (AND (GEQ s6 1) (GEQ s6792 1)) (AND (GEQ s6 1) (GEQ s6179 1)) (AND (GEQ s6 1) (GEQ s6618 1)) (AND (GEQ s6 1) (GEQ s7393 1)) (AND (GEQ s6 1) (GEQ s7653 1)) (AND (GEQ s6 1) (GEQ s7913 1)) (AND (GEQ s6 1) (GEQ s6873 1)) (AND (GEQ s6 1) (GEQ s7133 1)) (AND (GEQ s6 1) (GEQ s6358 1)) (AND (GEQ s6 1) (GEQ s6098 1)) (AND (GEQ s6 1) (GEQ s6537 1)) (AND (GEQ s6 1) (GEQ s6694 1)) (AND (GEQ s6 1) (GEQ s7734 1)) (AND (GEQ s6 1) (GEQ s7832 1)) (AND (GEQ s6 1) (GEQ s6277 1)) (AND (GEQ s6 1) (GEQ s6954 1)) (AND (GEQ s6 1) (GEQ s7474 1)) (AND (GEQ s6 1) (GEQ s6017 1)) (AND (GEQ s6 1) (GEQ s6456 1)) (AND (GEQ s6 1) (GEQ s7214 1)) (AND (GEQ s6 1) (GEQ s6775 1)) (AND (GEQ s6 1) (GEQ s7035 1)) (AND (GEQ s6 1) (GEQ s7295 1)) (AND (GEQ s6 1) (GEQ s7555 1)) (AND (GEQ s6 1) (GEQ s7815 1)) (AND (GEQ s6 1) (GEQ s6196 1)) (AND (GEQ s6 1) (GEQ s6375 1)) (AND (GEQ s6 1) (GEQ s6635 1)) (AND (GEQ s6 1) (GEQ s7994 1)) (AND (GEQ s6 1) (GEQ s6856 1)) (AND (GEQ s6 1) (GEQ s7116 1)) (AND (GEQ s6 1) (GEQ s7376 1)) (AND (GEQ s6 1) (GEQ s7636 1)) (AND (GEQ s6 1) (GEQ s6115 1)) (AND (GEQ s6 1) (GEQ s6554 1)) (AND (GEQ s6 1) (GEQ s6677 1)) (AND (GEQ s6 1) (GEQ s7197 1)) (AND (GEQ s6 1) (GEQ s7457 1)) (AND (GEQ s6 1) (GEQ s7717 1)) (AND (GEQ s6 1) (GEQ s7977 1)) (AND (GEQ s6 1) (GEQ s6294 1)) (AND (GEQ s6 1) (GEQ s6937 1)) (AND (GEQ s6 1) (GEQ s6034 1)) (AND (GEQ s6 1) (GEQ s6758 1)) (AND (GEQ s6 1) (GEQ s6473 1)) (AND (GEQ s6 1) (GEQ s7798 1)) (AND (GEQ s6 1) (GEQ s7896 1)) (AND (GEQ s6 1) (GEQ s7018 1)) (AND (GEQ s6 1) (GEQ s6213 1)) (AND (GEQ s6 1) (GEQ s7538 1)) (AND (GEQ s6 1) (GEQ s6652 1)) (AND (GEQ s6 1) (GEQ s6392 1)) (AND (GEQ s6 1) (GEQ s7278 1)) (AND (GEQ s6 1) (GEQ s7879 1)) (AND (GEQ s6 1) (GEQ s6839 1)) (AND (GEQ s6 1) (GEQ s7099 1)) (AND (GEQ s6 1) (GEQ s7359 1)) (AND (GEQ s6 1) (GEQ s7619 1)) (AND (GEQ s6 1) (GEQ s6132 1)) (AND (GEQ s6 1) (GEQ s6311 1)) (AND (GEQ s6 1) (GEQ s6571 1)) (AND (GEQ s6 1) (GEQ s6660 1)) (AND (GEQ s6 1) (GEQ s6920 1)) (AND (GEQ s6 1) (GEQ s7180 1)) (AND (GEQ s6 1) (GEQ s7440 1)) (AND (GEQ s6 1) (GEQ s7700 1)) (AND (GEQ s6 1) (GEQ s6051 1)) (AND (GEQ s6 1) (GEQ s6490 1)) (AND (GEQ s6 1) (GEQ s6741 1)) (AND (GEQ s6 1) (GEQ s6230 1)) (AND (GEQ s6 1) (GEQ s7521 1)) (AND (GEQ s6 1) (GEQ s7001 1)) (AND (GEQ s6 1) (GEQ s6822 1)) (AND (GEQ s6 1) (GEQ s6409 1)) (AND (GEQ s6 1) (GEQ s7261 1)) (AND (GEQ s6 1) (GEQ s7862 1)) (AND (GEQ s6 1) (GEQ s7960 1)) (AND (GEQ s6 1) (GEQ s7082 1)) (AND (GEQ s6 1) (GEQ s6149 1)) (AND (GEQ s6 1) (GEQ s7602 1)) (AND (GEQ s6 1) (GEQ s6328 1)) (AND (GEQ s6 1) (GEQ s6588 1)) (AND (GEQ s6 1) (GEQ s7342 1)) (AND (GEQ s6 1) (GEQ s7781 1)) (AND (GEQ s6 1) (GEQ s7943 1)) (AND (GEQ s6 1) (GEQ s6903 1)) (AND (GEQ s6 1) (GEQ s7163 1)) (AND (GEQ s6 1) (GEQ s7423 1)) (AND (GEQ s6 1) (GEQ s7683 1)) (AND (GEQ s6 1) (GEQ s6507 1)) (AND (GEQ s6 1) (GEQ s6068 1)) (AND (GEQ s6 1) (GEQ s6247 1)) (AND (GEQ s6 1) (GEQ s6724 1)) (AND (GEQ s6 1) (GEQ s7764 1)) (AND (GEQ s6 1) (GEQ s6984 1)) (AND (GEQ s6 1) (GEQ s7504 1)) (AND (GEQ s6 1) (GEQ s6805 1)) (AND (GEQ s6 1) (GEQ s7244 1)) (AND (GEQ s6 1) (GEQ s6426 1)) (AND (GEQ s6 1) (GEQ s7065 1)) (AND (GEQ s6 1) (GEQ s6166 1)) (AND (GEQ s6 1) (GEQ s7585 1)) (AND (GEQ s6 1) (GEQ s6345 1)) (AND (GEQ s6 1) (GEQ s6605 1)) (AND (GEQ s6 1) (GEQ s6886 1)) (AND (GEQ s6 1) (GEQ s7926 1)) (AND (GEQ s6 1) (GEQ s7325 1)) (AND (GEQ s6 1) (GEQ s7146 1)) (AND (GEQ s6 1) (GEQ s7666 1)) (AND (GEQ s6 1) (GEQ s6085 1)) (AND (GEQ s6 1) (GEQ s6264 1)) (AND (GEQ s6 1) (GEQ s6524 1)) (AND (GEQ s6 1) (GEQ s6707 1)) (AND (GEQ s6 1) (GEQ s7406 1)) (AND (GEQ s6 1) (GEQ s7845 1)) (AND (GEQ s6 1) (GEQ s8007 1)) (AND (GEQ s6 1) (GEQ s6967 1)) (AND (GEQ s6 1) (GEQ s7487 1)) (AND (GEQ s6 1) (GEQ s6443 1)) (AND (GEQ s6 1) (GEQ s6183 1)) (AND (GEQ s6 1) (GEQ s6788 1)) (AND (GEQ s6 1) (GEQ s7227 1)) (AND (GEQ s6 1) (GEQ s7828 1)) (AND (GEQ s6 1) (GEQ s7048 1)) (AND (GEQ s6 1) (GEQ s7568 1)) (AND (GEQ s6 1) (GEQ s6362 1)) (AND (GEQ s6 1) (GEQ s6622 1)) (AND (GEQ s6 1) (GEQ s7308 1)) (AND (GEQ s6 1) (GEQ s7747 1)) (AND (GEQ s6 1) (GEQ s6869 1)) (AND (GEQ s6 1) (GEQ s7129 1)) (AND (GEQ s6 1) (GEQ s7649 1)) (AND (GEQ s6 1) (GEQ s6102 1)) (AND (GEQ s6 1) (GEQ s6281 1)) (AND (GEQ s6 1) (GEQ s6541 1)) (AND (GEQ s6 1) (GEQ s6690 1)) (AND (GEQ s6 1) (GEQ s6950 1)) (AND (GEQ s6 1) (GEQ s7389 1)) (AND (GEQ s6 1) (GEQ s7990 1)) (AND (GEQ s6 1) (GEQ s7730 1)) (AND (GEQ s6 1) (GEQ s6200 1)) (AND (GEQ s6 1) (GEQ s6021 1)) (AND (GEQ s6 1) (GEQ s6460 1)) (AND (GEQ s6 1) (GEQ s7210 1)) (AND (GEQ s6 1) (GEQ s7470 1)) (AND (GEQ s6 1) (GEQ s7909 1)) (AND (GEQ s6 1) (GEQ s6771 1)) (AND (GEQ s6 1) (GEQ s7031 1)) (AND (GEQ s6 1) (GEQ s7551 1)) (AND (GEQ s6 1) (GEQ s6639 1)) (AND (GEQ s6 1) (GEQ s6119 1)) (AND (GEQ s6 1) (GEQ s7291 1)) (AND (GEQ s6 1) (GEQ s6379 1)) (AND (GEQ s6 1) (GEQ s6852 1)) (AND (GEQ s6 1) (GEQ s7892 1)) (AND (GEQ s6 1) (GEQ s7112 1)) (AND (GEQ s6 1) (GEQ s7632 1)) (AND (GEQ s6 1) (GEQ s6298 1)) (AND (GEQ s6 1) (GEQ s6558 1)) (AND (GEQ s6 1) (GEQ s6673 1)) (AND (GEQ s6 1) (GEQ s6933 1)) (AND (GEQ s6 1) (GEQ s7811 1)) (AND (GEQ s6 1) (GEQ s7372 1)) (AND (GEQ s6 1) (GEQ s7193 1)) (AND (GEQ s6 1) (GEQ s7713 1)) (AND (GEQ s6 1) (GEQ s6038 1)) (AND (GEQ s6 1) (GEQ s6754 1)) (AND (GEQ s6 1) (GEQ s7014 1)) (AND (GEQ s6 1) (GEQ s6217 1)) (AND (GEQ s6 1) (GEQ s6477 1)) (AND (GEQ s6 1) (GEQ s7794 1)) (AND (GEQ s6 1) (GEQ s7453 1)) (AND (GEQ s6 1) (GEQ s6136 1)) (AND (GEQ s6 1) (GEQ s6396 1)) (AND (GEQ s6 1) (GEQ s7274 1)) (AND (GEQ s6 1) (GEQ s7534 1)) (AND (GEQ s6 1) (GEQ s7973 1)) (AND (GEQ s6 1) (GEQ s6835 1))), p2:(LT s3 1)], nbAcceptance=1, properties=[trans-labels, explicit-labels, trans-acc, no-univ-branch], stateDesc=[null, null, null, null][false, false, false, false]]
Product exploration timeout after 6690 steps with 817 reset in 10003 ms.
Product exploration timeout after 6700 steps with 821 reset in 10010 ms.
Complete graph has no SCC; deadlocks are unavoidable. place count 12016 transition count 24012
Detected that all paths lead to deadlock. Applying this knowledge to assert that all AP eventually converge : F ( (Ga|G!a) & (Gb|G!b)...)
Knowledge obtained : [(F (G (NOT p0))), (F (G (NOT p1))), (F (G p2)), p0, (NOT p1), (NOT p2)]
Adopting property with smaller alphabet thanks to knowledge :(F (G p2))
Property proved to be true thanks to knowledge :p0
FORMULA AirplaneLD-COL-4000-05 TRUE TECHNIQUES STRUCTURAL INITIAL_STATE
Treatment of property AirplaneLD-COL-4000-05 finished in 60045 ms.
Running Spot : CommandLine [args=[/home/mcc/BenchKit/bin//..//ltl2tgba, --hoaf=tv, -f, !(X((p0&&G((p1||G(p0))))))], workingDir=/home/mcc/execution]
Support contains 3 out of 12016 places. Attempting structural reductions.
Starting structural reductions, iteration 0 : 12016/12016 places, 24012/24012 transitions.
Applied a total of 0 rules in 27 ms. Remains 12016 /12016 variables (removed 0) and now considering 24012/24012 (removed 0) transitions.
// Phase 1: matrix 24012 rows 12016 cols
[2021-05-08 05:57:19] [INFO ] Computed 1 place invariants in 9775 ms
[2021-05-08 05:57:20] [INFO ] SMT solver returned unknown. Retrying;
[2021-05-08 05:57:20] [INFO ] Implicit Places using invariants in 10992 ms returned []
Implicit Place search using SMT only with invariants took 10993 ms to find 0 implicit places.
// Phase 1: matrix 24012 rows 12016 cols
[2021-05-08 05:57:30] [INFO ] Computed 1 place invariants in 9580 ms
[2021-05-08 05:57:31] [INFO ] SMT solver returned unknown. Retrying;
[2021-05-08 05:57:31] [INFO ] Dead Transitions using invariants and state equation in 10770 ms returned []
Finished structural reductions, in 1 iterations. Remains : 12016/12016 places, 24012/24012 transitions.
Stuttering acceptance computed with spot in 110 ms :[(NOT p0), (AND (NOT p0) (NOT p1)), (NOT p0), (NOT p0), true]
Running random walk in product with property : AirplaneLD-COL-4000-06 automaton TGBA [mat=[[{ cond=true, acceptance={} source=0 dest: 2}], [{ cond=p1, acceptance={} source=1 dest: 1}, { cond=(AND p0 (NOT p1)), acceptance={} source=1 dest: 3}, { cond=(AND (NOT p0) (NOT p1)), acceptance={} source=1 dest: 4}], [{ cond=(AND p0 p1), acceptance={} source=2 dest: 1}, { cond=(AND p0 (NOT p1)), acceptance={} source=2 dest: 3}, { cond=(NOT p0), acceptance={} source=2 dest: 4}], [{ cond=p0, acceptance={} source=3 dest: 3}, { cond=(NOT p0), acceptance={} source=3 dest: 4}], [{ cond=true, acceptance={0} source=4 dest: 4}]], initial=0, aps=[p1:(AND (GEQ s9 1) (GEQ s12 1)), p0:(GEQ s4 1)], nbAcceptance=1, properties=[trans-labels, explicit-labels, trans-acc, complete, deterministic, no-univ-branch, unambiguous, semi-deterministic, terminal, very-weak, weak, inherently-weak], stateDesc=[null, null, null, null, null][false, false, false, false, false]]
Entered a terminal (fully accepting) state of product in 5 steps with 0 reset in 13 ms.
FORMULA AirplaneLD-COL-4000-06 FALSE TECHNIQUES STUTTER_TEST
Treatment of property AirplaneLD-COL-4000-06 finished in 21972 ms.
Running Spot : CommandLine [args=[/home/mcc/BenchKit/bin//..//ltl2tgba, --hoaf=tv, -f, !(F(G(!p0)))], workingDir=/home/mcc/execution]
Support contains 1 out of 12016 places. Attempting structural reductions.
Starting structural reductions, iteration 0 : 12016/12016 places, 24012/24012 transitions.
Applied a total of 0 rules in 137 ms. Remains 12016 /12016 variables (removed 0) and now considering 24012/24012 (removed 0) transitions.
// Phase 1: matrix 24012 rows 12016 cols
[2021-05-08 05:57:41] [INFO ] Computed 1 place invariants in 9416 ms
[2021-05-08 05:57:42] [INFO ] SMT solver returned unknown. Retrying;
[2021-05-08 05:57:42] [INFO ] Implicit Places using invariants in 10521 ms returned []
Implicit Place search using SMT only with invariants took 10530 ms to find 0 implicit places.
// Phase 1: matrix 24012 rows 12016 cols
[2021-05-08 05:57:52] [INFO ] Computed 1 place invariants in 9520 ms
[2021-05-08 05:57:53] [INFO ] SMT solver returned unknown. Retrying;
[2021-05-08 05:57:53] [INFO ] Dead Transitions using invariants and state equation in 10650 ms returned []
Finished structural reductions, in 1 iterations. Remains : 12016/12016 places, 24012/24012 transitions.
Stuttering acceptance computed with spot in 48 ms :[p0]
Running random walk in product with property : AirplaneLD-COL-4000-07 automaton TGBA [mat=[[{ cond=(NOT p0), acceptance={} source=0 dest: 0}, { cond=p0, acceptance={0} source=0 dest: 0}]], initial=0, aps=[p0:(GEQ s2 1)], nbAcceptance=1, properties=[trans-labels, explicit-labels, trans-acc, complete, deterministic, no-univ-branch, unambiguous, semi-deterministic, stutter-invariant], stateDesc=[null][true]]
Product exploration timeout after 6840 steps with 835 reset in 10002 ms.
Product exploration timeout after 6790 steps with 829 reset in 10013 ms.
Complete graph has no SCC; deadlocks are unavoidable. place count 12016 transition count 24012
Detected that all paths lead to deadlock. Applying this knowledge to assert that all AP eventually converge : F ( (Ga|G!a) & (Gb|G!b)...)
Knowledge obtained : [(F (G (NOT p0))), p0]
Property proved to be true thanks to knowledge :(F (G (NOT p0)))
FORMULA AirplaneLD-COL-4000-07 TRUE TECHNIQUES STRUCTURAL INITIAL_STATE
Treatment of property AirplaneLD-COL-4000-07 finished in 62901 ms.
Running Spot : CommandLine [args=[/home/mcc/BenchKit/bin//..//ltl2tgba, --hoaf=tv, -f, !(X(F(!p0)))], workingDir=/home/mcc/execution]
Support contains 1 out of 12016 places. Attempting structural reductions.
Starting structural reductions, iteration 0 : 12016/12016 places, 24012/24012 transitions.
Applied a total of 0 rules in 32 ms. Remains 12016 /12016 variables (removed 0) and now considering 24012/24012 (removed 0) transitions.
// Phase 1: matrix 24012 rows 12016 cols
[2021-05-08 05:58:44] [INFO ] Computed 1 place invariants in 9385 ms
[2021-05-08 05:58:45] [INFO ] SMT solver returned unknown. Retrying;
[2021-05-08 05:58:45] [INFO ] Implicit Places using invariants in 10562 ms returned []
Implicit Place search using SMT only with invariants took 10562 ms to find 0 implicit places.
// Phase 1: matrix 24012 rows 12016 cols
[2021-05-08 05:58:54] [INFO ] Computed 1 place invariants in 9521 ms
[2021-05-08 05:58:55] [INFO ] SMT solver returned unknown. Retrying;
[2021-05-08 05:58:56] [INFO ] Dead Transitions using invariants and state equation in 10627 ms returned []
Finished structural reductions, in 1 iterations. Remains : 12016/12016 places, 24012/24012 transitions.
Stuttering acceptance computed with spot in 76 ms :[p0, p0]
Running random walk in product with property : AirplaneLD-COL-4000-09 automaton TGBA [mat=[[{ cond=true, acceptance={} source=0 dest: 1}], [{ cond=p0, acceptance={0} source=1 dest: 1}]], initial=0, aps=[p0:(GEQ s0 1)], nbAcceptance=1, properties=[trans-labels, explicit-labels, trans-acc, deterministic, no-univ-branch, unambiguous, semi-deterministic, very-weak, weak, inherently-weak], stateDesc=[null, null][false, false]]
Product exploration timeout after 3690 steps with 1220 reset in 10037 ms.
Product exploration timeout after 3680 steps with 1217 reset in 10026 ms.
Complete graph has no SCC; deadlocks are unavoidable. place count 12016 transition count 24012
Detected that all paths lead to deadlock. Applying this knowledge to assert that all AP eventually converge : F ( (Ga|G!a) & (Gb|G!b)...)
Knowledge obtained : [(F (G (NOT p0))), p0]
Property proved to be true thanks to knowledge :(F (G (NOT p0)))
FORMULA AirplaneLD-COL-4000-09 TRUE TECHNIQUES STRUCTURAL INITIAL_STATE
Treatment of property AirplaneLD-COL-4000-09 finished in 61132 ms.
Running Spot : CommandLine [args=[/home/mcc/BenchKit/bin//..//ltl2tgba, --hoaf=tv, -f, !(F((p0&&(!p1 U !p2))))], workingDir=/home/mcc/execution]
Support contains 4 out of 12016 places. Attempting structural reductions.
Starting structural reductions, iteration 0 : 12016/12016 places, 24012/24012 transitions.
Applied a total of 0 rules in 127 ms. Remains 12016 /12016 variables (removed 0) and now considering 24012/24012 (removed 0) transitions.
// Phase 1: matrix 24012 rows 12016 cols
[2021-05-08 05:59:45] [INFO ] Computed 1 place invariants in 9540 ms
[2021-05-08 05:59:46] [INFO ] SMT solver returned unknown. Retrying;
[2021-05-08 05:59:46] [INFO ] Implicit Places using invariants in 10768 ms returned []
Implicit Place search using SMT only with invariants took 10769 ms to find 0 implicit places.
// Phase 1: matrix 24012 rows 12016 cols
[2021-05-08 05:59:56] [INFO ] Computed 1 place invariants in 9303 ms
[2021-05-08 05:59:57] [INFO ] SMT solver returned unknown. Retrying;
[2021-05-08 05:59:57] [INFO ] Dead Transitions using invariants and state equation in 10421 ms returned []
Finished structural reductions, in 1 iterations. Remains : 12016/12016 places, 24012/24012 transitions.
Stuttering acceptance computed with spot in 78 ms :[p2, (OR (NOT p0) p2)]
Running random walk in product with property : AirplaneLD-COL-4000-10 automaton TGBA [mat=[[{ cond=(AND p2 (NOT p1)), acceptance={0} source=0 dest: 0}, { cond=(AND p2 p1), acceptance={0} source=0 dest: 1}], [{ cond=(AND p0 p2 (NOT p1)), acceptance={0} source=1 dest: 0}, { cond=(OR (NOT p0) (AND p2 p1)), acceptance={0} source=1 dest: 1}]], initial=1, aps=[p2:(LT s3 1), p1:(OR (LT s9 1) (LT s13 1)), p0:(LT s1 1)], nbAcceptance=1, properties=[trans-labels, explicit-labels, trans-acc, colored, deterministic, no-univ-branch, unambiguous, semi-deterministic, stutter-invariant, weak, inherently-weak], stateDesc=[null, null][true, true]]
Stuttering criterion allowed to conclude after 892 steps with 290 reset in 2465 ms.
FORMULA AirplaneLD-COL-4000-10 FALSE TECHNIQUES STUTTER_TEST
Treatment of property AirplaneLD-COL-4000-10 finished in 23915 ms.
Running Spot : CommandLine [args=[/home/mcc/BenchKit/bin//..//ltl2tgba, --hoaf=tv, -f, !(X(X(G((p0&&F(p1))))))], workingDir=/home/mcc/execution]
Support contains 3 out of 12016 places. Attempting structural reductions.
Starting structural reductions, iteration 0 : 12016/12016 places, 24012/24012 transitions.
Applied a total of 0 rules in 30 ms. Remains 12016 /12016 variables (removed 0) and now considering 24012/24012 (removed 0) transitions.
// Phase 1: matrix 24012 rows 12016 cols
[2021-05-08 06:00:09] [INFO ] Computed 1 place invariants in 9451 ms
[2021-05-08 06:00:10] [INFO ] SMT solver returned unknown. Retrying;
[2021-05-08 06:00:10] [INFO ] Implicit Places using invariants in 10393 ms returned []
Implicit Place search using SMT only with invariants took 10402 ms to find 0 implicit places.
// Phase 1: matrix 24012 rows 12016 cols
[2021-05-08 06:00:19] [INFO ] Computed 1 place invariants in 9388 ms
[2021-05-08 06:00:20] [INFO ] SMT solver returned unknown. Retrying;
[2021-05-08 06:00:20] [INFO ] Dead Transitions using invariants and state equation in 10528 ms returned []
Finished structural reductions, in 1 iterations. Remains : 12016/12016 places, 24012/24012 transitions.
Stuttering acceptance computed with spot in 166 ms :[(OR (NOT p0) (NOT p1)), (OR (NOT p0) (NOT p1)), (OR (NOT p0) (NOT p1)), true, (NOT p1)]
Running random walk in product with property : AirplaneLD-COL-4000-11 automaton TGBA [mat=[[{ cond=true, acceptance={} source=0 dest: 1}], [{ cond=true, acceptance={} source=1 dest: 2}], [{ cond=p0, acceptance={} source=2 dest: 2}, { cond=(NOT p0), acceptance={} source=2 dest: 3}, { cond=(AND p0 (NOT p1)), acceptance={} source=2 dest: 4}], [{ cond=true, acceptance={0} source=3 dest: 3}], [{ cond=(NOT p1), acceptance={0} source=4 dest: 4}]], initial=0, aps=[p0:(OR (LT s9 1) (LT s13 1) (LT s1 1)), p1:(LT s1 1)], nbAcceptance=1, properties=[trans-labels, explicit-labels, trans-acc, no-univ-branch, very-weak, weak, inherently-weak], stateDesc=[null, null, null, null, null][false, false, false, false, false]]
Product exploration timeout after 6130 steps with 829 reset in 10003 ms.
Product exploration timeout after 6130 steps with 832 reset in 10007 ms.
Complete graph has no SCC; deadlocks are unavoidable. place count 12016 transition count 24012
Detected that all paths lead to deadlock. Applying this knowledge to assert that all AP eventually converge : F ( (Ga|G!a) & (Gb|G!b)...)
Knowledge obtained : [(F (G p0)), (F (G p1)), p0, (NOT p1)]
Stuttering acceptance computed with spot in 174 ms :[(OR (NOT p0) (NOT p1)), (OR (NOT p0) (NOT p1)), (OR (NOT p0) (NOT p1)), true, (NOT p1)]
Product exploration timeout after 6100 steps with 823 reset in 10005 ms.
Product exploration timeout after 6160 steps with 829 reset in 10002 ms.
Applying partial POR strategy [false, false, true, true, true]
Stuttering acceptance computed with spot in 121 ms :[(OR (NOT p0) (NOT p1)), (OR (NOT p0) (NOT p1)), (OR (NOT p0) (NOT p1)), true, (NOT p1)]
Support contains 3 out of 12016 places. Attempting structural reductions.
Property had overlarge support with respect to TGBA, discarding it for now.
Starting structural reductions, iteration 0 : 12016/12016 places, 24012/24012 transitions.
Applied a total of 0 rules in 79 ms. Remains 12016 /12016 variables (removed 0) and now considering 24012/24012 (removed 0) transitions.
// Phase 1: matrix 24012 rows 12016 cols
[2021-05-08 06:01:30] [INFO ] Computed 1 place invariants in 9542 ms
[2021-05-08 06:01:31] [INFO ] SMT solver returned unknown. Retrying;
[2021-05-08 06:01:31] [INFO ] Dead Transitions using invariants and state equation in 10685 ms returned []
Finished structural reductions, in 1 iterations. Remains : 12016/12016 places, 24012/24012 transitions.
Product exploration timeout after 7840 steps with 1061 reset in 10007 ms.
Product exploration timeout after 7960 steps with 1059 reset in 10006 ms.
[2021-05-08 06:01:53] [INFO ] Flatten gal took : 707 ms
[2021-05-08 06:01:54] [INFO ] Flatten gal took : 606 ms
[2021-05-08 06:01:54] [INFO ] Time to serialize gal into /tmp/LTL6322766820376883306.gal : 118 ms
[2021-05-08 06:01:54] [INFO ] Time to serialize properties into /tmp/LTL9107386440631216591.ltl : 1 ms
Invoking ITS tools like this :CommandLine [args=[/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.202104292328/bin/its-ltl-linux64, --gc-threshold, 2000000, -i, /tmp/LTL6322766820376883306.gal, -t, CGAL, -LTL, /tmp/LTL9107386440631216591.ltl, -c, -stutter-deadlock, --gen-order, FOLLOW], workingDir=/home/mcc/execution]

its-ltl command run as :

/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.202104292328/bin/its-ltl-linux64 --gc-threshold 2000000 -i /tmp/LTL6322766820376883306.gal -t CGAL -LTL /tmp/LTL9107386440631216591.ltl -c -stutter-deadlock --gen-order FOLLOW
Read 1 LTL properties
Checking formula 0 : !((X(X(G((F("(stp4_0<1)"))&&("(((P1_0<1)||(Weight_Left_Wheel_1<1))||(stp4_0<1))"))))))
Formula 0 simplified : !XXG("(((P1_0<1)||(Weight_Left_Wheel_1<1))||(stp4_0<1))" & F"(stp4_0<1)")
Detected timeout of ITS tools.
[2021-05-08 06:02:09] [INFO ] Flatten gal took : 637 ms
[2021-05-08 06:02:09] [INFO ] Applying decomposition
[2021-05-08 06:02:10] [INFO ] Flatten gal took : 596 ms
Converted graph to binary with : CommandLine [args=[/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.louvain.binaries_1.0.0.202104292328/bin/convert-linux64, -i, /tmp/graph9050849096867744347.txt, -o, /tmp/graph9050849096867744347.bin, -w, /tmp/graph9050849096867744347.weights], workingDir=null]
Built communities with : CommandLine [args=[/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.louvain.binaries_1.0.0.202104292328/bin/louvain-linux64, /tmp/graph9050849096867744347.bin, -l, -1, -v, -w, /tmp/graph9050849096867744347.weights, -q, 0, -e, 0.001], workingDir=null]
[2021-05-08 06:02:11] [INFO ] Decomposing Gal with order
[2021-05-08 06:02:12] [INFO ] Rewriting arrays to variables to allow decomposition.
[2021-05-08 06:02:48] [INFO ] Removed a total of 11998 redundant transitions.
[2021-05-08 06:02:48] [INFO ] Flatten gal took : 35941 ms
[2021-05-08 06:02:51] [INFO ] Fuse similar labels procedure discarded/fused a total of 12001 labels/synchronizations in 1588 ms.
[2021-05-08 06:02:51] [INFO ] Time to serialize gal into /tmp/LTL6612197283202442485.gal : 97 ms
[2021-05-08 06:02:51] [INFO ] Time to serialize properties into /tmp/LTL10941004619490497831.ltl : 0 ms
Invoking ITS tools like this :CommandLine [args=[/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.202104292328/bin/its-ltl-linux64, --gc-threshold, 2000000, -i, /tmp/LTL6612197283202442485.gal, -t, CGAL, -LTL, /tmp/LTL10941004619490497831.ltl, -c, -stutter-deadlock], workingDir=/home/mcc/execution]

its-ltl command run as :

/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.202104292328/bin/its-ltl-linux64 --gc-threshold 2000000 -i /tmp/LTL6612197283202442485.gal -t CGAL -LTL /tmp/LTL10941004619490497831.ltl -c -stutter-deadlock
Read 1 LTL properties
Checking formula 0 : !((X(X(G((F("(u1.stp4_0<1)"))&&("(((i4.u5.P1_0<1)||(i4.u3.Weight_Left_Wheel_1<1))||(u1.stp4_0<1))"))))))
Formula 0 simplified : !XXG("(((i4.u5.P1_0<1)||(i4.u3.Weight_Left_Wheel_1<1))||(u1.stp4_0<1))" & F"(u1.stp4_0<1)")
Detected timeout of ITS tools.
Built C files in :
/tmp/ltsmin13343683263630732507
[2021-05-08 06:03:06] [INFO ] Built C files in 253ms conformant to PINS (ltsmin variant)in folder :/tmp/ltsmin13343683263630732507
Running compilation step : CommandLine [args=[gcc, -c, -I/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.ltsmin.binaries_1.0.0.202104292328/bin/include/, -I., -std=c99, -fPIC, -O2, model.c], workingDir=/tmp/ltsmin13343683263630732507]
WARNING : LTS min runner thread failed on error :java.lang.RuntimeException: Compilation or link of executable timed out.java.util.concurrent.TimeoutException: Subprocess running CommandLine [args=[gcc, -c, -I/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.ltsmin.binaries_1.0.0.202104292328/bin/include/, -I., -std=c99, -fPIC, -O2, model.c], workingDir=/tmp/ltsmin13343683263630732507] killed by timeout after 1 SECONDS
java.lang.RuntimeException: Compilation or link of executable timed out.java.util.concurrent.TimeoutException: Subprocess running CommandLine [args=[gcc, -c, -I/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.ltsmin.binaries_1.0.0.202104292328/bin/include/, -I., -std=c99, -fPIC, -O2, model.c], workingDir=/tmp/ltsmin13343683263630732507] killed by timeout after 1 SECONDS
at fr.lip6.move.gal.application.LTSminRunner$1.run(LTSminRunner.java:79)
at java.base/java.lang.Thread.run(Thread.java:834)
Treatment of property AirplaneLD-COL-4000-11 finished in 187723 ms.
Running Spot : CommandLine [args=[/home/mcc/BenchKit/bin//..//ltl2tgba, --hoaf=tv, -f, !((G(F(p0))||(F(p0)&&F((p1&&G(!p2))))))], workingDir=/home/mcc/execution]
Support contains 6006 out of 12016 places. Attempting structural reductions.
Starting structural reductions, iteration 0 : 12016/12016 places, 24012/24012 transitions.
Discarding 5996 places :
Symmetric choice reduction at 0 with 5996 rule applications. Total rules 5996 place count 6020 transition count 18016
Iterating global reduction 0 with 5996 rules applied. Total rules applied 11992 place count 6020 transition count 18016
Ensure Unique test removed 5996 transitions
Reduce isomorphic transitions removed 5996 transitions.
Iterating post reduction 0 with 5996 rules applied. Total rules applied 17988 place count 6020 transition count 12020
Applied a total of 17988 rules in 405 ms. Remains 6020 /12016 variables (removed 5996) and now considering 12020/24012 (removed 11992) transitions.
// Phase 1: matrix 12020 rows 6020 cols
[2021-05-08 06:03:09] [INFO ] Computed 1 place invariants in 1875 ms
[2021-05-08 06:03:10] [INFO ] SMT solver returned unknown. Retrying;
[2021-05-08 06:03:10] [INFO ] Implicit Places using invariants in 2433 ms returned [9]
Discarding 1 places :
Implicit Place search using SMT only with invariants took 2440 ms to find 1 implicit places.
// Phase 1: matrix 12020 rows 6019 cols
[2021-05-08 06:03:12] [INFO ] Computed 0 place invariants in 1993 ms
[2021-05-08 06:03:19] [INFO ] Dead Transitions using invariants and state equation in 9495 ms returned []
Starting structural reductions, iteration 1 : 6019/12016 places, 12020/24012 transitions.
Drop transitions removed 1 transitions
Trivial Post-agglo rules discarded 1 transitions
Performed 1 trivial Post agglomeration. Transition count delta: 1
Iterating post reduction 0 with 1 rules applied. Total rules applied 1 place count 6019 transition count 12019
Reduce places removed 1 places and 0 transitions.
Iterating post reduction 1 with 1 rules applied. Total rules applied 2 place count 6018 transition count 12019
Applied a total of 2 rules in 68 ms. Remains 6018 /6019 variables (removed 1) and now considering 12019/12020 (removed 1) transitions.
// Phase 1: matrix 12019 rows 6018 cols
[2021-05-08 06:03:22] [INFO ] Computed 0 place invariants in 1961 ms
[2021-05-08 06:03:22] [INFO ] Implicit Places using invariants in 2535 ms returned []
Implicit Place search using SMT only with invariants took 2546 ms to find 0 implicit places.
Finished structural reductions, in 2 iterations. Remains : 6018/12016 places, 12019/24012 transitions.
Stuttering acceptance computed with spot in 200 ms :[(NOT p0), (NOT p0), (OR (AND (NOT p0) (NOT p1)) (AND (NOT p0) p2)), (AND (NOT p0) p2), (OR (AND (NOT p0) (NOT p1)) (AND (NOT p0) p2)), (AND (NOT p0) p2)]
Running random walk in product with property : AirplaneLD-COL-4000-13 automaton TGBA [mat=[[{ cond=(NOT p0), acceptance={} source=0 dest: 1}, { cond=(OR (NOT p1) p2), acceptance={} source=0 dest: 2}, { cond=(AND p1 (NOT p2)), acceptance={} source=0 dest: 3}], [{ cond=(NOT p0), acceptance={0} source=1 dest: 1}], [{ cond=(OR (NOT p1) p2), acceptance={} source=2 dest: 2}, { cond=(AND p1 (NOT p2)), acceptance={} source=2 dest: 3}, { cond=(OR (AND (NOT p0) (NOT p1)) (AND (NOT p0) p2)), acceptance={} source=2 dest: 4}], [{ cond=p2, acceptance={} source=3 dest: 2}, { cond=(NOT p2), acceptance={} source=3 dest: 3}, { cond=(AND (NOT p0) p2), acceptance={} source=3 dest: 4}], [{ cond=(OR (AND (NOT p0) (NOT p1)) (AND (NOT p0) p2)), acceptance={0} source=4 dest: 4}, { cond=(AND (NOT p0) p1 (NOT p2)), acceptance={} source=4 dest: 5}], [{ cond=(AND (NOT p0) p2), acceptance={0} source=5 dest: 4}, { cond=(AND (NOT p0) (NOT p2)), acceptance={} source=5 dest: 5}]], initial=0, aps=[p0:(OR (LT s8 1) (LT s10 1)), p1:(OR (AND (GEQ s5 1) (GEQ s5096 1)) (AND (GEQ s5 1) (GEQ s5616 1)) (AND (GEQ s5 1) (GEQ s4056 1)) (AND (GEQ s5 1) (GEQ s4576 1)) (AND (GEQ s5 1) (GEQ s5356 1)) (AND (GEQ s5 1) (GEQ s4316 1)) (AND (GEQ s5 1) (GEQ s4917 1)) (AND (GEQ s5 1) (GEQ s5957 1)) (AND (GEQ s5 1) (GEQ s5795 1)) (AND (GEQ s5 1) (GEQ s4137 1)) (AND (GEQ s5 1) (GEQ s4657 1)) (AND (GEQ s5 1) (GEQ s5275 1)) (AND (GEQ s5 1) (GEQ s5535 1)) (AND (GEQ s5 1) (GEQ s4836 1)) (AND (GEQ s5 1) (GEQ s4397 1)) (AND (GEQ s5 1) (GEQ s5778 1)) (AND (GEQ s5 1) (GEQ s4039 1)) (AND (GEQ s5 1) (GEQ s4218 1)) (AND (GEQ s5 1) (GEQ s4478 1)) (AND (GEQ s5 1) (GEQ s4819 1)) (AND (GEQ s5 1) (GEQ s5079 1)) (AND (GEQ s5 1) (GEQ s5258 1)) (AND (GEQ s5 1) (GEQ s5518 1)) (AND (GEQ s5 1) (GEQ s5177 1)) (AND (GEQ s5 1) (GEQ s5697 1)) (AND (GEQ s5 1) (GEQ s4299 1)) (AND (GEQ s5 1) (GEQ s4559 1)) (AND (GEQ s5 1) (GEQ s4738 1)) (AND (GEQ s5 1) (GEQ s4998 1)) (AND (GEQ s5 1) (GEQ s5876 1)) (AND (GEQ s5 1) (GEQ s5437 1)) (AND (GEQ s5 1) (GEQ s5160 1)) (AND (GEQ s5 1) (GEQ s5680 1)) (AND (GEQ s5 1) (GEQ s4120 1)) (AND (GEQ s5 1) (GEQ s4640 1)) (AND (GEQ s5 1) (GEQ s4721 1)) (AND (GEQ s5 1) (GEQ s4981 1)) (AND (GEQ s5 1) (GEQ s5420 1)) (AND (GEQ s5 1) (GEQ s4380 1)) (AND (GEQ s5 1) (GEQ s4201 1)) (AND (GEQ s5 1) (GEQ s4461 1)) (AND (GEQ s5 1) (GEQ s5339 1)) (AND (GEQ s5 1) (GEQ s5599 1)) (AND (GEQ s5 1) (GEQ s5842 1)) (AND (GEQ s5 1) (GEQ s4022 1)) (AND (GEQ s5 1) (GEQ s4900 1)) (AND (GEQ s5 1) (GEQ s4103 1)) (AND (GEQ s5 1) (GEQ s4883 1)) (AND (GEQ s5 1) (GEQ s5143 1)) (AND (GEQ s5 1) (GEQ s5582 1)) (AND (GEQ s5 1) (GEQ s4282 1)) (AND (GEQ s5 1) (GEQ s4542 1)) (AND (GEQ s5 1) (GEQ s5322 1)) (AND (GEQ s5 1) (GEQ s5859 1)) (AND (GEQ s5 1) (GEQ s5241 1)) (AND (GEQ s5 1) (GEQ s5761 1)) (AND (GEQ s5 1) (GEQ s4363 1)) (AND (GEQ s5 1) (GEQ s4623 1)) (AND (GEQ s5 1) (GEQ s4802 1)) (AND (GEQ s5 1) (GEQ s5062 1)) (AND (GEQ s5 1) (GEQ s5501 1)) (AND (GEQ s5 1) (GEQ s5940 1)) (AND (GEQ s5 1) (GEQ s4704 1)) (AND (GEQ s5 1) (GEQ s5224 1)) (AND (GEQ s5 1) (GEQ s5744 1)) (AND (GEQ s5 1) (GEQ s4184 1)) (AND (GEQ s5 1) (GEQ s4444 1)) (AND (GEQ s5 1) (GEQ s4785 1)) (AND (GEQ s5 1) (GEQ s5045 1)) (AND (GEQ s5 1) (GEQ s5825 1)) (AND (GEQ s5 1) (GEQ s5484 1)) (AND (GEQ s5 1) (GEQ s4086 1)) (AND (GEQ s5 1) (GEQ s4265 1)) (AND (GEQ s5 1) (GEQ s4525 1)) (AND (GEQ s5 1) (GEQ s5403 1)) (AND (GEQ s5 1) (GEQ s5663 1)) (AND (GEQ s5 1) (GEQ s5906 1)) (AND (GEQ s5 1) (GEQ s4964 1)) (AND (GEQ s5 1) (GEQ s4167 1)) (AND (GEQ s5 1) (GEQ s4606 1)) (AND (GEQ s5 1) (GEQ s4346 1)) (AND (GEQ s5 1) (GEQ s4947 1)) (AND (GEQ s5 1) (GEQ s5207 1)) (AND (GEQ s5 1) (GEQ s5923 1)) (AND (GEQ s5 1) (GEQ s5386 1)) (AND (GEQ s5 1) (GEQ s5646 1)) (AND (GEQ s5 1) (GEQ s4427 1)) (AND (GEQ s5 1) (GEQ s4687 1)) (AND (GEQ s5 1) (GEQ s4866 1)) (AND (GEQ s5 1) (GEQ s5126 1)) (AND (GEQ s5 1) (GEQ s5305 1)) (AND (GEQ s5 1) (GEQ s5565 1)) (AND (GEQ s5 1) (GEQ s6004 1)) (AND (GEQ s5 1) (GEQ s5109 1)) (AND (GEQ s5 1) (GEQ s5288 1)) (AND (GEQ s5 1) (GEQ s5548 1)) (AND (GEQ s5 1) (GEQ s5889 1)) (AND (GEQ s5 1) (GEQ s4248 1)) (AND (GEQ s5 1) (GEQ s4508 1)) (AND (GEQ s5 1) (GEQ s4069 1)) (AND (GEQ s5 1) (GEQ s4849 1)) (AND (GEQ s5 1) (GEQ s4768 1)) (AND (GEQ s5 1) (GEQ s5028 1)) (AND (GEQ s5 1) (GEQ s5467 1)) (AND (GEQ s5 1) (GEQ s5970 1)) (AND (GEQ s5 1) (GEQ s4150 1)) (AND (GEQ s5 1) (GEQ s5727 1)) (AND (GEQ s5 1) (GEQ s4329 1)) (AND (GEQ s5 1) (GEQ s4589 1)) (AND (GEQ s5 1) (GEQ s4231 1)) (AND (GEQ s5 1) (GEQ s4751 1)) (AND (GEQ s5 1) (GEQ s5271 1)) (AND (GEQ s5 1) (GEQ s5450 1)) (AND (GEQ s5 1) (GEQ s5710 1)) (AND (GEQ s5 1) (GEQ s4410 1)) (AND (GEQ s5 1) (GEQ s4670 1)) (AND (GEQ s5 1) (GEQ s5987 1)) (AND (GEQ s5 1) (GEQ s5011 1)) (AND (GEQ s5 1) (GEQ s5369 1)) (AND (GEQ s5 1) (GEQ s5629 1)) (AND (GEQ s5 1) (GEQ s5808 1)) (AND (GEQ s5 1) (GEQ s4930 1)) (AND (GEQ s5 1) (GEQ s5190 1)) (AND (GEQ s5 1) (GEQ s4052 1)) (AND (GEQ s5 1) (GEQ s4491 1)) (AND (GEQ s5 1) (GEQ s5352 1)) (AND (GEQ s5 1) (GEQ s5612 1)) (AND (GEQ s5 1) (GEQ s4133 1)) (AND (GEQ s5 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s1951 1)) (OR (LT s7 1) (LT s1107 1)) (OR (LT s7 1) (LT s2471 1)) (OR (LT s7 1) (LT s2991 1)) (OR (LT s7 1) (LT s3707 1)) (OR (LT s7 1) (LT s1286 1)) (OR (LT s7 1) (LT s246 1)) (OR (LT s7 1) (LT s3528 1)) (OR (LT s7 1) (LT s2650 1)) (OR (LT s7 1) (LT s3170 1)) (OR (LT s7 1) (LT s3349 1)) (OR (LT s7 1) (LT s766 1)) (OR (LT s7 1) (LT s1772 1)) (OR (LT s7 1) (LT s33 1)) (OR (LT s7 1) (LT s553 1)) (OR (LT s7 1) (LT s1073 1)) (OR (LT s7 1) (LT s1985 1)) (OR (LT s7 1) (LT s2505 1)) (OR (LT s7 1) (LT s3025 1)) (OR (LT s7 1) (LT s3545 1)) (OR (LT s7 1) (LT s1465 1)) (OR (LT s7 1) (LT s3204 1)) (OR (LT s7 1) (LT s2164 1)) (OR (LT s7 1) (LT s1252 1)) (OR (LT s7 1) (LT s212 1)) (OR (LT s7 1) (LT s2684 1)) (OR (LT s7 1) (LT s1806 1)) (OR (LT s7 1) (LT s3383 1)) (OR (LT s7 1) (LT s732 1)) (OR (LT s7 1) (LT s3886 1)) (OR (LT s7 1) (LT s391 1)) (OR (LT s7 1) (LT s911 1)) (OR (LT s7 1) (LT s1627 1)) (OR (LT s7 1) (LT s2147 1)) (OR (LT s7 1) (LT s2667 1)) (OR (LT s7 1) (LT s3187 1)) (OR (LT s7 1) (LT s2326 1)) (OR (LT s7 1) (LT s3903 1)) (OR (LT s7 1) (LT s3366 1)) (OR (LT s7 1) (LT s570 1)) (OR (LT s7 1) (LT s1090 1)) (OR (LT s7 1) (LT s1448 1)) (OR (LT s7 1) (LT s1968 1)) (OR (LT s7 1) (LT s3724 1)) (OR (LT s7 1) (LT s2846 1)) (OR (LT s7 1) (LT s1269 1)) (OR (LT s7 1) (LT s3400 1)) (OR (LT s7 1) (LT s3741 1)) (OR (LT s7 1) (LT s1320 1)) (OR (LT s7 1) (LT s2360 1)) (OR (LT s7 1) (LT s621 1)) (OR (LT s7 1) (LT s1661 1)) (OR (LT s7 1) (LT s2701 1)) (OR (LT s7 1) (LT s280 1)) (OR (LT s7 1) (LT s800 1)) (OR (LT s7 1) (LT s1482 1)) (OR (LT s7 1) (LT s3562 1)) (OR (LT s7 1) (LT s2002 1)) (OR (LT s7 1) (LT s2880 1)) (OR (LT s7 1) (LT s2181 1)) (OR (LT s7 1) (LT s101 1)) (OR (LT s7 1) (LT s459 1)) (OR (LT s7 1) (LT s979 1)) (OR (LT s7 1) (LT s3579 1)) (OR (LT s7 1) (LT s118 1)) (OR (LT s7 1) (LT s1823 1)) (OR (LT s7 1) (LT s2863 1)) (OR (LT s7 1) (LT s1158 1)) (OR (LT s7 1) (LT s2522 1)) (OR (LT s7 1) (LT s3042 1)) (OR (LT s7 1) (LT s3221 1)) (OR (LT s7 1) (LT s3920 1)) (OR (LT s7 1) (LT s1644 1)) (OR (LT s7 1) (LT s2343 1)) (OR (LT s7 1) (LT s638 1)) (OR (LT s7 1) (LT s1337 1)) (OR (LT s7 1) (LT s425 1)) (OR (LT s7 1) (LT s945 1)) (OR (LT s7 1) (LT s3076 1)) (OR (LT s7 1) (LT s1857 1)) (OR (LT s7 1) (LT s2036 1)) (OR (LT s7 1) (LT s2897 1)) (OR (LT s7 1) (LT s3937 1)) (OR (LT s7 1) (LT s84 1)) (OR (LT s7 1) (LT s1124 1)) (OR (LT s7 1) (LT s3758 1)) (OR (LT s7 1) (LT s2377 1)) (OR (LT s7 1) (LT s2556 1)) (OR (LT s7 1) (LT s1303 1)) (OR (LT s7 1) (LT s604 1)) (OR (LT s7 1) (LT s1678 1)) (OR (LT s7 1) (LT s3255 1)) (OR (LT s7 1) (LT s263 1)) (OR (LT s7 1) (LT s783 1)) (OR (LT s7 1) (LT s1499 1)) (OR (LT s7 1) (LT s2019 1)) (OR (LT s7 1) (LT s2539 1)) (OR (LT s7 1) (LT s3059 1)) (OR (LT s7 1) (LT s3775 1)) (OR (LT s7 1) (LT s2198 1)) (OR (LT s7 1) (LT s3238 1)) (OR (LT s7 1) (LT s962 1)) (OR (LT s7 1) (LT s442 1)) (OR (LT s7 1) (LT s3596 1)) (OR (LT s7 1) (LT s1840 1)) (OR (LT s7 1) (LT s3417 1)) (OR (LT s7 1) (LT s1141 1)) (OR (LT s7 1) (LT s2718 1)))], nbAcceptance=1, properties=[trans-labels, explicit-labels, trans-acc, no-univ-branch, stutter-invariant], stateDesc=[null, null, null, null, null, null][true, true, true, true, true, true]]
Product exploration timeout after 12830 steps with 1763 reset in 10001 ms.
Product exploration timeout after 12840 steps with 1754 reset in 10005 ms.
Complete graph has no SCC; deadlocks are unavoidable. place count 6018 transition count 12019
Detected that all paths lead to deadlock. Applying this knowledge to assert that all AP eventually converge : F ( (Ga|G!a) & (Gb|G!b)...)
Knowledge obtained : [(F (G p0)), (F (G (NOT p1))), (F (G p2)), p0, (NOT p1), p2]
Property proved to be true thanks to knowledge :(F (G p0))
FORMULA AirplaneLD-COL-4000-13 TRUE TECHNIQUES STRUCTURAL INITIAL_STATE
Treatment of property AirplaneLD-COL-4000-13 finished in 42315 ms.
Running Spot : CommandLine [args=[/home/mcc/BenchKit/bin//..//ltl2tgba, --hoaf=tv, -f, !((F(!p0)&&(!p1 U G(p2))))], workingDir=/home/mcc/execution]
Support contains 4005 out of 12016 places. Attempting structural reductions.
Starting structural reductions, iteration 0 : 12016/12016 places, 24012/24012 transitions.
Discarding 7997 places :
Symmetric choice reduction at 0 with 7997 rule applications. Total rules 7997 place count 4019 transition count 16015
Iterating global reduction 0 with 7997 rules applied. Total rules applied 15994 place count 4019 transition count 16015
Ensure Unique test removed 7997 transitions
Reduce isomorphic transitions removed 7997 transitions.
Iterating post reduction 0 with 7997 rules applied. Total rules applied 23991 place count 4019 transition count 8018
Performed 1 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 1 with 1 Pre rules applied. Total rules applied 23991 place count 4019 transition count 8017
Deduced a syphon composed of 1 places in 11 ms
Reduce places removed 1 places and 0 transitions.
Iterating global reduction 1 with 2 rules applied. Total rules applied 23993 place count 4018 transition count 8017
Applied a total of 23993 rules in 486 ms. Remains 4018 /12016 variables (removed 7998) and now considering 8017/24012 (removed 15995) transitions.
// Phase 1: matrix 8017 rows 4018 cols
[2021-05-08 06:03:51] [INFO ] Computed 1 place invariants in 1222 ms
[2021-05-08 06:03:52] [INFO ] Implicit Places using invariants in 1730 ms returned []
// Phase 1: matrix 8017 rows 4018 cols
[2021-05-08 06:03:53] [INFO ] Computed 1 place invariants in 1144 ms
[2021-05-08 06:03:53] [INFO ] SMT solver returned unknown. Retrying;
[2021-05-08 06:03:53] [INFO ] Implicit Places using invariants and state equation in 1665 ms returned []
Implicit Place search using SMT with State Equation took 3397 ms to find 0 implicit places.
[2021-05-08 06:03:54] [INFO ] Redundant transitions in 1022 ms returned []
// Phase 1: matrix 8017 rows 4018 cols
[2021-05-08 06:03:56] [INFO ] Computed 1 place invariants in 1132 ms
[2021-05-08 06:03:56] [INFO ] SMT solver returned unknown. Retrying;
[2021-05-08 06:04:01] [INFO ] Dead Transitions using invariants and state equation in 6363 ms returned []
Finished structural reductions, in 1 iterations. Remains : 4018/12016 places, 8017/24012 transitions.
Stuttering acceptance computed with spot in 128 ms :[(OR (NOT p2) p0), true, p0, (NOT p2), (NOT p2)]
Running random walk in product with property : AirplaneLD-COL-4000-14 automaton TGBA [mat=[[{ cond=(AND (NOT p2) p1), acceptance={} source=0 dest: 1}, { cond=(OR (AND p0 p2) (AND p0 (NOT p1))), acceptance={} source=0 dest: 2}, { cond=(AND p2 p1), acceptance={} source=0 dest: 3}, { cond=(NOT p1), acceptance={} source=0 dest: 4}], [{ cond=true, acceptance={0} source=1 dest: 1}], [{ cond=p0, acceptance={0} source=2 dest: 2}], [{ cond=(NOT p2), acceptance={} source=3 dest: 1}, { cond=p2, acceptance={} source=3 dest: 3}], [{ cond=(AND (NOT p2) p1), acceptance={} source=4 dest: 1}, { cond=(AND p2 p1), acceptance={} source=4 dest: 3}, { cond=(AND (NOT p2) (NOT p1)), acceptance={0} source=4 dest: 4}, { cond=(AND p2 (NOT p1)), acceptance={} source=4 dest: 4}]], initial=0, aps=[p2:(OR (AND (GEQ s9 1) (GEQ s12 1)) (GEQ s3 1)), p1:(AND (OR (LT s7 1) (LT s3014 1)) (OR (LT s7 1) (LT s3875 1)) (OR (LT s7 1) (LT s1974 1)) (OR (LT s7 1) (LT s755 1)) (OR (LT s7 1) (LT s934 1)) (OR (LT s7 1) (LT s1795 1)) (OR (LT s7 1) (LT s2835 1)) (OR (LT s7 1) (LT s3193 1)) (OR (LT s7 1) (LT s3696 1)) (OR (LT s7 1) (LT s2494 1)) (OR (LT s7 1) (LT s235 1)) (OR (LT s7 1) (LT s414 1)) (OR (LT s7 1) (LT s2315 1)) (OR (LT s7 1) (LT s1616 1)) (OR (LT s7 1) (LT s1113 1)) (OR (LT s7 1) (LT s1437 1)) (OR (LT s7 1) (LT s1957 1)) (OR (LT s7 1) (LT s2477 1)) (OR (LT s7 1) (LT s2997 1)) (OR (LT s7 1) (LT s1292 1)) (OR (LT s7 1) (LT s2136 1)) (OR (LT s7 1) (LT s3176 1)) (OR (LT s7 1) (LT s3713 1)) (OR (LT s7 1) (LT s593 1)) (OR (LT s7 1) (LT s252 1)) (OR (LT s7 1) (LT s3355 1)) (OR (LT s7 1) (LT s3534 1)) (OR (LT s7 1) (LT s772 1)) (OR (LT s7 1) (LT s2656 1)) (OR (LT s7 1) (LT s1778 1)) (OR (LT s7 1) (LT s951 1)) (OR (LT s7 1) (LT s73 1)) (OR (LT s7 1) (LT s2170 1)) (OR (LT s7 1) (LT s2511 1)) (OR (LT s7 1) (LT s3551 1)) (OR (LT s7 1) (LT s1258 1)) (OR (LT s7 1) (LT s218 1)) (OR (LT s7 1) (LT s1471 1)) (OR (LT s7 1) (LT s559 1)) (OR (LT s7 1) (LT s3210 1)) (OR (LT s7 1) (LT s1991 1)) (OR (LT s7 1) (LT s1812 1)) (OR (LT s7 1) (LT s3389 1)) (OR (LT s7 1) (LT s738 1)) (OR (LT s7 1) (LT s3892 1)) (OR (LT s7 1) (LT s39 1)) (OR (LT s7 1) (LT s2690 1)) (OR (LT s7 1) (LT s397 1)) (OR (LT s7 1) (LT s917 1)) (OR (LT s7 1) (LT s2332 1)) (OR (LT s7 1) (LT s2673 1)) (OR (LT s7 1) (LT s3909 1)) (OR (LT s7 1) (LT s3372 1)) (OR (LT s7 1) (LT s1096 1)) (OR (LT s7 1) (LT s56 1)) (OR (LT s7 1) (LT s1633 1)) (OR (LT s7 1) (LT s2852 1)) (OR (LT s7 1) (LT s1454 1)) (OR (LT s7 1) (LT s3031 1)) (OR (LT s7 1) (LT s1275 1)) (OR (LT s7 1) (LT s576 1)) (OR (LT s7 1) (LT s2153 1)) (OR (LT s7 1) (LT s3730 1)) (OR (LT s7 1) (LT s2886 1)) (OR (LT s7 1) (LT s3406 1)) (OR (LT s7 1) (LT s3926 1)) (OR (LT s7 1) (LT s1326 1)) (OR (LT s7 1) (LT s1846 1)) (OR (LT s7 1) (LT s2366 1)) (OR (LT s7 1) (LT s627 1)) (OR (LT s7 1) (LT s806 1)) (OR (LT s7 1) (LT s1667 1)) (OR (LT s7 1) (LT s2707 1)) (OR (LT s7 1) (LT s3747 1)) (OR (LT s7 1) (LT s286 1)) (OR (LT s7 1) (LT s1488 1)) (OR (LT s7 1) (LT s985 1)) (OR (LT s7 1) (LT s2187 1)) (OR (LT s7 1) (LT s3065 1)) (OR (LT s7 1) (LT s3568 1)) (OR (LT s7 1) (LT s107 1)) (OR (LT s7 1) (LT s124 1)) (OR (LT s7 1) (LT s465 1)) (OR (LT s7 1) (LT s1829 1)) (OR (LT s7 1) (LT s2869 1)) (OR (LT s7 1) (LT s3585 1)) (OR (LT s7 1) (LT s1164 1)) (OR (LT s7 1) (LT s2008 1)) (OR (LT s7 1) (LT s3048 1)) (OR (LT s7 1) (LT s1650 1)) (OR (LT s7 1) (LT s823 1)) (OR (LT s7 1) (LT s2349 1)) (OR (LT s7 1) (LT s644 1)) (OR (LT s7 1) (LT s2528 1)) (OR (LT s7 1) (LT s3227 1)) (OR (LT s7 1) (LT s90 1)) (OR (LT s7 1) (LT s1130 1)) (OR (LT s7 1) (LT s1343 1)) (OR (LT s7 1) (LT s431 1)) (OR (LT s7 1) (LT s3082 1)) (OR (LT s7 1) (LT s2042 1)) (OR (LT s7 1) (LT s1863 1)) (OR (LT s7 1) (LT s2383 1)) (OR (LT s7 1) (LT s3943 1)) (OR (LT s7 1) (LT s1309 1)) (OR (LT s7 1) (LT s610 1)) (OR (LT s7 1) (LT s1684 1)) (OR (LT s7 1) (LT s3261 1)) (OR (LT s7 1) (LT s3764 1)) (OR (LT s7 1) (LT s2562 1)) (OR (LT s7 1) (LT s3960 1)) (OR (LT s7 1) (LT s269 1)) (OR (LT s7 1) (LT s789 1)) (OR (LT s7 1) (LT s968 1)) (OR (LT s7 1) (LT s1505 1)) (OR (LT s7 1) (LT s2204 1)) (OR (LT s7 1) (LT s2545 1)) (OR (LT s7 1) (LT s3244 1)) (OR (LT s7 1) (LT s3781 1)) (OR (LT s7 1) (LT s2903 1)) (OR (LT s7 1) (LT s3423 1)) (OR (LT s7 1) (LT s1147 1)) (OR (LT s7 1) (LT s448 1)) (OR (LT s7 1) (LT s2025 1)) (OR (LT s7 1) (LT s2724 1)) (OR (LT s7 1) (LT s3602 1)) (OR (LT s7 1) (LT s2758 1)) (OR (LT s7 1) (LT s3278 1)) (OR (LT s7 1) (LT s3798 1)) (OR (LT s7 1) (LT s1718 1)) (OR (LT s7 1) (LT s2238 1)) (OR (LT s7 1) (LT s158 1)) (OR (LT s7 1) (LT s678 1)) (OR (LT s7 1) (LT s1198 1)) (OR (LT s7 1) (LT s3619 1)) (OR (LT s7 1) (LT s499 1)) (OR (LT s7 1) (LT s1539 1)) (OR (LT s7 1) (LT s2579 1)) (OR (LT s7 1) (LT s2937 1)) (OR (LT s7 1) (LT s3457 1)) (OR (LT s7 1) (LT s857 1)) (OR (LT s7 1) (LT s1360 1)) (OR (LT s7 1) (LT s2059 1)) (OR (LT s7 1) (LT s3440 1)) (OR (LT s7 1) (LT s2400 1)) (OR (LT s7 1) (LT s2920 1)) (OR (LT s7 1) (LT s337 1)) (OR (LT s7 1) (LT s1701 1)) (OR (LT s7 1) (LT s1880 1)) (OR (LT s7 1) (LT s2741 1)) (OR (LT s7 1) (LT s1036 1)) (OR (LT s7 1) (LT s3977 1)) (OR (LT s7 1) (LT s695 1)) (OR (LT s7 1) (LT s1215 1)) (OR (LT s7 1) (LT s516 1)) (OR (LT s7 1) (LT s2221 1)) (OR (LT s7 1) (LT s3099 1)) (OR (LT s7 1) (LT s1522 1)) (OR (LT s7 1) (LT s2954 1)) (OR (LT s7 1) (LT s3474 1)) (OR (LT s7 1) (LT s3994 1)) (OR (LT s7 1) (LT s303 1)) (OR (LT s7 1) (LT s1914 1)) (OR (LT s7 1) (LT s1002 1)) (OR (LT s7 1) (LT s1735 1)) (OR (LT s7 1) (LT s2255 1)) (OR (LT s7 1) (LT s3815 1)) (OR (LT s7 1) (LT s1181 1)) (OR (LT s7 1) (LT s2434 1)) (OR (LT s7 1) (LT s1556 1)) (OR (LT s7 1) (LT s3133 1)) (OR (LT s7 1) (LT s482 1)) (OR (LT s7 1) (LT s3636 1)) (OR (LT s7 1) (LT s3832 1)) (OR (LT s7 1) (LT s661 1)) (OR (LT s7 1) (LT s840 1)) (OR (LT s7 1) (LT s1377 1)) (OR (LT s7 1) (LT s2076 1)) (OR (LT s7 1) (LT s3116 1)) (OR (LT s7 1) (LT s3653 1)) (OR (LT s7 1) (LT s2417 1)) (OR (LT s7 1) (LT s2775 1)) (OR (LT s7 1) (LT s3295 1)) (OR (LT s7 1) (LT s141 1)) (OR (LT s7 1) (LT s320 1)) (OR (LT s7 1) (LT s1897 1)) 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(OR (LT s7 1) (LT s3616 1)) (OR (LT s7 1) (LT s624 1)) (OR (LT s7 1) (LT s283 1)) (OR (LT s7 1) (LT s803 1)) (OR (LT s7 1) (LT s1357 1)) (OR (LT s7 1) (LT s1877 1)) (OR (LT s7 1) (LT s2934 1)) (OR (LT s7 1) (LT s3454 1)) (OR (LT s7 1) (LT s2056 1)) (OR (LT s7 1) (LT s2755 1)) (OR (LT s7 1) (LT s3957 1)) (OR (LT s7 1) (LT s982 1)) (OR (LT s7 1) (LT s104 1)) (OR (LT s7 1) (LT s2397 1)) (OR (LT s7 1) (LT s2738 1)) (OR (LT s7 1) (LT s1698 1)) (OR (LT s7 1) (LT s3437 1)) (OR (LT s7 1) (LT s462 1)) (OR (LT s7 1) (LT s121 1)) (OR (LT s7 1) (LT s1161 1)) (OR (LT s7 1) (LT s3974 1)) (OR (LT s7 1) (LT s2917 1)) (OR (LT s7 1) (LT s2218 1)) (OR (LT s7 1) (LT s3795 1)) (OR (LT s7 1) (LT s1519 1)) (OR (LT s7 1) (LT s3096 1)) (OR (LT s7 1) (LT s641 1)) (OR (LT s7 1) (LT s2951 1)) (OR (LT s7 1) (LT s3471 1)) (OR (LT s7 1) (LT s3991 1)) (OR (LT s7 1) (LT s692 1)) (OR (LT s7 1) (LT s871 1)) (OR (LT s7 1) (LT s1911 1)) (OR (LT s7 1) (LT s3812 1)) (OR (LT s7 1) (LT s1732 1)) (OR (LT s7 1) (LT s2772 1)) (OR (LT s7 1) (LT s351 1)) (OR (LT s7 1) (LT s1553 1)) (OR (LT s7 1) (LT s172 1)) (OR (LT s7 1) (LT s2431 1)) (OR (LT s7 1) (LT s3633 1)) (OR (LT s7 1) (LT s2252 1)) (OR (LT s7 1) (LT s3130 1)) (OR (LT s7 1) (LT s1050 1)) (OR (LT s7 1) (LT s189 1)) (OR (LT s7 1) (LT s530 1)) (OR (LT s7 1) (LT s1374 1)) (OR (LT s7 1) (LT s1229 1)) (OR (LT s7 1) (LT s2073 1)) (OR (LT s7 1) (LT s3113 1)) (OR (LT s7 1) (LT s3650 1)) (OR (LT s7 1) (LT s2414 1)) (OR (LT s7 1) (LT s1715 1)) (OR (LT s7 1) (LT s1894 1)) (OR (LT s7 1) (LT s709 1)) (OR (LT s7 1) (LT s2593 1)) (OR (LT s7 1) (LT s3292 1)) (OR (LT s7 1) (LT s888 1)) (OR (LT s7 1) (LT s496 1)) (OR (LT s7 1) (LT s2448 1)) (OR (LT s7 1) (LT s155 1)) (OR (LT s7 1) (LT s1195 1)) (OR (LT s7 1) (LT s1408 1)) (OR (LT s7 1) (LT s2107 1)) (OR (LT s7 1) (LT s3147 1)) (OR (LT s7 1) (LT s2806 1)) (OR (LT s7 1) (LT s3326 1)) (OR (LT s7 1) (LT s4008 1)) (OR (LT s7 1) (LT s854 1)) (OR (LT s7 1) (LT s1749 1)) (OR (LT s7 1) (LT s1928 1)) (OR (LT s7 1) (LT s675 1)) (OR (LT s7 1) (LT s3829 1)) (OR (LT s7 1) (LT s2627 1)) (OR (LT s7 1) (LT s1033 1)) (OR (LT s7 1) (LT s334 1)) (OR (LT s7 1) (LT s2269 1)) (OR (LT s7 1) (LT s3309 1)) (OR (LT s7 1) (LT s2610 1)) (OR (LT s7 1) (LT s1570 1)) (OR (LT s7 1) (LT s3846 1)) (OR (LT s7 1) (LT s3488 1)) (OR (LT s7 1) (LT s1212 1)) (OR (LT s7 1) (LT s1391 1)) (OR (LT s7 1) (LT s2789 1)) (OR (LT s7 1) (LT s2968 1)) (OR (LT s7 1) (LT s513 1)) (OR (LT s7 1) (LT s2090 1)) (OR (LT s7 1) (LT s3667 1)) (OR (LT s7 1) (LT s2823 1)) (OR (LT s7 1) (LT s3343 1)) (OR (LT s7 1) (LT s3863 1)) (OR (LT s7 1) (LT s223 1)) (OR (LT s7 1) (LT s743 1)) (OR (LT s7 1) (LT s1263 1)) (OR (LT s7 1) (LT s1783 1)) (OR (LT s7 1) (LT s2303 1)) (OR (LT s7 1) (LT s564 1)) (OR (LT s7 1) (LT s1604 1)) (OR (LT s7 1) (LT s3684 1)) (OR (LT s7 1) (LT s2644 1)) (OR (LT s7 1) (LT s1425 1)) (OR (LT s7 1) (LT s44 1)) (OR (LT s7 1) (LT s3002 1)) (OR (LT s7 1) (LT s2124 1)) (OR (LT s7 1) (LT s922 1)) (OR (LT s7 1) (LT s3505 1)) (OR (LT s7 1) (LT s61 1)) (OR (LT s7 1) (LT s1945 1)) (OR (LT s7 1) (LT s1101 1)) (OR (LT s7 1) (LT s2985 1)) (OR (LT s7 1) (LT s3522 1)) (OR (LT s7 1) (LT s402 1)) (OR (LT s7 1) (LT s760 1)) (OR (LT s7 1) (LT s1280 1)) (OR (LT s7 1) (LT s1766 1)) (OR (LT s7 1) (LT s2286 1)) (OR (LT s7 1) (LT s581 1)) (OR (LT s7 1) (LT s2465 1)) (OR (LT s7 1) (LT s3164 1)) (OR (LT s7 1) (LT s1587 1)) (OR (LT s7 1) (LT s27 1)) (OR (LT s7 1) (LT s1067 1)) (OR (LT s7 1) (LT s368 1)) (OR (LT s7 1) (LT s1979 1)) (OR (LT s7 1) (LT s3019 1)) (OR (LT s7 1) (LT s2678 1)) (OR (LT s7 1) (LT s3198 1)) (OR (LT s7 1) (LT s1800 1)) (OR (LT s7 1) (LT s2320 1)) (OR (LT s7 1) (LT s1246 1)) (OR (LT s7 1) (LT s726 1)) (OR (LT s7 1) (LT s3880 1)) (OR (LT s7 1) (LT s547 1)) (OR (LT s7 1) (LT s1621 1)) (OR (LT s7 1) (LT s2499 1)) (OR (LT s7 1) (LT s3701 1)) (OR (LT s7 1) (LT s3897 1)) (OR (LT s7 1) (LT s905 1)) (OR (LT s7 1) (LT s2141 1)) (OR (LT s7 1) (LT s2482 1)) (OR (LT s7 1) (LT s3181 1)) (OR (LT s7 1) (LT s1442 1)) (OR (LT s7 1) (LT s3718 1)) (OR (LT s7 1) (LT s2840 1)) (OR (LT s7 1) (LT s206 1)) (OR (LT s7 1) (LT s3360 1)) (OR (LT s7 1) (LT s385 1)) (OR (LT s7 1) (LT s1084 1)) (OR (LT s7 1) (LT s2661 1)) (OR (LT s7 1) (LT s1962 1)) (OR (LT s7 1) (LT s3539 1)) (OR (LT s7 1) (LT s3215 1)) (OR (LT s7 1) (LT s3735 1)) (OR (LT s7 1) (LT s95 1)) (OR (LT s7 1) (LT s615 1)) (OR (LT s7 1) (LT s1135 1)) (OR (LT s7 1) (LT s1655 1)) (OR (LT s7 1) (LT s2175 1)) (OR (LT s7 1) (LT s2695 1)) (OR (LT s7 1) (LT s436 1)) (OR (LT s7 1) (LT s1476 1)) (OR (LT s7 1) (LT s3556 1)) (OR (LT s7 1) (LT s2516 1)) (OR (LT s7 1) (LT s2874 1)) (OR (LT s7 1) (LT s3394 1)) (OR (LT s7 1) (LT s1314 1)) (OR (LT s7 1) (LT s794 1)) (OR (LT s7 1) (LT s1996 1)) (OR (LT s7 1) (LT s1817 1)) (OR (LT s7 1) (LT s2337 1)) (OR (LT s7 1) (LT s2857 1)) (OR (LT s7 1) (LT s3377 1)) (OR (LT s7 1) (LT s274 1)) (OR (LT s7 1) (LT s973 1)) (OR (LT s7 1) (LT s3914 1)) (OR (LT s7 1) (LT s1638 1)) (OR (LT s7 1) (LT s2158 1)) (OR (LT s7 1) (LT s632 1)) (OR (LT s7 1) (LT s1152 1)) (OR (LT s7 1) (LT s453 1)) (OR (LT s7 1) (LT s1459 1)) (OR (LT s7 1) (LT s3036 1)) (OR (LT s7 1) (LT s1851 1)) (OR (LT s7 1) (LT s2371 1)) (OR (LT s7 1) (LT s2891 1)) (OR (LT s7 1) (LT s3411 1)) (OR (LT s7 1) (LT s3931 1)) (OR (LT s7 1) (LT s240 1)) (OR (LT s7 1) (LT s939 1)) (OR (LT s7 1) (LT s2550 1)) (OR (LT s7 1) (LT s3070 1)) (OR (LT s7 1) (LT s3752 1)) (OR (LT s7 1) (LT s1118 1)) (OR (LT s7 1) (LT s598 1)) (OR (LT s7 1) (LT s2192 1)) (OR (LT s7 1) (LT s1672 1)) (OR (LT s7 1) (LT s1493 1)) (OR (LT s7 1) (LT s419 1)) (OR (LT s7 1) (LT s3573 1)) (OR (LT s7 1) (LT s3769 1)) (OR (LT s7 1) (LT s777 1)) (OR (LT s7 1) (LT s1297 1)) (OR (LT s7 1) (LT s2013 1)) (OR (LT s7 1) (LT s3053 1)) (OR (LT s7 1) (LT s3232 1)) (OR (LT s7 1) (LT s3590 1)) (OR (LT s7 1) (LT s1834 1)) (OR (LT s7 1) (LT s2354 1)) (OR (LT s7 1) (LT s78 1)) (OR (LT s7 1) (LT s2712 1)) (OR (LT s7 1) (LT s257 1)) (OR (LT s7 1) (LT s956 1)) (OR (LT s7 1) (LT s2533 1)) (OR (LT s7 1) (LT s3087 1)) (OR (LT s7 1) (LT s3607 1)) (OR (LT s7 1) (LT s487 1)) (OR (LT s7 1) (LT s1007 1)) (OR (LT s7 1) (LT s1527 1)) (OR (LT s7 1) (LT s2047 1)) (OR (LT s7 1) (LT s2567 1)) (OR (LT s7 1) (LT s1348 1)) (OR (LT s7 1) (LT s308 1)) (OR (LT s7 1) (LT s2746 1)) (OR (LT s7 1) (LT s3266 1)) (OR (LT s7 1) (LT s3948 1)) (OR (LT s7 1) (LT s1186 1)) (OR (LT s7 1) (LT s1868 1)) (OR (LT s7 1) (LT s2388 1)) (OR (LT s7 1) (LT s666 1)) (OR (LT s7 1) (LT s3965 1)) (OR (LT s7 1) (LT s1689 1)) (OR (LT s7 1) (LT s2209 1)) (OR (LT s7 1) (LT s2729 1)) (OR (LT s7 1) (LT s3249 1)) (OR (LT s7 1) (LT s845 1)) (OR (LT s7 1) (LT s3428 1)) (OR (LT s7 1) (LT s3786 1)) (OR (LT s7 1) (LT s504 1)) (OR (LT s7 1) (LT s1024 1)) (OR (LT s7 1) (LT s2908 1)) (OR (LT s7 1) (LT s146 1)) (OR (LT s7 1) (LT s1510 1)) (OR (LT s7 1) (LT s2030 1)) (OR (LT s7 1) (LT s1331 1)) (OR (LT s7 1) (LT s325 1)) (OR (LT s7 1) (LT s1723 1)) (OR (LT s7 1) (LT s2243 1)) (OR (LT s7 1) (LT s2763 1)) (OR (LT s7 1) (LT s3283 1)) (OR (LT s7 1) (LT s3803 1)) (OR (LT s7 1) (LT s811 1)) (OR (LT s7 1) (LT s3462 1)) (OR (LT s7 1) (LT s2064 1)) (OR (LT s7 1) (LT s2422 1)) (OR (LT s7 1) (LT s1544 1)) (OR (LT s7 1) (LT s470 1)) (OR (LT s7 1) (LT s990 1)) (OR (LT s7 1) (LT s3624 1)) (OR (LT s7 1) (LT s112 1)) (OR (LT s7 1) (LT s291 1)) (OR (LT s7 1) (LT s1365 1)) (OR (LT s7 1) (LT s2942 1)) (OR (LT s7 1) (LT s2405 1)) (OR (LT s7 1) (LT s2925 1)) (OR (LT s7 1) (LT s3445 1)) (OR (LT s7 1) (LT s3641 1)) (OR (LT s7 1) (LT s129 1)) (OR (LT s7 1) (LT s649 1)) (OR (LT s7 1) (LT s1169 1)) (OR (LT s7 1) (LT s1885 1)) (OR (LT s7 1) (LT s2584 1)) (OR (LT s7 1) (LT s3104 1)) (OR (LT s7 1) (LT s1706 1)) (OR (LT s7 1) (LT s2226 1)) (OR (LT s7 1) (LT s828 1)) (OR (LT s7 1) (LT s3982 1)) (OR (LT s7 1) (LT s359 1)) (OR (LT s7 1) (LT s879 1)) (OR (LT s7 1) (LT s1399 1)) (OR (LT s7 1) (LT s1919 1)) (OR (LT s7 1) (LT s2439 1)) (OR (LT s7 1) (LT s2959 1)) (OR (LT s7 1) (LT s3999 1)) (OR (LT s7 1) (LT s538 1)) (OR (LT s7 1) (LT s1058 1)) (OR (LT s7 1) (LT s1740 1)) (OR (LT s7 1) (LT s180 1)) (OR (LT s7 1) (LT s3820 1)) (OR (LT s7 1) (LT s2260 1)) (OR (LT s7 1) (LT s2618 1)) (OR (LT s7 1) (LT s3138 1)) (OR (LT s7 1) (LT s197 1)) (OR (LT s7 1) (LT s717 1)) (OR (LT s7 1) (LT s1561 1)) (OR (LT s7 1) (LT s2081 1)) (OR (LT s7 1) (LT s1237 1)) (OR (LT s7 1) (LT s2601 1)) (OR (LT s7 1) (LT s3121 1)) (OR (LT s7 1) (LT s3837 1)) (OR (LT s7 1) (LT s18 1)) (OR (LT s7 1) (LT s376 1)) (OR (LT s7 1) (LT s1382 1)) (OR (LT s7 1) (LT s1902 1)) (OR (LT s7 1) (LT s3300 1)) (OR (LT s7 1) (LT s896 1)) (OR (LT s7 1) (LT s2780 1)) (OR (LT s7 1) (LT s3658 1)) (OR (LT s7 1) (LT s3479 1)) (OR (LT s7 1) (LT s163 1)) (OR (LT s7 1) (LT s683 1)) (OR (LT s7 1) (LT s1203 1)) (OR (LT s7 1) (LT s1595 1)) (OR (LT s7 1) (LT s2115 1)) (OR (LT s7 1) (LT s2635 1)) (OR (LT s7 1) (LT s3155 1)) (OR (LT s7 1) (LT s3675 1)) (OR (LT s7 1) (LT s3334 1)) (OR (LT s7 1) (LT s2294 1)) (OR (LT s7 1) (LT s342 1)) (OR (LT s7 1) (LT s862 1)) (OR (LT s7 1) (LT s1936 1)) (OR (LT s7 1) (LT s1416 1)) (OR (LT s7 1) (LT s2814 1)) (OR (LT s7 1) (LT s1041 1)) (OR (LT s7 1) (LT s1757 1)) (OR (LT s7 1) (LT s2277 1)) (OR (LT s7 1) (LT s2797 1)) (OR (LT s7 1) (LT s3317 1)) (OR (LT s7 1) (LT s3513 1)) (OR (LT s7 1) (LT s521 1)) (OR (LT s7 1) (LT s3496 1)) (OR (LT s7 1) (LT s700 1)) (OR (LT s7 1) (LT s1220 1)) (OR (LT s7 1) (LT s2456 1)) (OR (LT s7 1) (LT s2976 1)) (OR (LT s7 1) (LT s1578 1)) (OR (LT s7 1) (LT s2098 1)) (OR (LT s7 1) (LT s3854 1)) (OR (LT s7 1) (LT s3871 1)) (OR (LT s7 1) (LT s751 1)) (OR (LT s7 1) (LT s1791 1)) (OR (LT s7 1) (LT s2831 1)) (OR (LT s7 1) (LT s1612 1)) (OR (LT s7 1) (LT s52 1)) (OR (LT s7 1) (LT s3010 1)) (OR (LT s7 1) (LT s3692 1)) (OR (LT s7 1) (LT s2132 1)) (OR (LT s7 1) (LT s2490 1)) (OR (LT s7 1) (LT s410 1)) (OR (LT s7 1) (LT s930 1)) (OR (LT s7 1) (LT s231 1)) (OR (LT s7 1) (LT s2311 1)) (OR (LT s7 1) (LT s69 1)) (OR (LT s7 1) (LT s589 1)) (OR (LT s7 1) (LT s1433 1)) (OR (LT s7 1) (LT s1953 1)) (OR (LT s7 1) (LT s1109 1)) (OR (LT s7 1) (LT s2473 1)) (OR (LT s7 1) (LT s2993 1)) (OR (LT s7 1) (LT s3709 1)) (OR (LT s7 1) (LT s1288 1)) (OR (LT s7 1) (LT s248 1)) (OR (LT s7 1) (LT s3530 1)) (OR (LT s7 1) (LT s2652 1)) (OR (LT s7 1) (LT s3172 1)) (OR (LT s7 1) (LT s3351 1)) (OR (LT s7 1) (LT s768 1)) (OR (LT s7 1) (LT s1774 1)) (OR (LT s7 1) (LT s35 1)) (OR (LT s7 1) (LT s555 1)) (OR (LT s7 1) (LT s1075 1)) (OR (LT s7 1) (LT s1987 1)) (OR (LT s7 1) (LT s2507 1)) (OR (LT s7 1) (LT s3027 1)) (OR (LT s7 1) (LT s3547 1)) (OR (LT s7 1) (LT s1467 1)) (OR (LT s7 1) (LT s3206 1)) (OR (LT s7 1) (LT s2166 1)) (OR (LT s7 1) (LT s1254 1)) (OR (LT s7 1) (LT s214 1)) (OR (LT s7 1) (LT s2686 1)) (OR (LT s7 1) (LT s1808 1)) (OR (LT s7 1) (LT s3385 1)) (OR (LT s7 1) (LT s734 1)) (OR (LT s7 1) (LT s3888 1)) (OR (LT s7 1) (LT s393 1)) (OR (LT s7 1) (LT s913 1)) (OR (LT s7 1) (LT s1629 1)) (OR (LT s7 1) (LT s2149 1)) (OR (LT s7 1) (LT s2669 1)) (OR (LT s7 1) (LT s3189 1)) (OR (LT s7 1) (LT s2328 1)) (OR (LT s7 1) (LT s3905 1)) (OR (LT s7 1) (LT s3368 1)) (OR (LT s7 1) (LT s572 1)) (OR (LT s7 1) (LT s1092 1)) (OR (LT s7 1) (LT s1450 1)) (OR (LT s7 1) (LT s1970 1)) (OR (LT s7 1) (LT s3726 1)) (OR (LT s7 1) (LT s2848 1)) (OR (LT s7 1) (LT s1271 1)) (OR (LT s7 1) (LT s3402 1)) (OR (LT s7 1) (LT s3743 1)) (OR (LT s7 1) (LT s1322 1)) (OR (LT s7 1) (LT s2362 1)) (OR (LT s7 1) (LT s623 1)) (OR (LT s7 1) (LT s1663 1)) (OR (LT s7 1) (LT s2703 1)) (OR (LT s7 1) (LT s282 1)) (OR (LT s7 1) (LT s802 1)) (OR (LT s7 1) (LT s1484 1)) (OR (LT s7 1) (LT s3564 1)) (OR (LT s7 1) (LT s2004 1)) (OR (LT s7 1) (LT s2882 1)) (OR (LT s7 1) (LT s2183 1)) (OR (LT s7 1) (LT s103 1)) (OR (LT s7 1) (LT s461 1)) (OR (LT s7 1) (LT s981 1)) (OR (LT s7 1) (LT s3581 1)) (OR (LT s7 1) (LT s120 1)) (OR (LT s7 1) (LT s1825 1)) (OR (LT s7 1) (LT s2865 1)) (OR (LT s7 1) (LT s1160 1)) (OR (LT s7 1) (LT s2524 1)) (OR (LT s7 1) (LT s3044 1)) (OR (LT s7 1) (LT s3223 1)) (OR (LT s7 1) (LT s3922 1)) (OR (LT s7 1) (LT s1646 1)) (OR (LT s7 1) (LT s2345 1)) (OR (LT s7 1) (LT s640 1)) (OR (LT s7 1) (LT s1339 1)) (OR (LT s7 1) (LT s427 1)) (OR (LT s7 1) (LT s947 1)) (OR (LT s7 1) (LT s3078 1)) (OR (LT s7 1) (LT s1859 1)) (OR (LT s7 1) (LT s2038 1)) (OR (LT s7 1) (LT s2899 1)) (OR (LT s7 1) (LT s3939 1)) (OR (LT s7 1) (LT s86 1)) (OR (LT s7 1) (LT s1126 1)) (OR (LT s7 1) (LT s3760 1)) (OR (LT s7 1) (LT s2379 1)) (OR (LT s7 1) (LT s2558 1)) (OR (LT s7 1) (LT s1305 1)) (OR (LT s7 1) (LT s606 1)) (OR (LT s7 1) (LT s1680 1)) (OR (LT s7 1) (LT s3257 1)) (OR (LT s7 1) (LT s265 1)) (OR (LT s7 1) (LT s785 1)) (OR (LT s7 1) (LT s1501 1)) (OR (LT s7 1) (LT s2021 1)) (OR (LT s7 1) (LT s2541 1)) (OR (LT s7 1) (LT s3061 1)) (OR (LT s7 1) (LT s3777 1)) (OR (LT s7 1) (LT s2200 1)) (OR (LT s7 1) (LT s3240 1)) (OR (LT s7 1) (LT s964 1)) (OR (LT s7 1) (LT s444 1)) (OR (LT s7 1) (LT s3598 1)) (OR (LT s7 1) (LT s1842 1)) (OR (LT s7 1) (LT s3419 1)) (OR (LT s7 1) (LT s1143 1)) (OR (LT s7 1) (LT s2720 1))), p0:(LT s3 1)], nbAcceptance=1, properties=[trans-labels, explicit-labels, trans-acc, no-univ-branch, stutter-invariant], stateDesc=[null, null, null, null, null][true, true, true, true, true]]
Entered a terminal (fully accepting) state of product in 3 steps with 0 reset in 5 ms.
FORMULA AirplaneLD-COL-4000-14 FALSE TECHNIQUES STUTTER_TEST
Treatment of property AirplaneLD-COL-4000-14 finished in 11481 ms.
Running Spot : CommandLine [args=[/home/mcc/BenchKit/bin//..//ltl2tgba, --hoaf=tv, -f, !((F(!p0)&&(F(p0)||G((G(p2)||p1)))))], workingDir=/home/mcc/execution]
Support contains 2005 out of 12016 places. Attempting structural reductions.
Starting structural reductions, iteration 0 : 12016/12016 places, 24012/24012 transitions.
Applied a total of 0 rules in 96 ms. Remains 12016 /12016 variables (removed 0) and now considering 24012/24012 (removed 0) transitions.
// Phase 1: matrix 24012 rows 12016 cols
[2021-05-08 06:04:10] [INFO ] Computed 1 place invariants in 9143 ms
[2021-05-08 06:04:11] [INFO ] SMT solver returned unknown. Retrying;
[2021-05-08 06:04:11] [INFO ] Implicit Places using invariants in 10227 ms returned []
Implicit Place search using SMT only with invariants took 10236 ms to find 0 implicit places.
// Phase 1: matrix 24012 rows 12016 cols
[2021-05-08 06:04:21] [INFO ] Computed 1 place invariants in 9273 ms
[2021-05-08 06:04:22] [INFO ] SMT solver returned unknown. Retrying;
[2021-05-08 06:04:22] [INFO ] Dead Transitions using invariants and state equation in 10415 ms returned []
Finished structural reductions, in 1 iterations. Remains : 12016/12016 places, 24012/24012 transitions.
Stuttering acceptance computed with spot in 158 ms :[p0, (AND (NOT p0) (NOT p1) (NOT p2)), (OR p0 (AND (NOT p1) (NOT p2))), (AND (NOT p0) (NOT p2)), (NOT p0)]
Running random walk in product with property : AirplaneLD-COL-4000-15 automaton TGBA [mat=[[{ cond=p0, acceptance={0} source=0 dest: 0}], [{ cond=(AND (NOT p0) p1), acceptance={} source=1 dest: 1}, { cond=(AND (NOT p0) (NOT p1) p2), acceptance={} source=1 dest: 3}, { cond=(AND (NOT p0) (NOT p1) (NOT p2)), acceptance={} source=1 dest: 4}], [{ cond=p0, acceptance={} source=2 dest: 0}, { cond=(AND (NOT p0) p1), acceptance={} source=2 dest: 1}, { cond=(AND (NOT p0) (NOT p1) p2), acceptance={} source=2 dest: 3}, { cond=(AND (NOT p0) (NOT p1) (NOT p2)), acceptance={} source=2 dest: 4}], [{ cond=(AND (NOT p0) p2), acceptance={} source=3 dest: 3}, { cond=(AND (NOT p0) (NOT p2)), acceptance={} source=3 dest: 4}], [{ cond=(NOT p0), acceptance={0} source=4 dest: 4}]], initial=2, aps=[p0:(OR (AND (GEQ s5 1) (GEQ s9096 1)) (AND (GEQ s5 1) (GEQ s9616 1)) (AND (GEQ s5 1) (GEQ s8056 1)) (AND (GEQ s5 1) (GEQ s8576 1)) (AND (GEQ s5 1) (GEQ s9356 1)) (AND (GEQ s5 1) (GEQ s8316 1)) (AND (GEQ s5 1) (GEQ s8917 1)) (AND (GEQ s5 1) (GEQ s9957 1)) (AND (GEQ s5 1) (GEQ s9795 1)) (AND (GEQ s5 1) (GEQ s8137 1)) (AND (GEQ s5 1) (GEQ s8657 1)) (AND (GEQ s5 1) (GEQ s9275 1)) (AND (GEQ s5 1) (GEQ s9535 1)) (AND (GEQ s5 1) (GEQ s8836 1)) (AND (GEQ s5 1) (GEQ s8397 1)) (AND (GEQ s5 1) (GEQ s9778 1)) (AND (GEQ s5 1) (GEQ s8039 1)) (AND (GEQ s5 1) (GEQ s8218 1)) (AND (GEQ s5 1) (GEQ s8478 1)) (AND (GEQ s5 1) (GEQ s8819 1)) (AND (GEQ s5 1) (GEQ s9079 1)) (AND (GEQ s5 1) (GEQ s9258 1)) (AND (GEQ s5 1) (GEQ s9518 1)) (AND (GEQ s5 1) (GEQ s9177 1)) (AND (GEQ s5 1) (GEQ s9697 1)) (AND (GEQ s5 1) (GEQ s8299 1)) (AND (GEQ s5 1) (GEQ s8559 1)) (AND (GEQ s5 1) (GEQ s8738 1)) (AND (GEQ s5 1) (GEQ s8998 1)) (AND (GEQ s5 1) (GEQ s9876 1)) (AND (GEQ s5 1) (GEQ s9437 1)) (AND (GEQ s5 1) (GEQ s9160 1)) (AND (GEQ s5 1) (GEQ s9680 1)) (AND (GEQ s5 1) (GEQ s8120 1)) (AND (GEQ s5 1) (GEQ s8640 1)) (AND (GEQ s5 1) (GEQ s8721 1)) (AND (GEQ s5 1) (GEQ s8981 1)) (AND (GEQ s5 1) (GEQ s9420 1)) (AND (GEQ s5 1) (GEQ s8380 1)) (AND (GEQ s5 1) (GEQ s8201 1)) (AND (GEQ s5 1) (GEQ s8461 1)) (AND (GEQ s5 1) (GEQ s9339 1)) (AND (GEQ s5 1) (GEQ s9599 1)) (AND (GEQ s5 1) (GEQ s9842 1)) (AND (GEQ s5 1) (GEQ s8022 1)) (AND (GEQ s5 1) (GEQ s8900 1)) (AND (GEQ s5 1) (GEQ s8103 1)) (AND (GEQ s5 1) (GEQ s8883 1)) (AND (GEQ s5 1) (GEQ s9143 1)) (AND (GEQ s5 1) (GEQ s9582 1)) (AND (GEQ s5 1) (GEQ s8282 1)) (AND (GEQ s5 1) (GEQ s8542 1)) (AND (GEQ s5 1) (GEQ s9322 1)) (AND (GEQ s5 1) (GEQ s9859 1)) (AND (GEQ s5 1) (GEQ s9241 1)) (AND (GEQ s5 1) (GEQ s9761 1)) (AND (GEQ s5 1) (GEQ s8363 1)) (AND (GEQ s5 1) (GEQ s8623 1)) (AND (GEQ s5 1) (GEQ s8802 1)) (AND (GEQ s5 1) (GEQ s9062 1)) (AND (GEQ s5 1) (GEQ s9501 1)) (AND (GEQ s5 1) (GEQ s9940 1)) (AND (GEQ s5 1) (GEQ s8704 1)) (AND (GEQ s5 1) (GEQ s9224 1)) (AND (GEQ s5 1) (GEQ s9744 1)) (AND (GEQ s5 1) (GEQ s8184 1)) (AND (GEQ s5 1) (GEQ s8444 1)) (AND (GEQ s5 1) (GEQ s8785 1)) (AND (GEQ s5 1) (GEQ s9045 1)) (AND (GEQ s5 1) (GEQ s9825 1)) (AND (GEQ s5 1) (GEQ s9484 1)) (AND (GEQ s5 1) (GEQ s8086 1)) (AND (GEQ s5 1) (GEQ s8265 1)) (AND (GEQ s5 1) (GEQ s8525 1)) (AND (GEQ s5 1) (GEQ s9403 1)) (AND (GEQ s5 1) (GEQ s9663 1)) (AND (GEQ s5 1) (GEQ s9906 1)) (AND (GEQ s5 1) (GEQ s8964 1)) (AND (GEQ s5 1) (GEQ s8167 1)) (AND (GEQ s5 1) (GEQ s8606 1)) (AND (GEQ s5 1) (GEQ s8346 1)) (AND (GEQ s5 1) (GEQ s8947 1)) (AND (GEQ s5 1) (GEQ s9207 1)) (AND (GEQ s5 1) (GEQ s9923 1)) (AND (GEQ s5 1) (GEQ s9386 1)) (AND (GEQ s5 1) (GEQ s9646 1)) (AND (GEQ s5 1) (GEQ s8427 1)) (AND (GEQ s5 1) (GEQ s8687 1)) (AND (GEQ s5 1) (GEQ s8866 1)) (AND (GEQ s5 1) (GEQ s9126 1)) (AND (GEQ s5 1) (GEQ s9305 1)) (AND (GEQ s5 1) (GEQ s9565 1)) (AND (GEQ s5 1) (GEQ s10004 1)) (AND (GEQ s5 1) (GEQ s9109 1)) (AND (GEQ s5 1) (GEQ s9288 1)) (AND (GEQ s5 1) (GEQ s9548 1)) (AND (GEQ s5 1) (GEQ s9889 1)) (AND (GEQ s5 1) (GEQ s8248 1)) (AND (GEQ s5 1) (GEQ s8508 1)) (AND (GEQ s5 1) (GEQ s8069 1)) (AND (GEQ s5 1) (GEQ s8849 1)) (AND (GEQ s5 1) (GEQ s8768 1)) (AND (GEQ s5 1) (GEQ s9028 1)) (AND (GEQ s5 1) (GEQ s9467 1)) (AND (GEQ s5 1) (GEQ s9970 1)) (AND (GEQ s5 1) (GEQ s8150 1)) (AND (GEQ s5 1) (GEQ s9727 1)) (AND (GEQ s5 1) (GEQ s8329 1)) (AND (GEQ s5 1) (GEQ s8589 1)) (AND (GEQ s5 1) (GEQ s8231 1)) (AND (GEQ s5 1) (GEQ s8751 1)) (AND (GEQ s5 1) (GEQ s9271 1)) (AND (GEQ s5 1) (GEQ s9450 1)) (AND (GEQ s5 1) (GEQ s9710 1)) (AND (GEQ s5 1) (GEQ s8410 1)) (AND (GEQ s5 1) (GEQ s8670 1)) (AND (GEQ s5 1) (GEQ s9987 1)) (AND (GEQ s5 1) (GEQ s9011 1)) (AND (GEQ s5 1) (GEQ s9369 1)) (AND (GEQ s5 1) (GEQ s9629 1)) (AND (GEQ s5 1) (GEQ s9808 1)) (AND (GEQ s5 1) (GEQ s8930 1)) (AND (GEQ s5 1) (GEQ s9190 1)) (AND (GEQ s5 1) (GEQ s8052 1)) (AND (GEQ s5 1) (GEQ s8491 1)) (AND (GEQ s5 1) (GEQ s9352 1)) (AND (GEQ s5 1) (GEQ s9612 1)) (AND (GEQ s5 1) (GEQ s8133 1)) (AND (GEQ s5 1) (GEQ s8312 1)) (AND (GEQ s5 1) (GEQ s8572 1)) (AND (GEQ s5 1) (GEQ s8913 1)) (AND (GEQ s5 1) (GEQ s9173 1)) (AND (GEQ s5 1) (GEQ s9953 1)) (AND (GEQ s5 1) (GEQ s8214 1)) (AND (GEQ s5 1) (GEQ s9791 1)) (AND (GEQ s5 1) (GEQ s8832 1)) (AND (GEQ s5 1) (GEQ s9092 1)) (AND (GEQ s5 1) (GEQ s8393 1)) (AND (GEQ s5 1) (GEQ s8653 1)) (AND (GEQ s5 1) (GEQ s9531 1)) (AND (GEQ s5 1) (GEQ s8295 1)) (AND (GEQ s5 1) (GEQ s8815 1)) (AND (GEQ s5 1) (GEQ s9335 1)) (AND (GEQ s5 1) (GEQ s9514 1)) (AND (GEQ s5 1) (GEQ s9774 1)) (AND (GEQ s5 1) (GEQ s8035 1)) (AND (GEQ s5 1) (GEQ s8474 1)) (AND (GEQ s5 1) (GEQ s9075 1)) (AND (GEQ s5 1) (GEQ s8734 1)) (AND (GEQ s5 1) (GEQ s9254 1)) (AND (GEQ s5 1) (GEQ s9872 1)) (AND (GEQ s5 1) (GEQ s8116 1)) (AND (GEQ s5 1) (GEQ s9433 1)) (AND (GEQ s5 1) (GEQ s9693 1)) (AND (GEQ s5 1) (GEQ s8555 1)) (AND (GEQ s5 1) (GEQ s8994 1)) (AND (GEQ s5 1) (GEQ s8197 1)) (AND (GEQ s5 1) (GEQ s8717 1)) (AND (GEQ s5 1) (GEQ s8636 1)) (AND (GEQ s5 1) (GEQ s8977 1)) (AND (GEQ s5 1) (GEQ s9237 1)) (AND (GEQ s5 1) (GEQ s9416 1)) (AND (GEQ s5 1) (GEQ s9676 1)) (AND (GEQ s5 1) (GEQ s8376 1)) (AND (GEQ s5 1) (GEQ s9838 1)) (AND (GEQ s5 1) (GEQ s8278 1)) (AND (GEQ s5 1) (GEQ s8896 1)) (AND (GEQ s5 1) (GEQ s9156 1)) (AND (GEQ s5 1) (GEQ s8457 1)) (AND (GEQ s5 1) (GEQ s9595 1)) (AND (GEQ s5 1) (GEQ s8018 1)) (AND (GEQ s5 1) (GEQ s8359 1)) (AND (GEQ s5 1) (GEQ s8879 1)) (AND (GEQ s5 1) (GEQ s9399 1)) (AND (GEQ s5 1) (GEQ s9855 1)) (AND (GEQ s5 1) (GEQ s8099 1)) (AND (GEQ s5 1) (GEQ s9139 1)) (AND (GEQ s5 1) (GEQ s9578 1)) (AND (GEQ s5 1) (GEQ s8538 1)) (AND (GEQ s5 1) (GEQ s8180 1)) (AND (GEQ s5 1) (GEQ s9318 1)) (AND (GEQ s5 1) (GEQ s8798 1)) (AND (GEQ s5 1) (GEQ s9497 1)) (AND (GEQ s5 1) (GEQ s9757 1)) (AND (GEQ s5 1) (GEQ s9936 1)) (AND (GEQ s5 1) (GEQ s8619 1)) (AND (GEQ s5 1) (GEQ s9058 1)) (AND (GEQ s5 1) (GEQ s8261 1)) (AND (GEQ s5 1) (GEQ s8781 1)) (AND (GEQ s5 1) (GEQ s9301 1)) (AND (GEQ s5 1) (GEQ s9821 1)) (AND (GEQ s5 1) (GEQ s8700 1)) (AND (GEQ s5 1) (GEQ s9480 1)) (AND (GEQ s5 1) (GEQ s9740 1)) (AND (GEQ s5 1) (GEQ s8440 1)) (AND (GEQ s5 1) (GEQ s9041 1)) (AND (GEQ s5 1) (GEQ s8342 1)) (AND (GEQ s5 1) (GEQ s9902 1)) (AND (GEQ s5 1) (GEQ s8960 1)) (AND (GEQ s5 1) (GEQ s9220 1)) (AND (GEQ s5 1) (GEQ s8082 1)) (AND (GEQ s5 1) (GEQ s8521 1)) (AND (GEQ s5 1) (GEQ s9659 1)) (AND (GEQ s5 1) (GEQ s8163 1)) (AND (GEQ s5 1) (GEQ s8423 1)) (AND (GEQ s5 1) (GEQ s8943 1)) (AND (GEQ s5 1) (GEQ s9463 1)) (AND (GEQ s5 1) (GEQ s9919 1)) (AND (GEQ s5 1) (GEQ s8602 1)) (AND (GEQ s5 1) (GEQ s9203 1)) (AND (GEQ s5 1) (GEQ s9642 1)) (AND (GEQ s5 1) (GEQ s8862 1)) (AND (GEQ s5 1) (GEQ s8244 1)) (AND (GEQ s5 1) (GEQ s9382 1)) (AND (GEQ s5 1) (GEQ s10000 1)) (AND (GEQ s5 1) (GEQ s8683 1)) (AND (GEQ s5 1) (GEQ s9122 1)) (AND (GEQ s5 1) (GEQ s9561 1)) (AND (GEQ s5 1) (GEQ s9365 1)) (AND (GEQ s5 1) (GEQ s9885 1)) (AND (GEQ s5 1) (GEQ s8325 1)) (AND (GEQ s5 1) (GEQ s8845 1)) (AND (GEQ s5 1) (GEQ s9105 1)) (AND (GEQ s5 1) (GEQ s9544 1)) (AND (GEQ s5 1) (GEQ s8504 1)) (AND (GEQ s5 1) (GEQ s8065 1)) (AND (GEQ s5 1) (GEQ s8764 1)) (AND (GEQ s5 1) (GEQ s9284 1)) (AND (GEQ s5 1) (GEQ s9966 1)) (AND (GEQ s5 1) (GEQ s8406 1)) (AND (GEQ s5 1) (GEQ s9024 1)) (AND (GEQ s5 1) (GEQ s8146 1)) (AND (GEQ s5 1) (GEQ s9723 1)) (AND (GEQ s5 1) (GEQ s8585 1)) (AND (GEQ s5 1) (GEQ s8227 1)) (AND (GEQ s5 1) (GEQ s8487 1)) (AND (GEQ s5 1) (GEQ s8747 1)) (AND (GEQ s5 1) (GEQ s9007 1)) (AND (GEQ s5 1) (GEQ s9267 1)) (AND (GEQ s5 1) (GEQ s9527 1)) (AND (GEQ s5 1) (GEQ s9983 1)) (AND (GEQ s5 1) (GEQ s9706 1)) (AND (GEQ s5 1) (GEQ s8666 1)) (AND (GEQ s5 1) (GEQ s9446 1)) (AND (GEQ s5 1) (GEQ s9804 1)) (AND (GEQ s5 1) (GEQ s8926 1)) (AND (GEQ s5 1) (GEQ s8308 1)) (AND (GEQ s5 1) (GEQ s9625 1)) (AND (GEQ s5 1) (GEQ s9186 1)) (AND (GEQ s5 1) (GEQ s8048 1)) (AND (GEQ s5 1) (GEQ s8389 1)) (AND (GEQ s5 1) (GEQ s8909 1)) (AND (GEQ s5 1) (GEQ s9429 1)) (AND (GEQ s5 1) (GEQ s9949 1)) (AND (GEQ s5 1) (GEQ s8568 1)) (AND (GEQ s5 1) (GEQ s9608 1)) (AND (GEQ s5 1) (GEQ s8129 1)) (AND (GEQ s5 1) (GEQ s9169 1)) (AND (GEQ s5 1) (GEQ s8210 1)) (AND (GEQ s5 1) (GEQ s8470 1)) (AND (GEQ s5 1) (GEQ s8828 1)) (AND (GEQ s5 1) (GEQ s9348 1)) (AND (GEQ s5 1) (GEQ s9787 1)) (AND (GEQ s5 1) (GEQ s9088 1)) (AND (GEQ s5 1) (GEQ s8649 1)) (AND (GEQ s5 1) (GEQ s8031 1)) (AND (GEQ s5 1) (GEQ s8291 1)) (AND (GEQ s5 1) (GEQ s8551 1)) (AND (GEQ s5 1) (GEQ s8811 1)) (AND (GEQ s5 1) (GEQ s9071 1)) (AND (GEQ s5 1) (GEQ s9331 1)) (AND (GEQ s5 1) (GEQ s9591 1)) (AND (GEQ s5 1) (GEQ s9770 1)) (AND (GEQ s5 1) (GEQ s8730 1)) (AND (GEQ s5 1) (GEQ s8990 1)) (AND (GEQ s5 1) (GEQ s9510 1)) (AND (GEQ s5 1) (GEQ s9868 1)) (AND (GEQ s5 1) (GEQ s8372 1)) (AND (GEQ s5 1) (GEQ s9250 1)) (AND (GEQ s5 1) (GEQ s8112 1)) (AND (GEQ s5 1) (GEQ s9689 1)) (AND (GEQ s5 1) (GEQ s8193 1)) (AND (GEQ s5 1) (GEQ s8453 1)) (AND (GEQ s5 1) (GEQ s8713 1)) (AND (GEQ s5 1) (GEQ s8973 1)) (AND (GEQ s5 1) (GEQ s9493 1)) (AND (GEQ s5 1) (GEQ s10013 1)) (AND (GEQ s5 1) (GEQ s8632 1)) (AND (GEQ s5 1) (GEQ s9233 1)) (AND (GEQ s5 1) (GEQ s9672 1)) (AND (GEQ s5 1) (GEQ s9834 1)) (AND (GEQ s5 1) (GEQ s8274 1)) (AND (GEQ s5 1) (GEQ s8534 1)) (AND (GEQ s5 1) (GEQ s8892 1)) (AND (GEQ s5 1) (GEQ s9412 1)) (AND (GEQ s5 1) (GEQ s9152 1)) (AND (GEQ s5 1) (GEQ s8095 1)) (AND (GEQ s5 1) (GEQ s8615 1)) (AND (GEQ s5 1) (GEQ s8355 1)) (AND (GEQ s5 1) (GEQ s8875 1)) (AND (GEQ s5 1) (GEQ s9135 1)) (AND (GEQ s5 1) (GEQ s9395 1)) (AND (GEQ s5 1) (GEQ s9655 1)) (AND (GEQ s5 1) (GEQ s9851 1)) (AND (GEQ s5 1) (GEQ s8176 1)) (AND (GEQ s5 1) (GEQ s8436 1)) (AND (GEQ s5 1) (GEQ s9314 1)) (AND (GEQ s5 1) (GEQ s9574 1)) (AND (GEQ s5 1) (GEQ s8794 1)) (AND (GEQ s5 1) (GEQ s9054 1)) (AND (GEQ s5 1) (GEQ s9932 1)) (AND (GEQ s5 1) (GEQ s9753 1)) (AND (GEQ s5 1) (GEQ s8257 1)) (AND (GEQ s5 1) (GEQ s8517 1)) (AND (GEQ s5 1) (GEQ s8777 1)) (AND (GEQ s5 1) (GEQ s9037 1)) (AND (GEQ s5 1) (GEQ s9297 1)) (AND (GEQ s5 1) (GEQ s9557 1)) (AND (GEQ s5 1) (GEQ s9817 1)) (AND (GEQ s5 1) (GEQ s8696 1)) (AND (GEQ s5 1) (GEQ s9736 1)) (AND (GEQ s5 1) (GEQ s8078 1)) (AND (GEQ s5 1) (GEQ s8338 1)) (AND (GEQ s5 1) (GEQ s8598 1)) (AND (GEQ s5 1) (GEQ s9898 1)) (AND (GEQ s5 1) (GEQ s8956 1)) (AND (GEQ s5 1) (GEQ s9476 1)) (AND (GEQ s5 1) (GEQ s9216 1)) (AND (GEQ s5 1) (GEQ s8159 1)) (AND (GEQ s5 1) (GEQ s8419 1)) (AND (GEQ s5 1) (GEQ s8679 1)) (AND (GEQ s5 1) (GEQ s8939 1)) (AND (GEQ s5 1) (GEQ s9199 1)) (AND (GEQ s5 1) (GEQ s9459 1)) (AND (GEQ s5 1) (GEQ s9719 1)) (AND (GEQ s5 1) (GEQ s9915 1)) (AND (GEQ s5 1) (GEQ s8500 1)) (AND (GEQ s5 1) (GEQ s8858 1)) (AND (GEQ s5 1) (GEQ s9118 1)) (AND (GEQ s5 1) (GEQ s8240 1)) (AND (GEQ s5 1) (GEQ s9378 1)) (AND (GEQ s5 1) (GEQ s9638 1)) (AND (GEQ s5 1) (GEQ s9996 1)) (AND (GEQ s5 1) (GEQ s8841 1)) (AND (GEQ s5 1) (GEQ s9101 1)) (AND (GEQ s5 1) (GEQ s9361 1)) (AND (GEQ s5 1) (GEQ s9621 1)) (AND (GEQ s5 1) (GEQ s9881 1)) (AND (GEQ s5 1) (GEQ s8061 1)) (AND (GEQ s5 1) (GEQ s8321 1)) (AND (GEQ s5 1) (GEQ s8581 1)) (AND (GEQ s5 1) (GEQ s8760 1)) (AND (GEQ s5 1) (GEQ s9020 1)) (AND (GEQ s5 1) (GEQ s9280 1)) (AND (GEQ s5 1) (GEQ s9540 1)) (AND (GEQ s5 1) (GEQ s9962 1)) (AND (GEQ s5 1) (GEQ s8142 1)) (AND (GEQ s5 1) (GEQ s8402 1)) (AND (GEQ s5 1) (GEQ s8662 1)) (AND (GEQ s5 1) (GEQ s9523 1)) (AND (GEQ s5 1) (GEQ s9783 1)) (AND (GEQ s5 1) (GEQ s9979 1)) (AND (GEQ s5 1) (GEQ s8483 1)) (AND (GEQ s5 1) (GEQ s9003 1)) (AND (GEQ s5 1) (GEQ s8223 1)) (AND (GEQ s5 1) (GEQ s9263 1)) (AND (GEQ s5 1) (GEQ s9182 1)) (AND (GEQ s5 1) (GEQ s9442 1)) (AND (GEQ s5 1) (GEQ s9702 1)) (AND (GEQ s5 1) (GEQ s9800 1)) (AND (GEQ s5 1) (GEQ s8564 1)) (AND (GEQ s5 1) (GEQ s8922 1)) (AND (GEQ s5 1) (GEQ s8044 1)) (AND (GEQ s5 1) (GEQ s8304 1)) (AND (GEQ s5 1) (GEQ s8743 1)) (AND (GEQ s5 1) (GEQ s8125 1)) (AND (GEQ s5 1) (GEQ s8385 1)) (AND (GEQ s5 1) (GEQ s8645 1)) (AND (GEQ s5 1) (GEQ s8905 1)) (AND (GEQ s5 1) (GEQ s9165 1)) (AND (GEQ s5 1) (GEQ s9425 1)) (AND (GEQ s5 1) (GEQ s9685 1)) (AND (GEQ s5 1) (GEQ s9945 1)) (AND (GEQ s5 1) (GEQ s8726 1)) (AND (GEQ s5 1) (GEQ s8824 1)) (AND (GEQ s5 1) (GEQ s9084 1)) (AND (GEQ s5 1) (GEQ s9344 1)) (AND (GEQ s5 1) (GEQ s9604 1)) (AND (GEQ s5 1) (GEQ s8466 1)) (AND (GEQ s5 1) (GEQ s8206 1)) (AND (GEQ s5 1) (GEQ s9847 1)) (AND (GEQ s5 1) (GEQ s8027 1)) (AND (GEQ s5 1) (GEQ s8547 1)) (AND (GEQ s5 1) (GEQ s9067 1)) (AND (GEQ s5 1) (GEQ s9587 1)) (AND (GEQ s5 1) (GEQ s8287 1)) (AND (GEQ s5 1) (GEQ s9327 1)) (AND (GEQ s5 1) (GEQ s9864 1)) (AND (GEQ s5 1) (GEQ s9246 1)) (AND (GEQ s5 1) (GEQ s9506 1)) (AND (GEQ s5 1) (GEQ s9766 1)) (AND (GEQ s5 1) (GEQ s8628 1)) (AND (GEQ s5 1) (GEQ s8108 1)) (AND (GEQ s5 1) (GEQ s8368 1)) (AND (GEQ s5 1) (GEQ s8986 1)) (AND (GEQ s5 1) (GEQ s8807 1)) (AND (GEQ s5 1) (GEQ s8969 1)) (AND (GEQ s5 1) (GEQ s9229 1)) (AND (GEQ s5 1) (GEQ s9489 1)) (AND (GEQ s5 1) (GEQ s9749 1)) (AND (GEQ s5 1) (GEQ s10009 1)) (AND (GEQ s5 1) (GEQ s8449 1)) (AND (GEQ s5 1) (GEQ s8189 1)) (AND (GEQ s5 1) (GEQ s9830 1)) (AND (GEQ s5 1) (GEQ s8790 1)) (AND (GEQ s5 1) (GEQ s8888 1)) (AND (GEQ s5 1) (GEQ s9148 1)) (AND (GEQ s5 1) (GEQ s9408 1)) (AND (GEQ s5 1) (GEQ s9668 1)) (AND (GEQ s5 1) (GEQ s8530 1)) (AND (GEQ s5 1) (GEQ s8709 1)) (AND (GEQ s5 1) (GEQ s9911 1)) (AND (GEQ s5 1) (GEQ s8270 1)) (AND (GEQ s5 1) (GEQ s8091 1)) (AND (GEQ s5 1) (GEQ s8611 1)) (AND (GEQ s5 1) (GEQ s9131 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1)) (AND (GEQ s5 1) (GEQ s9164 1)) (AND (GEQ s5 1) (GEQ s9424 1)) (AND (GEQ s5 1) (GEQ s9684 1)) (AND (GEQ s5 1) (GEQ s9944 1)) (AND (GEQ s5 1) (GEQ s8124 1)) (AND (GEQ s5 1) (GEQ s8384 1)) (AND (GEQ s5 1) (GEQ s8644 1)) (AND (GEQ s5 1) (GEQ s8725 1)) (AND (GEQ s5 1) (GEQ s8465 1)) (AND (GEQ s5 1) (GEQ s9083 1)) (AND (GEQ s5 1) (GEQ s9603 1)) (AND (GEQ s5 1) (GEQ s8205 1)) (AND (GEQ s5 1) (GEQ s9343 1)) (AND (GEQ s5 1) (GEQ s9846 1)) (AND (GEQ s5 1) (GEQ s8026 1)) (AND (GEQ s5 1) (GEQ s9586 1)) (AND (GEQ s5 1) (GEQ s8546 1)) (AND (GEQ s5 1) (GEQ s9066 1)) (AND (GEQ s5 1) (GEQ s8887 1)) (AND (GEQ s5 1) (GEQ s8286 1)) (AND (GEQ s5 1) (GEQ s9326 1)) (AND (GEQ s5 1) (GEQ s9863 1)) (AND (GEQ s5 1) (GEQ s9245 1)) (AND (GEQ s5 1) (GEQ s9505 1)) (AND (GEQ s5 1) (GEQ s9765 1)) (AND (GEQ s5 1) (GEQ s8107 1)) (AND (GEQ s5 1) (GEQ s8627 1)) (AND (GEQ s5 1) (GEQ s8985 1)) (AND (GEQ s5 1) (GEQ s8367 1)) (AND (GEQ s5 1) (GEQ s8806 1)) (AND (GEQ s5 1) (GEQ s8968 1)) (AND (GEQ s5 1) (GEQ s9228 1)) (AND (GEQ s5 1) (GEQ s9488 1)) (AND (GEQ s5 1) (GEQ s9748 1)) (AND (GEQ s5 1) (GEQ s10008 1)) (AND (GEQ s5 1) (GEQ s8448 1)) (AND (GEQ s5 1) (GEQ s8188 1)) (AND (GEQ s5 1) (GEQ s8789 1)) (AND (GEQ s5 1) (GEQ s9829 1)) (AND (GEQ s5 1) (GEQ s8529 1)) (AND (GEQ s5 1) (GEQ s9147 1)) (AND (GEQ s5 1) (GEQ s9667 1)) (AND (GEQ s5 1) (GEQ s8269 1)) (AND (GEQ s5 1) (GEQ s8708 1)) (AND (GEQ s5 1) (GEQ s9407 1)) (AND (GEQ s5 1) (GEQ s9910 1)) (AND (GEQ s5 1) (GEQ s8090 1)) (AND (GEQ s5 1) (GEQ s8610 1)) (AND (GEQ s5 1) (GEQ s9130 1)) (AND (GEQ s5 1) (GEQ s9650 1)) (AND (GEQ s5 1) (GEQ s8350 1)) (AND (GEQ s5 1) (GEQ s8951 1)) (AND (GEQ s5 1) (GEQ s9390 1)) (AND (GEQ s5 1) (GEQ s9927 1)) (AND (GEQ s5 1) (GEQ s8691 1)) (AND (GEQ s5 1) (GEQ s9049 1)) (AND (GEQ s5 1) (GEQ s9569 1)) (AND (GEQ s5 1) (GEQ s8171 1)) (AND (GEQ s5 1) (GEQ s8431 1)) (AND (GEQ s5 1) (GEQ s8870 1)) (AND (GEQ s5 1) (GEQ s9309 1)) (AND (GEQ s5 1) (GEQ s9032 1)) (AND (GEQ s5 1) (GEQ s9552 1)) (AND (GEQ s5 1) (GEQ s8512 1)) (AND (GEQ s5 1) (GEQ s9292 1)) (AND (GEQ s5 1) (GEQ s9893 1)) (AND (GEQ s5 1) (GEQ s8252 1)) (AND (GEQ s5 1) (GEQ s8853 1)) (AND (GEQ s5 1) (GEQ s9211 1)) (AND (GEQ s5 1) (GEQ s9731 1)) (AND (GEQ s5 1) (GEQ s8073 1)) (AND (GEQ s5 1) (GEQ s8593 1)) (AND (GEQ s5 1) (GEQ s8772 1)) (AND (GEQ s5 1) (GEQ s9471 1)) (AND (GEQ s5 1) (GEQ s9974 1)) (AND (GEQ s5 1) (GEQ s8333 1)) (AND (GEQ s5 1) (GEQ s9714 1)) (AND (GEQ s5 1) (GEQ s8154 1)) (AND (GEQ s5 1) (GEQ s8674 1)) (AND (GEQ s5 1) (GEQ s9194 1)) (AND (GEQ s5 1) (GEQ s8755 1)) (AND (GEQ s5 1) (GEQ s9015 1)) (AND (GEQ s5 1) (GEQ s9454 1)) (AND (GEQ s5 1) (GEQ s8414 1)) (AND (GEQ s5 1) (GEQ s9991 1)) (AND (GEQ s5 1) (GEQ s9113 1)) (AND (GEQ s5 1) (GEQ s9633 1)) (AND (GEQ s5 1) (GEQ s8235 1)) (AND (GEQ s5 1) (GEQ s8495 1)) (AND (GEQ s5 1) (GEQ s9373 1)) (AND (GEQ s5 1) (GEQ s9812 1)) (AND (GEQ s5 1) (GEQ s8934 1))), p1:(OR (LT s9 1) (LT s13 1)), p2:(LT s1 1)], nbAcceptance=1, properties=[trans-labels, explicit-labels, trans-acc, deterministic, no-univ-branch, unambiguous, semi-deterministic, stutter-invariant, very-weak, weak, inherently-weak], stateDesc=[null, null, null, null, null][true, true, true, true, true]]
Product exploration timeout after 5580 steps with 695 reset in 10018 ms.
Product exploration timeout after 5640 steps with 704 reset in 10011 ms.
Complete graph has no SCC; deadlocks are unavoidable. place count 12016 transition count 24012
Detected that all paths lead to deadlock. Applying this knowledge to assert that all AP eventually converge : F ( (Ga|G!a) & (Gb|G!b)...)
Knowledge obtained : [(F (G (NOT p0))), (F (G p1)), (F (G p2)), (NOT p0), p1, (NOT p2)]
Stuttering acceptance computed with spot in 134 ms :[p0, (AND (NOT p0) (NOT p1) (NOT p2)), (OR p0 (AND (NOT p1) (NOT p2))), (AND (NOT p0) (NOT p2)), (NOT p0)]
Product exploration timeout after 5660 steps with 705 reset in 10003 ms.
Product exploration timeout after 5720 steps with 710 reset in 10012 ms.
[2021-05-08 06:05:25] [INFO ] Flatten gal took : 608 ms
[2021-05-08 06:05:25] [INFO ] Flatten gal took : 627 ms
[2021-05-08 06:05:25] [INFO ] Time to serialize gal into /tmp/LTL16025797241985081042.gal : 55 ms
[2021-05-08 06:05:25] [INFO ] Time to serialize properties into /tmp/LTL4723930294132010026.ltl : 15 ms
Invoking ITS tools like this :CommandLine [args=[/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.202104292328/bin/its-ltl-linux64, --gc-threshold, 2000000, -i, /tmp/LTL16025797241985081042.gal, -t, CGAL, -LTL, /tmp/LTL4723930294132010026.ltl, -c, -stutter-deadlock, --gen-order, FOLLOW], workingDir=/home/mcc/execution]

its-ltl command run as :

/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.202104292328/bin/its-ltl-linux64 --gc-threshold 2000000 -i /tmp/LTL16025797241985081042.gal -t CGAL -LTL /tmp/LTL4723930294132010026.ltl -c -stutter-deadlock --gen-order FOLLOW
Read 1 LTL properties

========== file over 1MB has been truncated ======
retrieve it from the run archives if needed

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="AirplaneLD-COL-4000"
export BK_EXAMINATION="LTLFireability"
export BK_TOOL="itstools"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-4028"
echo " Executing tool itstools"
echo " Input is AirplaneLD-COL-4000, examination is LTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r007-tall-162037989700234"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/AirplaneLD-COL-4000.tgz
mv AirplaneLD-COL-4000 execution
cd execution
if [ "LTLFireability" = "ReachabilityDeadlock" ] || [ "LTLFireability" = "UpperBounds" ] || [ "LTLFireability" = "QuasiLiveness" ] || [ "LTLFireability" = "StableMarking" ] || [ "LTLFireability" = "Liveness" ] || [ "LTLFireability" = "OneSafe" ] || [ "LTLFireability" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "LTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "LTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "LTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property LTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "LTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' LTLFireability.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ "LTLFireability" = "ReachabilityDeadlock" ] || [ "LTLFireability" = "QuasiLiveness" ] || [ "LTLFireability" = "StableMarking" ] || [ "LTLFireability" = "Liveness" ] || [ "LTLFireability" = "OneSafe" ] ; then
echo "FORMULA_NAME LTLFireability"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;