Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/data/fkordon/mcc2021-input.r004-tall-162037985700246.qcow2', fmt=qcow2 size=4294967296 backing_file='/data/fkordon/mcc2021-input.qcow2' encryption=off cluster_size=65536 lazy_refcounts=off
Waiting for the VM to be ready (probing ssh)
.....................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................
=====================================================================
Generated by BenchKit 2-4028
Executing tool lola
Input is AirplaneLD-PT-0010, examination is ReachabilityCardinality
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r004-tall-162037985700246
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 780K
-rw-r--r-- 1 mcc users 49K May 5 16:58 CTLCardinality.txt
-rw-r--r-- 1 mcc users 227K May 5 16:58 CTLCardinality.xml
-rw-r--r-- 1 mcc users 28K May 5 16:58 CTLFireability.txt
-rw-r--r-- 1 mcc users 190K May 5 16:58 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K May 6 14:48 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.5K May 6 14:48 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 5.5K Mar 28 15:42 LTLCardinality.txt
-rw-r--r-- 1 mcc users 31K Mar 28 15:42 LTLCardinality.xml
-rw-r--r-- 1 mcc users 3.8K Mar 28 15:42 LTLFireability.txt
-rw-r--r-- 1 mcc users 24K Mar 28 15:42 LTLFireability.xml
-rw-r--r-- 1 mcc users 8.4K Mar 23 01:16 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 31K Mar 23 01:16 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 5.8K Mar 22 09:36 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 29K Mar 22 09:36 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.8K Mar 22 09:09 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.9K Mar 22 09:09 UpperBounds.xml
-rw-r--r-- 1 mcc users 5 May 5 16:51 equiv_col
-rw-r--r-- 1 mcc users 5 May 5 16:51 instance
-rw-r--r-- 1 mcc users 6 May 5 16:51 iscolored
-rw-r--r-- 1 mcc users 90K May 5 16:51 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME AirplaneLD-PT-0010-ReachabilityCardinality-00
FORMULA_NAME AirplaneLD-PT-0010-ReachabilityCardinality-01
FORMULA_NAME AirplaneLD-PT-0010-ReachabilityCardinality-02
FORMULA_NAME AirplaneLD-PT-0010-ReachabilityCardinality-03
FORMULA_NAME AirplaneLD-PT-0010-ReachabilityCardinality-04
FORMULA_NAME AirplaneLD-PT-0010-ReachabilityCardinality-05
FORMULA_NAME AirplaneLD-PT-0010-ReachabilityCardinality-06
FORMULA_NAME AirplaneLD-PT-0010-ReachabilityCardinality-07
FORMULA_NAME AirplaneLD-PT-0010-ReachabilityCardinality-08
FORMULA_NAME AirplaneLD-PT-0010-ReachabilityCardinality-09
FORMULA_NAME AirplaneLD-PT-0010-ReachabilityCardinality-10
FORMULA_NAME AirplaneLD-PT-0010-ReachabilityCardinality-11
FORMULA_NAME AirplaneLD-PT-0010-ReachabilityCardinality-12
FORMULA_NAME AirplaneLD-PT-0010-ReachabilityCardinality-13
FORMULA_NAME AirplaneLD-PT-0010-ReachabilityCardinality-14
FORMULA_NAME AirplaneLD-PT-0010-ReachabilityCardinality-15

=== Now, execution of the tool begins

BK_START 1620434264929

starting LoLA
BK_INPUT AirplaneLD-PT-0010
BK_EXAMINATION: ReachabilityCardinality
bin directory: /home/mcc/BenchKit/bin
current directory: /home/mcc/execution
ReachabilityCardinality

FORMULA AirplaneLD-PT-0010-ReachabilityCardinality-04 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA AirplaneLD-PT-0010-ReachabilityCardinality-05 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA AirplaneLD-PT-0010-ReachabilityCardinality-02 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA AirplaneLD-PT-0010-ReachabilityCardinality-09 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA AirplaneLD-PT-0010-ReachabilityCardinality-15 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA AirplaneLD-PT-0010-ReachabilityCardinality-14 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA AirplaneLD-PT-0010-ReachabilityCardinality-11 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA AirplaneLD-PT-0010-ReachabilityCardinality-00 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA AirplaneLD-PT-0010-ReachabilityCardinality-07 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA AirplaneLD-PT-0010-ReachabilityCardinality-10 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA AirplaneLD-PT-0010-ReachabilityCardinality-12 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA AirplaneLD-PT-0010-ReachabilityCardinality-06 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA AirplaneLD-PT-0010-ReachabilityCardinality-01 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA AirplaneLD-PT-0010-ReachabilityCardinality-08 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA AirplaneLD-PT-0010-ReachabilityCardinality-13 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA AirplaneLD-PT-0010-ReachabilityCardinality-03 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

BK_STOP 1620434265057

--------------------
content from stderr:

lola: MEM LIMIT 32
lola: MEM LIMIT 5
lola: NET
lola: input: PNML file (--pnmlnet)
lola: reading net from /home/mcc/execution/model.pnml
lola: reading pnml
lola: PNML file contains place/transition net
lola: finished parsing
lola: closed net file /home/mcc/execution/model.pnml
lola: Reading formula.
lola: Using XML format (--xmlformula)
lola: reading XML formula
lola: reading formula from /home/mcc/execution/ReachabilityCardinality.xml
lola: rewrite Frontend/Parser/formula_rewrite.k:98
lola: rewrite Frontend/Parser/formula_rewrite.k:159
lola: rewrite Frontend/Parser/formula_rewrite.k:150
lola: rewrite Frontend/Parser/formula_rewrite.k:96
lola: rewrite Frontend/Parser/formula_rewrite.k:156
lola: rewrite Frontend/Parser/formula_rewrite.k:147
lola: rewrite Frontend/Parser/formula_rewrite.k:98
lola: rewrite Frontend/Parser/formula_rewrite.k:159
lola: rewrite Frontend/Parser/formula_rewrite.k:150
lola: rewrite Frontend/Parser/formula_rewrite.k:96
lola: rewrite Frontend/Parser/formula_rewrite.k:156
lola: rewrite Frontend/Parser/formula_rewrite.k:147
lola: rewrite Frontend/Parser/formula_rewrite.k:96
lola: rewrite Frontend/Parser/formula_rewrite.k:156
lola: rewrite Frontend/Parser/formula_rewrite.k:147
lola: rewrite Frontend/Parser/formula_rewrite.k:96
lola: rewrite Frontend/Parser/formula_rewrite.k:156
lola: rewrite Frontend/Parser/formula_rewrite.k:147
lola: rewrite Frontend/Parser/formula_rewrite.k:98
lola: rewrite Frontend/Parser/formula_rewrite.k:159
lola: rewrite Frontend/Parser/formula_rewrite.k:150
lola: rewrite Frontend/Parser/formula_rewrite.k:96
lola: rewrite Frontend/Parser/formula_rewrite.k:156
lola: rewrite Frontend/Parser/formula_rewrite.k:147
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: LAUNCH INITIAL
lola: LAUNCH task # 13 (type CNST) for 12 AirplaneLD-PT-0010-ReachabilityCardinality-04
lola: time limit : 0 sec
lola: memory limit: 0 pages
lola: FINISHED task # 13 (type CNST) for AirplaneLD-PT-0010-ReachabilityCardinality-04
lola: result : true
lola: LAUNCH INITIAL
lola: LAUNCH task # 16 (type CNST) for 15 AirplaneLD-PT-0010-ReachabilityCardinality-05
lola: time limit : 0 sec
lola: memory limit: 0 pages
lola: FINISHED task # 16 (type CNST) for AirplaneLD-PT-0010-ReachabilityCardinality-05
lola: result : false
lola: LAUNCH INITIAL
lola: Created skeleton in 0.000000 secs.
lola: LAUNCH task # 7 (type CNST) for 6 AirplaneLD-PT-0010-ReachabilityCardinality-02
lola: time limit : 0 sec
lola: memory limit: 0 pages
lola: FINISHED task # 7 (type CNST) for AirplaneLD-PT-0010-ReachabilityCardinality-02
lola: result : false
lola: Rule S: 0 transitions removed,0 places removed
lola: Created skeleton in 0.000000 secs.
lola: LAUNCH INITIAL
lola: Created skeleton in 0.000000 secs.
lola: LAUNCH task # 28 (type CNST) for 27 AirplaneLD-PT-0010-ReachabilityCardinality-09
lola: time limit : 0 sec
lola: memory limit: 0 pages
lola: LAUNCH INITIAL
lola: LAUNCH task # 34 (type CNST) for 33 AirplaneLD-PT-0010-ReachabilityCardinality-11
lola: time limit : 0 sec
lola: memory limit: 0 pages
lola: LAUNCH INITIAL
lola: LAUNCH task # 43 (type CNST) for 42 AirplaneLD-PT-0010-ReachabilityCardinality-14
lola: time limit : 0 sec
lola: memory limit: 0 pages
lola: LAUNCH INITIAL
lola: LAUNCH task # 46 (type CNST) for 45 AirplaneLD-PT-0010-ReachabilityCardinality-15
lola: time limit : 0 sec
lola: memory limit: 0 pages
lola: FINISHED task # 28 (type CNST) for AirplaneLD-PT-0010-ReachabilityCardinality-09
lola: result : false
lola: FINISHED task # 46 (type CNST) for AirplaneLD-PT-0010-ReachabilityCardinality-15
lola: result : false
lola: FINISHED task # 43 (type CNST) for AirplaneLD-PT-0010-ReachabilityCardinality-14
lola: result : true
lola: FINISHED task # 34 (type CNST) for AirplaneLD-PT-0010-ReachabilityCardinality-11
lola: result : false
lola: LAUNCH INITIAL
lola: LAUNCH task # 1 (type CNST) for 0 AirplaneLD-PT-0010-ReachabilityCardinality-00
lola: time limit : 0 sec
lola: memory limit: 0 pages
lola: FINISHED task # 1 (type CNST) for AirplaneLD-PT-0010-ReachabilityCardinality-00
lola: result : true
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: LAUNCH task # 53 (type EXCL) for 21 AirplaneLD-PT-0010-ReachabilityCardinality-07
lola: time limit : 450 sec
lola: memory limit: 32 pages
lola: LAUNCH task # 48 (type FNDP) for 21 AirplaneLD-PT-0010-ReachabilityCardinality-07
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 49 (type EQUN) for 21 AirplaneLD-PT-0010-ReachabilityCardinality-07
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: LAUNCH task # 52 (type SRCH) for 21 AirplaneLD-PT-0010-ReachabilityCardinality-07
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: FINISHED task # 53 (type EXCL) for AirplaneLD-PT-0010-ReachabilityCardinality-07
lola: result : false
lola: markings : 7876
lola: fired transitions : 7910
lola: time used : 1.000000
lola: memory pages used : 1
lola: CANCELED task # 48 (type FNDP) for AirplaneLD-PT-0010-ReachabilityCardinality-07 (obsolete)
lola: CANCELED task # 49 (type EQUN) for AirplaneLD-PT-0010-ReachabilityCardinality-07 (obsolete)
lola: CANCELED task # 52 (type SRCH) for AirplaneLD-PT-0010-ReachabilityCardinality-07 (obsolete)
lola: LAUNCH task # 72 (type EXCL) for 36 AirplaneLD-PT-0010-ReachabilityCardinality-12
lola: time limit : 514 sec
lola: memory limit: 32 pages
lola: LAUNCH task # 75 (type FNDP) for 30 AirplaneLD-PT-0010-ReachabilityCardinality-10
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 76 (type EQUN) for 30 AirplaneLD-PT-0010-ReachabilityCardinality-10
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: LAUNCH task # 78 (type SRCH) for 30 AirplaneLD-PT-0010-ReachabilityCardinality-10
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 48 (type FNDP) for AirplaneLD-PT-0010-ReachabilityCardinality-07
lola: result : unknown
lola: fired transitions : 4576
lola: tried executions : 1044
lola: time used : 1.000000
lola: memory pages used : 0
lola: FINISHED task # 49 (type EQUN) for AirplaneLD-PT-0010-ReachabilityCardinality-07
lola: result : unknown
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: FINISHED task # 72 (type EXCL) for AirplaneLD-PT-0010-ReachabilityCardinality-12
lola: result : false
lola: markings : 1
lola: time used : 0.000000
lola: memory pages used : 1
lola: FINISHED task # 78 (type SRCH) for AirplaneLD-PT-0010-ReachabilityCardinality-10
lola: result : false
lola: markings : 3
lola: fired transitions : 2
lola: time used : 0.000000
lola: memory pages used : 1
lola: CANCELED task # 75 (type FNDP) for AirplaneLD-PT-0010-ReachabilityCardinality-10 (obsolete)
lola: CANCELED task # 76 (type EQUN) for AirplaneLD-PT-0010-ReachabilityCardinality-10 (obsolete)
lola: LAUNCH task # 60 (type EXCL) for 24 AirplaneLD-PT-0010-ReachabilityCardinality-08
lola: time limit : 719 sec
lola: memory limit: 32 pages
lola: LAUNCH task # 50 (type FNDP) for 18 AirplaneLD-PT-0010-ReachabilityCardinality-06
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 61 (type EQUN) for 18 AirplaneLD-PT-0010-ReachabilityCardinality-06
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: LAUNCH task # 63 (type SRCH) for 18 AirplaneLD-PT-0010-ReachabilityCardinality-06
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-76.sara.
lola: FINISHED task # 63 (type SRCH) for AirplaneLD-PT-0010-ReachabilityCardinality-06
lola: result : true
lola: markings : 257
lola: fired transitions : 474
lola: time used : 0.000000
lola: memory pages used : 1
lola: CANCELED task # 50 (type FNDP) for AirplaneLD-PT-0010-ReachabilityCardinality-06 (obsolete)
lola: CANCELED task # 61 (type EQUN) for AirplaneLD-PT-0010-ReachabilityCardinality-06 (obsolete)
sara: place or transition ordering is non-deterministic
lola: LAUNCH task # 93 (type FNDP) for 3 AirplaneLD-PT-0010-ReachabilityCardinality-01
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 94 (type EQUN) for 3 AirplaneLD-PT-0010-ReachabilityCardinality-01
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 96 (type SRCH) for 3 AirplaneLD-PT-0010-ReachabilityCardinality-01
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 61 (type EQUN) for AirplaneLD-PT-0010-ReachabilityCardinality-06
lola: result : unknown

lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: FINISHED task # 96 (type SRCH) for AirplaneLD-PT-0010-ReachabilityCardinality-01
lola: result : false
lola: markings : 3
lola: fired transitions : 2
lola: time used : 0.000000
lola: memory pages used : 1
lola: CANCELED task # 93 (type FNDP) for AirplaneLD-PT-0010-ReachabilityCardinality-01 (obsolete)
lola: CANCELED task # 94 (type EQUN) for AirplaneLD-PT-0010-ReachabilityCardinality-01 (obsolete)
lola: LAUNCH task # 88 (type FNDP) for 39 AirplaneLD-PT-0010-ReachabilityCardinality-13
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 89 (type EQUN) for 39 AirplaneLD-PT-0010-ReachabilityCardinality-13
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 91 (type SRCH) for 39 AirplaneLD-PT-0010-ReachabilityCardinality-13
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 93 (type FNDP) for AirplaneLD-PT-0010-ReachabilityCardinality-01
lola: result : unknown
lola: fired transitions : 7467
lola: tried executions : 3735
lola: time used : 0.000000
lola: memory pages used : 0
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: FINISHED task # 60 (type EXCL) for AirplaneLD-PT-0010-ReachabilityCardinality-08
lola: result : false
lola: markings : 13343
lola: fired transitions : 14251
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 85 (type EXCL) for 9 AirplaneLD-PT-0010-ReachabilityCardinality-03
lola: time limit : 1799 sec
lola: memory limit: 32 pages
lola: FINISHED task # 94 (type EQUN) for AirplaneLD-PT-0010-ReachabilityCardinality-01
lola: result : unknown
lola: FINISHED task # 91 (type SRCH) for AirplaneLD-PT-0010-ReachabilityCardinality-13
lola: result : false
lola: markings : 2
lola: fired transitions : 1
lola: time used : 0.000000
lola: memory pages used : 1
lola: CANCELED task # 88 (type FNDP) for AirplaneLD-PT-0010-ReachabilityCardinality-13 (obsolete)
lola: CANCELED task # 89 (type EQUN) for AirplaneLD-PT-0010-ReachabilityCardinality-13 (obsolete)
lola: LAUNCH task # 81 (type FNDP) for 9 AirplaneLD-PT-0010-ReachabilityCardinality-03
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 82 (type EQUN) for 9 AirplaneLD-PT-0010-ReachabilityCardinality-03
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: LAUNCH task # 84 (type SRCH) for 9 AirplaneLD-PT-0010-ReachabilityCardinality-03
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 85 (type EXCL) for AirplaneLD-PT-0010-ReachabilityCardinality-03
lola: result : false
lola: markings : 350
lola: fired transitions : 424
lola: time used : 0.000000
lola: memory pages used : 1
lola: CANCELED task # 81 (type FNDP) for AirplaneLD-PT-0010-ReachabilityCardinality-03 (obsolete)
lola: CANCELED task # 82 (type EQUN) for AirplaneLD-PT-0010-ReachabilityCardinality-03 (obsolete)
lola: CANCELED task # 84 (type SRCH) for AirplaneLD-PT-0010-ReachabilityCardinality-03 (obsolete)
lola: Portfolio finished: no open formulas

FINAL RESULTS
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
AirplaneLD-PT-0010-ReachabilityCardinality-00: INITIAL true preprocessing
AirplaneLD-PT-0010-ReachabilityCardinality-01: EF false tandem / insertion
AirplaneLD-PT-0010-ReachabilityCardinality-02: INITIAL false preprocessing
AirplaneLD-PT-0010-ReachabilityCardinality-03: EF false tandem / relaxed
AirplaneLD-PT-0010-ReachabilityCardinality-04: INITIAL true preprocessing
AirplaneLD-PT-0010-ReachabilityCardinality-05: INITIAL false preprocessing
AirplaneLD-PT-0010-ReachabilityCardinality-06: EF true tandem / insertion
AirplaneLD-PT-0010-ReachabilityCardinality-07: EF false tandem / relaxed
AirplaneLD-PT-0010-ReachabilityCardinality-08: AG true tandem / relaxed
AirplaneLD-PT-0010-ReachabilityCardinality-09: INITIAL false preprocessing
AirplaneLD-PT-0010-ReachabilityCardinality-10: AG true tandem / insertion
AirplaneLD-PT-0010-ReachabilityCardinality-11: INITIAL false preprocessing
AirplaneLD-PT-0010-ReachabilityCardinality-12: AG true tandem / relaxed
AirplaneLD-PT-0010-ReachabilityCardinality-13: AG true tandem / insertion
AirplaneLD-PT-0010-ReachabilityCardinality-14: INITIAL true preprocessing
AirplaneLD-PT-0010-ReachabilityCardinality-15: INITIAL false preprocessing


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sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-89.sara.

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="AirplaneLD-PT-0010"
export BK_EXAMINATION="ReachabilityCardinality"
export BK_TOOL="lola"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-4028"
echo " Executing tool lola"
echo " Input is AirplaneLD-PT-0010, examination is ReachabilityCardinality"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r004-tall-162037985700246"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/AirplaneLD-PT-0010.tgz
mv AirplaneLD-PT-0010 execution
cd execution
if [ "ReachabilityCardinality" = "ReachabilityDeadlock" ] || [ "ReachabilityCardinality" = "UpperBounds" ] || [ "ReachabilityCardinality" = "QuasiLiveness" ] || [ "ReachabilityCardinality" = "StableMarking" ] || [ "ReachabilityCardinality" = "Liveness" ] || [ "ReachabilityCardinality" = "OneSafe" ] || [ "ReachabilityCardinality" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "ReachabilityCardinality" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "ReachabilityCardinality" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "ReachabilityCardinality.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property ReachabilityCardinality.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "ReachabilityCardinality.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' ReachabilityCardinality.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ "ReachabilityCardinality" = "ReachabilityDeadlock" ] || [ "ReachabilityCardinality" = "QuasiLiveness" ] || [ "ReachabilityCardinality" = "StableMarking" ] || [ "ReachabilityCardinality" = "Liveness" ] || [ "ReachabilityCardinality" = "OneSafe" ] ; then
echo "FORMULA_NAME ReachabilityCardinality"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;