fond
Model Checking Contest 2021
11th edition, Paris, France, June 23, 2021
Execution of r004-tall-162037985700237
Last Updated
Jun 28, 2021

About the Execution of LoLA for AirplaneLD-COL-4000

Execution Summary
Max Memory
Used (MB)
Time wait (ms) CPU Usage (ms) I/O Wait (ms) Computed Result Execution
Status
1606.991 243814.00 804416.00 149.70 1 1 1 1 1 2 1 8000 1 1 1 1 1 4000 8000 1 normal

Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/data/fkordon/mcc2021-input.r004-tall-162037985700237.qcow2', fmt=qcow2 size=4294967296 backing_file='/data/fkordon/mcc2021-input.qcow2' encryption=off cluster_size=65536 lazy_refcounts=off
Waiting for the VM to be ready (probing ssh)
...........................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................
=====================================================================
Generated by BenchKit 2-4028
Executing tool lola
Input is AirplaneLD-COL-4000, examination is UpperBounds
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r004-tall-162037985700237
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 996K
-rw-r--r-- 1 mcc users 18K May 5 16:58 CTLCardinality.txt
-rw-r--r-- 1 mcc users 124K May 5 16:58 CTLCardinality.xml
-rw-r--r-- 1 mcc users 11K May 5 16:58 CTLFireability.txt
-rw-r--r-- 1 mcc users 92K May 5 16:58 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K May 6 14:48 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 3.6K Mar 28 15:43 LTLCardinality.txt
-rw-r--r-- 1 mcc users 25K Mar 28 15:43 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.1K Mar 28 15:43 LTLFireability.txt
-rw-r--r-- 1 mcc users 17K Mar 28 15:43 LTLFireability.xml
-rw-r--r-- 1 mcc users 3.9K Mar 23 01:45 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 19K Mar 23 01:41 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 2.7K Mar 22 10:14 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 15K Mar 22 10:10 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.7K Mar 22 09:09 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.8K Mar 22 09:09 UpperBounds.xml
-rw-r--r-- 1 mcc users 5 May 5 16:51 equiv_pt
-rw-r--r-- 1 mcc users 5 May 5 16:51 instance
-rw-r--r-- 1 mcc users 5 May 5 16:51 iscolored
-rw-r--r-- 1 mcc users 620K May 5 16:51 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of positive values
NUM_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME AirplaneLD-COL-4000-UpperBounds-00
FORMULA_NAME AirplaneLD-COL-4000-UpperBounds-01
FORMULA_NAME AirplaneLD-COL-4000-UpperBounds-02
FORMULA_NAME AirplaneLD-COL-4000-UpperBounds-03
FORMULA_NAME AirplaneLD-COL-4000-UpperBounds-04
FORMULA_NAME AirplaneLD-COL-4000-UpperBounds-05
FORMULA_NAME AirplaneLD-COL-4000-UpperBounds-06
FORMULA_NAME AirplaneLD-COL-4000-UpperBounds-07
FORMULA_NAME AirplaneLD-COL-4000-UpperBounds-08
FORMULA_NAME AirplaneLD-COL-4000-UpperBounds-09
FORMULA_NAME AirplaneLD-COL-4000-UpperBounds-10
FORMULA_NAME AirplaneLD-COL-4000-UpperBounds-11
FORMULA_NAME AirplaneLD-COL-4000-UpperBounds-12
FORMULA_NAME AirplaneLD-COL-4000-UpperBounds-13
FORMULA_NAME AirplaneLD-COL-4000-UpperBounds-14
FORMULA_NAME AirplaneLD-COL-4000-UpperBounds-15

=== Now, execution of the tool begins

BK_START 1620433934922

starting LoLA
BK_INPUT AirplaneLD-COL-4000
BK_EXAMINATION: UpperBounds
bin directory: /home/mcc/BenchKit/bin
current directory: /home/mcc/execution
Upper Bounds

FORMULA AirplaneLD-COL-4000-UpperBounds-13 4000 TECHNIQUES SEQUENTIAL_PROCESSING TOPOLOGICAL EXPLICIT STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA AirplaneLD-COL-4000-UpperBounds-12 1 TECHNIQUES SEQUENTIAL_PROCESSING TOPOLOGICAL EXPLICIT STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA AirplaneLD-COL-4000-UpperBounds-04 1 TECHNIQUES SEQUENTIAL_PROCESSING TOPOLOGICAL EXPLICIT STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA AirplaneLD-COL-4000-UpperBounds-03 1 TECHNIQUES SEQUENTIAL_PROCESSING TOPOLOGICAL EXPLICIT STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA AirplaneLD-COL-4000-UpperBounds-01 1 TECHNIQUES SEQUENTIAL_PROCESSING TOPOLOGICAL EXPLICIT STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA AirplaneLD-COL-4000-UpperBounds-05 2 TECHNIQUES SEQUENTIAL_PROCESSING TOPOLOGICAL EXPLICIT STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA AirplaneLD-COL-4000-UpperBounds-09 1 TECHNIQUES SEQUENTIAL_PROCESSING TOPOLOGICAL EXPLICIT STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA AirplaneLD-COL-4000-UpperBounds-06 1 TECHNIQUES SEQUENTIAL_PROCESSING TOPOLOGICAL EXPLICIT STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA AirplaneLD-COL-4000-UpperBounds-10 1 TECHNIQUES SEQUENTIAL_PROCESSING TOPOLOGICAL EXPLICIT STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA AirplaneLD-COL-4000-UpperBounds-07 8000 TECHNIQUES SEQUENTIAL_PROCESSING TOPOLOGICAL EXPLICIT STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA AirplaneLD-COL-4000-UpperBounds-00 1 TECHNIQUES SEQUENTIAL_PROCESSING TOPOLOGICAL EXPLICIT STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA AirplaneLD-COL-4000-UpperBounds-02 1 TECHNIQUES SEQUENTIAL_PROCESSING TOPOLOGICAL EXPLICIT STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA AirplaneLD-COL-4000-UpperBounds-15 1 TECHNIQUES SEQUENTIAL_PROCESSING TOPOLOGICAL EXPLICIT STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA AirplaneLD-COL-4000-UpperBounds-14 8000 TECHNIQUES SEQUENTIAL_PROCESSING TOPOLOGICAL EXPLICIT STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA AirplaneLD-COL-4000-UpperBounds-11 1 TECHNIQUES SEQUENTIAL_PROCESSING TOPOLOGICAL EXPLICIT STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA AirplaneLD-COL-4000-UpperBounds-08 1 TECHNIQUES SEQUENTIAL_PROCESSING TOPOLOGICAL EXPLICIT STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

BK_STOP 1620434178736

--------------------
content from stderr:

lola: MEM LIMIT 32
lola: MEM LIMIT 5
lola: NET
lola: input: PNML file (--pnmlnet)
lola: reading net from /home/mcc/execution/model.pnml
lola: reading pnml
lola: PNML file contains High-Level net
lola: finished parsing
lola: closed net file /home/mcc/execution/model.pnml
lola: Reading HL formula in XML format (--xmlformula)
lola: reading formula from /home/mcc/execution/UpperBounds.xml
lola: TR BINDINGS
lola: TR BINDINGS DONE
lola: Places: 28019, Transitions: 32008
lola: @ trans t2_1
lola: @ trans SampleRW
lola: @ trans getAlt
lola: @ trans t3_2
lola: @ trans t4_1
lola: @ trans t1_2
lola: @ trans t1_1
lola: @ trans SpeedLW
lola: @ trans t5_2
lola: @ trans t5_1
lola: @ trans t2_2
lola: @ trans t3_1
lola: @ trans SampleLW
lola: @ trans SpeedRW
lola: @ trans t4_2
lola: Rule S: 0 transitions removed,0 places removed
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
AirplaneLD-COL-4000-UpperBounds-00: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-01: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-02: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-03: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-04: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-05: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-06: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-07: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-08: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-09: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-10: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-11: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-12: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-13: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-14: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-15: BOUND 0 0 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 6 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
AirplaneLD-COL-4000-UpperBounds-00: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-01: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-02: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-03: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-04: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-05: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-06: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-07: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-08: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-09: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-10: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-11: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-12: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-13: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-14: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-15: BOUND 0 0 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 11 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
AirplaneLD-COL-4000-UpperBounds-00: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-01: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-02: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-03: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-04: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-05: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-06: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-07: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-08: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-09: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-10: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-11: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-12: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-13: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-14: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-15: BOUND 0 0 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 16 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
AirplaneLD-COL-4000-UpperBounds-00: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-01: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-02: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-03: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-04: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-05: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-06: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-07: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-08: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-09: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-10: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-11: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-12: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-13: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-14: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-15: BOUND 0 0 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 21 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
AirplaneLD-COL-4000-UpperBounds-00: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-01: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-02: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-03: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-04: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-05: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-06: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-07: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-08: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-09: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-10: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-11: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-12: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-13: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-14: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-15: BOUND 0 0 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 26 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
AirplaneLD-COL-4000-UpperBounds-00: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-01: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-02: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-03: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-04: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-05: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-06: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-07: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-08: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-09: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-10: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-11: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-12: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-13: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-14: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-15: BOUND 0 0 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 31 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
AirplaneLD-COL-4000-UpperBounds-00: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-01: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-02: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-03: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-04: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-05: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-06: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-07: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-08: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-09: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-10: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-11: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-12: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-13: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-14: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-15: BOUND 0 0 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 36 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
AirplaneLD-COL-4000-UpperBounds-00: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-01: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-02: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-03: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-04: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-05: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-06: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-07: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-08: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-09: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-10: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-11: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-12: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-13: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-14: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-15: BOUND 0 0 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 41 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
AirplaneLD-COL-4000-UpperBounds-00: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-01: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-02: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-03: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-04: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-05: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-06: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-07: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-08: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-09: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-10: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-11: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-12: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-13: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-14: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-15: BOUND 0 0 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 46 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
AirplaneLD-COL-4000-UpperBounds-00: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-01: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-02: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-03: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-04: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-05: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-06: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-07: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-08: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-09: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-10: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-11: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-12: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-13: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-14: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-15: BOUND 0 0 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 51 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
AirplaneLD-COL-4000-UpperBounds-00: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-01: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-02: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-03: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-04: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-05: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-06: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-07: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-08: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-09: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-10: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-11: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-12: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-13: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-14: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-15: BOUND 0 0 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 56 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
AirplaneLD-COL-4000-UpperBounds-00: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-01: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-02: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-03: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-04: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-05: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-06: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-07: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-08: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-09: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-10: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-11: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-12: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-13: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-14: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-15: BOUND 0 0 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 61 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
AirplaneLD-COL-4000-UpperBounds-00: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-01: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-02: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-03: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-04: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-05: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-06: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-07: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-08: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-09: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-10: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-11: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-12: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-13: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-14: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-15: BOUND 0 0 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 66 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
AirplaneLD-COL-4000-UpperBounds-00: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-01: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-02: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-03: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-04: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-05: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-06: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-07: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-08: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-09: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-10: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-11: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-12: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-13: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-14: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-15: BOUND 0 0 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 71 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
AirplaneLD-COL-4000-UpperBounds-00: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-01: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-02: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-03: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-04: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-05: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-06: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-07: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-08: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-09: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-10: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-11: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-12: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-13: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-14: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-15: BOUND 0 0 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 76 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
AirplaneLD-COL-4000-UpperBounds-00: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-01: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-02: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-03: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-04: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-05: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-06: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-07: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-08: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-09: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-10: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-11: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-12: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-13: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-14: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-15: BOUND 0 0 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 81 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
AirplaneLD-COL-4000-UpperBounds-00: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-01: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-02: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-03: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-04: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-05: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-06: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-07: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-08: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-09: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-10: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-11: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-12: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-13: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-14: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-15: BOUND 0 0 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 86 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
AirplaneLD-COL-4000-UpperBounds-00: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-01: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-02: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-03: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-04: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-05: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-06: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-07: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-08: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-09: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-10: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-11: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-12: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-13: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-14: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-15: BOUND 0 0 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 91 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
AirplaneLD-COL-4000-UpperBounds-00: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-01: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-02: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-03: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-04: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-05: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-06: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-07: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-08: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-09: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-10: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-11: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-12: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-13: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-14: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-15: BOUND 0 0 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 96 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
AirplaneLD-COL-4000-UpperBounds-00: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-01: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-02: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-03: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-04: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-05: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-06: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-07: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-08: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-09: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-10: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-11: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-12: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-13: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-14: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-15: BOUND 0 0 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 101 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
AirplaneLD-COL-4000-UpperBounds-00: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-01: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-02: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-03: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-04: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-05: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-06: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-07: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-08: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-09: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-10: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-11: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-12: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-13: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-14: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-15: BOUND 0 0 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 106 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
AirplaneLD-COL-4000-UpperBounds-00: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-01: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-02: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-03: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-04: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-05: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-06: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-07: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-08: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-09: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-10: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-11: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-12: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-13: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-14: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-15: BOUND 0 0 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 111 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
AirplaneLD-COL-4000-UpperBounds-00: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-01: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-02: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-03: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-04: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-05: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-06: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-07: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-08: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-09: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-10: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-11: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-12: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-13: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-14: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-15: BOUND 0 0 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 116 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
AirplaneLD-COL-4000-UpperBounds-00: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-01: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-02: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-03: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-04: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-05: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-06: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-07: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-08: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-09: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-10: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-11: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-12: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-13: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-14: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-15: BOUND 0 0 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 121 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
AirplaneLD-COL-4000-UpperBounds-00: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-01: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-02: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-03: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-04: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-05: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-06: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-07: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-08: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-09: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-10: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-11: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-12: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-13: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-14: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-15: BOUND 0 0 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 126 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
AirplaneLD-COL-4000-UpperBounds-00: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-01: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-02: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-03: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-04: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-05: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-06: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-07: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-08: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-09: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-10: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-11: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-12: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-13: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-14: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-15: BOUND 0 0 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 131 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
AirplaneLD-COL-4000-UpperBounds-00: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-01: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-02: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-03: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-04: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-05: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-06: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-07: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-08: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-09: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-10: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-11: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-12: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-13: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-14: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-15: BOUND 0 0 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 136 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
AirplaneLD-COL-4000-UpperBounds-00: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-01: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-02: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-03: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-04: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-05: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-06: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-07: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-08: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-09: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-10: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-11: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-12: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-13: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-14: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-15: BOUND 0 0 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 141 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
AirplaneLD-COL-4000-UpperBounds-00: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-01: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-02: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-03: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-04: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-05: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-06: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-07: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-08: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-09: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-10: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-11: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-12: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-13: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-14: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-15: BOUND 0 0 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 146 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
AirplaneLD-COL-4000-UpperBounds-00: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-01: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-02: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-03: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-04: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-05: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-06: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-07: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-08: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-09: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-10: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-11: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-12: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-13: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-14: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-15: BOUND 0 0 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 151 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
AirplaneLD-COL-4000-UpperBounds-00: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-01: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-02: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-03: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-04: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-05: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-06: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-07: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-08: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-09: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-10: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-11: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-12: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-13: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-14: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-15: BOUND 0 0 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 156 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
AirplaneLD-COL-4000-UpperBounds-00: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-01: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-02: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-03: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-04: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-05: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-06: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-07: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-08: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-09: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-10: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-11: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-12: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-13: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-14: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-15: BOUND 0 0 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 161 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
AirplaneLD-COL-4000-UpperBounds-00: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-01: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-02: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-03: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-04: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-05: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-06: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-07: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-08: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-09: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-10: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-11: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-12: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-13: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-14: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-15: BOUND 0 0 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 166 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
AirplaneLD-COL-4000-UpperBounds-00: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-01: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-02: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-03: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-04: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-05: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-06: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-07: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-08: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-09: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-10: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-11: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-12: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-13: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-14: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-15: BOUND 0 0 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 171 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
AirplaneLD-COL-4000-UpperBounds-00: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-01: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-02: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-03: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-04: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-05: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-06: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-07: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-08: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-09: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-10: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-11: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-12: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-13: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-14: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-15: BOUND 0 0 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 176 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
AirplaneLD-COL-4000-UpperBounds-00: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-01: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-02: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-03: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-04: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-05: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-06: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-07: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-08: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-09: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-10: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-11: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-12: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-13: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-14: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-15: BOUND 0 0 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 181 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
AirplaneLD-COL-4000-UpperBounds-00: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-01: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-02: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-03: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-04: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-05: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-06: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-07: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-08: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-09: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-10: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-11: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-12: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-13: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-14: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-15: BOUND 0 0 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 186 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
AirplaneLD-COL-4000-UpperBounds-00: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-01: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-02: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-03: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-04: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-05: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-06: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-07: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-08: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-09: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-10: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-11: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-12: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-13: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-14: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-15: BOUND 0 0 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 191 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 16
lola: LAUNCH task # 50 (type EXCL) for 39 AirplaneLD-COL-4000-UpperBounds-13
lola: time limit : 213 sec
lola: memory limit: 32 pages
lola: LAUNCH task # 48 (type FNDP) for 39 AirplaneLD-COL-4000-UpperBounds-13
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 49 (type EQUN) for 39 AirplaneLD-COL-4000-UpperBounds-13
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: Structural Bound: 4000
lola: REPORT NUM
lola: FINISHED task # 50 (type EXCL) for AirplaneLD-COL-4000-UpperBounds-13
lola: time used : 0.000000
lola: memory pages used : 1
lola: CANCELED task # 48 (type FNDP) for AirplaneLD-COL-4000-UpperBounds-13 (obsolete)
lola: CANCELED task # 49 (type EQUN) for AirplaneLD-COL-4000-UpperBounds-13 (obsolete)
lola: REPORT NUM
lola: FINISHED task # 48 (type FNDP) for AirplaneLD-COL-4000-UpperBounds-13
lola: tried executions : 1
lola: time used : 0.000000
sara: try reading problem file /home/mcc/execution/UpperBounds-49.sara.
sara: error: :8003: error: syntax error, unexpected $end, expecting KEY_TRANSITION
sara: error while reading Petri net from file -- aborting [#04]
sara: see manual for a documentation of this error
sara: last error message: No such file or directory
lola: FINISHED task # 49 (type EQUN) for AirplaneLD-COL-4000-UpperBounds-13
lola: result : unknown
lola: time used : 1.000000
lola: memory pages used : 0
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
AirplaneLD-COL-4000-UpperBounds-13: BOUND 4000 state space

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
AirplaneLD-COL-4000-UpperBounds-00: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-01: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-02: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-03: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-04: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-05: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-06: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-07: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-08: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-09: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-10: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-11: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-12: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-14: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-15: BOUND 0 0 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 196 secs. Pages in use: 1
# running tasks: 0 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
AirplaneLD-COL-4000-UpperBounds-13: BOUND 4000 state space

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
AirplaneLD-COL-4000-UpperBounds-00: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-01: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-02: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-03: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-04: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-05: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-06: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-07: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-08: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-09: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-10: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-11: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-12: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-14: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-15: BOUND 0 0 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 201 secs. Pages in use: 1
# running tasks: 0 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
AirplaneLD-COL-4000-UpperBounds-13: BOUND 4000 state space

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
AirplaneLD-COL-4000-UpperBounds-00: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-01: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-02: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-03: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-04: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-05: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-06: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-07: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-08: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-09: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-10: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-11: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-12: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-14: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-15: BOUND 0 0 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 206 secs. Pages in use: 1
# running tasks: 0 of 4 Visible: 16
lola: LAUNCH task # 53 (type EXCL) for 36 AirplaneLD-COL-4000-UpperBounds-12
lola: time limit : 226 sec
lola: memory limit: 32 pages
lola: LAUNCH task # 51 (type FNDP) for 36 AirplaneLD-COL-4000-UpperBounds-12
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 52 (type EQUN) for 36 AirplaneLD-COL-4000-UpperBounds-12
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: Structural Bound: 1
lola: REPORT NUM
lola: FINISHED task # 53 (type EXCL) for AirplaneLD-COL-4000-UpperBounds-12
lola: markings : 2
lola: fired transitions : 1
lola: time used : 0.000000
lola: memory pages used : 1
lola: CANCELED task # 51 (type FNDP) for AirplaneLD-COL-4000-UpperBounds-12 (obsolete)
lola: CANCELED task # 52 (type EQUN) for AirplaneLD-COL-4000-UpperBounds-12 (obsolete)
sara: try reading problem file /home/mcc/execution/UpperBounds-52.sara.
lola: REPORT NUM
lola: FINISHED task # 51 (type FNDP) for AirplaneLD-COL-4000-UpperBounds-12
lola: tried executions : 1
lola: time used : 0.000000
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
AirplaneLD-COL-4000-UpperBounds-12: BOUND 1 state space
AirplaneLD-COL-4000-UpperBounds-13: BOUND 4000 state space

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
AirplaneLD-COL-4000-UpperBounds-00: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-01: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-02: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-03: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-04: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-05: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-06: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-07: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-08: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-09: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-10: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-11: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-14: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-15: BOUND 0 0 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 211 secs. Pages in use: 1
# running tasks: 0 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
AirplaneLD-COL-4000-UpperBounds-12: BOUND 1 state space
AirplaneLD-COL-4000-UpperBounds-13: BOUND 4000 state space

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
AirplaneLD-COL-4000-UpperBounds-00: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-01: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-02: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-03: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-04: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-05: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-06: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-07: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-08: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-09: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-10: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-11: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-14: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-15: BOUND 0 0 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 216 secs. Pages in use: 1
# running tasks: 0 of 4 Visible: 16
lola: LAUNCH task # 56 (type EXCL) for 12 AirplaneLD-COL-4000-UpperBounds-04
lola: time limit : 241 sec
lola: memory limit: 32 pages
lola: LAUNCH task # 54 (type FNDP) for 12 AirplaneLD-COL-4000-UpperBounds-04
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 55 (type EQUN) for 12 AirplaneLD-COL-4000-UpperBounds-04
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: Structural Bound: 1
lola: REPORT NUM
lola: FINISHED task # 56 (type EXCL) for AirplaneLD-COL-4000-UpperBounds-04
lola: time used : 0.000000
lola: memory pages used : 1
lola: CANCELED task # 54 (type FNDP) for AirplaneLD-COL-4000-UpperBounds-04 (obsolete)
lola: CANCELED task # 55 (type EQUN) for AirplaneLD-COL-4000-UpperBounds-04 (obsolete)
lola: REPORT NUM
lola: FINISHED task # 54 (type FNDP) for AirplaneLD-COL-4000-UpperBounds-04
lola: tried executions : 1
lola: time used : 0.000000
sara: try reading problem file /home/mcc/execution/UpperBounds-55.sara.
sara: error: :5: error: syntax error, unexpected $end, expecting KEY_TRANSITION
sara: error while reading Petri net from file -- aborting [#04]
sara: see manual for a documentation of this error
sara: last error message: No such file or directory
lola: FINISHED task # 55 (type EQUN) for AirplaneLD-COL-4000-UpperBounds-04
lola: result : unknown
lola: time used : 0.000000
lola: memory pages used : 0
sara: place or transition ordering is non-deterministic

lola: LAUNCH task # 59 (type EXCL) for 9 AirplaneLD-COL-4000-UpperBounds-03
lola: time limit : 260 sec
lola: memory limit: 32 pages
lola: LAUNCH task # 57 (type FNDP) for 9 AirplaneLD-COL-4000-UpperBounds-03
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 58 (type EQUN) for 9 AirplaneLD-COL-4000-UpperBounds-03
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: REPORT NUM
lola: FINISHED task # 57 (type FNDP) for AirplaneLD-COL-4000-UpperBounds-03
lola: fired transitions : 1
lola: tried executions : 1
lola: time used : 0.000000
lola: CANCELED task # 58 (type EQUN) for AirplaneLD-COL-4000-UpperBounds-03 (obsolete)
lola: CANCELED task # 59 (type EXCL) for AirplaneLD-COL-4000-UpperBounds-03 (obsolete)
sara: try reading problem file /home/mcc/execution/UpperBounds-58.sara.

lola: REPORT NUM
lola: FINISHED task # 58 (type EQUN) for AirplaneLD-COL-4000-UpperBounds-03
lola: time used : 0.000000
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
AirplaneLD-COL-4000-UpperBounds-03: BOUND 1 findpath
AirplaneLD-COL-4000-UpperBounds-04: BOUND 1 state space
AirplaneLD-COL-4000-UpperBounds-12: BOUND 1 state space
AirplaneLD-COL-4000-UpperBounds-13: BOUND 4000 state space

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
AirplaneLD-COL-4000-UpperBounds-00: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-01: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-02: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-05: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-06: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-07: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-08: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-09: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-10: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-11: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-14: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-15: BOUND 0 0 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 221 secs. Pages in use: 1
# running tasks: 0 of 4 Visible: 16
lola: LAUNCH task # 62 (type EXCL) for 3 AirplaneLD-COL-4000-UpperBounds-01
lola: time limit : 281 sec
lola: memory limit: 32 pages
lola: LAUNCH task # 60 (type FNDP) for 3 AirplaneLD-COL-4000-UpperBounds-01
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 61 (type EQUN) for 3 AirplaneLD-COL-4000-UpperBounds-01
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: Structural Bound: 1
lola: REPORT NUM
lola: FINISHED task # 62 (type EXCL) for AirplaneLD-COL-4000-UpperBounds-01
lola: markings : 3
lola: fired transitions : 2
lola: time used : 0.000000
lola: memory pages used : 1
lola: CANCELED task # 60 (type FNDP) for AirplaneLD-COL-4000-UpperBounds-01 (obsolete)
lola: CANCELED task # 61 (type EQUN) for AirplaneLD-COL-4000-UpperBounds-01 (obsolete)
lola: REPORT NUM
lola: FINISHED task # 60 (type FNDP) for AirplaneLD-COL-4000-UpperBounds-01
lola: fired transitions : 1
lola: tried executions : 1
lola: time used : 0.000000
sara: try reading problem file /home/mcc/execution/UpperBounds-61.sara.

lola: REPORT NUM
lola: FINISHED task # 61 (type EQUN) for AirplaneLD-COL-4000-UpperBounds-01
lola: time used : 0.000000
lola: REPORT NUM
lola: FINISHED task # 52 (type EQUN) for AirplaneLD-COL-4000-UpperBounds-12
lola: time used : 14.000000
lola: LAUNCH task # 65 (type EXCL) for 15 AirplaneLD-COL-4000-UpperBounds-05
lola: time limit : 307 sec
lola: memory limit: 32 pages
lola: LAUNCH task # 63 (type FNDP) for 15 AirplaneLD-COL-4000-UpperBounds-05
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 64 (type EQUN) for 15 AirplaneLD-COL-4000-UpperBounds-05
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: Structural Bound: 2
lola: REPORT NUM
lola: FINISHED task # 65 (type EXCL) for AirplaneLD-COL-4000-UpperBounds-05
lola: time used : 0.000000
lola: memory pages used : 1
lola: CANCELED task # 63 (type FNDP) for AirplaneLD-COL-4000-UpperBounds-05 (obsolete)
lola: CANCELED task # 64 (type EQUN) for AirplaneLD-COL-4000-UpperBounds-05 (obsolete)
sara: try reading problem file /home/mcc/execution/UpperBounds-64.sara.
sara: error: :7: error: syntax error, unexpected $end, expecting KEY_TRANSITION
sara: error while reading Petri net from file -- aborting [#04]
sara: see manual for a documentation of this error
sara: last error message: No such file or directory
lola: REPORT NUM
lola: FINISHED task # 63 (type FNDP) for AirplaneLD-COL-4000-UpperBounds-05
lola: tried executions : 1
lola: time used : 0.000000
lola: FINISHED task # 64 (type EQUN) for AirplaneLD-COL-4000-UpperBounds-05
lola: result : unknown
lola: time used : 0.000000
lola: memory pages used : 0
lola: LAUNCH task # 68 (type EXCL) for 27 AirplaneLD-COL-4000-UpperBounds-09
lola: time limit : 337 sec
lola: memory limit: 32 pages
lola: LAUNCH task # 66 (type FNDP) for 27 AirplaneLD-COL-4000-UpperBounds-09
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 67 (type EQUN) for 27 AirplaneLD-COL-4000-UpperBounds-09
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: Structural Bound: 1
lola: REPORT NUM
lola: REPORT NUM
lola: FINISHED task # 66 (type FNDP) for AirplaneLD-COL-4000-UpperBounds-09
lola: tried executions : 1
lola: time used : 0.000000
lola: CANCELED task # 67 (type EQUN) for AirplaneLD-COL-4000-UpperBounds-09 (obsolete)
lola: CANCELED task # 68 (type EXCL) for AirplaneLD-COL-4000-UpperBounds-09 (obsolete)
lola: FINISHED task # 68 (type EXCL) for AirplaneLD-COL-4000-UpperBounds-09
lola: time used : 0.000000
lola: memory pages used : 1
sara: try reading problem file /home/mcc/execution/UpperBounds-67.sara.
sara: error: :5: error: syntax error, unexpected $end, expecting KEY_TRANSITION
sara: error while reading Petri net from file -- aborting [#04]
sara: see manual for a documentation of this error
sara: last error message: No such file or directory
lola: FINISHED task # 67 (type EQUN) for AirplaneLD-COL-4000-UpperBounds-09
lola: result : unknown
lola: time used : 0.000000
lola: memory pages used : 0
lola: LAUNCH task # 71 (type EXCL) for 18 AirplaneLD-COL-4000-UpperBounds-06
lola: time limit : 375 sec
lola: memory limit: 32 pages
lola: LAUNCH task # 69 (type FNDP) for 18 AirplaneLD-COL-4000-UpperBounds-06
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 70 (type EQUN) for 18 AirplaneLD-COL-4000-UpperBounds-06
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: Structural Bound: 1
lola: REPORT NUM
lola: FINISHED task # 71 (type EXCL) for AirplaneLD-COL-4000-UpperBounds-06
lola: markings : 3
lola: fired transitions : 2
lola: time used : 0.000000
lola: memory pages used : 1
lola: CANCELED task # 69 (type FNDP) for AirplaneLD-COL-4000-UpperBounds-06 (obsolete)
lola: CANCELED task # 70 (type EQUN) for AirplaneLD-COL-4000-UpperBounds-06 (obsolete)
lola: REPORT NUM
lola: FINISHED task # 69 (type FNDP) for AirplaneLD-COL-4000-UpperBounds-06
lola: fired transitions : 1
lola: tried executions : 1
lola: time used : 0.000000
sara: try reading problem file /home/mcc/execution/UpperBounds-70.sara.

lola: REPORT NUM
lola: FINISHED task # 70 (type EQUN) for AirplaneLD-COL-4000-UpperBounds-06
lola: time used : 1.000000
lola: LAUNCH task # 74 (type EXCL) for 30 AirplaneLD-COL-4000-UpperBounds-10
lola: time limit : 422 sec
lola: memory limit: 32 pages
lola: LAUNCH task # 72 (type FNDP) for 30 AirplaneLD-COL-4000-UpperBounds-10
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 73 (type EQUN) for 30 AirplaneLD-COL-4000-UpperBounds-10
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: Structural Bound: 1
lola: REPORT NUM
lola: FINISHED task # 74 (type EXCL) for AirplaneLD-COL-4000-UpperBounds-10
lola: markings : 2
lola: fired transitions : 1
lola: time used : 0.000000
lola: memory pages used : 1
lola: CANCELED task # 72 (type FNDP) for AirplaneLD-COL-4000-UpperBounds-10 (obsolete)
lola: CANCELED task # 73 (type EQUN) for AirplaneLD-COL-4000-UpperBounds-10 (obsolete)
lola: REPORT NUM
lola: FINISHED task # 72 (type FNDP) for AirplaneLD-COL-4000-UpperBounds-10
lola: tried executions : 1
lola: time used : 0.000000
sara: try reading problem file /home/mcc/execution/UpperBounds-73.sara.
sara: place or transition ordering is non-deterministic

lola: REPORT NUM
lola: FINISHED task # 73 (type EQUN) for AirplaneLD-COL-4000-UpperBounds-10
lola: time used : 0.000000
lola: LAUNCH task # 77 (type EXCL) for 21 AirplaneLD-COL-4000-UpperBounds-07
lola: time limit : 482 sec
lola: memory limit: 32 pages
lola: LAUNCH task # 75 (type FNDP) for 21 AirplaneLD-COL-4000-UpperBounds-07
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 76 (type EQUN) for 21 AirplaneLD-COL-4000-UpperBounds-07
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: Structural Bound: 8000
lola: REPORT NUM
lola: FINISHED task # 77 (type EXCL) for AirplaneLD-COL-4000-UpperBounds-07
lola: time used : 0.000000
lola: memory pages used : 1
lola: CANCELED task # 75 (type FNDP) for AirplaneLD-COL-4000-UpperBounds-07 (obsolete)
lola: CANCELED task # 76 (type EQUN) for AirplaneLD-COL-4000-UpperBounds-07 (obsolete)
lola: REPORT NUM
lola: FINISHED task # 75 (type FNDP) for AirplaneLD-COL-4000-UpperBounds-07
lola: tried executions : 1
lola: time used : 0.000000
sara: try reading problem file /home/mcc/execution/UpperBounds-76.sara.
lola: LAUNCH task # 80 (type EXCL) for 0 AirplaneLD-COL-4000-UpperBounds-00
lola: time limit : 562 sec
lola: memory limit: 32 pages
lola: LAUNCH task # 78 (type FNDP) for 0 AirplaneLD-COL-4000-UpperBounds-00
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 79 (type EQUN) for 0 AirplaneLD-COL-4000-UpperBounds-00
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: REPORT NUM
lola: FINISHED task # 78 (type FNDP) for AirplaneLD-COL-4000-UpperBounds-00
lola: fired transitions : 1
lola: tried executions : 1
lola: time used : 0.000000
lola: CANCELED task # 79 (type EQUN) for AirplaneLD-COL-4000-UpperBounds-00 (obsolete)
lola: CANCELED task # 80 (type EXCL) for AirplaneLD-COL-4000-UpperBounds-00 (obsolete)
lola: Structural Bound: 1
sara: try reading problem file /home/mcc/execution/UpperBounds-79.sara.

lola: REPORT NUM
lola: FINISHED task # 79 (type EQUN) for AirplaneLD-COL-4000-UpperBounds-00
lola: time used : 1.000000
lola: LAUNCH task # 83 (type EXCL) for 6 AirplaneLD-COL-4000-UpperBounds-02
lola: time limit : 675 sec
lola: memory limit: 32 pages
lola: LAUNCH task # 81 (type FNDP) for 6 AirplaneLD-COL-4000-UpperBounds-02
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 82 (type EQUN) for 6 AirplaneLD-COL-4000-UpperBounds-02
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 84 (type FNDP) for 45 AirplaneLD-COL-4000-UpperBounds-15
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: Structural Bound: 1
lola: REPORT NUM
lola: FINISHED task # 81 (type FNDP) for AirplaneLD-COL-4000-UpperBounds-02
lola: fired transitions : 5
lola: tried executions : 1
lola: time used : 1.000000
lola: CANCELED task # 82 (type EQUN) for AirplaneLD-COL-4000-UpperBounds-02 (obsolete)
lola: CANCELED task # 83 (type EXCL) for AirplaneLD-COL-4000-UpperBounds-02 (obsolete)
lola: LAUNCH task # 86 (type EXCL) for 45 AirplaneLD-COL-4000-UpperBounds-15
lola: time limit : 843 sec
lola: memory limit: 32 pages
lola: LAUNCH task # 85 (type EQUN) for 45 AirplaneLD-COL-4000-UpperBounds-15
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: REPORT NUM
lola: FINISHED task # 84 (type FNDP) for AirplaneLD-COL-4000-UpperBounds-15
lola: fired transitions : 5
lola: tried executions : 1
lola: time used : 1.000000
lola: CANCELED task # 85 (type EQUN) for AirplaneLD-COL-4000-UpperBounds-15 (obsolete)
lola: CANCELED task # 86 (type EXCL) for AirplaneLD-COL-4000-UpperBounds-15 (obsolete)
sara: error: :16003: error: syntax error, unexpected $end, expecting KEY_TRANSITION
sara: error while reading Petri net from file -- aborting [#04]
sara: see manual for a documentation of this error
sara: last error message: No such file or directory
sara: try reading problem file /home/mcc/execution/UpperBounds-82.sara.
lola: FINISHED task # 76 (type EQUN) for AirplaneLD-COL-4000-UpperBounds-07
lola: result : unknown
lola: time used : 2.000000
lola: memory pages used : 0
sara: try reading problem file /home/mcc/execution/UpperBounds-85.sara.
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
AirplaneLD-COL-4000-UpperBounds-00: BOUND 1 findpath
AirplaneLD-COL-4000-UpperBounds-01: BOUND 1 state space
AirplaneLD-COL-4000-UpperBounds-02: BOUND 1 findpath
AirplaneLD-COL-4000-UpperBounds-03: BOUND 1 findpath
AirplaneLD-COL-4000-UpperBounds-04: BOUND 1 state space
AirplaneLD-COL-4000-UpperBounds-05: BOUND 2 state space
AirplaneLD-COL-4000-UpperBounds-06: BOUND 1 state space
AirplaneLD-COL-4000-UpperBounds-07: BOUND 8000 state space
AirplaneLD-COL-4000-UpperBounds-09: BOUND 1 findpath
AirplaneLD-COL-4000-UpperBounds-10: BOUND 1 state space
AirplaneLD-COL-4000-UpperBounds-12: BOUND 1 state space
AirplaneLD-COL-4000-UpperBounds-13: BOUND 4000 state space
AirplaneLD-COL-4000-UpperBounds-15: BOUND 1 findpath

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
AirplaneLD-COL-4000-UpperBounds-08: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-11: BOUND 0 0 0 0 1 0 0 0
AirplaneLD-COL-4000-UpperBounds-14: BOUND 0 0 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 226 secs. Pages in use: 1
# running tasks: 0 of 4 Visible: 16
lola: LAUNCH task # 89 (type EXCL) for 42 AirplaneLD-COL-4000-UpperBounds-14
lola: time limit : 1124 sec
lola: memory limit: 32 pages
lola: LAUNCH task # 87 (type FNDP) for 42 AirplaneLD-COL-4000-UpperBounds-14
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 88 (type EQUN) for 42 AirplaneLD-COL-4000-UpperBounds-14
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: Structural Bound: 8000
lola: REPORT NUM
lola: FINISHED task # 89 (type EXCL) for AirplaneLD-COL-4000-UpperBounds-14
lola: time used : 0.000000
lola: memory pages used : 1
lola: CANCELED task # 87 (type FNDP) for AirplaneLD-COL-4000-UpperBounds-14 (obsolete)
lola: CANCELED task # 88 (type EQUN) for AirplaneLD-COL-4000-UpperBounds-14 (obsolete)
lola: REPORT NUM
lola: FINISHED task # 87 (type FNDP) for AirplaneLD-COL-4000-UpperBounds-14
lola: tried executions : 1
lola: time used : 0.000000
sara: try reading problem file /home/mcc/execution/UpperBounds-88.sara.
sara: error: :16003: error: syntax error, unexpected $end, expecting KEY_TRANSITION
sara: error while reading Petri net from file -- aborting [#04]
sara: see manual for a documentation of this error
sara: last error message: No such file or directory
lola: FINISHED task # 88 (type EQUN) for AirplaneLD-COL-4000-UpperBounds-14
lola: result : unknown
lola: time used : 1.000000
lola: memory pages used : 0
lola: LAUNCH task # 92 (type EXCL) for 33 AirplaneLD-COL-4000-UpperBounds-11
lola: time limit : 1685 sec
lola: memory limit: 32 pages
lola: LAUNCH task # 90 (type FNDP) for 33 AirplaneLD-COL-4000-UpperBounds-11
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 91 (type EQUN) for 33 AirplaneLD-COL-4000-UpperBounds-11
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: Structural Bound: 1
lola: REPORT NUM
lola: FINISHED task # 92 (type EXCL) for AirplaneLD-COL-4000-UpperBounds-11
lola: markings : 5
lola: fired transitions : 4
lola: time used : 0.000000
lola: memory pages used : 1
lola: CANCELED task # 90 (type FNDP) for AirplaneLD-COL-4000-UpperBounds-11 (obsolete)
lola: CANCELED task # 91 (type EQUN) for AirplaneLD-COL-4000-UpperBounds-11 (obsolete)
lola: REPORT NUM
lola: FINISHED task # 90 (type FNDP) for AirplaneLD-COL-4000-UpperBounds-11
lola: fired transitions : 3
lola: tried executions : 1
lola: time used : 0.000000
sara: try reading problem file /home/mcc/execution/UpperBounds-91.sara.

lola: REPORT NUM
lola: FINISHED task # 91 (type EQUN) for AirplaneLD-COL-4000-UpperBounds-11
lola: time used : 0.000000
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
AirplaneLD-COL-4000-UpperBounds-00: BOUND 1 findpath
AirplaneLD-COL-4000-UpperBounds-01: BOUND 1 state space
AirplaneLD-COL-4000-UpperBounds-02: BOUND 1 findpath
AirplaneLD-COL-4000-UpperBounds-03: BOUND 1 findpath
AirplaneLD-COL-4000-UpperBounds-04: BOUND 1 state space
AirplaneLD-COL-4000-UpperBounds-05: BOUND 2 state space
AirplaneLD-COL-4000-UpperBounds-06: BOUND 1 state space
AirplaneLD-COL-4000-UpperBounds-07: BOUND 8000 state space
AirplaneLD-COL-4000-UpperBounds-09: BOUND 1 findpath
AirplaneLD-COL-4000-UpperBounds-10: BOUND 1 state space
AirplaneLD-COL-4000-UpperBounds-11: BOUND 1 state space
AirplaneLD-COL-4000-UpperBounds-12: BOUND 1 state space
AirplaneLD-COL-4000-UpperBounds-13: BOUND 4000 state space
AirplaneLD-COL-4000-UpperBounds-14: BOUND 8000 state space
AirplaneLD-COL-4000-UpperBounds-15: BOUND 1 findpath

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
AirplaneLD-COL-4000-UpperBounds-08: BOUND 0 0 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 231 secs. Pages in use: 1
# running tasks: 0 of 4 Visible: 16
sara: place or transition ordering is non-deterministic
sara: place or transition ordering is non-deterministic
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
AirplaneLD-COL-4000-UpperBounds-00: BOUND 1 findpath
AirplaneLD-COL-4000-UpperBounds-01: BOUND 1 state space
AirplaneLD-COL-4000-UpperBounds-02: BOUND 1 findpath
AirplaneLD-COL-4000-UpperBounds-03: BOUND 1 findpath
AirplaneLD-COL-4000-UpperBounds-04: BOUND 1 state space
AirplaneLD-COL-4000-UpperBounds-05: BOUND 2 state space
AirplaneLD-COL-4000-UpperBounds-06: BOUND 1 state space
AirplaneLD-COL-4000-UpperBounds-07: BOUND 8000 state space
AirplaneLD-COL-4000-UpperBounds-09: BOUND 1 findpath
AirplaneLD-COL-4000-UpperBounds-10: BOUND 1 state space
AirplaneLD-COL-4000-UpperBounds-11: BOUND 1 state space
AirplaneLD-COL-4000-UpperBounds-12: BOUND 1 state space
AirplaneLD-COL-4000-UpperBounds-13: BOUND 4000 state space
AirplaneLD-COL-4000-UpperBounds-14: BOUND 8000 state space
AirplaneLD-COL-4000-UpperBounds-15: BOUND 1 findpath

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
AirplaneLD-COL-4000-UpperBounds-08: BOUND 0 0 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 236 secs. Pages in use: 1
# running tasks: 0 of 4 Visible: 16


lola: REPORT NUM
lola: FINISHED task # 82 (type EQUN) for AirplaneLD-COL-4000-UpperBounds-02
lola: time used : 15.000000
lola: REPORT NUM
lola: FINISHED task # 85 (type EQUN) for AirplaneLD-COL-4000-UpperBounds-15
lola: time used : 14.000000
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
AirplaneLD-COL-4000-UpperBounds-00: BOUND 1 findpath
AirplaneLD-COL-4000-UpperBounds-01: BOUND 1 state space
AirplaneLD-COL-4000-UpperBounds-02: BOUND 1 findpath
AirplaneLD-COL-4000-UpperBounds-03: BOUND 1 findpath
AirplaneLD-COL-4000-UpperBounds-04: BOUND 1 state space
AirplaneLD-COL-4000-UpperBounds-05: BOUND 2 state space
AirplaneLD-COL-4000-UpperBounds-06: BOUND 1 state space
AirplaneLD-COL-4000-UpperBounds-07: BOUND 8000 state space
AirplaneLD-COL-4000-UpperBounds-09: BOUND 1 findpath
AirplaneLD-COL-4000-UpperBounds-10: BOUND 1 state space
AirplaneLD-COL-4000-UpperBounds-11: BOUND 1 state space
AirplaneLD-COL-4000-UpperBounds-12: BOUND 1 state space
AirplaneLD-COL-4000-UpperBounds-13: BOUND 4000 state space
AirplaneLD-COL-4000-UpperBounds-14: BOUND 8000 state space
AirplaneLD-COL-4000-UpperBounds-15: BOUND 1 findpath

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
AirplaneLD-COL-4000-UpperBounds-08: BOUND 0 0 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 241 secs. Pages in use: 1
# running tasks: 0 of 4 Visible: 16
lola: LAUNCH task # 95 (type EXCL) for 24 AirplaneLD-COL-4000-UpperBounds-08
lola: time limit : 3356 sec
lola: memory limit: 32 pages
lola: LAUNCH task # 93 (type FNDP) for 24 AirplaneLD-COL-4000-UpperBounds-08
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 94 (type EQUN) for 24 AirplaneLD-COL-4000-UpperBounds-08
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
sara: try reading problem file /home/mcc/execution/UpperBounds-94.sara.
lola: Structural Bound: 1
lola: REPORT NUM
lola: FINISHED task # 95 (type EXCL) for AirplaneLD-COL-4000-UpperBounds-08
lola: markings : 2
lola: fired transitions : 1
lola: time used : 0.000000
lola: memory pages used : 1
lola: CANCELED task # 93 (type FNDP) for AirplaneLD-COL-4000-UpperBounds-08 (obsolete)
lola: CANCELED task # 94 (type EQUN) for AirplaneLD-COL-4000-UpperBounds-08 (obsolete)
lola: Portfolio finished: no open formulas

FINAL RESULTS
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
AirplaneLD-COL-4000-UpperBounds-00: BOUND 1 findpath
AirplaneLD-COL-4000-UpperBounds-01: BOUND 1 state space
AirplaneLD-COL-4000-UpperBounds-02: BOUND 1 findpath
AirplaneLD-COL-4000-UpperBounds-03: BOUND 1 findpath
AirplaneLD-COL-4000-UpperBounds-04: BOUND 1 state space
AirplaneLD-COL-4000-UpperBounds-05: BOUND 2 state space
AirplaneLD-COL-4000-UpperBounds-06: BOUND 1 state space
AirplaneLD-COL-4000-UpperBounds-07: BOUND 8000 state space
AirplaneLD-COL-4000-UpperBounds-08: BOUND 1 state space
AirplaneLD-COL-4000-UpperBounds-09: BOUND 1 findpath
AirplaneLD-COL-4000-UpperBounds-10: BOUND 1 state space
AirplaneLD-COL-4000-UpperBounds-11: BOUND 1 state space
AirplaneLD-COL-4000-UpperBounds-12: BOUND 1 state space
AirplaneLD-COL-4000-UpperBounds-13: BOUND 4000 state space
AirplaneLD-COL-4000-UpperBounds-14: BOUND 8000 state space
AirplaneLD-COL-4000-UpperBounds-15: BOUND 1 findpath


Time elapsed: 244 secs. Pages in use: 1

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="AirplaneLD-COL-4000"
export BK_EXAMINATION="UpperBounds"
export BK_TOOL="lola"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-4028"
echo " Executing tool lola"
echo " Input is AirplaneLD-COL-4000, examination is UpperBounds"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r004-tall-162037985700237"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/AirplaneLD-COL-4000.tgz
mv AirplaneLD-COL-4000 execution
cd execution
if [ "UpperBounds" = "ReachabilityDeadlock" ] || [ "UpperBounds" = "UpperBounds" ] || [ "UpperBounds" = "QuasiLiveness" ] || [ "UpperBounds" = "StableMarking" ] || [ "UpperBounds" = "Liveness" ] || [ "UpperBounds" = "OneSafe" ] || [ "UpperBounds" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "UpperBounds" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "UpperBounds" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "UpperBounds.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property UpperBounds.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "UpperBounds.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' UpperBounds.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ "UpperBounds" = "ReachabilityDeadlock" ] || [ "UpperBounds" = "QuasiLiveness" ] || [ "UpperBounds" = "StableMarking" ] || [ "UpperBounds" = "Liveness" ] || [ "UpperBounds" = "OneSafe" ] ; then
echo "FORMULA_NAME UpperBounds"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;