Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/data/fko/mcc2020-input.r227-oct2-159033546600362.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fko/mcc2020-input.qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
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=====================================================================
Generated by BenchKit 2-4028
Executing tool itstools
Input is Sudoku-PT-AN07, examination is LTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r227-oct2-159033546600362
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 2.7M
-rw-r--r-- 1 mcc users 3.5K May 14 03:59 CTLCardinality.txt
-rw-r--r-- 1 mcc users 17K May 14 03:59 CTLCardinality.xml
-rw-r--r-- 1 mcc users 158K May 13 21:33 CTLFireability.txt
-rw-r--r-- 1 mcc users 558K May 13 21:33 CTLFireability.xml
-rw-r--r-- 1 mcc users 93K May 14 10:06 LTLCardinality.txt
-rw-r--r-- 1 mcc users 329K May 14 10:06 LTLCardinality.xml
-rw-r--r-- 1 mcc users 142K May 14 10:06 LTLFireability.txt
-rw-r--r-- 1 mcc users 504K May 14 10:06 LTLFireability.xml
-rw-r--r-- 1 mcc users 1 May 12 20:42 NewModel
-rw-r--r-- 1 mcc users 4.0K May 13 15:06 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 19K May 13 15:06 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 153K May 13 10:24 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 538K May 13 10:24 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.6K May 13 16:53 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.3K May 13 16:53 UpperBounds.xml
-rw-r--r-- 1 mcc users 5 May 12 20:42 equiv_col
-rw-r--r-- 1 mcc users 5 May 12 20:42 instance
-rw-r--r-- 1 mcc users 6 May 12 20:42 iscolored
-rw-r--r-- 1 mcc users 186K May 12 20:42 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME Sudoku-PT-AN07-00
FORMULA_NAME Sudoku-PT-AN07-01
FORMULA_NAME Sudoku-PT-AN07-02
FORMULA_NAME Sudoku-PT-AN07-03
FORMULA_NAME Sudoku-PT-AN07-04
FORMULA_NAME Sudoku-PT-AN07-05
FORMULA_NAME Sudoku-PT-AN07-06
FORMULA_NAME Sudoku-PT-AN07-07
FORMULA_NAME Sudoku-PT-AN07-08
FORMULA_NAME Sudoku-PT-AN07-09
FORMULA_NAME Sudoku-PT-AN07-10
FORMULA_NAME Sudoku-PT-AN07-11
FORMULA_NAME Sudoku-PT-AN07-12
FORMULA_NAME Sudoku-PT-AN07-13
FORMULA_NAME Sudoku-PT-AN07-14
FORMULA_NAME Sudoku-PT-AN07-15

=== Now, execution of the tool begins

BK_START 1590487613341

[2020-05-26 10:06:54] [INFO ] Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, LTLFireability, -z3path, /home/mcc/BenchKit//z3/bin/z3, -yices2path, /home/mcc/BenchKit//yices/bin/yices, -its, -ltsminpath, /home/mcc/BenchKit//lts_install_dir/, -greatspnpath, /home/mcc/BenchKit//greatspn/, -order, META, -manyOrder, -smt, -timeout, 3600]
[2020-05-26 10:06:54] [INFO ] Parsing pnml file : /home/mcc/execution/model.pnml
[2020-05-26 10:06:54] [INFO ] Load time of PNML (sax parser for PT used): 67 ms
[2020-05-26 10:06:54] [INFO ] Transformed 490 places.
[2020-05-26 10:06:54] [INFO ] Transformed 343 transitions.
[2020-05-26 10:06:54] [INFO ] Parsed PT model containing 490 places and 343 transitions in 103 ms.
Parsed 16 properties from file /home/mcc/execution/LTLFireability.xml in 77 ms.
Working with output stream class java.io.PrintStream
Finished random walk after 44 steps, including 1 resets, run visited all 355 properties in 7 ms. (steps per millisecond=6 )
[2020-05-26 10:06:55] [INFO ] Initial state reduction rules for CTL removed 5 formulas.
[2020-05-26 10:06:55] [INFO ] Flatten gal took : 181 ms
FORMULA Sudoku-PT-AN07-15 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA Sudoku-PT-AN07-11 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA Sudoku-PT-AN07-06 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA Sudoku-PT-AN07-04 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA Sudoku-PT-AN07-01 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
[2020-05-26 10:06:55] [INFO ] Flatten gal took : 145 ms
Using solver Z3 to compute partial order matrices.
Built C files in :
/home/mcc/execution
[2020-05-26 10:06:56] [INFO ] Applying decomposition
[2020-05-26 10:06:56] [INFO ] Flatten gal took : 154 ms
[2020-05-26 10:06:56] [INFO ] Input system was already deterministic with 343 transitions.
Converted graph to binary with : CommandLine [args=[/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.louvain.binaries_1.0.0.202005100927/bin/convert-linux64, -i, /tmp/graph11121649900386188841.txt, -o, /tmp/graph11121649900386188841.bin, -w, /tmp/graph11121649900386188841.weights], workingDir=null]
Built communities with : CommandLine [args=[/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.louvain.binaries_1.0.0.202005100927/bin/louvain-linux64, /tmp/graph11121649900386188841.bin, -l, -1, -v, -w, /tmp/graph11121649900386188841.weights, -q, 0, -e, 0.001], workingDir=null]
[2020-05-26 10:06:56] [INFO ] Decomposing Gal with order
[2020-05-26 10:06:56] [INFO ] Rewriting arrays to variables to allow decomposition.
Presburger conditions satisfied. Using coverability to approximate state space in K-Induction.
// Phase 1: matrix 343 rows 490 cols
[2020-05-26 10:06:57] [INFO ] Computed 147 place invariants in 29 ms
[2020-05-26 10:06:57] [INFO ] Removed a total of 539 redundant transitions.
inv : Rows_2_6 + Board_2_0_6 + Board_2_1_6 + Board_2_2_6 + Board_2_3_6 + Board_2_4_6 + Board_2_5_6 + Board_2_6_6 = 1
inv : Rows_4_6 + Board_4_0_6 + Board_4_1_6 + Board_4_2_6 + Board_4_3_6 + Board_4_4_6 + Board_4_5_6 + Board_4_6_6 = 1
inv : Board_0_6_5 + Board_1_6_5 + Board_2_6_5 + Board_3_6_5 + Board_4_6_5 + Board_5_6_5 + Board_6_6_5 + Columns_6_5 = 1
inv : Rows_0_6 + Board_0_0_6 + Board_0_1_6 + Board_0_2_6 + Board_0_3_6 + Board_0_4_6 + Board_0_5_6 + Board_0_6_6 = 1
inv : Rows_6_6 + Board_6_0_6 + Board_6_1_6 + Board_6_2_6 + Board_6_3_6 + Board_6_4_6 + Board_6_5_6 + Board_6_6_6 = 1
inv : Board_6_1_0 + Board_6_1_1 + Board_6_1_2 + Board_6_1_3 + Board_6_1_4 + Board_6_1_5 + Board_6_1_6 + Cells_6_1 = 1
inv : Rows_4_5 + Board_4_0_5 + Board_4_1_5 + Board_4_2_5 + Board_4_3_5 + Board_4_4_5 + Board_4_5_5 + Board_4_6_5 = 1
inv : Rows_6_5 + Board_6_0_5 + Board_6_1_5 + Board_6_2_5 + Board_6_3_5 + Board_6_4_5 + Board_6_5_5 + Board_6_6_5 = 1
inv : Rows_0_5 + Board_0_0_5 + Board_0_1_5 + Board_0_2_5 + Board_0_3_5 + Board_0_4_5 + Board_0_5_5 + Board_0_6_5 = 1
inv : Board_0_6_4 + Board_1_6_4 + Board_2_6_4 + Board_3_6_4 + Board_4_6_4 + Board_5_6_4 + Board_6_6_4 + Columns_6_4 = 1
inv : Board_4_3_0 + Board_4_3_1 + Board_4_3_2 + Board_4_3_3 + Board_4_3_4 + Board_4_3_5 + Board_4_3_6 + Cells_4_3 = 1
inv : Board_3_4_0 + Board_3_4_1 + Board_3_4_2 + Board_3_4_3 + Board_3_4_4 + Board_3_4_5 + Board_3_4_6 + Cells_3_4 = 1
inv : Board_1_0_0 + Board_1_0_1 + Board_1_0_2 + Board_1_0_3 + Board_1_0_4 + Board_1_0_5 + Board_1_0_6 + Cells_1_0 = 1
inv : Board_0_1_6 + Board_1_1_6 + Board_2_1_6 + Board_3_1_6 + Board_4_1_6 + Board_5_1_6 + Board_6_1_6 + Columns_1_6 = 1
inv : Rows_2_5 + Board_2_0_5 + Board_2_1_5 + Board_2_2_5 + Board_2_3_5 + Board_2_4_5 + Board_2_5_5 + Board_2_6_5 = 1
inv : Board_0_2_1 + Board_1_2_1 + Board_2_2_1 + Board_3_2_1 + Board_4_2_1 + Board_5_2_1 + Board_6_2_1 + Columns_2_1 = 1
inv : Rows_4_4 + Board_4_0_4 + Board_4_1_4 + Board_4_2_4 + Board_4_3_4 + Board_4_4_4 + Board_4_5_4 + Board_4_6_4 = 1
inv : Rows_0_4 + Board_0_0_4 + Board_0_1_4 + Board_0_2_4 + Board_0_3_4 + Board_0_4_4 + Board_0_5_4 + Board_0_6_4 = 1
inv : Board_1_6_0 + Board_1_6_1 + Board_1_6_2 + Board_1_6_3 + Board_1_6_4 + Board_1_6_5 + Board_1_6_6 + Cells_1_6 = 1
inv : Rows_0_3 + Board_0_0_3 + Board_0_1_3 + Board_0_2_3 + Board_0_3_3 + Board_0_4_3 + Board_0_5_3 + Board_0_6_3 = 1
inv : Board_0_2_0 + Board_1_2_0 + Board_2_2_0 + Board_3_2_0 + Board_4_2_0 + Board_5_2_0 + Board_6_2_0 + Columns_2_0 = 1
inv : Board_0_1_2 + Board_1_1_2 + Board_2_1_2 + Board_3_1_2 + Board_4_1_2 + Board_5_1_2 + Board_6_1_2 + Columns_1_2 = 1
inv : Board_0_6_0 + Board_0_6_1 + Board_0_6_2 + Board_0_6_3 + Board_0_6_4 + Board_0_6_5 + Board_0_6_6 + Cells_0_6 = 1
inv : Board_0_6_6 + Board_1_6_6 + Board_2_6_6 + Board_3_6_6 + Board_4_6_6 + Board_5_6_6 + Board_6_6_6 + Columns_6_6 = 1
inv : Board_1_5_0 + Board_1_5_1 + Board_1_5_2 + Board_1_5_3 + Board_1_5_4 + Board_1_5_5 + Board_1_5_6 + Cells_1_5 = 1
inv : Board_2_4_0 + Board_2_4_1 + Board_2_4_2 + Board_2_4_3 + Board_2_4_4 + Board_2_4_5 + Board_2_4_6 + Cells_2_4 = 1
inv : Board_0_2_3 + Board_1_2_3 + Board_2_2_3 + Board_3_2_3 + Board_4_2_3 + Board_5_2_3 + Board_6_2_3 + Columns_2_3 = 1
inv : Rows_2_2 + Board_2_0_2 + Board_2_1_2 + Board_2_2_2 + Board_2_3_2 + Board_2_4_2 + Board_2_5_2 + Board_2_6_2 = 1
inv : Rows_0_1 + Board_0_0_1 + Board_0_1_1 + Board_0_2_1 + Board_0_3_1 + Board_0_4_1 + Board_0_5_1 + Board_0_6_1 = 1
inv : Board_0_1_1 + Board_1_1_1 + Board_2_1_1 + Board_3_1_1 + Board_4_1_1 + Board_5_1_1 + Board_6_1_1 + Columns_1_1 = 1
inv : Board_0_2_2 + Board_1_2_2 + Board_2_2_2 + Board_3_2_2 + Board_4_2_2 + Board_5_2_2 + Board_6_2_2 + Columns_2_2 = 1
inv : Board_0_2_4 + Board_1_2_4 + Board_2_2_4 + Board_3_2_4 + Board_4_2_4 + Board_5_2_4 + Board_6_2_4 + Columns_2_4 = 1
inv : Board_0_1_0 + Board_1_1_0 + Board_2_1_0 + Board_3_1_0 + Board_4_1_0 + Board_5_1_0 + Board_6_1_0 + Columns_1_0 = 1
inv : Board_6_0_0 + Board_6_0_1 + Board_6_0_2 + Board_6_0_3 + Board_6_0_4 + Board_6_0_5 + Board_6_0_6 + Cells_6_0 = 1
inv : Board_0_5_6 + Board_1_5_6 + Board_2_5_6 + Board_3_5_6 + Board_4_5_6 + Board_5_5_6 + Board_6_5_6 + Columns_5_6 = 1
inv : Rows_6_0 + Board_6_0_0 + Board_6_1_0 + Board_6_2_0 + Board_6_3_0 + Board_6_4_0 + Board_6_5_0 + Board_6_6_0 = 1
inv : Rows_0_2 + Board_0_0_2 + Board_0_1_2 + Board_0_2_2 + Board_0_3_2 + Board_0_4_2 + Board_0_5_2 + Board_0_6_2 = 1
inv : Board_3_5_0 + Board_3_5_1 + Board_3_5_2 + Board_3_5_3 + Board_3_5_4 + Board_3_5_5 + Board_3_5_6 + Cells_3_5 = 1
inv : Rows_2_4 + Board_2_0_4 + Board_2_1_4 + Board_2_2_4 + Board_2_3_4 + Board_2_4_4 + Board_2_5_4 + Board_2_6_4 = 1
inv : Rows_0_0 + Board_0_0_0 + Board_0_1_0 + Board_0_2_0 + Board_0_3_0 + Board_0_4_0 + Board_0_5_0 + Board_0_6_0 = 1
inv : Board_0_5_5 + Board_1_5_5 + Board_2_5_5 + Board_3_5_5 + Board_4_5_5 + Board_5_5_5 + Board_6_5_5 + Columns_5_5 = 1
inv : Board_0_1_0 + Board_0_1_1 + Board_0_1_2 + Board_0_1_3 + Board_0_1_4 + Board_0_1_5 + Board_0_1_6 + Cells_0_1 = 1
inv : Rows_2_3 + Board_2_0_3 + Board_2_1_3 + Board_2_2_3 + Board_2_3_3 + Board_2_4_3 + Board_2_5_3 + Board_2_6_3 = 1
inv : Board_6_6_0 + Board_6_6_1 + Board_6_6_2 + Board_6_6_3 + Board_6_6_4 + Board_6_6_5 + Board_6_6_6 + Cells_6_6 = 1
inv : Board_5_2_0 + Board_5_2_1 + Board_5_2_2 + Board_5_2_3 + Board_5_2_4 + Board_5_2_5 + Board_5_2_6 + Cells_5_2 = 1
inv : Board_0_0_6 + Board_1_0_6 + Board_2_0_6 + Board_3_0_6 + Board_4_0_6 + Board_5_0_6 + Board_6_0_6 + Columns_0_6 = 1
inv : Board_0_3_0 + Board_1_3_0 + Board_2_3_0 + Board_3_3_0 + Board_4_3_0 + Board_5_3_0 + Board_6_3_0 + Columns_3_0 = 1
inv : Board_0_0_5 + Board_1_0_5 + Board_2_0_5 + Board_3_0_5 + Board_4_0_5 + Board_5_0_5 + Board_6_0_5 + Columns_0_5 = 1
inv : Board_0_5_3 + Board_1_5_3 + Board_2_5_3 + Board_3_5_3 + Board_4_5_3 + Board_5_5_3 + Board_6_5_3 + Columns_5_3 = 1
inv : Board_0_5_0 + Board_0_5_1 + Board_0_5_2 + Board_0_5_3 + Board_0_5_4 + Board_0_5_5 + Board_0_5_6 + Cells_0_5 = 1
inv : Board_4_4_0 + Board_4_4_1 + Board_4_4_2 + Board_4_4_3 + Board_4_4_4 + Board_4_4_5 + Board_4_4_6 + Cells_4_4 = 1
inv : Rows_5_0 + Board_5_0_0 + Board_5_1_0 + Board_5_2_0 + Board_5_3_0 + Board_5_4_0 + Board_5_5_0 + Board_5_6_0 = 1
inv : Board_0_2_5 + Board_1_2_5 + Board_2_2_5 + Board_3_2_5 + Board_4_2_5 + Board_5_2_5 + Board_6_2_5 + Columns_2_5 = 1
inv : Rows_2_0 + Board_2_0_0 + Board_2_1_0 + Board_2_2_0 + Board_2_3_0 + Board_2_4_0 + Board_2_5_0 + Board_2_6_0 = 1
inv : Board_0_5_1 + Board_1_5_1 + Board_2_5_1 + Board_3_5_1 + Board_4_5_1 + Board_5_5_1 + Board_6_5_1 + Columns_5_1 = 1
inv : Board_0_0_3 + Board_1_0_3 + Board_2_0_3 + Board_3_0_3 + Board_4_0_3 + Board_5_0_3 + Board_6_0_3 + Columns_0_3 = 1
inv : Board_2_3_0 + Board_2_3_1 + Board_2_3_2 + Board_2_3_3 + Board_2_3_4 + Board_2_3_5 + Board_2_3_6 + Cells_2_3 = 1
inv : Board_5_4_0 + Board_5_4_1 + Board_5_4_2 + Board_5_4_3 + Board_5_4_4 + Board_5_4_5 + Board_5_4_6 + Cells_5_4 = 1
inv : Board_0_3_4 + Board_1_3_4 + Board_2_3_4 + Board_3_3_4 + Board_4_3_4 + Board_5_3_4 + Board_6_3_4 + Columns_3_4 = 1
inv : Rows_6_2 + Board_6_0_2 + Board_6_1_2 + Board_6_2_2 + Board_6_3_2 + Board_6_4_2 + Board_6_5_2 + Board_6_6_2 = 1
inv : Board_0_0_0 + Board_0_0_1 + Board_0_0_2 + Board_0_0_3 + Board_0_0_4 + Board_0_0_5 + Board_0_0_6 + Cells_0_0 = 1
inv : Board_0_6_1 + Board_1_6_1 + Board_2_6_1 + Board_3_6_1 + Board_4_6_1 + Board_5_6_1 + Board_6_6_1 + Columns_6_1 = 1
inv : Board_4_5_0 + Board_4_5_1 + Board_4_5_2 + Board_4_5_3 + Board_4_5_4 + Board_4_5_5 + Board_4_5_6 + Cells_4_5 = 1
inv : Rows_4_3 + Board_4_0_3 + Board_4_1_3 + Board_4_2_3 + Board_4_3_3 + Board_4_4_3 + Board_4_5_3 + Board_4_6_3 = 1
inv : Rows_1_3 + Board_1_0_3 + Board_1_1_3 + Board_1_2_3 + Board_1_3_3 + Board_1_4_3 + Board_1_5_3 + Board_1_6_3 = 1
inv : Rows_1_1 + Board_1_0_1 + Board_1_1_1 + Board_1_2_1 + Board_1_3_1 + Board_1_4_1 + Board_1_5_1 + Board_1_6_1 = 1
inv : Board_3_6_0 + Board_3_6_1 + Board_3_6_2 + Board_3_6_3 + Board_3_6_4 + Board_3_6_5 + Board_3_6_6 + Cells_3_6 = 1
inv : Board_0_1_3 + Board_1_1_3 + Board_2_1_3 + Board_3_1_3 + Board_4_1_3 + Board_5_1_3 + Board_6_1_3 + Columns_1_3 = 1
inv : Rows_6_4 + Board_6_0_4 + Board_6_1_4 + Board_6_2_4 + Board_6_3_4 + Board_6_4_4 + Board_6_5_4 + Board_6_6_4 = 1
inv : Board_0_6_3 + Board_1_6_3 + Board_2_6_3 + Board_3_6_3 + Board_4_6_3 + Board_5_6_3 + Board_6_6_3 + Columns_6_3 = 1
inv : Board_5_3_0 + Board_5_3_1 + Board_5_3_2 + Board_5_3_3 + Board_5_3_4 + Board_5_3_5 + Board_5_3_6 + Cells_5_3 = 1
inv : Rows_3_4 + Board_3_0_4 + Board_3_1_4 + Board_3_2_4 + Board_3_3_4 + Board_3_4_4 + Board_3_5_4 + Board_3_6_4 = 1
inv : Board_6_2_0 + Board_6_2_1 + Board_6_2_2 + Board_6_2_3 + Board_6_2_4 + Board_6_2_5 + Board_6_2_6 + Cells_6_2 = 1
inv : Board_1_4_0 + Board_1_4_1 + Board_1_4_2 + Board_1_4_3 + Board_1_4_4 + Board_1_4_5 + Board_1_4_6 + Cells_1_4 = 1
inv : Board_0_0_1 + Board_1_0_1 + Board_2_0_1 + Board_3_0_1 + Board_4_0_1 + Board_5_0_1 + Board_6_0_1 + Columns_0_1 = 1
inv : Board_0_1_5 + Board_1_1_5 + Board_2_1_5 + Board_3_1_5 + Board_4_1_5 + Board_5_1_5 + Board_6_1_5 + Columns_1_5 = 1
inv : Board_0_3_2 + Board_1_3_2 + Board_2_3_2 + Board_3_3_2 + Board_4_3_2 + Board_5_3_2 + Board_6_3_2 + Columns_3_2 = 1
inv : Board_0_4_6 + Board_1_4_6 + Board_2_4_6 + Board_3_4_6 + Board_4_4_6 + Board_5_4_6 + Board_6_4_6 + Columns_4_6 = 1
inv : Rows_4_1 + Board_4_0_1 + Board_4_1_1 + Board_4_2_1 + Board_4_3_1 + Board_4_4_1 + Board_4_5_1 + Board_4_6_1 = 1
inv : Rows_1_6 + Board_1_0_6 + Board_1_1_6 + Board_1_2_6 + Board_1_3_6 + Board_1_4_6 + Board_1_5_6 + Board_1_6_6 = 1
inv : Board_0_4_2 + Board_1_4_2 + Board_2_4_2 + Board_3_4_2 + Board_4_4_2 + Board_5_4_2 + Board_6_4_2 + Columns_4_2 = 1
inv : Rows_3_6 + Board_3_0_6 + Board_3_1_6 + Board_3_2_6 + Board_3_3_6 + Board_3_4_6 + Board_3_5_6 + Board_3_6_6 = 1
inv : Board_6_4_0 + Board_6_4_1 + Board_6_4_2 + Board_6_4_3 + Board_6_4_4 + Board_6_4_5 + Board_6_4_6 + Cells_6_4 = 1
inv : Board_4_6_0 + Board_4_6_1 + Board_4_6_2 + Board_4_6_3 + Board_4_6_4 + Board_4_6_5 + Board_4_6_6 + Cells_4_6 = 1
inv : Rows_5_6 + Board_5_0_6 + Board_5_1_6 + Board_5_2_6 + Board_5_3_6 + Board_5_4_6 + Board_5_5_6 + Board_5_6_6 = 1
inv : Board_0_4_1 + Board_1_4_1 + Board_2_4_1 + Board_3_4_1 + Board_4_4_1 + Board_5_4_1 + Board_6_4_1 + Columns_4_1 = 1
inv : Board_3_1_0 + Board_3_1_1 + Board_3_1_2 + Board_3_1_3 + Board_3_1_4 + Board_3_1_5 + Board_3_1_6 + Cells_3_1 = 1
inv : Board_5_5_0 + Board_5_5_1 + Board_5_5_2 + Board_5_5_3 + Board_5_5_4 + Board_5_5_5 + Board_5_5_6 + Cells_5_5 = 1
inv : Board_2_2_0 + Board_2_2_1 + Board_2_2_2 + Board_2_2_3 + Board_2_2_4 + Board_2_2_5 + Board_2_2_6 + Cells_2_2 = 1
inv : Rows_5_4 + Board_5_0_4 + Board_5_1_4 + Board_5_2_4 + Board_5_3_4 + Board_5_4_4 + Board_5_5_4 + Board_5_6_4 = 1
inv : Board_0_4_4 + Board_1_4_4 + Board_2_4_4 + Board_3_4_4 + Board_4_4_4 + Board_5_4_4 + Board_6_4_4 + Columns_4_4 = 1
inv : Rows_1_4 + Board_1_0_4 + Board_1_1_4 + Board_1_2_4 + Board_1_3_4 + Board_1_4_4 + Board_1_5_4 + Board_1_6_4 = 1
inv : Board_1_3_0 + Board_1_3_1 + Board_1_3_2 + Board_1_3_3 + Board_1_3_4 + Board_1_3_5 + Board_1_3_6 + Cells_1_3 = 1
inv : Rows_3_3 + Board_3_0_3 + Board_3_1_3 + Board_3_2_3 + Board_3_3_3 + Board_3_4_3 + Board_3_5_3 + Board_3_6_3 = 1
inv : Board_0_4_3 + Board_1_4_3 + Board_2_4_3 + Board_3_4_3 + Board_4_4_3 + Board_5_4_3 + Board_6_4_3 + Columns_4_3 = 1
inv : Rows_1_5 + Board_1_0_5 + Board_1_1_5 + Board_1_2_5 + Board_1_3_5 + Board_1_4_5 + Board_1_5_5 + Board_1_6_5 = 1
inv : Rows_5_5 + Board_5_0_5 + Board_5_1_5 + Board_5_2_5 + Board_5_3_5 + Board_5_4_5 + Board_5_5_5 + Board_5_6_5 = 1
inv : Board_4_0_0 + Board_4_0_1 + Board_4_0_2 + Board_4_0_3 + Board_4_0_4 + Board_4_0_5 + Board_4_0_6 + Cells_4_0 = 1
inv : Board_1_2_0 + Board_1_2_1 + Board_1_2_2 + Board_1_2_3 + Board_1_2_4 + Board_1_2_5 + Board_1_2_6 + Cells_1_2 = 1
inv : Rows_5_2 + Board_5_0_2 + Board_5_1_2 + Board_5_2_2 + Board_5_3_2 + Board_5_4_2 + Board_5_5_2 + Board_5_6_2 = 1
inv : Board_2_1_0 + Board_2_1_1 + Board_2_1_2 + Board_2_1_3 + Board_2_1_4 + Board_2_1_5 + Board_2_1_6 + Cells_2_1 = 1
inv : Rows_3_2 + Board_3_0_2 + Board_3_1_2 + Board_3_2_2 + Board_3_3_2 + Board_3_4_2 + Board_3_5_2 + Board_3_6_2 = 1
inv : Board_0_3_5 + Board_1_3_5 + Board_2_3_5 + Board_3_3_5 + Board_4_3_5 + Board_5_3_5 + Board_6_3_5 + Columns_3_5 = 1
inv : Board_3_0_0 + Board_3_0_1 + Board_3_0_2 + Board_3_0_3 + Board_3_0_4 + Board_3_0_5 + Board_3_0_6 + Cells_3_0 = 1
inv : Rows_5_1 + Board_5_0_1 + Board_5_1_1 + Board_5_2_1 + Board_5_3_1 + Board_5_4_1 + Board_5_5_1 + Board_5_6_1 = 1
inv : Board_0_3_6 + Board_1_3_6 + Board_2_3_6 + Board_3_3_6 + Board_4_3_6 + Board_5_3_6 + Board_6_3_6 + Columns_3_6 = 1
inv : Rows_3_1 + Board_3_0_1 + Board_3_1_1 + Board_3_2_1 + Board_3_3_1 + Board_3_4_1 + Board_3_5_1 + Board_3_6_1 = 1
inv : Board_4_1_0 + Board_4_1_1 + Board_4_1_2 + Board_4_1_3 + Board_4_1_4 + Board_4_1_5 + Board_4_1_6 + Cells_4_1 = 1
inv : Board_0_4_0 + Board_1_4_0 + Board_2_4_0 + Board_3_4_0 + Board_4_4_0 + Board_5_4_0 + Board_6_4_0 + Columns_4_0 = 1
inv : Rows_3_0 + Board_3_0_0 + Board_3_1_0 + Board_3_2_0 + Board_3_3_0 + Board_3_4_0 + Board_3_5_0 + Board_3_6_0 = 1
inv : Board_3_2_0 + Board_3_2_1 + Board_3_2_2 + Board_3_2_3 + Board_3_2_4 + Board_3_2_5 + Board_3_2_6 + Cells_3_2 = 1
inv : Board_6_3_0 + Board_6_3_1 + Board_6_3_2 + Board_6_3_3 + Board_6_3_4 + Board_6_3_5 + Board_6_3_6 + Cells_6_3 = 1
inv : Rows_5_3 + Board_5_0_3 + Board_5_1_3 + Board_5_2_3 + Board_5_3_3 + Board_5_4_3 + Board_5_5_3 + Board_5_6_3 = 1
inv : Board_0_4_0 + Board_0_4_1 + Board_0_4_2 + Board_0_4_3 + Board_0_4_4 + Board_0_4_5 + Board_0_4_6 + Cells_0_4 = 1
inv : Board_0_0_4 + Board_1_0_4 + Board_2_0_4 + Board_3_0_4 + Board_4_0_4 + Board_5_0_4 + Board_6_0_4 + Columns_0_4 = 1
inv : Board_0_5_4 + Board_1_5_4 + Board_2_5_4 + Board_3_5_4 + Board_4_5_4 + Board_5_5_4 + Board_6_5_4 + Columns_5_4 = 1
inv : Board_0_3_1 + Board_1_3_1 + Board_2_3_1 + Board_3_3_1 + Board_4_3_1 + Board_5_3_1 + Board_6_3_1 + Columns_3_1 = 1
inv : Board_2_0_0 + Board_2_0_1 + Board_2_0_2 + Board_2_0_3 + Board_2_0_4 + Board_2_0_5 + Board_2_0_6 + Cells_2_0 = 1
inv : Board_0_0_2 + Board_1_0_2 + Board_2_0_2 + Board_3_0_2 + Board_4_0_2 + Board_5_0_2 + Board_6_0_2 + Columns_0_2 = 1
inv : Board_5_0_0 + Board_5_0_1 + Board_5_0_2 + Board_5_0_3 + Board_5_0_4 + Board_5_0_5 + Board_5_0_6 + Cells_5_0 = 1
inv : Board_6_5_0 + Board_6_5_1 + Board_6_5_2 + Board_6_5_3 + Board_6_5_4 + Board_6_5_5 + Board_6_5_6 + Cells_6_5 = 1
inv : Board_2_6_0 + Board_2_6_1 + Board_2_6_2 + Board_2_6_3 + Board_2_6_4 + Board_2_6_5 + Board_2_6_6 + Cells_2_6 = 1
inv : Rows_1_0 + Board_1_0_0 + Board_1_1_0 + Board_1_2_0 + Board_1_3_0 + Board_1_4_0 + Board_1_5_0 + Board_1_6_0 = 1
inv : Board_0_2_0 + Board_0_2_1 + Board_0_2_2 + Board_0_2_3 + Board_0_2_4 + Board_0_2_5 + Board_0_2_6 + Cells_0_2 = 1
inv : Rows_6_1 + Board_6_0_1 + Board_6_1_1 + Board_6_2_1 + Board_6_3_1 + Board_6_4_1 + Board_6_5_1 + Board_6_6_1 = 1
inv : Board_0_6_0 + Board_1_6_0 + Board_2_6_0 + Board_3_6_0 + Board_4_6_0 + Board_5_6_0 + Board_6_6_0 + Columns_6_0 = 1
inv : Board_0_5_2 + Board_1_5_2 + Board_2_5_2 + Board_3_5_2 + Board_4_5_2 + Board_5_5_2 + Board_6_5_2 + Columns_5_2 = 1
inv : Rows_2_1 + Board_2_0_1 + Board_2_1_1 + Board_2_2_1 + Board_2_3_1 + Board_2_4_1 + Board_2_5_1 + Board_2_6_1 = 1
inv : Board_0_2_6 + Board_1_2_6 + Board_2_2_6 + Board_3_2_6 + Board_4_2_6 + Board_5_2_6 + Board_6_2_6 + Columns_2_6 = 1
inv : Rows_4_2 + Board_4_0_2 + Board_4_1_2 + Board_4_2_2 + Board_4_3_2 + Board_4_4_2 + Board_4_5_2 + Board_4_6_2 = 1
inv : Board_0_3_0 + Board_0_3_1 + Board_0_3_2 + Board_0_3_3 + Board_0_3_4 + Board_0_3_5 + Board_0_3_6 + Cells_0_3 = 1
inv : Board_0_0_0 + Board_1_0_0 + Board_2_0_0 + Board_3_0_0 + Board_4_0_0 + Board_5_0_0 + Board_6_0_0 + Columns_0_0 = 1
inv : Board_3_3_0 + Board_3_3_1 + Board_3_3_2 + Board_3_3_3 + Board_3_3_4 + Board_3_3_5 + Board_3_3_6 + Cells_3_3 = 1
inv : Board_0_6_2 + Board_1_6_2 + Board_2_6_2 + Board_3_6_2 + Board_4_6_2 + Board_5_6_2 + Board_6_6_2 + Columns_6_2 = 1
inv : Board_5_1_0 + Board_5_1_1 + Board_5_1_2 + Board_5_1_3 + Board_5_1_4 + Board_5_1_5 + Board_5_1_6 + Cells_5_1 = 1
inv : Board_0_4_5 + Board_1_4_5 + Board_2_4_5 + Board_3_4_5 + Board_4_4_5 + Board_5_4_5 + Board_6_4_5 + Columns_4_5 = 1
inv : Rows_6_3 + Board_6_0_3 + Board_6_1_3 + Board_6_2_3 + Board_6_3_3 + Board_6_4_3 + Board_6_5_3 + Board_6_6_3 = 1
inv : Board_0_5_0 + Board_1_5_0 + Board_2_5_0 + Board_3_5_0 + Board_4_5_0 + Board_5_5_0 + Board_6_5_0 + Columns_5_0 = 1
inv : Board_0_3_3 + Board_1_3_3 + Board_2_3_3 + Board_3_3_3 + Board_4_3_3 + Board_5_3_3 + Board_6_3_3 + Columns_3_3 = 1
inv : Board_5_6_0 + Board_5_6_1 + Board_5_6_2 + Board_5_6_3 + Board_5_6_4 + Board_5_6_5 + Board_5_6_6 + Cells_5_6 = 1
inv : Rows_4_0 + Board_4_0_0 + Board_4_1_0 + Board_4_2_0 + Board_4_3_0 + Board_4_4_0 + Board_4_5_0 + Board_4_6_0 = 1
inv : Board_0_1_4 + Board_1_1_4 + Board_2_1_4 + Board_3_1_4 + Board_4_1_4 + Board_5_1_4 + Board_6_1_4 + Columns_1_4 = 1
inv : Rows_3_5 + Board_3_0_5 + Board_3_1_5 + Board_3_2_5 + Board_3_3_5 + Board_3_4_5 + Board_3_5_5 + Board_3_6_5 = 1
inv : Board_2_5_0 + Board_2_5_1 + Board_2_5_2 + Board_2_5_3 + Board_2_5_4 + Board_2_5_5 + Board_2_5_6 + Cells_2_5 = 1
inv : Board_1_1_0 + Board_1_1_1 + Board_1_1_2 + Board_1_1_3 + Board_1_1_4 + Board_1_1_5 + Board_1_1_6 + Cells_1_1 = 1
inv : Board_4_2_0 + Board_4_2_1 + Board_4_2_2 + Board_4_2_3 + Board_4_2_4 + Board_4_2_5 + Board_4_2_6 + Cells_4_2 = 1
inv : Rows_1_2 + Board_1_0_2 + Board_1_1_2 + Board_1_2_2 + Board_1_3_2 + Board_1_4_2 + Board_1_5_2 + Board_1_6_2 = 1
Total of 147 invariants.
[2020-05-26 10:06:57] [INFO ] Computed 147 place invariants in 49 ms
[2020-05-26 10:06:57] [INFO ] Flatten gal took : 304 ms
[2020-05-26 10:06:58] [INFO ] Fuse similar labels procedure discarded/fused a total of 0 labels/synchronizations in 7 ms.
[2020-05-26 10:06:58] [INFO ] Time to serialize gal into /home/mcc/execution/LTLFireability.pnml.gal : 8 ms
[2020-05-26 10:06:58] [INFO ] Proved 490 variables to be positive in 1373 ms
[2020-05-26 10:06:58] [INFO ] Computing symmetric may disable matrix : 343 transitions.
[2020-05-26 10:06:58] [INFO ] Computation of disable matrix completed :0/343 took 0 ms. Total solver calls (SAT/UNSAT): 0(0/0)
[2020-05-26 10:06:58] [INFO ] Computation of Complete disable matrix. took 34 ms. Total solver calls (SAT/UNSAT): 0(0/0)
[2020-05-26 10:06:58] [INFO ] Computing symmetric may enable matrix : 343 transitions.
[2020-05-26 10:06:58] [INFO ] Computation of Complete enable matrix. took 13 ms. Total solver calls (SAT/UNSAT): 0(0/0)
[2020-05-26 10:06:58] [INFO ] Time to serialize properties into /home/mcc/execution/LTLFireability.ltl : 215 ms
Invoking ITS tools like this :CommandLine [args=[/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.202005100927/bin/its-ltl-linux64, --gc-threshold, 2000000, -i, /home/mcc/execution/LTLFireability.pnml.gal, -t, CGAL, -LTL, /home/mcc/execution/LTLFireability.ltl, -c, -stutter-deadlock], workingDir=/home/mcc/execution]

its-ltl command run as :

/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.202005100927/bin/its-ltl-linux64 --gc-threshold 2000000 -i /home/mcc/execution/LTLFireability.pnml.gal -t CGAL -LTL /home/mcc/execution/LTLFireability.ltl -c -stutter-deadlock
Read 11 LTL properties
Checking formula 0 : !((!(("(((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((i5.u3.Rows_0_4>=1)&&(i4.i0.i0.u80.Cells_0_0>=1))&&(i5.u46.Columns_0_4>=1))||(((i2.u26.Rows_4_2>=1)&&(i2.u72.Cells_4_1>=1))&&(i9.u121.Columns_1_2>=1)))||(((i1.u20.Rows_3_2>=1)&&(i1.u103.Cells_3_6>=1))&&(i6.u143.Columns_6_2>=1)))||(((i6.u40.Rows_6_3>=1)&&(i6.u116.Cells_6_6>=1))&&(i6.u144.Columns_6_3>=1)))||(((i5.u34.Rows_5_4>=1)&&(i0.u109.Cells_5_4>=1))&&(i5.u57.Columns_4_4>=1)))||(((i10.u32.Rows_5_1>=1)&&(i12.u77.Cells_5_3>=1))&&(i12.u130.Columns_3_1>=1)))||(((i3.u63.Rows_1_1>=1)&&(i3.u86.Cells_1_1>=1))&&(i9.u120.Columns_1_1>=1)))||(((i3.u7.Rows_1_3>=1)&&(i3.u87.Cells_1_2>=1))&&(i3.u126.Columns_2_3>=1)))||(((i4.i1.i1.u38.Rows_6_1>=1)&&(i11.u115.Cells_6_5>=1))&&(i11.u139.Columns_5_1>=1)))||(((i7.u11.Rows_2_0>=1)&&(i7.u94.Cells_2_3>=1))&&(i12.u129.Columns_3_0>=1)))||(((i8.u43.Rows_6_6>=1)&&(i6.u112.Cells_6_0>=1))&&(i8.u47.Columns_0_6>=1)))||(((i5.u28.Rows_4_4>=1)&&(i2.u73.Cells_4_2>=1))&&(i5.u127.Columns_2_4>=1)))||(((i0.u22.Rows_3_5>=1)&&(i1.u97.Cells_3_0>=1))&&(i3.u119.Columns_0_5>=1)))||(((i2.u24.Rows_4_0>=1)&&(i2.u71.Cells_4_0>=1))&&(i7.u117.Columns_0_0>=1)))||(((i1.u18.Rows_3_0>=1)&&(i11.u102.Cells_3_5>=1))&&(i11.u138.Columns_5_0>=1)))||(((i7.u13.Rows_2_2>=1)&&(i0.u95.Cells_2_4>=1))&&(i0.u135.Columns_4_2>=1)))||(((i2.u29.Rows_4_5>=1)&&(i2.u73.Cells_4_2>=1))&&(i3.u128.Columns_2_5>=1)))||(((i8.u23.Rows_3_6>=1)&&(i1.u97.Cells_3_0>=1))&&(i8.u47.Columns_0_6>=1)))||(((i7.u16.Rows_2_5>=1)&&(i11.u67.Cells_2_5>=1))&&(i11.u142.Columns_5_5>=1)))||(((i3.u10.Rows_1_6>=1)&&(i12.u88.Cells_1_3>=1))&&(i12.u134.Columns_3_6>=1)))||(((i2.u25.Rows_4_1>=1)&&(i2.u72.Cells_4_1>=1))&&(i9.u120.Columns_1_1>=1)))||(((i4.i0.i0.u1.Rows_0_1>=1)&&(i5.u84.Cells_0_6>=1))&&(i10.u61.Columns_6_1>=1)))||(((i5.u15.Rows_2_4>=1)&&(i11.u67.Cells_2_5>=1))&&(i5.u141.Columns_5_4>=1)))||(((i6.u39.Rows_6_2>=1)&&(i6.u116.Cells_6_6>=1))&&(i6.u143.Columns_6_2>=1)))||(((i10.u35.Rows_5_5>=1)&&(i0.u109.Cells_5_4>=1))&&(i0.u136.Columns_4_5>=1)))||(((i1.u21.Rows_3_3>=1)&&(i1.u103.Cells_3_6>=1))&&(i6.u144.Columns_6_3>=1)))||(((i4.i0.i0.u2.Rows_0_3>=1)&&(i4.i0.i0.u80.Cells_0_0>=1))&&(i2.u45.Columns_0_3>=1)))||(((i0.u44.Rows_0_2>=1)&&(i5.u84.Cells_0_6>=1))&&(i6.u143.Columns_6_2>=1)))||(((i2.u30.Rows_4_6>=1)&&(i12.u74.Cells_4_3>=1))&&(i12.u134.Columns_3_6>=1)))||(((i4.i1.i0.u12.Rows_2_1>=1)&&(i7.u94.Cells_2_3>=1))&&(i12.u130.Columns_3_1>=1)))||(((i9.u19.Rows_3_1>=1)&&(i1.u103.Cells_3_6>=1))&&(i10.u61.Columns_6_1>=1)))||(((i2.u25.Rows_4_1>=1)&&(i2.u71.Cells_4_0>=1))&&(i4.i1.i0.u68.Columns_0_1>=1)))||(((i12.u76.Rows_5_2>=1)&&(i12.u77.Cells_5_3>=1))&&(i12.u131.Columns_3_2>=1)))||(((i4.i0.i1.u4.Rows_0_5>=1)&&(i9.u81.Cells_0_1>=1))&&(i9.u70.Columns_1_5>=1)))||(((i8.u50.Rows_0_6>=1)&&(i9.u81.Cells_0_1>=1))&&(i9.u123.Columns_1_6>=1)))||(((i5.u8.Rows_1_4>=1)&&(i3.u87.Cells_1_2>=1))&&(i5.u127.Columns_2_4>=1)))||(((i2.u27.Rows_4_3>=1)&&(i2.u73.Cells_4_2>=1))&&(i3.u126.Columns_2_3>=1)))||(((i0.u44.Rows_0_2>=1)&&(i4.i0.i0.u80.Cells_0_0>=1))&&(i1.u118.Columns_0_2>=1)))||(((i2.u24.Rows_4_0>=1)&&(i2.u72.Cells_4_1>=1))&&(i9.u48.Columns_1_0>=1)))||(((i3.u5.Rows_1_0>=1)&&(i3.u86.Cells_1_1>=1))&&(i9.u48.Columns_1_0>=1)))||(((i7.u13.Rows_2_2>=1)&&(i7.u94.Cells_2_3>=1))&&(i12.u131.Columns_3_2>=1)))||(((i3.u63.Rows_1_1>=1)&&(i3.u87.Cells_1_2>=1))&&(i4.i1.i1.u125.Columns_2_1>=1)))||(((i5.u41.Rows_6_4>=1)&&(i6.u112.Cells_6_0>=1))&&(i5.u46.Columns_0_4>=1)))||(((i10.u32.Rows_5_1>=1)&&(i10.u108.Cells_5_2>=1))&&(i4.i1.i1.u125.Columns_2_1>=1)))||(((i7.u11.Rows_2_0>=1)&&(i7.u66.Cells_2_2>=1))&&(i7.u124.Columns_2_0>=1)))||(((i8.u36.Rows_5_6>=1)&&(i0.u109.Cells_5_4>=1))&&(i0.u137.Columns_4_6>=1)))||(((i3.u10.Rows_1_6>=1)&&(i0.u89.Cells_1_4>=1))&&(i0.u137.Columns_4_6>=1)))||(((i5.u3.Rows_0_4>=1)&&(i9.u81.Cells_0_1>=1))&&(i5.u49.Columns_1_4>=1)))||(((i5.u69.Rows_3_4>=1)&&(i1.u103.Cells_3_6>=1))&&(i5.u145.Columns_6_4>=1)))||(((i2.u26.Rows_4_2>=1)&&(i2.u71.Cells_4_0>=1))&&(i1.u118.Columns_0_2>=1)))||(((i4.i0.i0.u2.Rows_0_3>=1)&&(i5.u84.Cells_0_6>=1))&&(i6.u144.Columns_6_3>=1)))||(((i5.u34.Rows_5_4>=1)&&(i11.u110.Cells_5_5>=1))&&(i5.u141.Columns_5_4>=1)))||(((i8.u43.Rows_6_6>=1)&&(i6.u116.Cells_6_6>=1))&&(i8.u146.Columns_6_6>=1)))||(((i7.u17.Rows_2_6>=1)&&(i7.u96.Cells_2_6>=1))&&(i8.u146.Columns_6_6>=1)))||(((i8.u36.Rows_5_6>=1)&&(i6.u111.Cells_5_6>=1))&&(i8.u146.Columns_6_6>=1)))||(((i11.u42.Rows_6_5>=1)&&(i6.u116.Cells_6_6>=1))&&(i6.u62.Columns_6_5>=1)))||(((i5.u28.Rows_4_4>=1)&&(i2.u72.Cells_4_1>=1))&&(i5.u49.Columns_1_4>=1)))||(((i5.u8.Rows_1_4>=1)&&(i3.u86.Cells_1_1>=1))&&(i5.u49.Columns_1_4>=1)))||(((i12.u76.Rows_5_2>=1)&&(i10.u108.Cells_5_2>=1))&&(i7.u52.Columns_2_2>=1)))||(((i11.u42.Rows_6_5>=1)&&(i6.u112.Cells_6_0>=1))&&(i3.u119.Columns_0_5>=1))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Formula 0 simplified : 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built 95 ordering constraints for composite.
built 44 ordering constraints for composite.
built 25 ordering constraints for composite.
built 46 ordering constraints for composite.
built 43 ordering constraints for composite.
built 29 ordering constraints for composite.
built 16 ordering constraints for composite.
built 8 ordering constraints for composite.
built 8 ordering constraints for composite.
built 14 ordering constraints for composite.
built 7 ordering constraints for composite.
built 7 ordering constraints for composite.
built 48 ordering constraints for composite.
built 31 ordering constraints for composite.
built 43 ordering constraints for composite.
built 25 ordering constraints for composite.
built 42 ordering constraints for composite.
built 23 ordering constraints for composite.
built 45 ordering constraints for composite.
built 45 ordering constraints for composite.
[2020-05-26 10:08:22] [INFO ] Computing symmetric co enabling matrix : 343 transitions.
[2020-05-26 10:08:22] [INFO ] Computation of co-enabling matrix(0/343) took 21 ms. Total solver calls (SAT/UNSAT): 18(18/0)
[2020-05-26 10:08:25] [INFO ] Computation of co-enabling matrix(55/343) took 3078 ms. Total solver calls (SAT/UNSAT): 686(686/0)
[2020-05-26 10:08:28] [INFO ] Computation of co-enabling matrix(121/343) took 6145 ms. Total solver calls (SAT/UNSAT): 1415(1415/0)
[2020-05-26 10:08:31] [INFO ] Computation of co-enabling matrix(165/343) took 9178 ms. Total solver calls (SAT/UNSAT): 1833(1833/0)
[2020-05-26 10:08:34] [INFO ] Computation of co-enabling matrix(188/343) took 12194 ms. Total solver calls (SAT/UNSAT): 2016(2016/0)
[2020-05-26 10:08:37] [INFO ] Computation of co-enabling matrix(214/343) took 15298 ms. Total solver calls (SAT/UNSAT): 2255(2255/0)
[2020-05-26 10:08:40] [INFO ] Computation of co-enabling matrix(243/343) took 18334 ms. Total solver calls (SAT/UNSAT): 2448(2448/0)
[2020-05-26 10:08:43] [INFO ] Computation of co-enabling matrix(291/343) took 21346 ms. Total solver calls (SAT/UNSAT): 2790(2790/0)
[2020-05-26 10:08:45] [INFO ] Computation of Finished co-enabling matrix. took 22914 ms. Total solver calls (SAT/UNSAT): 3087(3087/0)
[2020-05-26 10:08:45] [INFO ] Computing Do-Not-Accords matrix : 343 transitions.
[2020-05-26 10:08:45] [INFO ] Computation of Completed DNA matrix. took 30 ms. Total solver calls (SAT/UNSAT): 0(0/0)
[2020-05-26 10:08:45] [INFO ] Built C files in 109166ms conformant to PINS in folder :/home/mcc/execution
Running compilation step : CommandLine [args=[gcc, -c, -I/home/mcc/BenchKit//lts_install_dir//include, -I., -std=c99, -fPIC, -O2, model.c], workingDir=/home/mcc/execution]
Compilation finished in 4622 ms.
Running link step : CommandLine [args=[gcc, -shared, -o, gal.so, model.o], workingDir=/home/mcc/execution]
Link finished in 73 ms.
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, --when, --ltl, !( ((LTLAP0==true))U([]((X([](X(<>(!( []((LTLAP0==true))) )))))U((LTLAP0==true))))) , --buchi-type=spotba], workingDir=/home/mcc/execution]
/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc: error while loading shared libraries: libltdl.so.7: cannot open shared object file: No such file or directory
WARNING : LTS min runner thread failed on error :java.lang.RuntimeException: Unexpected exception when executing ltsmin :CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, --when, --ltl, !( ((LTLAP0==true))U([]((X([](X(<>(!( []((LTLAP0==true))) )))))U((LTLAP0==true))))) , --buchi-type=spotba], workingDir=/home/mcc/execution]
127
java.lang.RuntimeException: Unexpected exception when executing ltsmin :CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, --when, --ltl, !( ((LTLAP0==true))U([]((X([](X(<>(!( []((LTLAP0==true))) )))))U((LTLAP0==true))))) , --buchi-type=spotba], workingDir=/home/mcc/execution]
127
at fr.lip6.move.gal.application.LTSminRunner.checkProperty(LTSminRunner.java:170)
at fr.lip6.move.gal.application.LTSminRunner.access$10(LTSminRunner.java:124)
at fr.lip6.move.gal.application.LTSminRunner$1.run(LTSminRunner.java:93)
at java.base/java.lang.Thread.run(Thread.java:834)
Detected timeout of ITS tools.
[2020-05-26 10:26:59] [INFO ] Flatten gal took : 71 ms
[2020-05-26 10:26:59] [INFO ] Time to serialize gal into /home/mcc/execution/LTLFireability.pnml.gal : 3 ms
[2020-05-26 10:26:59] [INFO ] Time to serialize properties into /home/mcc/execution/LTLFireability.ltl : 142 ms
Invoking ITS tools like this :CommandLine [args=[/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.202005100927/bin/its-ltl-linux64, --gc-threshold, 2000000, -i, /home/mcc/execution/LTLFireability.pnml.gal, -t, CGAL, -LTL, /home/mcc/execution/LTLFireability.ltl, -c, -stutter-deadlock, --gen-order, FOLLOW], workingDir=/home/mcc/execution]

its-ltl command run as :

/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.202005100927/bin/its-ltl-linux64 --gc-threshold 2000000 -i /home/mcc/execution/LTLFireability.pnml.gal -t CGAL -LTL /home/mcc/execution/LTLFireability.ltl -c -stutter-deadlock --gen-order FOLLOW
Read 11 LTL properties
Checking formula 0 : !((!(("(((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((Rows_0_4>=1)&&(Cells_0_0>=1))&&(Columns_0_4>=1))||(((Rows_4_2>=1)&&(Cells_4_1>=1))&&(Columns_1_2>=1)))||(((Rows_3_2>=1)&&(Cells_3_6>=1))&&(Columns_6_2>=1)))||(((Rows_6_3>=1)&&(Cells_6_6>=1))&&(Columns_6_3>=1)))||(((Rows_5_4>=1)&&(Cells_5_4>=1))&&(Columns_4_4>=1)))||(((Rows_5_1>=1)&&(Cells_5_3>=1))&&(Columns_3_1>=1)))||(((Rows_1_1>=1)&&(Cells_1_1>=1))&&(Columns_1_1>=1)))||(((Rows_1_3>=1)&&(Cells_1_2>=1))&&(Columns_2_3>=1)))||(((Rows_6_1>=1)&&(Cells_6_5>=1))&&(Columns_5_1>=1)))||(((Rows_2_0>=1)&&(Cells_2_3>=1))&&(Columns_3_0>=1)))||(((Rows_6_6>=1)&&(Cells_6_0>=1))&&(Columns_0_6>=1)))||(((Rows_4_4>=1)&&(Cells_4_2>=1))&&(Columns_2_4>=1)))||(((Rows_3_5>=1)&&(Cells_3_0>=1))&&(Columns_0_5>=1)))||(((Rows_4_0>=1)&&(Cells_4_0>=1))&&(Columns_0_0>=1)))||(((Rows_3_0>=1)&&(Cells_3_5>=1))&&(Columns_5_0>=1)))||(((Rows_2_2>=1)&&(Cells_2_4>=1))&&(Columns_4_2>=1)))||(((Rows_4_5>=1)&&(Cells_4_2>=1))&&(Columns_2_5>=1)))||(((Rows_3_6>=1)&&(Cells_3_0>=1))&&(Columns_0_6>=1)))||(((Rows_2_5>=1)&&(Cells_2_5>=1))&&(Columns_5_5>=1)))||(((Rows_1_6>=1)&&(Cells_1_3>=1))&&(Columns_3_6>=1)))||(((Rows_4_1>=1)&&(Cells_4_1>=1))&&(Columns_1_1>=1)))||(((Rows_0_1>=1)&&(Cells_0_6>=1))&&(Columns_6_1>=1)))||(((Rows_2_4>=1)&&(Cells_2_5>=1))&&(Columns_5_4>=1)))||(((Rows_6_2>=1)&&(Cells_6_6>=1))&&(Columns_6_2>=1)))||(((Rows_5_5>=1)&&(Cells_5_4>=1))&&(Columns_4_5>=1)))||(((Rows_3_3>=1)&&(Cells_3_6>=1))&&(Columns_6_3>=1)))||(((Rows_0_3>=1)&&(Cells_0_0>=1))&&(Columns_0_3>=1)))||(((Rows_0_2>=1)&&(Cells_0_6>=1))&&(Columns_6_2>=1)))||(((Rows_4_6>=1)&&(Cells_4_3>=1))&&(Columns_3_6>=1)))||(((Rows_2_1>=1)&&(Cells_2_3>=1))&&(Columns_3_1>=1)))||(((Rows_3_1>=1)&&(Cells_3_6>=1))&&(Columns_6_1>=1)))||(((Rows_4_1>=1)&&(Cells_4_0>=1))&&(Columns_0_1>=1)))||(((Rows_5_2>=1)&&(Cells_5_3>=1))&&(Columns_3_2>=1)))||(((Rows_0_5>=1)&&(Cells_0_1>=1))&&(Columns_1_5>=1)))||(((Rows_0_6>=1)&&(Cells_0_1>=1))&&(Columns_1_6>=1)))||(((Rows_1_4>=1)&&(Cells_1_2>=1))&&(Columns_2_4>=1)))||(((Rows_4_3>=1)&&(Cells_4_2>=1))&&(Columns_2_3>=1)))||(((Rows_0_2>=1)&&(Cells_0_0>=1))&&(Columns_0_2>=1)))||(((Rows_4_0>=1)&&(Cells_4_1>=1))&&(Columns_1_0>=1)))||(((Rows_1_0>=1)&&(Cells_1_1>=1))&&(Columns_1_0>=1)))||(((Rows_2_2>=1)&&(Cells_2_3>=1))&&(Columns_3_2>=1)))||(((Rows_1_1>=1)&&(Cells_1_2>=1))&&(Columns_2_1>=1)))||(((Rows_6_4>=1)&&(Cells_6_0>=1))&&(Columns_0_4>=1)))||(((Rows_5_1>=1)&&(Cells_5_2>=1))&&(Columns_2_1>=1)))||(((Rows_2_0>=1)&&(Cells_2_2>=1))&&(Columns_2_0>=1)))||(((Rows_5_6>=1)&&(Cells_5_4>=1))&&(Columns_4_6>=1)))||(((Rows_1_6>=1)&&(Cells_1_4>=1))&&(Columns_4_6>=1)))||(((Rows_0_4>=1)&&(Cells_0_1>=1))&&(Columns_1_4>=1)))||(((Rows_3_4>=1)&&(Cells_3_6>=1))&&(Columns_6_4>=1)))||(((Rows_4_2>=1)&&(Cells_4_0>=1))&&(Columns_0_2>=1)))||(((Rows_0_3>=1)&&(Cells_0_6>=1))&&(Columns_6_3>=1)))||(((Rows_5_4>=1)&&(Cells_5_5>=1))&&(Columns_5_4>=1)))||(((Rows_6_6>=1)&&(Cells_6_6>=1))&&(Columns_6_6>=1)))||(((Rows_2_6>=1)&&(Cells_2_6>=1))&&(Columns_6_6>=1)))||(((Rows_5_6>=1)&&(Cells_5_6>=1))&&(Columns_6_6>=1)))||(((Rows_6_5>=1)&&(Cells_6_6>=1))&&(Columns_6_5>=1)))||(((Rows_4_4>=1)&&(Cells_4_1>=1))&&(Columns_1_4>=1)))||(((Rows_1_4>=1)&&(Cells_1_1>=1))&&(Columns_1_4>=1)))||(((Rows_5_2>=1)&&(Cells_5_2>=1))&&(Columns_2_2>=1)))||(((Rows_6_5>=1)&&(Cells_6_0>=1))&&(Columns_0_5>=1)))||(((Rows_0_6>=1)&&(Cells_0_0>=1))&&(Columns_0_6>=1)))||(((Rows_5_0>=1)&&(Cells_5_3>=1))&&(Columns_3_0>=1)))||(((Rows_4_2>=1)&&(Cells_4_2>=1))&&(Columns_2_2>=1)))||(((Rows_3_3>=1)&&(Cells_3_0>=1))&&(Columns_0_3>=1)))||(((Rows_1_2>=1)&&(Cells_1_1>=1))&&(Columns_1_2>=1)))||(((Rows_6_3>=1)&&(Cells_6_0>=1))&&(Columns_0_3>=1)))||(((Rows_5_0>=1)&&(Cells_5_2>=1))&&(Columns_2_0>=1)))||(((Rows_4_3>=1)&&(Cells_4_0>=1))&&(Columns_0_3>=1)))||(((Rows_1_0>=1)&&(Cells_1_2>=1))&&(Columns_2_0>=1)))||(((Rows_0_4>=1)&&(Cells_0_6>=1))&&(Columns_6_4>=1)))||(((Rows_4_1>=1)&&(Cells_4_2>=1))&&(Columns_2_1>=1)))||(((Rows_3_4>=1)&&(Cells_3_0>=1))&&(Columns_0_4>=1)))||(((Rows_5_5>=1)&&(Cells_5_5>=1))&&(Columns_5_5>=1)))||(((Rows_2_6>=1)&&(Cells_2_5>=1))&&(Columns_5_6>=1)))||(((Rows_1_2>=1)&&(Cells_1_2>=1))&&(Columns_2_2>=1)))||(((Rows_4_3>=1)&&(Cells_4_1>=1))&&(Columns_1_3>=1)))||(((Rows_5_5>=1)&&(Cells_5_6>=1))&&(Columns_6_5>=1)))||(((Rows_2_4>=1)&&(Cells_2_6>=1))&&(Columns_6_4>=1)))||(((Rows_3_5>=1)&&(Cells_3_6>=1))&&(Columns_6_5>=1)))||(((Rows_2_5>=1)&&(Cells_2_6>=1))&&(Columns_6_5>=1)))||(((Rows_6_4>=1)&&(Cells_6_6>=1))&&(Columns_6_4>=1)))||(((Rows_0_5>=1)&&(Cells_0_0>=1))&&(Columns_0_5>=1)))||(((Rows_1_3>=1)&&(Cells_1_1>=1))&&(Columns_1_3>=1)))||(((Rows_0_3>=1)&&(Cells_0_1>=1))&&(Columns_1_3>=1)))||(((Rows_0_5>=1)&&(Cells_0_6>=1))&&(Columns_6_5>=1)))||(((Rows_2_1>=1)&&(Cells_2_2>=1))&&(Columns_2_1>=1)))||(((Rows_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Formula 0 simplified : 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Detected timeout of ITS tools.
[2020-05-26 10:47:02] [INFO ] Flatten gal took : 826 ms
[2020-05-26 10:47:07] [INFO ] Input system was already deterministic with 343 transitions.
[2020-05-26 10:47:08] [INFO ] Transformed 490 places.
[2020-05-26 10:47:08] [INFO ] Transformed 343 transitions.
Running greatSPN : CommandLine [args=[/home/mcc/BenchKit//greatspn//bin/pinvar, /home/mcc/execution/gspn], workingDir=/home/mcc/execution]
Run of greatSPN captured in /home/mcc/execution/outPut.txt
Running greatSPN : CommandLine [args=[/home/mcc/BenchKit//greatspn//bin/RGMEDD2, /home/mcc/execution/gspn, -META, -varord-only], workingDir=/home/mcc/execution]
Run of greatSPN captured in /home/mcc/execution/outPut.txt
Using order generated by GreatSPN with heuristic : META
[2020-05-26 10:47:08] [INFO ] Time to serialize gal into /home/mcc/execution/LTLFireability.pnml.gal : 62 ms
[2020-05-26 10:47:10] [INFO ] Time to serialize properties into /home/mcc/execution/LTLFireability.ltl : 2349 ms
Invoking ITS tools like this :CommandLine [args=[/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.202005100927/bin/its-ltl-linux64, --gc-threshold, 2000000, -i, /home/mcc/execution/LTLFireability.pnml.gal, -t, CGAL, -LTL, /home/mcc/execution/LTLFireability.ltl, -c, -stutter-deadlock, --load-order, /home/mcc/execution/model.ord, --gen-order, FOLLOW], workingDir=/home/mcc/execution]

its-ltl command run as :

/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.202005100927/bin/its-ltl-linux64 --gc-threshold 2000000 -i /home/mcc/execution/LTLFireability.pnml.gal -t CGAL -LTL /home/mcc/execution/LTLFireability.ltl -c -stutter-deadlock --load-order /home/mcc/execution/model.ord --gen-order FOLLOW
Read 11 LTL properties
Successfully loaded order from file /home/mcc/execution/model.ord
Checking formula 0 : !((!(("(((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((Rows_0_4>=1)&&(Cells_0_0>=1))&&(Columns_0_4>=1))||(((Rows_4_2>=1)&&(Cells_4_1>=1))&&(Columns_1_2>=1)))||(((Rows_3_2>=1)&&(Cells_3_6>=1))&&(Columns_6_2>=1)))||(((Rows_6_3>=1)&&(Cells_6_6>=1))&&(Columns_6_3>=1)))||(((Rows_5_4>=1)&&(Cells_5_4>=1))&&(Columns_4_4>=1)))||(((Rows_5_1>=1)&&(Cells_5_3>=1))&&(Columns_3_1>=1)))||(((Rows_1_1>=1)&&(Cells_1_1>=1))&&(Columns_1_1>=1)))||(((Rows_1_3>=1)&&(Cells_1_2>=1))&&(Columns_2_3>=1)))||(((Rows_6_1>=1)&&(Cells_6_5>=1))&&(Columns_5_1>=1)))||(((Rows_2_0>=1)&&(Cells_2_3>=1))&&(Columns_3_0>=1)))||(((Rows_6_6>=1)&&(Cells_6_0>=1))&&(Columns_0_6>=1)))||(((Rows_4_4>=1)&&(Cells_4_2>=1))&&(Columns_2_4>=1)))||(((Rows_3_5>=1)&&(Cells_3_0>=1))&&(Columns_0_5>=1)))||(((Rows_4_0>=1)&&(Cells_4_0>=1))&&(Columns_0_0>=1)))||(((Rows_3_0>=1)&&(Cells_3_5>=1))&&(Columns_5_0>=1)))||(((Rows_2_2>=1)&&(Cells_2_4>=1))&&(Columns_4_2>=1)))||(((Rows_4_5>=1)&&(Cells_4_2>=1))&&(Columns_2_5>=1)))||(((Rows_3_6>=1)&&(Cells_3_0>=1))&&(Columns_0_6>=1)))||(((Rows_2_5>=1)&&(Cells_2_5>=1))&&(Columns_5_5>=1)))||(((Rows_1_6>=1)&&(Cells_1_3>=1))&&(Columns_3_6>=1)))||(((Rows_4_1>=1)&&(Cells_4_1>=1))&&(Columns_1_1>=1)))||(((Rows_0_1>=1)&&(Cells_0_6>=1))&&(Columns_6_1>=1)))||(((Rows_2_4>=1)&&(Cells_2_5>=1))&&(Columns_5_4>=1)))||(((Rows_6_2>=1)&&(Cells_6_6>=1))&&(Columns_6_2>=1)))||(((Rows_5_5>=1)&&(Cells_5_4>=1))&&(Columns_4_5>=1)))||(((Rows_3_3>=1)&&(Cells_3_6>=1))&&(Columns_6_3>=1)))||(((Rows_0_3>=1)&&(Cells_0_0>=1))&&(Columns_0_3>=1)))||(((Rows_0_2>=1)&&(Cells_0_6>=1))&&(Columns_6_2>=1)))||(((Rows_4_6>=1)&&(Cells_4_3>=1))&&(Columns_3_6>=1)))||(((Rows_2_1>=1)&&(Cells_2_3>=1))&&(Columns_3_1>=1)))||(((Rows_3_1>=1)&&(Cells_3_6>=1))&&(Columns_6_1>=1)))||(((Rows_4_1>=1)&&(Cells_4_0>=1))&&(Columns_0_1>=1)))||(((Rows_5_2>=1)&&(Cells_5_3>=1))&&(Columns_3_2>=1)))||(((Rows_0_5>=1)&&(Cells_0_1>=1))&&(Columns_1_5>=1)))||(((Rows_0_6>=1)&&(Cells_0_1>=1))&&(Columns_1_6>=1)))||(((Rows_1_4>=1)&&(Cells_1_2>=1))&&(Columns_2_4>=1)))||(((Rows_4_3>=1)&&(Cells_4_2>=1))&&(Columns_2_3>=1)))||(((Rows_0_2>=1)&&(Cells_0_0>=1))&&(Columns_0_2>=1)))||(((Rows_4_0>=1)&&(Cells_4_1>=1))&&(Columns_1_0>=1)))||(((Rows_1_0>=1)&&(Cells_1_1>=1))&&(Columns_1_0>=1)))||(((Rows_2_2>=1)&&(Cells_2_3>=1))&&(Columns_3_2>=1)))||(((Rows_1_1>=1)&&(Cells_1_2>=1))&&(Columns_2_1>=1)))||(((Rows_6_4>=1)&&(Cells_6_0>=1))&&(Columns_0_4>=1)))||(((Rows_5_1>=1)&&(Cells_5_2>=1))&&(Columns_2_1>=1)))||(((Rows_2_0>=1)&&(Cells_2_2>=1))&&(Columns_2_0>=1)))||(((Rows_5_6>=1)&&(Cells_5_4>=1))&&(Columns_4_6>=1)))||(((Rows_1_6>=1)&&(Cells_1_4>=1))&&(Columns_4_6>=1)))||(((Rows_0_4>=1)&&(Cells_0_1>=1))&&(Columns_1_4>=1)))||(((Rows_3_4>=1)&&(Cells_3_6>=1))&&(Columns_6_4>=1)))||(((Rows_4_2>=1)&&(Cells_4_0>=1))&&(Columns_0_2>=1)))||(((Rows_0_3>=1)&&(Cells_0_6>=1))&&(Columns_6_3>=1)))||(((Rows_5_4>=1)&&(Cells_5_5>=1))&&(Columns_5_4>=1)))||(((Rows_6_6>=1)&&(Cells_6_6>=1))&&(Columns_6_6>=1)))||(((Rows_2_6>=1)&&(Cells_2_6>=1))&&(Columns_6_6>=1)))||(((Rows_5_6>=1)&&(Cells_5_6>=1))&&(Columns_6_6>=1)))||(((Rows_6_5>=1)&&(Cells_6_6>=1))&&(Columns_6_5>=1)))||(((Rows_4_4>=1)&&(Cells_4_1>=1))&&(Columns_1_4>=1)))||(((Rows_1_4>=1)&&(Cells_1_1>=1))&&(Columns_1_4>=1)))||(((Rows_5_2>=1)&&(Cells_5_2>=1))&&(Columns_2_2>=1)))||(((Rows_6_5>=1)&&(Cells_6_0>=1))&&(Columns_0_5>=1)))||(((Rows_0_6>=1)&&(Cells_0_0>=1))&&(Columns_0_6>=1)))||(((Rows_5_0>=1)&&(Cells_5_3>=1))&&(Columns_3_0>=1)))||(((Rows_4_2>=1)&&(Cells_4_2>=1))&&(Columns_2_2>=1)))||(((Rows_3_3>=1)&&(Cells_3_0>=1))&&(Columns_0_3>=1)))||(((Rows_1_2>=1)&&(Cells_1_1>=1))&&(Columns_1_2>=1)))||(((Rows_6_3>=1)&&(Cells_6_0>=1))&&(Columns_0_3>=1)))||(((Rows_5_0>=1)&&(Cells_5_2>=1))&&(Columns_2_0>=1)))||(((Rows_4_3>=1)&&(Cells_4_0>=1))&&(Columns_0_3>=1)))||(((Rows_1_0>=1)&&(Cells_1_2>=1))&&(Columns_2_0>=1)))||(((Rows_0_4>=1)&&(Cells_0_6>=1))&&(Columns_6_4>=1)))||(((Rows_4_1>=1)&&(Cells_4_2>=1))&&(Columns_2_1>=1)))||(((Rows_3_4>=1)&&(Cells_3_0>=1))&&(Columns_0_4>=1)))||(((Rows_5_5>=1)&&(Cells_5_5>=1))&&(Columns_5_5>=1)))||(((Rows_2_6>=1)&&(Cells_2_5>=1))&&(Columns_5_6>=1)))||(((Rows_1_2>=1)&&(Cells_1_2>=1))&&(Columns_2_2>=1)))||(((Rows_4_3>=1)&&(Cells_4_1>=1))&&(Columns_1_3>=1)))||(((Rows_5_5>=1)&&(Cells_5_6>=1))&&(Columns_6_5>=1)))||(((Rows_2_4>=1)&&(Cells_2_6>=1))&&(Columns_6_4>=1)))||(((Rows_3_5>=1)&&(Cells_3_6>=1))&&(Columns_6_5>=1)))||(((Rows_2_5>=1)&&(Cells_2_6>=1))&&(Columns_6_5>=1)))||(((Rows_6_4>=1)&&(Cells_6_6>=1))&&(Columns_6_4>=1)))||(((Rows_0_5>=1)&&(Cells_0_0>=1))&&(Columns_0_5>=1)))||(((Rows_1_3>=1)&&(Cells_1_1>=1))&&(Columns_1_3>=1)))||(((Rows_0_3>=1)&&(Cells_0_1>=1))&&(Columns_1_3>=1)))||(((Rows_0_5>=1)&&(Cells_0_6>=1))&&(Columns_6_5>=1)))||(((Rows_2_1>=1)&&(Cells_2_2>=1))&&(Columns_2_1>=1)))||(((Rows_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Formula 0 simplified : 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BK_TIME_CONFINEMENT_REACHED

--------------------
content from stderr:

+ export BINDIR=/home/mcc/BenchKit/
+ BINDIR=/home/mcc/BenchKit/
++ pwd
+ export MODEL=/home/mcc/execution
+ MODEL=/home/mcc/execution
+ [[ LTLFireability = StateSpace ]]
+ /home/mcc/BenchKit//runeclipse.sh /home/mcc/execution LTLFireability -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -greatspnpath /home/mcc/BenchKit//greatspn/ -order META -manyOrder -smt -timeout 3600
+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ /home/mcc/BenchKit//itstools/its-tools -data /home/mcc/execution/workspace -pnfolder /home/mcc/execution -examination LTLFireability -z3path /home/mcc/BenchKit//z3/bin/z3 -yices2path /home/mcc/BenchKit//yices/bin/yices -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -greatspnpath /home/mcc/BenchKit//greatspn/ -order META -manyOrder -smt -timeout 3600 -vmargs -Dosgi.locking=none -Declipse.stateSaveDelayInterval=-1 -Dosgi.configuration.area=/tmp/.eclipse -Xss128m -Xms40m -Xmx16000m -Dfile.encoding=UTF-8 -Dosgi.requiredJavaVersion=1.6

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="Sudoku-PT-AN07"
export BK_EXAMINATION="LTLFireability"
export BK_TOOL="itstools"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-4028"
echo " Executing tool itstools"
echo " Input is Sudoku-PT-AN07, examination is LTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r227-oct2-159033546600362"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/Sudoku-PT-AN07.tgz
mv Sudoku-PT-AN07 execution
cd execution
if [ "LTLFireability" = "ReachabilityDeadlock" ] || [ "LTLFireability" = "UpperBounds" ] || [ "LTLFireability" = "QuasiLiveness" ] || [ "LTLFireability" = "StableMarking" ] || [ "LTLFireability" = "Liveness" ] || [ "LTLFireability" = "OneSafe" ] || [ "LTLFireability" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "LTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "LTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "LTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property LTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "LTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' LTLFireability.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ "LTLFireability" = "ReachabilityDeadlock" ] || [ "LTLFireability" = "QuasiLiveness" ] || [ "LTLFireability" = "StableMarking" ] || [ "LTLFireability" = "Liveness" ] || [ "LTLFireability" = "OneSafe" ] ; then
echo "FORMULA_NAME LTLFireability"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;