fond
Model Checking Contest 2020
10th edition, Paris, France, June 23, 2020
Execution of r210-tajo-159033476400890
Last Updated
Jun 28, 2020

About the Execution of ITS-Tools for ShieldRVs-PT-050A

Execution Summary
Max Memory
Used (MB)
Time wait (ms) CPU Usage (ms) I/O Wait (ms) Computed Result Execution
Status
15766.230 3600000.00 3560277.00 160311.40 ??????F??FTT??T? normal

Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/mnt/tpsp/fkordon/mcc2020-input.r210-tajo-159033476400890.qcow2', fmt=qcow2 size=4294967296 backing_file='/mnt/tpsp/fkordon/mcc2020-input.qcow2' encryption=off cluster_size=65536 lazy_refcounts=off
Waiting for the VM to be ready (probing ssh)
...................
=====================================================================
Generated by BenchKit 2-4028
Executing tool itstools
Input is ShieldRVs-PT-050A, examination is LTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r210-tajo-159033476400890
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 484K
-rw-r--r-- 1 mcc users 3.0K May 14 02:29 CTLCardinality.txt
-rw-r--r-- 1 mcc users 16K May 14 02:29 CTLCardinality.xml
-rw-r--r-- 1 mcc users 2.6K May 13 19:55 CTLFireability.txt
-rw-r--r-- 1 mcc users 17K May 13 19:55 CTLFireability.xml
-rw-r--r-- 1 mcc users 3.2K May 14 10:04 LTLCardinality.txt
-rw-r--r-- 1 mcc users 24K May 14 10:04 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.0K May 14 10:04 LTLFireability.txt
-rw-r--r-- 1 mcc users 17K May 14 10:04 LTLFireability.xml
-rw-r--r-- 1 mcc users 1 May 12 20:42 NewModel
-rw-r--r-- 1 mcc users 3.7K May 13 14:28 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 20K May 13 14:28 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 2.6K May 13 09:16 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 15K May 13 09:16 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.6K May 13 16:53 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.7K May 13 16:53 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 May 12 20:42 equiv_col
-rw-r--r-- 1 mcc users 5 May 12 20:42 instance
-rw-r--r-- 1 mcc users 6 May 12 20:42 iscolored
-rw-r--r-- 1 mcc users 320K May 12 20:42 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME ShieldRVs-PT-050A-00
FORMULA_NAME ShieldRVs-PT-050A-01
FORMULA_NAME ShieldRVs-PT-050A-02
FORMULA_NAME ShieldRVs-PT-050A-03
FORMULA_NAME ShieldRVs-PT-050A-04
FORMULA_NAME ShieldRVs-PT-050A-05
FORMULA_NAME ShieldRVs-PT-050A-06
FORMULA_NAME ShieldRVs-PT-050A-07
FORMULA_NAME ShieldRVs-PT-050A-08
FORMULA_NAME ShieldRVs-PT-050A-09
FORMULA_NAME ShieldRVs-PT-050A-10
FORMULA_NAME ShieldRVs-PT-050A-11
FORMULA_NAME ShieldRVs-PT-050A-12
FORMULA_NAME ShieldRVs-PT-050A-13
FORMULA_NAME ShieldRVs-PT-050A-14
FORMULA_NAME ShieldRVs-PT-050A-15

=== Now, execution of the tool begins

BK_START 1590626650443

[2020-05-28 00:44:11] [INFO ] Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, LTLFireability, -z3path, /home/mcc/BenchKit//z3/bin/z3, -yices2path, /home/mcc/BenchKit//yices/bin/yices, -its, -ltsminpath, /home/mcc/BenchKit//lts_install_dir/, -greatspnpath, /home/mcc/BenchKit//greatspn/, -order, META, -manyOrder, -smt, -timeout, 3600]
[2020-05-28 00:44:11] [INFO ] Parsing pnml file : /home/mcc/execution/model.pnml
[2020-05-28 00:44:11] [INFO ] Load time of PNML (sax parser for PT used): 82 ms
[2020-05-28 00:44:11] [INFO ] Transformed 703 places.
[2020-05-28 00:44:12] [INFO ] Transformed 953 transitions.
[2020-05-28 00:44:12] [INFO ] Found NUPN structural information;
[2020-05-28 00:44:12] [INFO ] Parsed PT model containing 703 places and 953 transitions in 123 ms.
Parsed 16 properties from file /home/mcc/execution/LTLFireability.xml in 29 ms.
Working with output stream class java.io.PrintStream
Incomplete random walk after 100000 steps, including 149 resets, run finished after 570 ms. (steps per millisecond=175 ) properties seen :[1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 0, 1, 1, 1, 1, 1, 1, 1, 1, 0]
// Phase 1: matrix 953 rows 703 cols
[2020-05-28 00:44:12] [INFO ] Computed 201 place invariants in 21 ms
[2020-05-28 00:44:13] [INFO ] [Real]Absence check using 201 positive place invariants in 145 ms returned sat
[2020-05-28 00:44:13] [INFO ] [Real]Adding state equation constraints to refine reachable states.
[2020-05-28 00:44:14] [INFO ] [Real]Absence check using state equation in 1079 ms returned sat
[2020-05-28 00:44:14] [INFO ] Solution in real domain found non-integer solution.
[2020-05-28 00:44:14] [INFO ] [Nat]Absence check using 201 positive place invariants in 121 ms returned sat
[2020-05-28 00:44:14] [INFO ] [Nat]Adding state equation constraints to refine reachable states.
[2020-05-28 00:44:15] [INFO ] [Nat]Absence check using state equation in 1170 ms returned sat
[2020-05-28 00:44:15] [INFO ] Computed and/alt/rep : 952/7299/952 causal constraints in 93 ms.
[2020-05-28 00:44:34] [INFO ] Added : 700 causal constraints over 140 iterations in 18528 ms. Result :(error "Solver has unexpectedly terminated")
[2020-05-28 00:44:34] [INFO ] [Real]Absence check using 201 positive place invariants in 142 ms returned sat
[2020-05-28 00:44:34] [INFO ] [Real]Adding state equation constraints to refine reachable states.
[2020-05-28 00:44:35] [INFO ] [Real]Absence check using state equation in 1257 ms returned sat
[2020-05-28 00:44:35] [INFO ] Solution in real domain found non-integer solution.
[2020-05-28 00:44:35] [INFO ] [Nat]Absence check using 201 positive place invariants in 83 ms returned sat
[2020-05-28 00:44:35] [INFO ] [Nat]Adding state equation constraints to refine reachable states.
[2020-05-28 00:44:37] [INFO ] [Nat]Absence check using state equation in 1092 ms returned sat
[2020-05-28 00:44:37] [INFO ] Deduced a trap composed of 12 places in 66 ms
[2020-05-28 00:44:37] [INFO ] Trap strengthening (SAT) tested/added 2/1 trap constraints in 128 ms
[2020-05-28 00:44:37] [INFO ] Computed and/alt/rep : 952/7299/952 causal constraints in 43 ms.
[2020-05-28 00:44:55] [INFO ] Added : 695 causal constraints over 139 iterations in 18595 ms. Result :unknown
[2020-05-28 00:44:56] [INFO ] Initial state reduction rules for CTL removed 5 formulas.
[2020-05-28 00:44:56] [INFO ] Flatten gal took : 187 ms
FORMULA ShieldRVs-PT-050A-14 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA ShieldRVs-PT-050A-11 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA ShieldRVs-PT-050A-10 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA ShieldRVs-PT-050A-09 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA ShieldRVs-PT-050A-06 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
[2020-05-28 00:44:56] [INFO ] Flatten gal took : 104 ms
Using solver Z3 to compute partial order matrices.
Built C files in :
/home/mcc/execution
[2020-05-28 00:44:56] [INFO ] Applying decomposition
[2020-05-28 00:44:56] [INFO ] Flatten gal took : 98 ms
[2020-05-28 00:44:56] [INFO ] Input system was already deterministic with 953 transitions.
Converted graph to binary with : CommandLine [args=[/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.louvain.binaries_1.0.0.202005100927/bin/convert-linux64, -i, /tmp/graph18147286992005546713.txt, -o, /tmp/graph18147286992005546713.bin, -w, /tmp/graph18147286992005546713.weights], workingDir=null]
Built communities with : CommandLine [args=[/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.louvain.binaries_1.0.0.202005100927/bin/louvain-linux64, /tmp/graph18147286992005546713.bin, -l, -1, -v, -w, /tmp/graph18147286992005546713.weights, -q, 0, -e, 0.001], workingDir=null]
[2020-05-28 00:44:56] [INFO ] Decomposing Gal with order
[2020-05-28 00:44:56] [INFO ] Rewriting arrays to variables to allow decomposition.
Presburger conditions satisfied. Using coverability to approximate state space in K-Induction.
// Phase 1: matrix 953 rows 703 cols
[2020-05-28 00:44:57] [INFO ] Computed 201 place invariants in 8 ms
inv : p0 + p35 + p36 = 1
inv : p0 + p637 + p638 = 1
inv : p0 + p479 + p480 + p481 + p482 = 1
inv : p0 + p615 + p616 + p617 + p618 = 1
inv : p0 + p153 + p154 + p155 + p156 = 1
inv : p0 + p261 + p262 + p263 + p264 = 1
inv : p0 + p507 + p508 + p509 + p510 = 1
inv : p0 + p497 + p498 = 1
inv : p0 + p289 + p290 + p291 + p292 = 1
inv : p0 + p45 + p46 + p47 + p48 = 1
inv : p0 + p125 + p126 + p127 + p128 = 1
inv : p0 + p567 + p568 = 1
inv : p0 + p643 + p644 + p645 + p646 = 1
inv : p0 + p559 + p560 + p561 + p562 = 1
inv : p0 + p695 + p696 + p697 + p698 = 1
inv : p0 + p535 + p536 + p537 + p538 = 1
inv : p0 + p671 + p672 + p673 + p674 = 1
inv : p0 + p175 + p176 = 1
inv : p0 + p587 + p588 + p589 + p590 = 1
inv : p0 + p69 + p70 + p71 + p72 = 1
inv : p0 + p345 + p346 + p347 + p348 = 1
inv : p0 + p245 + p246 = 1
inv : p0 + p451 + p452 + p453 + p454 = 1
inv : p0 + p105 + p106 = 1
inv : p0 + p17 + p18 + p19 + p20 = 1
inv : p0 + p237 + p238 + p239 + p240 = 1
inv : p0 + p177 + p178 + p179 + p180 = 1
inv : p0 + p367 + p368 + p369 + p370 = 1
inv : p0 + p503 + p504 + p505 + p506 = 1
inv : p0 + p401 + p402 + p403 + p404 = 1
inv : p0 + p639 + p640 + p641 + p642 = 1
inv : p0 + p385 + p386 = 1
inv : p0 + p287 + p288 = 1
inv : p0 + p591 + p592 + p593 + p594 = 1
inv : p0 + p619 + p620 + p621 + p622 = 1
inv : p0 + p265 + p266 + p267 + p268 = 1
inv : p0 + p315 + p316 = 1
inv : p0 + p429 + p430 + p431 + p432 = 1
inv : p0 + p373 + p374 + p375 + p376 = 1
inv : p0 + p293 + p294 + p295 + p296 = 1
inv : p0 + p395 + p396 + p397 + p398 = 1
inv : p0 + p525 + p526 = 1
inv : p0 + p129 + p130 + p131 + p132 = 1
inv : p0 + p455 + p456 = 1
inv : p0 + p205 + p206 + p207 + p208 = 1
inv : p0 + p563 + p564 + p565 + p566 = 1
inv : p0 + p423 + p424 + p425 + p426 = 1
inv : p0 + p427 + p428 = 1
inv : p0 + p77 + p78 = 1
inv : p0 + p699 + p700 + p701 + p702 = 1
inv : p0 + p65 + p66 + p67 + p68 = 1
inv : p0 + p7 + p8 = 1
inv : p0 + p595 + p596 = 1
inv : p0 + p531 + p532 + p533 + p534 = 1
inv : p0 + p665 + p666 = 1
inv : p0 + p357 + p358 = 1
inv : p0 + p667 + p668 + p669 + p670 = 1
inv : p0 + p233 + p234 + p235 + p236 = 1
inv : p0 + p147 + p148 = 1
inv : p0 + p97 + p98 + p99 + p100 = 1
inv : p0 + p157 + p158 + p159 + p160 = 1
inv : p0 + p217 + p218 = 1
inv : p0 + p469 + p470 = 1
inv : p0 + p241 + p242 + p243 + p244 = 1
inv : p0 + p203 + p204 = 1
inv : p0 + p37 + p38 + p39 + p40 = 1
inv : p0 + p513 + p514 + p515 + p516 = 1
inv : p0 + p133 + p134 = 1
inv : p0 + p227 + p228 + p229 + p230 = 1
inv : p0 + p539 + p540 = 1
inv : p0 + p273 + p274 = 1
inv : p0 + p349 + p350 + p351 + p352 = 1
inv : p0 + p335 + p336 + p337 + p338 = 1
inv : p0 + p255 + p256 + p257 + p258 = 1
inv : p0 + p457 + p458 + p459 + p460 = 1
inv : p0 + p679 + p680 = 1
inv : p0 + p343 + p344 = 1
inv : p0 + p259 + p260 = 1
inv : p0 + p297 + p298 + p299 + p300 = 1
inv : p0 + p413 + p414 = 1
inv : p0 + p609 + p610 = 1
inv : p0 + p419 + p420 + p421 + p422 = 1
inv : p0 + p185 + p186 + p187 + p188 = 1
inv : p0 + p107 + p108 + p109 + p110 = 1
inv : p0 + p399 + p400 = 1
inv : p0 + p633 + p634 + p635 + p636 = 1
inv : p0 + p443 + p444 + p445 + p446 = 1
inv : p0 + p329 + p330 = 1
inv : p0 + p489 + p490 + p491 + p492 = 1
inv : p0 + p527 + p528 + p529 + p530 = 1
inv : p0 + p405 + p406 + p407 + p408 = 1
inv : p0 + p115 + p116 + p117 + p118 = 1
inv : p0 + p13 + p14 + p15 + p16 = 1
inv : p0 + p653 + p654 + p655 + p656 = 1
inv : p0 + p553 + p554 = 1
inv : p0 + p101 + p102 + p103 + p104 = 1
inv : p0 + p381 + p382 + p383 + p384 = 1
inv : p0 + p387 + p388 + p389 + p390 = 1
inv : p0 + p483 + p484 = 1
inv : p0 + p121 + p122 + p123 + p124 = 1
inv : p0 + p475 + p476 + p477 + p478 = 1
inv : p0 + p209 + p210 + p211 + p212 = 1
inv : p0 + p647 + p648 + p649 + p650 = 1
inv : p0 + p171 + p172 + p173 + p174 = 1
inv : p0 + p311 + p312 + p313 + p314 = 1
inv : p0 + p63 + p64 = 1
inv : p0 + p545 + p546 + p547 + p548 = 1
inv : p0 + p583 + p584 + p585 + p586 = 1
inv : p0 + p577 + p578 + p579 + p580 = 1
inv : p0 + p279 + p280 + p281 + p282 = 1
inv : p0 + p317 + p318 + p319 + p320 = 1
inv : p0 + p51 + p52 + p53 + p54 = 1
inv : p0 + p275 + p276 + p277 + p278 = 1
inv : p0 + p629 + p630 + p631 + p632 = 1
inv : p0 + p493 + p494 + p495 + p496 = 1
inv : p0 + p139 + p140 + p141 + p142 = 1
inv : p0 + p371 + p372 = 1
inv : p0 + p111 + p112 + p113 + p114 = 1
inv : p0 + p301 + p302 = 1
inv : p0 + p465 + p466 + p467 + p468 = 1
inv : p0 + p231 + p232 = 1
inv : p0 + p437 + p438 + p439 + p440 = 1
inv : p0 + p3 + p4 + p5 + p6 = 1
inv : p0 + p83 + p84 + p85 + p86 = 1
inv : p0 + p601 + p602 + p603 + p604 = 1
inv : p0 + p521 + p522 + p523 + p524 = 1
inv : p0 + p161 + p162 = 1
inv : p0 + p247 + p248 + p249 + p250 = 1
inv : p0 + p167 + p168 + p169 + p170 = 1
inv : p0 + p685 + p686 + p687 + p688 = 1
inv : p0 + p549 + p550 + p551 + p552 = 1
inv : p0 + p573 + p574 + p575 + p576 = 1
inv : p0 + p191 + p192 + p193 + p194 = 1
inv : p0 + p31 + p32 + p33 + p34 = 1
inv : p0 + p223 + p224 + p225 + p226 = 1
inv : p0 + p657 + p658 + p659 + p660 = 1
inv : p0 + p359 + p360 + p361 + p362 = 1
inv : p0 + p55 + p56 + p57 + p58 = 1
inv : p0 + p693 + p694 = 1
inv : p0 + p623 + p624 = 1
inv : p0 + p119 + p120 = 1
inv : p0 + p353 + p354 + p355 + p356 = 1
inv : p0 + p27 + p28 + p29 + p30 = 1
inv : p0 + p189 + p190 = 1
inv : p0 + p597 + p598 + p599 + p600 = 1
inv : p0 + p1 + p2 = 1
inv : p0 + p49 + p50 = 1
inv : p0 + p163 + p164 + p165 + p166 = 1
inv : p0 + p87 + p88 + p89 + p90 = 1
inv : p0 + p195 + p196 + p197 + p198 = 1
inv : p0 + p331 + p332 + p333 + p334 = 1
inv : p0 + p433 + p434 + p435 + p436 = 1
inv : p0 + p59 + p60 + p61 + p62 = 1
inv : p0 + p471 + p472 + p473 + p474 = 1
inv : p0 + p661 + p662 + p663 + p664 = 1
inv : p0 + p461 + p462 + p463 + p464 = 1
inv : p0 + p303 + p304 + p305 + p306 = 1
inv : p0 + p135 + p136 + p137 + p138 = 1
inv : p0 + p363 + p364 + p365 + p366 = 1
inv : p0 + p569 + p570 + p571 + p572 = 1
inv : p0 + p325 + p326 + p327 + p328 = 1
inv : p0 + p377 + p378 + p379 + p380 = 1
inv : p0 + p23 + p24 + p25 + p26 = 1
inv : p0 + p391 + p392 + p393 + p394 = 1
inv : p0 + p499 + p500 + p501 + p502 = 1
inv : p0 + p541 + p542 + p543 + p544 = 1
inv : p0 + p269 + p270 + p271 + p272 = 1
inv : p0 + p213 + p214 + p215 + p216 = 1
inv : p0 + p689 + p690 + p691 + p692 = 1
inv : p0 + p555 + p556 + p557 + p558 = 1
inv : p0 + p93 + p94 + p95 + p96 = 1
inv : p0 + p321 + p322 + p323 + p324 = 1
inv : p0 + p79 + p80 + p81 + p82 = 1
inv : p0 + p307 + p308 + p309 + p310 = 1
inv : p0 + p611 + p612 + p613 + p614 = 1
inv : p0 + p199 + p200 + p201 + p202 = 1
inv : p0 + p283 + p284 + p285 + p286 = 1
inv : p0 + p9 + p10 + p11 + p12 = 1
inv : p0 + p149 + p150 + p151 + p152 = 1
inv : p0 + p605 + p606 + p607 + p608 = 1
inv : p0 + p251 + p252 + p253 + p254 = 1
inv : p0 + p651 + p652 = 1
inv : p0 + p625 + p626 + p627 + p628 = 1
inv : p0 + p41 + p42 + p43 + p44 = 1
inv : p0 + p339 + p340 + p341 + p342 = 1
inv : p0 + p21 + p22 = 1
inv : p0 + p415 + p416 + p417 + p418 = 1
inv : p0 + p517 + p518 + p519 + p520 = 1
inv : p0 + p91 + p92 = 1
inv : p0 + p681 + p682 + p683 + p684 = 1
inv : p0 + p511 + p512 = 1
inv : p0 + p675 + p676 + p677 + p678 = 1
inv : p0 + p219 + p220 + p221 + p222 = 1
inv : p0 + p181 + p182 + p183 + p184 = 1
inv : p0 + p73 + p74 + p75 + p76 = 1
inv : p0 + p143 + p144 + p145 + p146 = 1
inv : p0 + p441 + p442 = 1
inv : p0 + p581 + p582 = 1
inv : p0 + p409 + p410 + p411 + p412 = 1
inv : p0 + p447 + p448 + p449 + p450 = 1
inv : p0 + p485 + p486 + p487 + p488 = 1
Total of 201 invariants.
[2020-05-28 00:44:57] [INFO ] Computed 201 place invariants in 11 ms
[2020-05-28 00:44:57] [INFO ] Removed a total of 1047 redundant transitions.
[2020-05-28 00:44:57] [INFO ] Flatten gal took : 155 ms
[2020-05-28 00:44:57] [INFO ] Fuse similar labels procedure discarded/fused a total of 824 labels/synchronizations in 64 ms.
[2020-05-28 00:44:57] [INFO ] Time to serialize gal into /home/mcc/execution/LTLFireability.pnml.gal : 14 ms
[2020-05-28 00:44:57] [INFO ] Time to serialize properties into /home/mcc/execution/LTLFireability.ltl : 2 ms
Invoking ITS tools like this :CommandLine [args=[/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.202005100927/bin/its-ltl-linux64, --gc-threshold, 2000000, -i, /home/mcc/execution/LTLFireability.pnml.gal, -t, CGAL, -LTL, /home/mcc/execution/LTLFireability.ltl, -c, -stutter-deadlock], workingDir=/home/mcc/execution]

its-ltl command run as :

/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.202005100927/bin/its-ltl-linux64 --gc-threshold 2000000 -i /home/mcc/execution/LTLFireability.pnml.gal -t CGAL -LTL /home/mcc/execution/LTLFireability.ltl -c -stutter-deadlock
Read 11 LTL properties
Checking formula 0 : !((G(!(X(X((!(X("((i14.u166.p582==1)&&(i14.u168.p587==1))")))&&(("(((i4.u51.p180==1)&&(i4.u52.p184==1))&&(i5.i0.i0.u55.p191==1))")U("((i14.u166.p582==1)&&(i14.u168.p587==1))"))))))))
Formula 0 simplified : !G!XX(!X"((i14.u166.p582==1)&&(i14.u168.p587==1))" & ("(((i4.u51.p180==1)&&(i4.u52.p184==1))&&(i5.i0.i0.u55.p191==1))" U "((i14.u166.p582==1)&&(i14.u168.p587==1))"))
built 17 ordering constraints for composite.
built 20 ordering constraints for composite.
built 28 ordering constraints for composite.
built 28 ordering constraints for composite.
built 20 ordering constraints for composite.
built 28 ordering constraints for composite.
built 23 ordering constraints for composite.
built 15 ordering constraints for composite.
built 12 ordering constraints for composite.
built 12 ordering constraints for composite.
built 15 ordering constraints for composite.
built 12 ordering constraints for composite.
built 12 ordering constraints for composite.
built 28 ordering constraints for composite.
built 28 ordering constraints for composite.
built 20 ordering constraints for composite.
built 28 ordering constraints for composite.
built 28 ordering constraints for composite.
built 28 ordering constraints for composite.
built 28 ordering constraints for composite.
built 23 ordering constraints for composite.
built 15 ordering constraints for composite.
built 12 ordering constraints for composite.
built 12 ordering constraints for composite.
built 15 ordering constraints for composite.
built 12 ordering constraints for composite.
built 12 ordering constraints for composite.
built 28 ordering constraints for composite.
built 28 ordering constraints for composite.
built 26 ordering constraints for composite.
[2020-05-28 00:44:58] [INFO ] Proved 703 variables to be positive in 1536 ms
[2020-05-28 00:44:58] [INFO ] Computing symmetric may disable matrix : 953 transitions.
[2020-05-28 00:44:58] [INFO ] Computation of disable matrix completed :0/953 took 0 ms. Total solver calls (SAT/UNSAT): 0(0/0)
[2020-05-28 00:44:58] [INFO ] Computation of Complete disable matrix. took 61 ms. Total solver calls (SAT/UNSAT): 0(0/0)
[2020-05-28 00:44:58] [INFO ] Computing symmetric may enable matrix : 953 transitions.
[2020-05-28 00:44:58] [INFO ] Computation of Complete enable matrix. took 50 ms. Total solver calls (SAT/UNSAT): 0(0/0)
[2020-05-28 00:45:02] [INFO ] Computing symmetric co enabling matrix : 953 transitions.
[2020-05-28 00:45:02] [INFO ] Computation of co-enabling matrix(0/953) took 27 ms. Total solver calls (SAT/UNSAT): 14(2/12)
[2020-05-28 00:45:05] [INFO ] Computation of co-enabling matrix(150/953) took 3033 ms. Total solver calls (SAT/UNSAT): 1883(302/1581)
[2020-05-28 00:45:09] [INFO ] Computation of co-enabling matrix(300/953) took 6290 ms. Total solver calls (SAT/UNSAT): 4390(600/3790)
[2020-05-28 00:45:12] [INFO ] Computation of co-enabling matrix(449/953) took 9303 ms. Total solver calls (SAT/UNSAT): 7696(896/6800)
[2020-05-28 00:45:15] [INFO ] Computation of co-enabling matrix(596/953) took 12322 ms. Total solver calls (SAT/UNSAT): 9835(1094/8741)
[2020-05-28 00:45:18] [INFO ] Computation of co-enabling matrix(725/953) took 15334 ms. Total solver calls (SAT/UNSAT): 10995(1200/9795)
[2020-05-28 00:45:21] [INFO ] Computation of co-enabling matrix(892/953) took 18335 ms. Total solver calls (SAT/UNSAT): 11326(1200/10126)
[2020-05-28 00:45:22] [INFO ] Computation of Finished co-enabling matrix. took 19297 ms. Total solver calls (SAT/UNSAT): 11446(1200/10246)
[2020-05-28 00:45:22] [INFO ] Computing Do-Not-Accords matrix : 953 transitions.
[2020-05-28 00:45:22] [INFO ] Computation of Completed DNA matrix. took 149 ms. Total solver calls (SAT/UNSAT): 0(0/0)
[2020-05-28 00:45:22] [INFO ] Built C files in 25900ms conformant to PINS in folder :/home/mcc/execution
Running compilation step : CommandLine [args=[gcc, -c, -I/home/mcc/BenchKit//lts_install_dir//include, -I., -std=c99, -fPIC, -O2, model.c], workingDir=/home/mcc/execution]
Compilation finished in 12372 ms.
Running link step : CommandLine [args=[gcc, -shared, -o, gal.so, model.o], workingDir=/home/mcc/execution]
Link finished in 124 ms.
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, --when, --ltl, [](!( X(X(( !( X((LTLAP0==true))) ) && ( ((LTLAP1==true))U((LTLAP0==true)) )))) ), --buchi-type=spotba], workingDir=/home/mcc/execution]
/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc: error while loading shared libraries: libltdl.so.7: cannot open shared object file: No such file or directory
WARNING : LTS min runner thread failed on error :java.lang.RuntimeException: Unexpected exception when executing ltsmin :CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, --when, --ltl, [](!( X(X(( !( X((LTLAP0==true))) ) && ( ((LTLAP1==true))U((LTLAP0==true)) )))) ), --buchi-type=spotba], workingDir=/home/mcc/execution]
127
java.lang.RuntimeException: Unexpected exception when executing ltsmin :CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, --when, --ltl, [](!( X(X(( !( X((LTLAP0==true))) ) && ( ((LTLAP1==true))U((LTLAP0==true)) )))) ), --buchi-type=spotba], workingDir=/home/mcc/execution]
127
at fr.lip6.move.gal.application.LTSminRunner.checkProperty(LTSminRunner.java:170)
at fr.lip6.move.gal.application.LTSminRunner.access$10(LTSminRunner.java:124)
at fr.lip6.move.gal.application.LTSminRunner$1.run(LTSminRunner.java:93)
at java.base/java.lang.Thread.run(Thread.java:834)
Detected timeout of ITS tools.
[2020-05-28 01:05:14] [INFO ] Applying decomposition
[2020-05-28 01:05:14] [INFO ] Flatten gal took : 542 ms
[2020-05-28 01:05:14] [INFO ] Decomposing Gal with order
[2020-05-28 01:05:14] [INFO ] Rewriting arrays to variables to allow decomposition.
[2020-05-28 01:05:15] [INFO ] Removed a total of 1047 redundant transitions.
[2020-05-28 01:05:15] [INFO ] Flatten gal took : 288 ms
[2020-05-28 01:05:15] [INFO ] Fuse similar labels procedure discarded/fused a total of 600 labels/synchronizations in 104 ms.
[2020-05-28 01:05:15] [INFO ] Time to serialize gal into /home/mcc/execution/LTLFireability.pnml.gal : 33 ms
[2020-05-28 01:05:15] [INFO ] Time to serialize properties into /home/mcc/execution/LTLFireability.ltl : 3 ms
Invoking ITS tools like this :CommandLine [args=[/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.202005100927/bin/its-ltl-linux64, --gc-threshold, 2000000, -i, /home/mcc/execution/LTLFireability.pnml.gal, -t, CGAL, -LTL, /home/mcc/execution/LTLFireability.ltl, -c, -stutter-deadlock], workingDir=/home/mcc/execution]

its-ltl command run as :

/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.202005100927/bin/its-ltl-linux64 --gc-threshold 2000000 -i /home/mcc/execution/LTLFireability.pnml.gal -t CGAL -LTL /home/mcc/execution/LTLFireability.ltl -c -stutter-deadlock
Read 11 LTL properties
Checking formula 0 : !((G(!(X(X((!(X("((u167.p582==1)&&(u169.p587==1))")))&&(("(((u52.p180==1)&&(u53.p184==1))&&(u56.p191==1))")U("((u167.p582==1)&&(u169.p587==1))"))))))))
Formula 0 simplified : !G!XX(!X"((u167.p582==1)&&(u169.p587==1))" & ("(((u52.p180==1)&&(u53.p184==1))&&(u56.p191==1))" U "((u167.p582==1)&&(u169.p587==1))"))
built 202 ordering constraints for composite.
Reverse transition relation is NOT exact ! Due to transitions t304, t307, t310, t317, t320, t324, t326, t331, t336, t339, t344, t348, t350, t356, t361, t365, t369, t371, t376, t378, t385, t389, t391, t397, t400, t402, t407, t413, t415, t418, t423, t426, t432, t435, t439, t443, t446, t450, t455, t459, t463, t467, t470, t476, t478, t484, t487, t492, t496, t501, t503, t507, t513, t518, t519, t524, t528, t533, t535, t539, t545, t548, t552, t556, t560, t563, t569, t574, t578, t580, t584, t587, t591, t595, t600, t603, t609, t613, t618, t621, t624, t627, t634, t636, t642, t646, t649, t654, t656, t660, t665, t670, t671, t677, t679, t685, t688, t693, t697, t701, t703, t711, t716, t718, t726, t728, t735, t740, t745, t748, t756, t760, t765, t769, t776, t779, t784, t790, t793, t799, t805, t810, t813, t821, t826, t831, t833, t838, t846, t848, t856, t858, t866, t870, t874, t878, t883, t888, t893, t901, t905, t910, t916, t918, t926, t928, t936, t941, t945, t949, u2.t0, u2.t1, u4.t2, u4.t3, u5.t4, u5.t5, u6.t6, u6.t7, u8.t8, u8.t9, u9.t10, u9.t11, u10.t12, u10.t13, u12.t14, u12.t15, u13.t16, u13.t17, u14.t18, u14.t19, u16.t20, u16.t21, u17.t22, u17.t23, u18.t24, u18.t25, u20.t26, u20.t27, u21.t28, u21.t29, u22.t30, u22.t31, u24.t32, u24.t33, u25.t34, u25.t35, u26.t36, u26.t37, u28.t38, u28.t39, u29.t40, u29.t41, u30.t42, u30.t43, u32.t44, u32.t45, u33.t46, u33.t47, u34.t48, u34.t49, u36.t50, u36.t51, u37.t52, u37.t53, u38.t54, u38.t55, u40.t56, u40.t57, u41.t58, u41.t59, u42.t60, u42.t61, u44.t62, u44.t63, u45.t64, u45.t65, u46.t66, u46.t67, u48.t68, u48.t69, u49.t70, u49.t71, u50.t72, u50.t73, u52.t74, u52.t75, u53.t76, u53.t77, u54.t78, u54.t79, u56.t80, u56.t81, u57.t82, u57.t83, u58.t84, u58.t85, u60.t86, u60.t87, u61.t88, u61.t89, u62.t90, u62.t91, u64.t92, u64.t93, u65.t94, u65.t95, u66.t96, u66.t97, u68.t98, u68.t99, u69.t100, u69.t101, u70.t102, u70.t103, u72.t104, u72.t105, u73.t106, u73.t107, u74.t108, u74.t109, u76.t110, u76.t111, u77.t112, u77.t113, u78.t114, u78.t115, u80.t116, u80.t117, u81.t118, u81.t119, u82.t120, u82.t121, u84.t122, u84.t123, u85.t124, u85.t125, u86.t126, u86.t127, u88.t128, u88.t129, u89.t130, u89.t131, u90.t132, u90.t133, u92.t134, u92.t135, u93.t136, u93.t137, u94.t138, u94.t139, u96.t140, u96.t141, u97.t142, u97.t143, u98.t144, u98.t145, u100.t146, u100.t147, u101.t148, u101.t149, u102.t150, u102.t151, u104.t152, u104.t153, u105.t154, u105.t155, u106.t156, u106.t157, u108.t158, u108.t159, u109.t160, u109.t161, u110.t162, u110.t163, u112.t164, u112.t165, u113.t166, u113.t167, u114.t168, u114.t169, u116.t170, u116.t171, u117.t172, u117.t173, u118.t174, u118.t175, u120.t176, u120.t177, u121.t178, u121.t179, u122.t180, u122.t181, u124.t182, u124.t183, u125.t184, u125.t185, u126.t186, u126.t187, u128.t188, u128.t189, u129.t190, u129.t191, u130.t192, u130.t193, u132.t194, u132.t195, u133.t196, u133.t197, u134.t198, u134.t199, u136.t200, u136.t201, u137.t202, u137.t203, u138.t204, u138.t205, u140.t206, u140.t207, u141.t208, u141.t209, u142.t210, u142.t211, u144.t212, u144.t213, u145.t214, u145.t215, u146.t216, u146.t217, u148.t218, u148.t219, u149.t220, u149.t221, u150.t222, u150.t223, u152.t224, u152.t225, u153.t226, u153.t227, u154.t228, u154.t229, u156.t230, u156.t231, u157.t232, u157.t233, u158.t234, u158.t235, u160.t236, u160.t237, u161.t238, u161.t239, u162.t240, u162.t241, u164.t242, u164.t243, u165.t244, u165.t245, u166.t246, u166.t247, u168.t248, u168.t249, u169.t250, u169.t251, u170.t252, u170.t253, u172.t254, u172.t255, u173.t256, u173.t257, u174.t258, u174.t259, u176.t260, u176.t261, u177.t262, u177.t263, u178.t264, u178.t265, u180.t266, u180.t267, u181.t268, u181.t269, u182.t270, u182.t271, u184.t272, u184.t273, u185.t274, u185.t275, u186.t276, u186.t277, u188.t278, u188.t279, u189.t280, u189.t281, u190.t282, u190.t283, u192.t284, u192.t285, u193.t286, u193.t287, u194.t288, u194.t289, u196.t290, u196.t291, u197.t292, u197.t293, u198.t294, u198.t295, u198.t301, u200.t296, u200.t297, u201.t298, u201.t299, Intersection with reachable at each step enabled. (destroyed/reverse/intersect/total) :0/52/451/503
Computing Next relation with stutter on 2.394e+38 deadlock states
Detected timeout of ITS tools.
[2020-05-28 01:25:31] [INFO ] Flatten gal took : 630 ms
[2020-05-28 01:25:33] [INFO ] Input system was already deterministic with 953 transitions.
[2020-05-28 01:25:33] [INFO ] Transformed 703 places.
[2020-05-28 01:25:33] [INFO ] Transformed 953 transitions.
Running greatSPN : CommandLine [args=[/home/mcc/BenchKit//greatspn//bin/pinvar, /home/mcc/execution/gspn], workingDir=/home/mcc/execution]
Run of greatSPN captured in /home/mcc/execution/outPut.txt
Running greatSPN : CommandLine [args=[/home/mcc/BenchKit//greatspn//bin/RGMEDD2, /home/mcc/execution/gspn, -META, -varord-only], workingDir=/home/mcc/execution]
Run of greatSPN captured in /home/mcc/execution/outPut.txt
Using order generated by GreatSPN with heuristic : META
[2020-05-28 01:25:33] [INFO ] Time to serialize gal into /home/mcc/execution/LTLFireability.pnml.gal : 11 ms
[2020-05-28 01:25:33] [INFO ] Time to serialize properties into /home/mcc/execution/LTLFireability.ltl : 2 ms
Invoking ITS tools like this :CommandLine [args=[/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.202005100927/bin/its-ltl-linux64, --gc-threshold, 2000000, -i, /home/mcc/execution/LTLFireability.pnml.gal, -t, CGAL, -LTL, /home/mcc/execution/LTLFireability.ltl, -c, -stutter-deadlock, --load-order, /home/mcc/execution/model.ord, --gen-order, FOLLOW], workingDir=/home/mcc/execution]

its-ltl command run as :

/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.202005100927/bin/its-ltl-linux64 --gc-threshold 2000000 -i /home/mcc/execution/LTLFireability.pnml.gal -t CGAL -LTL /home/mcc/execution/LTLFireability.ltl -c -stutter-deadlock --load-order /home/mcc/execution/model.ord --gen-order FOLLOW
Read 11 LTL properties
Successfully loaded order from file /home/mcc/execution/model.ord
Checking formula 0 : !((G(!(X(X((!(X("((p582==1)&&(p587==1))")))&&(("(((p180==1)&&(p184==1))&&(p191==1))")U("((p582==1)&&(p587==1))"))))))))
Formula 0 simplified : !G!XX(!X"((p582==1)&&(p587==1))" & ("(((p180==1)&&(p184==1))&&(p191==1))" U "((p582==1)&&(p587==1))"))

BK_TIME_CONFINEMENT_REACHED

--------------------
content from stderr:

+ export BINDIR=/home/mcc/BenchKit/
+ BINDIR=/home/mcc/BenchKit/
++ pwd
+ export MODEL=/home/mcc/execution
+ MODEL=/home/mcc/execution
+ [[ LTLFireability = StateSpace ]]
+ /home/mcc/BenchKit//runeclipse.sh /home/mcc/execution LTLFireability -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -greatspnpath /home/mcc/BenchKit//greatspn/ -order META -manyOrder -smt -timeout 3600
+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ /home/mcc/BenchKit//itstools/its-tools -data /home/mcc/execution/workspace -pnfolder /home/mcc/execution -examination LTLFireability -z3path /home/mcc/BenchKit//z3/bin/z3 -yices2path /home/mcc/BenchKit//yices/bin/yices -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -greatspnpath /home/mcc/BenchKit//greatspn/ -order META -manyOrder -smt -timeout 3600 -vmargs -Dosgi.locking=none -Declipse.stateSaveDelayInterval=-1 -Dosgi.configuration.area=/tmp/.eclipse -Xss128m -Xms40m -Xmx16000m -Dfile.encoding=UTF-8 -Dosgi.requiredJavaVersion=1.6

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="ShieldRVs-PT-050A"
export BK_EXAMINATION="LTLFireability"
export BK_TOOL="itstools"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-4028"
echo " Executing tool itstools"
echo " Input is ShieldRVs-PT-050A, examination is LTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r210-tajo-159033476400890"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/ShieldRVs-PT-050A.tgz
mv ShieldRVs-PT-050A execution
cd execution
if [ "LTLFireability" = "ReachabilityDeadlock" ] || [ "LTLFireability" = "UpperBounds" ] || [ "LTLFireability" = "QuasiLiveness" ] || [ "LTLFireability" = "StableMarking" ] || [ "LTLFireability" = "Liveness" ] || [ "LTLFireability" = "OneSafe" ] || [ "LTLFireability" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "LTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "LTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "LTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property LTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "LTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' LTLFireability.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ "LTLFireability" = "ReachabilityDeadlock" ] || [ "LTLFireability" = "QuasiLiveness" ] || [ "LTLFireability" = "StableMarking" ] || [ "LTLFireability" = "Liveness" ] || [ "LTLFireability" = "OneSafe" ] ; then
echo "FORMULA_NAME LTLFireability"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;