Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/local/x2003239/mcc2020-input.r190-csrt-159033383100724.qcow2', fmt=qcow2 size=4294967296 backing_file=/local/x2003239/mcc2020-input.qcow2 encryption=off cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
........................................................................................................................
=====================================================================
Generated by BenchKit 2-4028
Executing tool smart
Input is ResAllocation-PT-R020C002, examination is CTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 1
Run identifier is r190-csrt-159033383100724
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 264K
-rw-r--r-- 1 mcc users 3.3K May 14 00:25 CTLCardinality.txt
-rw-r--r-- 1 mcc users 17K May 14 00:25 CTLCardinality.xml
-rw-r--r-- 1 mcc users 2.5K May 13 17:36 CTLFireability.txt
-rw-r--r-- 1 mcc users 15K May 13 17:36 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.0K May 12 20:53 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.3K May 12 20:53 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 3.4K May 14 10:00 LTLCardinality.txt
-rw-r--r-- 1 mcc users 24K May 14 10:00 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.2K May 14 10:00 LTLFireability.txt
-rw-r--r-- 1 mcc users 18K May 14 10:00 LTLFireability.xml
-rw-r--r-- 1 mcc users 3.8K May 13 13:05 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 19K May 13 13:05 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 3.0K May 13 07:35 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 17K May 13 07:35 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.8K May 13 16:53 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.8K May 13 16:53 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 May 12 20:53 equiv_col
-rw-r--r-- 1 mcc users 9 May 12 20:53 instance
-rw-r--r-- 1 mcc users 6 May 12 20:53 iscolored
-rw-r--r-- 1 mcc users 85K May 12 20:53 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME ResAllocation-PT-R020C002-CTLFireability-00
FORMULA_NAME ResAllocation-PT-R020C002-CTLFireability-01
FORMULA_NAME ResAllocation-PT-R020C002-CTLFireability-02
FORMULA_NAME ResAllocation-PT-R020C002-CTLFireability-03
FORMULA_NAME ResAllocation-PT-R020C002-CTLFireability-04
FORMULA_NAME ResAllocation-PT-R020C002-CTLFireability-05
FORMULA_NAME ResAllocation-PT-R020C002-CTLFireability-06
FORMULA_NAME ResAllocation-PT-R020C002-CTLFireability-07
FORMULA_NAME ResAllocation-PT-R020C002-CTLFireability-08
FORMULA_NAME ResAllocation-PT-R020C002-CTLFireability-09
FORMULA_NAME ResAllocation-PT-R020C002-CTLFireability-10
FORMULA_NAME ResAllocation-PT-R020C002-CTLFireability-11
FORMULA_NAME ResAllocation-PT-R020C002-CTLFireability-12
FORMULA_NAME ResAllocation-PT-R020C002-CTLFireability-13
FORMULA_NAME ResAllocation-PT-R020C002-CTLFireability-14
FORMULA_NAME ResAllocation-PT-R020C002-CTLFireability-15

=== Now, execution of the tool begins

BK_START 1590410083091

======================================================
========== this is Smart for the MCC'2018 ============
======================================================
Running ResAllocation (PT), instance R020C002
Examination CTLFireability
Parser /home/mcc/BenchKit/bin/parser/CTLFire.jar
Model checker /home/mcc/BenchKit/bin/rem_exec/smart

GOT IT HERE. BS
Petri model created: 80 places, 42 transitions, 200 arcs.
AT ITER 0 NEW BEST:: SOT 1828 SOS 310 HAS SOPS 310 HAS SOUS 308 HAS SOUPS 308 WITH SCORE 308.31
AT ITER 13 NEW BEST:: SOT 1825 SOS 307 HAS SOPS 307 HAS SOUS 305 HAS SOUPS 305 WITH SCORE 305.307
AT ITER 148 NEW BEST:: SOT 1824 SOS 306 HAS SOPS 306 HAS SOUS 304 HAS SOUPS 304 WITH SCORE 304.306
AT ITER 160 NEW BEST:: SOT 1824 SOS 305 HAS SOPS 305 HAS SOUS 303 HAS SOUPS 303 WITH SCORE 303.305
AT ITER 182 NEW BEST:: SOT 1824 SOS 304 HAS SOPS 304 HAS SOUS 302 HAS SOUPS 302 WITH SCORE 302.304
AT ITER 457 NEW BEST:: SOT 1824 SOS 302 HAS SOPS 302 HAS SOUS 300 HAS SOUPS 300 WITH SCORE 300.302
AT ITER 552 NEW BEST:: SOT 1824 SOS 301 HAS SOPS 301 HAS SOUS 299 HAS SOUPS 299 WITH SCORE 299.301
AT ITER 555 NEW BEST:: SOT 1824 SOS 299 HAS SOPS 299 HAS SOUS 297 HAS SOUPS 297 WITH SCORE 297.299
AT ITER 713 NEW BEST:: SOT 1821 SOS 296 HAS SOPS 296 HAS SOUS 294 HAS SOUPS 294 WITH SCORE 294.296
AT ITER 728 NEW BEST:: SOT 1820 SOS 295 HAS SOPS 295 HAS SOUS 293 HAS SOUPS 293 WITH SCORE 293.295
AT ITER 773 NEW BEST:: SOT 1820 SOS 293 HAS SOPS 293 HAS SOUS 291 HAS SOUPS 291 WITH SCORE 291.293
AT ITER 860 NEW BEST:: SOT 1820 SOS 292 HAS SOPS 292 HAS SOUS 290 HAS SOUPS 290 WITH SCORE 290.292
AT ITER 969 NEW BEST:: SOT 1820 SOS 290 HAS SOPS 290 HAS SOUS 288 HAS SOUPS 288 WITH SCORE 288.29
AT ITER 1089 NEW BEST:: SOT 1820 SOS 289 HAS SOPS 289 HAS SOUS 287 HAS SOUPS 287 WITH SCORE 287.289
AT ITER 1109 NEW BEST:: SOT 1819 SOS 287 HAS SOPS 287 HAS SOUS 285 HAS SOUPS 285 WITH SCORE 285.287
AT ITER 1179 NEW BEST:: SOT 1819 SOS 286 HAS SOPS 286 HAS SOUS 284 HAS SOUPS 284 WITH SCORE 284.286
AT ITER 1469 NEW BEST:: SOT 1819 SOS 285 HAS SOPS 285 HAS SOUS 283 HAS SOUPS 283 WITH SCORE 283.285
AT ITER 1785 NEW BEST:: SOT 1818 SOS 284 HAS SOPS 284 HAS SOUS 282 HAS SOUPS 282 WITH SCORE 282.284
AT ITER 1929 NEW BEST:: SOT 1818 SOS 282 HAS SOPS 282 HAS SOUS 280 HAS SOUPS 280 WITH SCORE 280.282
AT ITER 2091 NEW BEST:: SOT 1817 SOS 281 HAS SOPS 281 HAS SOUS 279 HAS SOUPS 279 WITH SCORE 279.281
AT ITER 2157 NEW BEST:: SOT 1817 SOS 279 HAS SOPS 279 HAS SOUS 277 HAS SOUPS 277 WITH SCORE 277.279
AT ITER 2293 NEW BEST:: SOT 1817 SOS 278 HAS SOPS 278 HAS SOUS 276 HAS SOUPS 276 WITH SCORE 276.278
AT ITER 2402 NEW BEST:: SOT 1816 SOS 277 HAS SOPS 277 HAS SOUS 275 HAS SOUPS 275 WITH SCORE 275.277
AT ITER 2736 NEW BEST:: SOT 1816 SOS 276 HAS SOPS 276 HAS SOUS 274 HAS SOUPS 274 WITH SCORE 274.276
AT ITER 2774 NEW BEST:: SOT 1816 SOS 274 HAS SOPS 274 HAS SOUS 272 HAS SOUPS 272 WITH SCORE 272.274
AT ITER 2778 NEW BEST:: SOT 1816 SOS 272 HAS SOPS 272 HAS SOUS 272 HAS SOUPS 272 WITH SCORE 272.272
AT ITER 2932 NEW BEST:: SOT 1816 SOS 271 HAS SOPS 271 HAS SOUS 271 HAS SOUPS 271 WITH SCORE 271.271
AT ITER 2963 NEW BEST:: SOT 1816 SOS 269 HAS SOPS 269 HAS SOUS 269 HAS SOUPS 269 WITH SCORE 269.269
AT ITER 3041 NEW BEST:: SOT 1816 SOS 267 HAS SOPS 267 HAS SOUS 267 HAS SOUPS 267 WITH SCORE 267.267
AT ITER 3875 NEW BEST:: SOT 1816 SOS 266 HAS SOPS 266 HAS SOUS 266 HAS SOUPS 266 WITH SCORE 266.266
AT ITER 4285 NEW BEST:: SOT 1816 SOS 265 HAS SOPS 265 HAS SOUS 265 HAS SOUPS 265 WITH SCORE 265.265
AT ITER 4669 NEW BEST:: SOT 1816 SOS 263 HAS SOPS 263 HAS SOUS 263 HAS SOUPS 263 WITH SCORE 263.263
Bounds file is: CTLFireability.xml
PROPERTY: ResAllocation-PT-R020C002-CTLFireability-00 (AF( (AG( (AF( ((potential((tk(P40)>=1) & (tk(P80)>=1))))))))))
PROPERTY: ResAllocation-PT-R020C002-CTLFireability-01 (! (EF( (EG( (! ((potential((tk(P25)>=1) & (tk(P28)>=1))))))))))
PROPERTY: ResAllocation-PT-R020C002-CTLFireability-02 (EU( (AX( (! ((potential((tk(P36)>=1) & (tk(P76)>=1) & (tk(P77)>=1))))))) , ( ((potential((tk(P9)>=1) & (tk(P12)>=1)))) & ( ( ((potential((tk(P41)>=1)))) & ((potential((tk(P4)>=1) & (tk(P44)>=1) & (tk(P45)>=1)))) ) | ( ((potential((tk(P26)>=1) & (tk(P66)>=1) & (tk(P67)>=1)))) | ((potential((tk(P30)>=1) & (tk(P70)>=1) & (tk(P71)>=1)))) ) ) ) ))
PROPERTY: ResAllocation-PT-R020C002-CTLFireability-03 (! (! ( (AF( ( ((potential((tk(P36)>=1) & (tk(P76)>=1) & (tk(P77)>=1)))) | ((potential((tk(P22)>=1) & (tk(P62)>=1) & (tk(P63)>=1)))) ))) | ( (! (! ((potential((tk(P28)>=1) & (tk(P68)>=1) & (tk(P69)>=1)))))) & (EF( ((potential((tk(P34)>=1) & (tk(P74)>=1) & (tk(P75)>=1)))))) ) )))
PROPERTY: ResAllocation-PT-R020C002-CTLFireability-04 (EG( ( ( ( (! ((potential((tk(P24)>=1) & (tk(P64)>=1) & (tk(P65)>=1))))) | (! ((potential((tk(P22)>=1) & (tk(P62)>=1) & (tk(P63)>=1))))) ) | (EF( ((potential((tk(P22)>=1) & (tk(P62)>=1) & (tk(P63)>=1)))))) ) & (EF( ( ((potential((tk(P34)>=1) & (tk(P74)>=1) & (tk(P75)>=1)))) | ((potential((tk(P7)>=1) & (tk(P10)>=1)))) ))) )))
PROPERTY: ResAllocation-PT-R020C002-CTLFireability-05 (EG( ( ( (EF( ((potential((tk(P7)>=1) & (tk(P10)>=1)))))) | ( ( ((potential((tk(P12)>=1) & (tk(P52)>=1) & (tk(P53)>=1)))) & ((potential((tk(P27)>=1) & (tk(P30)>=1)))) ) & ((potential((tk(P17)>=1) & (tk(P20)>=1)))) ) ) & (! ((potential((tk(P17)>=1) & (tk(P20)>=1))))) )))
PROPERTY: ResAllocation-PT-R020C002-CTLFireability-06 ( (AU( (! ((potential((tk(P30)>=1) & (tk(P70)>=1) & (tk(P71)>=1))))) , ((potential((tk(P34)>=1) & (tk(P74)>=1) & (tk(P75)>=1)))) )) & (EF( ( ((potential((tk(P27)>=1) & (tk(P30)>=1)))) | (! ( ((potential((tk(P28)>=1) & (tk(P68)>=1) & (tk(P69)>=1)))) | ((potential((tk(P33)>=1) & (tk(P36)>=1)))) )) ))) )
PROPERTY: ResAllocation-PT-R020C002-CTLFireability-07 (EU( ((potential((tk(P2)>=1)))) , ((potential((tk(P25)>=1) & (tk(P28)>=1)))) ))
PROPERTY: ResAllocation-PT-R020C002-CTLFireability-08 (! (AU( (! ( ((potential((tk(P20)>=1) & (tk(P60)>=1) & (tk(P61)>=1)))) & ((potential((tk(P17)>=1) & (tk(P20)>=1)))) )) , (AF( ((potential((tk(P41)>=1)))))) )))
PROPERTY: ResAllocation-PT-R020C002-CTLFireability-09 (! (! ( ( (EG( ((potential((tk(P24)>=1) & (tk(P64)>=1) & (tk(P65)>=1)))))) | ((potential((tk(P3)>=1) & (tk(P6)>=1)))) ) | (AF( ((potential((tk(P1)>=1) & (tk(P4)>=1)))))) )))
PROPERTY: ResAllocation-PT-R020C002-CTLFireability-10 (AU( (EG( ( ((potential((tk(P14)>=1) & (tk(P54)>=1) & (tk(P55)>=1)))) | ((potential((tk(P26)>=1) & (tk(P66)>=1) & (tk(P67)>=1)))) ))) , (EG( (! ((potential((tk(P12)>=1) & (tk(P52)>=1) & (tk(P53)>=1))))))) ))
PROPERTY: ResAllocation-PT-R020C002-CTLFireability-11 (AF( ((potential((tk(P33)>=1) & (tk(P36)>=1))))))
PROPERTY: ResAllocation-PT-R020C002-CTLFireability-12 ( (EG( (! (EG( ((potential((tk(P29)>=1) & (tk(P32)>=1))))))))) | ((potential((tk(P26)>=1) & (tk(P66)>=1) & (tk(P67)>=1)))) )
PROPERTY: ResAllocation-PT-R020C002-CTLFireability-13 (EF( (AG( ( ( ((potential((tk(P17)>=1) & (tk(P20)>=1)))) | ((potential((tk(P21)>=1) & (tk(P24)>=1)))) ) & ( ((potential((tk(P12)>=1) & (tk(P52)>=1) & (tk(P53)>=1)))) & ((potential((tk(P38)>=1) & (tk(P78)>=1) & (tk(P79)>=1)))) ) )))))
PROPERTY: ResAllocation-PT-R020C002-CTLFireability-14 (EG( (EF( (EF( ((potential((tk(P26)>=1) & (tk(P66)>=1) & (tk(P67)>=1))))))))))
PROPERTY: ResAllocation-PT-R020C002-CTLFireability-15 (! (EG( ( ( ( ((potential((tk(P6)>=1) & (tk(P46)>=1) & (tk(P47)>=1)))) | ((potential((tk(P12)>=1) & (tk(P52)>=1) & (tk(P53)>=1)))) ) | (! ((potential((tk(P11)>=1) & (tk(P14)>=1))))) ) & (! ((potential((tk(P35)>=1) & (tk(P38)>=1))))) ))))

BK_TIME_CONFINEMENT_REACHED

--------------------
content from stderr:

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="ResAllocation-PT-R020C002"
export BK_EXAMINATION="CTLFireability"
export BK_TOOL="smart"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-4028"
echo " Executing tool smart"
echo " Input is ResAllocation-PT-R020C002, examination is CTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 1"
echo " Run identifier is r190-csrt-159033383100724"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/ResAllocation-PT-R020C002.tgz
mv ResAllocation-PT-R020C002 execution
cd execution
if [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "UpperBounds" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] || [ "CTLFireability" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property CTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "CTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' CTLFireability.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] ; then
echo "FORMULA_NAME CTLFireability"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;